[mirror_ubuntu-eoan-kernel.git] / drivers / net / ethernet / aquantia / atlantic / aq_ring.h

/*
 * aQuantia Corporation Network Driver
 * Copyright (C) 2014-2017 aQuantia Corporation. All rights reserved
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms and conditions of the GNU General Public License,
 * version 2, as published by the Free Software Foundation.
 */

/* File aq_ring.h: Declaration of functions for Rx/Tx rings. */

#ifndef AQ_RING_H
#define AQ_RING_H

#include "aq_common.h"

struct page;

/*           TxC       SOP        DX         EOP
 *         +----------+----------+----------+-----------
 *   8bytes|len l3,l4 | pa       | pa       | pa
 *         +----------+----------+----------+-----------
 * 4/8bytes|len pkt   |len pkt   |          | skb
 *         +----------+----------+----------+-----------
 * 4/8bytes|is_txc    |len,flags |len       |len,is_eop
 *         +----------+----------+----------+-----------
 *
 *  This aq_ring_buff_s doesn't have endianness dependency.
 *  It is __packed for cache line optimizations.
 */
struct __packed aq_ring_buff_s {
	union {
		/* RX */
		struct {
			u32 rss_hash;
			u16 next;
			u8 is_hash_l4;
			u8 rsvd1;
			struct page *page;
		};
		/* EOP */
		struct {
			dma_addr_t pa_eop;
			struct sk_buff *skb;
		};
		/* DX */
		struct {
			dma_addr_t pa;
		};
		/* SOP */
		struct {
			dma_addr_t pa_sop;
			u32 len_pkt_sop;
		};
		/* TxC */
		struct {
			u32 mss;
			u8 len_l2;
			u8 len_l3;
			u8 len_l4;
			u8 rsvd2;
			u32 len_pkt;
		};
	};
	union {
		struct {
			u32 len:16;
			u32 is_ip_cso:1;
			u32 is_udp_cso:1;
			u32 is_tcp_cso:1;
			u32 is_cso_err:1;
			u32 is_sop:1;
			u32 is_eop:1;
			u32 is_txc:1;
			u32 is_mapped:1;
			u32 is_cleaned:1;
			u32 is_error:1;
			u32 rsvd3:6;
		};
		u32 flags;
	};
};

struct aq_ring_stats_rx_s {
	u64 errors;
	u64 packets;
	u64 bytes;
	u64 lro_packets;
	u64 jumbo_packets;
};

struct aq_ring_stats_tx_s {
	u64 errors;
	u64 packets;
	u64 bytes;
};

union aq_ring_stats_s {
	struct aq_ring_stats_rx_s rx;
	struct aq_ring_stats_tx_s tx;
};

struct aq_ring_s {
	struct aq_obj_s header;
	struct aq_ring_buff_s *buff_ring;
	u8 *dx_ring;		/* descriptors ring, dma shared mem */
	struct aq_nic_s *aq_nic;
	unsigned int idx;	/* for HW layer registers operations */
	unsigned int hw_head;
	unsigned int sw_head;
	unsigned int sw_tail;
	unsigned int size;	/* descriptors number */
	unsigned int dx_size;	/* TX or RX descriptor size,  */
				/* stored here for fater math */
	union aq_ring_stats_s stats;
	dma_addr_t dx_ring_pa;
};

struct aq_ring_param_s {
	unsigned int vec_idx;
	unsigned int cpu;
	cpumask_t affinity_mask;
};

static inline unsigned int aq_ring_next_dx(struct aq_ring_s *self,
					   unsigned int dx)
{
	return (++dx >= self->size) ? 0U : dx;
}

static inline unsigned int aq_ring_avail_dx(struct aq_ring_s *self)
{
	return (((self->sw_tail >= self->sw_head)) ?
		(self->size - 1) - self->sw_tail + self->sw_head :
		self->sw_head - self->sw_tail - 1);
}

struct aq_ring_s *aq_ring_tx_alloc(struct aq_ring_s *self,
				   struct aq_nic_s *aq_nic,
				   unsigned int idx,
				   struct aq_nic_cfg_s *aq_nic_cfg);
struct aq_ring_s *aq_ring_rx_alloc(struct aq_ring_s *self,
				   struct aq_nic_s *aq_nic,
				   unsigned int idx,
				   struct aq_nic_cfg_s *aq_nic_cfg);
int aq_ring_init(struct aq_ring_s *self);
void aq_ring_rx_deinit(struct aq_ring_s *self);
void aq_ring_free(struct aq_ring_s *self);
void aq_ring_tx_clean(struct aq_ring_s *self);
int aq_ring_rx_clean(struct aq_ring_s *self, int *work_done, int budget);
int aq_ring_rx_fill(struct aq_ring_s *self);

#endif /* AQ_RING_H */
Commit	Line	Data
018423e9 DV	1	/*
	2	* aQuantia Corporation Network Driver
	3	* Copyright (C) 2014-2017 aQuantia Corporation. All rights reserved
	4	*
	5	* This program is free software; you can redistribute it and/or modify it
	6	* under the terms and conditions of the GNU General Public License,
	7	* version 2, as published by the Free Software Foundation.
	8	*/
	9
	10	/* File aq_ring.h: Declaration of functions for Rx/Tx rings. */
	11
	12	#ifndef AQ_RING_H
	13	#define AQ_RING_H
	14
	15	#include "aq_common.h"
	16
	17	struct page;
	18
	19	/* TxC SOP DX EOP
	20	* +----------+----------+----------+-----------
	21	* 8bytes\|len l3,l4 \| pa \| pa \| pa
	22	* +----------+----------+----------+-----------
	23	* 4/8bytes\|len pkt \|len pkt \| \| skb
	24	* +----------+----------+----------+-----------
	25	* 4/8bytes\|is_txc \|len,flags \|len \|len,is_eop
	26	* +----------+----------+----------+-----------
	27	*
	28	* This aq_ring_buff_s doesn't have endianness dependency.
	29	* It is __packed for cache line optimizations.
	30	*/
	31	struct __packed aq_ring_buff_s {
	32	union {
	33	/* RX */
	34	struct {
	35	u32 rss_hash;
	36	u16 next;
	37	u8 is_hash_l4;
	38	u8 rsvd1;
	39	struct page *page;
	40	};
	41	/* EOP */
	42	struct {
	43	dma_addr_t pa_eop;
	44	struct sk_buff *skb;
	45	};
	46	/* DX */
	47	struct {
	48	dma_addr_t pa;
	49	};
	50	/* SOP */
	51	struct {
	52	dma_addr_t pa_sop;
	53	u32 len_pkt_sop;
	54	};
	55	/* TxC */
	56	struct {
	57	u32 mss;
	58	u8 len_l2;
	59	u8 len_l3;
	60	u8 len_l4;
	61	u8 rsvd2;
	62	u32 len_pkt;
	63	};
	64	};
65	union {
66	struct {
67	u32 len:16;
68	u32 is_ip_cso:1;
69	u32 is_udp_cso:1;
70	u32 is_tcp_cso:1;
71	u32 is_cso_err:1;
72	u32 is_sop:1;
73	u32 is_eop:1;
74	u32 is_txc:1;
75	u32 is_mapped:1;
76	u32 is_cleaned:1;
77	u32 is_error:1;
78	u32 rsvd3:6;
79	};
80	u32 flags;
81	};
82	};
83
84	struct aq_ring_stats_rx_s {
85	u64 errors;
86	u64 packets;
87	u64 bytes;
88	u64 lro_packets;
89	u64 jumbo_packets;
90	};
91
92	struct aq_ring_stats_tx_s {
93	u64 errors;
94	u64 packets;
95	u64 bytes;
96	};
97
98	union aq_ring_stats_s {
99	struct aq_ring_stats_rx_s rx;
100	struct aq_ring_stats_tx_s tx;
101	};
102
103	struct aq_ring_s {
104	struct aq_obj_s header;
105	struct aq_ring_buff_s *buff_ring;
106	u8 dx_ring; / descriptors ring, dma shared mem */
107	struct aq_nic_s *aq_nic;
108	unsigned int idx; /* for HW layer registers operations */
109	unsigned int hw_head;
110	unsigned int sw_head;
111	unsigned int sw_tail;
112	unsigned int size; /* descriptors number */
113	unsigned int dx_size; /* TX or RX descriptor size, */
114	/* stored here for fater math */
115	union aq_ring_stats_s stats;
116	dma_addr_t dx_ring_pa;
117	};
118
119	struct aq_ring_param_s {
120	unsigned int vec_idx;
121	unsigned int cpu;
122	cpumask_t affinity_mask;
123	};
124
125	static inline unsigned int aq_ring_next_dx(struct aq_ring_s *self,
126	unsigned int dx)
127	{
128	return (++dx >= self->size) ? 0U : dx;
129	}
130
131	static inline unsigned int aq_ring_avail_dx(struct aq_ring_s *self)
132	{
133	return (((self->sw_tail >= self->sw_head)) ?
134	(self->size - 1) - self->sw_tail + self->sw_head :
135	self->sw_head - self->sw_tail - 1);
136	}
137
138	struct aq_ring_s aq_ring_tx_alloc(struct aq_ring_s self,
139	struct aq_nic_s *aq_nic,
140	unsigned int idx,
141	struct aq_nic_cfg_s *aq_nic_cfg);
142	struct aq_ring_s aq_ring_rx_alloc(struct aq_ring_s self,
143	struct aq_nic_s *aq_nic,
144	unsigned int idx,
145	struct aq_nic_cfg_s *aq_nic_cfg);
146	int aq_ring_init(struct aq_ring_s *self);
018423e9 DV	147	void aq_ring_rx_deinit(struct aq_ring_s *self);
018423e9 DV	148	void aq_ring_free(struct aq_ring_s *self);
eb36bedf	149	void aq_ring_tx_clean(struct aq_ring_s *self);
018423e9 DV	150	int aq_ring_rx_clean(struct aq_ring_s self, int work_done, int budget);
	151	int aq_ring_rx_fill(struct aq_ring_s *self);
	152
	153	#endif /* AQ_RING_H */