[mirror_ubuntu-focal-kernel.git] / drivers / net / ethernet / aquantia / atlantic / hw_atl / hw_atl_utils.h

/*
 * aQuantia Corporation Network Driver
 * Copyright (C) 2014-2017 aQuantia Corporation. All rights reserved
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms and conditions of the GNU General Public License,
 * version 2, as published by the Free Software Foundation.
 */

/* File hw_atl_utils.h: Declaration of common functions for Atlantic hardware
 * abstraction layer.
 */

#ifndef HW_ATL_UTILS_H
#define HW_ATL_UTILS_H

#include "../aq_common.h"

#define HW_ATL_FLUSH() { (void)aq_hw_read_reg(self, 0x10); }

struct __packed hw_atl_stats_s {
	u32 uprc;
	u32 mprc;
	u32 bprc;
	u32 erpt;
	u32 uptc;
	u32 mptc;
	u32 bptc;
	u32 erpr;
	u32 mbtc;
	u32 bbtc;
	u32 mbrc;
	u32 bbrc;
	u32 ubrc;
	u32 ubtc;
	u32 dpc;
};

union __packed ip_addr {
	struct {
		u8 addr[16];
	} v6;
	struct {
		u8 padding[12];
		u8 addr[4];
	} v4;
};

struct __packed hw_aq_atl_utils_fw_rpc {
	u32 msg_id;

	union {
		struct {
			u32 pong;
		} msg_ping;

		struct {
			u8 mac_addr[6];
			u32 ip_addr_cnt;

			struct {
				union ip_addr addr;
				union ip_addr mask;
			} ip[1];
		} msg_arp;

		struct {
			u32 len;
			u8 packet[1514U];
		} msg_inject;

		struct {
			u32 priority;
			u32 wol_packet_type;
			u16 friendly_name_len;
			u16 friendly_name[65];
			u32 pattern_id;
			u32 next_wol_pattern_offset;

			union {
				struct {
					u32 flags;
					u8 ipv4_source_address[4];
					u8 ipv4_dest_address[4];
					u16 tcp_source_port_number;
					u16 tcp_dest_port_number;
				} ipv4_tcp_syn_parameters;

				struct {
					u32 flags;
					u8 ipv6_source_address[16];
					u8 ipv6_dest_address[16];
					u16 tcp_source_port_number;
					u16 tcp_dest_port_number;
				} ipv6_tcp_syn_parameters;

				struct {
					u32 flags;
				} eapol_request_id_message_parameters;

				struct {
					u32 flags;
					u32 mask_offset;
					u32 mask_size;
					u32 pattern_offset;
					u32 pattern_size;
				} wol_bit_map_pattern;
			} wol_pattern;
		} msg_wol;

		struct {
			u32 is_wake_on_link_down;
			u32 is_wake_on_link_up;
		} msg_wolink;
	};
};

struct __packed hw_aq_atl_utils_mbox_header {
	u32 version;
	u32 transaction_id;
	u32 error;
};

struct __packed hw_aq_atl_utils_mbox {
	struct hw_aq_atl_utils_mbox_header header;
	struct hw_atl_stats_s stats;
};

struct __packed hw_atl_s {
	struct aq_hw_s base;
	struct hw_atl_stats_s last_stats;
	struct hw_atl_stats_s curr_stats;
	u64 speed;
	unsigned int chip_features;
	u32 fw_ver_actual;
	atomic_t dpc;
	u32 mbox_addr;
	u32 rpc_addr;
	u32 rpc_tid;
	struct hw_aq_atl_utils_fw_rpc rpc;
};

#define SELF ((struct hw_atl_s *)self)

#define PHAL_ATLANTIC ((struct hw_atl_s *)((void *)(self)))
#define PHAL_ATLANTIC_A0 ((struct hw_atl_s *)((void *)(self)))
#define PHAL_ATLANTIC_B0 ((struct hw_atl_s *)((void *)(self)))

#define HAL_ATLANTIC_UTILS_CHIP_MIPS         0x00000001U
#define HAL_ATLANTIC_UTILS_CHIP_TPO2         0x00000002U
#define HAL_ATLANTIC_UTILS_CHIP_RPF2         0x00000004U
#define HAL_ATLANTIC_UTILS_CHIP_MPI_AQ       0x00000010U
#define HAL_ATLANTIC_UTILS_CHIP_REVISION_A0  0x01000000U
#define HAL_ATLANTIC_UTILS_CHIP_REVISION_B0  0x02000000U

#define IS_CHIP_FEATURE(_F_) (HAL_ATLANTIC_UTILS_CHIP_##_F_ & \
				PHAL_ATLANTIC->chip_features)

enum hal_atl_utils_fw_state_e {
	MPI_DEINIT = 0,
	MPI_RESET = 1,
	MPI_INIT = 2,
	MPI_POWER = 4,
};

#define HAL_ATLANTIC_RATE_10G        BIT(0)
#define HAL_ATLANTIC_RATE_5G         BIT(1)
#define HAL_ATLANTIC_RATE_5GSR       BIT(2)
#define HAL_ATLANTIC_RATE_2GS        BIT(3)
#define HAL_ATLANTIC_RATE_1G         BIT(4)
#define HAL_ATLANTIC_RATE_100M       BIT(5)
#define HAL_ATLANTIC_RATE_INVALID    BIT(6)

void hw_atl_utils_hw_chip_features_init(struct aq_hw_s *self, u32 *p);

int hw_atl_utils_mpi_read_mbox(struct aq_hw_s *self,
			       struct hw_aq_atl_utils_mbox_header *pmbox);

void hw_atl_utils_mpi_read_stats(struct aq_hw_s *self,
				 struct hw_aq_atl_utils_mbox *pmbox);

void hw_atl_utils_mpi_set(struct aq_hw_s *self,
			  enum hal_atl_utils_fw_state_e state,
			  u32 speed);

int hw_atl_utils_mpi_set_speed(struct aq_hw_s *self, u32 speed,
			       enum hal_atl_utils_fw_state_e state);

int hw_atl_utils_mpi_get_link_status(struct aq_hw_s *self);

int hw_atl_utils_get_mac_permanent(struct aq_hw_s *self,
				   struct aq_hw_caps_s *aq_hw_caps,
				   u8 *mac);

unsigned int hw_atl_utils_mbps_2_speed_index(unsigned int mbps);

int hw_atl_utils_hw_get_regs(struct aq_hw_s *self,
			     struct aq_hw_caps_s *aq_hw_caps,
			     u32 *regs_buff);

int hw_atl_utils_hw_set_power(struct aq_hw_s *self,
			      unsigned int power_state);

int hw_atl_utils_hw_deinit(struct aq_hw_s *self);

int hw_atl_utils_get_fw_version(struct aq_hw_s *self, u32 *fw_version);

int hw_atl_utils_update_stats(struct aq_hw_s *self);

int hw_atl_utils_get_hw_stats(struct aq_hw_s *self,
			      u64 *data,
			      unsigned int *p_count);

#endif /* HW_ATL_UTILS_H */
Commit	Line	Data
98c4c201 DV	1	/*
	2	* aQuantia Corporation Network Driver
	3	* Copyright (C) 2014-2017 aQuantia Corporation. All rights reserved
	4	*
	5	* This program is free software; you can redistribute it and/or modify it
	6	* under the terms and conditions of the GNU General Public License,
	7	* version 2, as published by the Free Software Foundation.
	8	*/
	9
	10	/* File hw_atl_utils.h: Declaration of common functions for Atlantic hardware
	11	* abstraction layer.
	12	*/
	13
	14	#ifndef HW_ATL_UTILS_H
	15	#define HW_ATL_UTILS_H
	16
	17	#include "../aq_common.h"
	18
	19	#define HW_ATL_FLUSH() { (void)aq_hw_read_reg(self, 0x10); }
	20
	21	struct __packed hw_atl_stats_s {
	22	u32 uprc;
	23	u32 mprc;
	24	u32 bprc;
	25	u32 erpt;
	26	u32 uptc;
	27	u32 mptc;
	28	u32 bptc;
	29	u32 erpr;
	30	u32 mbtc;
	31	u32 bbtc;
	32	u32 mbrc;
	33	u32 bbrc;
	34	u32 ubrc;
	35	u32 ubtc;
	36	u32 dpc;
	37	};
	38
	39	union __packed ip_addr {
	40	struct {
	41	u8 addr[16];
	42	} v6;
	43	struct {
	44	u8 padding[12];
	45	u8 addr[4];
	46	} v4;
	47	};
	48
	49	struct __packed hw_aq_atl_utils_fw_rpc {
	50	u32 msg_id;
	51
	52	union {
	53	struct {
	54	u32 pong;
	55	} msg_ping;
	56
	57	struct {
	58	u8 mac_addr[6];
	59	u32 ip_addr_cnt;
	60
	61	struct {
	62	union ip_addr addr;
	63	union ip_addr mask;
	64	} ip[1];
65	} msg_arp;
66
67	struct {
68	u32 len;
69	u8 packet[1514U];
70	} msg_inject;
71
72	struct {
73	u32 priority;
74	u32 wol_packet_type;
75	u16 friendly_name_len;
76	u16 friendly_name[65];
77	u32 pattern_id;
78	u32 next_wol_pattern_offset;
79
80	union {
81	struct {
82	u32 flags;
83	u8 ipv4_source_address[4];
84	u8 ipv4_dest_address[4];
85	u16 tcp_source_port_number;
86	u16 tcp_dest_port_number;
87	} ipv4_tcp_syn_parameters;
88
89	struct {
90	u32 flags;
91	u8 ipv6_source_address[16];
92	u8 ipv6_dest_address[16];
93	u16 tcp_source_port_number;
94	u16 tcp_dest_port_number;
95	} ipv6_tcp_syn_parameters;
96
97	struct {
98	u32 flags;
99	} eapol_request_id_message_parameters;
100
101	struct {
102	u32 flags;
103	u32 mask_offset;
104	u32 mask_size;
105	u32 pattern_offset;
106	u32 pattern_size;
107	} wol_bit_map_pattern;
108	} wol_pattern;
109	} msg_wol;
110
111	struct {
112	u32 is_wake_on_link_down;
113	u32 is_wake_on_link_up;
114	} msg_wolink;
115	};
116	};
117
65e665e6	118	struct __packed hw_aq_atl_utils_mbox_header {
98c4c201 DV	119	u32 version;
98c4c201 DV	120	u32 transaction_id;
65e665e6 IR	121	u32 error;
	122	};
	123
	124	struct __packed hw_aq_atl_utils_mbox {
	125	struct hw_aq_atl_utils_mbox_header header;
98c4c201 DV	126	struct hw_atl_stats_s stats;
	127	};
	128
	129	struct __packed hw_atl_s {
	130	struct aq_hw_s base;
65e665e6 IR	131	struct hw_atl_stats_s last_stats;
65e665e6 IR	132	struct hw_atl_stats_s curr_stats;
98c4c201	133	u64 speed;
98c4c201 DV	134	unsigned int chip_features;
	135	u32 fw_ver_actual;
	136	atomic_t dpc;
	137	u32 mbox_addr;
	138	u32 rpc_addr;
	139	u32 rpc_tid;
	140	struct hw_aq_atl_utils_fw_rpc rpc;
	141	};
	142
	143	#define SELF ((struct hw_atl_s *)self)
	144
	145	#define PHAL_ATLANTIC ((struct hw_atl_s )((void )(self)))
	146	#define PHAL_ATLANTIC_A0 ((struct hw_atl_s )((void )(self)))
	147	#define PHAL_ATLANTIC_B0 ((struct hw_atl_s )((void )(self)))
	148
	149	#define HAL_ATLANTIC_UTILS_CHIP_MIPS 0x00000001U
	150	#define HAL_ATLANTIC_UTILS_CHIP_TPO2 0x00000002U
	151	#define HAL_ATLANTIC_UTILS_CHIP_RPF2 0x00000004U
	152	#define HAL_ATLANTIC_UTILS_CHIP_MPI_AQ 0x00000010U
	153	#define HAL_ATLANTIC_UTILS_CHIP_REVISION_A0 0x01000000U
	154	#define HAL_ATLANTIC_UTILS_CHIP_REVISION_B0 0x02000000U
	155
	156	#define IS_CHIP_FEATURE(_F_) (HAL_ATLANTIC_UTILS_CHIP_##_F_ & \
	157	PHAL_ATLANTIC->chip_features)
	158
	159	enum hal_atl_utils_fw_state_e {
	160	MPI_DEINIT = 0,
	161	MPI_RESET = 1,
	162	MPI_INIT = 2,
	163	MPI_POWER = 4,
	164	};
	165
	166	#define HAL_ATLANTIC_RATE_10G BIT(0)
	167	#define HAL_ATLANTIC_RATE_5G BIT(1)
	168	#define HAL_ATLANTIC_RATE_5GSR BIT(2)
	169	#define HAL_ATLANTIC_RATE_2GS BIT(3)
	170	#define HAL_ATLANTIC_RATE_1G BIT(4)
	171	#define HAL_ATLANTIC_RATE_100M BIT(5)
	172	#define HAL_ATLANTIC_RATE_INVALID BIT(6)
	173
	174	void hw_atl_utils_hw_chip_features_init(struct aq_hw_s self, u32 p);
	175
65e665e6 IR	176	int hw_atl_utils_mpi_read_mbox(struct aq_hw_s *self,
	177	struct hw_aq_atl_utils_mbox_header *pmbox);
	178
98c4c201 DV	179	void hw_atl_utils_mpi_read_stats(struct aq_hw_s *self,
	180	struct hw_aq_atl_utils_mbox *pmbox);
	181
	182	void hw_atl_utils_mpi_set(struct aq_hw_s *self,
	183	enum hal_atl_utils_fw_state_e state,
	184	u32 speed);
	185
	186	int hw_atl_utils_mpi_set_speed(struct aq_hw_s *self, u32 speed,
	187	enum hal_atl_utils_fw_state_e state);
	188
bd8ed441	189	int hw_atl_utils_mpi_get_link_status(struct aq_hw_s *self);
98c4c201 DV	190
	191	int hw_atl_utils_get_mac_permanent(struct aq_hw_s *self,
	192	struct aq_hw_caps_s *aq_hw_caps,
	193	u8 *mac);
	194
	195	unsigned int hw_atl_utils_mbps_2_speed_index(unsigned int mbps);
	196
	197	int hw_atl_utils_hw_get_regs(struct aq_hw_s *self,
	198	struct aq_hw_caps_s *aq_hw_caps,
	199	u32 *regs_buff);
	200
98c4c201 DV	201	int hw_atl_utils_hw_set_power(struct aq_hw_s *self,
	202	unsigned int power_state);
	203
	204	int hw_atl_utils_hw_deinit(struct aq_hw_s *self);
	205
	206	int hw_atl_utils_get_fw_version(struct aq_hw_s self, u32 fw_version);
	207
65e665e6 IR	208	int hw_atl_utils_update_stats(struct aq_hw_s *self);
65e665e6 IR	209
98c4c201 DV	210	int hw_atl_utils_get_hw_stats(struct aq_hw_s *self,
	211	u64 *data,
	212	unsigned int *p_count);
	213
	214	#endif /* HW_ATL_UTILS_H */