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1/*
2 * Copyright (C) 2004-2013 Synopsys, Inc. (www.synopsys.com)
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * Driver for the ARC EMAC 10100 (hardware revision 5)
9 *
10 * Contributors:
11 * Amit Bhor
12 * Sameer Dhavale
13 * Vineet Gupta
14 */
15
775dd682 16#include <linux/crc32.h>
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17#include <linux/etherdevice.h>
18#include <linux/interrupt.h>
19#include <linux/io.h>
20#include <linux/module.h>
21#include <linux/of_address.h>
22#include <linux/of_irq.h>
23#include <linux/of_mdio.h>
24#include <linux/of_net.h>
25#include <linux/of_platform.h>
26
27#include "emac.h"
28
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29/**
30 * arc_emac_tx_avail - Return the number of available slots in the tx ring.
31 * @priv: Pointer to ARC EMAC private data structure.
32 *
33 * returns: the number of slots available for transmission in tx the ring.
34 */
35static inline int arc_emac_tx_avail(struct arc_emac_priv *priv)
36{
37 return (priv->txbd_dirty + TX_BD_NUM - priv->txbd_curr - 1) % TX_BD_NUM;
38}
39
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40/**
41 * arc_emac_adjust_link - Adjust the PHY link duplex.
42 * @ndev: Pointer to the net_device structure.
43 *
44 * This function is called to change the duplex setting after auto negotiation
45 * is done by the PHY.
46 */
47static void arc_emac_adjust_link(struct net_device *ndev)
48{
49 struct arc_emac_priv *priv = netdev_priv(ndev);
01dea536 50 struct phy_device *phy_dev = ndev->phydev;
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51 unsigned int reg, state_changed = 0;
52
53 if (priv->link != phy_dev->link) {
54 priv->link = phy_dev->link;
55 state_changed = 1;
56 }
57
58 if (priv->speed != phy_dev->speed) {
59 priv->speed = phy_dev->speed;
60 state_changed = 1;
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RP
61 if (priv->set_mac_speed)
62 priv->set_mac_speed(priv, priv->speed);
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63 }
64
65 if (priv->duplex != phy_dev->duplex) {
66 reg = arc_reg_get(priv, R_CTRL);
67
663713eb 68 if (phy_dev->duplex == DUPLEX_FULL)
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69 reg |= ENFL_MASK;
70 else
71 reg &= ~ENFL_MASK;
72
73 arc_reg_set(priv, R_CTRL, reg);
74 priv->duplex = phy_dev->duplex;
75 state_changed = 1;
76 }
77
78 if (state_changed)
79 phy_print_status(phy_dev);
80}
81
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82/**
83 * arc_emac_get_drvinfo - Get EMAC driver information.
84 * @ndev: Pointer to net_device structure.
85 * @info: Pointer to ethtool_drvinfo structure.
86 *
87 * This implements ethtool command for getting the driver information.
88 * Issue "ethtool -i ethX" under linux prompt to execute this function.
89 */
90static void arc_emac_get_drvinfo(struct net_device *ndev,
91 struct ethtool_drvinfo *info)
92{
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93 struct arc_emac_priv *priv = netdev_priv(ndev);
94
95 strlcpy(info->driver, priv->drv_name, sizeof(info->driver));
96 strlcpy(info->version, priv->drv_version, sizeof(info->version));
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97}
98
99static const struct ethtool_ops arc_emac_ethtool_ops = {
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100 .get_drvinfo = arc_emac_get_drvinfo,
101 .get_link = ethtool_op_get_link,
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102 .get_link_ksettings = phy_ethtool_get_link_ksettings,
103 .set_link_ksettings = phy_ethtool_set_link_ksettings,
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104};
105
106#define FIRST_OR_LAST_MASK (FIRST_MASK | LAST_MASK)
107
108/**
109 * arc_emac_tx_clean - clears processed by EMAC Tx BDs.
110 * @ndev: Pointer to the network device.
111 */
112static void arc_emac_tx_clean(struct net_device *ndev)
113{
114 struct arc_emac_priv *priv = netdev_priv(ndev);
ff458f6f 115 struct net_device_stats *stats = &ndev->stats;
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116 unsigned int i;
117
118 for (i = 0; i < TX_BD_NUM; i++) {
119 unsigned int *txbd_dirty = &priv->txbd_dirty;
120 struct arc_emac_bd *txbd = &priv->txbd[*txbd_dirty];
121 struct buffer_state *tx_buff = &priv->tx_buff[*txbd_dirty];
122 struct sk_buff *skb = tx_buff->skb;
123 unsigned int info = le32_to_cpu(txbd->info);
124
c278c253 125 if ((info & FOR_EMAC) || !txbd->data || !skb)
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126 break;
127
128 if (unlikely(info & (DROP | DEFR | LTCL | UFLO))) {
129 stats->tx_errors++;
130 stats->tx_dropped++;
131
132 if (info & DEFR)
133 stats->tx_carrier_errors++;
134
135 if (info & LTCL)
136 stats->collisions++;
137
138 if (info & UFLO)
139 stats->tx_fifo_errors++;
140 } else if (likely(info & FIRST_OR_LAST_MASK)) {
141 stats->tx_packets++;
142 stats->tx_bytes += skb->len;
143 }
144
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145 dma_unmap_single(&ndev->dev, dma_unmap_addr(tx_buff, addr),
146 dma_unmap_len(tx_buff, len), DMA_TO_DEVICE);
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147
148 /* return the sk_buff to system */
149 dev_kfree_skb_irq(skb);
150
151 txbd->data = 0;
152 txbd->info = 0;
c278c253 153 tx_buff->skb = NULL;
e4f2379d 154
27082ee1 155 *txbd_dirty = (*txbd_dirty + 1) % TX_BD_NUM;
e4f2379d 156 }
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157
158 /* Ensure that txbd_dirty is visible to tx() before checking
159 * for queue stopped.
160 */
161 smp_mb();
162
163 if (netif_queue_stopped(ndev) && arc_emac_tx_avail(priv))
164 netif_wake_queue(ndev);
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165}
166
167/**
168 * arc_emac_rx - processing of Rx packets.
169 * @ndev: Pointer to the network device.
170 * @budget: How many BDs to process on 1 call.
171 *
172 * returns: Number of processed BDs
173 *
174 * Iterate through Rx BDs and deliver received packages to upper layer.
175 */
176static int arc_emac_rx(struct net_device *ndev, int budget)
177{
178 struct arc_emac_priv *priv = netdev_priv(ndev);
179 unsigned int work_done;
180
9cff866e 181 for (work_done = 0; work_done < budget; work_done++) {
e4f2379d 182 unsigned int *last_rx_bd = &priv->last_rx_bd;
ff458f6f 183 struct net_device_stats *stats = &ndev->stats;
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184 struct buffer_state *rx_buff = &priv->rx_buff[*last_rx_bd];
185 struct arc_emac_bd *rxbd = &priv->rxbd[*last_rx_bd];
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186 unsigned int pktlen, info = le32_to_cpu(rxbd->info);
187 struct sk_buff *skb;
188 dma_addr_t addr;
189
190 if (unlikely((info & OWN_MASK) == FOR_EMAC))
191 break;
192
193 /* Make a note that we saw a packet at this BD.
194 * So next time, driver starts from this + 1
195 */
196 *last_rx_bd = (*last_rx_bd + 1) % RX_BD_NUM;
197
198 if (unlikely((info & FIRST_OR_LAST_MASK) !=
199 FIRST_OR_LAST_MASK)) {
200 /* We pre-allocate buffers of MTU size so incoming
201 * packets won't be split/chained.
202 */
203 if (net_ratelimit())
204 netdev_err(ndev, "incomplete packet received\n");
205
206 /* Return ownership to EMAC */
a4a1139b 207 rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
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208 stats->rx_errors++;
209 stats->rx_length_errors++;
210 continue;
211 }
212
213 pktlen = info & LEN_MASK;
214 stats->rx_packets++;
215 stats->rx_bytes += pktlen;
216 skb = rx_buff->skb;
217 skb_put(skb, pktlen);
218 skb->dev = ndev;
219 skb->protocol = eth_type_trans(skb, ndev);
220
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221 dma_unmap_single(&ndev->dev, dma_unmap_addr(rx_buff, addr),
222 dma_unmap_len(rx_buff, len), DMA_FROM_DEVICE);
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223
224 /* Prepare the BD for next cycle */
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225 rx_buff->skb = netdev_alloc_skb_ip_align(ndev,
226 EMAC_BUFFER_SIZE);
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227 if (unlikely(!rx_buff->skb)) {
228 stats->rx_errors++;
229 /* Because receive_skb is below, increment rx_dropped */
230 stats->rx_dropped++;
231 continue;
232 }
233
234 /* receive_skb only if new skb was allocated to avoid holes */
235 netif_receive_skb(skb);
236
237 addr = dma_map_single(&ndev->dev, (void *)rx_buff->skb->data,
a4a1139b 238 EMAC_BUFFER_SIZE, DMA_FROM_DEVICE);
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239 if (dma_mapping_error(&ndev->dev, addr)) {
240 if (net_ratelimit())
241 netdev_err(ndev, "cannot dma map\n");
242 dev_kfree_skb(rx_buff->skb);
243 stats->rx_errors++;
244 continue;
245 }
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246 dma_unmap_addr_set(rx_buff, addr, addr);
247 dma_unmap_len_set(rx_buff, len, EMAC_BUFFER_SIZE);
e4f2379d 248
a4a1139b 249 rxbd->data = cpu_to_le32(addr);
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250
251 /* Make sure pointer to data buffer is set */
252 wmb();
253
254 /* Return ownership to EMAC */
a4a1139b 255 rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
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256 }
257
258 return work_done;
259}
260
261/**
262 * arc_emac_poll - NAPI poll handler.
263 * @napi: Pointer to napi_struct structure.
264 * @budget: How many BDs to process on 1 call.
265 *
266 * returns: Number of processed BDs
267 */
268static int arc_emac_poll(struct napi_struct *napi, int budget)
269{
270 struct net_device *ndev = napi->dev;
271 struct arc_emac_priv *priv = netdev_priv(ndev);
272 unsigned int work_done;
273
274 arc_emac_tx_clean(ndev);
275
276 work_done = arc_emac_rx(ndev, budget);
277 if (work_done < budget) {
278 napi_complete(napi);
7ce7679d 279 arc_reg_or(priv, R_ENABLE, RXINT_MASK | TXINT_MASK);
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280 }
281
282 return work_done;
283}
284
285/**
286 * arc_emac_intr - Global interrupt handler for EMAC.
287 * @irq: irq number.
288 * @dev_instance: device instance.
289 *
290 * returns: IRQ_HANDLED for all cases.
291 *
292 * ARC EMAC has only 1 interrupt line, and depending on bits raised in
293 * STATUS register we may tell what is a reason for interrupt to fire.
294 */
295static irqreturn_t arc_emac_intr(int irq, void *dev_instance)
296{
297 struct net_device *ndev = dev_instance;
298 struct arc_emac_priv *priv = netdev_priv(ndev);
ff458f6f 299 struct net_device_stats *stats = &ndev->stats;
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300 unsigned int status;
301
302 status = arc_reg_get(priv, R_STATUS);
303 status &= ~MDIO_MASK;
304
305 /* Reset all flags except "MDIO complete" */
306 arc_reg_set(priv, R_STATUS, status);
307
7ce7679d 308 if (status & (RXINT_MASK | TXINT_MASK)) {
e4f2379d 309 if (likely(napi_schedule_prep(&priv->napi))) {
7ce7679d 310 arc_reg_clr(priv, R_ENABLE, RXINT_MASK | TXINT_MASK);
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311 __napi_schedule(&priv->napi);
312 }
313 }
314
315 if (status & ERR_MASK) {
316 /* MSER/RXCR/RXFR/RXFL interrupt fires on corresponding
317 * 8-bit error counter overrun.
318 */
319
320 if (status & MSER_MASK) {
321 stats->rx_missed_errors += 0x100;
322 stats->rx_errors += 0x100;
323 }
324
325 if (status & RXCR_MASK) {
326 stats->rx_crc_errors += 0x100;
327 stats->rx_errors += 0x100;
328 }
329
330 if (status & RXFR_MASK) {
331 stats->rx_frame_errors += 0x100;
332 stats->rx_errors += 0x100;
333 }
334
335 if (status & RXFL_MASK) {
336 stats->rx_over_errors += 0x100;
337 stats->rx_errors += 0x100;
338 }
339 }
340
341 return IRQ_HANDLED;
342}
343
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344#ifdef CONFIG_NET_POLL_CONTROLLER
345static void arc_emac_poll_controller(struct net_device *dev)
346{
347 disable_irq(dev->irq);
348 arc_emac_intr(dev->irq, dev);
349 enable_irq(dev->irq);
350}
351#endif
352
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353/**
354 * arc_emac_open - Open the network device.
355 * @ndev: Pointer to the network device.
356 *
357 * returns: 0, on success or non-zero error value on failure.
358 *
359 * This function sets the MAC address, requests and enables an IRQ
360 * for the EMAC device and starts the Tx queue.
361 * It also connects to the phy device.
362 */
363static int arc_emac_open(struct net_device *ndev)
364{
365 struct arc_emac_priv *priv = netdev_priv(ndev);
01dea536 366 struct phy_device *phy_dev = ndev->phydev;
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367 int i;
368
369 phy_dev->autoneg = AUTONEG_ENABLE;
370 phy_dev->speed = 0;
371 phy_dev->duplex = 0;
b0ac9564 372 phy_dev->advertising &= phy_dev->supported;
e4f2379d 373
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374 priv->last_rx_bd = 0;
375
e4f2379d 376 /* Allocate and set buffers for Rx BD's */
e4f2379d 377 for (i = 0; i < RX_BD_NUM; i++) {
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378 dma_addr_t addr;
379 unsigned int *last_rx_bd = &priv->last_rx_bd;
380 struct arc_emac_bd *rxbd = &priv->rxbd[*last_rx_bd];
381 struct buffer_state *rx_buff = &priv->rx_buff[*last_rx_bd];
382
383 rx_buff->skb = netdev_alloc_skb_ip_align(ndev,
384 EMAC_BUFFER_SIZE);
385 if (unlikely(!rx_buff->skb))
386 return -ENOMEM;
387
388 addr = dma_map_single(&ndev->dev, (void *)rx_buff->skb->data,
389 EMAC_BUFFER_SIZE, DMA_FROM_DEVICE);
390 if (dma_mapping_error(&ndev->dev, addr)) {
391 netdev_err(ndev, "cannot dma map\n");
392 dev_kfree_skb(rx_buff->skb);
e4f2379d 393 return -ENOMEM;
a4a1139b
AB
394 }
395 dma_unmap_addr_set(rx_buff, addr, addr);
396 dma_unmap_len_set(rx_buff, len, EMAC_BUFFER_SIZE);
e4f2379d 397
a4a1139b 398 rxbd->data = cpu_to_le32(addr);
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399
400 /* Make sure pointer to data buffer is set */
401 wmb();
402
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403 /* Return ownership to EMAC */
404 rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
e4f2379d 405
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406 *last_rx_bd = (*last_rx_bd + 1) % RX_BD_NUM;
407 }
e4f2379d 408
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409 priv->txbd_curr = 0;
410 priv->txbd_dirty = 0;
411
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412 /* Clean Tx BD's */
413 memset(priv->txbd, 0, TX_RING_SZ);
414
415 /* Initialize logical address filter */
416 arc_reg_set(priv, R_LAFL, 0);
417 arc_reg_set(priv, R_LAFH, 0);
418
419 /* Set BD ring pointers for device side */
420 arc_reg_set(priv, R_RX_RING, (unsigned int)priv->rxbd_dma);
421 arc_reg_set(priv, R_TX_RING, (unsigned int)priv->txbd_dma);
422
423 /* Enable interrupts */
7ce7679d 424 arc_reg_set(priv, R_ENABLE, RXINT_MASK | TXINT_MASK | ERR_MASK);
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425
426 /* Set CONTROL */
427 arc_reg_set(priv, R_CTRL,
663713eb
CW
428 (RX_BD_NUM << 24) | /* RX BD table length */
429 (TX_BD_NUM << 16) | /* TX BD table length */
430 TXRN_MASK | RXRN_MASK);
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431
432 napi_enable(&priv->napi);
433
434 /* Enable EMAC */
435 arc_reg_or(priv, R_CTRL, EN_MASK);
436
01dea536 437 phy_start_aneg(ndev->phydev);
e4f2379d
AB
438
439 netif_start_queue(ndev);
440
441 return 0;
442}
443
775dd682
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444/**
445 * arc_emac_set_rx_mode - Change the receive filtering mode.
446 * @ndev: Pointer to the network device.
447 *
448 * This function enables/disables promiscuous or all-multicast mode
449 * and updates the multicast filtering list of the network device.
450 */
451static void arc_emac_set_rx_mode(struct net_device *ndev)
452{
453 struct arc_emac_priv *priv = netdev_priv(ndev);
454
455 if (ndev->flags & IFF_PROMISC) {
456 arc_reg_or(priv, R_CTRL, PROM_MASK);
457 } else {
458 arc_reg_clr(priv, R_CTRL, PROM_MASK);
459
460 if (ndev->flags & IFF_ALLMULTI) {
461 arc_reg_set(priv, R_LAFL, ~0);
462 arc_reg_set(priv, R_LAFH, ~0);
463 } else {
464 struct netdev_hw_addr *ha;
465 unsigned int filter[2] = { 0, 0 };
466 int bit;
467
468 netdev_for_each_mc_addr(ha, ndev) {
469 bit = ether_crc_le(ETH_ALEN, ha->addr) >> 26;
470 filter[bit >> 5] |= 1 << (bit & 31);
471 }
472
473 arc_reg_set(priv, R_LAFL, filter[0]);
474 arc_reg_set(priv, R_LAFH, filter[1]);
475 }
476 }
477}
478
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479/**
480 * arc_free_tx_queue - free skb from tx queue
481 * @ndev: Pointer to the network device.
482 *
483 * This function must be called while EMAC disable
484 */
485static void arc_free_tx_queue(struct net_device *ndev)
486{
487 struct arc_emac_priv *priv = netdev_priv(ndev);
488 unsigned int i;
489
490 for (i = 0; i < TX_BD_NUM; i++) {
491 struct arc_emac_bd *txbd = &priv->txbd[i];
492 struct buffer_state *tx_buff = &priv->tx_buff[i];
493
494 if (tx_buff->skb) {
663713eb
CW
495 dma_unmap_single(&ndev->dev,
496 dma_unmap_addr(tx_buff, addr),
497 dma_unmap_len(tx_buff, len),
498 DMA_TO_DEVICE);
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499
500 /* return the sk_buff to system */
501 dev_kfree_skb_irq(tx_buff->skb);
502 }
503
504 txbd->info = 0;
505 txbd->data = 0;
506 tx_buff->skb = NULL;
507 }
508}
509
510/**
511 * arc_free_rx_queue - free skb from rx queue
512 * @ndev: Pointer to the network device.
513 *
514 * This function must be called while EMAC disable
515 */
516static void arc_free_rx_queue(struct net_device *ndev)
517{
518 struct arc_emac_priv *priv = netdev_priv(ndev);
519 unsigned int i;
520
521 for (i = 0; i < RX_BD_NUM; i++) {
522 struct arc_emac_bd *rxbd = &priv->rxbd[i];
523 struct buffer_state *rx_buff = &priv->rx_buff[i];
524
525 if (rx_buff->skb) {
663713eb
CW
526 dma_unmap_single(&ndev->dev,
527 dma_unmap_addr(rx_buff, addr),
528 dma_unmap_len(rx_buff, len),
529 DMA_FROM_DEVICE);
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530
531 /* return the sk_buff to system */
532 dev_kfree_skb_irq(rx_buff->skb);
533 }
534
535 rxbd->info = 0;
536 rxbd->data = 0;
537 rx_buff->skb = NULL;
538 }
539}
540
e4f2379d
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541/**
542 * arc_emac_stop - Close the network device.
543 * @ndev: Pointer to the network device.
544 *
545 * This function stops the Tx queue, disables interrupts and frees the IRQ for
546 * the EMAC device.
547 * It also disconnects the PHY device associated with the EMAC device.
548 */
549static int arc_emac_stop(struct net_device *ndev)
550{
551 struct arc_emac_priv *priv = netdev_priv(ndev);
552
553 napi_disable(&priv->napi);
554 netif_stop_queue(ndev);
555
556 /* Disable interrupts */
7ce7679d 557 arc_reg_clr(priv, R_ENABLE, RXINT_MASK | TXINT_MASK | ERR_MASK);
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558
559 /* Disable EMAC */
560 arc_reg_clr(priv, R_CTRL, EN_MASK);
561
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562 /* Return the sk_buff to system */
563 arc_free_tx_queue(ndev);
564 arc_free_rx_queue(ndev);
565
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566 return 0;
567}
568
569/**
570 * arc_emac_stats - Get system network statistics.
571 * @ndev: Pointer to net_device structure.
572 *
573 * Returns the address of the device statistics structure.
574 * Statistics are updated in interrupt handler.
575 */
576static struct net_device_stats *arc_emac_stats(struct net_device *ndev)
577{
578 struct arc_emac_priv *priv = netdev_priv(ndev);
ff458f6f 579 struct net_device_stats *stats = &ndev->stats;
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580 unsigned long miss, rxerr;
581 u8 rxcrc, rxfram, rxoflow;
582
583 rxerr = arc_reg_get(priv, R_RXERR);
584 miss = arc_reg_get(priv, R_MISS);
585
586 rxcrc = rxerr;
587 rxfram = rxerr >> 8;
588 rxoflow = rxerr >> 16;
589
590 stats->rx_errors += miss;
591 stats->rx_errors += rxcrc + rxfram + rxoflow;
592
593 stats->rx_over_errors += rxoflow;
594 stats->rx_frame_errors += rxfram;
595 stats->rx_crc_errors += rxcrc;
596 stats->rx_missed_errors += miss;
597
598 return stats;
599}
600
601/**
602 * arc_emac_tx - Starts the data transmission.
603 * @skb: sk_buff pointer that contains data to be Transmitted.
604 * @ndev: Pointer to net_device structure.
605 *
606 * returns: NETDEV_TX_OK, on success
607 * NETDEV_TX_BUSY, if any of the descriptors are not free.
608 *
609 * This function is invoked from upper layers to initiate transmission.
610 */
611static int arc_emac_tx(struct sk_buff *skb, struct net_device *ndev)
612{
613 struct arc_emac_priv *priv = netdev_priv(ndev);
614 unsigned int len, *txbd_curr = &priv->txbd_curr;
ff458f6f 615 struct net_device_stats *stats = &ndev->stats;
e4f2379d
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616 __le32 *info = &priv->txbd[*txbd_curr].info;
617 dma_addr_t addr;
618
619 if (skb_padto(skb, ETH_ZLEN))
620 return NETDEV_TX_OK;
621
622 len = max_t(unsigned int, ETH_ZLEN, skb->len);
623
74dd40bc 624 if (unlikely(!arc_emac_tx_avail(priv))) {
e4f2379d 625 netif_stop_queue(ndev);
74dd40bc 626 netdev_err(ndev, "BUG! Tx Ring full when queue awake!\n");
e4f2379d
AB
627 return NETDEV_TX_BUSY;
628 }
629
630 addr = dma_map_single(&ndev->dev, (void *)skb->data, len,
631 DMA_TO_DEVICE);
632
633 if (unlikely(dma_mapping_error(&ndev->dev, addr))) {
634 stats->tx_dropped++;
635 stats->tx_errors++;
636 dev_kfree_skb(skb);
637 return NETDEV_TX_OK;
638 }
a4a1139b 639 dma_unmap_addr_set(&priv->tx_buff[*txbd_curr], addr, addr);
e4f2379d
AB
640 dma_unmap_len_set(&priv->tx_buff[*txbd_curr], len, len);
641
a4a1139b 642 priv->txbd[*txbd_curr].data = cpu_to_le32(addr);
e4f2379d
AB
643
644 /* Make sure pointer to data buffer is set */
645 wmb();
646
37ec274e
ED
647 skb_tx_timestamp(skb);
648
e4f2379d
AB
649 *info = cpu_to_le32(FOR_EMAC | FIRST_OR_LAST_MASK | len);
650
c278c253
AK
651 /* Make sure info word is set */
652 wmb();
653
654 priv->tx_buff[*txbd_curr].skb = skb;
655
e4f2379d
AB
656 /* Increment index to point to the next BD */
657 *txbd_curr = (*txbd_curr + 1) % TX_BD_NUM;
658
74dd40bc
BG
659 /* Ensure that tx_clean() sees the new txbd_curr before
660 * checking the queue status. This prevents an unneeded wake
661 * of the queue in tx_clean().
662 */
663 smp_mb();
e4f2379d 664
74dd40bc 665 if (!arc_emac_tx_avail(priv)) {
e4f2379d 666 netif_stop_queue(ndev);
74dd40bc
BG
667 /* Refresh tx_dirty */
668 smp_mb();
669 if (arc_emac_tx_avail(priv))
670 netif_start_queue(ndev);
671 }
e4f2379d
AB
672
673 arc_reg_set(priv, R_STATUS, TXPL_MASK);
674
e4f2379d
AB
675 return NETDEV_TX_OK;
676}
677
235a251a
MS
678static void arc_emac_set_address_internal(struct net_device *ndev)
679{
680 struct arc_emac_priv *priv = netdev_priv(ndev);
681 unsigned int addr_low, addr_hi;
682
663713eb
CW
683 addr_low = le32_to_cpu(*(__le32 *)&ndev->dev_addr[0]);
684 addr_hi = le16_to_cpu(*(__le16 *)&ndev->dev_addr[4]);
235a251a
MS
685
686 arc_reg_set(priv, R_ADDRL, addr_low);
687 arc_reg_set(priv, R_ADDRH, addr_hi);
688}
689
e4f2379d
AB
690/**
691 * arc_emac_set_address - Set the MAC address for this device.
692 * @ndev: Pointer to net_device structure.
693 * @p: 6 byte Address to be written as MAC address.
694 *
695 * This function copies the HW address from the sockaddr structure to the
696 * net_device structure and updates the address in HW.
697 *
698 * returns: -EBUSY if the net device is busy or 0 if the address is set
699 * successfully.
700 */
701static int arc_emac_set_address(struct net_device *ndev, void *p)
702{
e4f2379d 703 struct sockaddr *addr = p;
e4f2379d
AB
704
705 if (netif_running(ndev))
706 return -EBUSY;
707
708 if (!is_valid_ether_addr(addr->sa_data))
709 return -EADDRNOTAVAIL;
710
711 memcpy(ndev->dev_addr, addr->sa_data, ndev->addr_len);
712
235a251a 713 arc_emac_set_address_internal(ndev);
e4f2379d
AB
714
715 return 0;
716}
717
718static const struct net_device_ops arc_emac_netdev_ops = {
719 .ndo_open = arc_emac_open,
720 .ndo_stop = arc_emac_stop,
721 .ndo_start_xmit = arc_emac_tx,
722 .ndo_set_mac_address = arc_emac_set_address,
723 .ndo_get_stats = arc_emac_stats,
775dd682 724 .ndo_set_rx_mode = arc_emac_set_rx_mode,
5a45e57a
BG
725#ifdef CONFIG_NET_POLL_CONTROLLER
726 .ndo_poll_controller = arc_emac_poll_controller,
727#endif
e4f2379d
AB
728};
729
23d2d9a6 730int arc_emac_probe(struct net_device *ndev, int interface)
e4f2379d 731{
23d2d9a6 732 struct device *dev = ndev->dev.parent;
f7578496 733 struct resource res_regs;
e4f2379d 734 struct device_node *phy_node;
01dea536 735 struct phy_device *phydev = NULL;
e4f2379d 736 struct arc_emac_priv *priv;
e4f2379d 737 const char *mac_addr;
f7578496 738 unsigned int id, clock_frequency, irq;
e4f2379d
AB
739 int err;
740
e4f2379d 741 /* Get PHY from device tree */
f15f44e0 742 phy_node = of_parse_phandle(dev->of_node, "phy", 0);
e4f2379d 743 if (!phy_node) {
f15f44e0 744 dev_err(dev, "failed to retrieve phy description from device tree\n");
e4f2379d
AB
745 return -ENODEV;
746 }
747
748 /* Get EMAC registers base address from device tree */
f15f44e0 749 err = of_address_to_resource(dev->of_node, 0, &res_regs);
e4f2379d 750 if (err) {
f15f44e0 751 dev_err(dev, "failed to retrieve registers base from device tree\n");
a94efbd7
PC
752 err = -ENODEV;
753 goto out_put_node;
e4f2379d
AB
754 }
755
e4f2379d 756 /* Get IRQ from device tree */
f15f44e0 757 irq = irq_of_parse_and_map(dev->of_node, 0);
f7578496 758 if (!irq) {
f15f44e0 759 dev_err(dev, "failed to retrieve <irq> value from device tree\n");
a94efbd7
PC
760 err = -ENODEV;
761 goto out_put_node;
e4f2379d
AB
762 }
763
e4f2379d
AB
764 ndev->netdev_ops = &arc_emac_netdev_ops;
765 ndev->ethtool_ops = &arc_emac_ethtool_ops;
766 ndev->watchdog_timeo = TX_TIMEOUT;
767 /* FIXME :: no multicast support yet */
768 ndev->flags &= ~IFF_MULTICAST;
769
770 priv = netdev_priv(ndev);
f15f44e0 771 priv->dev = dev;
e4f2379d 772
f15f44e0 773 priv->regs = devm_ioremap_resource(dev, &res_regs);
54447f1a
WY
774 if (IS_ERR(priv->regs)) {
775 err = PTR_ERR(priv->regs);
776 goto out_put_node;
777 }
663713eb 778
f15f44e0 779 dev_dbg(dev, "Registers base address is 0x%p\n", priv->regs);
e4f2379d 780
23d2d9a6 781 if (priv->clk) {
88154c96
HS
782 err = clk_prepare_enable(priv->clk);
783 if (err) {
f15f44e0 784 dev_err(dev, "failed to enable clock\n");
a94efbd7 785 goto out_put_node;
88154c96
HS
786 }
787
788 clock_frequency = clk_get_rate(priv->clk);
23d2d9a6
RP
789 } else {
790 /* Get CPU clock frequency from device tree */
791 if (of_property_read_u32(dev->of_node, "clock-frequency",
792 &clock_frequency)) {
793 dev_err(dev, "failed to retrieve <clock-frequency> from device tree\n");
a94efbd7
PC
794 err = -EINVAL;
795 goto out_put_node;
23d2d9a6 796 }
88154c96
HS
797 }
798
e4f2379d
AB
799 id = arc_reg_get(priv, R_ID);
800
801 /* Check for EMAC revision 5 or 7, magic number */
802 if (!(id == 0x0005fd02 || id == 0x0007fd02)) {
f15f44e0 803 dev_err(dev, "ARC EMAC not detected, id=0x%x\n", id);
e4f2379d 804 err = -ENODEV;
88154c96 805 goto out_clken;
e4f2379d 806 }
f15f44e0 807 dev_info(dev, "ARC EMAC detected with id: 0x%x\n", id);
e4f2379d
AB
808
809 /* Set poll rate so that it polls every 1 ms */
810 arc_reg_set(priv, R_POLLRATE, clock_frequency / 1000000);
811
f7578496 812 ndev->irq = irq;
f15f44e0 813 dev_info(dev, "IRQ is %d\n", ndev->irq);
e4f2379d
AB
814
815 /* Register interrupt handler for device */
f15f44e0 816 err = devm_request_irq(dev, ndev->irq, arc_emac_intr, 0,
e4f2379d
AB
817 ndev->name, ndev);
818 if (err) {
f15f44e0 819 dev_err(dev, "could not allocate IRQ\n");
88154c96 820 goto out_clken;
e4f2379d
AB
821 }
822
823 /* Get MAC address from device tree */
f15f44e0 824 mac_addr = of_get_mac_address(dev->of_node);
e4f2379d 825
99470819 826 if (mac_addr)
e4f2379d 827 memcpy(ndev->dev_addr, mac_addr, ETH_ALEN);
99470819
LP
828 else
829 eth_hw_addr_random(ndev);
e4f2379d 830
235a251a 831 arc_emac_set_address_internal(ndev);
f15f44e0 832 dev_info(dev, "MAC address is now %pM\n", ndev->dev_addr);
e4f2379d
AB
833
834 /* Do 1 allocation instead of 2 separate ones for Rx and Tx BD rings */
f15f44e0 835 priv->rxbd = dmam_alloc_coherent(dev, RX_RING_SZ + TX_RING_SZ,
e4f2379d
AB
836 &priv->rxbd_dma, GFP_KERNEL);
837
838 if (!priv->rxbd) {
f15f44e0 839 dev_err(dev, "failed to allocate data buffers\n");
e4f2379d 840 err = -ENOMEM;
88154c96 841 goto out_clken;
e4f2379d
AB
842 }
843
844 priv->txbd = priv->rxbd + RX_BD_NUM;
845
846 priv->txbd_dma = priv->rxbd_dma + RX_RING_SZ;
f15f44e0 847 dev_dbg(dev, "EMAC Device addr: Rx Ring [0x%x], Tx Ring[%x]\n",
e4f2379d
AB
848 (unsigned int)priv->rxbd_dma, (unsigned int)priv->txbd_dma);
849
93e91b3d 850 err = arc_mdio_probe(priv);
e4f2379d 851 if (err) {
f15f44e0 852 dev_err(dev, "failed to probe MII bus\n");
88154c96 853 goto out_clken;
e4f2379d
AB
854 }
855
01dea536
PR
856 phydev = of_phy_connect(ndev, phy_node, arc_emac_adjust_link, 0,
857 interface);
858 if (!phydev) {
f15f44e0 859 dev_err(dev, "of_phy_connect() failed\n");
e4f2379d 860 err = -ENODEV;
796bec1e 861 goto out_mdio;
e4f2379d
AB
862 }
863
f15f44e0 864 dev_info(dev, "connected to %s phy with id 0x%x\n",
01dea536 865 phydev->drv->name, phydev->phy_id);
e4f2379d
AB
866
867 netif_napi_add(ndev, &priv->napi, arc_emac_poll, ARC_EMAC_NAPI_WEIGHT);
868
869 err = register_netdev(ndev);
870 if (err) {
f15f44e0 871 dev_err(dev, "failed to register network device\n");
796bec1e 872 goto out_netif_api;
e4f2379d
AB
873 }
874
a94efbd7 875 of_node_put(phy_node);
e4f2379d
AB
876 return 0;
877
796bec1e
HS
878out_netif_api:
879 netif_napi_del(&priv->napi);
01dea536 880 phy_disconnect(phydev);
796bec1e
HS
881out_mdio:
882 arc_mdio_remove(priv);
88154c96 883out_clken:
23d2d9a6 884 if (priv->clk)
88154c96 885 clk_disable_unprepare(priv->clk);
a94efbd7
PC
886out_put_node:
887 of_node_put(phy_node);
888
e4f2379d
AB
889 return err;
890}
23d2d9a6 891EXPORT_SYMBOL_GPL(arc_emac_probe);
e4f2379d 892
23d2d9a6 893int arc_emac_remove(struct net_device *ndev)
e4f2379d 894{
e4f2379d
AB
895 struct arc_emac_priv *priv = netdev_priv(ndev);
896
01dea536 897 phy_disconnect(ndev->phydev);
e4f2379d
AB
898 arc_mdio_remove(priv);
899 unregister_netdev(ndev);
900 netif_napi_del(&priv->napi);
88154c96 901
663713eb 902 if (!IS_ERR(priv->clk))
88154c96 903 clk_disable_unprepare(priv->clk);
e4f2379d
AB
904
905 return 0;
906}
23d2d9a6 907EXPORT_SYMBOL_GPL(arc_emac_remove);
e4f2379d
AB
908
909MODULE_AUTHOR("Alexey Brodkin <abrodkin@synopsys.com>");
910MODULE_DESCRIPTION("ARC EMAC driver");
911MODULE_LICENSE("GPL");