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[mirror_ubuntu-focal-kernel.git] / drivers / net / ethernet / arc / emac_main.c
CommitLineData
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1/*
2 * Copyright (C) 2004-2013 Synopsys, Inc. (www.synopsys.com)
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * Driver for the ARC EMAC 10100 (hardware revision 5)
9 *
10 * Contributors:
11 * Amit Bhor
12 * Sameer Dhavale
13 * Vineet Gupta
14 */
15
775dd682 16#include <linux/crc32.h>
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17#include <linux/etherdevice.h>
18#include <linux/interrupt.h>
19#include <linux/io.h>
20#include <linux/module.h>
21#include <linux/of_address.h>
22#include <linux/of_irq.h>
23#include <linux/of_mdio.h>
24#include <linux/of_net.h>
25#include <linux/of_platform.h>
26
27#include "emac.h"
28
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29static void arc_emac_restart(struct net_device *ndev);
30
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31/**
32 * arc_emac_tx_avail - Return the number of available slots in the tx ring.
33 * @priv: Pointer to ARC EMAC private data structure.
34 *
35 * returns: the number of slots available for transmission in tx the ring.
36 */
37static inline int arc_emac_tx_avail(struct arc_emac_priv *priv)
38{
39 return (priv->txbd_dirty + TX_BD_NUM - priv->txbd_curr - 1) % TX_BD_NUM;
40}
41
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42/**
43 * arc_emac_adjust_link - Adjust the PHY link duplex.
44 * @ndev: Pointer to the net_device structure.
45 *
46 * This function is called to change the duplex setting after auto negotiation
47 * is done by the PHY.
48 */
49static void arc_emac_adjust_link(struct net_device *ndev)
50{
51 struct arc_emac_priv *priv = netdev_priv(ndev);
01dea536 52 struct phy_device *phy_dev = ndev->phydev;
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53 unsigned int reg, state_changed = 0;
54
55 if (priv->link != phy_dev->link) {
56 priv->link = phy_dev->link;
57 state_changed = 1;
58 }
59
60 if (priv->speed != phy_dev->speed) {
61 priv->speed = phy_dev->speed;
62 state_changed = 1;
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63 if (priv->set_mac_speed)
64 priv->set_mac_speed(priv, priv->speed);
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65 }
66
67 if (priv->duplex != phy_dev->duplex) {
68 reg = arc_reg_get(priv, R_CTRL);
69
663713eb 70 if (phy_dev->duplex == DUPLEX_FULL)
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71 reg |= ENFL_MASK;
72 else
73 reg &= ~ENFL_MASK;
74
75 arc_reg_set(priv, R_CTRL, reg);
76 priv->duplex = phy_dev->duplex;
77 state_changed = 1;
78 }
79
80 if (state_changed)
81 phy_print_status(phy_dev);
82}
83
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84/**
85 * arc_emac_get_drvinfo - Get EMAC driver information.
86 * @ndev: Pointer to net_device structure.
87 * @info: Pointer to ethtool_drvinfo structure.
88 *
89 * This implements ethtool command for getting the driver information.
90 * Issue "ethtool -i ethX" under linux prompt to execute this function.
91 */
92static void arc_emac_get_drvinfo(struct net_device *ndev,
93 struct ethtool_drvinfo *info)
94{
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95 struct arc_emac_priv *priv = netdev_priv(ndev);
96
97 strlcpy(info->driver, priv->drv_name, sizeof(info->driver));
98 strlcpy(info->version, priv->drv_version, sizeof(info->version));
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99}
100
101static const struct ethtool_ops arc_emac_ethtool_ops = {
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102 .get_drvinfo = arc_emac_get_drvinfo,
103 .get_link = ethtool_op_get_link,
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104 .get_link_ksettings = phy_ethtool_get_link_ksettings,
105 .set_link_ksettings = phy_ethtool_set_link_ksettings,
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106};
107
108#define FIRST_OR_LAST_MASK (FIRST_MASK | LAST_MASK)
109
110/**
111 * arc_emac_tx_clean - clears processed by EMAC Tx BDs.
112 * @ndev: Pointer to the network device.
113 */
114static void arc_emac_tx_clean(struct net_device *ndev)
115{
116 struct arc_emac_priv *priv = netdev_priv(ndev);
ff458f6f 117 struct net_device_stats *stats = &ndev->stats;
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118 unsigned int i;
119
120 for (i = 0; i < TX_BD_NUM; i++) {
121 unsigned int *txbd_dirty = &priv->txbd_dirty;
122 struct arc_emac_bd *txbd = &priv->txbd[*txbd_dirty];
123 struct buffer_state *tx_buff = &priv->tx_buff[*txbd_dirty];
124 struct sk_buff *skb = tx_buff->skb;
125 unsigned int info = le32_to_cpu(txbd->info);
126
c278c253 127 if ((info & FOR_EMAC) || !txbd->data || !skb)
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128 break;
129
130 if (unlikely(info & (DROP | DEFR | LTCL | UFLO))) {
131 stats->tx_errors++;
132 stats->tx_dropped++;
133
134 if (info & DEFR)
135 stats->tx_carrier_errors++;
136
137 if (info & LTCL)
138 stats->collisions++;
139
140 if (info & UFLO)
141 stats->tx_fifo_errors++;
142 } else if (likely(info & FIRST_OR_LAST_MASK)) {
143 stats->tx_packets++;
144 stats->tx_bytes += skb->len;
145 }
146
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147 dma_unmap_single(&ndev->dev, dma_unmap_addr(tx_buff, addr),
148 dma_unmap_len(tx_buff, len), DMA_TO_DEVICE);
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149
150 /* return the sk_buff to system */
151 dev_kfree_skb_irq(skb);
152
153 txbd->data = 0;
154 txbd->info = 0;
c278c253 155 tx_buff->skb = NULL;
e4f2379d 156
27082ee1 157 *txbd_dirty = (*txbd_dirty + 1) % TX_BD_NUM;
e4f2379d 158 }
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159
160 /* Ensure that txbd_dirty is visible to tx() before checking
161 * for queue stopped.
162 */
163 smp_mb();
164
165 if (netif_queue_stopped(ndev) && arc_emac_tx_avail(priv))
166 netif_wake_queue(ndev);
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167}
168
169/**
170 * arc_emac_rx - processing of Rx packets.
171 * @ndev: Pointer to the network device.
172 * @budget: How many BDs to process on 1 call.
173 *
174 * returns: Number of processed BDs
175 *
176 * Iterate through Rx BDs and deliver received packages to upper layer.
177 */
178static int arc_emac_rx(struct net_device *ndev, int budget)
179{
180 struct arc_emac_priv *priv = netdev_priv(ndev);
181 unsigned int work_done;
182
9cff866e 183 for (work_done = 0; work_done < budget; work_done++) {
e4f2379d 184 unsigned int *last_rx_bd = &priv->last_rx_bd;
ff458f6f 185 struct net_device_stats *stats = &ndev->stats;
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186 struct buffer_state *rx_buff = &priv->rx_buff[*last_rx_bd];
187 struct arc_emac_bd *rxbd = &priv->rxbd[*last_rx_bd];
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188 unsigned int pktlen, info = le32_to_cpu(rxbd->info);
189 struct sk_buff *skb;
190 dma_addr_t addr;
191
192 if (unlikely((info & OWN_MASK) == FOR_EMAC))
193 break;
194
195 /* Make a note that we saw a packet at this BD.
196 * So next time, driver starts from this + 1
197 */
198 *last_rx_bd = (*last_rx_bd + 1) % RX_BD_NUM;
199
200 if (unlikely((info & FIRST_OR_LAST_MASK) !=
201 FIRST_OR_LAST_MASK)) {
202 /* We pre-allocate buffers of MTU size so incoming
203 * packets won't be split/chained.
204 */
205 if (net_ratelimit())
206 netdev_err(ndev, "incomplete packet received\n");
207
208 /* Return ownership to EMAC */
a4a1139b 209 rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
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210 stats->rx_errors++;
211 stats->rx_length_errors++;
212 continue;
213 }
214
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215 /* Prepare the BD for next cycle. netif_receive_skb()
216 * only if new skb was allocated and mapped to avoid holes
217 * in the RX fifo.
218 */
219 skb = netdev_alloc_skb_ip_align(ndev, EMAC_BUFFER_SIZE);
220 if (unlikely(!skb)) {
221 if (net_ratelimit())
222 netdev_err(ndev, "cannot allocate skb\n");
223 /* Return ownership to EMAC */
224 rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
e4f2379d 225 stats->rx_errors++;
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226 stats->rx_dropped++;
227 continue;
228 }
229
e688822d 230 addr = dma_map_single(&ndev->dev, (void *)skb->data,
a4a1139b 231 EMAC_BUFFER_SIZE, DMA_FROM_DEVICE);
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232 if (dma_mapping_error(&ndev->dev, addr)) {
233 if (net_ratelimit())
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234 netdev_err(ndev, "cannot map dma buffer\n");
235 dev_kfree_skb(skb);
236 /* Return ownership to EMAC */
237 rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
e4f2379d 238 stats->rx_errors++;
e688822d 239 stats->rx_dropped++;
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240 continue;
241 }
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242
243 /* unmap previosly mapped skb */
244 dma_unmap_single(&ndev->dev, dma_unmap_addr(rx_buff, addr),
245 dma_unmap_len(rx_buff, len), DMA_FROM_DEVICE);
246
247 pktlen = info & LEN_MASK;
248 stats->rx_packets++;
249 stats->rx_bytes += pktlen;
250 skb_put(rx_buff->skb, pktlen);
251 rx_buff->skb->dev = ndev;
252 rx_buff->skb->protocol = eth_type_trans(rx_buff->skb, ndev);
253
254 netif_receive_skb(rx_buff->skb);
255
256 rx_buff->skb = skb;
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257 dma_unmap_addr_set(rx_buff, addr, addr);
258 dma_unmap_len_set(rx_buff, len, EMAC_BUFFER_SIZE);
e4f2379d 259
a4a1139b 260 rxbd->data = cpu_to_le32(addr);
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261
262 /* Make sure pointer to data buffer is set */
263 wmb();
264
265 /* Return ownership to EMAC */
a4a1139b 266 rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
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267 }
268
269 return work_done;
270}
271
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272/**
273 * arc_emac_rx_miss_handle - handle R_MISS register
274 * @ndev: Pointer to the net_device structure.
275 */
276static void arc_emac_rx_miss_handle(struct net_device *ndev)
277{
278 struct arc_emac_priv *priv = netdev_priv(ndev);
279 struct net_device_stats *stats = &ndev->stats;
280 unsigned int miss;
281
282 miss = arc_reg_get(priv, R_MISS);
283 if (miss) {
284 stats->rx_errors += miss;
285 stats->rx_missed_errors += miss;
286 priv->rx_missed_errors += miss;
287 }
288}
289
290/**
291 * arc_emac_rx_stall_check - check RX stall
292 * @ndev: Pointer to the net_device structure.
293 * @budget: How many BDs requested to process on 1 call.
294 * @work_done: How many BDs processed
295 *
296 * Under certain conditions EMAC stop reception of incoming packets and
297 * continuously increment R_MISS register instead of saving data into
298 * provided buffer. This function detect that condition and restart
299 * EMAC.
300 */
301static void arc_emac_rx_stall_check(struct net_device *ndev,
302 int budget, unsigned int work_done)
303{
304 struct arc_emac_priv *priv = netdev_priv(ndev);
305 struct arc_emac_bd *rxbd;
306
307 if (work_done)
308 priv->rx_missed_errors = 0;
309
310 if (priv->rx_missed_errors && budget) {
311 rxbd = &priv->rxbd[priv->last_rx_bd];
312 if (le32_to_cpu(rxbd->info) & FOR_EMAC) {
313 arc_emac_restart(ndev);
314 priv->rx_missed_errors = 0;
315 }
316 }
317}
318
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319/**
320 * arc_emac_poll - NAPI poll handler.
321 * @napi: Pointer to napi_struct structure.
322 * @budget: How many BDs to process on 1 call.
323 *
324 * returns: Number of processed BDs
325 */
326static int arc_emac_poll(struct napi_struct *napi, int budget)
327{
328 struct net_device *ndev = napi->dev;
329 struct arc_emac_priv *priv = netdev_priv(ndev);
330 unsigned int work_done;
331
332 arc_emac_tx_clean(ndev);
78aa0975 333 arc_emac_rx_miss_handle(ndev);
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334
335 work_done = arc_emac_rx(ndev, budget);
336 if (work_done < budget) {
6ad20165 337 napi_complete_done(napi, work_done);
7ce7679d 338 arc_reg_or(priv, R_ENABLE, RXINT_MASK | TXINT_MASK);
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339 }
340
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341 arc_emac_rx_stall_check(ndev, budget, work_done);
342
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343 return work_done;
344}
345
346/**
347 * arc_emac_intr - Global interrupt handler for EMAC.
348 * @irq: irq number.
349 * @dev_instance: device instance.
350 *
351 * returns: IRQ_HANDLED for all cases.
352 *
353 * ARC EMAC has only 1 interrupt line, and depending on bits raised in
354 * STATUS register we may tell what is a reason for interrupt to fire.
355 */
356static irqreturn_t arc_emac_intr(int irq, void *dev_instance)
357{
358 struct net_device *ndev = dev_instance;
359 struct arc_emac_priv *priv = netdev_priv(ndev);
ff458f6f 360 struct net_device_stats *stats = &ndev->stats;
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361 unsigned int status;
362
363 status = arc_reg_get(priv, R_STATUS);
364 status &= ~MDIO_MASK;
365
366 /* Reset all flags except "MDIO complete" */
367 arc_reg_set(priv, R_STATUS, status);
368
7ce7679d 369 if (status & (RXINT_MASK | TXINT_MASK)) {
e4f2379d 370 if (likely(napi_schedule_prep(&priv->napi))) {
7ce7679d 371 arc_reg_clr(priv, R_ENABLE, RXINT_MASK | TXINT_MASK);
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372 __napi_schedule(&priv->napi);
373 }
374 }
375
376 if (status & ERR_MASK) {
377 /* MSER/RXCR/RXFR/RXFL interrupt fires on corresponding
378 * 8-bit error counter overrun.
379 */
380
381 if (status & MSER_MASK) {
382 stats->rx_missed_errors += 0x100;
383 stats->rx_errors += 0x100;
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384 priv->rx_missed_errors += 0x100;
385 napi_schedule(&priv->napi);
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386 }
387
388 if (status & RXCR_MASK) {
389 stats->rx_crc_errors += 0x100;
390 stats->rx_errors += 0x100;
391 }
392
393 if (status & RXFR_MASK) {
394 stats->rx_frame_errors += 0x100;
395 stats->rx_errors += 0x100;
396 }
397
398 if (status & RXFL_MASK) {
399 stats->rx_over_errors += 0x100;
400 stats->rx_errors += 0x100;
401 }
402 }
403
404 return IRQ_HANDLED;
405}
406
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407#ifdef CONFIG_NET_POLL_CONTROLLER
408static void arc_emac_poll_controller(struct net_device *dev)
409{
410 disable_irq(dev->irq);
411 arc_emac_intr(dev->irq, dev);
412 enable_irq(dev->irq);
413}
414#endif
415
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416/**
417 * arc_emac_open - Open the network device.
418 * @ndev: Pointer to the network device.
419 *
420 * returns: 0, on success or non-zero error value on failure.
421 *
422 * This function sets the MAC address, requests and enables an IRQ
423 * for the EMAC device and starts the Tx queue.
424 * It also connects to the phy device.
425 */
426static int arc_emac_open(struct net_device *ndev)
427{
428 struct arc_emac_priv *priv = netdev_priv(ndev);
01dea536 429 struct phy_device *phy_dev = ndev->phydev;
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430 int i;
431
432 phy_dev->autoneg = AUTONEG_ENABLE;
433 phy_dev->speed = 0;
434 phy_dev->duplex = 0;
b0ac9564 435 phy_dev->advertising &= phy_dev->supported;
e4f2379d 436
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437 priv->last_rx_bd = 0;
438
e4f2379d 439 /* Allocate and set buffers for Rx BD's */
e4f2379d 440 for (i = 0; i < RX_BD_NUM; i++) {
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441 dma_addr_t addr;
442 unsigned int *last_rx_bd = &priv->last_rx_bd;
443 struct arc_emac_bd *rxbd = &priv->rxbd[*last_rx_bd];
444 struct buffer_state *rx_buff = &priv->rx_buff[*last_rx_bd];
445
446 rx_buff->skb = netdev_alloc_skb_ip_align(ndev,
447 EMAC_BUFFER_SIZE);
448 if (unlikely(!rx_buff->skb))
449 return -ENOMEM;
450
451 addr = dma_map_single(&ndev->dev, (void *)rx_buff->skb->data,
452 EMAC_BUFFER_SIZE, DMA_FROM_DEVICE);
453 if (dma_mapping_error(&ndev->dev, addr)) {
454 netdev_err(ndev, "cannot dma map\n");
455 dev_kfree_skb(rx_buff->skb);
e4f2379d 456 return -ENOMEM;
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457 }
458 dma_unmap_addr_set(rx_buff, addr, addr);
459 dma_unmap_len_set(rx_buff, len, EMAC_BUFFER_SIZE);
e4f2379d 460
a4a1139b 461 rxbd->data = cpu_to_le32(addr);
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462
463 /* Make sure pointer to data buffer is set */
464 wmb();
465
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466 /* Return ownership to EMAC */
467 rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
e4f2379d 468
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469 *last_rx_bd = (*last_rx_bd + 1) % RX_BD_NUM;
470 }
e4f2379d 471
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472 priv->txbd_curr = 0;
473 priv->txbd_dirty = 0;
474
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475 /* Clean Tx BD's */
476 memset(priv->txbd, 0, TX_RING_SZ);
477
478 /* Initialize logical address filter */
479 arc_reg_set(priv, R_LAFL, 0);
480 arc_reg_set(priv, R_LAFH, 0);
481
482 /* Set BD ring pointers for device side */
483 arc_reg_set(priv, R_RX_RING, (unsigned int)priv->rxbd_dma);
484 arc_reg_set(priv, R_TX_RING, (unsigned int)priv->txbd_dma);
485
486 /* Enable interrupts */
7ce7679d 487 arc_reg_set(priv, R_ENABLE, RXINT_MASK | TXINT_MASK | ERR_MASK);
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488
489 /* Set CONTROL */
490 arc_reg_set(priv, R_CTRL,
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491 (RX_BD_NUM << 24) | /* RX BD table length */
492 (TX_BD_NUM << 16) | /* TX BD table length */
493 TXRN_MASK | RXRN_MASK);
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494
495 napi_enable(&priv->napi);
496
497 /* Enable EMAC */
498 arc_reg_or(priv, R_CTRL, EN_MASK);
499
b18b7453 500 phy_start(ndev->phydev);
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501
502 netif_start_queue(ndev);
503
504 return 0;
505}
506
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507/**
508 * arc_emac_set_rx_mode - Change the receive filtering mode.
509 * @ndev: Pointer to the network device.
510 *
511 * This function enables/disables promiscuous or all-multicast mode
512 * and updates the multicast filtering list of the network device.
513 */
514static void arc_emac_set_rx_mode(struct net_device *ndev)
515{
516 struct arc_emac_priv *priv = netdev_priv(ndev);
517
518 if (ndev->flags & IFF_PROMISC) {
519 arc_reg_or(priv, R_CTRL, PROM_MASK);
520 } else {
521 arc_reg_clr(priv, R_CTRL, PROM_MASK);
522
523 if (ndev->flags & IFF_ALLMULTI) {
524 arc_reg_set(priv, R_LAFL, ~0);
525 arc_reg_set(priv, R_LAFH, ~0);
d0e3f65b 526 } else if (ndev->flags & IFF_MULTICAST) {
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527 struct netdev_hw_addr *ha;
528 unsigned int filter[2] = { 0, 0 };
529 int bit;
530
531 netdev_for_each_mc_addr(ha, ndev) {
532 bit = ether_crc_le(ETH_ALEN, ha->addr) >> 26;
533 filter[bit >> 5] |= 1 << (bit & 31);
534 }
535
536 arc_reg_set(priv, R_LAFL, filter[0]);
537 arc_reg_set(priv, R_LAFH, filter[1]);
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538 } else {
539 arc_reg_set(priv, R_LAFL, 0);
540 arc_reg_set(priv, R_LAFH, 0);
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541 }
542 }
543}
544
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545/**
546 * arc_free_tx_queue - free skb from tx queue
547 * @ndev: Pointer to the network device.
548 *
549 * This function must be called while EMAC disable
550 */
551static void arc_free_tx_queue(struct net_device *ndev)
552{
553 struct arc_emac_priv *priv = netdev_priv(ndev);
554 unsigned int i;
555
556 for (i = 0; i < TX_BD_NUM; i++) {
557 struct arc_emac_bd *txbd = &priv->txbd[i];
558 struct buffer_state *tx_buff = &priv->tx_buff[i];
559
560 if (tx_buff->skb) {
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561 dma_unmap_single(&ndev->dev,
562 dma_unmap_addr(tx_buff, addr),
563 dma_unmap_len(tx_buff, len),
564 DMA_TO_DEVICE);
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565
566 /* return the sk_buff to system */
567 dev_kfree_skb_irq(tx_buff->skb);
568 }
569
570 txbd->info = 0;
571 txbd->data = 0;
572 tx_buff->skb = NULL;
573 }
574}
575
576/**
577 * arc_free_rx_queue - free skb from rx queue
578 * @ndev: Pointer to the network device.
579 *
580 * This function must be called while EMAC disable
581 */
582static void arc_free_rx_queue(struct net_device *ndev)
583{
584 struct arc_emac_priv *priv = netdev_priv(ndev);
585 unsigned int i;
586
587 for (i = 0; i < RX_BD_NUM; i++) {
588 struct arc_emac_bd *rxbd = &priv->rxbd[i];
589 struct buffer_state *rx_buff = &priv->rx_buff[i];
590
591 if (rx_buff->skb) {
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592 dma_unmap_single(&ndev->dev,
593 dma_unmap_addr(rx_buff, addr),
594 dma_unmap_len(rx_buff, len),
595 DMA_FROM_DEVICE);
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596
597 /* return the sk_buff to system */
598 dev_kfree_skb_irq(rx_buff->skb);
599 }
600
601 rxbd->info = 0;
602 rxbd->data = 0;
603 rx_buff->skb = NULL;
604 }
605}
606
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607/**
608 * arc_emac_stop - Close the network device.
609 * @ndev: Pointer to the network device.
610 *
611 * This function stops the Tx queue, disables interrupts and frees the IRQ for
612 * the EMAC device.
613 * It also disconnects the PHY device associated with the EMAC device.
614 */
615static int arc_emac_stop(struct net_device *ndev)
616{
617 struct arc_emac_priv *priv = netdev_priv(ndev);
618
619 napi_disable(&priv->napi);
620 netif_stop_queue(ndev);
621
b18b7453
AK
622 phy_stop(ndev->phydev);
623
e4f2379d 624 /* Disable interrupts */
7ce7679d 625 arc_reg_clr(priv, R_ENABLE, RXINT_MASK | TXINT_MASK | ERR_MASK);
e4f2379d
AB
626
627 /* Disable EMAC */
628 arc_reg_clr(priv, R_CTRL, EN_MASK);
629
b530b164
AK
630 /* Return the sk_buff to system */
631 arc_free_tx_queue(ndev);
632 arc_free_rx_queue(ndev);
633
e4f2379d
AB
634 return 0;
635}
636
637/**
638 * arc_emac_stats - Get system network statistics.
639 * @ndev: Pointer to net_device structure.
640 *
641 * Returns the address of the device statistics structure.
642 * Statistics are updated in interrupt handler.
643 */
644static struct net_device_stats *arc_emac_stats(struct net_device *ndev)
645{
646 struct arc_emac_priv *priv = netdev_priv(ndev);
ff458f6f 647 struct net_device_stats *stats = &ndev->stats;
e4f2379d
AB
648 unsigned long miss, rxerr;
649 u8 rxcrc, rxfram, rxoflow;
650
651 rxerr = arc_reg_get(priv, R_RXERR);
652 miss = arc_reg_get(priv, R_MISS);
653
654 rxcrc = rxerr;
655 rxfram = rxerr >> 8;
656 rxoflow = rxerr >> 16;
657
658 stats->rx_errors += miss;
659 stats->rx_errors += rxcrc + rxfram + rxoflow;
660
661 stats->rx_over_errors += rxoflow;
662 stats->rx_frame_errors += rxfram;
663 stats->rx_crc_errors += rxcrc;
664 stats->rx_missed_errors += miss;
665
666 return stats;
667}
668
669/**
670 * arc_emac_tx - Starts the data transmission.
671 * @skb: sk_buff pointer that contains data to be Transmitted.
672 * @ndev: Pointer to net_device structure.
673 *
674 * returns: NETDEV_TX_OK, on success
675 * NETDEV_TX_BUSY, if any of the descriptors are not free.
676 *
677 * This function is invoked from upper layers to initiate transmission.
678 */
679static int arc_emac_tx(struct sk_buff *skb, struct net_device *ndev)
680{
681 struct arc_emac_priv *priv = netdev_priv(ndev);
682 unsigned int len, *txbd_curr = &priv->txbd_curr;
ff458f6f 683 struct net_device_stats *stats = &ndev->stats;
e4f2379d
AB
684 __le32 *info = &priv->txbd[*txbd_curr].info;
685 dma_addr_t addr;
686
687 if (skb_padto(skb, ETH_ZLEN))
688 return NETDEV_TX_OK;
689
690 len = max_t(unsigned int, ETH_ZLEN, skb->len);
691
74dd40bc 692 if (unlikely(!arc_emac_tx_avail(priv))) {
e4f2379d 693 netif_stop_queue(ndev);
74dd40bc 694 netdev_err(ndev, "BUG! Tx Ring full when queue awake!\n");
e4f2379d
AB
695 return NETDEV_TX_BUSY;
696 }
697
698 addr = dma_map_single(&ndev->dev, (void *)skb->data, len,
699 DMA_TO_DEVICE);
700
701 if (unlikely(dma_mapping_error(&ndev->dev, addr))) {
702 stats->tx_dropped++;
703 stats->tx_errors++;
0f6e8761 704 dev_kfree_skb_any(skb);
e4f2379d
AB
705 return NETDEV_TX_OK;
706 }
a4a1139b 707 dma_unmap_addr_set(&priv->tx_buff[*txbd_curr], addr, addr);
e4f2379d
AB
708 dma_unmap_len_set(&priv->tx_buff[*txbd_curr], len, len);
709
a4a1139b 710 priv->txbd[*txbd_curr].data = cpu_to_le32(addr);
e4f2379d
AB
711
712 /* Make sure pointer to data buffer is set */
713 wmb();
714
37ec274e
ED
715 skb_tx_timestamp(skb);
716
e4f2379d
AB
717 *info = cpu_to_le32(FOR_EMAC | FIRST_OR_LAST_MASK | len);
718
c278c253
AK
719 /* Make sure info word is set */
720 wmb();
721
722 priv->tx_buff[*txbd_curr].skb = skb;
723
e4f2379d
AB
724 /* Increment index to point to the next BD */
725 *txbd_curr = (*txbd_curr + 1) % TX_BD_NUM;
726
74dd40bc
BG
727 /* Ensure that tx_clean() sees the new txbd_curr before
728 * checking the queue status. This prevents an unneeded wake
729 * of the queue in tx_clean().
730 */
731 smp_mb();
e4f2379d 732
74dd40bc 733 if (!arc_emac_tx_avail(priv)) {
e4f2379d 734 netif_stop_queue(ndev);
74dd40bc
BG
735 /* Refresh tx_dirty */
736 smp_mb();
737 if (arc_emac_tx_avail(priv))
738 netif_start_queue(ndev);
739 }
e4f2379d
AB
740
741 arc_reg_set(priv, R_STATUS, TXPL_MASK);
742
e4f2379d
AB
743 return NETDEV_TX_OK;
744}
745
235a251a
MS
746static void arc_emac_set_address_internal(struct net_device *ndev)
747{
748 struct arc_emac_priv *priv = netdev_priv(ndev);
749 unsigned int addr_low, addr_hi;
750
663713eb
CW
751 addr_low = le32_to_cpu(*(__le32 *)&ndev->dev_addr[0]);
752 addr_hi = le16_to_cpu(*(__le16 *)&ndev->dev_addr[4]);
235a251a
MS
753
754 arc_reg_set(priv, R_ADDRL, addr_low);
755 arc_reg_set(priv, R_ADDRH, addr_hi);
756}
757
e4f2379d
AB
758/**
759 * arc_emac_set_address - Set the MAC address for this device.
760 * @ndev: Pointer to net_device structure.
761 * @p: 6 byte Address to be written as MAC address.
762 *
763 * This function copies the HW address from the sockaddr structure to the
764 * net_device structure and updates the address in HW.
765 *
766 * returns: -EBUSY if the net device is busy or 0 if the address is set
767 * successfully.
768 */
769static int arc_emac_set_address(struct net_device *ndev, void *p)
770{
e4f2379d 771 struct sockaddr *addr = p;
e4f2379d
AB
772
773 if (netif_running(ndev))
774 return -EBUSY;
775
776 if (!is_valid_ether_addr(addr->sa_data))
777 return -EADDRNOTAVAIL;
778
779 memcpy(ndev->dev_addr, addr->sa_data, ndev->addr_len);
780
235a251a 781 arc_emac_set_address_internal(ndev);
e4f2379d
AB
782
783 return 0;
784}
785
e11e8729
RP
786static int arc_emac_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
787{
788 if (!netif_running(dev))
789 return -EINVAL;
790
791 if (!dev->phydev)
792 return -ENODEV;
793
794 return phy_mii_ioctl(dev->phydev, rq, cmd);
795}
796
797
78aa0975
AK
798/**
799 * arc_emac_restart - Restart EMAC
800 * @ndev: Pointer to net_device structure.
801 *
802 * This function do hardware reset of EMAC in order to restore
803 * network packets reception.
804 */
805static void arc_emac_restart(struct net_device *ndev)
806{
807 struct arc_emac_priv *priv = netdev_priv(ndev);
808 struct net_device_stats *stats = &ndev->stats;
809 int i;
810
811 if (net_ratelimit())
812 netdev_warn(ndev, "restarting stalled EMAC\n");
813
814 netif_stop_queue(ndev);
815
816 /* Disable interrupts */
817 arc_reg_clr(priv, R_ENABLE, RXINT_MASK | TXINT_MASK | ERR_MASK);
818
819 /* Disable EMAC */
820 arc_reg_clr(priv, R_CTRL, EN_MASK);
821
822 /* Return the sk_buff to system */
823 arc_free_tx_queue(ndev);
824
825 /* Clean Tx BD's */
826 priv->txbd_curr = 0;
827 priv->txbd_dirty = 0;
828 memset(priv->txbd, 0, TX_RING_SZ);
829
830 for (i = 0; i < RX_BD_NUM; i++) {
831 struct arc_emac_bd *rxbd = &priv->rxbd[i];
832 unsigned int info = le32_to_cpu(rxbd->info);
833
834 if (!(info & FOR_EMAC)) {
835 stats->rx_errors++;
836 stats->rx_dropped++;
837 }
838 /* Return ownership to EMAC */
839 rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
840 }
841 priv->last_rx_bd = 0;
842
843 /* Make sure info is visible to EMAC before enable */
844 wmb();
845
846 /* Enable interrupts */
847 arc_reg_set(priv, R_ENABLE, RXINT_MASK | TXINT_MASK | ERR_MASK);
848
849 /* Enable EMAC */
850 arc_reg_or(priv, R_CTRL, EN_MASK);
851
852 netif_start_queue(ndev);
853}
854
e4f2379d
AB
855static const struct net_device_ops arc_emac_netdev_ops = {
856 .ndo_open = arc_emac_open,
857 .ndo_stop = arc_emac_stop,
858 .ndo_start_xmit = arc_emac_tx,
859 .ndo_set_mac_address = arc_emac_set_address,
860 .ndo_get_stats = arc_emac_stats,
775dd682 861 .ndo_set_rx_mode = arc_emac_set_rx_mode,
e11e8729 862 .ndo_do_ioctl = arc_emac_ioctl,
5a45e57a
BG
863#ifdef CONFIG_NET_POLL_CONTROLLER
864 .ndo_poll_controller = arc_emac_poll_controller,
865#endif
e4f2379d
AB
866};
867
23d2d9a6 868int arc_emac_probe(struct net_device *ndev, int interface)
e4f2379d 869{
23d2d9a6 870 struct device *dev = ndev->dev.parent;
f7578496 871 struct resource res_regs;
e4f2379d 872 struct device_node *phy_node;
01dea536 873 struct phy_device *phydev = NULL;
e4f2379d 874 struct arc_emac_priv *priv;
e4f2379d 875 const char *mac_addr;
f7578496 876 unsigned int id, clock_frequency, irq;
e4f2379d
AB
877 int err;
878
e4f2379d 879 /* Get PHY from device tree */
f15f44e0 880 phy_node = of_parse_phandle(dev->of_node, "phy", 0);
e4f2379d 881 if (!phy_node) {
f15f44e0 882 dev_err(dev, "failed to retrieve phy description from device tree\n");
e4f2379d
AB
883 return -ENODEV;
884 }
885
886 /* Get EMAC registers base address from device tree */
f15f44e0 887 err = of_address_to_resource(dev->of_node, 0, &res_regs);
e4f2379d 888 if (err) {
f15f44e0 889 dev_err(dev, "failed to retrieve registers base from device tree\n");
a94efbd7
PC
890 err = -ENODEV;
891 goto out_put_node;
e4f2379d
AB
892 }
893
e4f2379d 894 /* Get IRQ from device tree */
f15f44e0 895 irq = irq_of_parse_and_map(dev->of_node, 0);
f7578496 896 if (!irq) {
f15f44e0 897 dev_err(dev, "failed to retrieve <irq> value from device tree\n");
a94efbd7
PC
898 err = -ENODEV;
899 goto out_put_node;
e4f2379d
AB
900 }
901
e4f2379d
AB
902 ndev->netdev_ops = &arc_emac_netdev_ops;
903 ndev->ethtool_ops = &arc_emac_ethtool_ops;
904 ndev->watchdog_timeo = TX_TIMEOUT;
e4f2379d
AB
905
906 priv = netdev_priv(ndev);
f15f44e0 907 priv->dev = dev;
e4f2379d 908
f15f44e0 909 priv->regs = devm_ioremap_resource(dev, &res_regs);
54447f1a
WY
910 if (IS_ERR(priv->regs)) {
911 err = PTR_ERR(priv->regs);
912 goto out_put_node;
913 }
663713eb 914
f15f44e0 915 dev_dbg(dev, "Registers base address is 0x%p\n", priv->regs);
e4f2379d 916
23d2d9a6 917 if (priv->clk) {
88154c96
HS
918 err = clk_prepare_enable(priv->clk);
919 if (err) {
f15f44e0 920 dev_err(dev, "failed to enable clock\n");
a94efbd7 921 goto out_put_node;
88154c96
HS
922 }
923
924 clock_frequency = clk_get_rate(priv->clk);
23d2d9a6
RP
925 } else {
926 /* Get CPU clock frequency from device tree */
927 if (of_property_read_u32(dev->of_node, "clock-frequency",
928 &clock_frequency)) {
929 dev_err(dev, "failed to retrieve <clock-frequency> from device tree\n");
a94efbd7
PC
930 err = -EINVAL;
931 goto out_put_node;
23d2d9a6 932 }
88154c96
HS
933 }
934
e4f2379d
AB
935 id = arc_reg_get(priv, R_ID);
936
937 /* Check for EMAC revision 5 or 7, magic number */
938 if (!(id == 0x0005fd02 || id == 0x0007fd02)) {
f15f44e0 939 dev_err(dev, "ARC EMAC not detected, id=0x%x\n", id);
e4f2379d 940 err = -ENODEV;
88154c96 941 goto out_clken;
e4f2379d 942 }
f15f44e0 943 dev_info(dev, "ARC EMAC detected with id: 0x%x\n", id);
e4f2379d
AB
944
945 /* Set poll rate so that it polls every 1 ms */
946 arc_reg_set(priv, R_POLLRATE, clock_frequency / 1000000);
947
f7578496 948 ndev->irq = irq;
f15f44e0 949 dev_info(dev, "IRQ is %d\n", ndev->irq);
e4f2379d
AB
950
951 /* Register interrupt handler for device */
f15f44e0 952 err = devm_request_irq(dev, ndev->irq, arc_emac_intr, 0,
e4f2379d
AB
953 ndev->name, ndev);
954 if (err) {
f15f44e0 955 dev_err(dev, "could not allocate IRQ\n");
88154c96 956 goto out_clken;
e4f2379d
AB
957 }
958
959 /* Get MAC address from device tree */
f15f44e0 960 mac_addr = of_get_mac_address(dev->of_node);
e4f2379d 961
99470819 962 if (mac_addr)
e4f2379d 963 memcpy(ndev->dev_addr, mac_addr, ETH_ALEN);
99470819
LP
964 else
965 eth_hw_addr_random(ndev);
e4f2379d 966
235a251a 967 arc_emac_set_address_internal(ndev);
f15f44e0 968 dev_info(dev, "MAC address is now %pM\n", ndev->dev_addr);
e4f2379d
AB
969
970 /* Do 1 allocation instead of 2 separate ones for Rx and Tx BD rings */
f15f44e0 971 priv->rxbd = dmam_alloc_coherent(dev, RX_RING_SZ + TX_RING_SZ,
e4f2379d
AB
972 &priv->rxbd_dma, GFP_KERNEL);
973
974 if (!priv->rxbd) {
f15f44e0 975 dev_err(dev, "failed to allocate data buffers\n");
e4f2379d 976 err = -ENOMEM;
88154c96 977 goto out_clken;
e4f2379d
AB
978 }
979
980 priv->txbd = priv->rxbd + RX_BD_NUM;
981
982 priv->txbd_dma = priv->rxbd_dma + RX_RING_SZ;
f15f44e0 983 dev_dbg(dev, "EMAC Device addr: Rx Ring [0x%x], Tx Ring[%x]\n",
e4f2379d
AB
984 (unsigned int)priv->rxbd_dma, (unsigned int)priv->txbd_dma);
985
93e91b3d 986 err = arc_mdio_probe(priv);
e4f2379d 987 if (err) {
f15f44e0 988 dev_err(dev, "failed to probe MII bus\n");
88154c96 989 goto out_clken;
e4f2379d
AB
990 }
991
01dea536
PR
992 phydev = of_phy_connect(ndev, phy_node, arc_emac_adjust_link, 0,
993 interface);
994 if (!phydev) {
f15f44e0 995 dev_err(dev, "of_phy_connect() failed\n");
e4f2379d 996 err = -ENODEV;
796bec1e 997 goto out_mdio;
e4f2379d
AB
998 }
999
f15f44e0 1000 dev_info(dev, "connected to %s phy with id 0x%x\n",
01dea536 1001 phydev->drv->name, phydev->phy_id);
e4f2379d
AB
1002
1003 netif_napi_add(ndev, &priv->napi, arc_emac_poll, ARC_EMAC_NAPI_WEIGHT);
1004
1005 err = register_netdev(ndev);
1006 if (err) {
f15f44e0 1007 dev_err(dev, "failed to register network device\n");
796bec1e 1008 goto out_netif_api;
e4f2379d
AB
1009 }
1010
a94efbd7 1011 of_node_put(phy_node);
e4f2379d
AB
1012 return 0;
1013
796bec1e
HS
1014out_netif_api:
1015 netif_napi_del(&priv->napi);
01dea536 1016 phy_disconnect(phydev);
796bec1e
HS
1017out_mdio:
1018 arc_mdio_remove(priv);
88154c96 1019out_clken:
23d2d9a6 1020 if (priv->clk)
88154c96 1021 clk_disable_unprepare(priv->clk);
a94efbd7
PC
1022out_put_node:
1023 of_node_put(phy_node);
1024
e4f2379d
AB
1025 return err;
1026}
23d2d9a6 1027EXPORT_SYMBOL_GPL(arc_emac_probe);
e4f2379d 1028
23d2d9a6 1029int arc_emac_remove(struct net_device *ndev)
e4f2379d 1030{
e4f2379d
AB
1031 struct arc_emac_priv *priv = netdev_priv(ndev);
1032
01dea536 1033 phy_disconnect(ndev->phydev);
e4f2379d
AB
1034 arc_mdio_remove(priv);
1035 unregister_netdev(ndev);
1036 netif_napi_del(&priv->napi);
88154c96 1037
663713eb 1038 if (!IS_ERR(priv->clk))
88154c96 1039 clk_disable_unprepare(priv->clk);
e4f2379d
AB
1040
1041 return 0;
1042}
23d2d9a6 1043EXPORT_SYMBOL_GPL(arc_emac_remove);
e4f2379d
AB
1044
1045MODULE_AUTHOR("Alexey Brodkin <abrodkin@synopsys.com>");
1046MODULE_DESCRIPTION("ARC EMAC driver");
1047MODULE_LICENSE("GPL");