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1/*
2 * Copyright (C) 2004-2013 Synopsys, Inc. (www.synopsys.com)
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * Driver for the ARC EMAC 10100 (hardware revision 5)
9 *
10 * Contributors:
11 * Amit Bhor
12 * Sameer Dhavale
13 * Vineet Gupta
14 */
15
775dd682 16#include <linux/crc32.h>
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17#include <linux/etherdevice.h>
18#include <linux/interrupt.h>
19#include <linux/io.h>
20#include <linux/module.h>
21#include <linux/of_address.h>
22#include <linux/of_irq.h>
23#include <linux/of_mdio.h>
24#include <linux/of_net.h>
25#include <linux/of_platform.h>
26
27#include "emac.h"
28
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29/**
30 * arc_emac_tx_avail - Return the number of available slots in the tx ring.
31 * @priv: Pointer to ARC EMAC private data structure.
32 *
33 * returns: the number of slots available for transmission in tx the ring.
34 */
35static inline int arc_emac_tx_avail(struct arc_emac_priv *priv)
36{
37 return (priv->txbd_dirty + TX_BD_NUM - priv->txbd_curr - 1) % TX_BD_NUM;
38}
39
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40/**
41 * arc_emac_adjust_link - Adjust the PHY link duplex.
42 * @ndev: Pointer to the net_device structure.
43 *
44 * This function is called to change the duplex setting after auto negotiation
45 * is done by the PHY.
46 */
47static void arc_emac_adjust_link(struct net_device *ndev)
48{
49 struct arc_emac_priv *priv = netdev_priv(ndev);
01dea536 50 struct phy_device *phy_dev = ndev->phydev;
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51 unsigned int reg, state_changed = 0;
52
53 if (priv->link != phy_dev->link) {
54 priv->link = phy_dev->link;
55 state_changed = 1;
56 }
57
58 if (priv->speed != phy_dev->speed) {
59 priv->speed = phy_dev->speed;
60 state_changed = 1;
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61 if (priv->set_mac_speed)
62 priv->set_mac_speed(priv, priv->speed);
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63 }
64
65 if (priv->duplex != phy_dev->duplex) {
66 reg = arc_reg_get(priv, R_CTRL);
67
663713eb 68 if (phy_dev->duplex == DUPLEX_FULL)
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69 reg |= ENFL_MASK;
70 else
71 reg &= ~ENFL_MASK;
72
73 arc_reg_set(priv, R_CTRL, reg);
74 priv->duplex = phy_dev->duplex;
75 state_changed = 1;
76 }
77
78 if (state_changed)
79 phy_print_status(phy_dev);
80}
81
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82/**
83 * arc_emac_get_drvinfo - Get EMAC driver information.
84 * @ndev: Pointer to net_device structure.
85 * @info: Pointer to ethtool_drvinfo structure.
86 *
87 * This implements ethtool command for getting the driver information.
88 * Issue "ethtool -i ethX" under linux prompt to execute this function.
89 */
90static void arc_emac_get_drvinfo(struct net_device *ndev,
91 struct ethtool_drvinfo *info)
92{
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93 struct arc_emac_priv *priv = netdev_priv(ndev);
94
95 strlcpy(info->driver, priv->drv_name, sizeof(info->driver));
96 strlcpy(info->version, priv->drv_version, sizeof(info->version));
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97}
98
99static const struct ethtool_ops arc_emac_ethtool_ops = {
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100 .get_drvinfo = arc_emac_get_drvinfo,
101 .get_link = ethtool_op_get_link,
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102 .get_link_ksettings = phy_ethtool_get_link_ksettings,
103 .set_link_ksettings = phy_ethtool_set_link_ksettings,
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104};
105
106#define FIRST_OR_LAST_MASK (FIRST_MASK | LAST_MASK)
107
108/**
109 * arc_emac_tx_clean - clears processed by EMAC Tx BDs.
110 * @ndev: Pointer to the network device.
111 */
112static void arc_emac_tx_clean(struct net_device *ndev)
113{
114 struct arc_emac_priv *priv = netdev_priv(ndev);
ff458f6f 115 struct net_device_stats *stats = &ndev->stats;
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116 unsigned int i;
117
118 for (i = 0; i < TX_BD_NUM; i++) {
119 unsigned int *txbd_dirty = &priv->txbd_dirty;
120 struct arc_emac_bd *txbd = &priv->txbd[*txbd_dirty];
121 struct buffer_state *tx_buff = &priv->tx_buff[*txbd_dirty];
122 struct sk_buff *skb = tx_buff->skb;
123 unsigned int info = le32_to_cpu(txbd->info);
124
c278c253 125 if ((info & FOR_EMAC) || !txbd->data || !skb)
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126 break;
127
128 if (unlikely(info & (DROP | DEFR | LTCL | UFLO))) {
129 stats->tx_errors++;
130 stats->tx_dropped++;
131
132 if (info & DEFR)
133 stats->tx_carrier_errors++;
134
135 if (info & LTCL)
136 stats->collisions++;
137
138 if (info & UFLO)
139 stats->tx_fifo_errors++;
140 } else if (likely(info & FIRST_OR_LAST_MASK)) {
141 stats->tx_packets++;
142 stats->tx_bytes += skb->len;
143 }
144
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145 dma_unmap_single(&ndev->dev, dma_unmap_addr(tx_buff, addr),
146 dma_unmap_len(tx_buff, len), DMA_TO_DEVICE);
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147
148 /* return the sk_buff to system */
149 dev_kfree_skb_irq(skb);
150
151 txbd->data = 0;
152 txbd->info = 0;
c278c253 153 tx_buff->skb = NULL;
e4f2379d 154
27082ee1 155 *txbd_dirty = (*txbd_dirty + 1) % TX_BD_NUM;
e4f2379d 156 }
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157
158 /* Ensure that txbd_dirty is visible to tx() before checking
159 * for queue stopped.
160 */
161 smp_mb();
162
163 if (netif_queue_stopped(ndev) && arc_emac_tx_avail(priv))
164 netif_wake_queue(ndev);
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165}
166
167/**
168 * arc_emac_rx - processing of Rx packets.
169 * @ndev: Pointer to the network device.
170 * @budget: How many BDs to process on 1 call.
171 *
172 * returns: Number of processed BDs
173 *
174 * Iterate through Rx BDs and deliver received packages to upper layer.
175 */
176static int arc_emac_rx(struct net_device *ndev, int budget)
177{
178 struct arc_emac_priv *priv = netdev_priv(ndev);
179 unsigned int work_done;
180
9cff866e 181 for (work_done = 0; work_done < budget; work_done++) {
e4f2379d 182 unsigned int *last_rx_bd = &priv->last_rx_bd;
ff458f6f 183 struct net_device_stats *stats = &ndev->stats;
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184 struct buffer_state *rx_buff = &priv->rx_buff[*last_rx_bd];
185 struct arc_emac_bd *rxbd = &priv->rxbd[*last_rx_bd];
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186 unsigned int pktlen, info = le32_to_cpu(rxbd->info);
187 struct sk_buff *skb;
188 dma_addr_t addr;
189
190 if (unlikely((info & OWN_MASK) == FOR_EMAC))
191 break;
192
193 /* Make a note that we saw a packet at this BD.
194 * So next time, driver starts from this + 1
195 */
196 *last_rx_bd = (*last_rx_bd + 1) % RX_BD_NUM;
197
198 if (unlikely((info & FIRST_OR_LAST_MASK) !=
199 FIRST_OR_LAST_MASK)) {
200 /* We pre-allocate buffers of MTU size so incoming
201 * packets won't be split/chained.
202 */
203 if (net_ratelimit())
204 netdev_err(ndev, "incomplete packet received\n");
205
206 /* Return ownership to EMAC */
a4a1139b 207 rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
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208 stats->rx_errors++;
209 stats->rx_length_errors++;
210 continue;
211 }
212
213 pktlen = info & LEN_MASK;
214 stats->rx_packets++;
215 stats->rx_bytes += pktlen;
216 skb = rx_buff->skb;
217 skb_put(skb, pktlen);
218 skb->dev = ndev;
219 skb->protocol = eth_type_trans(skb, ndev);
220
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221 dma_unmap_single(&ndev->dev, dma_unmap_addr(rx_buff, addr),
222 dma_unmap_len(rx_buff, len), DMA_FROM_DEVICE);
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223
224 /* Prepare the BD for next cycle */
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225 rx_buff->skb = netdev_alloc_skb_ip_align(ndev,
226 EMAC_BUFFER_SIZE);
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227 if (unlikely(!rx_buff->skb)) {
228 stats->rx_errors++;
229 /* Because receive_skb is below, increment rx_dropped */
230 stats->rx_dropped++;
231 continue;
232 }
233
234 /* receive_skb only if new skb was allocated to avoid holes */
235 netif_receive_skb(skb);
236
237 addr = dma_map_single(&ndev->dev, (void *)rx_buff->skb->data,
a4a1139b 238 EMAC_BUFFER_SIZE, DMA_FROM_DEVICE);
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239 if (dma_mapping_error(&ndev->dev, addr)) {
240 if (net_ratelimit())
241 netdev_err(ndev, "cannot dma map\n");
242 dev_kfree_skb(rx_buff->skb);
243 stats->rx_errors++;
244 continue;
245 }
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246 dma_unmap_addr_set(rx_buff, addr, addr);
247 dma_unmap_len_set(rx_buff, len, EMAC_BUFFER_SIZE);
e4f2379d 248
a4a1139b 249 rxbd->data = cpu_to_le32(addr);
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250
251 /* Make sure pointer to data buffer is set */
252 wmb();
253
254 /* Return ownership to EMAC */
a4a1139b 255 rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
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256 }
257
258 return work_done;
259}
260
261/**
262 * arc_emac_poll - NAPI poll handler.
263 * @napi: Pointer to napi_struct structure.
264 * @budget: How many BDs to process on 1 call.
265 *
266 * returns: Number of processed BDs
267 */
268static int arc_emac_poll(struct napi_struct *napi, int budget)
269{
270 struct net_device *ndev = napi->dev;
271 struct arc_emac_priv *priv = netdev_priv(ndev);
272 unsigned int work_done;
273
274 arc_emac_tx_clean(ndev);
275
276 work_done = arc_emac_rx(ndev, budget);
277 if (work_done < budget) {
278 napi_complete(napi);
7ce7679d 279 arc_reg_or(priv, R_ENABLE, RXINT_MASK | TXINT_MASK);
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280 }
281
282 return work_done;
283}
284
285/**
286 * arc_emac_intr - Global interrupt handler for EMAC.
287 * @irq: irq number.
288 * @dev_instance: device instance.
289 *
290 * returns: IRQ_HANDLED for all cases.
291 *
292 * ARC EMAC has only 1 interrupt line, and depending on bits raised in
293 * STATUS register we may tell what is a reason for interrupt to fire.
294 */
295static irqreturn_t arc_emac_intr(int irq, void *dev_instance)
296{
297 struct net_device *ndev = dev_instance;
298 struct arc_emac_priv *priv = netdev_priv(ndev);
ff458f6f 299 struct net_device_stats *stats = &ndev->stats;
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300 unsigned int status;
301
302 status = arc_reg_get(priv, R_STATUS);
303 status &= ~MDIO_MASK;
304
305 /* Reset all flags except "MDIO complete" */
306 arc_reg_set(priv, R_STATUS, status);
307
7ce7679d 308 if (status & (RXINT_MASK | TXINT_MASK)) {
e4f2379d 309 if (likely(napi_schedule_prep(&priv->napi))) {
7ce7679d 310 arc_reg_clr(priv, R_ENABLE, RXINT_MASK | TXINT_MASK);
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311 __napi_schedule(&priv->napi);
312 }
313 }
314
315 if (status & ERR_MASK) {
316 /* MSER/RXCR/RXFR/RXFL interrupt fires on corresponding
317 * 8-bit error counter overrun.
318 */
319
320 if (status & MSER_MASK) {
321 stats->rx_missed_errors += 0x100;
322 stats->rx_errors += 0x100;
323 }
324
325 if (status & RXCR_MASK) {
326 stats->rx_crc_errors += 0x100;
327 stats->rx_errors += 0x100;
328 }
329
330 if (status & RXFR_MASK) {
331 stats->rx_frame_errors += 0x100;
332 stats->rx_errors += 0x100;
333 }
334
335 if (status & RXFL_MASK) {
336 stats->rx_over_errors += 0x100;
337 stats->rx_errors += 0x100;
338 }
339 }
340
341 return IRQ_HANDLED;
342}
343
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344#ifdef CONFIG_NET_POLL_CONTROLLER
345static void arc_emac_poll_controller(struct net_device *dev)
346{
347 disable_irq(dev->irq);
348 arc_emac_intr(dev->irq, dev);
349 enable_irq(dev->irq);
350}
351#endif
352
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353/**
354 * arc_emac_open - Open the network device.
355 * @ndev: Pointer to the network device.
356 *
357 * returns: 0, on success or non-zero error value on failure.
358 *
359 * This function sets the MAC address, requests and enables an IRQ
360 * for the EMAC device and starts the Tx queue.
361 * It also connects to the phy device.
362 */
363static int arc_emac_open(struct net_device *ndev)
364{
365 struct arc_emac_priv *priv = netdev_priv(ndev);
01dea536 366 struct phy_device *phy_dev = ndev->phydev;
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367 int i;
368
369 phy_dev->autoneg = AUTONEG_ENABLE;
370 phy_dev->speed = 0;
371 phy_dev->duplex = 0;
b0ac9564 372 phy_dev->advertising &= phy_dev->supported;
e4f2379d 373
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374 priv->last_rx_bd = 0;
375
e4f2379d 376 /* Allocate and set buffers for Rx BD's */
e4f2379d 377 for (i = 0; i < RX_BD_NUM; i++) {
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378 dma_addr_t addr;
379 unsigned int *last_rx_bd = &priv->last_rx_bd;
380 struct arc_emac_bd *rxbd = &priv->rxbd[*last_rx_bd];
381 struct buffer_state *rx_buff = &priv->rx_buff[*last_rx_bd];
382
383 rx_buff->skb = netdev_alloc_skb_ip_align(ndev,
384 EMAC_BUFFER_SIZE);
385 if (unlikely(!rx_buff->skb))
386 return -ENOMEM;
387
388 addr = dma_map_single(&ndev->dev, (void *)rx_buff->skb->data,
389 EMAC_BUFFER_SIZE, DMA_FROM_DEVICE);
390 if (dma_mapping_error(&ndev->dev, addr)) {
391 netdev_err(ndev, "cannot dma map\n");
392 dev_kfree_skb(rx_buff->skb);
e4f2379d 393 return -ENOMEM;
a4a1139b
AB
394 }
395 dma_unmap_addr_set(rx_buff, addr, addr);
396 dma_unmap_len_set(rx_buff, len, EMAC_BUFFER_SIZE);
e4f2379d 397
a4a1139b 398 rxbd->data = cpu_to_le32(addr);
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399
400 /* Make sure pointer to data buffer is set */
401 wmb();
402
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403 /* Return ownership to EMAC */
404 rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
e4f2379d 405
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406 *last_rx_bd = (*last_rx_bd + 1) % RX_BD_NUM;
407 }
e4f2379d 408
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409 priv->txbd_curr = 0;
410 priv->txbd_dirty = 0;
411
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412 /* Clean Tx BD's */
413 memset(priv->txbd, 0, TX_RING_SZ);
414
415 /* Initialize logical address filter */
416 arc_reg_set(priv, R_LAFL, 0);
417 arc_reg_set(priv, R_LAFH, 0);
418
419 /* Set BD ring pointers for device side */
420 arc_reg_set(priv, R_RX_RING, (unsigned int)priv->rxbd_dma);
421 arc_reg_set(priv, R_TX_RING, (unsigned int)priv->txbd_dma);
422
423 /* Enable interrupts */
7ce7679d 424 arc_reg_set(priv, R_ENABLE, RXINT_MASK | TXINT_MASK | ERR_MASK);
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425
426 /* Set CONTROL */
427 arc_reg_set(priv, R_CTRL,
663713eb
CW
428 (RX_BD_NUM << 24) | /* RX BD table length */
429 (TX_BD_NUM << 16) | /* TX BD table length */
430 TXRN_MASK | RXRN_MASK);
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431
432 napi_enable(&priv->napi);
433
434 /* Enable EMAC */
435 arc_reg_or(priv, R_CTRL, EN_MASK);
436
01dea536 437 phy_start_aneg(ndev->phydev);
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AB
438
439 netif_start_queue(ndev);
440
441 return 0;
442}
443
775dd682
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444/**
445 * arc_emac_set_rx_mode - Change the receive filtering mode.
446 * @ndev: Pointer to the network device.
447 *
448 * This function enables/disables promiscuous or all-multicast mode
449 * and updates the multicast filtering list of the network device.
450 */
451static void arc_emac_set_rx_mode(struct net_device *ndev)
452{
453 struct arc_emac_priv *priv = netdev_priv(ndev);
454
455 if (ndev->flags & IFF_PROMISC) {
456 arc_reg_or(priv, R_CTRL, PROM_MASK);
457 } else {
458 arc_reg_clr(priv, R_CTRL, PROM_MASK);
459
460 if (ndev->flags & IFF_ALLMULTI) {
461 arc_reg_set(priv, R_LAFL, ~0);
462 arc_reg_set(priv, R_LAFH, ~0);
d0e3f65b 463 } else if (ndev->flags & IFF_MULTICAST) {
775dd682
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464 struct netdev_hw_addr *ha;
465 unsigned int filter[2] = { 0, 0 };
466 int bit;
467
468 netdev_for_each_mc_addr(ha, ndev) {
469 bit = ether_crc_le(ETH_ALEN, ha->addr) >> 26;
470 filter[bit >> 5] |= 1 << (bit & 31);
471 }
472
473 arc_reg_set(priv, R_LAFL, filter[0]);
474 arc_reg_set(priv, R_LAFH, filter[1]);
d0e3f65b
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475 } else {
476 arc_reg_set(priv, R_LAFL, 0);
477 arc_reg_set(priv, R_LAFH, 0);
775dd682
BG
478 }
479 }
480}
481
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482/**
483 * arc_free_tx_queue - free skb from tx queue
484 * @ndev: Pointer to the network device.
485 *
486 * This function must be called while EMAC disable
487 */
488static void arc_free_tx_queue(struct net_device *ndev)
489{
490 struct arc_emac_priv *priv = netdev_priv(ndev);
491 unsigned int i;
492
493 for (i = 0; i < TX_BD_NUM; i++) {
494 struct arc_emac_bd *txbd = &priv->txbd[i];
495 struct buffer_state *tx_buff = &priv->tx_buff[i];
496
497 if (tx_buff->skb) {
663713eb
CW
498 dma_unmap_single(&ndev->dev,
499 dma_unmap_addr(tx_buff, addr),
500 dma_unmap_len(tx_buff, len),
501 DMA_TO_DEVICE);
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502
503 /* return the sk_buff to system */
504 dev_kfree_skb_irq(tx_buff->skb);
505 }
506
507 txbd->info = 0;
508 txbd->data = 0;
509 tx_buff->skb = NULL;
510 }
511}
512
513/**
514 * arc_free_rx_queue - free skb from rx queue
515 * @ndev: Pointer to the network device.
516 *
517 * This function must be called while EMAC disable
518 */
519static void arc_free_rx_queue(struct net_device *ndev)
520{
521 struct arc_emac_priv *priv = netdev_priv(ndev);
522 unsigned int i;
523
524 for (i = 0; i < RX_BD_NUM; i++) {
525 struct arc_emac_bd *rxbd = &priv->rxbd[i];
526 struct buffer_state *rx_buff = &priv->rx_buff[i];
527
528 if (rx_buff->skb) {
663713eb
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529 dma_unmap_single(&ndev->dev,
530 dma_unmap_addr(rx_buff, addr),
531 dma_unmap_len(rx_buff, len),
532 DMA_FROM_DEVICE);
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533
534 /* return the sk_buff to system */
535 dev_kfree_skb_irq(rx_buff->skb);
536 }
537
538 rxbd->info = 0;
539 rxbd->data = 0;
540 rx_buff->skb = NULL;
541 }
542}
543
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544/**
545 * arc_emac_stop - Close the network device.
546 * @ndev: Pointer to the network device.
547 *
548 * This function stops the Tx queue, disables interrupts and frees the IRQ for
549 * the EMAC device.
550 * It also disconnects the PHY device associated with the EMAC device.
551 */
552static int arc_emac_stop(struct net_device *ndev)
553{
554 struct arc_emac_priv *priv = netdev_priv(ndev);
555
556 napi_disable(&priv->napi);
557 netif_stop_queue(ndev);
558
559 /* Disable interrupts */
7ce7679d 560 arc_reg_clr(priv, R_ENABLE, RXINT_MASK | TXINT_MASK | ERR_MASK);
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561
562 /* Disable EMAC */
563 arc_reg_clr(priv, R_CTRL, EN_MASK);
564
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565 /* Return the sk_buff to system */
566 arc_free_tx_queue(ndev);
567 arc_free_rx_queue(ndev);
568
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569 return 0;
570}
571
572/**
573 * arc_emac_stats - Get system network statistics.
574 * @ndev: Pointer to net_device structure.
575 *
576 * Returns the address of the device statistics structure.
577 * Statistics are updated in interrupt handler.
578 */
579static struct net_device_stats *arc_emac_stats(struct net_device *ndev)
580{
581 struct arc_emac_priv *priv = netdev_priv(ndev);
ff458f6f 582 struct net_device_stats *stats = &ndev->stats;
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583 unsigned long miss, rxerr;
584 u8 rxcrc, rxfram, rxoflow;
585
586 rxerr = arc_reg_get(priv, R_RXERR);
587 miss = arc_reg_get(priv, R_MISS);
588
589 rxcrc = rxerr;
590 rxfram = rxerr >> 8;
591 rxoflow = rxerr >> 16;
592
593 stats->rx_errors += miss;
594 stats->rx_errors += rxcrc + rxfram + rxoflow;
595
596 stats->rx_over_errors += rxoflow;
597 stats->rx_frame_errors += rxfram;
598 stats->rx_crc_errors += rxcrc;
599 stats->rx_missed_errors += miss;
600
601 return stats;
602}
603
604/**
605 * arc_emac_tx - Starts the data transmission.
606 * @skb: sk_buff pointer that contains data to be Transmitted.
607 * @ndev: Pointer to net_device structure.
608 *
609 * returns: NETDEV_TX_OK, on success
610 * NETDEV_TX_BUSY, if any of the descriptors are not free.
611 *
612 * This function is invoked from upper layers to initiate transmission.
613 */
614static int arc_emac_tx(struct sk_buff *skb, struct net_device *ndev)
615{
616 struct arc_emac_priv *priv = netdev_priv(ndev);
617 unsigned int len, *txbd_curr = &priv->txbd_curr;
ff458f6f 618 struct net_device_stats *stats = &ndev->stats;
e4f2379d
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619 __le32 *info = &priv->txbd[*txbd_curr].info;
620 dma_addr_t addr;
621
622 if (skb_padto(skb, ETH_ZLEN))
623 return NETDEV_TX_OK;
624
625 len = max_t(unsigned int, ETH_ZLEN, skb->len);
626
74dd40bc 627 if (unlikely(!arc_emac_tx_avail(priv))) {
e4f2379d 628 netif_stop_queue(ndev);
74dd40bc 629 netdev_err(ndev, "BUG! Tx Ring full when queue awake!\n");
e4f2379d
AB
630 return NETDEV_TX_BUSY;
631 }
632
633 addr = dma_map_single(&ndev->dev, (void *)skb->data, len,
634 DMA_TO_DEVICE);
635
636 if (unlikely(dma_mapping_error(&ndev->dev, addr))) {
637 stats->tx_dropped++;
638 stats->tx_errors++;
639 dev_kfree_skb(skb);
640 return NETDEV_TX_OK;
641 }
a4a1139b 642 dma_unmap_addr_set(&priv->tx_buff[*txbd_curr], addr, addr);
e4f2379d
AB
643 dma_unmap_len_set(&priv->tx_buff[*txbd_curr], len, len);
644
a4a1139b 645 priv->txbd[*txbd_curr].data = cpu_to_le32(addr);
e4f2379d
AB
646
647 /* Make sure pointer to data buffer is set */
648 wmb();
649
37ec274e
ED
650 skb_tx_timestamp(skb);
651
e4f2379d
AB
652 *info = cpu_to_le32(FOR_EMAC | FIRST_OR_LAST_MASK | len);
653
c278c253
AK
654 /* Make sure info word is set */
655 wmb();
656
657 priv->tx_buff[*txbd_curr].skb = skb;
658
e4f2379d
AB
659 /* Increment index to point to the next BD */
660 *txbd_curr = (*txbd_curr + 1) % TX_BD_NUM;
661
74dd40bc
BG
662 /* Ensure that tx_clean() sees the new txbd_curr before
663 * checking the queue status. This prevents an unneeded wake
664 * of the queue in tx_clean().
665 */
666 smp_mb();
e4f2379d 667
74dd40bc 668 if (!arc_emac_tx_avail(priv)) {
e4f2379d 669 netif_stop_queue(ndev);
74dd40bc
BG
670 /* Refresh tx_dirty */
671 smp_mb();
672 if (arc_emac_tx_avail(priv))
673 netif_start_queue(ndev);
674 }
e4f2379d
AB
675
676 arc_reg_set(priv, R_STATUS, TXPL_MASK);
677
e4f2379d
AB
678 return NETDEV_TX_OK;
679}
680
235a251a
MS
681static void arc_emac_set_address_internal(struct net_device *ndev)
682{
683 struct arc_emac_priv *priv = netdev_priv(ndev);
684 unsigned int addr_low, addr_hi;
685
663713eb
CW
686 addr_low = le32_to_cpu(*(__le32 *)&ndev->dev_addr[0]);
687 addr_hi = le16_to_cpu(*(__le16 *)&ndev->dev_addr[4]);
235a251a
MS
688
689 arc_reg_set(priv, R_ADDRL, addr_low);
690 arc_reg_set(priv, R_ADDRH, addr_hi);
691}
692
e4f2379d
AB
693/**
694 * arc_emac_set_address - Set the MAC address for this device.
695 * @ndev: Pointer to net_device structure.
696 * @p: 6 byte Address to be written as MAC address.
697 *
698 * This function copies the HW address from the sockaddr structure to the
699 * net_device structure and updates the address in HW.
700 *
701 * returns: -EBUSY if the net device is busy or 0 if the address is set
702 * successfully.
703 */
704static int arc_emac_set_address(struct net_device *ndev, void *p)
705{
e4f2379d 706 struct sockaddr *addr = p;
e4f2379d
AB
707
708 if (netif_running(ndev))
709 return -EBUSY;
710
711 if (!is_valid_ether_addr(addr->sa_data))
712 return -EADDRNOTAVAIL;
713
714 memcpy(ndev->dev_addr, addr->sa_data, ndev->addr_len);
715
235a251a 716 arc_emac_set_address_internal(ndev);
e4f2379d
AB
717
718 return 0;
719}
720
721static const struct net_device_ops arc_emac_netdev_ops = {
722 .ndo_open = arc_emac_open,
723 .ndo_stop = arc_emac_stop,
724 .ndo_start_xmit = arc_emac_tx,
725 .ndo_set_mac_address = arc_emac_set_address,
726 .ndo_get_stats = arc_emac_stats,
775dd682 727 .ndo_set_rx_mode = arc_emac_set_rx_mode,
5a45e57a
BG
728#ifdef CONFIG_NET_POLL_CONTROLLER
729 .ndo_poll_controller = arc_emac_poll_controller,
730#endif
e4f2379d
AB
731};
732
23d2d9a6 733int arc_emac_probe(struct net_device *ndev, int interface)
e4f2379d 734{
23d2d9a6 735 struct device *dev = ndev->dev.parent;
f7578496 736 struct resource res_regs;
e4f2379d 737 struct device_node *phy_node;
01dea536 738 struct phy_device *phydev = NULL;
e4f2379d 739 struct arc_emac_priv *priv;
e4f2379d 740 const char *mac_addr;
f7578496 741 unsigned int id, clock_frequency, irq;
e4f2379d
AB
742 int err;
743
e4f2379d 744 /* Get PHY from device tree */
f15f44e0 745 phy_node = of_parse_phandle(dev->of_node, "phy", 0);
e4f2379d 746 if (!phy_node) {
f15f44e0 747 dev_err(dev, "failed to retrieve phy description from device tree\n");
e4f2379d
AB
748 return -ENODEV;
749 }
750
751 /* Get EMAC registers base address from device tree */
f15f44e0 752 err = of_address_to_resource(dev->of_node, 0, &res_regs);
e4f2379d 753 if (err) {
f15f44e0 754 dev_err(dev, "failed to retrieve registers base from device tree\n");
a94efbd7
PC
755 err = -ENODEV;
756 goto out_put_node;
e4f2379d
AB
757 }
758
e4f2379d 759 /* Get IRQ from device tree */
f15f44e0 760 irq = irq_of_parse_and_map(dev->of_node, 0);
f7578496 761 if (!irq) {
f15f44e0 762 dev_err(dev, "failed to retrieve <irq> value from device tree\n");
a94efbd7
PC
763 err = -ENODEV;
764 goto out_put_node;
e4f2379d
AB
765 }
766
e4f2379d
AB
767 ndev->netdev_ops = &arc_emac_netdev_ops;
768 ndev->ethtool_ops = &arc_emac_ethtool_ops;
769 ndev->watchdog_timeo = TX_TIMEOUT;
e4f2379d
AB
770
771 priv = netdev_priv(ndev);
f15f44e0 772 priv->dev = dev;
e4f2379d 773
f15f44e0 774 priv->regs = devm_ioremap_resource(dev, &res_regs);
54447f1a
WY
775 if (IS_ERR(priv->regs)) {
776 err = PTR_ERR(priv->regs);
777 goto out_put_node;
778 }
663713eb 779
f15f44e0 780 dev_dbg(dev, "Registers base address is 0x%p\n", priv->regs);
e4f2379d 781
23d2d9a6 782 if (priv->clk) {
88154c96
HS
783 err = clk_prepare_enable(priv->clk);
784 if (err) {
f15f44e0 785 dev_err(dev, "failed to enable clock\n");
a94efbd7 786 goto out_put_node;
88154c96
HS
787 }
788
789 clock_frequency = clk_get_rate(priv->clk);
23d2d9a6
RP
790 } else {
791 /* Get CPU clock frequency from device tree */
792 if (of_property_read_u32(dev->of_node, "clock-frequency",
793 &clock_frequency)) {
794 dev_err(dev, "failed to retrieve <clock-frequency> from device tree\n");
a94efbd7
PC
795 err = -EINVAL;
796 goto out_put_node;
23d2d9a6 797 }
88154c96
HS
798 }
799
e4f2379d
AB
800 id = arc_reg_get(priv, R_ID);
801
802 /* Check for EMAC revision 5 or 7, magic number */
803 if (!(id == 0x0005fd02 || id == 0x0007fd02)) {
f15f44e0 804 dev_err(dev, "ARC EMAC not detected, id=0x%x\n", id);
e4f2379d 805 err = -ENODEV;
88154c96 806 goto out_clken;
e4f2379d 807 }
f15f44e0 808 dev_info(dev, "ARC EMAC detected with id: 0x%x\n", id);
e4f2379d
AB
809
810 /* Set poll rate so that it polls every 1 ms */
811 arc_reg_set(priv, R_POLLRATE, clock_frequency / 1000000);
812
f7578496 813 ndev->irq = irq;
f15f44e0 814 dev_info(dev, "IRQ is %d\n", ndev->irq);
e4f2379d
AB
815
816 /* Register interrupt handler for device */
f15f44e0 817 err = devm_request_irq(dev, ndev->irq, arc_emac_intr, 0,
e4f2379d
AB
818 ndev->name, ndev);
819 if (err) {
f15f44e0 820 dev_err(dev, "could not allocate IRQ\n");
88154c96 821 goto out_clken;
e4f2379d
AB
822 }
823
824 /* Get MAC address from device tree */
f15f44e0 825 mac_addr = of_get_mac_address(dev->of_node);
e4f2379d 826
99470819 827 if (mac_addr)
e4f2379d 828 memcpy(ndev->dev_addr, mac_addr, ETH_ALEN);
99470819
LP
829 else
830 eth_hw_addr_random(ndev);
e4f2379d 831
235a251a 832 arc_emac_set_address_internal(ndev);
f15f44e0 833 dev_info(dev, "MAC address is now %pM\n", ndev->dev_addr);
e4f2379d
AB
834
835 /* Do 1 allocation instead of 2 separate ones for Rx and Tx BD rings */
f15f44e0 836 priv->rxbd = dmam_alloc_coherent(dev, RX_RING_SZ + TX_RING_SZ,
e4f2379d
AB
837 &priv->rxbd_dma, GFP_KERNEL);
838
839 if (!priv->rxbd) {
f15f44e0 840 dev_err(dev, "failed to allocate data buffers\n");
e4f2379d 841 err = -ENOMEM;
88154c96 842 goto out_clken;
e4f2379d
AB
843 }
844
845 priv->txbd = priv->rxbd + RX_BD_NUM;
846
847 priv->txbd_dma = priv->rxbd_dma + RX_RING_SZ;
f15f44e0 848 dev_dbg(dev, "EMAC Device addr: Rx Ring [0x%x], Tx Ring[%x]\n",
e4f2379d
AB
849 (unsigned int)priv->rxbd_dma, (unsigned int)priv->txbd_dma);
850
93e91b3d 851 err = arc_mdio_probe(priv);
e4f2379d 852 if (err) {
f15f44e0 853 dev_err(dev, "failed to probe MII bus\n");
88154c96 854 goto out_clken;
e4f2379d
AB
855 }
856
01dea536
PR
857 phydev = of_phy_connect(ndev, phy_node, arc_emac_adjust_link, 0,
858 interface);
859 if (!phydev) {
f15f44e0 860 dev_err(dev, "of_phy_connect() failed\n");
e4f2379d 861 err = -ENODEV;
796bec1e 862 goto out_mdio;
e4f2379d
AB
863 }
864
f15f44e0 865 dev_info(dev, "connected to %s phy with id 0x%x\n",
01dea536 866 phydev->drv->name, phydev->phy_id);
e4f2379d
AB
867
868 netif_napi_add(ndev, &priv->napi, arc_emac_poll, ARC_EMAC_NAPI_WEIGHT);
869
870 err = register_netdev(ndev);
871 if (err) {
f15f44e0 872 dev_err(dev, "failed to register network device\n");
796bec1e 873 goto out_netif_api;
e4f2379d
AB
874 }
875
a94efbd7 876 of_node_put(phy_node);
e4f2379d
AB
877 return 0;
878
796bec1e
HS
879out_netif_api:
880 netif_napi_del(&priv->napi);
01dea536 881 phy_disconnect(phydev);
796bec1e
HS
882out_mdio:
883 arc_mdio_remove(priv);
88154c96 884out_clken:
23d2d9a6 885 if (priv->clk)
88154c96 886 clk_disable_unprepare(priv->clk);
a94efbd7
PC
887out_put_node:
888 of_node_put(phy_node);
889
e4f2379d
AB
890 return err;
891}
23d2d9a6 892EXPORT_SYMBOL_GPL(arc_emac_probe);
e4f2379d 893
23d2d9a6 894int arc_emac_remove(struct net_device *ndev)
e4f2379d 895{
e4f2379d
AB
896 struct arc_emac_priv *priv = netdev_priv(ndev);
897
01dea536 898 phy_disconnect(ndev->phydev);
e4f2379d
AB
899 arc_mdio_remove(priv);
900 unregister_netdev(ndev);
901 netif_napi_del(&priv->napi);
88154c96 902
663713eb 903 if (!IS_ERR(priv->clk))
88154c96 904 clk_disable_unprepare(priv->clk);
e4f2379d
AB
905
906 return 0;
907}
23d2d9a6 908EXPORT_SYMBOL_GPL(arc_emac_remove);
e4f2379d
AB
909
910MODULE_AUTHOR("Alexey Brodkin <abrodkin@synopsys.com>");
911MODULE_DESCRIPTION("ARC EMAC driver");
912MODULE_LICENSE("GPL");