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atl1c: remove code related to rxq 1/2/3
[mirror_ubuntu-hirsute-kernel.git] / drivers / net / ethernet / atheros / atl1c / atl1c_main.c
CommitLineData
43250ddd
JY		 1/*
2 * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved.
3 *
4 * Derived from Intel e1000 driver
5 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the Free
9 * Software Foundation; either version 2 of the License, or (at your option)
10 * any later version.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc., 59
19 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 */
21
22#include "atl1c.h"
23
8f574b35 24#define ATL1C_DRV_VERSION "1.0.1.0-NAPI"
43250ddd
JY		 25char atl1c_driver_name[] = "atl1c";
26char atl1c_driver_version[] = ATL1C_DRV_VERSION;
27#define PCI_DEVICE_ID_ATTANSIC_L2C 0x1062
28#define PCI_DEVICE_ID_ATTANSIC_L1C 0x1063
496c185c
LR		 29#define PCI_DEVICE_ID_ATHEROS_L2C_B 0x2060 /* AR8152 v1.1 Fast 10/100 */
30#define PCI_DEVICE_ID_ATHEROS_L2C_B2 0x2062 /* AR8152 v2.0 Fast 10/100 */
31#define PCI_DEVICE_ID_ATHEROS_L1D 0x1073 /* AR8151 v1.0 Gigabit 1000 */
8f574b35 32#define PCI_DEVICE_ID_ATHEROS_L1D_2_0 0x1083 /* AR8151 v2.0 Gigabit 1000 */
496c185c
LR		 33#define L2CB_V10 0xc0
34#define L2CB_V11 0xc1
35
43250ddd
JY		 36/*
37 * atl1c_pci_tbl - PCI Device ID Table
38 *
39 * Wildcard entries (PCI_ANY_ID) should come last
40 * Last entry must be all 0s
41 *
42 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
43 * Class, Class Mask, private data (not used) }
44 */
a3aa1884 45static DEFINE_PCI_DEVICE_TABLE(atl1c_pci_tbl) = {
43250ddd
JY		 46 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1C)},
47 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2C)},
496c185c
LR		 48 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B)},
49 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B2)},
50 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D)},
94dde7e4 51 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D_2_0)},
43250ddd
JY		 52 /* required last entry */
53 { 0 }
54};
55MODULE_DEVICE_TABLE(pci, atl1c_pci_tbl);
56
70c9fbd3
HX		 57MODULE_AUTHOR("Jie Yang");
58MODULE_AUTHOR("Qualcomm Atheros Inc., <nic-devel@qualcomm.com>");
59MODULE_DESCRIPTION("Qualcom Atheros 100/1000M Ethernet Network Driver");
43250ddd
JY		 60MODULE_LICENSE("GPL");
61MODULE_VERSION(ATL1C_DRV_VERSION);
62
63static int atl1c_stop_mac(struct atl1c_hw *hw);
64static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw);
65static void atl1c_enable_tx_ctrl(struct atl1c_hw *hw);
66static void atl1c_disable_l0s_l1(struct atl1c_hw *hw);
67static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup);
68static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter);
9f1fd0ef 69static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter,
43250ddd 70 int *work_done, int work_to_do);
0fb1e54e 71static int atl1c_up(struct atl1c_adapter *adapter);
72static void atl1c_down(struct atl1c_adapter *adapter);
43250ddd
JY		 73
74static const u16 atl1c_pay_load_size[] = {
75 128, 256, 512, 1024, 2048, 4096,
76};
77
43250ddd
JY		 78
79static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE |
80 NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP;
8f574b35
JY		 81static void atl1c_pcie_patch(struct atl1c_hw *hw)
82{
83 u32 data;
43250ddd 84
8f574b35
JY		 85 AT_READ_REG(hw, REG_PCIE_PHYMISC, &data);
86 data |= PCIE_PHYMISC_FORCE_RCV_DET;
87 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, data);
88
89 if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10) {
90 AT_READ_REG(hw, REG_PCIE_PHYMISC2, &data);
91
92 data &= ~(PCIE_PHYMISC2_SERDES_CDR_MASK <<
93 PCIE_PHYMISC2_SERDES_CDR_SHIFT);
94 data |= 3 << PCIE_PHYMISC2_SERDES_CDR_SHIFT;
95 data &= ~(PCIE_PHYMISC2_SERDES_TH_MASK <<
96 PCIE_PHYMISC2_SERDES_TH_SHIFT);
97 data |= 3 << PCIE_PHYMISC2_SERDES_TH_SHIFT;
98 AT_WRITE_REG(hw, REG_PCIE_PHYMISC2, data);
99 }
100}
101
102/* FIXME: no need any more ? */
43250ddd
JY		 103/*
104 * atl1c_init_pcie - init PCIE module
105 */
106static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag)
107{
108 u32 data;
109 u32 pci_cmd;
110 struct pci_dev *pdev = hw->adapter->pdev;
111
112 AT_READ_REG(hw, PCI_COMMAND, &pci_cmd);
113 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
114 pci_cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
115 PCI_COMMAND_IO);
116 AT_WRITE_REG(hw, PCI_COMMAND, pci_cmd);
117
118 /*
119 * Clear any PowerSaveing Settings
120 */
121 pci_enable_wake(pdev, PCI_D3hot, 0);
122 pci_enable_wake(pdev, PCI_D3cold, 0);
123
124 /*
125 * Mask some pcie error bits
126 */
127 AT_READ_REG(hw, REG_PCIE_UC_SEVERITY, &data);
128 data &= ~PCIE_UC_SERVRITY_DLP;
129 data &= ~PCIE_UC_SERVRITY_FCP;
130 AT_WRITE_REG(hw, REG_PCIE_UC_SEVERITY, data);
131
8f574b35
JY		 132 AT_READ_REG(hw, REG_LTSSM_ID_CTRL, &data);
133 data &= ~LTSSM_ID_EN_WRO;
134 AT_WRITE_REG(hw, REG_LTSSM_ID_CTRL, data);
135
136 atl1c_pcie_patch(hw);
43250ddd
JY		 137 if (flag & ATL1C_PCIE_L0S_L1_DISABLE)
138 atl1c_disable_l0s_l1(hw);
139 if (flag & ATL1C_PCIE_PHY_RESET)
140 AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_DEFAULT);
141 else
142 AT_WRITE_REG(hw, REG_GPHY_CTRL,
143 GPHY_CTRL_DEFAULT | GPHY_CTRL_EXT_RESET);
144
8f574b35 145 msleep(5);
43250ddd
JY		 146}
147
148/*
149 * atl1c_irq_enable - Enable default interrupt generation settings
150 * @adapter: board private structure
151 */
152static inline void atl1c_irq_enable(struct atl1c_adapter *adapter)
153{
154 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
155 AT_WRITE_REG(&adapter->hw, REG_ISR, 0x7FFFFFFF);
156 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
157 AT_WRITE_FLUSH(&adapter->hw);
158 }
159}
160
161/*
162 * atl1c_irq_disable - Mask off interrupt generation on the NIC
163 * @adapter: board private structure
164 */
165static inline void atl1c_irq_disable(struct atl1c_adapter *adapter)
166{
167 atomic_inc(&adapter->irq_sem);
168 AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
8f574b35 169 AT_WRITE_REG(&adapter->hw, REG_ISR, ISR_DIS_INT);
43250ddd
JY		 170 AT_WRITE_FLUSH(&adapter->hw);
171 synchronize_irq(adapter->pdev->irq);
172}
173
174/*
175 * atl1c_irq_reset - reset interrupt confiure on the NIC
176 * @adapter: board private structure
177 */
178static inline void atl1c_irq_reset(struct atl1c_adapter *adapter)
179{
180 atomic_set(&adapter->irq_sem, 1);
181 atl1c_irq_enable(adapter);
182}
183
c930a662
JP		 184/*
185 * atl1c_wait_until_idle - wait up to AT_HW_MAX_IDLE_DELAY reads
186 * of the idle status register until the device is actually idle
187 */
188static u32 atl1c_wait_until_idle(struct atl1c_hw *hw)
189{
190 int timeout;
191 u32 data;
192
193 for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) {
194 AT_READ_REG(hw, REG_IDLE_STATUS, &data);
195 if ((data & IDLE_STATUS_MASK) == 0)
196 return 0;
197 msleep(1);
198 }
199 return data;
200}
201
43250ddd
JY		 202/*
203 * atl1c_phy_config - Timer Call-back
204 * @data: pointer to netdev cast into an unsigned long
205 */
206static void atl1c_phy_config(unsigned long data)
207{
208 struct atl1c_adapter *adapter = (struct atl1c_adapter *) data;
209 struct atl1c_hw *hw = &adapter->hw;
210 unsigned long flags;
211
212 spin_lock_irqsave(&adapter->mdio_lock, flags);
213 atl1c_restart_autoneg(hw);
214 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
215}
216
217void atl1c_reinit_locked(struct atl1c_adapter *adapter)
218{
43250ddd
JY		 219 WARN_ON(in_interrupt());
220 atl1c_down(adapter);
221 atl1c_up(adapter);
222 clear_bit(__AT_RESETTING, &adapter->flags);
223}
224
43250ddd
JY		 225static void atl1c_check_link_status(struct atl1c_adapter *adapter)
226{
227 struct atl1c_hw *hw = &adapter->hw;
228 struct net_device *netdev = adapter->netdev;
229 struct pci_dev *pdev = adapter->pdev;
230 int err;
231 unsigned long flags;
232 u16 speed, duplex, phy_data;
233
234 spin_lock_irqsave(&adapter->mdio_lock, flags);
235 /* MII_BMSR must read twise */
236 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
237 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
238 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
239
240 if ((phy_data & BMSR_LSTATUS) == 0) {
241 /* link down */
8f574b35
JY		 242 hw->hibernate = true;
243 if (atl1c_stop_mac(hw) != 0)
244 if (netif_msg_hw(adapter))
245 dev_warn(&pdev->dev, "stop mac failed\n");
246 atl1c_set_aspm(hw, false);
43250ddd 247 netif_carrier_off(netdev);
8f574b35
JY		 248 netif_stop_queue(netdev);
249 atl1c_phy_reset(hw);
250 atl1c_phy_init(&adapter->hw);
43250ddd
JY		 251 } else {
252 /* Link Up */
253 hw->hibernate = false;
254 spin_lock_irqsave(&adapter->mdio_lock, flags);
255 err = atl1c_get_speed_and_duplex(hw, &speed, &duplex);
256 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
257 if (unlikely(err))
258 return;
259 /* link result is our setting */
260 if (adapter->link_speed != speed ||
261 adapter->link_duplex != duplex) {
262 adapter->link_speed = speed;
263 adapter->link_duplex = duplex;
52fbc100 264 atl1c_set_aspm(hw, true);
43250ddd
JY		 265 atl1c_enable_tx_ctrl(hw);
266 atl1c_enable_rx_ctrl(hw);
267 atl1c_setup_mac_ctrl(adapter);
43250ddd
JY		 268 if (netif_msg_link(adapter))
269 dev_info(&pdev->dev,
270 "%s: %s NIC Link is Up<%d Mbps %s>\n",
271 atl1c_driver_name, netdev->name,
272 adapter->link_speed,
273 adapter->link_duplex == FULL_DUPLEX ?
274 "Full Duplex" : "Half Duplex");
275 }
276 if (!netif_carrier_ok(netdev))
277 netif_carrier_on(netdev);
278 }
279}
280
43250ddd
JY		 281static void atl1c_link_chg_event(struct atl1c_adapter *adapter)
282{
283 struct net_device *netdev = adapter->netdev;
284 struct pci_dev *pdev = adapter->pdev;
285 u16 phy_data;
286 u16 link_up;
287
288 spin_lock(&adapter->mdio_lock);
289 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
290 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
291 spin_unlock(&adapter->mdio_lock);
292 link_up = phy_data & BMSR_LSTATUS;
293 /* notify upper layer link down ASAP */
294 if (!link_up) {
295 if (netif_carrier_ok(netdev)) {
296 /* old link state: Up */
297 netif_carrier_off(netdev);
298 if (netif_msg_link(adapter))
299 dev_info(&pdev->dev,
300 "%s: %s NIC Link is Down\n",
301 atl1c_driver_name, netdev->name);
302 adapter->link_speed = SPEED_0;
303 }
304 }
cb190546 305
cb771838 306 set_bit(ATL1C_WORK_EVENT_LINK_CHANGE, &adapter->work_event);
cb190546 307 schedule_work(&adapter->common_task);
43250ddd
JY		 308}
309
cb190546 310static void atl1c_common_task(struct work_struct *work)
43250ddd 311{
cb190546
JY		 312 struct atl1c_adapter *adapter;
313 struct net_device *netdev;
314
315 adapter = container_of(work, struct atl1c_adapter, common_task);
316 netdev = adapter->netdev;
317
cb771838 318 if (test_and_clear_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event)) {
cb190546
JY		 319 netif_device_detach(netdev);
320 atl1c_down(adapter);
321 atl1c_up(adapter);
322 netif_device_attach(netdev);
cb190546
JY		 323 }
324
cb771838
TG		 325 if (test_and_clear_bit(ATL1C_WORK_EVENT_LINK_CHANGE,
326 &adapter->work_event))
cb190546 327 atl1c_check_link_status(adapter);
43250ddd
JY		 328}
329
cb190546
JY		 330
331static void atl1c_del_timer(struct atl1c_adapter *adapter)
43250ddd 332{
cb190546 333 del_timer_sync(&adapter->phy_config_timer);
43250ddd
JY		 334}
335
cb190546 336
43250ddd
JY		 337/*
338 * atl1c_tx_timeout - Respond to a Tx Hang
339 * @netdev: network interface device structure
340 */
341static void atl1c_tx_timeout(struct net_device *netdev)
342{
343 struct atl1c_adapter *adapter = netdev_priv(netdev);
344
345 /* Do the reset outside of interrupt context */
cb771838 346 set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event);
cb190546 347 schedule_work(&adapter->common_task);
43250ddd
JY		 348}
349
350/*
351 * atl1c_set_multi - Multicast and Promiscuous mode set
352 * @netdev: network interface device structure
353 *
354 * The set_multi entry point is called whenever the multicast address
355 * list or the network interface flags are updated. This routine is
356 * responsible for configuring the hardware for proper multicast,
357 * promiscuous mode, and all-multi behavior.
358 */
359static void atl1c_set_multi(struct net_device *netdev)
360{
361 struct atl1c_adapter *adapter = netdev_priv(netdev);
362 struct atl1c_hw *hw = &adapter->hw;
22bedad3 363 struct netdev_hw_addr *ha;
43250ddd
JY		 364 u32 mac_ctrl_data;
365 u32 hash_value;
366
367 /* Check for Promiscuous and All Multicast modes */
368 AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data);
369
370 if (netdev->flags & IFF_PROMISC) {
371 mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
372 } else if (netdev->flags & IFF_ALLMULTI) {
373 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
374 mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN;
375 } else {
376 mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
377 }
378
379 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
380
381 /* clear the old settings from the multicast hash table */
382 AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
383 AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
384
385 /* comoute mc addresses' hash value ,and put it into hash table */
22bedad3
JP		 386 netdev_for_each_mc_addr(ha, netdev) {
387 hash_value = atl1c_hash_mc_addr(hw, ha->addr);
43250ddd
JY		 388 atl1c_hash_set(hw, hash_value);
389 }
390}
391
c8f44aff 392static void __atl1c_vlan_mode(netdev_features_t features, u32 *mac_ctrl_data)
46facce9
JP		 393{
394 if (features & NETIF_F_HW_VLAN_RX) {
395 /* enable VLAN tag insert/strip */
396 *mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
397 } else {
398 /* disable VLAN tag insert/strip */
399 *mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN;
400 }
401}
402
c8f44aff
MM		 403static void atl1c_vlan_mode(struct net_device *netdev,
404 netdev_features_t features)
43250ddd
JY		 405{
406 struct atl1c_adapter *adapter = netdev_priv(netdev);
407 struct pci_dev *pdev = adapter->pdev;
408 u32 mac_ctrl_data = 0;
409
410 if (netif_msg_pktdata(adapter))
46facce9 411 dev_dbg(&pdev->dev, "atl1c_vlan_mode\n");
43250ddd
JY		 412
413 atl1c_irq_disable(adapter);
43250ddd 414 AT_READ_REG(&adapter->hw, REG_MAC_CTRL, &mac_ctrl_data);
46facce9 415 __atl1c_vlan_mode(features, &mac_ctrl_data);
43250ddd
JY		 416 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
417 atl1c_irq_enable(adapter);
418}
419
420static void atl1c_restore_vlan(struct atl1c_adapter *adapter)
421{
422 struct pci_dev *pdev = adapter->pdev;
423
424 if (netif_msg_pktdata(adapter))
46facce9
JP		 425 dev_dbg(&pdev->dev, "atl1c_restore_vlan\n");
426 atl1c_vlan_mode(adapter->netdev, adapter->netdev->features);
43250ddd 427}
46facce9 428
43250ddd
JY		 429/*
430 * atl1c_set_mac - Change the Ethernet Address of the NIC
431 * @netdev: network interface device structure
432 * @p: pointer to an address structure
433 *
434 * Returns 0 on success, negative on failure
435 */
436static int atl1c_set_mac_addr(struct net_device *netdev, void *p)
437{
438 struct atl1c_adapter *adapter = netdev_priv(netdev);
439 struct sockaddr *addr = p;
440
441 if (!is_valid_ether_addr(addr->sa_data))
442 return -EADDRNOTAVAIL;
443
444 if (netif_running(netdev))
445 return -EBUSY;
446
447 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
448 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
6a214fd4 449 netdev->addr_assign_type &= ~NET_ADDR_RANDOM;
43250ddd
JY		 450
451 atl1c_hw_set_mac_addr(&adapter->hw);
452
453 return 0;
454}
455
456static void atl1c_set_rxbufsize(struct atl1c_adapter *adapter,
457 struct net_device *dev)
458{
459 int mtu = dev->mtu;
460
461 adapter->rx_buffer_len = mtu > AT_RX_BUF_SIZE ?
462 roundup(mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN, 8) : AT_RX_BUF_SIZE;
463}
782d640a 464
c8f44aff
MM		 465static netdev_features_t atl1c_fix_features(struct net_device *netdev,
466 netdev_features_t features)
782d640a 467{
46facce9
JP		 468 /*
469 * Since there is no support for separate rx/tx vlan accel
470 * enable/disable make sure tx flag is always in same state as rx.
471 */
472 if (features & NETIF_F_HW_VLAN_RX)
473 features |= NETIF_F_HW_VLAN_TX;
474 else
475 features &= ~NETIF_F_HW_VLAN_TX;
476
782d640a
MM		 477 if (netdev->mtu > MAX_TSO_FRAME_SIZE)
478 features &= ~(NETIF_F_TSO | NETIF_F_TSO6);
479
480 return features;
481}
482
c8f44aff
MM		 483static int atl1c_set_features(struct net_device *netdev,
484 netdev_features_t features)
46facce9 485{
c8f44aff 486 netdev_features_t changed = netdev->features ^ features;
46facce9
JP		 487
488 if (changed & NETIF_F_HW_VLAN_RX)
489 atl1c_vlan_mode(netdev, features);
490
491 return 0;
492}
493
43250ddd
JY		 494/*
495 * atl1c_change_mtu - Change the Maximum Transfer Unit
496 * @netdev: network interface device structure
497 * @new_mtu: new value for maximum frame size
498 *
499 * Returns 0 on success, negative on failure
500 */
501static int atl1c_change_mtu(struct net_device *netdev, int new_mtu)
502{
503 struct atl1c_adapter *adapter = netdev_priv(netdev);
504 int old_mtu = netdev->mtu;
505 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
506
507 if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
508 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
509 if (netif_msg_link(adapter))
510 dev_warn(&adapter->pdev->dev, "invalid MTU setting\n");
511 return -EINVAL;
512 }
513 /* set MTU */
514 if (old_mtu != new_mtu && netif_running(netdev)) {
515 while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
516 msleep(1);
517 netdev->mtu = new_mtu;
518 adapter->hw.max_frame_size = new_mtu;
519 atl1c_set_rxbufsize(adapter, netdev);
520 atl1c_down(adapter);
782d640a 521 netdev_update_features(netdev);
43250ddd
JY		 522 atl1c_up(adapter);
523 clear_bit(__AT_RESETTING, &adapter->flags);
524 if (adapter->hw.ctrl_flags & ATL1C_FPGA_VERSION) {
525 u32 phy_data;
526
527 AT_READ_REG(&adapter->hw, 0x1414, &phy_data);
528 phy_data |= 0x10000000;
529 AT_WRITE_REG(&adapter->hw, 0x1414, phy_data);
530 }
531
532 }
533 return 0;
534}
535
536/*
537 * caller should hold mdio_lock
538 */
539static int atl1c_mdio_read(struct net_device *netdev, int phy_id, int reg_num)
540{
541 struct atl1c_adapter *adapter = netdev_priv(netdev);
542 u16 result;
543
544 atl1c_read_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, &result);
545 return result;
546}
547
548static void atl1c_mdio_write(struct net_device *netdev, int phy_id,
549 int reg_num, int val)
550{
551 struct atl1c_adapter *adapter = netdev_priv(netdev);
552
553 atl1c_write_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, val);
554}
555
556/*
557 * atl1c_mii_ioctl -
558 * @netdev:
559 * @ifreq:
560 * @cmd:
561 */
562static int atl1c_mii_ioctl(struct net_device *netdev,
563 struct ifreq *ifr, int cmd)
564{
565 struct atl1c_adapter *adapter = netdev_priv(netdev);
566 struct pci_dev *pdev = adapter->pdev;
567 struct mii_ioctl_data *data = if_mii(ifr);
568 unsigned long flags;
569 int retval = 0;
570
571 if (!netif_running(netdev))
572 return -EINVAL;
573
574 spin_lock_irqsave(&adapter->mdio_lock, flags);
575 switch (cmd) {
576 case SIOCGMIIPHY:
577 data->phy_id = 0;
578 break;
579
580 case SIOCGMIIREG:
43250ddd
JY		 581 if (atl1c_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
582 &data->val_out)) {
583 retval = -EIO;
584 goto out;
585 }
586 break;
587
588 case SIOCSMIIREG:
43250ddd
JY		 589 if (data->reg_num & ~(0x1F)) {
590 retval = -EFAULT;
591 goto out;
592 }
593
594 dev_dbg(&pdev->dev, "<atl1c_mii_ioctl> write %x %x",
595 data->reg_num, data->val_in);
596 if (atl1c_write_phy_reg(&adapter->hw,
597 data->reg_num, data->val_in)) {
598 retval = -EIO;
599 goto out;
600 }
601 break;
602
603 default:
604 retval = -EOPNOTSUPP;
605 break;
606 }
607out:
608 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
609 return retval;
610}
611
612/*
613 * atl1c_ioctl -
614 * @netdev:
615 * @ifreq:
616 * @cmd:
617 */
618static int atl1c_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
619{
620 switch (cmd) {
621 case SIOCGMIIPHY:
622 case SIOCGMIIREG:
623 case SIOCSMIIREG:
624 return atl1c_mii_ioctl(netdev, ifr, cmd);
625 default:
626 return -EOPNOTSUPP;
627 }
628}
629
630/*
631 * atl1c_alloc_queues - Allocate memory for all rings
632 * @adapter: board private structure to initialize
633 *
634 */
635static int __devinit atl1c_alloc_queues(struct atl1c_adapter *adapter)
636{
637 return 0;
638}
639
640static void atl1c_set_mac_type(struct atl1c_hw *hw)
641{
642 switch (hw->device_id) {
643 case PCI_DEVICE_ID_ATTANSIC_L2C:
644 hw->nic_type = athr_l2c;
645 break;
43250ddd
JY		 646 case PCI_DEVICE_ID_ATTANSIC_L1C:
647 hw->nic_type = athr_l1c;
648 break;
496c185c
LR		 649 case PCI_DEVICE_ID_ATHEROS_L2C_B:
650 hw->nic_type = athr_l2c_b;
651 break;
652 case PCI_DEVICE_ID_ATHEROS_L2C_B2:
653 hw->nic_type = athr_l2c_b2;
654 break;
655 case PCI_DEVICE_ID_ATHEROS_L1D:
656 hw->nic_type = athr_l1d;
657 break;
8f574b35
JY		 658 case PCI_DEVICE_ID_ATHEROS_L1D_2_0:
659 hw->nic_type = athr_l1d_2;
660 break;
43250ddd
JY		 661 default:
662 break;
663 }
664}
665
666static int atl1c_setup_mac_funcs(struct atl1c_hw *hw)
667{
668 u32 phy_status_data;
669 u32 link_ctrl_data;
670
671 atl1c_set_mac_type(hw);
672 AT_READ_REG(hw, REG_PHY_STATUS, &phy_status_data);
673 AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data);
674
8f574b35 675 hw->ctrl_flags = ATL1C_INTR_MODRT_ENABLE |
43250ddd
JY		 676 ATL1C_TXQ_MODE_ENHANCE;
677 if (link_ctrl_data & LINK_CTRL_L0S_EN)
678 hw->ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT;
679 if (link_ctrl_data & LINK_CTRL_L1_EN)
680 hw->ctrl_flags |= ATL1C_ASPM_L1_SUPPORT;
496c185c
LR		 681 if (link_ctrl_data & LINK_CTRL_EXT_SYNC)
682 hw->ctrl_flags |= ATL1C_LINK_EXT_SYNC;
8f574b35 683 hw->ctrl_flags |= ATL1C_ASPM_CTRL_MON;
43250ddd 684
496c185c 685 if (hw->nic_type == athr_l1c ||
8f574b35
JY		 686 hw->nic_type == athr_l1d ||
687 hw->nic_type == athr_l1d_2)
496c185c 688 hw->link_cap_flags |= ATL1C_LINK_CAP_1000M;
43250ddd
JY		 689 return 0;
690}
691/*
692 * atl1c_sw_init - Initialize general software structures (struct atl1c_adapter)
693 * @adapter: board private structure to initialize
694 *
695 * atl1c_sw_init initializes the Adapter private data structure.
696 * Fields are initialized based on PCI device information and
697 * OS network device settings (MTU size).
698 */
699static int __devinit atl1c_sw_init(struct atl1c_adapter *adapter)
700{
701 struct atl1c_hw *hw = &adapter->hw;
702 struct pci_dev *pdev = adapter->pdev;
8f574b35
JY		 703 u32 revision;
704
43250ddd
JY		 705
706 adapter->wol = 0;
762e3023 707 device_set_wakeup_enable(&pdev->dev, false);
43250ddd
JY		 708 adapter->link_speed = SPEED_0;
709 adapter->link_duplex = FULL_DUPLEX;
43250ddd 710 adapter->tpd_ring[0].count = 1024;
9f1fd0ef 711 adapter->rfd_ring.count = 512;
43250ddd
JY		 712
713 hw->vendor_id = pdev->vendor;
714 hw->device_id = pdev->device;
715 hw->subsystem_vendor_id = pdev->subsystem_vendor;
716 hw->subsystem_id = pdev->subsystem_device;
8f574b35
JY		 717 AT_READ_REG(hw, PCI_CLASS_REVISION, &revision);
718 hw->revision_id = revision & 0xFF;
43250ddd
JY		 719 /* before link up, we assume hibernate is true */
720 hw->hibernate = true;
721 hw->media_type = MEDIA_TYPE_AUTO_SENSOR;
722 if (atl1c_setup_mac_funcs(hw) != 0) {
723 dev_err(&pdev->dev, "set mac function pointers failed\n");
724 return -1;
725 }
726 hw->intr_mask = IMR_NORMAL_MASK;
727 hw->phy_configured = false;
728 hw->preamble_len = 7;
729 hw->max_frame_size = adapter->netdev->mtu;
43250ddd
JY		 730 hw->autoneg_advertised = ADVERTISED_Autoneg;
731 hw->indirect_tab = 0xE4E4E4E4;
732 hw->base_cpu = 0;
733
734 hw->ict = 50000; /* 100ms */
735 hw->smb_timer = 200000; /* 400ms */
43250ddd
JY		 736 hw->rx_imt = 200;
737 hw->tx_imt = 1000;
738
739 hw->tpd_burst = 5;
740 hw->rfd_burst = 8;
741 hw->dma_order = atl1c_dma_ord_out;
742 hw->dmar_block = atl1c_dma_req_1024;
743 hw->dmaw_block = atl1c_dma_req_1024;
744 hw->dmar_dly_cnt = 15;
745 hw->dmaw_dly_cnt = 4;
746
747 if (atl1c_alloc_queues(adapter)) {
748 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
749 return -ENOMEM;
750 }
751 /* TODO */
752 atl1c_set_rxbufsize(adapter, adapter->netdev);
753 atomic_set(&adapter->irq_sem, 1);
754 spin_lock_init(&adapter->mdio_lock);
755 spin_lock_init(&adapter->tx_lock);
756 set_bit(__AT_DOWN, &adapter->flags);
757
758 return 0;
759}
760
c6060be4
JY		 761static inline void atl1c_clean_buffer(struct pci_dev *pdev,
762 struct atl1c_buffer *buffer_info, int in_irq)
763{
4b45e342 764 u16 pci_driection;
c6060be4
JY		 765 if (buffer_info->flags & ATL1C_BUFFER_FREE)
766 return;
767 if (buffer_info->dma) {
4b45e342
JY		 768 if (buffer_info->flags & ATL1C_PCIMAP_FROMDEVICE)
769 pci_driection = PCI_DMA_FROMDEVICE;
770 else
771 pci_driection = PCI_DMA_TODEVICE;
772
c6060be4
JY		 773 if (buffer_info->flags & ATL1C_PCIMAP_SINGLE)
774 pci_unmap_single(pdev, buffer_info->dma,
4b45e342 775 buffer_info->length, pci_driection);
c6060be4
JY		 776 else if (buffer_info->flags & ATL1C_PCIMAP_PAGE)
777 pci_unmap_page(pdev, buffer_info->dma,
4b45e342 778 buffer_info->length, pci_driection);
c6060be4
JY		 779 }
780 if (buffer_info->skb) {
781 if (in_irq)
782 dev_kfree_skb_irq(buffer_info->skb);
783 else
784 dev_kfree_skb(buffer_info->skb);
785 }
786 buffer_info->dma = 0;
787 buffer_info->skb = NULL;
788 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
789}
43250ddd
JY		 790/*
791 * atl1c_clean_tx_ring - Free Tx-skb
792 * @adapter: board private structure
793 */
794static void atl1c_clean_tx_ring(struct atl1c_adapter *adapter,
795 enum atl1c_trans_queue type)
796{
797 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
798 struct atl1c_buffer *buffer_info;
799 struct pci_dev *pdev = adapter->pdev;
800 u16 index, ring_count;
801
802 ring_count = tpd_ring->count;
803 for (index = 0; index < ring_count; index++) {
804 buffer_info = &tpd_ring->buffer_info[index];
c6060be4 805 atl1c_clean_buffer(pdev, buffer_info, 0);
43250ddd
JY		 806 }
807
808 /* Zero out Tx-buffers */
809 memset(tpd_ring->desc, 0, sizeof(struct atl1c_tpd_desc) *
c6060be4 810 ring_count);
43250ddd
JY		 811 atomic_set(&tpd_ring->next_to_clean, 0);
812 tpd_ring->next_to_use = 0;
813}
814
815/*
816 * atl1c_clean_rx_ring - Free rx-reservation skbs
817 * @adapter: board private structure
818 */
819static void atl1c_clean_rx_ring(struct atl1c_adapter *adapter)
820{
9f1fd0ef
HX		 821 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
822 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
43250ddd
JY		 823 struct atl1c_buffer *buffer_info;
824 struct pci_dev *pdev = adapter->pdev;
9f1fd0ef 825 int j;
43250ddd 826
9f1fd0ef
HX		 827 for (j = 0; j < rfd_ring->count; j++) {
828 buffer_info = &rfd_ring->buffer_info[j];
829 atl1c_clean_buffer(pdev, buffer_info, 0);
43250ddd 830 }
9f1fd0ef
HX		 831 /* zero out the descriptor ring */
832 memset(rfd_ring->desc, 0, rfd_ring->size);
833 rfd_ring->next_to_clean = 0;
834 rfd_ring->next_to_use = 0;
835 rrd_ring->next_to_use = 0;
836 rrd_ring->next_to_clean = 0;
43250ddd
JY		 837}
838
839/*
840 * Read / Write Ptr Initialize:
841 */
842static void atl1c_init_ring_ptrs(struct atl1c_adapter *adapter)
843{
844 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
9f1fd0ef
HX		 845 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
846 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
43250ddd
JY		 847 struct atl1c_buffer *buffer_info;
848 int i, j;
849
850 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
851 tpd_ring[i].next_to_use = 0;
852 atomic_set(&tpd_ring[i].next_to_clean, 0);
853 buffer_info = tpd_ring[i].buffer_info;
854 for (j = 0; j < tpd_ring->count; j++)
c6060be4
JY		 855 ATL1C_SET_BUFFER_STATE(&buffer_info[i],
856 ATL1C_BUFFER_FREE);
43250ddd 857 }
9f1fd0ef
HX		 858 rfd_ring->next_to_use = 0;
859 rfd_ring->next_to_clean = 0;
860 rrd_ring->next_to_use = 0;
861 rrd_ring->next_to_clean = 0;
862 for (j = 0; j < rfd_ring->count; j++) {
863 buffer_info = &rfd_ring->buffer_info[j];
864 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
43250ddd
JY		 865 }
866}
867
868/*
869 * atl1c_free_ring_resources - Free Tx / RX descriptor Resources
870 * @adapter: board private structure
871 *
872 * Free all transmit software resources
873 */
874static void atl1c_free_ring_resources(struct atl1c_adapter *adapter)
875{
876 struct pci_dev *pdev = adapter->pdev;
877
878 pci_free_consistent(pdev, adapter->ring_header.size,
879 adapter->ring_header.desc,
880 adapter->ring_header.dma);
881 adapter->ring_header.desc = NULL;
882
883 /* Note: just free tdp_ring.buffer_info,
884 * it contain rfd_ring.buffer_info, do not double free */
885 if (adapter->tpd_ring[0].buffer_info) {
886 kfree(adapter->tpd_ring[0].buffer_info);
887 adapter->tpd_ring[0].buffer_info = NULL;
888 }
889}
890
891/*
892 * atl1c_setup_mem_resources - allocate Tx / RX descriptor resources
893 * @adapter: board private structure
894 *
895 * Return 0 on success, negative on failure
896 */
897static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter)
898{
899 struct pci_dev *pdev = adapter->pdev;
900 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
9f1fd0ef
HX		 901 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
902 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
43250ddd 903 struct atl1c_ring_header *ring_header = &adapter->ring_header;
43250ddd
JY		 904 int size;
905 int i;
906 int count = 0;
907 int rx_desc_count = 0;
908 u32 offset = 0;
909
9f1fd0ef 910 rrd_ring->count = rfd_ring->count;
43250ddd
JY		 911 for (i = 1; i < AT_MAX_TRANSMIT_QUEUE; i++)
912 tpd_ring[i].count = tpd_ring[0].count;
913
43250ddd
JY		 914 /* 2 tpd queue, one high priority queue,
915 * another normal priority queue */
916 size = sizeof(struct atl1c_buffer) * (tpd_ring->count * 2 +
9f1fd0ef 917 rfd_ring->count);
43250ddd
JY		 918 tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
919 if (unlikely(!tpd_ring->buffer_info)) {
920 dev_err(&pdev->dev, "kzalloc failed, size = %d\n",
921 size);
922 goto err_nomem;
923 }
924 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
925 tpd_ring[i].buffer_info =
926 (struct atl1c_buffer *) (tpd_ring->buffer_info + count);
927 count += tpd_ring[i].count;
928 }
929
9f1fd0ef
HX		 930 rfd_ring->buffer_info =
931 (struct atl1c_buffer *) (tpd_ring->buffer_info + count);
932 count += rfd_ring->count;
933 rx_desc_count += rfd_ring->count;
934
43250ddd
JY		 935 /*
936 * real ring DMA buffer
937 * each ring/block may need up to 8 bytes for alignment, hence the
938 * additional bytes tacked onto the end.
939 */
940 ring_header->size = size =
941 sizeof(struct atl1c_tpd_desc) * tpd_ring->count * 2 +
942 sizeof(struct atl1c_rx_free_desc) * rx_desc_count +
943 sizeof(struct atl1c_recv_ret_status) * rx_desc_count +
8d5c6836 944 8 * 4;
43250ddd
JY		 945
946 ring_header->desc = pci_alloc_consistent(pdev, ring_header->size,
947 &ring_header->dma);
948 if (unlikely(!ring_header->desc)) {
949 dev_err(&pdev->dev, "pci_alloc_consistend failed\n");
950 goto err_nomem;
951 }
952 memset(ring_header->desc, 0, ring_header->size);
953 /* init TPD ring */
954
955 tpd_ring[0].dma = roundup(ring_header->dma, 8);
956 offset = tpd_ring[0].dma - ring_header->dma;
957 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
958 tpd_ring[i].dma = ring_header->dma + offset;
959 tpd_ring[i].desc = (u8 *) ring_header->desc + offset;
960 tpd_ring[i].size =
961 sizeof(struct atl1c_tpd_desc) * tpd_ring[i].count;
962 offset += roundup(tpd_ring[i].size, 8);
963 }
964 /* init RFD ring */
9f1fd0ef
HX		 965 rfd_ring->dma = ring_header->dma + offset;
966 rfd_ring->desc = (u8 *) ring_header->desc + offset;
967 rfd_ring->size = sizeof(struct atl1c_rx_free_desc) * rfd_ring->count;
968 offset += roundup(rfd_ring->size, 8);
43250ddd
JY		 969
970 /* init RRD ring */
9f1fd0ef
HX		 971 rrd_ring->dma = ring_header->dma + offset;
972 rrd_ring->desc = (u8 *) ring_header->desc + offset;
973 rrd_ring->size = sizeof(struct atl1c_recv_ret_status) *
974 rrd_ring->count;
975 offset += roundup(rrd_ring->size, 8);
43250ddd 976
43250ddd
JY		 977 return 0;
978
979err_nomem:
980 kfree(tpd_ring->buffer_info);
981 return -ENOMEM;
982}
983
984static void atl1c_configure_des_ring(struct atl1c_adapter *adapter)
985{
986 struct atl1c_hw *hw = &adapter->hw;
9f1fd0ef
HX		 987 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
988 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
43250ddd
JY		 989 struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
990 adapter->tpd_ring;
8f574b35 991 u32 data;
43250ddd
JY		 992
993 /* TPD */
994 AT_WRITE_REG(hw, REG_TX_BASE_ADDR_HI,
995 (u32)((tpd_ring[atl1c_trans_normal].dma &
996 AT_DMA_HI_ADDR_MASK) >> 32));
997 /* just enable normal priority TX queue */
0af48336 998 AT_WRITE_REG(hw, REG_TPD_PRI0_ADDR_LO,
43250ddd
JY		 999 (u32)(tpd_ring[atl1c_trans_normal].dma &
1000 AT_DMA_LO_ADDR_MASK));
0af48336 1001 AT_WRITE_REG(hw, REG_TPD_PRI1_ADDR_LO,
43250ddd
JY		 1002 (u32)(tpd_ring[atl1c_trans_high].dma &
1003 AT_DMA_LO_ADDR_MASK));
1004 AT_WRITE_REG(hw, REG_TPD_RING_SIZE,
1005 (u32)(tpd_ring[0].count & TPD_RING_SIZE_MASK));
1006
1007
1008 /* RFD */
1009 AT_WRITE_REG(hw, REG_RX_BASE_ADDR_HI,
9f1fd0ef
HX		 1010 (u32)((rfd_ring->dma & AT_DMA_HI_ADDR_MASK) >> 32));
1011 AT_WRITE_REG(hw, REG_RFD0_HEAD_ADDR_LO,
1012 (u32)(rfd_ring->dma & AT_DMA_LO_ADDR_MASK));
43250ddd
JY		 1013
1014 AT_WRITE_REG(hw, REG_RFD_RING_SIZE,
9f1fd0ef 1015 rfd_ring->count & RFD_RING_SIZE_MASK);
43250ddd
JY		 1016 AT_WRITE_REG(hw, REG_RX_BUF_SIZE,
1017 adapter->rx_buffer_len & RX_BUF_SIZE_MASK);
1018
1019 /* RRD */
9f1fd0ef
HX		 1020 AT_WRITE_REG(hw, REG_RRD0_HEAD_ADDR_LO,
1021 (u32)(rrd_ring->dma & AT_DMA_LO_ADDR_MASK));
43250ddd 1022 AT_WRITE_REG(hw, REG_RRD_RING_SIZE,
9f1fd0ef 1023 (rrd_ring->count & RRD_RING_SIZE_MASK));
43250ddd 1024
8f574b35
JY		 1025 if (hw->nic_type == athr_l2c_b) {
1026 AT_WRITE_REG(hw, REG_SRAM_RXF_LEN, 0x02a0L);
1027 AT_WRITE_REG(hw, REG_SRAM_TXF_LEN, 0x0100L);
1028 AT_WRITE_REG(hw, REG_SRAM_RXF_ADDR, 0x029f0000L);
1029 AT_WRITE_REG(hw, REG_SRAM_RFD0_INFO, 0x02bf02a0L);
1030 AT_WRITE_REG(hw, REG_SRAM_TXF_ADDR, 0x03bf02c0L);
1031 AT_WRITE_REG(hw, REG_SRAM_TRD_ADDR, 0x03df03c0L);
1032 AT_WRITE_REG(hw, REG_TXF_WATER_MARK, 0); /* TX watermark, to enter l1 state.*/
1033 AT_WRITE_REG(hw, REG_RXD_DMA_CTRL, 0); /* RXD threshold.*/
1034 }
1035 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d_2) {
1036 /* Power Saving for L2c_B */
1037 AT_READ_REG(hw, REG_SERDES_LOCK, &data);
1038 data |= SERDES_MAC_CLK_SLOWDOWN;
1039 data |= SERDES_PYH_CLK_SLOWDOWN;
1040 AT_WRITE_REG(hw, REG_SERDES_LOCK, data);
1041 }
43250ddd
JY		 1042 /* Load all of base address above */
1043 AT_WRITE_REG(hw, REG_LOAD_PTR, 1);
1044}
1045
1046static void atl1c_configure_tx(struct atl1c_adapter *adapter)
1047{
1048 struct atl1c_hw *hw = &adapter->hw;
1049 u32 dev_ctrl_data;
1050 u32 max_pay_load;
1051 u16 tx_offload_thresh;
1052 u32 txq_ctrl_data;
8f574b35 1053 u32 max_pay_load_data;
43250ddd 1054
43250ddd
JY		 1055 tx_offload_thresh = MAX_TX_OFFLOAD_THRESH;
1056 AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH,
1057 (tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK);
1058 AT_READ_REG(hw, REG_DEVICE_CTRL, &dev_ctrl_data);
1059 max_pay_load = (dev_ctrl_data >> DEVICE_CTRL_MAX_PAYLOAD_SHIFT) &
1060 DEVICE_CTRL_MAX_PAYLOAD_MASK;
81b504b8 1061 hw->dmaw_block = min_t(u32, max_pay_load, hw->dmaw_block);
43250ddd
JY		 1062 max_pay_load = (dev_ctrl_data >> DEVICE_CTRL_MAX_RREQ_SZ_SHIFT) &
1063 DEVICE_CTRL_MAX_RREQ_SZ_MASK;
81b504b8 1064 hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block);
43250ddd
JY		 1065
1066 txq_ctrl_data = (hw->tpd_burst & TXQ_NUM_TPD_BURST_MASK) <<
1067 TXQ_NUM_TPD_BURST_SHIFT;
1068 if (hw->ctrl_flags & ATL1C_TXQ_MODE_ENHANCE)
1069 txq_ctrl_data |= TXQ_CTRL_ENH_MODE;
8f574b35 1070 max_pay_load_data = (atl1c_pay_load_size[hw->dmar_block] &
43250ddd 1071 TXQ_TXF_BURST_NUM_MASK) << TXQ_TXF_BURST_NUM_SHIFT;
8f574b35
JY		 1072 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l2c_b2)
1073 max_pay_load_data >>= 1;
1074 txq_ctrl_data |= max_pay_load_data;
43250ddd
JY		 1075
1076 AT_WRITE_REG(hw, REG_TXQ_CTRL, txq_ctrl_data);
1077}
1078
1079static void atl1c_configure_rx(struct atl1c_adapter *adapter)
1080{
1081 struct atl1c_hw *hw = &adapter->hw;
1082 u32 rxq_ctrl_data;
1083
1084 rxq_ctrl_data = (hw->rfd_burst & RXQ_RFD_BURST_NUM_MASK) <<
1085 RXQ_RFD_BURST_NUM_SHIFT;
1086
1087 if (hw->ctrl_flags & ATL1C_RX_IPV6_CHKSUM)
1088 rxq_ctrl_data |= IPV6_CHKSUM_CTRL_EN;
9f1fd0ef 1089
43250ddd 1090 if (hw->ctrl_flags & ATL1C_ASPM_CTRL_MON)
8f574b35 1091 rxq_ctrl_data |= (ASPM_THRUPUT_LIMIT_1M &
43250ddd
JY		 1092 ASPM_THRUPUT_LIMIT_MASK) << ASPM_THRUPUT_LIMIT_SHIFT;
1093
1094 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data);
1095}
1096
43250ddd
JY		 1097static void atl1c_configure_dma(struct atl1c_adapter *adapter)
1098{
1099 struct atl1c_hw *hw = &adapter->hw;
1100 u32 dma_ctrl_data;
1101
1102 dma_ctrl_data = DMA_CTRL_DMAR_REQ_PRI;
43250ddd
JY		 1103
1104 switch (hw->dma_order) {
1105 case atl1c_dma_ord_in:
1106 dma_ctrl_data |= DMA_CTRL_DMAR_IN_ORDER;
1107 break;
1108 case atl1c_dma_ord_enh:
1109 dma_ctrl_data |= DMA_CTRL_DMAR_ENH_ORDER;
1110 break;
1111 case atl1c_dma_ord_out:
1112 dma_ctrl_data |= DMA_CTRL_DMAR_OUT_ORDER;
1113 break;
1114 default:
1115 break;
1116 }
1117
1118 dma_ctrl_data |= (((u32)hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
1119 << DMA_CTRL_DMAR_BURST_LEN_SHIFT;
1120 dma_ctrl_data |= (((u32)hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK)
1121 << DMA_CTRL_DMAW_BURST_LEN_SHIFT;
1122 dma_ctrl_data |= (((u32)hw->dmar_dly_cnt) & DMA_CTRL_DMAR_DLY_CNT_MASK)
1123 << DMA_CTRL_DMAR_DLY_CNT_SHIFT;
1124 dma_ctrl_data |= (((u32)hw->dmaw_dly_cnt) & DMA_CTRL_DMAW_DLY_CNT_MASK)
1125 << DMA_CTRL_DMAW_DLY_CNT_SHIFT;
1126
1127 AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data);
1128}
1129
1130/*
1131 * Stop the mac, transmit and receive units
1132 * hw - Struct containing variables accessed by shared code
1133 * return : 0 or idle status (if error)
1134 */
1135static int atl1c_stop_mac(struct atl1c_hw *hw)
1136{
1137 u32 data;
43250ddd
JY		 1138
1139 AT_READ_REG(hw, REG_RXQ_CTRL, &data);
027392c2 1140 data &= ~RXQ_CTRL_EN;
43250ddd
JY		 1141 AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
1142
1143 AT_READ_REG(hw, REG_TXQ_CTRL, &data);
1144 data &= ~TXQ_CTRL_EN;
1145 AT_WRITE_REG(hw, REG_TWSI_CTRL, data);
1146
c930a662 1147 atl1c_wait_until_idle(hw);
43250ddd
JY		 1148
1149 AT_READ_REG(hw, REG_MAC_CTRL, &data);
1150 data &= ~(MAC_CTRL_TX_EN | MAC_CTRL_RX_EN);
1151 AT_WRITE_REG(hw, REG_MAC_CTRL, data);
1152
c930a662 1153 return (int)atl1c_wait_until_idle(hw);
43250ddd
JY		 1154}
1155
1156static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw)
1157{
1158 u32 data;
1159
1160 AT_READ_REG(hw, REG_RXQ_CTRL, &data);
43250ddd
JY		 1161 data |= RXQ_CTRL_EN;
1162 AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
1163}
1164
1165static void atl1c_enable_tx_ctrl(struct atl1c_hw *hw)
1166{
1167 u32 data;
1168
1169 AT_READ_REG(hw, REG_TXQ_CTRL, &data);
1170 data |= TXQ_CTRL_EN;
1171 AT_WRITE_REG(hw, REG_TXQ_CTRL, data);
1172}
1173
1174/*
1175 * Reset the transmit and receive units; mask and clear all interrupts.
1176 * hw - Struct containing variables accessed by shared code
1177 * return : 0 or idle status (if error)
1178 */
1179static int atl1c_reset_mac(struct atl1c_hw *hw)
1180{
1181 struct atl1c_adapter *adapter = (struct atl1c_adapter *)hw->adapter;
1182 struct pci_dev *pdev = adapter->pdev;
8f574b35 1183 u32 master_ctrl_data = 0;
43250ddd
JY		 1184
1185 AT_WRITE_REG(hw, REG_IMR, 0);
1186 AT_WRITE_REG(hw, REG_ISR, ISR_DIS_INT);
1187
8f574b35 1188 atl1c_stop_mac(hw);
43250ddd
JY		 1189 /*
1190 * Issue Soft Reset to the MAC. This will reset the chip's
1191 * transmit, receive, DMA. It will not effect
1192 * the current PCI configuration. The global reset bit is self-
1193 * clearing, and should clear within a microsecond.
1194 */
8f574b35
JY		 1195 AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data);
1196 master_ctrl_data |= MASTER_CTRL_OOB_DIS_OFF;
1197 AT_WRITE_REGW(hw, REG_MASTER_CTRL, ((master_ctrl_data | MASTER_CTRL_SOFT_RST)
1198 & 0xFFFF));
1199
43250ddd
JY		 1200 AT_WRITE_FLUSH(hw);
1201 msleep(10);
1202 /* Wait at least 10ms for All module to be Idle */
c930a662
JP		 1203
1204 if (atl1c_wait_until_idle(hw)) {
43250ddd 1205 dev_err(&pdev->dev,
c930a662 1206 "MAC state machine can't be idle since"
43250ddd
JY		 1207 " disabled for 10ms second\n");
1208 return -1;
1209 }
1210 return 0;
1211}
1212
1213static void atl1c_disable_l0s_l1(struct atl1c_hw *hw)
1214{
1215 u32 pm_ctrl_data;
1216
1217 AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
1218 pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
1219 PM_CTRL_L1_ENTRY_TIMER_SHIFT);
1220 pm_ctrl_data &= ~PM_CTRL_CLK_SWH_L1;
1221 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1222 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1223 pm_ctrl_data &= ~PM_CTRL_MAC_ASPM_CHK;
1224 pm_ctrl_data &= ~PM_CTRL_SERDES_PD_EX_L1;
1225
1226 pm_ctrl_data |= PM_CTRL_SERDES_BUDS_RX_L1_EN;
1227 pm_ctrl_data |= PM_CTRL_SERDES_PLL_L1_EN;
1228 pm_ctrl_data |= PM_CTRL_SERDES_L1_EN;
1229 AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);
1230}
1231
1232/*
1233 * Set ASPM state.
1234 * Enable/disable L0s/L1 depend on link state.
1235 */
1236static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup)
1237{
1238 u32 pm_ctrl_data;
496c185c 1239 u32 link_ctrl_data;
8f574b35 1240 u32 link_l1_timer = 0xF;
43250ddd
JY		 1241
1242 AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
496c185c 1243 AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data);
496c185c 1244
8f574b35 1245 pm_ctrl_data &= ~PM_CTRL_SERDES_PD_EX_L1;
43250ddd
JY		 1246 pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
1247 PM_CTRL_L1_ENTRY_TIMER_SHIFT);
496c185c 1248 pm_ctrl_data &= ~(PM_CTRL_LCKDET_TIMER_MASK <<
8f574b35
JY		 1249 PM_CTRL_LCKDET_TIMER_SHIFT);
1250 pm_ctrl_data |= AT_LCKDET_TIMER << PM_CTRL_LCKDET_TIMER_SHIFT;
496c185c 1251
8f574b35
JY		 1252 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d ||
1253 hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) {
496c185c
LR		 1254 link_ctrl_data &= ~LINK_CTRL_EXT_SYNC;
1255 if (!(hw->ctrl_flags & ATL1C_APS_MODE_ENABLE)) {
8f574b35 1256 if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10)
496c185c
LR		 1257 link_ctrl_data |= LINK_CTRL_EXT_SYNC;
1258 }
1259
1260 AT_WRITE_REG(hw, REG_LINK_CTRL, link_ctrl_data);
1261
8f574b35
JY		 1262 pm_ctrl_data |= PM_CTRL_RCVR_WT_TIMER;
1263 pm_ctrl_data &= ~(PM_CTRL_PM_REQ_TIMER_MASK <<
1264 PM_CTRL_PM_REQ_TIMER_SHIFT);
1265 pm_ctrl_data |= AT_ASPM_L1_TIMER <<
1266 PM_CTRL_PM_REQ_TIMER_SHIFT;
496c185c
LR		 1267 pm_ctrl_data &= ~PM_CTRL_SA_DLY_EN;
1268 pm_ctrl_data &= ~PM_CTRL_HOTRST;
1269 pm_ctrl_data |= 1 << PM_CTRL_L1_ENTRY_TIMER_SHIFT;
1270 pm_ctrl_data |= PM_CTRL_SERDES_PD_EX_L1;
1271 }
8f574b35 1272 pm_ctrl_data |= PM_CTRL_MAC_ASPM_CHK;
43250ddd 1273 if (linkup) {
496c185c
LR		 1274 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1275 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1276 if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT)
1277 pm_ctrl_data |= PM_CTRL_ASPM_L1_EN;
1278 if (hw->ctrl_flags & ATL1C_ASPM_L0S_SUPPORT)
1279 pm_ctrl_data |= PM_CTRL_ASPM_L0S_EN;
1280
8f574b35
JY		 1281 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d ||
1282 hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) {
496c185c
LR		 1283 if (hw->nic_type == athr_l2c_b)
1284 if (!(hw->ctrl_flags & ATL1C_APS_MODE_ENABLE))
8f574b35 1285 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
496c185c
LR		 1286 pm_ctrl_data &= ~PM_CTRL_SERDES_L1_EN;
1287 pm_ctrl_data &= ~PM_CTRL_SERDES_PLL_L1_EN;
1288 pm_ctrl_data &= ~PM_CTRL_SERDES_BUDS_RX_L1_EN;
1289 pm_ctrl_data |= PM_CTRL_CLK_SWH_L1;
8f574b35
JY		 1290 if (hw->adapter->link_speed == SPEED_100 ||
1291 hw->adapter->link_speed == SPEED_1000) {
1292 pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
1293 PM_CTRL_L1_ENTRY_TIMER_SHIFT);
1294 if (hw->nic_type == athr_l2c_b)
1295 link_l1_timer = 7;
1296 else if (hw->nic_type == athr_l2c_b2 ||
1297 hw->nic_type == athr_l1d_2)
1298 link_l1_timer = 4;
1299 pm_ctrl_data |= link_l1_timer <<
1300 PM_CTRL_L1_ENTRY_TIMER_SHIFT;
496c185c
LR		 1301 }
1302 } else {
1303 pm_ctrl_data |= PM_CTRL_SERDES_L1_EN;
1304 pm_ctrl_data |= PM_CTRL_SERDES_PLL_L1_EN;
1305 pm_ctrl_data |= PM_CTRL_SERDES_BUDS_RX_L1_EN;
1306 pm_ctrl_data &= ~PM_CTRL_CLK_SWH_L1;
1307 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1308 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
43250ddd 1309
8f574b35 1310 }
43250ddd 1311 } else {
52fbc100 1312 pm_ctrl_data &= ~PM_CTRL_SERDES_L1_EN;
43250ddd
JY		 1313 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1314 pm_ctrl_data &= ~PM_CTRL_SERDES_PLL_L1_EN;
43250ddd
JY		 1315 pm_ctrl_data |= PM_CTRL_CLK_SWH_L1;
1316
1317 if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT)
1318 pm_ctrl_data |= PM_CTRL_ASPM_L1_EN;
1319 else
1320 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1321 }
43250ddd 1322 AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);
8f574b35
JY		 1323
1324 return;
43250ddd
JY		 1325}
1326
1327static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter)
1328{
1329 struct atl1c_hw *hw = &adapter->hw;
1330 struct net_device *netdev = adapter->netdev;
1331 u32 mac_ctrl_data;
1332
1333 mac_ctrl_data = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN;
1334 mac_ctrl_data |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
1335
1336 if (adapter->link_duplex == FULL_DUPLEX) {
1337 hw->mac_duplex = true;
1338 mac_ctrl_data |= MAC_CTRL_DUPLX;
1339 }
1340
1341 if (adapter->link_speed == SPEED_1000)
1342 hw->mac_speed = atl1c_mac_speed_1000;
1343 else
1344 hw->mac_speed = atl1c_mac_speed_10_100;
1345
1346 mac_ctrl_data |= (hw->mac_speed & MAC_CTRL_SPEED_MASK) <<
1347 MAC_CTRL_SPEED_SHIFT;
1348
1349 mac_ctrl_data |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
1350 mac_ctrl_data |= ((hw->preamble_len & MAC_CTRL_PRMLEN_MASK) <<
1351 MAC_CTRL_PRMLEN_SHIFT);
1352
46facce9 1353 __atl1c_vlan_mode(netdev->features, &mac_ctrl_data);
43250ddd
JY		 1354
1355 mac_ctrl_data |= MAC_CTRL_BC_EN;
1356 if (netdev->flags & IFF_PROMISC)
1357 mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
1358 if (netdev->flags & IFF_ALLMULTI)
1359 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
1360
1361 mac_ctrl_data |= MAC_CTRL_SINGLE_PAUSE_EN;
8f574b35
JY		 1362 if (hw->nic_type == athr_l1d || hw->nic_type == athr_l2c_b2 ||
1363 hw->nic_type == athr_l1d_2) {
496c185c
LR		 1364 mac_ctrl_data |= MAC_CTRL_SPEED_MODE_SW;
1365 mac_ctrl_data |= MAC_CTRL_HASH_ALG_CRC32;
1366 }
43250ddd
JY		 1367 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
1368}
1369
1370/*
1371 * atl1c_configure - Configure Transmit&Receive Unit after Reset
1372 * @adapter: board private structure
1373 *
1374 * Configure the Tx /Rx unit of the MAC after a reset.
1375 */
1376static int atl1c_configure(struct atl1c_adapter *adapter)
1377{
1378 struct atl1c_hw *hw = &adapter->hw;
1379 u32 master_ctrl_data = 0;
1380 u32 intr_modrt_data;
8f574b35 1381 u32 data;
43250ddd
JY		 1382
1383 /* clear interrupt status */
1384 AT_WRITE_REG(hw, REG_ISR, 0xFFFFFFFF);
1385 /* Clear any WOL status */
1386 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
1387 /* set Interrupt Clear Timer
1388 * HW will enable self to assert interrupt event to system after
1389 * waiting x-time for software to notify it accept interrupt.
1390 */
8f574b35
JY		 1391
1392 data = CLK_GATING_EN_ALL;
1393 if (hw->ctrl_flags & ATL1C_CLK_GATING_EN) {
1394 if (hw->nic_type == athr_l2c_b)
1395 data &= ~CLK_GATING_RXMAC_EN;
1396 } else
1397 data = 0;
1398 AT_WRITE_REG(hw, REG_CLK_GATING_CTRL, data);
1399
43250ddd
JY		 1400 AT_WRITE_REG(hw, REG_INT_RETRIG_TIMER,
1401 hw->ict & INT_RETRIG_TIMER_MASK);
1402
1403 atl1c_configure_des_ring(adapter);
1404
1405 if (hw->ctrl_flags & ATL1C_INTR_MODRT_ENABLE) {
1406 intr_modrt_data = (hw->tx_imt & IRQ_MODRT_TIMER_MASK) <<
1407 IRQ_MODRT_TX_TIMER_SHIFT;
1408 intr_modrt_data |= (hw->rx_imt & IRQ_MODRT_TIMER_MASK) <<
1409 IRQ_MODRT_RX_TIMER_SHIFT;
1410 AT_WRITE_REG(hw, REG_IRQ_MODRT_TIMER_INIT, intr_modrt_data);
1411 master_ctrl_data |=
1412 MASTER_CTRL_TX_ITIMER_EN | MASTER_CTRL_RX_ITIMER_EN;
1413 }
1414
1415 if (hw->ctrl_flags & ATL1C_INTR_CLEAR_ON_READ)
1416 master_ctrl_data |= MASTER_CTRL_INT_RDCLR;
1417
8f574b35 1418 master_ctrl_data |= MASTER_CTRL_SA_TIMER_EN;
43250ddd
JY		 1419 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
1420
8d5c6836
HX		 1421 AT_WRITE_REG(hw, REG_SMB_STAT_TIMER,
1422 hw->smb_timer & SMB_STAT_TIMER_MASK);
43250ddd 1423
43250ddd
JY		 1424 /* set MTU */
1425 AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN +
1426 VLAN_HLEN + ETH_FCS_LEN);
43250ddd
JY		 1427
1428 atl1c_configure_tx(adapter);
1429 atl1c_configure_rx(adapter);
43250ddd
JY		 1430 atl1c_configure_dma(adapter);
1431
1432 return 0;
1433}
1434
1435static void atl1c_update_hw_stats(struct atl1c_adapter *adapter)
1436{
1437 u16 hw_reg_addr = 0;
1438 unsigned long *stats_item = NULL;
1439 u32 data;
1440
1441 /* update rx status */
1442 hw_reg_addr = REG_MAC_RX_STATUS_BIN;
1443 stats_item = &adapter->hw_stats.rx_ok;
1444 while (hw_reg_addr <= REG_MAC_RX_STATUS_END) {
1445 AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
1446 *stats_item += data;
1447 stats_item++;
1448 hw_reg_addr += 4;
1449 }
1450/* update tx status */
1451 hw_reg_addr = REG_MAC_TX_STATUS_BIN;
1452 stats_item = &adapter->hw_stats.tx_ok;
1453 while (hw_reg_addr <= REG_MAC_TX_STATUS_END) {
1454 AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
1455 *stats_item += data;
1456 stats_item++;
1457 hw_reg_addr += 4;
1458 }
1459}
1460
1461/*
1462 * atl1c_get_stats - Get System Network Statistics
1463 * @netdev: network interface device structure
1464 *
1465 * Returns the address of the device statistics structure.
1466 * The statistics are actually updated from the timer callback.
1467 */
1468static struct net_device_stats *atl1c_get_stats(struct net_device *netdev)
1469{
1470 struct atl1c_adapter *adapter = netdev_priv(netdev);
1471 struct atl1c_hw_stats *hw_stats = &adapter->hw_stats;
a2c483a1 1472 struct net_device_stats *net_stats = &netdev->stats;
43250ddd
JY		 1473
1474 atl1c_update_hw_stats(adapter);
1475 net_stats->rx_packets = hw_stats->rx_ok;
1476 net_stats->tx_packets = hw_stats->tx_ok;
1477 net_stats->rx_bytes = hw_stats->rx_byte_cnt;
1478 net_stats->tx_bytes = hw_stats->tx_byte_cnt;
1479 net_stats->multicast = hw_stats->rx_mcast;
1480 net_stats->collisions = hw_stats->tx_1_col +
1481 hw_stats->tx_2_col * 2 +
1482 hw_stats->tx_late_col + hw_stats->tx_abort_col;
1483 net_stats->rx_errors = hw_stats->rx_frag + hw_stats->rx_fcs_err +
1484 hw_stats->rx_len_err + hw_stats->rx_sz_ov +
1485 hw_stats->rx_rrd_ov + hw_stats->rx_align_err;
1486 net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov;
1487 net_stats->rx_length_errors = hw_stats->rx_len_err;
1488 net_stats->rx_crc_errors = hw_stats->rx_fcs_err;
1489 net_stats->rx_frame_errors = hw_stats->rx_align_err;
1490 net_stats->rx_over_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
1491
1492 net_stats->rx_missed_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
1493
1494 net_stats->tx_errors = hw_stats->tx_late_col + hw_stats->tx_abort_col +
1495 hw_stats->tx_underrun + hw_stats->tx_trunc;
1496 net_stats->tx_fifo_errors = hw_stats->tx_underrun;
1497 net_stats->tx_aborted_errors = hw_stats->tx_abort_col;
1498 net_stats->tx_window_errors = hw_stats->tx_late_col;
1499
a2c483a1 1500 return net_stats;
43250ddd
JY		 1501}
1502
1503static inline void atl1c_clear_phy_int(struct atl1c_adapter *adapter)
1504{
1505 u16 phy_data;
1506
1507 spin_lock(&adapter->mdio_lock);
1508 atl1c_read_phy_reg(&adapter->hw, MII_ISR, &phy_data);
1509 spin_unlock(&adapter->mdio_lock);
1510}
1511
1512static bool atl1c_clean_tx_irq(struct atl1c_adapter *adapter,
1513 enum atl1c_trans_queue type)
1514{
1515 struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
1516 &adapter->tpd_ring[type];
1517 struct atl1c_buffer *buffer_info;
c6060be4 1518 struct pci_dev *pdev = adapter->pdev;
43250ddd
JY		 1519 u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
1520 u16 hw_next_to_clean;
0af48336 1521 u16 reg;
43250ddd 1522
0af48336 1523 reg = type == atl1c_trans_high ? REG_TPD_PRI1_CIDX : REG_TPD_PRI0_CIDX;
43250ddd 1524
0af48336 1525 AT_READ_REGW(&adapter->hw, reg, &hw_next_to_clean);
43250ddd
JY		 1526
1527 while (next_to_clean != hw_next_to_clean) {
1528 buffer_info = &tpd_ring->buffer_info[next_to_clean];
c6060be4 1529 atl1c_clean_buffer(pdev, buffer_info, 1);
43250ddd
JY		 1530 if (++next_to_clean == tpd_ring->count)
1531 next_to_clean = 0;
1532 atomic_set(&tpd_ring->next_to_clean, next_to_clean);
1533 }
1534
1535 if (netif_queue_stopped(adapter->netdev) &&
1536 netif_carrier_ok(adapter->netdev)) {
1537 netif_wake_queue(adapter->netdev);
1538 }
1539
1540 return true;
1541}
1542
1543/*
1544 * atl1c_intr - Interrupt Handler
1545 * @irq: interrupt number
1546 * @data: pointer to a network interface device structure
1547 * @pt_regs: CPU registers structure
1548 */
1549static irqreturn_t atl1c_intr(int irq, void *data)
1550{
1551 struct net_device *netdev = data;
1552 struct atl1c_adapter *adapter = netdev_priv(netdev);
1553 struct pci_dev *pdev = adapter->pdev;
1554 struct atl1c_hw *hw = &adapter->hw;
1555 int max_ints = AT_MAX_INT_WORK;
1556 int handled = IRQ_NONE;
1557 u32 status;
1558 u32 reg_data;
1559
1560 do {
1561 AT_READ_REG(hw, REG_ISR, &reg_data);
1562 status = reg_data & hw->intr_mask;
1563
1564 if (status == 0 || (status & ISR_DIS_INT) != 0) {
1565 if (max_ints != AT_MAX_INT_WORK)
1566 handled = IRQ_HANDLED;
1567 break;
1568 }
1569 /* link event */
1570 if (status & ISR_GPHY)
1571 atl1c_clear_phy_int(adapter);
1572 /* Ack ISR */
1573 AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);
1574 if (status & ISR_RX_PKT) {
1575 if (likely(napi_schedule_prep(&adapter->napi))) {
1576 hw->intr_mask &= ~ISR_RX_PKT;
1577 AT_WRITE_REG(hw, REG_IMR, hw->intr_mask);
1578 __napi_schedule(&adapter->napi);
1579 }
1580 }
1581 if (status & ISR_TX_PKT)
1582 atl1c_clean_tx_irq(adapter, atl1c_trans_normal);
1583
1584 handled = IRQ_HANDLED;
1585 /* check if PCIE PHY Link down */
1586 if (status & ISR_ERROR) {
1587 if (netif_msg_hw(adapter))
1588 dev_err(&pdev->dev,
1589 "atl1c hardware error (status = 0x%x)\n",
1590 status & ISR_ERROR);
1591 /* reset MAC */
78315457 1592 set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event);
cb190546 1593 schedule_work(&adapter->common_task);
8f574b35 1594 return IRQ_HANDLED;
43250ddd
JY		 1595 }
1596
1597 if (status & ISR_OVER)
1598 if (netif_msg_intr(adapter))
1599 dev_warn(&pdev->dev,
af901ca1 1600 "TX/RX overflow (status = 0x%x)\n",
43250ddd
JY		 1601 status & ISR_OVER);
1602
1603 /* link event */
1604 if (status & (ISR_GPHY | ISR_MANUAL)) {
a2c483a1 1605 netdev->stats.tx_carrier_errors++;
43250ddd
JY		 1606 atl1c_link_chg_event(adapter);
1607 break;
1608 }
1609
1610 } while (--max_ints > 0);
1611 /* re-enable Interrupt*/
1612 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
1613 return handled;
1614}
1615
1616static inline void atl1c_rx_checksum(struct atl1c_adapter *adapter,
1617 struct sk_buff *skb, struct atl1c_recv_ret_status *prrs)
1618{
1619 /*
1620 * The pid field in RRS in not correct sometimes, so we
1621 * cannot figure out if the packet is fragmented or not,
1622 * so we tell the KERNEL CHECKSUM_NONE
1623 */
bc8acf2c 1624 skb_checksum_none_assert(skb);
43250ddd
JY		 1625}
1626
9f1fd0ef 1627static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter)
43250ddd 1628{
9f1fd0ef 1629 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
43250ddd
JY		 1630 struct pci_dev *pdev = adapter->pdev;
1631 struct atl1c_buffer *buffer_info, *next_info;
1632 struct sk_buff *skb;
1633 void *vir_addr = NULL;
1634 u16 num_alloc = 0;
1635 u16 rfd_next_to_use, next_next;
1636 struct atl1c_rx_free_desc *rfd_desc;
1637
1638 next_next = rfd_next_to_use = rfd_ring->next_to_use;
1639 if (++next_next == rfd_ring->count)
1640 next_next = 0;
1641 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1642 next_info = &rfd_ring->buffer_info[next_next];
1643
c6060be4 1644 while (next_info->flags & ATL1C_BUFFER_FREE) {
43250ddd
JY		 1645 rfd_desc = ATL1C_RFD_DESC(rfd_ring, rfd_next_to_use);
1646
1d266430 1647 skb = netdev_alloc_skb(adapter->netdev, adapter->rx_buffer_len);
43250ddd
JY		 1648 if (unlikely(!skb)) {
1649 if (netif_msg_rx_err(adapter))
1650 dev_warn(&pdev->dev, "alloc rx buffer failed\n");
1651 break;
1652 }
1653
1654 /*
1655 * Make buffer alignment 2 beyond a 16 byte boundary
1656 * this will result in a 16 byte aligned IP header after
1657 * the 14 byte MAC header is removed
1658 */
1659 vir_addr = skb->data;
c6060be4 1660 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
43250ddd
JY		 1661 buffer_info->skb = skb;
1662 buffer_info->length = adapter->rx_buffer_len;
1663 buffer_info->dma = pci_map_single(pdev, vir_addr,
1664 buffer_info->length,
1665 PCI_DMA_FROMDEVICE);
4b45e342
JY		 1666 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
1667 ATL1C_PCIMAP_FROMDEVICE);
43250ddd
JY		 1668 rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
1669 rfd_next_to_use = next_next;
1670 if (++next_next == rfd_ring->count)
1671 next_next = 0;
1672 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1673 next_info = &rfd_ring->buffer_info[next_next];
1674 num_alloc++;
1675 }
1676
1677 if (num_alloc) {
1678 /* TODO: update mailbox here */
1679 wmb();
1680 rfd_ring->next_to_use = rfd_next_to_use;
9f1fd0ef 1681 AT_WRITE_REG(&adapter->hw, REG_MB_RFD0_PROD_IDX,
43250ddd
JY		 1682 rfd_ring->next_to_use & MB_RFDX_PROD_IDX_MASK);
1683 }
1684
1685 return num_alloc;
1686}
1687
1688static void atl1c_clean_rrd(struct atl1c_rrd_ring *rrd_ring,
1689 struct atl1c_recv_ret_status *rrs, u16 num)
1690{
1691 u16 i;
1692 /* the relationship between rrd and rfd is one map one */
1693 for (i = 0; i < num; i++, rrs = ATL1C_RRD_DESC(rrd_ring,
1694 rrd_ring->next_to_clean)) {
1695 rrs->word3 &= ~RRS_RXD_UPDATED;
1696 if (++rrd_ring->next_to_clean == rrd_ring->count)
1697 rrd_ring->next_to_clean = 0;
1698 }
1699}
1700
1701static void atl1c_clean_rfd(struct atl1c_rfd_ring *rfd_ring,
1702 struct atl1c_recv_ret_status *rrs, u16 num)
1703{
1704 u16 i;
1705 u16 rfd_index;
1706 struct atl1c_buffer *buffer_info = rfd_ring->buffer_info;
1707
1708 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
1709 RRS_RX_RFD_INDEX_MASK;
1710 for (i = 0; i < num; i++) {
1711 buffer_info[rfd_index].skb = NULL;
c6060be4
JY		 1712 ATL1C_SET_BUFFER_STATE(&buffer_info[rfd_index],
1713 ATL1C_BUFFER_FREE);
43250ddd
JY		 1714 if (++rfd_index == rfd_ring->count)
1715 rfd_index = 0;
1716 }
1717 rfd_ring->next_to_clean = rfd_index;
1718}
1719
9f1fd0ef 1720static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter,
43250ddd
JY		 1721 int *work_done, int work_to_do)
1722{
1723 u16 rfd_num, rfd_index;
1724 u16 count = 0;
1725 u16 length;
1726 struct pci_dev *pdev = adapter->pdev;
1727 struct net_device *netdev = adapter->netdev;
9f1fd0ef
HX		 1728 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
1729 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
43250ddd
JY		 1730 struct sk_buff *skb;
1731 struct atl1c_recv_ret_status *rrs;
1732 struct atl1c_buffer *buffer_info;
1733
1734 while (1) {
1735 if (*work_done >= work_to_do)
1736 break;
1737 rrs = ATL1C_RRD_DESC(rrd_ring, rrd_ring->next_to_clean);
1738 if (likely(RRS_RXD_IS_VALID(rrs->word3))) {
1739 rfd_num = (rrs->word0 >> RRS_RX_RFD_CNT_SHIFT) &
1740 RRS_RX_RFD_CNT_MASK;
37b76c69 1741 if (unlikely(rfd_num != 1))
43250ddd
JY		 1742 /* TODO support mul rfd*/
1743 if (netif_msg_rx_err(adapter))
1744 dev_warn(&pdev->dev,
1745 "Multi rfd not support yet!\n");
1746 goto rrs_checked;
1747 } else {
1748 break;
1749 }
1750rrs_checked:
1751 atl1c_clean_rrd(rrd_ring, rrs, rfd_num);
1752 if (rrs->word3 & (RRS_RX_ERR_SUM | RRS_802_3_LEN_ERR)) {
1753 atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
1754 if (netif_msg_rx_err(adapter))
1755 dev_warn(&pdev->dev,
1756 "wrong packet! rrs word3 is %x\n",
1757 rrs->word3);
1758 continue;
1759 }
1760
1761 length = le16_to_cpu((rrs->word3 >> RRS_PKT_SIZE_SHIFT) &
1762 RRS_PKT_SIZE_MASK);
1763 /* Good Receive */
1764 if (likely(rfd_num == 1)) {
1765 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
1766 RRS_RX_RFD_INDEX_MASK;
1767 buffer_info = &rfd_ring->buffer_info[rfd_index];
1768 pci_unmap_single(pdev, buffer_info->dma,
1769 buffer_info->length, PCI_DMA_FROMDEVICE);
1770 skb = buffer_info->skb;
1771 } else {
1772 /* TODO */
1773 if (netif_msg_rx_err(adapter))
1774 dev_warn(&pdev->dev,
1775 "Multi rfd not support yet!\n");
1776 break;
1777 }
1778 atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
1779 skb_put(skb, length - ETH_FCS_LEN);
1780 skb->protocol = eth_type_trans(skb, netdev);
43250ddd 1781 atl1c_rx_checksum(adapter, skb, rrs);
46facce9 1782 if (rrs->word3 & RRS_VLAN_INS) {
43250ddd
JY		 1783 u16 vlan;
1784
1785 AT_TAG_TO_VLAN(rrs->vlan_tag, vlan);
1786 vlan = le16_to_cpu(vlan);
46facce9
JP		 1787 __vlan_hwaccel_put_tag(skb, vlan);
1788 }
1789 netif_receive_skb(skb);
43250ddd 1790
43250ddd
JY		 1791 (*work_done)++;
1792 count++;
1793 }
1794 if (count)
9f1fd0ef 1795 atl1c_alloc_rx_buffer(adapter);
43250ddd
JY		 1796}
1797
1798/*
1799 * atl1c_clean - NAPI Rx polling callback
1800 * @adapter: board private structure
1801 */
1802static int atl1c_clean(struct napi_struct *napi, int budget)
1803{
1804 struct atl1c_adapter *adapter =
1805 container_of(napi, struct atl1c_adapter, napi);
1806 int work_done = 0;
1807
1808 /* Keep link state information with original netdev */
1809 if (!netif_carrier_ok(adapter->netdev))
1810 goto quit_polling;
1811 /* just enable one RXQ */
9f1fd0ef 1812 atl1c_clean_rx_irq(adapter, &work_done, budget);
43250ddd
JY		 1813
1814 if (work_done < budget) {
1815quit_polling:
1816 napi_complete(napi);
1817 adapter->hw.intr_mask |= ISR_RX_PKT;
1818 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
1819 }
1820 return work_done;
1821}
1822
1823#ifdef CONFIG_NET_POLL_CONTROLLER
1824
1825/*
1826 * Polling 'interrupt' - used by things like netconsole to send skbs
1827 * without having to re-enable interrupts. It's not called while
1828 * the interrupt routine is executing.
1829 */
1830static void atl1c_netpoll(struct net_device *netdev)
1831{
1832 struct atl1c_adapter *adapter = netdev_priv(netdev);
1833
1834 disable_irq(adapter->pdev->irq);
1835 atl1c_intr(adapter->pdev->irq, netdev);
1836 enable_irq(adapter->pdev->irq);
1837}
1838#endif
1839
1840static inline u16 atl1c_tpd_avail(struct atl1c_adapter *adapter, enum atl1c_trans_queue type)
1841{
1842 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
1843 u16 next_to_use = 0;
1844 u16 next_to_clean = 0;
1845
1846 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
1847 next_to_use = tpd_ring->next_to_use;
1848
1849 return (u16)(next_to_clean > next_to_use) ?
1850 (next_to_clean - next_to_use - 1) :
1851 (tpd_ring->count + next_to_clean - next_to_use - 1);
1852}
1853
1854/*
1855 * get next usable tpd
1856 * Note: should call atl1c_tdp_avail to make sure
1857 * there is enough tpd to use
1858 */
1859static struct atl1c_tpd_desc *atl1c_get_tpd(struct atl1c_adapter *adapter,
1860 enum atl1c_trans_queue type)
1861{
1862 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
1863 struct atl1c_tpd_desc *tpd_desc;
1864 u16 next_to_use = 0;
1865
1866 next_to_use = tpd_ring->next_to_use;
1867 if (++tpd_ring->next_to_use == tpd_ring->count)
1868 tpd_ring->next_to_use = 0;
1869 tpd_desc = ATL1C_TPD_DESC(tpd_ring, next_to_use);
1870 memset(tpd_desc, 0, sizeof(struct atl1c_tpd_desc));
1871 return tpd_desc;
1872}
1873
1874static struct atl1c_buffer *
1875atl1c_get_tx_buffer(struct atl1c_adapter *adapter, struct atl1c_tpd_desc *tpd)
1876{
1877 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
1878
1879 return &tpd_ring->buffer_info[tpd -
1880 (struct atl1c_tpd_desc *)tpd_ring->desc];
1881}
1882
1883/* Calculate the transmit packet descript needed*/
1884static u16 atl1c_cal_tpd_req(const struct sk_buff *skb)
1885{
1886 u16 tpd_req;
1887 u16 proto_hdr_len = 0;
1888
1889 tpd_req = skb_shinfo(skb)->nr_frags + 1;
1890
1891 if (skb_is_gso(skb)) {
1892 proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
1893 if (proto_hdr_len < skb_headlen(skb))
1894 tpd_req++;
1895 if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6)
1896 tpd_req++;
1897 }
1898 return tpd_req;
1899}
1900
1901static int atl1c_tso_csum(struct atl1c_adapter *adapter,
1902 struct sk_buff *skb,
1903 struct atl1c_tpd_desc **tpd,
1904 enum atl1c_trans_queue type)
1905{
1906 struct pci_dev *pdev = adapter->pdev;
1907 u8 hdr_len;
1908 u32 real_len;
1909 unsigned short offload_type;
1910 int err;
1911
1912 if (skb_is_gso(skb)) {
1913 if (skb_header_cloned(skb)) {
1914 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
1915 if (unlikely(err))
1916 return -1;
1917 }
1918 offload_type = skb_shinfo(skb)->gso_type;
1919
1920 if (offload_type & SKB_GSO_TCPV4) {
1921 real_len = (((unsigned char *)ip_hdr(skb) - skb->data)
1922 + ntohs(ip_hdr(skb)->tot_len));
1923
1924 if (real_len < skb->len)
1925 pskb_trim(skb, real_len);
1926
1927 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
1928 if (unlikely(skb->len == hdr_len)) {
1929 /* only xsum need */
1930 if (netif_msg_tx_queued(adapter))
1931 dev_warn(&pdev->dev,
1932 "IPV4 tso with zero data??\n");
1933 goto check_sum;
1934 } else {
1935 ip_hdr(skb)->check = 0;
1936 tcp_hdr(skb)->check = ~csum_tcpudp_magic(
1937 ip_hdr(skb)->saddr,
1938 ip_hdr(skb)->daddr,
1939 0, IPPROTO_TCP, 0);
1940 (*tpd)->word1 |= 1 << TPD_IPV4_PACKET_SHIFT;
1941 }
1942 }
1943
1944 if (offload_type & SKB_GSO_TCPV6) {
1945 struct atl1c_tpd_ext_desc *etpd =
1946 *(struct atl1c_tpd_ext_desc **)(tpd);
1947
1948 memset(etpd, 0, sizeof(struct atl1c_tpd_ext_desc));
1949 *tpd = atl1c_get_tpd(adapter, type);
1950 ipv6_hdr(skb)->payload_len = 0;
1951 /* check payload == 0 byte ? */
1952 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
1953 if (unlikely(skb->len == hdr_len)) {
1954 /* only xsum need */
1955 if (netif_msg_tx_queued(adapter))
1956 dev_warn(&pdev->dev,
1957 "IPV6 tso with zero data??\n");
1958 goto check_sum;
1959 } else
1960 tcp_hdr(skb)->check = ~csum_ipv6_magic(
1961 &ipv6_hdr(skb)->saddr,
1962 &ipv6_hdr(skb)->daddr,
1963 0, IPPROTO_TCP, 0);
1964 etpd->word1 |= 1 << TPD_LSO_EN_SHIFT;
1965 etpd->word1 |= 1 << TPD_LSO_VER_SHIFT;
1966 etpd->pkt_len = cpu_to_le32(skb->len);
1967 (*tpd)->word1 |= 1 << TPD_LSO_VER_SHIFT;
1968 }
1969
1970 (*tpd)->word1 |= 1 << TPD_LSO_EN_SHIFT;
1971 (*tpd)->word1 |= (skb_transport_offset(skb) & TPD_TCPHDR_OFFSET_MASK) <<
1972 TPD_TCPHDR_OFFSET_SHIFT;
1973 (*tpd)->word1 |= (skb_shinfo(skb)->gso_size & TPD_MSS_MASK) <<
1974 TPD_MSS_SHIFT;
1975 return 0;
1976 }
1977
1978check_sum:
1979 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
1980 u8 css, cso;
0d0b1672 1981 cso = skb_checksum_start_offset(skb);
43250ddd
JY		 1982
1983 if (unlikely(cso & 0x1)) {
1984 if (netif_msg_tx_err(adapter))
1985 dev_err(&adapter->pdev->dev,
1986 "payload offset should not an event number\n");
1987 return -1;
1988 } else {
1989 css = cso + skb->csum_offset;
1990
1991 (*tpd)->word1 |= ((cso >> 1) & TPD_PLOADOFFSET_MASK) <<
1992 TPD_PLOADOFFSET_SHIFT;
1993 (*tpd)->word1 |= ((css >> 1) & TPD_CCSUM_OFFSET_MASK) <<
1994 TPD_CCSUM_OFFSET_SHIFT;
1995 (*tpd)->word1 |= 1 << TPD_CCSUM_EN_SHIFT;
1996 }
1997 }
1998 return 0;
1999}
2000
2001static void atl1c_tx_map(struct atl1c_adapter *adapter,
2002 struct sk_buff *skb, struct atl1c_tpd_desc *tpd,
2003 enum atl1c_trans_queue type)
2004{
2005 struct atl1c_tpd_desc *use_tpd = NULL;
2006 struct atl1c_buffer *buffer_info = NULL;
2007 u16 buf_len = skb_headlen(skb);
2008 u16 map_len = 0;
2009 u16 mapped_len = 0;
2010 u16 hdr_len = 0;
2011 u16 nr_frags;
2012 u16 f;
2013 int tso;
2014
2015 nr_frags = skb_shinfo(skb)->nr_frags;
2016 tso = (tpd->word1 >> TPD_LSO_EN_SHIFT) & TPD_LSO_EN_MASK;
2017 if (tso) {
2018 /* TSO */
2019 map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
2020 use_tpd = tpd;
2021
2022 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2023 buffer_info->length = map_len;
2024 buffer_info->dma = pci_map_single(adapter->pdev,
2025 skb->data, hdr_len, PCI_DMA_TODEVICE);
c6060be4 2026 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
4b45e342
JY		 2027 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
2028 ATL1C_PCIMAP_TODEVICE);
43250ddd
JY		 2029 mapped_len += map_len;
2030 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2031 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2032 }
2033
2034 if (mapped_len < buf_len) {
2035 /* mapped_len == 0, means we should use the first tpd,
2036 which is given by caller */
2037 if (mapped_len == 0)
2038 use_tpd = tpd;
2039 else {
2040 use_tpd = atl1c_get_tpd(adapter, type);
43250ddd
JY		 2041 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
2042 }
2043 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2044 buffer_info->length = buf_len - mapped_len;
2045 buffer_info->dma =
2046 pci_map_single(adapter->pdev, skb->data + mapped_len,
2047 buffer_info->length, PCI_DMA_TODEVICE);
c6060be4 2048 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
4b45e342
JY		 2049 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
2050 ATL1C_PCIMAP_TODEVICE);
43250ddd
JY		 2051 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2052 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2053 }
2054
2055 for (f = 0; f < nr_frags; f++) {
2056 struct skb_frag_struct *frag;
2057
2058 frag = &skb_shinfo(skb)->frags[f];
2059
2060 use_tpd = atl1c_get_tpd(adapter, type);
2061 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
2062
2063 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
9e903e08 2064 buffer_info->length = skb_frag_size(frag);
8d1bb865
IC		 2065 buffer_info->dma = skb_frag_dma_map(&adapter->pdev->dev,
2066 frag, 0,
2067 buffer_info->length,
5d6bcdfe 2068 DMA_TO_DEVICE);
c6060be4 2069 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
4b45e342
JY		 2070 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_PAGE,
2071 ATL1C_PCIMAP_TODEVICE);
43250ddd
JY		 2072 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2073 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2074 }
2075
2076 /* The last tpd */
2077 use_tpd->word1 |= 1 << TPD_EOP_SHIFT;
2078 /* The last buffer info contain the skb address,
2079 so it will be free after unmap */
2080 buffer_info->skb = skb;
2081}
2082
2083static void atl1c_tx_queue(struct atl1c_adapter *adapter, struct sk_buff *skb,
2084 struct atl1c_tpd_desc *tpd, enum atl1c_trans_queue type)
2085{
2086 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
0af48336 2087 u16 reg;
43250ddd 2088
0af48336
HX		 2089 reg = type == atl1c_trans_high ? REG_TPD_PRI1_PIDX : REG_TPD_PRI0_PIDX;
2090 AT_WRITE_REGW(&adapter->hw, reg, tpd_ring->next_to_use);
43250ddd
JY		 2091}
2092
61357325
SH		 2093static netdev_tx_t atl1c_xmit_frame(struct sk_buff *skb,
2094 struct net_device *netdev)
43250ddd
JY		 2095{
2096 struct atl1c_adapter *adapter = netdev_priv(netdev);
2097 unsigned long flags;
2098 u16 tpd_req = 1;
2099 struct atl1c_tpd_desc *tpd;
2100 enum atl1c_trans_queue type = atl1c_trans_normal;
2101
2102 if (test_bit(__AT_DOWN, &adapter->flags)) {
2103 dev_kfree_skb_any(skb);
2104 return NETDEV_TX_OK;
2105 }
2106
2107 tpd_req = atl1c_cal_tpd_req(skb);
2108 if (!spin_trylock_irqsave(&adapter->tx_lock, flags)) {
2109 if (netif_msg_pktdata(adapter))
2110 dev_info(&adapter->pdev->dev, "tx locked\n");
2111 return NETDEV_TX_LOCKED;
2112 }
43250ddd
JY		 2113
2114 if (atl1c_tpd_avail(adapter, type) < tpd_req) {
2115 /* no enough descriptor, just stop queue */
2116 netif_stop_queue(netdev);
2117 spin_unlock_irqrestore(&adapter->tx_lock, flags);
2118 return NETDEV_TX_BUSY;
2119 }
2120
2121 tpd = atl1c_get_tpd(adapter, type);
2122
2123 /* do TSO and check sum */
2124 if (atl1c_tso_csum(adapter, skb, &tpd, type) != 0) {
2125 spin_unlock_irqrestore(&adapter->tx_lock, flags);
2126 dev_kfree_skb_any(skb);
2127 return NETDEV_TX_OK;
2128 }
2129
eab6d18d 2130 if (unlikely(vlan_tx_tag_present(skb))) {
43250ddd
JY		 2131 u16 vlan = vlan_tx_tag_get(skb);
2132 __le16 tag;
2133
2134 vlan = cpu_to_le16(vlan);
2135 AT_VLAN_TO_TAG(vlan, tag);
2136 tpd->word1 |= 1 << TPD_INS_VTAG_SHIFT;
2137 tpd->vlan_tag = tag;
2138 }
2139
2140 if (skb_network_offset(skb) != ETH_HLEN)
2141 tpd->word1 |= 1 << TPD_ETH_TYPE_SHIFT; /* Ethernet frame */
2142
2143 atl1c_tx_map(adapter, skb, tpd, type);
2144 atl1c_tx_queue(adapter, skb, tpd, type);
2145
43250ddd
JY		 2146 spin_unlock_irqrestore(&adapter->tx_lock, flags);
2147 return NETDEV_TX_OK;
2148}
2149
2150static void atl1c_free_irq(struct atl1c_adapter *adapter)
2151{
2152 struct net_device *netdev = adapter->netdev;
2153
2154 free_irq(adapter->pdev->irq, netdev);
2155
2156 if (adapter->have_msi)
2157 pci_disable_msi(adapter->pdev);
2158}
2159
2160static int atl1c_request_irq(struct atl1c_adapter *adapter)
2161{
2162 struct pci_dev *pdev = adapter->pdev;
2163 struct net_device *netdev = adapter->netdev;
2164 int flags = 0;
2165 int err = 0;
2166
2167 adapter->have_msi = true;
2168 err = pci_enable_msi(adapter->pdev);
2169 if (err) {
2170 if (netif_msg_ifup(adapter))
2171 dev_err(&pdev->dev,
2172 "Unable to allocate MSI interrupt Error: %d\n",
2173 err);
2174 adapter->have_msi = false;
93f7fab4 2175 }
43250ddd
JY		 2176
2177 if (!adapter->have_msi)
2178 flags |= IRQF_SHARED;
9aff7e92 2179 err = request_irq(adapter->pdev->irq, atl1c_intr, flags,
43250ddd
JY		 2180 netdev->name, netdev);
2181 if (err) {
2182 if (netif_msg_ifup(adapter))
2183 dev_err(&pdev->dev,
2184 "Unable to allocate interrupt Error: %d\n",
2185 err);
2186 if (adapter->have_msi)
2187 pci_disable_msi(adapter->pdev);
2188 return err;
2189 }
2190 if (netif_msg_ifup(adapter))
2191 dev_dbg(&pdev->dev, "atl1c_request_irq OK\n");
2192 return err;
2193}
2194
0fb1e54e 2195static int atl1c_up(struct atl1c_adapter *adapter)
43250ddd
JY		 2196{
2197 struct net_device *netdev = adapter->netdev;
2198 int num;
2199 int err;
43250ddd
JY		 2200
2201 netif_carrier_off(netdev);
2202 atl1c_init_ring_ptrs(adapter);
2203 atl1c_set_multi(netdev);
2204 atl1c_restore_vlan(adapter);
2205
9f1fd0ef
HX		 2206 num = atl1c_alloc_rx_buffer(adapter);
2207 if (unlikely(num == 0)) {
2208 err = -ENOMEM;
2209 goto err_alloc_rx;
43250ddd
JY		 2210 }
2211
2212 if (atl1c_configure(adapter)) {
2213 err = -EIO;
2214 goto err_up;
2215 }
2216
2217 err = atl1c_request_irq(adapter);
2218 if (unlikely(err))
2219 goto err_up;
2220
2221 clear_bit(__AT_DOWN, &adapter->flags);
2222 napi_enable(&adapter->napi);
2223 atl1c_irq_enable(adapter);
2224 atl1c_check_link_status(adapter);
2225 netif_start_queue(netdev);
2226 return err;
2227
2228err_up:
2229err_alloc_rx:
2230 atl1c_clean_rx_ring(adapter);
2231 return err;
2232}
2233
0fb1e54e 2234static void atl1c_down(struct atl1c_adapter *adapter)
43250ddd
JY		 2235{
2236 struct net_device *netdev = adapter->netdev;
2237
2238 atl1c_del_timer(adapter);
cb190546 2239 adapter->work_event = 0; /* clear all event */
43250ddd
JY		 2240 /* signal that we're down so the interrupt handler does not
2241 * reschedule our watchdog timer */
2242 set_bit(__AT_DOWN, &adapter->flags);
2243 netif_carrier_off(netdev);
2244 napi_disable(&adapter->napi);
2245 atl1c_irq_disable(adapter);
2246 atl1c_free_irq(adapter);
43250ddd
JY		 2247 /* reset MAC to disable all RX/TX */
2248 atl1c_reset_mac(&adapter->hw);
2249 msleep(1);
2250
2251 adapter->link_speed = SPEED_0;
2252 adapter->link_duplex = -1;
2253 atl1c_clean_tx_ring(adapter, atl1c_trans_normal);
2254 atl1c_clean_tx_ring(adapter, atl1c_trans_high);
2255 atl1c_clean_rx_ring(adapter);
2256}
2257
2258/*
2259 * atl1c_open - Called when a network interface is made active
2260 * @netdev: network interface device structure
2261 *
2262 * Returns 0 on success, negative value on failure
2263 *
2264 * The open entry point is called when a network interface is made
2265 * active by the system (IFF_UP). At this point all resources needed
2266 * for transmit and receive operations are allocated, the interrupt
2267 * handler is registered with the OS, the watchdog timer is started,
2268 * and the stack is notified that the interface is ready.
2269 */
2270static int atl1c_open(struct net_device *netdev)
2271{
2272 struct atl1c_adapter *adapter = netdev_priv(netdev);
2273 int err;
2274
2275 /* disallow open during test */
2276 if (test_bit(__AT_TESTING, &adapter->flags))
2277 return -EBUSY;
2278
2279 /* allocate rx/tx dma buffer & descriptors */
2280 err = atl1c_setup_ring_resources(adapter);
2281 if (unlikely(err))
2282 return err;
2283
2284 err = atl1c_up(adapter);
2285 if (unlikely(err))
2286 goto err_up;
2287
2288 if (adapter->hw.ctrl_flags & ATL1C_FPGA_VERSION) {
2289 u32 phy_data;
2290
2291 AT_READ_REG(&adapter->hw, REG_MDIO_CTRL, &phy_data);
2292 phy_data |= MDIO_AP_EN;
2293 AT_WRITE_REG(&adapter->hw, REG_MDIO_CTRL, phy_data);
2294 }
2295 return 0;
2296
2297err_up:
2298 atl1c_free_irq(adapter);
2299 atl1c_free_ring_resources(adapter);
2300 atl1c_reset_mac(&adapter->hw);
2301 return err;
2302}
2303
2304/*
2305 * atl1c_close - Disables a network interface
2306 * @netdev: network interface device structure
2307 *
2308 * Returns 0, this is not allowed to fail
2309 *
2310 * The close entry point is called when an interface is de-activated
2311 * by the OS. The hardware is still under the drivers control, but
2312 * needs to be disabled. A global MAC reset is issued to stop the
2313 * hardware, and all transmit and receive resources are freed.
2314 */
2315static int atl1c_close(struct net_device *netdev)
2316{
2317 struct atl1c_adapter *adapter = netdev_priv(netdev);
2318
2319 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2320 atl1c_down(adapter);
2321 atl1c_free_ring_resources(adapter);
2322 return 0;
2323}
2324
762e3023 2325static int atl1c_suspend(struct device *dev)
43250ddd 2326{
762e3023 2327 struct pci_dev *pdev = to_pci_dev(dev);
43250ddd
JY		 2328 struct net_device *netdev = pci_get_drvdata(pdev);
2329 struct atl1c_adapter *adapter = netdev_priv(netdev);
2330 struct atl1c_hw *hw = &adapter->hw;
8f574b35
JY		 2331 u32 mac_ctrl_data = 0;
2332 u32 master_ctrl_data = 0;
55865c66 2333 u32 wol_ctrl_data = 0;
8f574b35 2334 u16 mii_intr_status_data = 0;
43250ddd 2335 u32 wufc = adapter->wol;
43250ddd 2336
8f574b35 2337 atl1c_disable_l0s_l1(hw);
43250ddd
JY		 2338 if (netif_running(netdev)) {
2339 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2340 atl1c_down(adapter);
2341 }
2342 netif_device_detach(netdev);
8f574b35
JY		 2343
2344 if (wufc)
2345 if (atl1c_phy_power_saving(hw) != 0)
2346 dev_dbg(&pdev->dev, "phy power saving failed");
2347
2348 AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data);
2349 AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data);
2350
2351 master_ctrl_data &= ~MASTER_CTRL_CLK_SEL_DIS;
2352 mac_ctrl_data &= ~(MAC_CTRL_PRMLEN_MASK << MAC_CTRL_PRMLEN_SHIFT);
2353 mac_ctrl_data |= (((u32)adapter->hw.preamble_len &
2354 MAC_CTRL_PRMLEN_MASK) <<
2355 MAC_CTRL_PRMLEN_SHIFT);
2356 mac_ctrl_data &= ~(MAC_CTRL_SPEED_MASK << MAC_CTRL_SPEED_SHIFT);
2357 mac_ctrl_data &= ~MAC_CTRL_DUPLX;
2358
43250ddd 2359 if (wufc) {
8f574b35
JY		 2360 mac_ctrl_data |= MAC_CTRL_RX_EN;
2361 if (adapter->link_speed == SPEED_1000 ||
2362 adapter->link_speed == SPEED_0) {
2363 mac_ctrl_data |= atl1c_mac_speed_1000 <<
2364 MAC_CTRL_SPEED_SHIFT;
2365 mac_ctrl_data |= MAC_CTRL_DUPLX;
2366 } else
2367 mac_ctrl_data |= atl1c_mac_speed_10_100 <<
2368 MAC_CTRL_SPEED_SHIFT;
2369
2370 if (adapter->link_duplex == DUPLEX_FULL)
2371 mac_ctrl_data |= MAC_CTRL_DUPLX;
2372
43250ddd
JY		 2373 /* turn on magic packet wol */
2374 if (wufc & AT_WUFC_MAG)
8f574b35 2375 wol_ctrl_data |= WOL_MAGIC_EN | WOL_MAGIC_PME_EN;
43250ddd
JY		 2376
2377 if (wufc & AT_WUFC_LNKC) {
43250ddd
JY		 2378 wol_ctrl_data |= WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN;
2379 /* only link up can wake up */
2380 if (atl1c_write_phy_reg(hw, MII_IER, IER_LINK_UP) != 0) {
8f574b35
JY		 2381 dev_dbg(&pdev->dev, "%s: read write phy "
2382 "register failed.\n",
2383 atl1c_driver_name);
43250ddd
JY		 2384 }
2385 }
2386 /* clear phy interrupt */
2387 atl1c_read_phy_reg(hw, MII_ISR, &mii_intr_status_data);
2388 /* Config MAC Ctrl register */
46facce9 2389 __atl1c_vlan_mode(netdev->features, &mac_ctrl_data);
43250ddd
JY		 2390
2391 /* magic packet maybe Broadcast&multicast&Unicast frame */
2392 if (wufc & AT_WUFC_MAG)
2393 mac_ctrl_data |= MAC_CTRL_BC_EN;
2394
8f574b35
JY		 2395 dev_dbg(&pdev->dev,
2396 "%s: suspend MAC=0x%x\n",
2397 atl1c_driver_name, mac_ctrl_data);
43250ddd
JY		 2398 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
2399 AT_WRITE_REG(hw, REG_WOL_CTRL, wol_ctrl_data);
2400 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
2401
8f574b35
JY		 2402 AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_DEFAULT |
2403 GPHY_CTRL_EXT_RESET);
8f574b35
JY		 2404 } else {
2405 AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_POWER_SAVING);
2406 master_ctrl_data |= MASTER_CTRL_CLK_SEL_DIS;
2407 mac_ctrl_data |= atl1c_mac_speed_10_100 << MAC_CTRL_SPEED_SHIFT;
2408 mac_ctrl_data |= MAC_CTRL_DUPLX;
2409 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
2410 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
2411 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
2412 hw->phy_configured = false; /* re-init PHY when resume */
43250ddd 2413 }
43250ddd 2414
43250ddd
JY		 2415 return 0;
2416}
2417
d187c1aa 2418#ifdef CONFIG_PM_SLEEP
762e3023 2419static int atl1c_resume(struct device *dev)
43250ddd 2420{
762e3023 2421 struct pci_dev *pdev = to_pci_dev(dev);
43250ddd
JY		 2422 struct net_device *netdev = pci_get_drvdata(pdev);
2423 struct atl1c_adapter *adapter = netdev_priv(netdev);
2424
43250ddd 2425 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
8f574b35
JY		 2426 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE |
2427 ATL1C_PCIE_PHY_RESET);
43250ddd
JY		 2428
2429 atl1c_phy_reset(&adapter->hw);
2430 atl1c_reset_mac(&adapter->hw);
8f574b35
JY		 2431 atl1c_phy_init(&adapter->hw);
2432
2433#if 0
2434 AT_READ_REG(&adapter->hw, REG_PM_CTRLSTAT, &pm_data);
2435 pm_data &= ~PM_CTRLSTAT_PME_EN;
2436 AT_WRITE_REG(&adapter->hw, REG_PM_CTRLSTAT, pm_data);
2437#endif
2438
43250ddd
JY		 2439 netif_device_attach(netdev);
2440 if (netif_running(netdev))
2441 atl1c_up(adapter);
2442
2443 return 0;
2444}
d187c1aa 2445#endif
43250ddd
JY		 2446
2447static void atl1c_shutdown(struct pci_dev *pdev)
2448{
762e3023
RW		 2449 struct net_device *netdev = pci_get_drvdata(pdev);
2450 struct atl1c_adapter *adapter = netdev_priv(netdev);
2451
2452 atl1c_suspend(&pdev->dev);
2453 pci_wake_from_d3(pdev, adapter->wol);
2454 pci_set_power_state(pdev, PCI_D3hot);
43250ddd
JY		 2455}
2456
2457static const struct net_device_ops atl1c_netdev_ops = {
2458 .ndo_open = atl1c_open,
2459 .ndo_stop = atl1c_close,
2460 .ndo_validate_addr = eth_validate_addr,
2461 .ndo_start_xmit = atl1c_xmit_frame,
46facce9 2462 .ndo_set_mac_address = atl1c_set_mac_addr,
afc4b13d 2463 .ndo_set_rx_mode = atl1c_set_multi,
43250ddd 2464 .ndo_change_mtu = atl1c_change_mtu,
782d640a 2465 .ndo_fix_features = atl1c_fix_features,
46facce9 2466 .ndo_set_features = atl1c_set_features,
43250ddd
JY		 2467 .ndo_do_ioctl = atl1c_ioctl,
2468 .ndo_tx_timeout = atl1c_tx_timeout,
2469 .ndo_get_stats = atl1c_get_stats,
43250ddd
JY		 2470#ifdef CONFIG_NET_POLL_CONTROLLER
2471 .ndo_poll_controller = atl1c_netpoll,
2472#endif
2473};
2474
2475static int atl1c_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
2476{
2477 SET_NETDEV_DEV(netdev, &pdev->dev);
2478 pci_set_drvdata(pdev, netdev);
2479
43250ddd
JY		 2480 netdev->netdev_ops = &atl1c_netdev_ops;
2481 netdev->watchdog_timeo = AT_TX_WATCHDOG;
2482 atl1c_set_ethtool_ops(netdev);
2483
2484 /* TODO: add when ready */
782d640a 2485 netdev->hw_features = NETIF_F_SG |
43250ddd 2486 NETIF_F_HW_CSUM |
46facce9 2487 NETIF_F_HW_VLAN_RX |
43250ddd
JY		 2488 NETIF_F_TSO |
2489 NETIF_F_TSO6;
782d640a 2490 netdev->features = netdev->hw_features |
46facce9 2491 NETIF_F_HW_VLAN_TX;
43250ddd
JY		 2492 return 0;
2493}
2494
2495/*
2496 * atl1c_probe - Device Initialization Routine
2497 * @pdev: PCI device information struct
2498 * @ent: entry in atl1c_pci_tbl
2499 *
2500 * Returns 0 on success, negative on failure
2501 *
2502 * atl1c_probe initializes an adapter identified by a pci_dev structure.
2503 * The OS initialization, configuring of the adapter private structure,
2504 * and a hardware reset occur.
2505 */
2506static int __devinit atl1c_probe(struct pci_dev *pdev,
2507 const struct pci_device_id *ent)
2508{
2509 struct net_device *netdev;
2510 struct atl1c_adapter *adapter;
2511 static int cards_found;
2512
2513 int err = 0;
2514
2515 /* enable device (incl. PCI PM wakeup and hotplug setup) */
2516 err = pci_enable_device_mem(pdev);
2517 if (err) {
2518 dev_err(&pdev->dev, "cannot enable PCI device\n");
2519 return err;
2520 }
2521
2522 /*
2523 * The atl1c chip can DMA to 64-bit addresses, but it uses a single
2524 * shared register for the high 32 bits, so only a single, aligned,
2525 * 4 GB physical address range can be used at a time.
2526 *
2527 * Supporting 64-bit DMA on this hardware is more trouble than it's
2528 * worth. It is far easier to limit to 32-bit DMA than update
2529 * various kernel subsystems to support the mechanics required by a
2530 * fixed-high-32-bit system.
2531 */
e930438c
YH		 2532 if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) ||
2533 (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) {
43250ddd
JY		 2534 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n");
2535 goto err_dma;
2536 }
2537
2538 err = pci_request_regions(pdev, atl1c_driver_name);
2539 if (err) {
2540 dev_err(&pdev->dev, "cannot obtain PCI resources\n");
2541 goto err_pci_reg;
2542 }
2543
2544 pci_set_master(pdev);
2545
2546 netdev = alloc_etherdev(sizeof(struct atl1c_adapter));
2547 if (netdev == NULL) {
2548 err = -ENOMEM;
43250ddd
JY		 2549 goto err_alloc_etherdev;
2550 }
2551
2552 err = atl1c_init_netdev(netdev, pdev);
2553 if (err) {
2554 dev_err(&pdev->dev, "init netdevice failed\n");
2555 goto err_init_netdev;
2556 }
2557 adapter = netdev_priv(netdev);
2558 adapter->bd_number = cards_found;
2559 adapter->netdev = netdev;
2560 adapter->pdev = pdev;
2561 adapter->hw.adapter = adapter;
2562 adapter->msg_enable = netif_msg_init(-1, atl1c_default_msg);
2563 adapter->hw.hw_addr = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
2564 if (!adapter->hw.hw_addr) {
2565 err = -EIO;
2566 dev_err(&pdev->dev, "cannot map device registers\n");
2567 goto err_ioremap;
2568 }
43250ddd
JY		 2569
2570 /* init mii data */
2571 adapter->mii.dev = netdev;
2572 adapter->mii.mdio_read = atl1c_mdio_read;
2573 adapter->mii.mdio_write = atl1c_mdio_write;
2574 adapter->mii.phy_id_mask = 0x1f;
2575 adapter->mii.reg_num_mask = MDIO_REG_ADDR_MASK;
2576 netif_napi_add(netdev, &adapter->napi, atl1c_clean, 64);
2577 setup_timer(&adapter->phy_config_timer, atl1c_phy_config,
2578 (unsigned long)adapter);
2579 /* setup the private structure */
2580 err = atl1c_sw_init(adapter);
2581 if (err) {
2582 dev_err(&pdev->dev, "net device private data init failed\n");
2583 goto err_sw_init;
2584 }
2585 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE |
2586 ATL1C_PCIE_PHY_RESET);
2587
2588 /* Init GPHY as early as possible due to power saving issue */
2589 atl1c_phy_reset(&adapter->hw);
2590
2591 err = atl1c_reset_mac(&adapter->hw);
2592 if (err) {
2593 err = -EIO;
2594 goto err_reset;
2595 }
2596
43250ddd
JY		 2597 /* reset the controller to
2598 * put the device in a known good starting state */
2599 err = atl1c_phy_init(&adapter->hw);
2600 if (err) {
2601 err = -EIO;
2602 goto err_reset;
2603 }
6a214fd4
DK		 2604 if (atl1c_read_mac_addr(&adapter->hw)) {
2605 /* got a random MAC address, set NET_ADDR_RANDOM to netdev */
2606 netdev->addr_assign_type |= NET_ADDR_RANDOM;
43250ddd
JY		 2607 }
2608 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
2609 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
2610 if (netif_msg_probe(adapter))
82991172 2611 dev_dbg(&pdev->dev, "mac address : %pM\n",
2612 adapter->hw.mac_addr);
43250ddd
JY		 2613
2614 atl1c_hw_set_mac_addr(&adapter->hw);
cb190546
JY		 2615 INIT_WORK(&adapter->common_task, atl1c_common_task);
2616 adapter->work_event = 0;
43250ddd
JY		 2617 err = register_netdev(netdev);
2618 if (err) {
2619 dev_err(&pdev->dev, "register netdevice failed\n");
2620 goto err_register;
2621 }
2622
2623 if (netif_msg_probe(adapter))
2624 dev_info(&pdev->dev, "version %s\n", ATL1C_DRV_VERSION);
2625 cards_found++;
2626 return 0;
2627
2628err_reset:
2629err_register:
2630err_sw_init:
43250ddd
JY		 2631 iounmap(adapter->hw.hw_addr);
2632err_init_netdev:
2633err_ioremap:
2634 free_netdev(netdev);
2635err_alloc_etherdev:
2636 pci_release_regions(pdev);
2637err_pci_reg:
2638err_dma:
2639 pci_disable_device(pdev);
2640 return err;
2641}
2642
2643/*
2644 * atl1c_remove - Device Removal Routine
2645 * @pdev: PCI device information struct
2646 *
2647 * atl1c_remove is called by the PCI subsystem to alert the driver
2648 * that it should release a PCI device. The could be caused by a
2649 * Hot-Plug event, or because the driver is going to be removed from
2650 * memory.
2651 */
2652static void __devexit atl1c_remove(struct pci_dev *pdev)
2653{
2654 struct net_device *netdev = pci_get_drvdata(pdev);
2655 struct atl1c_adapter *adapter = netdev_priv(netdev);
2656
2657 unregister_netdev(netdev);
2658 atl1c_phy_disable(&adapter->hw);
2659
2660 iounmap(adapter->hw.hw_addr);
2661
2662 pci_release_regions(pdev);
2663 pci_disable_device(pdev);
2664 free_netdev(netdev);
2665}
2666
2667/*
2668 * atl1c_io_error_detected - called when PCI error is detected
2669 * @pdev: Pointer to PCI device
2670 * @state: The current pci connection state
2671 *
2672 * This function is called after a PCI bus error affecting
2673 * this device has been detected.
2674 */
2675static pci_ers_result_t atl1c_io_error_detected(struct pci_dev *pdev,
2676 pci_channel_state_t state)
2677{
2678 struct net_device *netdev = pci_get_drvdata(pdev);
2679 struct atl1c_adapter *adapter = netdev_priv(netdev);
2680
2681 netif_device_detach(netdev);
2682
005fb4f0
DN		 2683 if (state == pci_channel_io_perm_failure)
2684 return PCI_ERS_RESULT_DISCONNECT;
2685
43250ddd
JY		 2686 if (netif_running(netdev))
2687 atl1c_down(adapter);
2688
2689 pci_disable_device(pdev);
2690
2691 /* Request a slot slot reset. */
2692 return PCI_ERS_RESULT_NEED_RESET;
2693}
2694
2695/*
2696 * atl1c_io_slot_reset - called after the pci bus has been reset.
2697 * @pdev: Pointer to PCI device
2698 *
2699 * Restart the card from scratch, as if from a cold-boot. Implementation
2700 * resembles the first-half of the e1000_resume routine.
2701 */
2702static pci_ers_result_t atl1c_io_slot_reset(struct pci_dev *pdev)
2703{
2704 struct net_device *netdev = pci_get_drvdata(pdev);
2705 struct atl1c_adapter *adapter = netdev_priv(netdev);
2706
2707 if (pci_enable_device(pdev)) {
2708 if (netif_msg_hw(adapter))
2709 dev_err(&pdev->dev,
2710 "Cannot re-enable PCI device after reset\n");
2711 return PCI_ERS_RESULT_DISCONNECT;
2712 }
2713 pci_set_master(pdev);
2714
2715 pci_enable_wake(pdev, PCI_D3hot, 0);
2716 pci_enable_wake(pdev, PCI_D3cold, 0);
2717
2718 atl1c_reset_mac(&adapter->hw);
2719
2720 return PCI_ERS_RESULT_RECOVERED;
2721}
2722
2723/*
2724 * atl1c_io_resume - called when traffic can start flowing again.
2725 * @pdev: Pointer to PCI device
2726 *
2727 * This callback is called when the error recovery driver tells us that
2728 * its OK to resume normal operation. Implementation resembles the
2729 * second-half of the atl1c_resume routine.
2730 */
2731static void atl1c_io_resume(struct pci_dev *pdev)
2732{
2733 struct net_device *netdev = pci_get_drvdata(pdev);
2734 struct atl1c_adapter *adapter = netdev_priv(netdev);
2735
2736 if (netif_running(netdev)) {
2737 if (atl1c_up(adapter)) {
2738 if (netif_msg_hw(adapter))
2739 dev_err(&pdev->dev,
2740 "Cannot bring device back up after reset\n");
2741 return;
2742 }
2743 }
2744
2745 netif_device_attach(netdev);
2746}
2747
2748static struct pci_error_handlers atl1c_err_handler = {
2749 .error_detected = atl1c_io_error_detected,
2750 .slot_reset = atl1c_io_slot_reset,
2751 .resume = atl1c_io_resume,
2752};
2753
762e3023
RW		 2754static SIMPLE_DEV_PM_OPS(atl1c_pm_ops, atl1c_suspend, atl1c_resume);
2755
43250ddd
JY		 2756static struct pci_driver atl1c_driver = {
2757 .name = atl1c_driver_name,
2758 .id_table = atl1c_pci_tbl,
2759 .probe = atl1c_probe,
2760 .remove = __devexit_p(atl1c_remove),
43250ddd 2761 .shutdown = atl1c_shutdown,
762e3023
RW		 2762 .err_handler = &atl1c_err_handler,
2763 .driver.pm = &atl1c_pm_ops,
43250ddd
JY		 2764};
2765
2766/*
2767 * atl1c_init_module - Driver Registration Routine
2768 *
2769 * atl1c_init_module is the first routine called when the driver is
2770 * loaded. All it does is register with the PCI subsystem.
2771 */
2772static int __init atl1c_init_module(void)
2773{
2774 return pci_register_driver(&atl1c_driver);
2775}
2776
2777/*
2778 * atl1c_exit_module - Driver Exit Cleanup Routine
2779 *
2780 * atl1c_exit_module is called just before the driver is removed
2781 * from memory.
2782 */
2783static void __exit atl1c_exit_module(void)
2784{
2785 pci_unregister_driver(&atl1c_driver);
2786}
2787
2788module_init(atl1c_init_module);
2789module_exit(atl1c_exit_module);
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