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atl1c: split 2 32bit registers of TPD to 4 16bit registers
[mirror_ubuntu-bionic-kernel.git] / drivers / net / ethernet / atheros / atl1c / atl1c_main.c
CommitLineData
43250ddd
JY		 1/*
2 * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved.
3 *
4 * Derived from Intel e1000 driver
5 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the Free
9 * Software Foundation; either version 2 of the License, or (at your option)
10 * any later version.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc., 59
19 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 */
21
22#include "atl1c.h"
23
8f574b35 24#define ATL1C_DRV_VERSION "1.0.1.0-NAPI"
43250ddd
JY		 25char atl1c_driver_name[] = "atl1c";
26char atl1c_driver_version[] = ATL1C_DRV_VERSION;
27#define PCI_DEVICE_ID_ATTANSIC_L2C 0x1062
28#define PCI_DEVICE_ID_ATTANSIC_L1C 0x1063
496c185c
LR		 29#define PCI_DEVICE_ID_ATHEROS_L2C_B 0x2060 /* AR8152 v1.1 Fast 10/100 */
30#define PCI_DEVICE_ID_ATHEROS_L2C_B2 0x2062 /* AR8152 v2.0 Fast 10/100 */
31#define PCI_DEVICE_ID_ATHEROS_L1D 0x1073 /* AR8151 v1.0 Gigabit 1000 */
8f574b35 32#define PCI_DEVICE_ID_ATHEROS_L1D_2_0 0x1083 /* AR8151 v2.0 Gigabit 1000 */
496c185c
LR		 33#define L2CB_V10 0xc0
34#define L2CB_V11 0xc1
35
43250ddd
JY		 36/*
37 * atl1c_pci_tbl - PCI Device ID Table
38 *
39 * Wildcard entries (PCI_ANY_ID) should come last
40 * Last entry must be all 0s
41 *
42 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
43 * Class, Class Mask, private data (not used) }
44 */
a3aa1884 45static DEFINE_PCI_DEVICE_TABLE(atl1c_pci_tbl) = {
43250ddd
JY		 46 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1C)},
47 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2C)},
496c185c
LR		 48 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B)},
49 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B2)},
50 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D)},
94dde7e4 51 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D_2_0)},
43250ddd
JY		 52 /* required last entry */
53 { 0 }
54};
55MODULE_DEVICE_TABLE(pci, atl1c_pci_tbl);
56
70c9fbd3
HX		 57MODULE_AUTHOR("Jie Yang");
58MODULE_AUTHOR("Qualcomm Atheros Inc., <nic-devel@qualcomm.com>");
59MODULE_DESCRIPTION("Qualcom Atheros 100/1000M Ethernet Network Driver");
43250ddd
JY		 60MODULE_LICENSE("GPL");
61MODULE_VERSION(ATL1C_DRV_VERSION);
62
63static int atl1c_stop_mac(struct atl1c_hw *hw);
64static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw);
65static void atl1c_enable_tx_ctrl(struct atl1c_hw *hw);
66static void atl1c_disable_l0s_l1(struct atl1c_hw *hw);
67static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup);
68static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter);
9f1fd0ef 69static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter,
43250ddd 70 int *work_done, int work_to_do);
0fb1e54e 71static int atl1c_up(struct atl1c_adapter *adapter);
72static void atl1c_down(struct atl1c_adapter *adapter);
43250ddd
JY		 73
74static const u16 atl1c_pay_load_size[] = {
75 128, 256, 512, 1024, 2048, 4096,
76};
77
43250ddd
JY		 78
79static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE |
80 NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP;
8f574b35
JY		 81static void atl1c_pcie_patch(struct atl1c_hw *hw)
82{
83 u32 data;
43250ddd 84
8f574b35
JY		 85 AT_READ_REG(hw, REG_PCIE_PHYMISC, &data);
86 data |= PCIE_PHYMISC_FORCE_RCV_DET;
87 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, data);
88
89 if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10) {
90 AT_READ_REG(hw, REG_PCIE_PHYMISC2, &data);
91
92 data &= ~(PCIE_PHYMISC2_SERDES_CDR_MASK <<
93 PCIE_PHYMISC2_SERDES_CDR_SHIFT);
94 data |= 3 << PCIE_PHYMISC2_SERDES_CDR_SHIFT;
95 data &= ~(PCIE_PHYMISC2_SERDES_TH_MASK <<
96 PCIE_PHYMISC2_SERDES_TH_SHIFT);
97 data |= 3 << PCIE_PHYMISC2_SERDES_TH_SHIFT;
98 AT_WRITE_REG(hw, REG_PCIE_PHYMISC2, data);
99 }
100}
101
102/* FIXME: no need any more ? */
43250ddd
JY		 103/*
104 * atl1c_init_pcie - init PCIE module
105 */
106static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag)
107{
108 u32 data;
109 u32 pci_cmd;
110 struct pci_dev *pdev = hw->adapter->pdev;
111
112 AT_READ_REG(hw, PCI_COMMAND, &pci_cmd);
113 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
114 pci_cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
115 PCI_COMMAND_IO);
116 AT_WRITE_REG(hw, PCI_COMMAND, pci_cmd);
117
118 /*
119 * Clear any PowerSaveing Settings
120 */
121 pci_enable_wake(pdev, PCI_D3hot, 0);
122 pci_enable_wake(pdev, PCI_D3cold, 0);
123
124 /*
125 * Mask some pcie error bits
126 */
127 AT_READ_REG(hw, REG_PCIE_UC_SEVERITY, &data);
128 data &= ~PCIE_UC_SERVRITY_DLP;
129 data &= ~PCIE_UC_SERVRITY_FCP;
130 AT_WRITE_REG(hw, REG_PCIE_UC_SEVERITY, data);
131
8f574b35
JY		 132 AT_READ_REG(hw, REG_LTSSM_ID_CTRL, &data);
133 data &= ~LTSSM_ID_EN_WRO;
134 AT_WRITE_REG(hw, REG_LTSSM_ID_CTRL, data);
135
136 atl1c_pcie_patch(hw);
43250ddd
JY		 137 if (flag & ATL1C_PCIE_L0S_L1_DISABLE)
138 atl1c_disable_l0s_l1(hw);
139 if (flag & ATL1C_PCIE_PHY_RESET)
140 AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_DEFAULT);
141 else
142 AT_WRITE_REG(hw, REG_GPHY_CTRL,
143 GPHY_CTRL_DEFAULT | GPHY_CTRL_EXT_RESET);
144
8f574b35 145 msleep(5);
43250ddd
JY		 146}
147
148/*
149 * atl1c_irq_enable - Enable default interrupt generation settings
150 * @adapter: board private structure
151 */
152static inline void atl1c_irq_enable(struct atl1c_adapter *adapter)
153{
154 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
155 AT_WRITE_REG(&adapter->hw, REG_ISR, 0x7FFFFFFF);
156 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
157 AT_WRITE_FLUSH(&adapter->hw);
158 }
159}
160
161/*
162 * atl1c_irq_disable - Mask off interrupt generation on the NIC
163 * @adapter: board private structure
164 */
165static inline void atl1c_irq_disable(struct atl1c_adapter *adapter)
166{
167 atomic_inc(&adapter->irq_sem);
168 AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
8f574b35 169 AT_WRITE_REG(&adapter->hw, REG_ISR, ISR_DIS_INT);
43250ddd
JY		 170 AT_WRITE_FLUSH(&adapter->hw);
171 synchronize_irq(adapter->pdev->irq);
172}
173
174/*
175 * atl1c_irq_reset - reset interrupt confiure on the NIC
176 * @adapter: board private structure
177 */
178static inline void atl1c_irq_reset(struct atl1c_adapter *adapter)
179{
180 atomic_set(&adapter->irq_sem, 1);
181 atl1c_irq_enable(adapter);
182}
183
c930a662
JP		 184/*
185 * atl1c_wait_until_idle - wait up to AT_HW_MAX_IDLE_DELAY reads
186 * of the idle status register until the device is actually idle
187 */
188static u32 atl1c_wait_until_idle(struct atl1c_hw *hw)
189{
190 int timeout;
191 u32 data;
192
193 for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) {
194 AT_READ_REG(hw, REG_IDLE_STATUS, &data);
195 if ((data & IDLE_STATUS_MASK) == 0)
196 return 0;
197 msleep(1);
198 }
199 return data;
200}
201
43250ddd
JY		 202/*
203 * atl1c_phy_config - Timer Call-back
204 * @data: pointer to netdev cast into an unsigned long
205 */
206static void atl1c_phy_config(unsigned long data)
207{
208 struct atl1c_adapter *adapter = (struct atl1c_adapter *) data;
209 struct atl1c_hw *hw = &adapter->hw;
210 unsigned long flags;
211
212 spin_lock_irqsave(&adapter->mdio_lock, flags);
213 atl1c_restart_autoneg(hw);
214 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
215}
216
217void atl1c_reinit_locked(struct atl1c_adapter *adapter)
218{
43250ddd
JY		 219 WARN_ON(in_interrupt());
220 atl1c_down(adapter);
221 atl1c_up(adapter);
222 clear_bit(__AT_RESETTING, &adapter->flags);
223}
224
43250ddd
JY		 225static void atl1c_check_link_status(struct atl1c_adapter *adapter)
226{
227 struct atl1c_hw *hw = &adapter->hw;
228 struct net_device *netdev = adapter->netdev;
229 struct pci_dev *pdev = adapter->pdev;
230 int err;
231 unsigned long flags;
232 u16 speed, duplex, phy_data;
233
234 spin_lock_irqsave(&adapter->mdio_lock, flags);
235 /* MII_BMSR must read twise */
236 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
237 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
238 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
239
240 if ((phy_data & BMSR_LSTATUS) == 0) {
241 /* link down */
8f574b35
JY		 242 hw->hibernate = true;
243 if (atl1c_stop_mac(hw) != 0)
244 if (netif_msg_hw(adapter))
245 dev_warn(&pdev->dev, "stop mac failed\n");
246 atl1c_set_aspm(hw, false);
43250ddd 247 netif_carrier_off(netdev);
8f574b35
JY		 248 netif_stop_queue(netdev);
249 atl1c_phy_reset(hw);
250 atl1c_phy_init(&adapter->hw);
43250ddd
JY		 251 } else {
252 /* Link Up */
253 hw->hibernate = false;
254 spin_lock_irqsave(&adapter->mdio_lock, flags);
255 err = atl1c_get_speed_and_duplex(hw, &speed, &duplex);
256 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
257 if (unlikely(err))
258 return;
259 /* link result is our setting */
260 if (adapter->link_speed != speed ||
261 adapter->link_duplex != duplex) {
262 adapter->link_speed = speed;
263 adapter->link_duplex = duplex;
52fbc100 264 atl1c_set_aspm(hw, true);
43250ddd
JY		 265 atl1c_enable_tx_ctrl(hw);
266 atl1c_enable_rx_ctrl(hw);
267 atl1c_setup_mac_ctrl(adapter);
43250ddd
JY		 268 if (netif_msg_link(adapter))
269 dev_info(&pdev->dev,
270 "%s: %s NIC Link is Up<%d Mbps %s>\n",
271 atl1c_driver_name, netdev->name,
272 adapter->link_speed,
273 adapter->link_duplex == FULL_DUPLEX ?
274 "Full Duplex" : "Half Duplex");
275 }
276 if (!netif_carrier_ok(netdev))
277 netif_carrier_on(netdev);
278 }
279}
280
43250ddd
JY		 281static void atl1c_link_chg_event(struct atl1c_adapter *adapter)
282{
283 struct net_device *netdev = adapter->netdev;
284 struct pci_dev *pdev = adapter->pdev;
285 u16 phy_data;
286 u16 link_up;
287
288 spin_lock(&adapter->mdio_lock);
289 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
290 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
291 spin_unlock(&adapter->mdio_lock);
292 link_up = phy_data & BMSR_LSTATUS;
293 /* notify upper layer link down ASAP */
294 if (!link_up) {
295 if (netif_carrier_ok(netdev)) {
296 /* old link state: Up */
297 netif_carrier_off(netdev);
298 if (netif_msg_link(adapter))
299 dev_info(&pdev->dev,
300 "%s: %s NIC Link is Down\n",
301 atl1c_driver_name, netdev->name);
302 adapter->link_speed = SPEED_0;
303 }
304 }
cb190546 305
cb771838 306 set_bit(ATL1C_WORK_EVENT_LINK_CHANGE, &adapter->work_event);
cb190546 307 schedule_work(&adapter->common_task);
43250ddd
JY		 308}
309
cb190546 310static void atl1c_common_task(struct work_struct *work)
43250ddd 311{
cb190546
JY		 312 struct atl1c_adapter *adapter;
313 struct net_device *netdev;
314
315 adapter = container_of(work, struct atl1c_adapter, common_task);
316 netdev = adapter->netdev;
317
cb771838 318 if (test_and_clear_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event)) {
cb190546
JY		 319 netif_device_detach(netdev);
320 atl1c_down(adapter);
321 atl1c_up(adapter);
322 netif_device_attach(netdev);
cb190546
JY		 323 }
324
cb771838
TG		 325 if (test_and_clear_bit(ATL1C_WORK_EVENT_LINK_CHANGE,
326 &adapter->work_event))
cb190546 327 atl1c_check_link_status(adapter);
43250ddd
JY		 328}
329
cb190546
JY		 330
331static void atl1c_del_timer(struct atl1c_adapter *adapter)
43250ddd 332{
cb190546 333 del_timer_sync(&adapter->phy_config_timer);
43250ddd
JY		 334}
335
cb190546 336
43250ddd
JY		 337/*
338 * atl1c_tx_timeout - Respond to a Tx Hang
339 * @netdev: network interface device structure
340 */
341static void atl1c_tx_timeout(struct net_device *netdev)
342{
343 struct atl1c_adapter *adapter = netdev_priv(netdev);
344
345 /* Do the reset outside of interrupt context */
cb771838 346 set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event);
cb190546 347 schedule_work(&adapter->common_task);
43250ddd
JY		 348}
349
350/*
351 * atl1c_set_multi - Multicast and Promiscuous mode set
352 * @netdev: network interface device structure
353 *
354 * The set_multi entry point is called whenever the multicast address
355 * list or the network interface flags are updated. This routine is
356 * responsible for configuring the hardware for proper multicast,
357 * promiscuous mode, and all-multi behavior.
358 */
359static void atl1c_set_multi(struct net_device *netdev)
360{
361 struct atl1c_adapter *adapter = netdev_priv(netdev);
362 struct atl1c_hw *hw = &adapter->hw;
22bedad3 363 struct netdev_hw_addr *ha;
43250ddd
JY		 364 u32 mac_ctrl_data;
365 u32 hash_value;
366
367 /* Check for Promiscuous and All Multicast modes */
368 AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data);
369
370 if (netdev->flags & IFF_PROMISC) {
371 mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
372 } else if (netdev->flags & IFF_ALLMULTI) {
373 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
374 mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN;
375 } else {
376 mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
377 }
378
379 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
380
381 /* clear the old settings from the multicast hash table */
382 AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
383 AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
384
385 /* comoute mc addresses' hash value ,and put it into hash table */
22bedad3
JP		 386 netdev_for_each_mc_addr(ha, netdev) {
387 hash_value = atl1c_hash_mc_addr(hw, ha->addr);
43250ddd
JY		 388 atl1c_hash_set(hw, hash_value);
389 }
390}
391
c8f44aff 392static void __atl1c_vlan_mode(netdev_features_t features, u32 *mac_ctrl_data)
46facce9
JP		 393{
394 if (features & NETIF_F_HW_VLAN_RX) {
395 /* enable VLAN tag insert/strip */
396 *mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
397 } else {
398 /* disable VLAN tag insert/strip */
399 *mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN;
400 }
401}
402
c8f44aff
MM		 403static void atl1c_vlan_mode(struct net_device *netdev,
404 netdev_features_t features)
43250ddd
JY		 405{
406 struct atl1c_adapter *adapter = netdev_priv(netdev);
407 struct pci_dev *pdev = adapter->pdev;
408 u32 mac_ctrl_data = 0;
409
410 if (netif_msg_pktdata(adapter))
46facce9 411 dev_dbg(&pdev->dev, "atl1c_vlan_mode\n");
43250ddd
JY		 412
413 atl1c_irq_disable(adapter);
43250ddd 414 AT_READ_REG(&adapter->hw, REG_MAC_CTRL, &mac_ctrl_data);
46facce9 415 __atl1c_vlan_mode(features, &mac_ctrl_data);
43250ddd
JY		 416 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
417 atl1c_irq_enable(adapter);
418}
419
420static void atl1c_restore_vlan(struct atl1c_adapter *adapter)
421{
422 struct pci_dev *pdev = adapter->pdev;
423
424 if (netif_msg_pktdata(adapter))
46facce9
JP		 425 dev_dbg(&pdev->dev, "atl1c_restore_vlan\n");
426 atl1c_vlan_mode(adapter->netdev, adapter->netdev->features);
43250ddd 427}
46facce9 428
43250ddd
JY		 429/*
430 * atl1c_set_mac - Change the Ethernet Address of the NIC
431 * @netdev: network interface device structure
432 * @p: pointer to an address structure
433 *
434 * Returns 0 on success, negative on failure
435 */
436static int atl1c_set_mac_addr(struct net_device *netdev, void *p)
437{
438 struct atl1c_adapter *adapter = netdev_priv(netdev);
439 struct sockaddr *addr = p;
440
441 if (!is_valid_ether_addr(addr->sa_data))
442 return -EADDRNOTAVAIL;
443
444 if (netif_running(netdev))
445 return -EBUSY;
446
447 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
448 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
6a214fd4 449 netdev->addr_assign_type &= ~NET_ADDR_RANDOM;
43250ddd
JY		 450
451 atl1c_hw_set_mac_addr(&adapter->hw);
452
453 return 0;
454}
455
456static void atl1c_set_rxbufsize(struct atl1c_adapter *adapter,
457 struct net_device *dev)
458{
459 int mtu = dev->mtu;
460
461 adapter->rx_buffer_len = mtu > AT_RX_BUF_SIZE ?
462 roundup(mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN, 8) : AT_RX_BUF_SIZE;
463}
782d640a 464
c8f44aff
MM		 465static netdev_features_t atl1c_fix_features(struct net_device *netdev,
466 netdev_features_t features)
782d640a 467{
46facce9
JP		 468 /*
469 * Since there is no support for separate rx/tx vlan accel
470 * enable/disable make sure tx flag is always in same state as rx.
471 */
472 if (features & NETIF_F_HW_VLAN_RX)
473 features |= NETIF_F_HW_VLAN_TX;
474 else
475 features &= ~NETIF_F_HW_VLAN_TX;
476
782d640a
MM		 477 if (netdev->mtu > MAX_TSO_FRAME_SIZE)
478 features &= ~(NETIF_F_TSO | NETIF_F_TSO6);
479
480 return features;
481}
482
c8f44aff
MM		 483static int atl1c_set_features(struct net_device *netdev,
484 netdev_features_t features)
46facce9 485{
c8f44aff 486 netdev_features_t changed = netdev->features ^ features;
46facce9
JP		 487
488 if (changed & NETIF_F_HW_VLAN_RX)
489 atl1c_vlan_mode(netdev, features);
490
491 return 0;
492}
493
43250ddd
JY		 494/*
495 * atl1c_change_mtu - Change the Maximum Transfer Unit
496 * @netdev: network interface device structure
497 * @new_mtu: new value for maximum frame size
498 *
499 * Returns 0 on success, negative on failure
500 */
501static int atl1c_change_mtu(struct net_device *netdev, int new_mtu)
502{
503 struct atl1c_adapter *adapter = netdev_priv(netdev);
504 int old_mtu = netdev->mtu;
505 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
506
507 if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
508 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
509 if (netif_msg_link(adapter))
510 dev_warn(&adapter->pdev->dev, "invalid MTU setting\n");
511 return -EINVAL;
512 }
513 /* set MTU */
514 if (old_mtu != new_mtu && netif_running(netdev)) {
515 while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
516 msleep(1);
517 netdev->mtu = new_mtu;
518 adapter->hw.max_frame_size = new_mtu;
519 atl1c_set_rxbufsize(adapter, netdev);
520 atl1c_down(adapter);
782d640a 521 netdev_update_features(netdev);
43250ddd
JY		 522 atl1c_up(adapter);
523 clear_bit(__AT_RESETTING, &adapter->flags);
524 if (adapter->hw.ctrl_flags & ATL1C_FPGA_VERSION) {
525 u32 phy_data;
526
527 AT_READ_REG(&adapter->hw, 0x1414, &phy_data);
528 phy_data |= 0x10000000;
529 AT_WRITE_REG(&adapter->hw, 0x1414, phy_data);
530 }
531
532 }
533 return 0;
534}
535
536/*
537 * caller should hold mdio_lock
538 */
539static int atl1c_mdio_read(struct net_device *netdev, int phy_id, int reg_num)
540{
541 struct atl1c_adapter *adapter = netdev_priv(netdev);
542 u16 result;
543
544 atl1c_read_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, &result);
545 return result;
546}
547
548static void atl1c_mdio_write(struct net_device *netdev, int phy_id,
549 int reg_num, int val)
550{
551 struct atl1c_adapter *adapter = netdev_priv(netdev);
552
553 atl1c_write_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, val);
554}
555
556/*
557 * atl1c_mii_ioctl -
558 * @netdev:
559 * @ifreq:
560 * @cmd:
561 */
562static int atl1c_mii_ioctl(struct net_device *netdev,
563 struct ifreq *ifr, int cmd)
564{
565 struct atl1c_adapter *adapter = netdev_priv(netdev);
566 struct pci_dev *pdev = adapter->pdev;
567 struct mii_ioctl_data *data = if_mii(ifr);
568 unsigned long flags;
569 int retval = 0;
570
571 if (!netif_running(netdev))
572 return -EINVAL;
573
574 spin_lock_irqsave(&adapter->mdio_lock, flags);
575 switch (cmd) {
576 case SIOCGMIIPHY:
577 data->phy_id = 0;
578 break;
579
580 case SIOCGMIIREG:
43250ddd
JY		 581 if (atl1c_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
582 &data->val_out)) {
583 retval = -EIO;
584 goto out;
585 }
586 break;
587
588 case SIOCSMIIREG:
43250ddd
JY		 589 if (data->reg_num & ~(0x1F)) {
590 retval = -EFAULT;
591 goto out;
592 }
593
594 dev_dbg(&pdev->dev, "<atl1c_mii_ioctl> write %x %x",
595 data->reg_num, data->val_in);
596 if (atl1c_write_phy_reg(&adapter->hw,
597 data->reg_num, data->val_in)) {
598 retval = -EIO;
599 goto out;
600 }
601 break;
602
603 default:
604 retval = -EOPNOTSUPP;
605 break;
606 }
607out:
608 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
609 return retval;
610}
611
612/*
613 * atl1c_ioctl -
614 * @netdev:
615 * @ifreq:
616 * @cmd:
617 */
618static int atl1c_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
619{
620 switch (cmd) {
621 case SIOCGMIIPHY:
622 case SIOCGMIIREG:
623 case SIOCSMIIREG:
624 return atl1c_mii_ioctl(netdev, ifr, cmd);
625 default:
626 return -EOPNOTSUPP;
627 }
628}
629
630/*
631 * atl1c_alloc_queues - Allocate memory for all rings
632 * @adapter: board private structure to initialize
633 *
634 */
635static int __devinit atl1c_alloc_queues(struct atl1c_adapter *adapter)
636{
637 return 0;
638}
639
640static void atl1c_set_mac_type(struct atl1c_hw *hw)
641{
642 switch (hw->device_id) {
643 case PCI_DEVICE_ID_ATTANSIC_L2C:
644 hw->nic_type = athr_l2c;
645 break;
43250ddd
JY		 646 case PCI_DEVICE_ID_ATTANSIC_L1C:
647 hw->nic_type = athr_l1c;
648 break;
496c185c
LR		 649 case PCI_DEVICE_ID_ATHEROS_L2C_B:
650 hw->nic_type = athr_l2c_b;
651 break;
652 case PCI_DEVICE_ID_ATHEROS_L2C_B2:
653 hw->nic_type = athr_l2c_b2;
654 break;
655 case PCI_DEVICE_ID_ATHEROS_L1D:
656 hw->nic_type = athr_l1d;
657 break;
8f574b35
JY		 658 case PCI_DEVICE_ID_ATHEROS_L1D_2_0:
659 hw->nic_type = athr_l1d_2;
660 break;
43250ddd
JY		 661 default:
662 break;
663 }
664}
665
666static int atl1c_setup_mac_funcs(struct atl1c_hw *hw)
667{
668 u32 phy_status_data;
669 u32 link_ctrl_data;
670
671 atl1c_set_mac_type(hw);
672 AT_READ_REG(hw, REG_PHY_STATUS, &phy_status_data);
673 AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data);
674
8f574b35 675 hw->ctrl_flags = ATL1C_INTR_MODRT_ENABLE |
43250ddd
JY		 676 ATL1C_TXQ_MODE_ENHANCE;
677 if (link_ctrl_data & LINK_CTRL_L0S_EN)
678 hw->ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT;
679 if (link_ctrl_data & LINK_CTRL_L1_EN)
680 hw->ctrl_flags |= ATL1C_ASPM_L1_SUPPORT;
496c185c
LR		 681 if (link_ctrl_data & LINK_CTRL_EXT_SYNC)
682 hw->ctrl_flags |= ATL1C_LINK_EXT_SYNC;
8f574b35 683 hw->ctrl_flags |= ATL1C_ASPM_CTRL_MON;
43250ddd 684
496c185c 685 if (hw->nic_type == athr_l1c ||
8f574b35
JY		 686 hw->nic_type == athr_l1d ||
687 hw->nic_type == athr_l1d_2)
496c185c 688 hw->link_cap_flags |= ATL1C_LINK_CAP_1000M;
43250ddd
JY		 689 return 0;
690}
691/*
692 * atl1c_sw_init - Initialize general software structures (struct atl1c_adapter)
693 * @adapter: board private structure to initialize
694 *
695 * atl1c_sw_init initializes the Adapter private data structure.
696 * Fields are initialized based on PCI device information and
697 * OS network device settings (MTU size).
698 */
699static int __devinit atl1c_sw_init(struct atl1c_adapter *adapter)
700{
701 struct atl1c_hw *hw = &adapter->hw;
702 struct pci_dev *pdev = adapter->pdev;
8f574b35
JY		 703 u32 revision;
704
43250ddd
JY		 705
706 adapter->wol = 0;
762e3023 707 device_set_wakeup_enable(&pdev->dev, false);
43250ddd
JY		 708 adapter->link_speed = SPEED_0;
709 adapter->link_duplex = FULL_DUPLEX;
43250ddd 710 adapter->tpd_ring[0].count = 1024;
9f1fd0ef 711 adapter->rfd_ring.count = 512;
43250ddd
JY		 712
713 hw->vendor_id = pdev->vendor;
714 hw->device_id = pdev->device;
715 hw->subsystem_vendor_id = pdev->subsystem_vendor;
716 hw->subsystem_id = pdev->subsystem_device;
8f574b35
JY		 717 AT_READ_REG(hw, PCI_CLASS_REVISION, &revision);
718 hw->revision_id = revision & 0xFF;
43250ddd
JY		 719 /* before link up, we assume hibernate is true */
720 hw->hibernate = true;
721 hw->media_type = MEDIA_TYPE_AUTO_SENSOR;
722 if (atl1c_setup_mac_funcs(hw) != 0) {
723 dev_err(&pdev->dev, "set mac function pointers failed\n");
724 return -1;
725 }
726 hw->intr_mask = IMR_NORMAL_MASK;
727 hw->phy_configured = false;
728 hw->preamble_len = 7;
729 hw->max_frame_size = adapter->netdev->mtu;
43250ddd
JY		 730 hw->autoneg_advertised = ADVERTISED_Autoneg;
731 hw->indirect_tab = 0xE4E4E4E4;
732 hw->base_cpu = 0;
733
734 hw->ict = 50000; /* 100ms */
735 hw->smb_timer = 200000; /* 400ms */
43250ddd
JY		 736 hw->rx_imt = 200;
737 hw->tx_imt = 1000;
738
739 hw->tpd_burst = 5;
740 hw->rfd_burst = 8;
741 hw->dma_order = atl1c_dma_ord_out;
742 hw->dmar_block = atl1c_dma_req_1024;
743 hw->dmaw_block = atl1c_dma_req_1024;
744 hw->dmar_dly_cnt = 15;
745 hw->dmaw_dly_cnt = 4;
746
747 if (atl1c_alloc_queues(adapter)) {
748 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
749 return -ENOMEM;
750 }
751 /* TODO */
752 atl1c_set_rxbufsize(adapter, adapter->netdev);
753 atomic_set(&adapter->irq_sem, 1);
754 spin_lock_init(&adapter->mdio_lock);
755 spin_lock_init(&adapter->tx_lock);
756 set_bit(__AT_DOWN, &adapter->flags);
757
758 return 0;
759}
760
c6060be4
JY		 761static inline void atl1c_clean_buffer(struct pci_dev *pdev,
762 struct atl1c_buffer *buffer_info, int in_irq)
763{
4b45e342 764 u16 pci_driection;
c6060be4
JY		 765 if (buffer_info->flags & ATL1C_BUFFER_FREE)
766 return;
767 if (buffer_info->dma) {
4b45e342
JY		 768 if (buffer_info->flags & ATL1C_PCIMAP_FROMDEVICE)
769 pci_driection = PCI_DMA_FROMDEVICE;
770 else
771 pci_driection = PCI_DMA_TODEVICE;
772
c6060be4
JY		 773 if (buffer_info->flags & ATL1C_PCIMAP_SINGLE)
774 pci_unmap_single(pdev, buffer_info->dma,
4b45e342 775 buffer_info->length, pci_driection);
c6060be4
JY		 776 else if (buffer_info->flags & ATL1C_PCIMAP_PAGE)
777 pci_unmap_page(pdev, buffer_info->dma,
4b45e342 778 buffer_info->length, pci_driection);
c6060be4
JY		 779 }
780 if (buffer_info->skb) {
781 if (in_irq)
782 dev_kfree_skb_irq(buffer_info->skb);
783 else
784 dev_kfree_skb(buffer_info->skb);
785 }
786 buffer_info->dma = 0;
787 buffer_info->skb = NULL;
788 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
789}
43250ddd
JY		 790/*
791 * atl1c_clean_tx_ring - Free Tx-skb
792 * @adapter: board private structure
793 */
794static void atl1c_clean_tx_ring(struct atl1c_adapter *adapter,
795 enum atl1c_trans_queue type)
796{
797 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
798 struct atl1c_buffer *buffer_info;
799 struct pci_dev *pdev = adapter->pdev;
800 u16 index, ring_count;
801
802 ring_count = tpd_ring->count;
803 for (index = 0; index < ring_count; index++) {
804 buffer_info = &tpd_ring->buffer_info[index];
c6060be4 805 atl1c_clean_buffer(pdev, buffer_info, 0);
43250ddd
JY		 806 }
807
808 /* Zero out Tx-buffers */
809 memset(tpd_ring->desc, 0, sizeof(struct atl1c_tpd_desc) *
c6060be4 810 ring_count);
43250ddd
JY		 811 atomic_set(&tpd_ring->next_to_clean, 0);
812 tpd_ring->next_to_use = 0;
813}
814
815/*
816 * atl1c_clean_rx_ring - Free rx-reservation skbs
817 * @adapter: board private structure
818 */
819static void atl1c_clean_rx_ring(struct atl1c_adapter *adapter)
820{
9f1fd0ef
HX		 821 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
822 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
43250ddd
JY		 823 struct atl1c_buffer *buffer_info;
824 struct pci_dev *pdev = adapter->pdev;
9f1fd0ef 825 int j;
43250ddd 826
9f1fd0ef
HX		 827 for (j = 0; j < rfd_ring->count; j++) {
828 buffer_info = &rfd_ring->buffer_info[j];
829 atl1c_clean_buffer(pdev, buffer_info, 0);
43250ddd 830 }
9f1fd0ef
HX		 831 /* zero out the descriptor ring */
832 memset(rfd_ring->desc, 0, rfd_ring->size);
833 rfd_ring->next_to_clean = 0;
834 rfd_ring->next_to_use = 0;
835 rrd_ring->next_to_use = 0;
836 rrd_ring->next_to_clean = 0;
43250ddd
JY		 837}
838
839/*
840 * Read / Write Ptr Initialize:
841 */
842static void atl1c_init_ring_ptrs(struct atl1c_adapter *adapter)
843{
844 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
9f1fd0ef
HX		 845 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
846 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
43250ddd
JY		 847 struct atl1c_buffer *buffer_info;
848 int i, j;
849
850 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
851 tpd_ring[i].next_to_use = 0;
852 atomic_set(&tpd_ring[i].next_to_clean, 0);
853 buffer_info = tpd_ring[i].buffer_info;
854 for (j = 0; j < tpd_ring->count; j++)
c6060be4
JY		 855 ATL1C_SET_BUFFER_STATE(&buffer_info[i],
856 ATL1C_BUFFER_FREE);
43250ddd 857 }
9f1fd0ef
HX		 858 rfd_ring->next_to_use = 0;
859 rfd_ring->next_to_clean = 0;
860 rrd_ring->next_to_use = 0;
861 rrd_ring->next_to_clean = 0;
862 for (j = 0; j < rfd_ring->count; j++) {
863 buffer_info = &rfd_ring->buffer_info[j];
864 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
43250ddd
JY		 865 }
866}
867
868/*
869 * atl1c_free_ring_resources - Free Tx / RX descriptor Resources
870 * @adapter: board private structure
871 *
872 * Free all transmit software resources
873 */
874static void atl1c_free_ring_resources(struct atl1c_adapter *adapter)
875{
876 struct pci_dev *pdev = adapter->pdev;
877
878 pci_free_consistent(pdev, adapter->ring_header.size,
879 adapter->ring_header.desc,
880 adapter->ring_header.dma);
881 adapter->ring_header.desc = NULL;
882
883 /* Note: just free tdp_ring.buffer_info,
884 * it contain rfd_ring.buffer_info, do not double free */
885 if (adapter->tpd_ring[0].buffer_info) {
886 kfree(adapter->tpd_ring[0].buffer_info);
887 adapter->tpd_ring[0].buffer_info = NULL;
888 }
889}
890
891/*
892 * atl1c_setup_mem_resources - allocate Tx / RX descriptor resources
893 * @adapter: board private structure
894 *
895 * Return 0 on success, negative on failure
896 */
897static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter)
898{
899 struct pci_dev *pdev = adapter->pdev;
900 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
9f1fd0ef
HX		 901 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
902 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
43250ddd 903 struct atl1c_ring_header *ring_header = &adapter->ring_header;
43250ddd
JY		 904 int size;
905 int i;
906 int count = 0;
907 int rx_desc_count = 0;
908 u32 offset = 0;
909
9f1fd0ef 910 rrd_ring->count = rfd_ring->count;
43250ddd
JY		 911 for (i = 1; i < AT_MAX_TRANSMIT_QUEUE; i++)
912 tpd_ring[i].count = tpd_ring[0].count;
913
43250ddd
JY		 914 /* 2 tpd queue, one high priority queue,
915 * another normal priority queue */
916 size = sizeof(struct atl1c_buffer) * (tpd_ring->count * 2 +
9f1fd0ef 917 rfd_ring->count);
43250ddd
JY		 918 tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
919 if (unlikely(!tpd_ring->buffer_info)) {
920 dev_err(&pdev->dev, "kzalloc failed, size = %d\n",
921 size);
922 goto err_nomem;
923 }
924 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
925 tpd_ring[i].buffer_info =
926 (struct atl1c_buffer *) (tpd_ring->buffer_info + count);
927 count += tpd_ring[i].count;
928 }
929
9f1fd0ef
HX		 930 rfd_ring->buffer_info =
931 (struct atl1c_buffer *) (tpd_ring->buffer_info + count);
932 count += rfd_ring->count;
933 rx_desc_count += rfd_ring->count;
934
43250ddd
JY		 935 /*
936 * real ring DMA buffer
937 * each ring/block may need up to 8 bytes for alignment, hence the
938 * additional bytes tacked onto the end.
939 */
940 ring_header->size = size =
941 sizeof(struct atl1c_tpd_desc) * tpd_ring->count * 2 +
942 sizeof(struct atl1c_rx_free_desc) * rx_desc_count +
943 sizeof(struct atl1c_recv_ret_status) * rx_desc_count +
8d5c6836 944 8 * 4;
43250ddd
JY		 945
946 ring_header->desc = pci_alloc_consistent(pdev, ring_header->size,
947 &ring_header->dma);
948 if (unlikely(!ring_header->desc)) {
949 dev_err(&pdev->dev, "pci_alloc_consistend failed\n");
950 goto err_nomem;
951 }
952 memset(ring_header->desc, 0, ring_header->size);
953 /* init TPD ring */
954
955 tpd_ring[0].dma = roundup(ring_header->dma, 8);
956 offset = tpd_ring[0].dma - ring_header->dma;
957 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
958 tpd_ring[i].dma = ring_header->dma + offset;
959 tpd_ring[i].desc = (u8 *) ring_header->desc + offset;
960 tpd_ring[i].size =
961 sizeof(struct atl1c_tpd_desc) * tpd_ring[i].count;
962 offset += roundup(tpd_ring[i].size, 8);
963 }
964 /* init RFD ring */
9f1fd0ef
HX		 965 rfd_ring->dma = ring_header->dma + offset;
966 rfd_ring->desc = (u8 *) ring_header->desc + offset;
967 rfd_ring->size = sizeof(struct atl1c_rx_free_desc) * rfd_ring->count;
968 offset += roundup(rfd_ring->size, 8);
43250ddd
JY		 969
970 /* init RRD ring */
9f1fd0ef
HX		 971 rrd_ring->dma = ring_header->dma + offset;
972 rrd_ring->desc = (u8 *) ring_header->desc + offset;
973 rrd_ring->size = sizeof(struct atl1c_recv_ret_status) *
974 rrd_ring->count;
975 offset += roundup(rrd_ring->size, 8);
43250ddd 976
43250ddd
JY		 977 return 0;
978
979err_nomem:
980 kfree(tpd_ring->buffer_info);
981 return -ENOMEM;
982}
983
984static void atl1c_configure_des_ring(struct atl1c_adapter *adapter)
985{
986 struct atl1c_hw *hw = &adapter->hw;
9f1fd0ef
HX		 987 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
988 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
43250ddd
JY		 989 struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
990 adapter->tpd_ring;
8f574b35 991 u32 data;
43250ddd
JY		 992
993 /* TPD */
994 AT_WRITE_REG(hw, REG_TX_BASE_ADDR_HI,
995 (u32)((tpd_ring[atl1c_trans_normal].dma &
996 AT_DMA_HI_ADDR_MASK) >> 32));
997 /* just enable normal priority TX queue */
0af48336 998 AT_WRITE_REG(hw, REG_TPD_PRI0_ADDR_LO,
43250ddd
JY		 999 (u32)(tpd_ring[atl1c_trans_normal].dma &
1000 AT_DMA_LO_ADDR_MASK));
0af48336 1001 AT_WRITE_REG(hw, REG_TPD_PRI1_ADDR_LO,
43250ddd
JY		 1002 (u32)(tpd_ring[atl1c_trans_high].dma &
1003 AT_DMA_LO_ADDR_MASK));
1004 AT_WRITE_REG(hw, REG_TPD_RING_SIZE,
1005 (u32)(tpd_ring[0].count & TPD_RING_SIZE_MASK));
1006
1007
1008 /* RFD */
1009 AT_WRITE_REG(hw, REG_RX_BASE_ADDR_HI,
9f1fd0ef
HX		 1010 (u32)((rfd_ring->dma & AT_DMA_HI_ADDR_MASK) >> 32));
1011 AT_WRITE_REG(hw, REG_RFD0_HEAD_ADDR_LO,
1012 (u32)(rfd_ring->dma & AT_DMA_LO_ADDR_MASK));
43250ddd
JY		 1013
1014 AT_WRITE_REG(hw, REG_RFD_RING_SIZE,
9f1fd0ef 1015 rfd_ring->count & RFD_RING_SIZE_MASK);
43250ddd
JY		 1016 AT_WRITE_REG(hw, REG_RX_BUF_SIZE,
1017 adapter->rx_buffer_len & RX_BUF_SIZE_MASK);
1018
1019 /* RRD */
9f1fd0ef
HX		 1020 AT_WRITE_REG(hw, REG_RRD0_HEAD_ADDR_LO,
1021 (u32)(rrd_ring->dma & AT_DMA_LO_ADDR_MASK));
43250ddd 1022 AT_WRITE_REG(hw, REG_RRD_RING_SIZE,
9f1fd0ef 1023 (rrd_ring->count & RRD_RING_SIZE_MASK));
43250ddd 1024
8f574b35
JY		 1025 if (hw->nic_type == athr_l2c_b) {
1026 AT_WRITE_REG(hw, REG_SRAM_RXF_LEN, 0x02a0L);
1027 AT_WRITE_REG(hw, REG_SRAM_TXF_LEN, 0x0100L);
1028 AT_WRITE_REG(hw, REG_SRAM_RXF_ADDR, 0x029f0000L);
1029 AT_WRITE_REG(hw, REG_SRAM_RFD0_INFO, 0x02bf02a0L);
1030 AT_WRITE_REG(hw, REG_SRAM_TXF_ADDR, 0x03bf02c0L);
1031 AT_WRITE_REG(hw, REG_SRAM_TRD_ADDR, 0x03df03c0L);
1032 AT_WRITE_REG(hw, REG_TXF_WATER_MARK, 0); /* TX watermark, to enter l1 state.*/
1033 AT_WRITE_REG(hw, REG_RXD_DMA_CTRL, 0); /* RXD threshold.*/
1034 }
1035 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d_2) {
1036 /* Power Saving for L2c_B */
1037 AT_READ_REG(hw, REG_SERDES_LOCK, &data);
1038 data |= SERDES_MAC_CLK_SLOWDOWN;
1039 data |= SERDES_PYH_CLK_SLOWDOWN;
1040 AT_WRITE_REG(hw, REG_SERDES_LOCK, data);
1041 }
43250ddd
JY		 1042 /* Load all of base address above */
1043 AT_WRITE_REG(hw, REG_LOAD_PTR, 1);
1044}
1045
1046static void atl1c_configure_tx(struct atl1c_adapter *adapter)
1047{
1048 struct atl1c_hw *hw = &adapter->hw;
1049 u32 dev_ctrl_data;
1050 u32 max_pay_load;
1051 u16 tx_offload_thresh;
1052 u32 txq_ctrl_data;
8f574b35 1053 u32 max_pay_load_data;
43250ddd 1054
43250ddd
JY		 1055 tx_offload_thresh = MAX_TX_OFFLOAD_THRESH;
1056 AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH,
1057 (tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK);
1058 AT_READ_REG(hw, REG_DEVICE_CTRL, &dev_ctrl_data);
1059 max_pay_load = (dev_ctrl_data >> DEVICE_CTRL_MAX_PAYLOAD_SHIFT) &
1060 DEVICE_CTRL_MAX_PAYLOAD_MASK;
81b504b8 1061 hw->dmaw_block = min_t(u32, max_pay_load, hw->dmaw_block);
43250ddd
JY		 1062 max_pay_load = (dev_ctrl_data >> DEVICE_CTRL_MAX_RREQ_SZ_SHIFT) &
1063 DEVICE_CTRL_MAX_RREQ_SZ_MASK;
81b504b8 1064 hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block);
43250ddd
JY		 1065
1066 txq_ctrl_data = (hw->tpd_burst & TXQ_NUM_TPD_BURST_MASK) <<
1067 TXQ_NUM_TPD_BURST_SHIFT;
1068 if (hw->ctrl_flags & ATL1C_TXQ_MODE_ENHANCE)
1069 txq_ctrl_data |= TXQ_CTRL_ENH_MODE;
8f574b35 1070 max_pay_load_data = (atl1c_pay_load_size[hw->dmar_block] &
43250ddd 1071 TXQ_TXF_BURST_NUM_MASK) << TXQ_TXF_BURST_NUM_SHIFT;
8f574b35
JY		 1072 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l2c_b2)
1073 max_pay_load_data >>= 1;
1074 txq_ctrl_data |= max_pay_load_data;
43250ddd
JY		 1075
1076 AT_WRITE_REG(hw, REG_TXQ_CTRL, txq_ctrl_data);
1077}
1078
1079static void atl1c_configure_rx(struct atl1c_adapter *adapter)
1080{
1081 struct atl1c_hw *hw = &adapter->hw;
1082 u32 rxq_ctrl_data;
1083
1084 rxq_ctrl_data = (hw->rfd_burst & RXQ_RFD_BURST_NUM_MASK) <<
1085 RXQ_RFD_BURST_NUM_SHIFT;
1086
1087 if (hw->ctrl_flags & ATL1C_RX_IPV6_CHKSUM)
1088 rxq_ctrl_data |= IPV6_CHKSUM_CTRL_EN;
9f1fd0ef 1089
43250ddd 1090 if (hw->ctrl_flags & ATL1C_ASPM_CTRL_MON)
8f574b35 1091 rxq_ctrl_data |= (ASPM_THRUPUT_LIMIT_1M &
43250ddd
JY		 1092 ASPM_THRUPUT_LIMIT_MASK) << ASPM_THRUPUT_LIMIT_SHIFT;
1093
1094 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data);
1095}
1096
43250ddd
JY		 1097static void atl1c_configure_dma(struct atl1c_adapter *adapter)
1098{
1099 struct atl1c_hw *hw = &adapter->hw;
1100 u32 dma_ctrl_data;
1101
1102 dma_ctrl_data = DMA_CTRL_DMAR_REQ_PRI;
43250ddd
JY		 1103
1104 switch (hw->dma_order) {
1105 case atl1c_dma_ord_in:
1106 dma_ctrl_data |= DMA_CTRL_DMAR_IN_ORDER;
1107 break;
1108 case atl1c_dma_ord_enh:
1109 dma_ctrl_data |= DMA_CTRL_DMAR_ENH_ORDER;
1110 break;
1111 case atl1c_dma_ord_out:
1112 dma_ctrl_data |= DMA_CTRL_DMAR_OUT_ORDER;
1113 break;
1114 default:
1115 break;
1116 }
1117
1118 dma_ctrl_data |= (((u32)hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
1119 << DMA_CTRL_DMAR_BURST_LEN_SHIFT;
1120 dma_ctrl_data |= (((u32)hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK)
1121 << DMA_CTRL_DMAW_BURST_LEN_SHIFT;
1122 dma_ctrl_data |= (((u32)hw->dmar_dly_cnt) & DMA_CTRL_DMAR_DLY_CNT_MASK)
1123 << DMA_CTRL_DMAR_DLY_CNT_SHIFT;
1124 dma_ctrl_data |= (((u32)hw->dmaw_dly_cnt) & DMA_CTRL_DMAW_DLY_CNT_MASK)
1125 << DMA_CTRL_DMAW_DLY_CNT_SHIFT;
1126
1127 AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data);
1128}
1129
1130/*
1131 * Stop the mac, transmit and receive units
1132 * hw - Struct containing variables accessed by shared code
1133 * return : 0 or idle status (if error)
1134 */
1135static int atl1c_stop_mac(struct atl1c_hw *hw)
1136{
1137 u32 data;
43250ddd
JY		 1138
1139 AT_READ_REG(hw, REG_RXQ_CTRL, &data);
1140 data &= ~(RXQ1_CTRL_EN | RXQ2_CTRL_EN |
1141 RXQ3_CTRL_EN | RXQ_CTRL_EN);
1142 AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
1143
1144 AT_READ_REG(hw, REG_TXQ_CTRL, &data);
1145 data &= ~TXQ_CTRL_EN;
1146 AT_WRITE_REG(hw, REG_TWSI_CTRL, data);
1147
c930a662 1148 atl1c_wait_until_idle(hw);
43250ddd
JY		 1149
1150 AT_READ_REG(hw, REG_MAC_CTRL, &data);
1151 data &= ~(MAC_CTRL_TX_EN | MAC_CTRL_RX_EN);
1152 AT_WRITE_REG(hw, REG_MAC_CTRL, data);
1153
c930a662 1154 return (int)atl1c_wait_until_idle(hw);
43250ddd
JY		 1155}
1156
1157static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw)
1158{
1159 u32 data;
1160
1161 AT_READ_REG(hw, REG_RXQ_CTRL, &data);
43250ddd
JY		 1162 data |= RXQ_CTRL_EN;
1163 AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
1164}
1165
1166static void atl1c_enable_tx_ctrl(struct atl1c_hw *hw)
1167{
1168 u32 data;
1169
1170 AT_READ_REG(hw, REG_TXQ_CTRL, &data);
1171 data |= TXQ_CTRL_EN;
1172 AT_WRITE_REG(hw, REG_TXQ_CTRL, data);
1173}
1174
1175/*
1176 * Reset the transmit and receive units; mask and clear all interrupts.
1177 * hw - Struct containing variables accessed by shared code
1178 * return : 0 or idle status (if error)
1179 */
1180static int atl1c_reset_mac(struct atl1c_hw *hw)
1181{
1182 struct atl1c_adapter *adapter = (struct atl1c_adapter *)hw->adapter;
1183 struct pci_dev *pdev = adapter->pdev;
8f574b35 1184 u32 master_ctrl_data = 0;
43250ddd
JY		 1185
1186 AT_WRITE_REG(hw, REG_IMR, 0);
1187 AT_WRITE_REG(hw, REG_ISR, ISR_DIS_INT);
1188
8f574b35 1189 atl1c_stop_mac(hw);
43250ddd
JY		 1190 /*
1191 * Issue Soft Reset to the MAC. This will reset the chip's
1192 * transmit, receive, DMA. It will not effect
1193 * the current PCI configuration. The global reset bit is self-
1194 * clearing, and should clear within a microsecond.
1195 */
8f574b35
JY		 1196 AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data);
1197 master_ctrl_data |= MASTER_CTRL_OOB_DIS_OFF;
1198 AT_WRITE_REGW(hw, REG_MASTER_CTRL, ((master_ctrl_data | MASTER_CTRL_SOFT_RST)
1199 & 0xFFFF));
1200
43250ddd
JY		 1201 AT_WRITE_FLUSH(hw);
1202 msleep(10);
1203 /* Wait at least 10ms for All module to be Idle */
c930a662
JP		 1204
1205 if (atl1c_wait_until_idle(hw)) {
43250ddd 1206 dev_err(&pdev->dev,
c930a662 1207 "MAC state machine can't be idle since"
43250ddd
JY		 1208 " disabled for 10ms second\n");
1209 return -1;
1210 }
1211 return 0;
1212}
1213
1214static void atl1c_disable_l0s_l1(struct atl1c_hw *hw)
1215{
1216 u32 pm_ctrl_data;
1217
1218 AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
1219 pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
1220 PM_CTRL_L1_ENTRY_TIMER_SHIFT);
1221 pm_ctrl_data &= ~PM_CTRL_CLK_SWH_L1;
1222 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1223 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1224 pm_ctrl_data &= ~PM_CTRL_MAC_ASPM_CHK;
1225 pm_ctrl_data &= ~PM_CTRL_SERDES_PD_EX_L1;
1226
1227 pm_ctrl_data |= PM_CTRL_SERDES_BUDS_RX_L1_EN;
1228 pm_ctrl_data |= PM_CTRL_SERDES_PLL_L1_EN;
1229 pm_ctrl_data |= PM_CTRL_SERDES_L1_EN;
1230 AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);
1231}
1232
1233/*
1234 * Set ASPM state.
1235 * Enable/disable L0s/L1 depend on link state.
1236 */
1237static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup)
1238{
1239 u32 pm_ctrl_data;
496c185c 1240 u32 link_ctrl_data;
8f574b35 1241 u32 link_l1_timer = 0xF;
43250ddd
JY		 1242
1243 AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
496c185c 1244 AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data);
496c185c 1245
8f574b35 1246 pm_ctrl_data &= ~PM_CTRL_SERDES_PD_EX_L1;
43250ddd
JY		 1247 pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
1248 PM_CTRL_L1_ENTRY_TIMER_SHIFT);
496c185c 1249 pm_ctrl_data &= ~(PM_CTRL_LCKDET_TIMER_MASK <<
8f574b35
JY		 1250 PM_CTRL_LCKDET_TIMER_SHIFT);
1251 pm_ctrl_data |= AT_LCKDET_TIMER << PM_CTRL_LCKDET_TIMER_SHIFT;
496c185c 1252
8f574b35
JY		 1253 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d ||
1254 hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) {
496c185c
LR		 1255 link_ctrl_data &= ~LINK_CTRL_EXT_SYNC;
1256 if (!(hw->ctrl_flags & ATL1C_APS_MODE_ENABLE)) {
8f574b35 1257 if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10)
496c185c
LR		 1258 link_ctrl_data |= LINK_CTRL_EXT_SYNC;
1259 }
1260
1261 AT_WRITE_REG(hw, REG_LINK_CTRL, link_ctrl_data);
1262
8f574b35
JY		 1263 pm_ctrl_data |= PM_CTRL_RCVR_WT_TIMER;
1264 pm_ctrl_data &= ~(PM_CTRL_PM_REQ_TIMER_MASK <<
1265 PM_CTRL_PM_REQ_TIMER_SHIFT);
1266 pm_ctrl_data |= AT_ASPM_L1_TIMER <<
1267 PM_CTRL_PM_REQ_TIMER_SHIFT;
496c185c
LR		 1268 pm_ctrl_data &= ~PM_CTRL_SA_DLY_EN;
1269 pm_ctrl_data &= ~PM_CTRL_HOTRST;
1270 pm_ctrl_data |= 1 << PM_CTRL_L1_ENTRY_TIMER_SHIFT;
1271 pm_ctrl_data |= PM_CTRL_SERDES_PD_EX_L1;
1272 }
8f574b35 1273 pm_ctrl_data |= PM_CTRL_MAC_ASPM_CHK;
43250ddd 1274 if (linkup) {
496c185c
LR		 1275 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1276 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1277 if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT)
1278 pm_ctrl_data |= PM_CTRL_ASPM_L1_EN;
1279 if (hw->ctrl_flags & ATL1C_ASPM_L0S_SUPPORT)
1280 pm_ctrl_data |= PM_CTRL_ASPM_L0S_EN;
1281
8f574b35
JY		 1282 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d ||
1283 hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) {
496c185c
LR		 1284 if (hw->nic_type == athr_l2c_b)
1285 if (!(hw->ctrl_flags & ATL1C_APS_MODE_ENABLE))
8f574b35 1286 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
496c185c
LR		 1287 pm_ctrl_data &= ~PM_CTRL_SERDES_L1_EN;
1288 pm_ctrl_data &= ~PM_CTRL_SERDES_PLL_L1_EN;
1289 pm_ctrl_data &= ~PM_CTRL_SERDES_BUDS_RX_L1_EN;
1290 pm_ctrl_data |= PM_CTRL_CLK_SWH_L1;
8f574b35
JY		 1291 if (hw->adapter->link_speed == SPEED_100 ||
1292 hw->adapter->link_speed == SPEED_1000) {
1293 pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
1294 PM_CTRL_L1_ENTRY_TIMER_SHIFT);
1295 if (hw->nic_type == athr_l2c_b)
1296 link_l1_timer = 7;
1297 else if (hw->nic_type == athr_l2c_b2 ||
1298 hw->nic_type == athr_l1d_2)
1299 link_l1_timer = 4;
1300 pm_ctrl_data |= link_l1_timer <<
1301 PM_CTRL_L1_ENTRY_TIMER_SHIFT;
496c185c
LR		 1302 }
1303 } else {
1304 pm_ctrl_data |= PM_CTRL_SERDES_L1_EN;
1305 pm_ctrl_data |= PM_CTRL_SERDES_PLL_L1_EN;
1306 pm_ctrl_data |= PM_CTRL_SERDES_BUDS_RX_L1_EN;
1307 pm_ctrl_data &= ~PM_CTRL_CLK_SWH_L1;
1308 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1309 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
43250ddd 1310
8f574b35 1311 }
43250ddd 1312 } else {
52fbc100 1313 pm_ctrl_data &= ~PM_CTRL_SERDES_L1_EN;
43250ddd
JY		 1314 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1315 pm_ctrl_data &= ~PM_CTRL_SERDES_PLL_L1_EN;
43250ddd
JY		 1316 pm_ctrl_data |= PM_CTRL_CLK_SWH_L1;
1317
1318 if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT)
1319 pm_ctrl_data |= PM_CTRL_ASPM_L1_EN;
1320 else
1321 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1322 }
43250ddd 1323 AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);
8f574b35
JY		 1324
1325 return;
43250ddd
JY		 1326}
1327
1328static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter)
1329{
1330 struct atl1c_hw *hw = &adapter->hw;
1331 struct net_device *netdev = adapter->netdev;
1332 u32 mac_ctrl_data;
1333
1334 mac_ctrl_data = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN;
1335 mac_ctrl_data |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
1336
1337 if (adapter->link_duplex == FULL_DUPLEX) {
1338 hw->mac_duplex = true;
1339 mac_ctrl_data |= MAC_CTRL_DUPLX;
1340 }
1341
1342 if (adapter->link_speed == SPEED_1000)
1343 hw->mac_speed = atl1c_mac_speed_1000;
1344 else
1345 hw->mac_speed = atl1c_mac_speed_10_100;
1346
1347 mac_ctrl_data |= (hw->mac_speed & MAC_CTRL_SPEED_MASK) <<
1348 MAC_CTRL_SPEED_SHIFT;
1349
1350 mac_ctrl_data |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
1351 mac_ctrl_data |= ((hw->preamble_len & MAC_CTRL_PRMLEN_MASK) <<
1352 MAC_CTRL_PRMLEN_SHIFT);
1353
46facce9 1354 __atl1c_vlan_mode(netdev->features, &mac_ctrl_data);
43250ddd
JY		 1355
1356 mac_ctrl_data |= MAC_CTRL_BC_EN;
1357 if (netdev->flags & IFF_PROMISC)
1358 mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
1359 if (netdev->flags & IFF_ALLMULTI)
1360 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
1361
1362 mac_ctrl_data |= MAC_CTRL_SINGLE_PAUSE_EN;
8f574b35
JY		 1363 if (hw->nic_type == athr_l1d || hw->nic_type == athr_l2c_b2 ||
1364 hw->nic_type == athr_l1d_2) {
496c185c
LR		 1365 mac_ctrl_data |= MAC_CTRL_SPEED_MODE_SW;
1366 mac_ctrl_data |= MAC_CTRL_HASH_ALG_CRC32;
1367 }
43250ddd
JY		 1368 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
1369}
1370
1371/*
1372 * atl1c_configure - Configure Transmit&Receive Unit after Reset
1373 * @adapter: board private structure
1374 *
1375 * Configure the Tx /Rx unit of the MAC after a reset.
1376 */
1377static int atl1c_configure(struct atl1c_adapter *adapter)
1378{
1379 struct atl1c_hw *hw = &adapter->hw;
1380 u32 master_ctrl_data = 0;
1381 u32 intr_modrt_data;
8f574b35 1382 u32 data;
43250ddd
JY		 1383
1384 /* clear interrupt status */
1385 AT_WRITE_REG(hw, REG_ISR, 0xFFFFFFFF);
1386 /* Clear any WOL status */
1387 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
1388 /* set Interrupt Clear Timer
1389 * HW will enable self to assert interrupt event to system after
1390 * waiting x-time for software to notify it accept interrupt.
1391 */
8f574b35
JY		 1392
1393 data = CLK_GATING_EN_ALL;
1394 if (hw->ctrl_flags & ATL1C_CLK_GATING_EN) {
1395 if (hw->nic_type == athr_l2c_b)
1396 data &= ~CLK_GATING_RXMAC_EN;
1397 } else
1398 data = 0;
1399 AT_WRITE_REG(hw, REG_CLK_GATING_CTRL, data);
1400
43250ddd
JY		 1401 AT_WRITE_REG(hw, REG_INT_RETRIG_TIMER,
1402 hw->ict & INT_RETRIG_TIMER_MASK);
1403
1404 atl1c_configure_des_ring(adapter);
1405
1406 if (hw->ctrl_flags & ATL1C_INTR_MODRT_ENABLE) {
1407 intr_modrt_data = (hw->tx_imt & IRQ_MODRT_TIMER_MASK) <<
1408 IRQ_MODRT_TX_TIMER_SHIFT;
1409 intr_modrt_data |= (hw->rx_imt & IRQ_MODRT_TIMER_MASK) <<
1410 IRQ_MODRT_RX_TIMER_SHIFT;
1411 AT_WRITE_REG(hw, REG_IRQ_MODRT_TIMER_INIT, intr_modrt_data);
1412 master_ctrl_data |=
1413 MASTER_CTRL_TX_ITIMER_EN | MASTER_CTRL_RX_ITIMER_EN;
1414 }
1415
1416 if (hw->ctrl_flags & ATL1C_INTR_CLEAR_ON_READ)
1417 master_ctrl_data |= MASTER_CTRL_INT_RDCLR;
1418
8f574b35 1419 master_ctrl_data |= MASTER_CTRL_SA_TIMER_EN;
43250ddd
JY		 1420 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
1421
8d5c6836
HX		 1422 AT_WRITE_REG(hw, REG_SMB_STAT_TIMER,
1423 hw->smb_timer & SMB_STAT_TIMER_MASK);
43250ddd 1424
43250ddd
JY		 1425 /* set MTU */
1426 AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN +
1427 VLAN_HLEN + ETH_FCS_LEN);
43250ddd
JY		 1428
1429 atl1c_configure_tx(adapter);
1430 atl1c_configure_rx(adapter);
43250ddd
JY		 1431 atl1c_configure_dma(adapter);
1432
1433 return 0;
1434}
1435
1436static void atl1c_update_hw_stats(struct atl1c_adapter *adapter)
1437{
1438 u16 hw_reg_addr = 0;
1439 unsigned long *stats_item = NULL;
1440 u32 data;
1441
1442 /* update rx status */
1443 hw_reg_addr = REG_MAC_RX_STATUS_BIN;
1444 stats_item = &adapter->hw_stats.rx_ok;
1445 while (hw_reg_addr <= REG_MAC_RX_STATUS_END) {
1446 AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
1447 *stats_item += data;
1448 stats_item++;
1449 hw_reg_addr += 4;
1450 }
1451/* update tx status */
1452 hw_reg_addr = REG_MAC_TX_STATUS_BIN;
1453 stats_item = &adapter->hw_stats.tx_ok;
1454 while (hw_reg_addr <= REG_MAC_TX_STATUS_END) {
1455 AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
1456 *stats_item += data;
1457 stats_item++;
1458 hw_reg_addr += 4;
1459 }
1460}
1461
1462/*
1463 * atl1c_get_stats - Get System Network Statistics
1464 * @netdev: network interface device structure
1465 *
1466 * Returns the address of the device statistics structure.
1467 * The statistics are actually updated from the timer callback.
1468 */
1469static struct net_device_stats *atl1c_get_stats(struct net_device *netdev)
1470{
1471 struct atl1c_adapter *adapter = netdev_priv(netdev);
1472 struct atl1c_hw_stats *hw_stats = &adapter->hw_stats;
a2c483a1 1473 struct net_device_stats *net_stats = &netdev->stats;
43250ddd
JY		 1474
1475 atl1c_update_hw_stats(adapter);
1476 net_stats->rx_packets = hw_stats->rx_ok;
1477 net_stats->tx_packets = hw_stats->tx_ok;
1478 net_stats->rx_bytes = hw_stats->rx_byte_cnt;
1479 net_stats->tx_bytes = hw_stats->tx_byte_cnt;
1480 net_stats->multicast = hw_stats->rx_mcast;
1481 net_stats->collisions = hw_stats->tx_1_col +
1482 hw_stats->tx_2_col * 2 +
1483 hw_stats->tx_late_col + hw_stats->tx_abort_col;
1484 net_stats->rx_errors = hw_stats->rx_frag + hw_stats->rx_fcs_err +
1485 hw_stats->rx_len_err + hw_stats->rx_sz_ov +
1486 hw_stats->rx_rrd_ov + hw_stats->rx_align_err;
1487 net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov;
1488 net_stats->rx_length_errors = hw_stats->rx_len_err;
1489 net_stats->rx_crc_errors = hw_stats->rx_fcs_err;
1490 net_stats->rx_frame_errors = hw_stats->rx_align_err;
1491 net_stats->rx_over_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
1492
1493 net_stats->rx_missed_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
1494
1495 net_stats->tx_errors = hw_stats->tx_late_col + hw_stats->tx_abort_col +
1496 hw_stats->tx_underrun + hw_stats->tx_trunc;
1497 net_stats->tx_fifo_errors = hw_stats->tx_underrun;
1498 net_stats->tx_aborted_errors = hw_stats->tx_abort_col;
1499 net_stats->tx_window_errors = hw_stats->tx_late_col;
1500
a2c483a1 1501 return net_stats;
43250ddd
JY		 1502}
1503
1504static inline void atl1c_clear_phy_int(struct atl1c_adapter *adapter)
1505{
1506 u16 phy_data;
1507
1508 spin_lock(&adapter->mdio_lock);
1509 atl1c_read_phy_reg(&adapter->hw, MII_ISR, &phy_data);
1510 spin_unlock(&adapter->mdio_lock);
1511}
1512
1513static bool atl1c_clean_tx_irq(struct atl1c_adapter *adapter,
1514 enum atl1c_trans_queue type)
1515{
1516 struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
1517 &adapter->tpd_ring[type];
1518 struct atl1c_buffer *buffer_info;
c6060be4 1519 struct pci_dev *pdev = adapter->pdev;
43250ddd
JY		 1520 u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
1521 u16 hw_next_to_clean;
0af48336 1522 u16 reg;
43250ddd 1523
0af48336 1524 reg = type == atl1c_trans_high ? REG_TPD_PRI1_CIDX : REG_TPD_PRI0_CIDX;
43250ddd 1525
0af48336 1526 AT_READ_REGW(&adapter->hw, reg, &hw_next_to_clean);
43250ddd
JY		 1527
1528 while (next_to_clean != hw_next_to_clean) {
1529 buffer_info = &tpd_ring->buffer_info[next_to_clean];
c6060be4 1530 atl1c_clean_buffer(pdev, buffer_info, 1);
43250ddd
JY		 1531 if (++next_to_clean == tpd_ring->count)
1532 next_to_clean = 0;
1533 atomic_set(&tpd_ring->next_to_clean, next_to_clean);
1534 }
1535
1536 if (netif_queue_stopped(adapter->netdev) &&
1537 netif_carrier_ok(adapter->netdev)) {
1538 netif_wake_queue(adapter->netdev);
1539 }
1540
1541 return true;
1542}
1543
1544/*
1545 * atl1c_intr - Interrupt Handler
1546 * @irq: interrupt number
1547 * @data: pointer to a network interface device structure
1548 * @pt_regs: CPU registers structure
1549 */
1550static irqreturn_t atl1c_intr(int irq, void *data)
1551{
1552 struct net_device *netdev = data;
1553 struct atl1c_adapter *adapter = netdev_priv(netdev);
1554 struct pci_dev *pdev = adapter->pdev;
1555 struct atl1c_hw *hw = &adapter->hw;
1556 int max_ints = AT_MAX_INT_WORK;
1557 int handled = IRQ_NONE;
1558 u32 status;
1559 u32 reg_data;
1560
1561 do {
1562 AT_READ_REG(hw, REG_ISR, &reg_data);
1563 status = reg_data & hw->intr_mask;
1564
1565 if (status == 0 || (status & ISR_DIS_INT) != 0) {
1566 if (max_ints != AT_MAX_INT_WORK)
1567 handled = IRQ_HANDLED;
1568 break;
1569 }
1570 /* link event */
1571 if (status & ISR_GPHY)
1572 atl1c_clear_phy_int(adapter);
1573 /* Ack ISR */
1574 AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);
1575 if (status & ISR_RX_PKT) {
1576 if (likely(napi_schedule_prep(&adapter->napi))) {
1577 hw->intr_mask &= ~ISR_RX_PKT;
1578 AT_WRITE_REG(hw, REG_IMR, hw->intr_mask);
1579 __napi_schedule(&adapter->napi);
1580 }
1581 }
1582 if (status & ISR_TX_PKT)
1583 atl1c_clean_tx_irq(adapter, atl1c_trans_normal);
1584
1585 handled = IRQ_HANDLED;
1586 /* check if PCIE PHY Link down */
1587 if (status & ISR_ERROR) {
1588 if (netif_msg_hw(adapter))
1589 dev_err(&pdev->dev,
1590 "atl1c hardware error (status = 0x%x)\n",
1591 status & ISR_ERROR);
1592 /* reset MAC */
78315457 1593 set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event);
cb190546 1594 schedule_work(&adapter->common_task);
8f574b35 1595 return IRQ_HANDLED;
43250ddd
JY		 1596 }
1597
1598 if (status & ISR_OVER)
1599 if (netif_msg_intr(adapter))
1600 dev_warn(&pdev->dev,
af901ca1 1601 "TX/RX overflow (status = 0x%x)\n",
43250ddd
JY		 1602 status & ISR_OVER);
1603
1604 /* link event */
1605 if (status & (ISR_GPHY | ISR_MANUAL)) {
a2c483a1 1606 netdev->stats.tx_carrier_errors++;
43250ddd
JY		 1607 atl1c_link_chg_event(adapter);
1608 break;
1609 }
1610
1611 } while (--max_ints > 0);
1612 /* re-enable Interrupt*/
1613 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
1614 return handled;
1615}
1616
1617static inline void atl1c_rx_checksum(struct atl1c_adapter *adapter,
1618 struct sk_buff *skb, struct atl1c_recv_ret_status *prrs)
1619{
1620 /*
1621 * The pid field in RRS in not correct sometimes, so we
1622 * cannot figure out if the packet is fragmented or not,
1623 * so we tell the KERNEL CHECKSUM_NONE
1624 */
bc8acf2c 1625 skb_checksum_none_assert(skb);
43250ddd
JY		 1626}
1627
9f1fd0ef 1628static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter)
43250ddd 1629{
9f1fd0ef 1630 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
43250ddd
JY		 1631 struct pci_dev *pdev = adapter->pdev;
1632 struct atl1c_buffer *buffer_info, *next_info;
1633 struct sk_buff *skb;
1634 void *vir_addr = NULL;
1635 u16 num_alloc = 0;
1636 u16 rfd_next_to_use, next_next;
1637 struct atl1c_rx_free_desc *rfd_desc;
1638
1639 next_next = rfd_next_to_use = rfd_ring->next_to_use;
1640 if (++next_next == rfd_ring->count)
1641 next_next = 0;
1642 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1643 next_info = &rfd_ring->buffer_info[next_next];
1644
c6060be4 1645 while (next_info->flags & ATL1C_BUFFER_FREE) {
43250ddd
JY		 1646 rfd_desc = ATL1C_RFD_DESC(rfd_ring, rfd_next_to_use);
1647
1d266430 1648 skb = netdev_alloc_skb(adapter->netdev, adapter->rx_buffer_len);
43250ddd
JY		 1649 if (unlikely(!skb)) {
1650 if (netif_msg_rx_err(adapter))
1651 dev_warn(&pdev->dev, "alloc rx buffer failed\n");
1652 break;
1653 }
1654
1655 /*
1656 * Make buffer alignment 2 beyond a 16 byte boundary
1657 * this will result in a 16 byte aligned IP header after
1658 * the 14 byte MAC header is removed
1659 */
1660 vir_addr = skb->data;
c6060be4 1661 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
43250ddd
JY		 1662 buffer_info->skb = skb;
1663 buffer_info->length = adapter->rx_buffer_len;
1664 buffer_info->dma = pci_map_single(pdev, vir_addr,
1665 buffer_info->length,
1666 PCI_DMA_FROMDEVICE);
4b45e342
JY		 1667 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
1668 ATL1C_PCIMAP_FROMDEVICE);
43250ddd
JY		 1669 rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
1670 rfd_next_to_use = next_next;
1671 if (++next_next == rfd_ring->count)
1672 next_next = 0;
1673 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1674 next_info = &rfd_ring->buffer_info[next_next];
1675 num_alloc++;
1676 }
1677
1678 if (num_alloc) {
1679 /* TODO: update mailbox here */
1680 wmb();
1681 rfd_ring->next_to_use = rfd_next_to_use;
9f1fd0ef 1682 AT_WRITE_REG(&adapter->hw, REG_MB_RFD0_PROD_IDX,
43250ddd
JY		 1683 rfd_ring->next_to_use & MB_RFDX_PROD_IDX_MASK);
1684 }
1685
1686 return num_alloc;
1687}
1688
1689static void atl1c_clean_rrd(struct atl1c_rrd_ring *rrd_ring,
1690 struct atl1c_recv_ret_status *rrs, u16 num)
1691{
1692 u16 i;
1693 /* the relationship between rrd and rfd is one map one */
1694 for (i = 0; i < num; i++, rrs = ATL1C_RRD_DESC(rrd_ring,
1695 rrd_ring->next_to_clean)) {
1696 rrs->word3 &= ~RRS_RXD_UPDATED;
1697 if (++rrd_ring->next_to_clean == rrd_ring->count)
1698 rrd_ring->next_to_clean = 0;
1699 }
1700}
1701
1702static void atl1c_clean_rfd(struct atl1c_rfd_ring *rfd_ring,
1703 struct atl1c_recv_ret_status *rrs, u16 num)
1704{
1705 u16 i;
1706 u16 rfd_index;
1707 struct atl1c_buffer *buffer_info = rfd_ring->buffer_info;
1708
1709 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
1710 RRS_RX_RFD_INDEX_MASK;
1711 for (i = 0; i < num; i++) {
1712 buffer_info[rfd_index].skb = NULL;
c6060be4
JY		 1713 ATL1C_SET_BUFFER_STATE(&buffer_info[rfd_index],
1714 ATL1C_BUFFER_FREE);
43250ddd
JY		 1715 if (++rfd_index == rfd_ring->count)
1716 rfd_index = 0;
1717 }
1718 rfd_ring->next_to_clean = rfd_index;
1719}
1720
9f1fd0ef 1721static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter,
43250ddd
JY		 1722 int *work_done, int work_to_do)
1723{
1724 u16 rfd_num, rfd_index;
1725 u16 count = 0;
1726 u16 length;
1727 struct pci_dev *pdev = adapter->pdev;
1728 struct net_device *netdev = adapter->netdev;
9f1fd0ef
HX		 1729 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
1730 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
43250ddd
JY		 1731 struct sk_buff *skb;
1732 struct atl1c_recv_ret_status *rrs;
1733 struct atl1c_buffer *buffer_info;
1734
1735 while (1) {
1736 if (*work_done >= work_to_do)
1737 break;
1738 rrs = ATL1C_RRD_DESC(rrd_ring, rrd_ring->next_to_clean);
1739 if (likely(RRS_RXD_IS_VALID(rrs->word3))) {
1740 rfd_num = (rrs->word0 >> RRS_RX_RFD_CNT_SHIFT) &
1741 RRS_RX_RFD_CNT_MASK;
37b76c69 1742 if (unlikely(rfd_num != 1))
43250ddd
JY		 1743 /* TODO support mul rfd*/
1744 if (netif_msg_rx_err(adapter))
1745 dev_warn(&pdev->dev,
1746 "Multi rfd not support yet!\n");
1747 goto rrs_checked;
1748 } else {
1749 break;
1750 }
1751rrs_checked:
1752 atl1c_clean_rrd(rrd_ring, rrs, rfd_num);
1753 if (rrs->word3 & (RRS_RX_ERR_SUM | RRS_802_3_LEN_ERR)) {
1754 atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
1755 if (netif_msg_rx_err(adapter))
1756 dev_warn(&pdev->dev,
1757 "wrong packet! rrs word3 is %x\n",
1758 rrs->word3);
1759 continue;
1760 }
1761
1762 length = le16_to_cpu((rrs->word3 >> RRS_PKT_SIZE_SHIFT) &
1763 RRS_PKT_SIZE_MASK);
1764 /* Good Receive */
1765 if (likely(rfd_num == 1)) {
1766 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
1767 RRS_RX_RFD_INDEX_MASK;
1768 buffer_info = &rfd_ring->buffer_info[rfd_index];
1769 pci_unmap_single(pdev, buffer_info->dma,
1770 buffer_info->length, PCI_DMA_FROMDEVICE);
1771 skb = buffer_info->skb;
1772 } else {
1773 /* TODO */
1774 if (netif_msg_rx_err(adapter))
1775 dev_warn(&pdev->dev,
1776 "Multi rfd not support yet!\n");
1777 break;
1778 }
1779 atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
1780 skb_put(skb, length - ETH_FCS_LEN);
1781 skb->protocol = eth_type_trans(skb, netdev);
43250ddd 1782 atl1c_rx_checksum(adapter, skb, rrs);
46facce9 1783 if (rrs->word3 & RRS_VLAN_INS) {
43250ddd
JY		 1784 u16 vlan;
1785
1786 AT_TAG_TO_VLAN(rrs->vlan_tag, vlan);
1787 vlan = le16_to_cpu(vlan);
46facce9
JP		 1788 __vlan_hwaccel_put_tag(skb, vlan);
1789 }
1790 netif_receive_skb(skb);
43250ddd 1791
43250ddd
JY		 1792 (*work_done)++;
1793 count++;
1794 }
1795 if (count)
9f1fd0ef 1796 atl1c_alloc_rx_buffer(adapter);
43250ddd
JY		 1797}
1798
1799/*
1800 * atl1c_clean - NAPI Rx polling callback
1801 * @adapter: board private structure
1802 */
1803static int atl1c_clean(struct napi_struct *napi, int budget)
1804{
1805 struct atl1c_adapter *adapter =
1806 container_of(napi, struct atl1c_adapter, napi);
1807 int work_done = 0;
1808
1809 /* Keep link state information with original netdev */
1810 if (!netif_carrier_ok(adapter->netdev))
1811 goto quit_polling;
1812 /* just enable one RXQ */
9f1fd0ef 1813 atl1c_clean_rx_irq(adapter, &work_done, budget);
43250ddd
JY		 1814
1815 if (work_done < budget) {
1816quit_polling:
1817 napi_complete(napi);
1818 adapter->hw.intr_mask |= ISR_RX_PKT;
1819 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
1820 }
1821 return work_done;
1822}
1823
1824#ifdef CONFIG_NET_POLL_CONTROLLER
1825
1826/*
1827 * Polling 'interrupt' - used by things like netconsole to send skbs
1828 * without having to re-enable interrupts. It's not called while
1829 * the interrupt routine is executing.
1830 */
1831static void atl1c_netpoll(struct net_device *netdev)
1832{
1833 struct atl1c_adapter *adapter = netdev_priv(netdev);
1834
1835 disable_irq(adapter->pdev->irq);
1836 atl1c_intr(adapter->pdev->irq, netdev);
1837 enable_irq(adapter->pdev->irq);
1838}
1839#endif
1840
1841static inline u16 atl1c_tpd_avail(struct atl1c_adapter *adapter, enum atl1c_trans_queue type)
1842{
1843 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
1844 u16 next_to_use = 0;
1845 u16 next_to_clean = 0;
1846
1847 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
1848 next_to_use = tpd_ring->next_to_use;
1849
1850 return (u16)(next_to_clean > next_to_use) ?
1851 (next_to_clean - next_to_use - 1) :
1852 (tpd_ring->count + next_to_clean - next_to_use - 1);
1853}
1854
1855/*
1856 * get next usable tpd
1857 * Note: should call atl1c_tdp_avail to make sure
1858 * there is enough tpd to use
1859 */
1860static struct atl1c_tpd_desc *atl1c_get_tpd(struct atl1c_adapter *adapter,
1861 enum atl1c_trans_queue type)
1862{
1863 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
1864 struct atl1c_tpd_desc *tpd_desc;
1865 u16 next_to_use = 0;
1866
1867 next_to_use = tpd_ring->next_to_use;
1868 if (++tpd_ring->next_to_use == tpd_ring->count)
1869 tpd_ring->next_to_use = 0;
1870 tpd_desc = ATL1C_TPD_DESC(tpd_ring, next_to_use);
1871 memset(tpd_desc, 0, sizeof(struct atl1c_tpd_desc));
1872 return tpd_desc;
1873}
1874
1875static struct atl1c_buffer *
1876atl1c_get_tx_buffer(struct atl1c_adapter *adapter, struct atl1c_tpd_desc *tpd)
1877{
1878 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
1879
1880 return &tpd_ring->buffer_info[tpd -
1881 (struct atl1c_tpd_desc *)tpd_ring->desc];
1882}
1883
1884/* Calculate the transmit packet descript needed*/
1885static u16 atl1c_cal_tpd_req(const struct sk_buff *skb)
1886{
1887 u16 tpd_req;
1888 u16 proto_hdr_len = 0;
1889
1890 tpd_req = skb_shinfo(skb)->nr_frags + 1;
1891
1892 if (skb_is_gso(skb)) {
1893 proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
1894 if (proto_hdr_len < skb_headlen(skb))
1895 tpd_req++;
1896 if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6)
1897 tpd_req++;
1898 }
1899 return tpd_req;
1900}
1901
1902static int atl1c_tso_csum(struct atl1c_adapter *adapter,
1903 struct sk_buff *skb,
1904 struct atl1c_tpd_desc **tpd,
1905 enum atl1c_trans_queue type)
1906{
1907 struct pci_dev *pdev = adapter->pdev;
1908 u8 hdr_len;
1909 u32 real_len;
1910 unsigned short offload_type;
1911 int err;
1912
1913 if (skb_is_gso(skb)) {
1914 if (skb_header_cloned(skb)) {
1915 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
1916 if (unlikely(err))
1917 return -1;
1918 }
1919 offload_type = skb_shinfo(skb)->gso_type;
1920
1921 if (offload_type & SKB_GSO_TCPV4) {
1922 real_len = (((unsigned char *)ip_hdr(skb) - skb->data)
1923 + ntohs(ip_hdr(skb)->tot_len));
1924
1925 if (real_len < skb->len)
1926 pskb_trim(skb, real_len);
1927
1928 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
1929 if (unlikely(skb->len == hdr_len)) {
1930 /* only xsum need */
1931 if (netif_msg_tx_queued(adapter))
1932 dev_warn(&pdev->dev,
1933 "IPV4 tso with zero data??\n");
1934 goto check_sum;
1935 } else {
1936 ip_hdr(skb)->check = 0;
1937 tcp_hdr(skb)->check = ~csum_tcpudp_magic(
1938 ip_hdr(skb)->saddr,
1939 ip_hdr(skb)->daddr,
1940 0, IPPROTO_TCP, 0);
1941 (*tpd)->word1 |= 1 << TPD_IPV4_PACKET_SHIFT;
1942 }
1943 }
1944
1945 if (offload_type & SKB_GSO_TCPV6) {
1946 struct atl1c_tpd_ext_desc *etpd =
1947 *(struct atl1c_tpd_ext_desc **)(tpd);
1948
1949 memset(etpd, 0, sizeof(struct atl1c_tpd_ext_desc));
1950 *tpd = atl1c_get_tpd(adapter, type);
1951 ipv6_hdr(skb)->payload_len = 0;
1952 /* check payload == 0 byte ? */
1953 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
1954 if (unlikely(skb->len == hdr_len)) {
1955 /* only xsum need */
1956 if (netif_msg_tx_queued(adapter))
1957 dev_warn(&pdev->dev,
1958 "IPV6 tso with zero data??\n");
1959 goto check_sum;
1960 } else
1961 tcp_hdr(skb)->check = ~csum_ipv6_magic(
1962 &ipv6_hdr(skb)->saddr,
1963 &ipv6_hdr(skb)->daddr,
1964 0, IPPROTO_TCP, 0);
1965 etpd->word1 |= 1 << TPD_LSO_EN_SHIFT;
1966 etpd->word1 |= 1 << TPD_LSO_VER_SHIFT;
1967 etpd->pkt_len = cpu_to_le32(skb->len);
1968 (*tpd)->word1 |= 1 << TPD_LSO_VER_SHIFT;
1969 }
1970
1971 (*tpd)->word1 |= 1 << TPD_LSO_EN_SHIFT;
1972 (*tpd)->word1 |= (skb_transport_offset(skb) & TPD_TCPHDR_OFFSET_MASK) <<
1973 TPD_TCPHDR_OFFSET_SHIFT;
1974 (*tpd)->word1 |= (skb_shinfo(skb)->gso_size & TPD_MSS_MASK) <<
1975 TPD_MSS_SHIFT;
1976 return 0;
1977 }
1978
1979check_sum:
1980 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
1981 u8 css, cso;
0d0b1672 1982 cso = skb_checksum_start_offset(skb);
43250ddd
JY		 1983
1984 if (unlikely(cso & 0x1)) {
1985 if (netif_msg_tx_err(adapter))
1986 dev_err(&adapter->pdev->dev,
1987 "payload offset should not an event number\n");
1988 return -1;
1989 } else {
1990 css = cso + skb->csum_offset;
1991
1992 (*tpd)->word1 |= ((cso >> 1) & TPD_PLOADOFFSET_MASK) <<
1993 TPD_PLOADOFFSET_SHIFT;
1994 (*tpd)->word1 |= ((css >> 1) & TPD_CCSUM_OFFSET_MASK) <<
1995 TPD_CCSUM_OFFSET_SHIFT;
1996 (*tpd)->word1 |= 1 << TPD_CCSUM_EN_SHIFT;
1997 }
1998 }
1999 return 0;
2000}
2001
2002static void atl1c_tx_map(struct atl1c_adapter *adapter,
2003 struct sk_buff *skb, struct atl1c_tpd_desc *tpd,
2004 enum atl1c_trans_queue type)
2005{
2006 struct atl1c_tpd_desc *use_tpd = NULL;
2007 struct atl1c_buffer *buffer_info = NULL;
2008 u16 buf_len = skb_headlen(skb);
2009 u16 map_len = 0;
2010 u16 mapped_len = 0;
2011 u16 hdr_len = 0;
2012 u16 nr_frags;
2013 u16 f;
2014 int tso;
2015
2016 nr_frags = skb_shinfo(skb)->nr_frags;
2017 tso = (tpd->word1 >> TPD_LSO_EN_SHIFT) & TPD_LSO_EN_MASK;
2018 if (tso) {
2019 /* TSO */
2020 map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
2021 use_tpd = tpd;
2022
2023 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2024 buffer_info->length = map_len;
2025 buffer_info->dma = pci_map_single(adapter->pdev,
2026 skb->data, hdr_len, PCI_DMA_TODEVICE);
c6060be4 2027 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
4b45e342
JY		 2028 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
2029 ATL1C_PCIMAP_TODEVICE);
43250ddd
JY		 2030 mapped_len += map_len;
2031 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2032 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2033 }
2034
2035 if (mapped_len < buf_len) {
2036 /* mapped_len == 0, means we should use the first tpd,
2037 which is given by caller */
2038 if (mapped_len == 0)
2039 use_tpd = tpd;
2040 else {
2041 use_tpd = atl1c_get_tpd(adapter, type);
43250ddd
JY		 2042 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
2043 }
2044 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2045 buffer_info->length = buf_len - mapped_len;
2046 buffer_info->dma =
2047 pci_map_single(adapter->pdev, skb->data + mapped_len,
2048 buffer_info->length, PCI_DMA_TODEVICE);
c6060be4 2049 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
4b45e342
JY		 2050 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
2051 ATL1C_PCIMAP_TODEVICE);
43250ddd
JY		 2052 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2053 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2054 }
2055
2056 for (f = 0; f < nr_frags; f++) {
2057 struct skb_frag_struct *frag;
2058
2059 frag = &skb_shinfo(skb)->frags[f];
2060
2061 use_tpd = atl1c_get_tpd(adapter, type);
2062 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
2063
2064 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
9e903e08 2065 buffer_info->length = skb_frag_size(frag);
8d1bb865
IC		 2066 buffer_info->dma = skb_frag_dma_map(&adapter->pdev->dev,
2067 frag, 0,
2068 buffer_info->length,
5d6bcdfe 2069 DMA_TO_DEVICE);
c6060be4 2070 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
4b45e342
JY		 2071 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_PAGE,
2072 ATL1C_PCIMAP_TODEVICE);
43250ddd
JY		 2073 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2074 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2075 }
2076
2077 /* The last tpd */
2078 use_tpd->word1 |= 1 << TPD_EOP_SHIFT;
2079 /* The last buffer info contain the skb address,
2080 so it will be free after unmap */
2081 buffer_info->skb = skb;
2082}
2083
2084static void atl1c_tx_queue(struct atl1c_adapter *adapter, struct sk_buff *skb,
2085 struct atl1c_tpd_desc *tpd, enum atl1c_trans_queue type)
2086{
2087 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
0af48336 2088 u16 reg;
43250ddd 2089
0af48336
HX		 2090 reg = type == atl1c_trans_high ? REG_TPD_PRI1_PIDX : REG_TPD_PRI0_PIDX;
2091 AT_WRITE_REGW(&adapter->hw, reg, tpd_ring->next_to_use);
43250ddd
JY		 2092}
2093
61357325
SH		 2094static netdev_tx_t atl1c_xmit_frame(struct sk_buff *skb,
2095 struct net_device *netdev)
43250ddd
JY		 2096{
2097 struct atl1c_adapter *adapter = netdev_priv(netdev);
2098 unsigned long flags;
2099 u16 tpd_req = 1;
2100 struct atl1c_tpd_desc *tpd;
2101 enum atl1c_trans_queue type = atl1c_trans_normal;
2102
2103 if (test_bit(__AT_DOWN, &adapter->flags)) {
2104 dev_kfree_skb_any(skb);
2105 return NETDEV_TX_OK;
2106 }
2107
2108 tpd_req = atl1c_cal_tpd_req(skb);
2109 if (!spin_trylock_irqsave(&adapter->tx_lock, flags)) {
2110 if (netif_msg_pktdata(adapter))
2111 dev_info(&adapter->pdev->dev, "tx locked\n");
2112 return NETDEV_TX_LOCKED;
2113 }
43250ddd
JY		 2114
2115 if (atl1c_tpd_avail(adapter, type) < tpd_req) {
2116 /* no enough descriptor, just stop queue */
2117 netif_stop_queue(netdev);
2118 spin_unlock_irqrestore(&adapter->tx_lock, flags);
2119 return NETDEV_TX_BUSY;
2120 }
2121
2122 tpd = atl1c_get_tpd(adapter, type);
2123
2124 /* do TSO and check sum */
2125 if (atl1c_tso_csum(adapter, skb, &tpd, type) != 0) {
2126 spin_unlock_irqrestore(&adapter->tx_lock, flags);
2127 dev_kfree_skb_any(skb);
2128 return NETDEV_TX_OK;
2129 }
2130
eab6d18d 2131 if (unlikely(vlan_tx_tag_present(skb))) {
43250ddd
JY		 2132 u16 vlan = vlan_tx_tag_get(skb);
2133 __le16 tag;
2134
2135 vlan = cpu_to_le16(vlan);
2136 AT_VLAN_TO_TAG(vlan, tag);
2137 tpd->word1 |= 1 << TPD_INS_VTAG_SHIFT;
2138 tpd->vlan_tag = tag;
2139 }
2140
2141 if (skb_network_offset(skb) != ETH_HLEN)
2142 tpd->word1 |= 1 << TPD_ETH_TYPE_SHIFT; /* Ethernet frame */
2143
2144 atl1c_tx_map(adapter, skb, tpd, type);
2145 atl1c_tx_queue(adapter, skb, tpd, type);
2146
43250ddd
JY		 2147 spin_unlock_irqrestore(&adapter->tx_lock, flags);
2148 return NETDEV_TX_OK;
2149}
2150
2151static void atl1c_free_irq(struct atl1c_adapter *adapter)
2152{
2153 struct net_device *netdev = adapter->netdev;
2154
2155 free_irq(adapter->pdev->irq, netdev);
2156
2157 if (adapter->have_msi)
2158 pci_disable_msi(adapter->pdev);
2159}
2160
2161static int atl1c_request_irq(struct atl1c_adapter *adapter)
2162{
2163 struct pci_dev *pdev = adapter->pdev;
2164 struct net_device *netdev = adapter->netdev;
2165 int flags = 0;
2166 int err = 0;
2167
2168 adapter->have_msi = true;
2169 err = pci_enable_msi(adapter->pdev);
2170 if (err) {
2171 if (netif_msg_ifup(adapter))
2172 dev_err(&pdev->dev,
2173 "Unable to allocate MSI interrupt Error: %d\n",
2174 err);
2175 adapter->have_msi = false;
93f7fab4 2176 }
43250ddd
JY		 2177
2178 if (!adapter->have_msi)
2179 flags |= IRQF_SHARED;
9aff7e92 2180 err = request_irq(adapter->pdev->irq, atl1c_intr, flags,
43250ddd
JY		 2181 netdev->name, netdev);
2182 if (err) {
2183 if (netif_msg_ifup(adapter))
2184 dev_err(&pdev->dev,
2185 "Unable to allocate interrupt Error: %d\n",
2186 err);
2187 if (adapter->have_msi)
2188 pci_disable_msi(adapter->pdev);
2189 return err;
2190 }
2191 if (netif_msg_ifup(adapter))
2192 dev_dbg(&pdev->dev, "atl1c_request_irq OK\n");
2193 return err;
2194}
2195
0fb1e54e 2196static int atl1c_up(struct atl1c_adapter *adapter)
43250ddd
JY		 2197{
2198 struct net_device *netdev = adapter->netdev;
2199 int num;
2200 int err;
43250ddd
JY		 2201
2202 netif_carrier_off(netdev);
2203 atl1c_init_ring_ptrs(adapter);
2204 atl1c_set_multi(netdev);
2205 atl1c_restore_vlan(adapter);
2206
9f1fd0ef
HX		 2207 num = atl1c_alloc_rx_buffer(adapter);
2208 if (unlikely(num == 0)) {
2209 err = -ENOMEM;
2210 goto err_alloc_rx;
43250ddd
JY		 2211 }
2212
2213 if (atl1c_configure(adapter)) {
2214 err = -EIO;
2215 goto err_up;
2216 }
2217
2218 err = atl1c_request_irq(adapter);
2219 if (unlikely(err))
2220 goto err_up;
2221
2222 clear_bit(__AT_DOWN, &adapter->flags);
2223 napi_enable(&adapter->napi);
2224 atl1c_irq_enable(adapter);
2225 atl1c_check_link_status(adapter);
2226 netif_start_queue(netdev);
2227 return err;
2228
2229err_up:
2230err_alloc_rx:
2231 atl1c_clean_rx_ring(adapter);
2232 return err;
2233}
2234
0fb1e54e 2235static void atl1c_down(struct atl1c_adapter *adapter)
43250ddd
JY		 2236{
2237 struct net_device *netdev = adapter->netdev;
2238
2239 atl1c_del_timer(adapter);
cb190546 2240 adapter->work_event = 0; /* clear all event */
43250ddd
JY		 2241 /* signal that we're down so the interrupt handler does not
2242 * reschedule our watchdog timer */
2243 set_bit(__AT_DOWN, &adapter->flags);
2244 netif_carrier_off(netdev);
2245 napi_disable(&adapter->napi);
2246 atl1c_irq_disable(adapter);
2247 atl1c_free_irq(adapter);
43250ddd
JY		 2248 /* reset MAC to disable all RX/TX */
2249 atl1c_reset_mac(&adapter->hw);
2250 msleep(1);
2251
2252 adapter->link_speed = SPEED_0;
2253 adapter->link_duplex = -1;
2254 atl1c_clean_tx_ring(adapter, atl1c_trans_normal);
2255 atl1c_clean_tx_ring(adapter, atl1c_trans_high);
2256 atl1c_clean_rx_ring(adapter);
2257}
2258
2259/*
2260 * atl1c_open - Called when a network interface is made active
2261 * @netdev: network interface device structure
2262 *
2263 * Returns 0 on success, negative value on failure
2264 *
2265 * The open entry point is called when a network interface is made
2266 * active by the system (IFF_UP). At this point all resources needed
2267 * for transmit and receive operations are allocated, the interrupt
2268 * handler is registered with the OS, the watchdog timer is started,
2269 * and the stack is notified that the interface is ready.
2270 */
2271static int atl1c_open(struct net_device *netdev)
2272{
2273 struct atl1c_adapter *adapter = netdev_priv(netdev);
2274 int err;
2275
2276 /* disallow open during test */
2277 if (test_bit(__AT_TESTING, &adapter->flags))
2278 return -EBUSY;
2279
2280 /* allocate rx/tx dma buffer & descriptors */
2281 err = atl1c_setup_ring_resources(adapter);
2282 if (unlikely(err))
2283 return err;
2284
2285 err = atl1c_up(adapter);
2286 if (unlikely(err))
2287 goto err_up;
2288
2289 if (adapter->hw.ctrl_flags & ATL1C_FPGA_VERSION) {
2290 u32 phy_data;
2291
2292 AT_READ_REG(&adapter->hw, REG_MDIO_CTRL, &phy_data);
2293 phy_data |= MDIO_AP_EN;
2294 AT_WRITE_REG(&adapter->hw, REG_MDIO_CTRL, phy_data);
2295 }
2296 return 0;
2297
2298err_up:
2299 atl1c_free_irq(adapter);
2300 atl1c_free_ring_resources(adapter);
2301 atl1c_reset_mac(&adapter->hw);
2302 return err;
2303}
2304
2305/*
2306 * atl1c_close - Disables a network interface
2307 * @netdev: network interface device structure
2308 *
2309 * Returns 0, this is not allowed to fail
2310 *
2311 * The close entry point is called when an interface is de-activated
2312 * by the OS. The hardware is still under the drivers control, but
2313 * needs to be disabled. A global MAC reset is issued to stop the
2314 * hardware, and all transmit and receive resources are freed.
2315 */
2316static int atl1c_close(struct net_device *netdev)
2317{
2318 struct atl1c_adapter *adapter = netdev_priv(netdev);
2319
2320 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2321 atl1c_down(adapter);
2322 atl1c_free_ring_resources(adapter);
2323 return 0;
2324}
2325
762e3023 2326static int atl1c_suspend(struct device *dev)
43250ddd 2327{
762e3023 2328 struct pci_dev *pdev = to_pci_dev(dev);
43250ddd
JY		 2329 struct net_device *netdev = pci_get_drvdata(pdev);
2330 struct atl1c_adapter *adapter = netdev_priv(netdev);
2331 struct atl1c_hw *hw = &adapter->hw;
8f574b35
JY		 2332 u32 mac_ctrl_data = 0;
2333 u32 master_ctrl_data = 0;
55865c66 2334 u32 wol_ctrl_data = 0;
8f574b35 2335 u16 mii_intr_status_data = 0;
43250ddd 2336 u32 wufc = adapter->wol;
43250ddd 2337
8f574b35 2338 atl1c_disable_l0s_l1(hw);
43250ddd
JY		 2339 if (netif_running(netdev)) {
2340 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2341 atl1c_down(adapter);
2342 }
2343 netif_device_detach(netdev);
8f574b35
JY		 2344
2345 if (wufc)
2346 if (atl1c_phy_power_saving(hw) != 0)
2347 dev_dbg(&pdev->dev, "phy power saving failed");
2348
2349 AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data);
2350 AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data);
2351
2352 master_ctrl_data &= ~MASTER_CTRL_CLK_SEL_DIS;
2353 mac_ctrl_data &= ~(MAC_CTRL_PRMLEN_MASK << MAC_CTRL_PRMLEN_SHIFT);
2354 mac_ctrl_data |= (((u32)adapter->hw.preamble_len &
2355 MAC_CTRL_PRMLEN_MASK) <<
2356 MAC_CTRL_PRMLEN_SHIFT);
2357 mac_ctrl_data &= ~(MAC_CTRL_SPEED_MASK << MAC_CTRL_SPEED_SHIFT);
2358 mac_ctrl_data &= ~MAC_CTRL_DUPLX;
2359
43250ddd 2360 if (wufc) {
8f574b35
JY		 2361 mac_ctrl_data |= MAC_CTRL_RX_EN;
2362 if (adapter->link_speed == SPEED_1000 ||
2363 adapter->link_speed == SPEED_0) {
2364 mac_ctrl_data |= atl1c_mac_speed_1000 <<
2365 MAC_CTRL_SPEED_SHIFT;
2366 mac_ctrl_data |= MAC_CTRL_DUPLX;
2367 } else
2368 mac_ctrl_data |= atl1c_mac_speed_10_100 <<
2369 MAC_CTRL_SPEED_SHIFT;
2370
2371 if (adapter->link_duplex == DUPLEX_FULL)
2372 mac_ctrl_data |= MAC_CTRL_DUPLX;
2373
43250ddd
JY		 2374 /* turn on magic packet wol */
2375 if (wufc & AT_WUFC_MAG)
8f574b35 2376 wol_ctrl_data |= WOL_MAGIC_EN | WOL_MAGIC_PME_EN;
43250ddd
JY		 2377
2378 if (wufc & AT_WUFC_LNKC) {
43250ddd
JY		 2379 wol_ctrl_data |= WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN;
2380 /* only link up can wake up */
2381 if (atl1c_write_phy_reg(hw, MII_IER, IER_LINK_UP) != 0) {
8f574b35
JY		 2382 dev_dbg(&pdev->dev, "%s: read write phy "
2383 "register failed.\n",
2384 atl1c_driver_name);
43250ddd
JY		 2385 }
2386 }
2387 /* clear phy interrupt */
2388 atl1c_read_phy_reg(hw, MII_ISR, &mii_intr_status_data);
2389 /* Config MAC Ctrl register */
46facce9 2390 __atl1c_vlan_mode(netdev->features, &mac_ctrl_data);
43250ddd
JY		 2391
2392 /* magic packet maybe Broadcast&multicast&Unicast frame */
2393 if (wufc & AT_WUFC_MAG)
2394 mac_ctrl_data |= MAC_CTRL_BC_EN;
2395
8f574b35
JY		 2396 dev_dbg(&pdev->dev,
2397 "%s: suspend MAC=0x%x\n",
2398 atl1c_driver_name, mac_ctrl_data);
43250ddd
JY		 2399 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
2400 AT_WRITE_REG(hw, REG_WOL_CTRL, wol_ctrl_data);
2401 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
2402
8f574b35
JY		 2403 AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_DEFAULT |
2404 GPHY_CTRL_EXT_RESET);
8f574b35
JY		 2405 } else {
2406 AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_POWER_SAVING);
2407 master_ctrl_data |= MASTER_CTRL_CLK_SEL_DIS;
2408 mac_ctrl_data |= atl1c_mac_speed_10_100 << MAC_CTRL_SPEED_SHIFT;
2409 mac_ctrl_data |= MAC_CTRL_DUPLX;
2410 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
2411 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
2412 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
2413 hw->phy_configured = false; /* re-init PHY when resume */
43250ddd 2414 }
43250ddd 2415
43250ddd
JY		 2416 return 0;
2417}
2418
d187c1aa 2419#ifdef CONFIG_PM_SLEEP
762e3023 2420static int atl1c_resume(struct device *dev)
43250ddd 2421{
762e3023 2422 struct pci_dev *pdev = to_pci_dev(dev);
43250ddd
JY		 2423 struct net_device *netdev = pci_get_drvdata(pdev);
2424 struct atl1c_adapter *adapter = netdev_priv(netdev);
2425
43250ddd 2426 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
8f574b35
JY		 2427 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE |
2428 ATL1C_PCIE_PHY_RESET);
43250ddd
JY		 2429
2430 atl1c_phy_reset(&adapter->hw);
2431 atl1c_reset_mac(&adapter->hw);
8f574b35
JY		 2432 atl1c_phy_init(&adapter->hw);
2433
2434#if 0
2435 AT_READ_REG(&adapter->hw, REG_PM_CTRLSTAT, &pm_data);
2436 pm_data &= ~PM_CTRLSTAT_PME_EN;
2437 AT_WRITE_REG(&adapter->hw, REG_PM_CTRLSTAT, pm_data);
2438#endif
2439
43250ddd
JY		 2440 netif_device_attach(netdev);
2441 if (netif_running(netdev))
2442 atl1c_up(adapter);
2443
2444 return 0;
2445}
d187c1aa 2446#endif
43250ddd
JY		 2447
2448static void atl1c_shutdown(struct pci_dev *pdev)
2449{
762e3023
RW		 2450 struct net_device *netdev = pci_get_drvdata(pdev);
2451 struct atl1c_adapter *adapter = netdev_priv(netdev);
2452
2453 atl1c_suspend(&pdev->dev);
2454 pci_wake_from_d3(pdev, adapter->wol);
2455 pci_set_power_state(pdev, PCI_D3hot);
43250ddd
JY		 2456}
2457
2458static const struct net_device_ops atl1c_netdev_ops = {
2459 .ndo_open = atl1c_open,
2460 .ndo_stop = atl1c_close,
2461 .ndo_validate_addr = eth_validate_addr,
2462 .ndo_start_xmit = atl1c_xmit_frame,
46facce9 2463 .ndo_set_mac_address = atl1c_set_mac_addr,
afc4b13d 2464 .ndo_set_rx_mode = atl1c_set_multi,
43250ddd 2465 .ndo_change_mtu = atl1c_change_mtu,
782d640a 2466 .ndo_fix_features = atl1c_fix_features,
46facce9 2467 .ndo_set_features = atl1c_set_features,
43250ddd
JY		 2468 .ndo_do_ioctl = atl1c_ioctl,
2469 .ndo_tx_timeout = atl1c_tx_timeout,
2470 .ndo_get_stats = atl1c_get_stats,
43250ddd
JY		 2471#ifdef CONFIG_NET_POLL_CONTROLLER
2472 .ndo_poll_controller = atl1c_netpoll,
2473#endif
2474};
2475
2476static int atl1c_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
2477{
2478 SET_NETDEV_DEV(netdev, &pdev->dev);
2479 pci_set_drvdata(pdev, netdev);
2480
43250ddd
JY		 2481 netdev->netdev_ops = &atl1c_netdev_ops;
2482 netdev->watchdog_timeo = AT_TX_WATCHDOG;
2483 atl1c_set_ethtool_ops(netdev);
2484
2485 /* TODO: add when ready */
782d640a 2486 netdev->hw_features = NETIF_F_SG |
43250ddd 2487 NETIF_F_HW_CSUM |
46facce9 2488 NETIF_F_HW_VLAN_RX |
43250ddd
JY		 2489 NETIF_F_TSO |
2490 NETIF_F_TSO6;
782d640a 2491 netdev->features = netdev->hw_features |
46facce9 2492 NETIF_F_HW_VLAN_TX;
43250ddd
JY		 2493 return 0;
2494}
2495
2496/*
2497 * atl1c_probe - Device Initialization Routine
2498 * @pdev: PCI device information struct
2499 * @ent: entry in atl1c_pci_tbl
2500 *
2501 * Returns 0 on success, negative on failure
2502 *
2503 * atl1c_probe initializes an adapter identified by a pci_dev structure.
2504 * The OS initialization, configuring of the adapter private structure,
2505 * and a hardware reset occur.
2506 */
2507static int __devinit atl1c_probe(struct pci_dev *pdev,
2508 const struct pci_device_id *ent)
2509{
2510 struct net_device *netdev;
2511 struct atl1c_adapter *adapter;
2512 static int cards_found;
2513
2514 int err = 0;
2515
2516 /* enable device (incl. PCI PM wakeup and hotplug setup) */
2517 err = pci_enable_device_mem(pdev);
2518 if (err) {
2519 dev_err(&pdev->dev, "cannot enable PCI device\n");
2520 return err;
2521 }
2522
2523 /*
2524 * The atl1c chip can DMA to 64-bit addresses, but it uses a single
2525 * shared register for the high 32 bits, so only a single, aligned,
2526 * 4 GB physical address range can be used at a time.
2527 *
2528 * Supporting 64-bit DMA on this hardware is more trouble than it's
2529 * worth. It is far easier to limit to 32-bit DMA than update
2530 * various kernel subsystems to support the mechanics required by a
2531 * fixed-high-32-bit system.
2532 */
e930438c
YH		 2533 if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) ||
2534 (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) {
43250ddd
JY		 2535 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n");
2536 goto err_dma;
2537 }
2538
2539 err = pci_request_regions(pdev, atl1c_driver_name);
2540 if (err) {
2541 dev_err(&pdev->dev, "cannot obtain PCI resources\n");
2542 goto err_pci_reg;
2543 }
2544
2545 pci_set_master(pdev);
2546
2547 netdev = alloc_etherdev(sizeof(struct atl1c_adapter));
2548 if (netdev == NULL) {
2549 err = -ENOMEM;
43250ddd
JY		 2550 goto err_alloc_etherdev;
2551 }
2552
2553 err = atl1c_init_netdev(netdev, pdev);
2554 if (err) {
2555 dev_err(&pdev->dev, "init netdevice failed\n");
2556 goto err_init_netdev;
2557 }
2558 adapter = netdev_priv(netdev);
2559 adapter->bd_number = cards_found;
2560 adapter->netdev = netdev;
2561 adapter->pdev = pdev;
2562 adapter->hw.adapter = adapter;
2563 adapter->msg_enable = netif_msg_init(-1, atl1c_default_msg);
2564 adapter->hw.hw_addr = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
2565 if (!adapter->hw.hw_addr) {
2566 err = -EIO;
2567 dev_err(&pdev->dev, "cannot map device registers\n");
2568 goto err_ioremap;
2569 }
43250ddd
JY		 2570
2571 /* init mii data */
2572 adapter->mii.dev = netdev;
2573 adapter->mii.mdio_read = atl1c_mdio_read;
2574 adapter->mii.mdio_write = atl1c_mdio_write;
2575 adapter->mii.phy_id_mask = 0x1f;
2576 adapter->mii.reg_num_mask = MDIO_REG_ADDR_MASK;
2577 netif_napi_add(netdev, &adapter->napi, atl1c_clean, 64);
2578 setup_timer(&adapter->phy_config_timer, atl1c_phy_config,
2579 (unsigned long)adapter);
2580 /* setup the private structure */
2581 err = atl1c_sw_init(adapter);
2582 if (err) {
2583 dev_err(&pdev->dev, "net device private data init failed\n");
2584 goto err_sw_init;
2585 }
2586 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE |
2587 ATL1C_PCIE_PHY_RESET);
2588
2589 /* Init GPHY as early as possible due to power saving issue */
2590 atl1c_phy_reset(&adapter->hw);
2591
2592 err = atl1c_reset_mac(&adapter->hw);
2593 if (err) {
2594 err = -EIO;
2595 goto err_reset;
2596 }
2597
43250ddd
JY		 2598 /* reset the controller to
2599 * put the device in a known good starting state */
2600 err = atl1c_phy_init(&adapter->hw);
2601 if (err) {
2602 err = -EIO;
2603 goto err_reset;
2604 }
6a214fd4
DK		 2605 if (atl1c_read_mac_addr(&adapter->hw)) {
2606 /* got a random MAC address, set NET_ADDR_RANDOM to netdev */
2607 netdev->addr_assign_type |= NET_ADDR_RANDOM;
43250ddd
JY		 2608 }
2609 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
2610 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
2611 if (netif_msg_probe(adapter))
82991172 2612 dev_dbg(&pdev->dev, "mac address : %pM\n",
2613 adapter->hw.mac_addr);
43250ddd
JY		 2614
2615 atl1c_hw_set_mac_addr(&adapter->hw);
cb190546
JY		 2616 INIT_WORK(&adapter->common_task, atl1c_common_task);
2617 adapter->work_event = 0;
43250ddd
JY		 2618 err = register_netdev(netdev);
2619 if (err) {
2620 dev_err(&pdev->dev, "register netdevice failed\n");
2621 goto err_register;
2622 }
2623
2624 if (netif_msg_probe(adapter))
2625 dev_info(&pdev->dev, "version %s\n", ATL1C_DRV_VERSION);
2626 cards_found++;
2627 return 0;
2628
2629err_reset:
2630err_register:
2631err_sw_init:
43250ddd
JY		 2632 iounmap(adapter->hw.hw_addr);
2633err_init_netdev:
2634err_ioremap:
2635 free_netdev(netdev);
2636err_alloc_etherdev:
2637 pci_release_regions(pdev);
2638err_pci_reg:
2639err_dma:
2640 pci_disable_device(pdev);
2641 return err;
2642}
2643
2644/*
2645 * atl1c_remove - Device Removal Routine
2646 * @pdev: PCI device information struct
2647 *
2648 * atl1c_remove is called by the PCI subsystem to alert the driver
2649 * that it should release a PCI device. The could be caused by a
2650 * Hot-Plug event, or because the driver is going to be removed from
2651 * memory.
2652 */
2653static void __devexit atl1c_remove(struct pci_dev *pdev)
2654{
2655 struct net_device *netdev = pci_get_drvdata(pdev);
2656 struct atl1c_adapter *adapter = netdev_priv(netdev);
2657
2658 unregister_netdev(netdev);
2659 atl1c_phy_disable(&adapter->hw);
2660
2661 iounmap(adapter->hw.hw_addr);
2662
2663 pci_release_regions(pdev);
2664 pci_disable_device(pdev);
2665 free_netdev(netdev);
2666}
2667
2668/*
2669 * atl1c_io_error_detected - called when PCI error is detected
2670 * @pdev: Pointer to PCI device
2671 * @state: The current pci connection state
2672 *
2673 * This function is called after a PCI bus error affecting
2674 * this device has been detected.
2675 */
2676static pci_ers_result_t atl1c_io_error_detected(struct pci_dev *pdev,
2677 pci_channel_state_t state)
2678{
2679 struct net_device *netdev = pci_get_drvdata(pdev);
2680 struct atl1c_adapter *adapter = netdev_priv(netdev);
2681
2682 netif_device_detach(netdev);
2683
005fb4f0
DN		 2684 if (state == pci_channel_io_perm_failure)
2685 return PCI_ERS_RESULT_DISCONNECT;
2686
43250ddd
JY		 2687 if (netif_running(netdev))
2688 atl1c_down(adapter);
2689
2690 pci_disable_device(pdev);
2691
2692 /* Request a slot slot reset. */
2693 return PCI_ERS_RESULT_NEED_RESET;
2694}
2695
2696/*
2697 * atl1c_io_slot_reset - called after the pci bus has been reset.
2698 * @pdev: Pointer to PCI device
2699 *
2700 * Restart the card from scratch, as if from a cold-boot. Implementation
2701 * resembles the first-half of the e1000_resume routine.
2702 */
2703static pci_ers_result_t atl1c_io_slot_reset(struct pci_dev *pdev)
2704{
2705 struct net_device *netdev = pci_get_drvdata(pdev);
2706 struct atl1c_adapter *adapter = netdev_priv(netdev);
2707
2708 if (pci_enable_device(pdev)) {
2709 if (netif_msg_hw(adapter))
2710 dev_err(&pdev->dev,
2711 "Cannot re-enable PCI device after reset\n");
2712 return PCI_ERS_RESULT_DISCONNECT;
2713 }
2714 pci_set_master(pdev);
2715
2716 pci_enable_wake(pdev, PCI_D3hot, 0);
2717 pci_enable_wake(pdev, PCI_D3cold, 0);
2718
2719 atl1c_reset_mac(&adapter->hw);
2720
2721 return PCI_ERS_RESULT_RECOVERED;
2722}
2723
2724/*
2725 * atl1c_io_resume - called when traffic can start flowing again.
2726 * @pdev: Pointer to PCI device
2727 *
2728 * This callback is called when the error recovery driver tells us that
2729 * its OK to resume normal operation. Implementation resembles the
2730 * second-half of the atl1c_resume routine.
2731 */
2732static void atl1c_io_resume(struct pci_dev *pdev)
2733{
2734 struct net_device *netdev = pci_get_drvdata(pdev);
2735 struct atl1c_adapter *adapter = netdev_priv(netdev);
2736
2737 if (netif_running(netdev)) {
2738 if (atl1c_up(adapter)) {
2739 if (netif_msg_hw(adapter))
2740 dev_err(&pdev->dev,
2741 "Cannot bring device back up after reset\n");
2742 return;
2743 }
2744 }
2745
2746 netif_device_attach(netdev);
2747}
2748
2749static struct pci_error_handlers atl1c_err_handler = {
2750 .error_detected = atl1c_io_error_detected,
2751 .slot_reset = atl1c_io_slot_reset,
2752 .resume = atl1c_io_resume,
2753};
2754
762e3023
RW		 2755static SIMPLE_DEV_PM_OPS(atl1c_pm_ops, atl1c_suspend, atl1c_resume);
2756
43250ddd
JY		 2757static struct pci_driver atl1c_driver = {
2758 .name = atl1c_driver_name,
2759 .id_table = atl1c_pci_tbl,
2760 .probe = atl1c_probe,
2761 .remove = __devexit_p(atl1c_remove),
43250ddd 2762 .shutdown = atl1c_shutdown,
762e3023
RW		 2763 .err_handler = &atl1c_err_handler,
2764 .driver.pm = &atl1c_pm_ops,
43250ddd
JY		 2765};
2766
2767/*
2768 * atl1c_init_module - Driver Registration Routine
2769 *
2770 * atl1c_init_module is the first routine called when the driver is
2771 * loaded. All it does is register with the PCI subsystem.
2772 */
2773static int __init atl1c_init_module(void)
2774{
2775 return pci_register_driver(&atl1c_driver);
2776}
2777
2778/*
2779 * atl1c_exit_module - Driver Exit Cleanup Routine
2780 *
2781 * atl1c_exit_module is called just before the driver is removed
2782 * from memory.
2783 */
2784static void __exit atl1c_exit_module(void)
2785{
2786 pci_unregister_driver(&atl1c_driver);
2787}
2788
2789module_init(atl1c_init_module);
2790module_exit(atl1c_exit_module);
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