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atl1c: remove VPD register
[mirror_ubuntu-hirsute-kernel.git] / drivers / net / ethernet / atheros / atl1c / atl1c_main.c
CommitLineData
43250ddd
JY		 1/*
2 * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved.
3 *
4 * Derived from Intel e1000 driver
5 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the Free
9 * Software Foundation; either version 2 of the License, or (at your option)
10 * any later version.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc., 59
19 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 */
21
22#include "atl1c.h"
23
8f574b35 24#define ATL1C_DRV_VERSION "1.0.1.0-NAPI"
43250ddd
JY		 25char atl1c_driver_name[] = "atl1c";
26char atl1c_driver_version[] = ATL1C_DRV_VERSION;
27#define PCI_DEVICE_ID_ATTANSIC_L2C 0x1062
28#define PCI_DEVICE_ID_ATTANSIC_L1C 0x1063
496c185c
LR		 29#define PCI_DEVICE_ID_ATHEROS_L2C_B 0x2060 /* AR8152 v1.1 Fast 10/100 */
30#define PCI_DEVICE_ID_ATHEROS_L2C_B2 0x2062 /* AR8152 v2.0 Fast 10/100 */
31#define PCI_DEVICE_ID_ATHEROS_L1D 0x1073 /* AR8151 v1.0 Gigabit 1000 */
8f574b35 32#define PCI_DEVICE_ID_ATHEROS_L1D_2_0 0x1083 /* AR8151 v2.0 Gigabit 1000 */
496c185c
LR		 33#define L2CB_V10 0xc0
34#define L2CB_V11 0xc1
35
43250ddd
JY		 36/*
37 * atl1c_pci_tbl - PCI Device ID Table
38 *
39 * Wildcard entries (PCI_ANY_ID) should come last
40 * Last entry must be all 0s
41 *
42 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
43 * Class, Class Mask, private data (not used) }
44 */
a3aa1884 45static DEFINE_PCI_DEVICE_TABLE(atl1c_pci_tbl) = {
43250ddd
JY		 46 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1C)},
47 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2C)},
496c185c
LR		 48 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B)},
49 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B2)},
50 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D)},
94dde7e4 51 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D_2_0)},
43250ddd
JY		 52 /* required last entry */
53 { 0 }
54};
55MODULE_DEVICE_TABLE(pci, atl1c_pci_tbl);
56
70c9fbd3
HX		 57MODULE_AUTHOR("Jie Yang");
58MODULE_AUTHOR("Qualcomm Atheros Inc., <nic-devel@qualcomm.com>");
59MODULE_DESCRIPTION("Qualcom Atheros 100/1000M Ethernet Network Driver");
43250ddd
JY		 60MODULE_LICENSE("GPL");
61MODULE_VERSION(ATL1C_DRV_VERSION);
62
63static int atl1c_stop_mac(struct atl1c_hw *hw);
64static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw);
65static void atl1c_enable_tx_ctrl(struct atl1c_hw *hw);
66static void atl1c_disable_l0s_l1(struct atl1c_hw *hw);
67static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup);
68static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter);
9f1fd0ef 69static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter,
43250ddd 70 int *work_done, int work_to_do);
0fb1e54e 71static int atl1c_up(struct atl1c_adapter *adapter);
72static void atl1c_down(struct atl1c_adapter *adapter);
43250ddd
JY		 73
74static const u16 atl1c_pay_load_size[] = {
75 128, 256, 512, 1024, 2048, 4096,
76};
77
43250ddd
JY		 78
79static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE |
80 NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP;
8f574b35
JY		 81static void atl1c_pcie_patch(struct atl1c_hw *hw)
82{
83 u32 data;
43250ddd 84
8f574b35
JY		 85 AT_READ_REG(hw, REG_PCIE_PHYMISC, &data);
86 data |= PCIE_PHYMISC_FORCE_RCV_DET;
87 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, data);
88
89 if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10) {
90 AT_READ_REG(hw, REG_PCIE_PHYMISC2, &data);
91
92 data &= ~(PCIE_PHYMISC2_SERDES_CDR_MASK <<
93 PCIE_PHYMISC2_SERDES_CDR_SHIFT);
94 data |= 3 << PCIE_PHYMISC2_SERDES_CDR_SHIFT;
95 data &= ~(PCIE_PHYMISC2_SERDES_TH_MASK <<
96 PCIE_PHYMISC2_SERDES_TH_SHIFT);
97 data |= 3 << PCIE_PHYMISC2_SERDES_TH_SHIFT;
98 AT_WRITE_REG(hw, REG_PCIE_PHYMISC2, data);
99 }
100}
101
102/* FIXME: no need any more ? */
43250ddd
JY		 103/*
104 * atl1c_init_pcie - init PCIE module
105 */
106static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag)
107{
108 u32 data;
109 u32 pci_cmd;
110 struct pci_dev *pdev = hw->adapter->pdev;
111
112 AT_READ_REG(hw, PCI_COMMAND, &pci_cmd);
113 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
114 pci_cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
115 PCI_COMMAND_IO);
116 AT_WRITE_REG(hw, PCI_COMMAND, pci_cmd);
117
118 /*
119 * Clear any PowerSaveing Settings
120 */
121 pci_enable_wake(pdev, PCI_D3hot, 0);
122 pci_enable_wake(pdev, PCI_D3cold, 0);
123
124 /*
125 * Mask some pcie error bits
126 */
127 AT_READ_REG(hw, REG_PCIE_UC_SEVERITY, &data);
128 data &= ~PCIE_UC_SERVRITY_DLP;
129 data &= ~PCIE_UC_SERVRITY_FCP;
130 AT_WRITE_REG(hw, REG_PCIE_UC_SEVERITY, data);
131
8f574b35
JY		 132 AT_READ_REG(hw, REG_LTSSM_ID_CTRL, &data);
133 data &= ~LTSSM_ID_EN_WRO;
134 AT_WRITE_REG(hw, REG_LTSSM_ID_CTRL, data);
135
136 atl1c_pcie_patch(hw);
43250ddd
JY		 137 if (flag & ATL1C_PCIE_L0S_L1_DISABLE)
138 atl1c_disable_l0s_l1(hw);
139 if (flag & ATL1C_PCIE_PHY_RESET)
140 AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_DEFAULT);
141 else
142 AT_WRITE_REG(hw, REG_GPHY_CTRL,
143 GPHY_CTRL_DEFAULT | GPHY_CTRL_EXT_RESET);
144
8f574b35 145 msleep(5);
43250ddd
JY		 146}
147
148/*
149 * atl1c_irq_enable - Enable default interrupt generation settings
150 * @adapter: board private structure
151 */
152static inline void atl1c_irq_enable(struct atl1c_adapter *adapter)
153{
154 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
155 AT_WRITE_REG(&adapter->hw, REG_ISR, 0x7FFFFFFF);
156 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
157 AT_WRITE_FLUSH(&adapter->hw);
158 }
159}
160
161/*
162 * atl1c_irq_disable - Mask off interrupt generation on the NIC
163 * @adapter: board private structure
164 */
165static inline void atl1c_irq_disable(struct atl1c_adapter *adapter)
166{
167 atomic_inc(&adapter->irq_sem);
168 AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
8f574b35 169 AT_WRITE_REG(&adapter->hw, REG_ISR, ISR_DIS_INT);
43250ddd
JY		 170 AT_WRITE_FLUSH(&adapter->hw);
171 synchronize_irq(adapter->pdev->irq);
172}
173
174/*
175 * atl1c_irq_reset - reset interrupt confiure on the NIC
176 * @adapter: board private structure
177 */
178static inline void atl1c_irq_reset(struct atl1c_adapter *adapter)
179{
180 atomic_set(&adapter->irq_sem, 1);
181 atl1c_irq_enable(adapter);
182}
183
c930a662
JP		 184/*
185 * atl1c_wait_until_idle - wait up to AT_HW_MAX_IDLE_DELAY reads
186 * of the idle status register until the device is actually idle
187 */
188static u32 atl1c_wait_until_idle(struct atl1c_hw *hw)
189{
190 int timeout;
191 u32 data;
192
193 for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) {
194 AT_READ_REG(hw, REG_IDLE_STATUS, &data);
195 if ((data & IDLE_STATUS_MASK) == 0)
196 return 0;
197 msleep(1);
198 }
199 return data;
200}
201
43250ddd
JY		 202/*
203 * atl1c_phy_config - Timer Call-back
204 * @data: pointer to netdev cast into an unsigned long
205 */
206static void atl1c_phy_config(unsigned long data)
207{
208 struct atl1c_adapter *adapter = (struct atl1c_adapter *) data;
209 struct atl1c_hw *hw = &adapter->hw;
210 unsigned long flags;
211
212 spin_lock_irqsave(&adapter->mdio_lock, flags);
213 atl1c_restart_autoneg(hw);
214 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
215}
216
217void atl1c_reinit_locked(struct atl1c_adapter *adapter)
218{
43250ddd
JY		 219 WARN_ON(in_interrupt());
220 atl1c_down(adapter);
221 atl1c_up(adapter);
222 clear_bit(__AT_RESETTING, &adapter->flags);
223}
224
43250ddd
JY		 225static void atl1c_check_link_status(struct atl1c_adapter *adapter)
226{
227 struct atl1c_hw *hw = &adapter->hw;
228 struct net_device *netdev = adapter->netdev;
229 struct pci_dev *pdev = adapter->pdev;
230 int err;
231 unsigned long flags;
232 u16 speed, duplex, phy_data;
233
234 spin_lock_irqsave(&adapter->mdio_lock, flags);
235 /* MII_BMSR must read twise */
236 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
237 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
238 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
239
240 if ((phy_data & BMSR_LSTATUS) == 0) {
241 /* link down */
8f574b35
JY		 242 hw->hibernate = true;
243 if (atl1c_stop_mac(hw) != 0)
244 if (netif_msg_hw(adapter))
245 dev_warn(&pdev->dev, "stop mac failed\n");
246 atl1c_set_aspm(hw, false);
43250ddd 247 netif_carrier_off(netdev);
8f574b35
JY		 248 netif_stop_queue(netdev);
249 atl1c_phy_reset(hw);
250 atl1c_phy_init(&adapter->hw);
43250ddd
JY		 251 } else {
252 /* Link Up */
253 hw->hibernate = false;
254 spin_lock_irqsave(&adapter->mdio_lock, flags);
255 err = atl1c_get_speed_and_duplex(hw, &speed, &duplex);
256 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
257 if (unlikely(err))
258 return;
259 /* link result is our setting */
260 if (adapter->link_speed != speed ||
261 adapter->link_duplex != duplex) {
262 adapter->link_speed = speed;
263 adapter->link_duplex = duplex;
52fbc100 264 atl1c_set_aspm(hw, true);
43250ddd
JY		 265 atl1c_enable_tx_ctrl(hw);
266 atl1c_enable_rx_ctrl(hw);
267 atl1c_setup_mac_ctrl(adapter);
43250ddd
JY		 268 if (netif_msg_link(adapter))
269 dev_info(&pdev->dev,
270 "%s: %s NIC Link is Up<%d Mbps %s>\n",
271 atl1c_driver_name, netdev->name,
272 adapter->link_speed,
273 adapter->link_duplex == FULL_DUPLEX ?
274 "Full Duplex" : "Half Duplex");
275 }
276 if (!netif_carrier_ok(netdev))
277 netif_carrier_on(netdev);
278 }
279}
280
43250ddd
JY		 281static void atl1c_link_chg_event(struct atl1c_adapter *adapter)
282{
283 struct net_device *netdev = adapter->netdev;
284 struct pci_dev *pdev = adapter->pdev;
285 u16 phy_data;
286 u16 link_up;
287
288 spin_lock(&adapter->mdio_lock);
289 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
290 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
291 spin_unlock(&adapter->mdio_lock);
292 link_up = phy_data & BMSR_LSTATUS;
293 /* notify upper layer link down ASAP */
294 if (!link_up) {
295 if (netif_carrier_ok(netdev)) {
296 /* old link state: Up */
297 netif_carrier_off(netdev);
298 if (netif_msg_link(adapter))
299 dev_info(&pdev->dev,
300 "%s: %s NIC Link is Down\n",
301 atl1c_driver_name, netdev->name);
302 adapter->link_speed = SPEED_0;
303 }
304 }
cb190546 305
cb771838 306 set_bit(ATL1C_WORK_EVENT_LINK_CHANGE, &adapter->work_event);
cb190546 307 schedule_work(&adapter->common_task);
43250ddd
JY		 308}
309
cb190546 310static void atl1c_common_task(struct work_struct *work)
43250ddd 311{
cb190546
JY		 312 struct atl1c_adapter *adapter;
313 struct net_device *netdev;
314
315 adapter = container_of(work, struct atl1c_adapter, common_task);
316 netdev = adapter->netdev;
317
cb771838 318 if (test_and_clear_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event)) {
cb190546
JY		 319 netif_device_detach(netdev);
320 atl1c_down(adapter);
321 atl1c_up(adapter);
322 netif_device_attach(netdev);
cb190546
JY		 323 }
324
cb771838
TG		 325 if (test_and_clear_bit(ATL1C_WORK_EVENT_LINK_CHANGE,
326 &adapter->work_event))
cb190546 327 atl1c_check_link_status(adapter);
43250ddd
JY		 328}
329
cb190546
JY		 330
331static void atl1c_del_timer(struct atl1c_adapter *adapter)
43250ddd 332{
cb190546 333 del_timer_sync(&adapter->phy_config_timer);
43250ddd
JY		 334}
335
cb190546 336
43250ddd
JY		 337/*
338 * atl1c_tx_timeout - Respond to a Tx Hang
339 * @netdev: network interface device structure
340 */
341static void atl1c_tx_timeout(struct net_device *netdev)
342{
343 struct atl1c_adapter *adapter = netdev_priv(netdev);
344
345 /* Do the reset outside of interrupt context */
cb771838 346 set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event);
cb190546 347 schedule_work(&adapter->common_task);
43250ddd
JY		 348}
349
350/*
351 * atl1c_set_multi - Multicast and Promiscuous mode set
352 * @netdev: network interface device structure
353 *
354 * The set_multi entry point is called whenever the multicast address
355 * list or the network interface flags are updated. This routine is
356 * responsible for configuring the hardware for proper multicast,
357 * promiscuous mode, and all-multi behavior.
358 */
359static void atl1c_set_multi(struct net_device *netdev)
360{
361 struct atl1c_adapter *adapter = netdev_priv(netdev);
362 struct atl1c_hw *hw = &adapter->hw;
22bedad3 363 struct netdev_hw_addr *ha;
43250ddd
JY		 364 u32 mac_ctrl_data;
365 u32 hash_value;
366
367 /* Check for Promiscuous and All Multicast modes */
368 AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data);
369
370 if (netdev->flags & IFF_PROMISC) {
371 mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
372 } else if (netdev->flags & IFF_ALLMULTI) {
373 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
374 mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN;
375 } else {
376 mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
377 }
378
379 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
380
381 /* clear the old settings from the multicast hash table */
382 AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
383 AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
384
385 /* comoute mc addresses' hash value ,and put it into hash table */
22bedad3
JP		 386 netdev_for_each_mc_addr(ha, netdev) {
387 hash_value = atl1c_hash_mc_addr(hw, ha->addr);
43250ddd
JY		 388 atl1c_hash_set(hw, hash_value);
389 }
390}
391
c8f44aff 392static void __atl1c_vlan_mode(netdev_features_t features, u32 *mac_ctrl_data)
46facce9
JP		 393{
394 if (features & NETIF_F_HW_VLAN_RX) {
395 /* enable VLAN tag insert/strip */
396 *mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
397 } else {
398 /* disable VLAN tag insert/strip */
399 *mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN;
400 }
401}
402
c8f44aff
MM		 403static void atl1c_vlan_mode(struct net_device *netdev,
404 netdev_features_t features)
43250ddd
JY		 405{
406 struct atl1c_adapter *adapter = netdev_priv(netdev);
407 struct pci_dev *pdev = adapter->pdev;
408 u32 mac_ctrl_data = 0;
409
410 if (netif_msg_pktdata(adapter))
46facce9 411 dev_dbg(&pdev->dev, "atl1c_vlan_mode\n");
43250ddd
JY		 412
413 atl1c_irq_disable(adapter);
43250ddd 414 AT_READ_REG(&adapter->hw, REG_MAC_CTRL, &mac_ctrl_data);
46facce9 415 __atl1c_vlan_mode(features, &mac_ctrl_data);
43250ddd
JY		 416 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
417 atl1c_irq_enable(adapter);
418}
419
420static void atl1c_restore_vlan(struct atl1c_adapter *adapter)
421{
422 struct pci_dev *pdev = adapter->pdev;
423
424 if (netif_msg_pktdata(adapter))
46facce9
JP		 425 dev_dbg(&pdev->dev, "atl1c_restore_vlan\n");
426 atl1c_vlan_mode(adapter->netdev, adapter->netdev->features);
43250ddd 427}
46facce9 428
43250ddd
JY		 429/*
430 * atl1c_set_mac - Change the Ethernet Address of the NIC
431 * @netdev: network interface device structure
432 * @p: pointer to an address structure
433 *
434 * Returns 0 on success, negative on failure
435 */
436static int atl1c_set_mac_addr(struct net_device *netdev, void *p)
437{
438 struct atl1c_adapter *adapter = netdev_priv(netdev);
439 struct sockaddr *addr = p;
440
441 if (!is_valid_ether_addr(addr->sa_data))
442 return -EADDRNOTAVAIL;
443
444 if (netif_running(netdev))
445 return -EBUSY;
446
447 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
448 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
6a214fd4 449 netdev->addr_assign_type &= ~NET_ADDR_RANDOM;
43250ddd
JY		 450
451 atl1c_hw_set_mac_addr(&adapter->hw);
452
453 return 0;
454}
455
456static void atl1c_set_rxbufsize(struct atl1c_adapter *adapter,
457 struct net_device *dev)
458{
459 int mtu = dev->mtu;
460
461 adapter->rx_buffer_len = mtu > AT_RX_BUF_SIZE ?
462 roundup(mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN, 8) : AT_RX_BUF_SIZE;
463}
782d640a 464
c8f44aff
MM		 465static netdev_features_t atl1c_fix_features(struct net_device *netdev,
466 netdev_features_t features)
782d640a 467{
46facce9
JP		 468 /*
469 * Since there is no support for separate rx/tx vlan accel
470 * enable/disable make sure tx flag is always in same state as rx.
471 */
472 if (features & NETIF_F_HW_VLAN_RX)
473 features |= NETIF_F_HW_VLAN_TX;
474 else
475 features &= ~NETIF_F_HW_VLAN_TX;
476
782d640a
MM		 477 if (netdev->mtu > MAX_TSO_FRAME_SIZE)
478 features &= ~(NETIF_F_TSO | NETIF_F_TSO6);
479
480 return features;
481}
482
c8f44aff
MM		 483static int atl1c_set_features(struct net_device *netdev,
484 netdev_features_t features)
46facce9 485{
c8f44aff 486 netdev_features_t changed = netdev->features ^ features;
46facce9
JP		 487
488 if (changed & NETIF_F_HW_VLAN_RX)
489 atl1c_vlan_mode(netdev, features);
490
491 return 0;
492}
493
43250ddd
JY		 494/*
495 * atl1c_change_mtu - Change the Maximum Transfer Unit
496 * @netdev: network interface device structure
497 * @new_mtu: new value for maximum frame size
498 *
499 * Returns 0 on success, negative on failure
500 */
501static int atl1c_change_mtu(struct net_device *netdev, int new_mtu)
502{
503 struct atl1c_adapter *adapter = netdev_priv(netdev);
504 int old_mtu = netdev->mtu;
505 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
506
507 if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
508 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
509 if (netif_msg_link(adapter))
510 dev_warn(&adapter->pdev->dev, "invalid MTU setting\n");
511 return -EINVAL;
512 }
513 /* set MTU */
514 if (old_mtu != new_mtu && netif_running(netdev)) {
515 while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
516 msleep(1);
517 netdev->mtu = new_mtu;
518 adapter->hw.max_frame_size = new_mtu;
519 atl1c_set_rxbufsize(adapter, netdev);
520 atl1c_down(adapter);
782d640a 521 netdev_update_features(netdev);
43250ddd
JY		 522 atl1c_up(adapter);
523 clear_bit(__AT_RESETTING, &adapter->flags);
524 if (adapter->hw.ctrl_flags & ATL1C_FPGA_VERSION) {
525 u32 phy_data;
526
527 AT_READ_REG(&adapter->hw, 0x1414, &phy_data);
528 phy_data |= 0x10000000;
529 AT_WRITE_REG(&adapter->hw, 0x1414, phy_data);
530 }
531
532 }
533 return 0;
534}
535
536/*
537 * caller should hold mdio_lock
538 */
539static int atl1c_mdio_read(struct net_device *netdev, int phy_id, int reg_num)
540{
541 struct atl1c_adapter *adapter = netdev_priv(netdev);
542 u16 result;
543
544 atl1c_read_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, &result);
545 return result;
546}
547
548static void atl1c_mdio_write(struct net_device *netdev, int phy_id,
549 int reg_num, int val)
550{
551 struct atl1c_adapter *adapter = netdev_priv(netdev);
552
553 atl1c_write_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, val);
554}
555
556/*
557 * atl1c_mii_ioctl -
558 * @netdev:
559 * @ifreq:
560 * @cmd:
561 */
562static int atl1c_mii_ioctl(struct net_device *netdev,
563 struct ifreq *ifr, int cmd)
564{
565 struct atl1c_adapter *adapter = netdev_priv(netdev);
566 struct pci_dev *pdev = adapter->pdev;
567 struct mii_ioctl_data *data = if_mii(ifr);
568 unsigned long flags;
569 int retval = 0;
570
571 if (!netif_running(netdev))
572 return -EINVAL;
573
574 spin_lock_irqsave(&adapter->mdio_lock, flags);
575 switch (cmd) {
576 case SIOCGMIIPHY:
577 data->phy_id = 0;
578 break;
579
580 case SIOCGMIIREG:
43250ddd
JY		 581 if (atl1c_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
582 &data->val_out)) {
583 retval = -EIO;
584 goto out;
585 }
586 break;
587
588 case SIOCSMIIREG:
43250ddd
JY		 589 if (data->reg_num & ~(0x1F)) {
590 retval = -EFAULT;
591 goto out;
592 }
593
594 dev_dbg(&pdev->dev, "<atl1c_mii_ioctl> write %x %x",
595 data->reg_num, data->val_in);
596 if (atl1c_write_phy_reg(&adapter->hw,
597 data->reg_num, data->val_in)) {
598 retval = -EIO;
599 goto out;
600 }
601 break;
602
603 default:
604 retval = -EOPNOTSUPP;
605 break;
606 }
607out:
608 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
609 return retval;
610}
611
612/*
613 * atl1c_ioctl -
614 * @netdev:
615 * @ifreq:
616 * @cmd:
617 */
618static int atl1c_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
619{
620 switch (cmd) {
621 case SIOCGMIIPHY:
622 case SIOCGMIIREG:
623 case SIOCSMIIREG:
624 return atl1c_mii_ioctl(netdev, ifr, cmd);
625 default:
626 return -EOPNOTSUPP;
627 }
628}
629
630/*
631 * atl1c_alloc_queues - Allocate memory for all rings
632 * @adapter: board private structure to initialize
633 *
634 */
635static int __devinit atl1c_alloc_queues(struct atl1c_adapter *adapter)
636{
637 return 0;
638}
639
640static void atl1c_set_mac_type(struct atl1c_hw *hw)
641{
642 switch (hw->device_id) {
643 case PCI_DEVICE_ID_ATTANSIC_L2C:
644 hw->nic_type = athr_l2c;
645 break;
43250ddd
JY		 646 case PCI_DEVICE_ID_ATTANSIC_L1C:
647 hw->nic_type = athr_l1c;
648 break;
496c185c
LR		 649 case PCI_DEVICE_ID_ATHEROS_L2C_B:
650 hw->nic_type = athr_l2c_b;
651 break;
652 case PCI_DEVICE_ID_ATHEROS_L2C_B2:
653 hw->nic_type = athr_l2c_b2;
654 break;
655 case PCI_DEVICE_ID_ATHEROS_L1D:
656 hw->nic_type = athr_l1d;
657 break;
8f574b35
JY		 658 case PCI_DEVICE_ID_ATHEROS_L1D_2_0:
659 hw->nic_type = athr_l1d_2;
660 break;
43250ddd
JY		 661 default:
662 break;
663 }
664}
665
666static int atl1c_setup_mac_funcs(struct atl1c_hw *hw)
667{
668 u32 phy_status_data;
669 u32 link_ctrl_data;
670
671 atl1c_set_mac_type(hw);
672 AT_READ_REG(hw, REG_PHY_STATUS, &phy_status_data);
673 AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data);
674
8f574b35 675 hw->ctrl_flags = ATL1C_INTR_MODRT_ENABLE |
43250ddd
JY		 676 ATL1C_TXQ_MODE_ENHANCE;
677 if (link_ctrl_data & LINK_CTRL_L0S_EN)
678 hw->ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT;
679 if (link_ctrl_data & LINK_CTRL_L1_EN)
680 hw->ctrl_flags |= ATL1C_ASPM_L1_SUPPORT;
496c185c
LR		 681 if (link_ctrl_data & LINK_CTRL_EXT_SYNC)
682 hw->ctrl_flags |= ATL1C_LINK_EXT_SYNC;
8f574b35 683 hw->ctrl_flags |= ATL1C_ASPM_CTRL_MON;
43250ddd 684
496c185c 685 if (hw->nic_type == athr_l1c ||
8f574b35
JY		 686 hw->nic_type == athr_l1d ||
687 hw->nic_type == athr_l1d_2)
496c185c 688 hw->link_cap_flags |= ATL1C_LINK_CAP_1000M;
43250ddd
JY		 689 return 0;
690}
691/*
692 * atl1c_sw_init - Initialize general software structures (struct atl1c_adapter)
693 * @adapter: board private structure to initialize
694 *
695 * atl1c_sw_init initializes the Adapter private data structure.
696 * Fields are initialized based on PCI device information and
697 * OS network device settings (MTU size).
698 */
699static int __devinit atl1c_sw_init(struct atl1c_adapter *adapter)
700{
701 struct atl1c_hw *hw = &adapter->hw;
702 struct pci_dev *pdev = adapter->pdev;
8f574b35
JY		 703 u32 revision;
704
43250ddd
JY		 705
706 adapter->wol = 0;
762e3023 707 device_set_wakeup_enable(&pdev->dev, false);
43250ddd
JY		 708 adapter->link_speed = SPEED_0;
709 adapter->link_duplex = FULL_DUPLEX;
43250ddd 710 adapter->tpd_ring[0].count = 1024;
9f1fd0ef 711 adapter->rfd_ring.count = 512;
43250ddd
JY		 712
713 hw->vendor_id = pdev->vendor;
714 hw->device_id = pdev->device;
715 hw->subsystem_vendor_id = pdev->subsystem_vendor;
716 hw->subsystem_id = pdev->subsystem_device;
8f574b35
JY		 717 AT_READ_REG(hw, PCI_CLASS_REVISION, &revision);
718 hw->revision_id = revision & 0xFF;
43250ddd
JY		 719 /* before link up, we assume hibernate is true */
720 hw->hibernate = true;
721 hw->media_type = MEDIA_TYPE_AUTO_SENSOR;
722 if (atl1c_setup_mac_funcs(hw) != 0) {
723 dev_err(&pdev->dev, "set mac function pointers failed\n");
724 return -1;
725 }
726 hw->intr_mask = IMR_NORMAL_MASK;
727 hw->phy_configured = false;
728 hw->preamble_len = 7;
729 hw->max_frame_size = adapter->netdev->mtu;
43250ddd
JY		 730 hw->autoneg_advertised = ADVERTISED_Autoneg;
731 hw->indirect_tab = 0xE4E4E4E4;
732 hw->base_cpu = 0;
733
734 hw->ict = 50000; /* 100ms */
735 hw->smb_timer = 200000; /* 400ms */
736 hw->cmb_tpd = 4;
737 hw->cmb_tx_timer = 1; /* 2 us */
738 hw->rx_imt = 200;
739 hw->tx_imt = 1000;
740
741 hw->tpd_burst = 5;
742 hw->rfd_burst = 8;
743 hw->dma_order = atl1c_dma_ord_out;
744 hw->dmar_block = atl1c_dma_req_1024;
745 hw->dmaw_block = atl1c_dma_req_1024;
746 hw->dmar_dly_cnt = 15;
747 hw->dmaw_dly_cnt = 4;
748
749 if (atl1c_alloc_queues(adapter)) {
750 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
751 return -ENOMEM;
752 }
753 /* TODO */
754 atl1c_set_rxbufsize(adapter, adapter->netdev);
755 atomic_set(&adapter->irq_sem, 1);
756 spin_lock_init(&adapter->mdio_lock);
757 spin_lock_init(&adapter->tx_lock);
758 set_bit(__AT_DOWN, &adapter->flags);
759
760 return 0;
761}
762
c6060be4
JY		 763static inline void atl1c_clean_buffer(struct pci_dev *pdev,
764 struct atl1c_buffer *buffer_info, int in_irq)
765{
4b45e342 766 u16 pci_driection;
c6060be4
JY		 767 if (buffer_info->flags & ATL1C_BUFFER_FREE)
768 return;
769 if (buffer_info->dma) {
4b45e342
JY		 770 if (buffer_info->flags & ATL1C_PCIMAP_FROMDEVICE)
771 pci_driection = PCI_DMA_FROMDEVICE;
772 else
773 pci_driection = PCI_DMA_TODEVICE;
774
c6060be4
JY		 775 if (buffer_info->flags & ATL1C_PCIMAP_SINGLE)
776 pci_unmap_single(pdev, buffer_info->dma,
4b45e342 777 buffer_info->length, pci_driection);
c6060be4
JY		 778 else if (buffer_info->flags & ATL1C_PCIMAP_PAGE)
779 pci_unmap_page(pdev, buffer_info->dma,
4b45e342 780 buffer_info->length, pci_driection);
c6060be4
JY		 781 }
782 if (buffer_info->skb) {
783 if (in_irq)
784 dev_kfree_skb_irq(buffer_info->skb);
785 else
786 dev_kfree_skb(buffer_info->skb);
787 }
788 buffer_info->dma = 0;
789 buffer_info->skb = NULL;
790 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
791}
43250ddd
JY		 792/*
793 * atl1c_clean_tx_ring - Free Tx-skb
794 * @adapter: board private structure
795 */
796static void atl1c_clean_tx_ring(struct atl1c_adapter *adapter,
797 enum atl1c_trans_queue type)
798{
799 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
800 struct atl1c_buffer *buffer_info;
801 struct pci_dev *pdev = adapter->pdev;
802 u16 index, ring_count;
803
804 ring_count = tpd_ring->count;
805 for (index = 0; index < ring_count; index++) {
806 buffer_info = &tpd_ring->buffer_info[index];
c6060be4 807 atl1c_clean_buffer(pdev, buffer_info, 0);
43250ddd
JY		 808 }
809
810 /* Zero out Tx-buffers */
811 memset(tpd_ring->desc, 0, sizeof(struct atl1c_tpd_desc) *
c6060be4 812 ring_count);
43250ddd
JY		 813 atomic_set(&tpd_ring->next_to_clean, 0);
814 tpd_ring->next_to_use = 0;
815}
816
817/*
818 * atl1c_clean_rx_ring - Free rx-reservation skbs
819 * @adapter: board private structure
820 */
821static void atl1c_clean_rx_ring(struct atl1c_adapter *adapter)
822{
9f1fd0ef
HX		 823 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
824 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
43250ddd
JY		 825 struct atl1c_buffer *buffer_info;
826 struct pci_dev *pdev = adapter->pdev;
9f1fd0ef 827 int j;
43250ddd 828
9f1fd0ef
HX		 829 for (j = 0; j < rfd_ring->count; j++) {
830 buffer_info = &rfd_ring->buffer_info[j];
831 atl1c_clean_buffer(pdev, buffer_info, 0);
43250ddd 832 }
9f1fd0ef
HX		 833 /* zero out the descriptor ring */
834 memset(rfd_ring->desc, 0, rfd_ring->size);
835 rfd_ring->next_to_clean = 0;
836 rfd_ring->next_to_use = 0;
837 rrd_ring->next_to_use = 0;
838 rrd_ring->next_to_clean = 0;
43250ddd
JY		 839}
840
841/*
842 * Read / Write Ptr Initialize:
843 */
844static void atl1c_init_ring_ptrs(struct atl1c_adapter *adapter)
845{
846 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
9f1fd0ef
HX		 847 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
848 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
43250ddd
JY		 849 struct atl1c_buffer *buffer_info;
850 int i, j;
851
852 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
853 tpd_ring[i].next_to_use = 0;
854 atomic_set(&tpd_ring[i].next_to_clean, 0);
855 buffer_info = tpd_ring[i].buffer_info;
856 for (j = 0; j < tpd_ring->count; j++)
c6060be4
JY		 857 ATL1C_SET_BUFFER_STATE(&buffer_info[i],
858 ATL1C_BUFFER_FREE);
43250ddd 859 }
9f1fd0ef
HX		 860 rfd_ring->next_to_use = 0;
861 rfd_ring->next_to_clean = 0;
862 rrd_ring->next_to_use = 0;
863 rrd_ring->next_to_clean = 0;
864 for (j = 0; j < rfd_ring->count; j++) {
865 buffer_info = &rfd_ring->buffer_info[j];
866 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
43250ddd
JY		 867 }
868}
869
870/*
871 * atl1c_free_ring_resources - Free Tx / RX descriptor Resources
872 * @adapter: board private structure
873 *
874 * Free all transmit software resources
875 */
876static void atl1c_free_ring_resources(struct atl1c_adapter *adapter)
877{
878 struct pci_dev *pdev = adapter->pdev;
879
880 pci_free_consistent(pdev, adapter->ring_header.size,
881 adapter->ring_header.desc,
882 adapter->ring_header.dma);
883 adapter->ring_header.desc = NULL;
884
885 /* Note: just free tdp_ring.buffer_info,
886 * it contain rfd_ring.buffer_info, do not double free */
887 if (adapter->tpd_ring[0].buffer_info) {
888 kfree(adapter->tpd_ring[0].buffer_info);
889 adapter->tpd_ring[0].buffer_info = NULL;
890 }
891}
892
893/*
894 * atl1c_setup_mem_resources - allocate Tx / RX descriptor resources
895 * @adapter: board private structure
896 *
897 * Return 0 on success, negative on failure
898 */
899static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter)
900{
901 struct pci_dev *pdev = adapter->pdev;
902 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
9f1fd0ef
HX		 903 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
904 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
43250ddd 905 struct atl1c_ring_header *ring_header = &adapter->ring_header;
43250ddd
JY		 906 int size;
907 int i;
908 int count = 0;
909 int rx_desc_count = 0;
910 u32 offset = 0;
911
9f1fd0ef 912 rrd_ring->count = rfd_ring->count;
43250ddd
JY		 913 for (i = 1; i < AT_MAX_TRANSMIT_QUEUE; i++)
914 tpd_ring[i].count = tpd_ring[0].count;
915
43250ddd
JY		 916 /* 2 tpd queue, one high priority queue,
917 * another normal priority queue */
918 size = sizeof(struct atl1c_buffer) * (tpd_ring->count * 2 +
9f1fd0ef 919 rfd_ring->count);
43250ddd
JY		 920 tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
921 if (unlikely(!tpd_ring->buffer_info)) {
922 dev_err(&pdev->dev, "kzalloc failed, size = %d\n",
923 size);
924 goto err_nomem;
925 }
926 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
927 tpd_ring[i].buffer_info =
928 (struct atl1c_buffer *) (tpd_ring->buffer_info + count);
929 count += tpd_ring[i].count;
930 }
931
9f1fd0ef
HX		 932 rfd_ring->buffer_info =
933 (struct atl1c_buffer *) (tpd_ring->buffer_info + count);
934 count += rfd_ring->count;
935 rx_desc_count += rfd_ring->count;
936
43250ddd
JY		 937 /*
938 * real ring DMA buffer
939 * each ring/block may need up to 8 bytes for alignment, hence the
940 * additional bytes tacked onto the end.
941 */
942 ring_header->size = size =
943 sizeof(struct atl1c_tpd_desc) * tpd_ring->count * 2 +
944 sizeof(struct atl1c_rx_free_desc) * rx_desc_count +
945 sizeof(struct atl1c_recv_ret_status) * rx_desc_count +
946 sizeof(struct atl1c_hw_stats) +
9f1fd0ef 947 8 * 4 + 8 * 2;
43250ddd
JY		 948
949 ring_header->desc = pci_alloc_consistent(pdev, ring_header->size,
950 &ring_header->dma);
951 if (unlikely(!ring_header->desc)) {
952 dev_err(&pdev->dev, "pci_alloc_consistend failed\n");
953 goto err_nomem;
954 }
955 memset(ring_header->desc, 0, ring_header->size);
956 /* init TPD ring */
957
958 tpd_ring[0].dma = roundup(ring_header->dma, 8);
959 offset = tpd_ring[0].dma - ring_header->dma;
960 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
961 tpd_ring[i].dma = ring_header->dma + offset;
962 tpd_ring[i].desc = (u8 *) ring_header->desc + offset;
963 tpd_ring[i].size =
964 sizeof(struct atl1c_tpd_desc) * tpd_ring[i].count;
965 offset += roundup(tpd_ring[i].size, 8);
966 }
967 /* init RFD ring */
9f1fd0ef
HX		 968 rfd_ring->dma = ring_header->dma + offset;
969 rfd_ring->desc = (u8 *) ring_header->desc + offset;
970 rfd_ring->size = sizeof(struct atl1c_rx_free_desc) * rfd_ring->count;
971 offset += roundup(rfd_ring->size, 8);
43250ddd
JY		 972
973 /* init RRD ring */
9f1fd0ef
HX		 974 rrd_ring->dma = ring_header->dma + offset;
975 rrd_ring->desc = (u8 *) ring_header->desc + offset;
976 rrd_ring->size = sizeof(struct atl1c_recv_ret_status) *
977 rrd_ring->count;
978 offset += roundup(rrd_ring->size, 8);
43250ddd
JY		 979
980 adapter->smb.dma = ring_header->dma + offset;
981 adapter->smb.smb = (u8 *)ring_header->desc + offset;
982 return 0;
983
984err_nomem:
985 kfree(tpd_ring->buffer_info);
986 return -ENOMEM;
987}
988
989static void atl1c_configure_des_ring(struct atl1c_adapter *adapter)
990{
991 struct atl1c_hw *hw = &adapter->hw;
9f1fd0ef
HX		 992 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
993 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
43250ddd
JY		 994 struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
995 adapter->tpd_ring;
996 struct atl1c_cmb *cmb = (struct atl1c_cmb *) &adapter->cmb;
997 struct atl1c_smb *smb = (struct atl1c_smb *) &adapter->smb;
8f574b35 998 u32 data;
43250ddd
JY		 999
1000 /* TPD */
1001 AT_WRITE_REG(hw, REG_TX_BASE_ADDR_HI,
1002 (u32)((tpd_ring[atl1c_trans_normal].dma &
1003 AT_DMA_HI_ADDR_MASK) >> 32));
1004 /* just enable normal priority TX queue */
1005 AT_WRITE_REG(hw, REG_NTPD_HEAD_ADDR_LO,
1006 (u32)(tpd_ring[atl1c_trans_normal].dma &
1007 AT_DMA_LO_ADDR_MASK));
1008 AT_WRITE_REG(hw, REG_HTPD_HEAD_ADDR_LO,
1009 (u32)(tpd_ring[atl1c_trans_high].dma &
1010 AT_DMA_LO_ADDR_MASK));
1011 AT_WRITE_REG(hw, REG_TPD_RING_SIZE,
1012 (u32)(tpd_ring[0].count & TPD_RING_SIZE_MASK));
1013
1014
1015 /* RFD */
1016 AT_WRITE_REG(hw, REG_RX_BASE_ADDR_HI,
9f1fd0ef
HX		 1017 (u32)((rfd_ring->dma & AT_DMA_HI_ADDR_MASK) >> 32));
1018 AT_WRITE_REG(hw, REG_RFD0_HEAD_ADDR_LO,
1019 (u32)(rfd_ring->dma & AT_DMA_LO_ADDR_MASK));
43250ddd
JY		 1020
1021 AT_WRITE_REG(hw, REG_RFD_RING_SIZE,
9f1fd0ef 1022 rfd_ring->count & RFD_RING_SIZE_MASK);
43250ddd
JY		 1023 AT_WRITE_REG(hw, REG_RX_BUF_SIZE,
1024 adapter->rx_buffer_len & RX_BUF_SIZE_MASK);
1025
1026 /* RRD */
9f1fd0ef
HX		 1027 AT_WRITE_REG(hw, REG_RRD0_HEAD_ADDR_LO,
1028 (u32)(rrd_ring->dma & AT_DMA_LO_ADDR_MASK));
43250ddd 1029 AT_WRITE_REG(hw, REG_RRD_RING_SIZE,
9f1fd0ef 1030 (rrd_ring->count & RRD_RING_SIZE_MASK));
43250ddd
JY		 1031
1032 /* CMB */
1033 AT_WRITE_REG(hw, REG_CMB_BASE_ADDR_LO, cmb->dma & AT_DMA_LO_ADDR_MASK);
1034
1035 /* SMB */
1036 AT_WRITE_REG(hw, REG_SMB_BASE_ADDR_HI,
1037 (u32)((smb->dma & AT_DMA_HI_ADDR_MASK) >> 32));
1038 AT_WRITE_REG(hw, REG_SMB_BASE_ADDR_LO,
1039 (u32)(smb->dma & AT_DMA_LO_ADDR_MASK));
8f574b35
JY		 1040 if (hw->nic_type == athr_l2c_b) {
1041 AT_WRITE_REG(hw, REG_SRAM_RXF_LEN, 0x02a0L);
1042 AT_WRITE_REG(hw, REG_SRAM_TXF_LEN, 0x0100L);
1043 AT_WRITE_REG(hw, REG_SRAM_RXF_ADDR, 0x029f0000L);
1044 AT_WRITE_REG(hw, REG_SRAM_RFD0_INFO, 0x02bf02a0L);
1045 AT_WRITE_REG(hw, REG_SRAM_TXF_ADDR, 0x03bf02c0L);
1046 AT_WRITE_REG(hw, REG_SRAM_TRD_ADDR, 0x03df03c0L);
1047 AT_WRITE_REG(hw, REG_TXF_WATER_MARK, 0); /* TX watermark, to enter l1 state.*/
1048 AT_WRITE_REG(hw, REG_RXD_DMA_CTRL, 0); /* RXD threshold.*/
1049 }
1050 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d_2) {
1051 /* Power Saving for L2c_B */
1052 AT_READ_REG(hw, REG_SERDES_LOCK, &data);
1053 data |= SERDES_MAC_CLK_SLOWDOWN;
1054 data |= SERDES_PYH_CLK_SLOWDOWN;
1055 AT_WRITE_REG(hw, REG_SERDES_LOCK, data);
1056 }
43250ddd
JY		 1057 /* Load all of base address above */
1058 AT_WRITE_REG(hw, REG_LOAD_PTR, 1);
1059}
1060
1061static void atl1c_configure_tx(struct atl1c_adapter *adapter)
1062{
1063 struct atl1c_hw *hw = &adapter->hw;
1064 u32 dev_ctrl_data;
1065 u32 max_pay_load;
1066 u16 tx_offload_thresh;
1067 u32 txq_ctrl_data;
8f574b35 1068 u32 max_pay_load_data;
43250ddd 1069
43250ddd
JY		 1070 tx_offload_thresh = MAX_TX_OFFLOAD_THRESH;
1071 AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH,
1072 (tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK);
1073 AT_READ_REG(hw, REG_DEVICE_CTRL, &dev_ctrl_data);
1074 max_pay_load = (dev_ctrl_data >> DEVICE_CTRL_MAX_PAYLOAD_SHIFT) &
1075 DEVICE_CTRL_MAX_PAYLOAD_MASK;
81b504b8 1076 hw->dmaw_block = min_t(u32, max_pay_load, hw->dmaw_block);
43250ddd
JY		 1077 max_pay_load = (dev_ctrl_data >> DEVICE_CTRL_MAX_RREQ_SZ_SHIFT) &
1078 DEVICE_CTRL_MAX_RREQ_SZ_MASK;
81b504b8 1079 hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block);
43250ddd
JY		 1080
1081 txq_ctrl_data = (hw->tpd_burst & TXQ_NUM_TPD_BURST_MASK) <<
1082 TXQ_NUM_TPD_BURST_SHIFT;
1083 if (hw->ctrl_flags & ATL1C_TXQ_MODE_ENHANCE)
1084 txq_ctrl_data |= TXQ_CTRL_ENH_MODE;
8f574b35 1085 max_pay_load_data = (atl1c_pay_load_size[hw->dmar_block] &
43250ddd 1086 TXQ_TXF_BURST_NUM_MASK) << TXQ_TXF_BURST_NUM_SHIFT;
8f574b35
JY		 1087 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l2c_b2)
1088 max_pay_load_data >>= 1;
1089 txq_ctrl_data |= max_pay_load_data;
43250ddd
JY		 1090
1091 AT_WRITE_REG(hw, REG_TXQ_CTRL, txq_ctrl_data);
1092}
1093
1094static void atl1c_configure_rx(struct atl1c_adapter *adapter)
1095{
1096 struct atl1c_hw *hw = &adapter->hw;
1097 u32 rxq_ctrl_data;
1098
1099 rxq_ctrl_data = (hw->rfd_burst & RXQ_RFD_BURST_NUM_MASK) <<
1100 RXQ_RFD_BURST_NUM_SHIFT;
1101
1102 if (hw->ctrl_flags & ATL1C_RX_IPV6_CHKSUM)
1103 rxq_ctrl_data |= IPV6_CHKSUM_CTRL_EN;
9f1fd0ef 1104
43250ddd 1105 if (hw->ctrl_flags & ATL1C_ASPM_CTRL_MON)
8f574b35 1106 rxq_ctrl_data |= (ASPM_THRUPUT_LIMIT_1M &
43250ddd
JY		 1107 ASPM_THRUPUT_LIMIT_MASK) << ASPM_THRUPUT_LIMIT_SHIFT;
1108
1109 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data);
1110}
1111
43250ddd
JY		 1112static void atl1c_configure_dma(struct atl1c_adapter *adapter)
1113{
1114 struct atl1c_hw *hw = &adapter->hw;
1115 u32 dma_ctrl_data;
1116
1117 dma_ctrl_data = DMA_CTRL_DMAR_REQ_PRI;
1118 if (hw->ctrl_flags & ATL1C_CMB_ENABLE)
1119 dma_ctrl_data |= DMA_CTRL_CMB_EN;
1120 if (hw->ctrl_flags & ATL1C_SMB_ENABLE)
1121 dma_ctrl_data |= DMA_CTRL_SMB_EN;
1122 else
1123 dma_ctrl_data |= MAC_CTRL_SMB_DIS;
1124
1125 switch (hw->dma_order) {
1126 case atl1c_dma_ord_in:
1127 dma_ctrl_data |= DMA_CTRL_DMAR_IN_ORDER;
1128 break;
1129 case atl1c_dma_ord_enh:
1130 dma_ctrl_data |= DMA_CTRL_DMAR_ENH_ORDER;
1131 break;
1132 case atl1c_dma_ord_out:
1133 dma_ctrl_data |= DMA_CTRL_DMAR_OUT_ORDER;
1134 break;
1135 default:
1136 break;
1137 }
1138
1139 dma_ctrl_data |= (((u32)hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
1140 << DMA_CTRL_DMAR_BURST_LEN_SHIFT;
1141 dma_ctrl_data |= (((u32)hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK)
1142 << DMA_CTRL_DMAW_BURST_LEN_SHIFT;
1143 dma_ctrl_data |= (((u32)hw->dmar_dly_cnt) & DMA_CTRL_DMAR_DLY_CNT_MASK)
1144 << DMA_CTRL_DMAR_DLY_CNT_SHIFT;
1145 dma_ctrl_data |= (((u32)hw->dmaw_dly_cnt) & DMA_CTRL_DMAW_DLY_CNT_MASK)
1146 << DMA_CTRL_DMAW_DLY_CNT_SHIFT;
1147
1148 AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data);
1149}
1150
1151/*
1152 * Stop the mac, transmit and receive units
1153 * hw - Struct containing variables accessed by shared code
1154 * return : 0 or idle status (if error)
1155 */
1156static int atl1c_stop_mac(struct atl1c_hw *hw)
1157{
1158 u32 data;
43250ddd
JY		 1159
1160 AT_READ_REG(hw, REG_RXQ_CTRL, &data);
1161 data &= ~(RXQ1_CTRL_EN | RXQ2_CTRL_EN |
1162 RXQ3_CTRL_EN | RXQ_CTRL_EN);
1163 AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
1164
1165 AT_READ_REG(hw, REG_TXQ_CTRL, &data);
1166 data &= ~TXQ_CTRL_EN;
1167 AT_WRITE_REG(hw, REG_TWSI_CTRL, data);
1168
c930a662 1169 atl1c_wait_until_idle(hw);
43250ddd
JY		 1170
1171 AT_READ_REG(hw, REG_MAC_CTRL, &data);
1172 data &= ~(MAC_CTRL_TX_EN | MAC_CTRL_RX_EN);
1173 AT_WRITE_REG(hw, REG_MAC_CTRL, data);
1174
c930a662 1175 return (int)atl1c_wait_until_idle(hw);
43250ddd
JY		 1176}
1177
1178static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw)
1179{
1180 u32 data;
1181
1182 AT_READ_REG(hw, REG_RXQ_CTRL, &data);
43250ddd
JY		 1183 data |= RXQ_CTRL_EN;
1184 AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
1185}
1186
1187static void atl1c_enable_tx_ctrl(struct atl1c_hw *hw)
1188{
1189 u32 data;
1190
1191 AT_READ_REG(hw, REG_TXQ_CTRL, &data);
1192 data |= TXQ_CTRL_EN;
1193 AT_WRITE_REG(hw, REG_TXQ_CTRL, data);
1194}
1195
1196/*
1197 * Reset the transmit and receive units; mask and clear all interrupts.
1198 * hw - Struct containing variables accessed by shared code
1199 * return : 0 or idle status (if error)
1200 */
1201static int atl1c_reset_mac(struct atl1c_hw *hw)
1202{
1203 struct atl1c_adapter *adapter = (struct atl1c_adapter *)hw->adapter;
1204 struct pci_dev *pdev = adapter->pdev;
8f574b35 1205 u32 master_ctrl_data = 0;
43250ddd
JY		 1206
1207 AT_WRITE_REG(hw, REG_IMR, 0);
1208 AT_WRITE_REG(hw, REG_ISR, ISR_DIS_INT);
1209
8f574b35 1210 atl1c_stop_mac(hw);
43250ddd
JY		 1211 /*
1212 * Issue Soft Reset to the MAC. This will reset the chip's
1213 * transmit, receive, DMA. It will not effect
1214 * the current PCI configuration. The global reset bit is self-
1215 * clearing, and should clear within a microsecond.
1216 */
8f574b35
JY		 1217 AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data);
1218 master_ctrl_data |= MASTER_CTRL_OOB_DIS_OFF;
1219 AT_WRITE_REGW(hw, REG_MASTER_CTRL, ((master_ctrl_data | MASTER_CTRL_SOFT_RST)
1220 & 0xFFFF));
1221
43250ddd
JY		 1222 AT_WRITE_FLUSH(hw);
1223 msleep(10);
1224 /* Wait at least 10ms for All module to be Idle */
c930a662
JP		 1225
1226 if (atl1c_wait_until_idle(hw)) {
43250ddd 1227 dev_err(&pdev->dev,
c930a662 1228 "MAC state machine can't be idle since"
43250ddd
JY		 1229 " disabled for 10ms second\n");
1230 return -1;
1231 }
1232 return 0;
1233}
1234
1235static void atl1c_disable_l0s_l1(struct atl1c_hw *hw)
1236{
1237 u32 pm_ctrl_data;
1238
1239 AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
1240 pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
1241 PM_CTRL_L1_ENTRY_TIMER_SHIFT);
1242 pm_ctrl_data &= ~PM_CTRL_CLK_SWH_L1;
1243 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1244 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1245 pm_ctrl_data &= ~PM_CTRL_MAC_ASPM_CHK;
1246 pm_ctrl_data &= ~PM_CTRL_SERDES_PD_EX_L1;
1247
1248 pm_ctrl_data |= PM_CTRL_SERDES_BUDS_RX_L1_EN;
1249 pm_ctrl_data |= PM_CTRL_SERDES_PLL_L1_EN;
1250 pm_ctrl_data |= PM_CTRL_SERDES_L1_EN;
1251 AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);
1252}
1253
1254/*
1255 * Set ASPM state.
1256 * Enable/disable L0s/L1 depend on link state.
1257 */
1258static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup)
1259{
1260 u32 pm_ctrl_data;
496c185c 1261 u32 link_ctrl_data;
8f574b35 1262 u32 link_l1_timer = 0xF;
43250ddd
JY		 1263
1264 AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
496c185c 1265 AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data);
496c185c 1266
8f574b35 1267 pm_ctrl_data &= ~PM_CTRL_SERDES_PD_EX_L1;
43250ddd
JY		 1268 pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
1269 PM_CTRL_L1_ENTRY_TIMER_SHIFT);
496c185c 1270 pm_ctrl_data &= ~(PM_CTRL_LCKDET_TIMER_MASK <<
8f574b35
JY		 1271 PM_CTRL_LCKDET_TIMER_SHIFT);
1272 pm_ctrl_data |= AT_LCKDET_TIMER << PM_CTRL_LCKDET_TIMER_SHIFT;
496c185c 1273
8f574b35
JY		 1274 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d ||
1275 hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) {
496c185c
LR		 1276 link_ctrl_data &= ~LINK_CTRL_EXT_SYNC;
1277 if (!(hw->ctrl_flags & ATL1C_APS_MODE_ENABLE)) {
8f574b35 1278 if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10)
496c185c
LR		 1279 link_ctrl_data |= LINK_CTRL_EXT_SYNC;
1280 }
1281
1282 AT_WRITE_REG(hw, REG_LINK_CTRL, link_ctrl_data);
1283
8f574b35
JY		 1284 pm_ctrl_data |= PM_CTRL_RCVR_WT_TIMER;
1285 pm_ctrl_data &= ~(PM_CTRL_PM_REQ_TIMER_MASK <<
1286 PM_CTRL_PM_REQ_TIMER_SHIFT);
1287 pm_ctrl_data |= AT_ASPM_L1_TIMER <<
1288 PM_CTRL_PM_REQ_TIMER_SHIFT;
496c185c
LR		 1289 pm_ctrl_data &= ~PM_CTRL_SA_DLY_EN;
1290 pm_ctrl_data &= ~PM_CTRL_HOTRST;
1291 pm_ctrl_data |= 1 << PM_CTRL_L1_ENTRY_TIMER_SHIFT;
1292 pm_ctrl_data |= PM_CTRL_SERDES_PD_EX_L1;
1293 }
8f574b35 1294 pm_ctrl_data |= PM_CTRL_MAC_ASPM_CHK;
43250ddd 1295 if (linkup) {
496c185c
LR		 1296 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1297 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1298 if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT)
1299 pm_ctrl_data |= PM_CTRL_ASPM_L1_EN;
1300 if (hw->ctrl_flags & ATL1C_ASPM_L0S_SUPPORT)
1301 pm_ctrl_data |= PM_CTRL_ASPM_L0S_EN;
1302
8f574b35
JY		 1303 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d ||
1304 hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) {
496c185c
LR		 1305 if (hw->nic_type == athr_l2c_b)
1306 if (!(hw->ctrl_flags & ATL1C_APS_MODE_ENABLE))
8f574b35 1307 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
496c185c
LR		 1308 pm_ctrl_data &= ~PM_CTRL_SERDES_L1_EN;
1309 pm_ctrl_data &= ~PM_CTRL_SERDES_PLL_L1_EN;
1310 pm_ctrl_data &= ~PM_CTRL_SERDES_BUDS_RX_L1_EN;
1311 pm_ctrl_data |= PM_CTRL_CLK_SWH_L1;
8f574b35
JY		 1312 if (hw->adapter->link_speed == SPEED_100 ||
1313 hw->adapter->link_speed == SPEED_1000) {
1314 pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
1315 PM_CTRL_L1_ENTRY_TIMER_SHIFT);
1316 if (hw->nic_type == athr_l2c_b)
1317 link_l1_timer = 7;
1318 else if (hw->nic_type == athr_l2c_b2 ||
1319 hw->nic_type == athr_l1d_2)
1320 link_l1_timer = 4;
1321 pm_ctrl_data |= link_l1_timer <<
1322 PM_CTRL_L1_ENTRY_TIMER_SHIFT;
496c185c
LR		 1323 }
1324 } else {
1325 pm_ctrl_data |= PM_CTRL_SERDES_L1_EN;
1326 pm_ctrl_data |= PM_CTRL_SERDES_PLL_L1_EN;
1327 pm_ctrl_data |= PM_CTRL_SERDES_BUDS_RX_L1_EN;
1328 pm_ctrl_data &= ~PM_CTRL_CLK_SWH_L1;
1329 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1330 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
43250ddd 1331
8f574b35 1332 }
43250ddd 1333 } else {
52fbc100 1334 pm_ctrl_data &= ~PM_CTRL_SERDES_L1_EN;
43250ddd
JY		 1335 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1336 pm_ctrl_data &= ~PM_CTRL_SERDES_PLL_L1_EN;
43250ddd
JY		 1337 pm_ctrl_data |= PM_CTRL_CLK_SWH_L1;
1338
1339 if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT)
1340 pm_ctrl_data |= PM_CTRL_ASPM_L1_EN;
1341 else
1342 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1343 }
43250ddd 1344 AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);
8f574b35
JY		 1345
1346 return;
43250ddd
JY		 1347}
1348
1349static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter)
1350{
1351 struct atl1c_hw *hw = &adapter->hw;
1352 struct net_device *netdev = adapter->netdev;
1353 u32 mac_ctrl_data;
1354
1355 mac_ctrl_data = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN;
1356 mac_ctrl_data |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
1357
1358 if (adapter->link_duplex == FULL_DUPLEX) {
1359 hw->mac_duplex = true;
1360 mac_ctrl_data |= MAC_CTRL_DUPLX;
1361 }
1362
1363 if (adapter->link_speed == SPEED_1000)
1364 hw->mac_speed = atl1c_mac_speed_1000;
1365 else
1366 hw->mac_speed = atl1c_mac_speed_10_100;
1367
1368 mac_ctrl_data |= (hw->mac_speed & MAC_CTRL_SPEED_MASK) <<
1369 MAC_CTRL_SPEED_SHIFT;
1370
1371 mac_ctrl_data |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
1372 mac_ctrl_data |= ((hw->preamble_len & MAC_CTRL_PRMLEN_MASK) <<
1373 MAC_CTRL_PRMLEN_SHIFT);
1374
46facce9 1375 __atl1c_vlan_mode(netdev->features, &mac_ctrl_data);
43250ddd
JY		 1376
1377 mac_ctrl_data |= MAC_CTRL_BC_EN;
1378 if (netdev->flags & IFF_PROMISC)
1379 mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
1380 if (netdev->flags & IFF_ALLMULTI)
1381 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
1382
1383 mac_ctrl_data |= MAC_CTRL_SINGLE_PAUSE_EN;
8f574b35
JY		 1384 if (hw->nic_type == athr_l1d || hw->nic_type == athr_l2c_b2 ||
1385 hw->nic_type == athr_l1d_2) {
496c185c
LR		 1386 mac_ctrl_data |= MAC_CTRL_SPEED_MODE_SW;
1387 mac_ctrl_data |= MAC_CTRL_HASH_ALG_CRC32;
1388 }
43250ddd
JY		 1389 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
1390}
1391
1392/*
1393 * atl1c_configure - Configure Transmit&Receive Unit after Reset
1394 * @adapter: board private structure
1395 *
1396 * Configure the Tx /Rx unit of the MAC after a reset.
1397 */
1398static int atl1c_configure(struct atl1c_adapter *adapter)
1399{
1400 struct atl1c_hw *hw = &adapter->hw;
1401 u32 master_ctrl_data = 0;
1402 u32 intr_modrt_data;
8f574b35 1403 u32 data;
43250ddd
JY		 1404
1405 /* clear interrupt status */
1406 AT_WRITE_REG(hw, REG_ISR, 0xFFFFFFFF);
1407 /* Clear any WOL status */
1408 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
1409 /* set Interrupt Clear Timer
1410 * HW will enable self to assert interrupt event to system after
1411 * waiting x-time for software to notify it accept interrupt.
1412 */
8f574b35
JY		 1413
1414 data = CLK_GATING_EN_ALL;
1415 if (hw->ctrl_flags & ATL1C_CLK_GATING_EN) {
1416 if (hw->nic_type == athr_l2c_b)
1417 data &= ~CLK_GATING_RXMAC_EN;
1418 } else
1419 data = 0;
1420 AT_WRITE_REG(hw, REG_CLK_GATING_CTRL, data);
1421
43250ddd
JY		 1422 AT_WRITE_REG(hw, REG_INT_RETRIG_TIMER,
1423 hw->ict & INT_RETRIG_TIMER_MASK);
1424
1425 atl1c_configure_des_ring(adapter);
1426
1427 if (hw->ctrl_flags & ATL1C_INTR_MODRT_ENABLE) {
1428 intr_modrt_data = (hw->tx_imt & IRQ_MODRT_TIMER_MASK) <<
1429 IRQ_MODRT_TX_TIMER_SHIFT;
1430 intr_modrt_data |= (hw->rx_imt & IRQ_MODRT_TIMER_MASK) <<
1431 IRQ_MODRT_RX_TIMER_SHIFT;
1432 AT_WRITE_REG(hw, REG_IRQ_MODRT_TIMER_INIT, intr_modrt_data);
1433 master_ctrl_data |=
1434 MASTER_CTRL_TX_ITIMER_EN | MASTER_CTRL_RX_ITIMER_EN;
1435 }
1436
1437 if (hw->ctrl_flags & ATL1C_INTR_CLEAR_ON_READ)
1438 master_ctrl_data |= MASTER_CTRL_INT_RDCLR;
1439
8f574b35 1440 master_ctrl_data |= MASTER_CTRL_SA_TIMER_EN;
43250ddd
JY		 1441 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
1442
1443 if (hw->ctrl_flags & ATL1C_CMB_ENABLE) {
1444 AT_WRITE_REG(hw, REG_CMB_TPD_THRESH,
1445 hw->cmb_tpd & CMB_TPD_THRESH_MASK);
1446 AT_WRITE_REG(hw, REG_CMB_TX_TIMER,
1447 hw->cmb_tx_timer & CMB_TX_TIMER_MASK);
1448 }
1449
1450 if (hw->ctrl_flags & ATL1C_SMB_ENABLE)
1451 AT_WRITE_REG(hw, REG_SMB_STAT_TIMER,
1452 hw->smb_timer & SMB_STAT_TIMER_MASK);
1453 /* set MTU */
1454 AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN +
1455 VLAN_HLEN + ETH_FCS_LEN);
43250ddd
JY		 1456
1457 atl1c_configure_tx(adapter);
1458 atl1c_configure_rx(adapter);
43250ddd
JY		 1459 atl1c_configure_dma(adapter);
1460
1461 return 0;
1462}
1463
1464static void atl1c_update_hw_stats(struct atl1c_adapter *adapter)
1465{
1466 u16 hw_reg_addr = 0;
1467 unsigned long *stats_item = NULL;
1468 u32 data;
1469
1470 /* update rx status */
1471 hw_reg_addr = REG_MAC_RX_STATUS_BIN;
1472 stats_item = &adapter->hw_stats.rx_ok;
1473 while (hw_reg_addr <= REG_MAC_RX_STATUS_END) {
1474 AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
1475 *stats_item += data;
1476 stats_item++;
1477 hw_reg_addr += 4;
1478 }
1479/* update tx status */
1480 hw_reg_addr = REG_MAC_TX_STATUS_BIN;
1481 stats_item = &adapter->hw_stats.tx_ok;
1482 while (hw_reg_addr <= REG_MAC_TX_STATUS_END) {
1483 AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
1484 *stats_item += data;
1485 stats_item++;
1486 hw_reg_addr += 4;
1487 }
1488}
1489
1490/*
1491 * atl1c_get_stats - Get System Network Statistics
1492 * @netdev: network interface device structure
1493 *
1494 * Returns the address of the device statistics structure.
1495 * The statistics are actually updated from the timer callback.
1496 */
1497static struct net_device_stats *atl1c_get_stats(struct net_device *netdev)
1498{
1499 struct atl1c_adapter *adapter = netdev_priv(netdev);
1500 struct atl1c_hw_stats *hw_stats = &adapter->hw_stats;
a2c483a1 1501 struct net_device_stats *net_stats = &netdev->stats;
43250ddd
JY		 1502
1503 atl1c_update_hw_stats(adapter);
1504 net_stats->rx_packets = hw_stats->rx_ok;
1505 net_stats->tx_packets = hw_stats->tx_ok;
1506 net_stats->rx_bytes = hw_stats->rx_byte_cnt;
1507 net_stats->tx_bytes = hw_stats->tx_byte_cnt;
1508 net_stats->multicast = hw_stats->rx_mcast;
1509 net_stats->collisions = hw_stats->tx_1_col +
1510 hw_stats->tx_2_col * 2 +
1511 hw_stats->tx_late_col + hw_stats->tx_abort_col;
1512 net_stats->rx_errors = hw_stats->rx_frag + hw_stats->rx_fcs_err +
1513 hw_stats->rx_len_err + hw_stats->rx_sz_ov +
1514 hw_stats->rx_rrd_ov + hw_stats->rx_align_err;
1515 net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov;
1516 net_stats->rx_length_errors = hw_stats->rx_len_err;
1517 net_stats->rx_crc_errors = hw_stats->rx_fcs_err;
1518 net_stats->rx_frame_errors = hw_stats->rx_align_err;
1519 net_stats->rx_over_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
1520
1521 net_stats->rx_missed_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
1522
1523 net_stats->tx_errors = hw_stats->tx_late_col + hw_stats->tx_abort_col +
1524 hw_stats->tx_underrun + hw_stats->tx_trunc;
1525 net_stats->tx_fifo_errors = hw_stats->tx_underrun;
1526 net_stats->tx_aborted_errors = hw_stats->tx_abort_col;
1527 net_stats->tx_window_errors = hw_stats->tx_late_col;
1528
a2c483a1 1529 return net_stats;
43250ddd
JY		 1530}
1531
1532static inline void atl1c_clear_phy_int(struct atl1c_adapter *adapter)
1533{
1534 u16 phy_data;
1535
1536 spin_lock(&adapter->mdio_lock);
1537 atl1c_read_phy_reg(&adapter->hw, MII_ISR, &phy_data);
1538 spin_unlock(&adapter->mdio_lock);
1539}
1540
1541static bool atl1c_clean_tx_irq(struct atl1c_adapter *adapter,
1542 enum atl1c_trans_queue type)
1543{
1544 struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
1545 &adapter->tpd_ring[type];
1546 struct atl1c_buffer *buffer_info;
c6060be4 1547 struct pci_dev *pdev = adapter->pdev;
43250ddd
JY		 1548 u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
1549 u16 hw_next_to_clean;
1550 u16 shift;
1551 u32 data;
1552
1553 if (type == atl1c_trans_high)
1554 shift = MB_HTPD_CONS_IDX_SHIFT;
1555 else
1556 shift = MB_NTPD_CONS_IDX_SHIFT;
1557
1558 AT_READ_REG(&adapter->hw, REG_MB_PRIO_CONS_IDX, &data);
1559 hw_next_to_clean = (data >> shift) & MB_PRIO_PROD_IDX_MASK;
1560
1561 while (next_to_clean != hw_next_to_clean) {
1562 buffer_info = &tpd_ring->buffer_info[next_to_clean];
c6060be4 1563 atl1c_clean_buffer(pdev, buffer_info, 1);
43250ddd
JY		 1564 if (++next_to_clean == tpd_ring->count)
1565 next_to_clean = 0;
1566 atomic_set(&tpd_ring->next_to_clean, next_to_clean);
1567 }
1568
1569 if (netif_queue_stopped(adapter->netdev) &&
1570 netif_carrier_ok(adapter->netdev)) {
1571 netif_wake_queue(adapter->netdev);
1572 }
1573
1574 return true;
1575}
1576
1577/*
1578 * atl1c_intr - Interrupt Handler
1579 * @irq: interrupt number
1580 * @data: pointer to a network interface device structure
1581 * @pt_regs: CPU registers structure
1582 */
1583static irqreturn_t atl1c_intr(int irq, void *data)
1584{
1585 struct net_device *netdev = data;
1586 struct atl1c_adapter *adapter = netdev_priv(netdev);
1587 struct pci_dev *pdev = adapter->pdev;
1588 struct atl1c_hw *hw = &adapter->hw;
1589 int max_ints = AT_MAX_INT_WORK;
1590 int handled = IRQ_NONE;
1591 u32 status;
1592 u32 reg_data;
1593
1594 do {
1595 AT_READ_REG(hw, REG_ISR, &reg_data);
1596 status = reg_data & hw->intr_mask;
1597
1598 if (status == 0 || (status & ISR_DIS_INT) != 0) {
1599 if (max_ints != AT_MAX_INT_WORK)
1600 handled = IRQ_HANDLED;
1601 break;
1602 }
1603 /* link event */
1604 if (status & ISR_GPHY)
1605 atl1c_clear_phy_int(adapter);
1606 /* Ack ISR */
1607 AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);
1608 if (status & ISR_RX_PKT) {
1609 if (likely(napi_schedule_prep(&adapter->napi))) {
1610 hw->intr_mask &= ~ISR_RX_PKT;
1611 AT_WRITE_REG(hw, REG_IMR, hw->intr_mask);
1612 __napi_schedule(&adapter->napi);
1613 }
1614 }
1615 if (status & ISR_TX_PKT)
1616 atl1c_clean_tx_irq(adapter, atl1c_trans_normal);
1617
1618 handled = IRQ_HANDLED;
1619 /* check if PCIE PHY Link down */
1620 if (status & ISR_ERROR) {
1621 if (netif_msg_hw(adapter))
1622 dev_err(&pdev->dev,
1623 "atl1c hardware error (status = 0x%x)\n",
1624 status & ISR_ERROR);
1625 /* reset MAC */
78315457 1626 set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event);
cb190546 1627 schedule_work(&adapter->common_task);
8f574b35 1628 return IRQ_HANDLED;
43250ddd
JY		 1629 }
1630
1631 if (status & ISR_OVER)
1632 if (netif_msg_intr(adapter))
1633 dev_warn(&pdev->dev,
af901ca1 1634 "TX/RX overflow (status = 0x%x)\n",
43250ddd
JY		 1635 status & ISR_OVER);
1636
1637 /* link event */
1638 if (status & (ISR_GPHY | ISR_MANUAL)) {
a2c483a1 1639 netdev->stats.tx_carrier_errors++;
43250ddd
JY		 1640 atl1c_link_chg_event(adapter);
1641 break;
1642 }
1643
1644 } while (--max_ints > 0);
1645 /* re-enable Interrupt*/
1646 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
1647 return handled;
1648}
1649
1650static inline void atl1c_rx_checksum(struct atl1c_adapter *adapter,
1651 struct sk_buff *skb, struct atl1c_recv_ret_status *prrs)
1652{
1653 /*
1654 * The pid field in RRS in not correct sometimes, so we
1655 * cannot figure out if the packet is fragmented or not,
1656 * so we tell the KERNEL CHECKSUM_NONE
1657 */
bc8acf2c 1658 skb_checksum_none_assert(skb);
43250ddd
JY		 1659}
1660
9f1fd0ef 1661static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter)
43250ddd 1662{
9f1fd0ef 1663 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
43250ddd
JY		 1664 struct pci_dev *pdev = adapter->pdev;
1665 struct atl1c_buffer *buffer_info, *next_info;
1666 struct sk_buff *skb;
1667 void *vir_addr = NULL;
1668 u16 num_alloc = 0;
1669 u16 rfd_next_to_use, next_next;
1670 struct atl1c_rx_free_desc *rfd_desc;
1671
1672 next_next = rfd_next_to_use = rfd_ring->next_to_use;
1673 if (++next_next == rfd_ring->count)
1674 next_next = 0;
1675 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1676 next_info = &rfd_ring->buffer_info[next_next];
1677
c6060be4 1678 while (next_info->flags & ATL1C_BUFFER_FREE) {
43250ddd
JY		 1679 rfd_desc = ATL1C_RFD_DESC(rfd_ring, rfd_next_to_use);
1680
1d266430 1681 skb = netdev_alloc_skb(adapter->netdev, adapter->rx_buffer_len);
43250ddd
JY		 1682 if (unlikely(!skb)) {
1683 if (netif_msg_rx_err(adapter))
1684 dev_warn(&pdev->dev, "alloc rx buffer failed\n");
1685 break;
1686 }
1687
1688 /*
1689 * Make buffer alignment 2 beyond a 16 byte boundary
1690 * this will result in a 16 byte aligned IP header after
1691 * the 14 byte MAC header is removed
1692 */
1693 vir_addr = skb->data;
c6060be4 1694 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
43250ddd
JY		 1695 buffer_info->skb = skb;
1696 buffer_info->length = adapter->rx_buffer_len;
1697 buffer_info->dma = pci_map_single(pdev, vir_addr,
1698 buffer_info->length,
1699 PCI_DMA_FROMDEVICE);
4b45e342
JY		 1700 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
1701 ATL1C_PCIMAP_FROMDEVICE);
43250ddd
JY		 1702 rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
1703 rfd_next_to_use = next_next;
1704 if (++next_next == rfd_ring->count)
1705 next_next = 0;
1706 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1707 next_info = &rfd_ring->buffer_info[next_next];
1708 num_alloc++;
1709 }
1710
1711 if (num_alloc) {
1712 /* TODO: update mailbox here */
1713 wmb();
1714 rfd_ring->next_to_use = rfd_next_to_use;
9f1fd0ef 1715 AT_WRITE_REG(&adapter->hw, REG_MB_RFD0_PROD_IDX,
43250ddd
JY		 1716 rfd_ring->next_to_use & MB_RFDX_PROD_IDX_MASK);
1717 }
1718
1719 return num_alloc;
1720}
1721
1722static void atl1c_clean_rrd(struct atl1c_rrd_ring *rrd_ring,
1723 struct atl1c_recv_ret_status *rrs, u16 num)
1724{
1725 u16 i;
1726 /* the relationship between rrd and rfd is one map one */
1727 for (i = 0; i < num; i++, rrs = ATL1C_RRD_DESC(rrd_ring,
1728 rrd_ring->next_to_clean)) {
1729 rrs->word3 &= ~RRS_RXD_UPDATED;
1730 if (++rrd_ring->next_to_clean == rrd_ring->count)
1731 rrd_ring->next_to_clean = 0;
1732 }
1733}
1734
1735static void atl1c_clean_rfd(struct atl1c_rfd_ring *rfd_ring,
1736 struct atl1c_recv_ret_status *rrs, u16 num)
1737{
1738 u16 i;
1739 u16 rfd_index;
1740 struct atl1c_buffer *buffer_info = rfd_ring->buffer_info;
1741
1742 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
1743 RRS_RX_RFD_INDEX_MASK;
1744 for (i = 0; i < num; i++) {
1745 buffer_info[rfd_index].skb = NULL;
c6060be4
JY		 1746 ATL1C_SET_BUFFER_STATE(&buffer_info[rfd_index],
1747 ATL1C_BUFFER_FREE);
43250ddd
JY		 1748 if (++rfd_index == rfd_ring->count)
1749 rfd_index = 0;
1750 }
1751 rfd_ring->next_to_clean = rfd_index;
1752}
1753
9f1fd0ef 1754static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter,
43250ddd
JY		 1755 int *work_done, int work_to_do)
1756{
1757 u16 rfd_num, rfd_index;
1758 u16 count = 0;
1759 u16 length;
1760 struct pci_dev *pdev = adapter->pdev;
1761 struct net_device *netdev = adapter->netdev;
9f1fd0ef
HX		 1762 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
1763 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
43250ddd
JY		 1764 struct sk_buff *skb;
1765 struct atl1c_recv_ret_status *rrs;
1766 struct atl1c_buffer *buffer_info;
1767
1768 while (1) {
1769 if (*work_done >= work_to_do)
1770 break;
1771 rrs = ATL1C_RRD_DESC(rrd_ring, rrd_ring->next_to_clean);
1772 if (likely(RRS_RXD_IS_VALID(rrs->word3))) {
1773 rfd_num = (rrs->word0 >> RRS_RX_RFD_CNT_SHIFT) &
1774 RRS_RX_RFD_CNT_MASK;
37b76c69 1775 if (unlikely(rfd_num != 1))
43250ddd
JY		 1776 /* TODO support mul rfd*/
1777 if (netif_msg_rx_err(adapter))
1778 dev_warn(&pdev->dev,
1779 "Multi rfd not support yet!\n");
1780 goto rrs_checked;
1781 } else {
1782 break;
1783 }
1784rrs_checked:
1785 atl1c_clean_rrd(rrd_ring, rrs, rfd_num);
1786 if (rrs->word3 & (RRS_RX_ERR_SUM | RRS_802_3_LEN_ERR)) {
1787 atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
1788 if (netif_msg_rx_err(adapter))
1789 dev_warn(&pdev->dev,
1790 "wrong packet! rrs word3 is %x\n",
1791 rrs->word3);
1792 continue;
1793 }
1794
1795 length = le16_to_cpu((rrs->word3 >> RRS_PKT_SIZE_SHIFT) &
1796 RRS_PKT_SIZE_MASK);
1797 /* Good Receive */
1798 if (likely(rfd_num == 1)) {
1799 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
1800 RRS_RX_RFD_INDEX_MASK;
1801 buffer_info = &rfd_ring->buffer_info[rfd_index];
1802 pci_unmap_single(pdev, buffer_info->dma,
1803 buffer_info->length, PCI_DMA_FROMDEVICE);
1804 skb = buffer_info->skb;
1805 } else {
1806 /* TODO */
1807 if (netif_msg_rx_err(adapter))
1808 dev_warn(&pdev->dev,
1809 "Multi rfd not support yet!\n");
1810 break;
1811 }
1812 atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
1813 skb_put(skb, length - ETH_FCS_LEN);
1814 skb->protocol = eth_type_trans(skb, netdev);
43250ddd 1815 atl1c_rx_checksum(adapter, skb, rrs);
46facce9 1816 if (rrs->word3 & RRS_VLAN_INS) {
43250ddd
JY		 1817 u16 vlan;
1818
1819 AT_TAG_TO_VLAN(rrs->vlan_tag, vlan);
1820 vlan = le16_to_cpu(vlan);
46facce9
JP		 1821 __vlan_hwaccel_put_tag(skb, vlan);
1822 }
1823 netif_receive_skb(skb);
43250ddd 1824
43250ddd
JY		 1825 (*work_done)++;
1826 count++;
1827 }
1828 if (count)
9f1fd0ef 1829 atl1c_alloc_rx_buffer(adapter);
43250ddd
JY		 1830}
1831
1832/*
1833 * atl1c_clean - NAPI Rx polling callback
1834 * @adapter: board private structure
1835 */
1836static int atl1c_clean(struct napi_struct *napi, int budget)
1837{
1838 struct atl1c_adapter *adapter =
1839 container_of(napi, struct atl1c_adapter, napi);
1840 int work_done = 0;
1841
1842 /* Keep link state information with original netdev */
1843 if (!netif_carrier_ok(adapter->netdev))
1844 goto quit_polling;
1845 /* just enable one RXQ */
9f1fd0ef 1846 atl1c_clean_rx_irq(adapter, &work_done, budget);
43250ddd
JY		 1847
1848 if (work_done < budget) {
1849quit_polling:
1850 napi_complete(napi);
1851 adapter->hw.intr_mask |= ISR_RX_PKT;
1852 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
1853 }
1854 return work_done;
1855}
1856
1857#ifdef CONFIG_NET_POLL_CONTROLLER
1858
1859/*
1860 * Polling 'interrupt' - used by things like netconsole to send skbs
1861 * without having to re-enable interrupts. It's not called while
1862 * the interrupt routine is executing.
1863 */
1864static void atl1c_netpoll(struct net_device *netdev)
1865{
1866 struct atl1c_adapter *adapter = netdev_priv(netdev);
1867
1868 disable_irq(adapter->pdev->irq);
1869 atl1c_intr(adapter->pdev->irq, netdev);
1870 enable_irq(adapter->pdev->irq);
1871}
1872#endif
1873
1874static inline u16 atl1c_tpd_avail(struct atl1c_adapter *adapter, enum atl1c_trans_queue type)
1875{
1876 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
1877 u16 next_to_use = 0;
1878 u16 next_to_clean = 0;
1879
1880 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
1881 next_to_use = tpd_ring->next_to_use;
1882
1883 return (u16)(next_to_clean > next_to_use) ?
1884 (next_to_clean - next_to_use - 1) :
1885 (tpd_ring->count + next_to_clean - next_to_use - 1);
1886}
1887
1888/*
1889 * get next usable tpd
1890 * Note: should call atl1c_tdp_avail to make sure
1891 * there is enough tpd to use
1892 */
1893static struct atl1c_tpd_desc *atl1c_get_tpd(struct atl1c_adapter *adapter,
1894 enum atl1c_trans_queue type)
1895{
1896 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
1897 struct atl1c_tpd_desc *tpd_desc;
1898 u16 next_to_use = 0;
1899
1900 next_to_use = tpd_ring->next_to_use;
1901 if (++tpd_ring->next_to_use == tpd_ring->count)
1902 tpd_ring->next_to_use = 0;
1903 tpd_desc = ATL1C_TPD_DESC(tpd_ring, next_to_use);
1904 memset(tpd_desc, 0, sizeof(struct atl1c_tpd_desc));
1905 return tpd_desc;
1906}
1907
1908static struct atl1c_buffer *
1909atl1c_get_tx_buffer(struct atl1c_adapter *adapter, struct atl1c_tpd_desc *tpd)
1910{
1911 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
1912
1913 return &tpd_ring->buffer_info[tpd -
1914 (struct atl1c_tpd_desc *)tpd_ring->desc];
1915}
1916
1917/* Calculate the transmit packet descript needed*/
1918static u16 atl1c_cal_tpd_req(const struct sk_buff *skb)
1919{
1920 u16 tpd_req;
1921 u16 proto_hdr_len = 0;
1922
1923 tpd_req = skb_shinfo(skb)->nr_frags + 1;
1924
1925 if (skb_is_gso(skb)) {
1926 proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
1927 if (proto_hdr_len < skb_headlen(skb))
1928 tpd_req++;
1929 if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6)
1930 tpd_req++;
1931 }
1932 return tpd_req;
1933}
1934
1935static int atl1c_tso_csum(struct atl1c_adapter *adapter,
1936 struct sk_buff *skb,
1937 struct atl1c_tpd_desc **tpd,
1938 enum atl1c_trans_queue type)
1939{
1940 struct pci_dev *pdev = adapter->pdev;
1941 u8 hdr_len;
1942 u32 real_len;
1943 unsigned short offload_type;
1944 int err;
1945
1946 if (skb_is_gso(skb)) {
1947 if (skb_header_cloned(skb)) {
1948 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
1949 if (unlikely(err))
1950 return -1;
1951 }
1952 offload_type = skb_shinfo(skb)->gso_type;
1953
1954 if (offload_type & SKB_GSO_TCPV4) {
1955 real_len = (((unsigned char *)ip_hdr(skb) - skb->data)
1956 + ntohs(ip_hdr(skb)->tot_len));
1957
1958 if (real_len < skb->len)
1959 pskb_trim(skb, real_len);
1960
1961 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
1962 if (unlikely(skb->len == hdr_len)) {
1963 /* only xsum need */
1964 if (netif_msg_tx_queued(adapter))
1965 dev_warn(&pdev->dev,
1966 "IPV4 tso with zero data??\n");
1967 goto check_sum;
1968 } else {
1969 ip_hdr(skb)->check = 0;
1970 tcp_hdr(skb)->check = ~csum_tcpudp_magic(
1971 ip_hdr(skb)->saddr,
1972 ip_hdr(skb)->daddr,
1973 0, IPPROTO_TCP, 0);
1974 (*tpd)->word1 |= 1 << TPD_IPV4_PACKET_SHIFT;
1975 }
1976 }
1977
1978 if (offload_type & SKB_GSO_TCPV6) {
1979 struct atl1c_tpd_ext_desc *etpd =
1980 *(struct atl1c_tpd_ext_desc **)(tpd);
1981
1982 memset(etpd, 0, sizeof(struct atl1c_tpd_ext_desc));
1983 *tpd = atl1c_get_tpd(adapter, type);
1984 ipv6_hdr(skb)->payload_len = 0;
1985 /* check payload == 0 byte ? */
1986 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
1987 if (unlikely(skb->len == hdr_len)) {
1988 /* only xsum need */
1989 if (netif_msg_tx_queued(adapter))
1990 dev_warn(&pdev->dev,
1991 "IPV6 tso with zero data??\n");
1992 goto check_sum;
1993 } else
1994 tcp_hdr(skb)->check = ~csum_ipv6_magic(
1995 &ipv6_hdr(skb)->saddr,
1996 &ipv6_hdr(skb)->daddr,
1997 0, IPPROTO_TCP, 0);
1998 etpd->word1 |= 1 << TPD_LSO_EN_SHIFT;
1999 etpd->word1 |= 1 << TPD_LSO_VER_SHIFT;
2000 etpd->pkt_len = cpu_to_le32(skb->len);
2001 (*tpd)->word1 |= 1 << TPD_LSO_VER_SHIFT;
2002 }
2003
2004 (*tpd)->word1 |= 1 << TPD_LSO_EN_SHIFT;
2005 (*tpd)->word1 |= (skb_transport_offset(skb) & TPD_TCPHDR_OFFSET_MASK) <<
2006 TPD_TCPHDR_OFFSET_SHIFT;
2007 (*tpd)->word1 |= (skb_shinfo(skb)->gso_size & TPD_MSS_MASK) <<
2008 TPD_MSS_SHIFT;
2009 return 0;
2010 }
2011
2012check_sum:
2013 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2014 u8 css, cso;
0d0b1672 2015 cso = skb_checksum_start_offset(skb);
43250ddd
JY		 2016
2017 if (unlikely(cso & 0x1)) {
2018 if (netif_msg_tx_err(adapter))
2019 dev_err(&adapter->pdev->dev,
2020 "payload offset should not an event number\n");
2021 return -1;
2022 } else {
2023 css = cso + skb->csum_offset;
2024
2025 (*tpd)->word1 |= ((cso >> 1) & TPD_PLOADOFFSET_MASK) <<
2026 TPD_PLOADOFFSET_SHIFT;
2027 (*tpd)->word1 |= ((css >> 1) & TPD_CCSUM_OFFSET_MASK) <<
2028 TPD_CCSUM_OFFSET_SHIFT;
2029 (*tpd)->word1 |= 1 << TPD_CCSUM_EN_SHIFT;
2030 }
2031 }
2032 return 0;
2033}
2034
2035static void atl1c_tx_map(struct atl1c_adapter *adapter,
2036 struct sk_buff *skb, struct atl1c_tpd_desc *tpd,
2037 enum atl1c_trans_queue type)
2038{
2039 struct atl1c_tpd_desc *use_tpd = NULL;
2040 struct atl1c_buffer *buffer_info = NULL;
2041 u16 buf_len = skb_headlen(skb);
2042 u16 map_len = 0;
2043 u16 mapped_len = 0;
2044 u16 hdr_len = 0;
2045 u16 nr_frags;
2046 u16 f;
2047 int tso;
2048
2049 nr_frags = skb_shinfo(skb)->nr_frags;
2050 tso = (tpd->word1 >> TPD_LSO_EN_SHIFT) & TPD_LSO_EN_MASK;
2051 if (tso) {
2052 /* TSO */
2053 map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
2054 use_tpd = tpd;
2055
2056 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2057 buffer_info->length = map_len;
2058 buffer_info->dma = pci_map_single(adapter->pdev,
2059 skb->data, hdr_len, PCI_DMA_TODEVICE);
c6060be4 2060 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
4b45e342
JY		 2061 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
2062 ATL1C_PCIMAP_TODEVICE);
43250ddd
JY		 2063 mapped_len += map_len;
2064 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2065 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2066 }
2067
2068 if (mapped_len < buf_len) {
2069 /* mapped_len == 0, means we should use the first tpd,
2070 which is given by caller */
2071 if (mapped_len == 0)
2072 use_tpd = tpd;
2073 else {
2074 use_tpd = atl1c_get_tpd(adapter, type);
43250ddd
JY		 2075 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
2076 }
2077 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2078 buffer_info->length = buf_len - mapped_len;
2079 buffer_info->dma =
2080 pci_map_single(adapter->pdev, skb->data + mapped_len,
2081 buffer_info->length, PCI_DMA_TODEVICE);
c6060be4 2082 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
4b45e342
JY		 2083 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
2084 ATL1C_PCIMAP_TODEVICE);
43250ddd
JY		 2085 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2086 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2087 }
2088
2089 for (f = 0; f < nr_frags; f++) {
2090 struct skb_frag_struct *frag;
2091
2092 frag = &skb_shinfo(skb)->frags[f];
2093
2094 use_tpd = atl1c_get_tpd(adapter, type);
2095 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
2096
2097 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
9e903e08 2098 buffer_info->length = skb_frag_size(frag);
8d1bb865
IC		 2099 buffer_info->dma = skb_frag_dma_map(&adapter->pdev->dev,
2100 frag, 0,
2101 buffer_info->length,
5d6bcdfe 2102 DMA_TO_DEVICE);
c6060be4 2103 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
4b45e342
JY		 2104 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_PAGE,
2105 ATL1C_PCIMAP_TODEVICE);
43250ddd
JY		 2106 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2107 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2108 }
2109
2110 /* The last tpd */
2111 use_tpd->word1 |= 1 << TPD_EOP_SHIFT;
2112 /* The last buffer info contain the skb address,
2113 so it will be free after unmap */
2114 buffer_info->skb = skb;
2115}
2116
2117static void atl1c_tx_queue(struct atl1c_adapter *adapter, struct sk_buff *skb,
2118 struct atl1c_tpd_desc *tpd, enum atl1c_trans_queue type)
2119{
2120 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
2121 u32 prod_data;
2122
2123 AT_READ_REG(&adapter->hw, REG_MB_PRIO_PROD_IDX, &prod_data);
2124 switch (type) {
2125 case atl1c_trans_high:
2126 prod_data &= 0xFFFF0000;
2127 prod_data |= tpd_ring->next_to_use & 0xFFFF;
2128 break;
2129 case atl1c_trans_normal:
2130 prod_data &= 0x0000FFFF;
2131 prod_data |= (tpd_ring->next_to_use & 0xFFFF) << 16;
2132 break;
2133 default:
2134 break;
2135 }
2136 wmb();
2137 AT_WRITE_REG(&adapter->hw, REG_MB_PRIO_PROD_IDX, prod_data);
2138}
2139
61357325
SH		 2140static netdev_tx_t atl1c_xmit_frame(struct sk_buff *skb,
2141 struct net_device *netdev)
43250ddd
JY		 2142{
2143 struct atl1c_adapter *adapter = netdev_priv(netdev);
2144 unsigned long flags;
2145 u16 tpd_req = 1;
2146 struct atl1c_tpd_desc *tpd;
2147 enum atl1c_trans_queue type = atl1c_trans_normal;
2148
2149 if (test_bit(__AT_DOWN, &adapter->flags)) {
2150 dev_kfree_skb_any(skb);
2151 return NETDEV_TX_OK;
2152 }
2153
2154 tpd_req = atl1c_cal_tpd_req(skb);
2155 if (!spin_trylock_irqsave(&adapter->tx_lock, flags)) {
2156 if (netif_msg_pktdata(adapter))
2157 dev_info(&adapter->pdev->dev, "tx locked\n");
2158 return NETDEV_TX_LOCKED;
2159 }
43250ddd
JY		 2160
2161 if (atl1c_tpd_avail(adapter, type) < tpd_req) {
2162 /* no enough descriptor, just stop queue */
2163 netif_stop_queue(netdev);
2164 spin_unlock_irqrestore(&adapter->tx_lock, flags);
2165 return NETDEV_TX_BUSY;
2166 }
2167
2168 tpd = atl1c_get_tpd(adapter, type);
2169
2170 /* do TSO and check sum */
2171 if (atl1c_tso_csum(adapter, skb, &tpd, type) != 0) {
2172 spin_unlock_irqrestore(&adapter->tx_lock, flags);
2173 dev_kfree_skb_any(skb);
2174 return NETDEV_TX_OK;
2175 }
2176
eab6d18d 2177 if (unlikely(vlan_tx_tag_present(skb))) {
43250ddd
JY		 2178 u16 vlan = vlan_tx_tag_get(skb);
2179 __le16 tag;
2180
2181 vlan = cpu_to_le16(vlan);
2182 AT_VLAN_TO_TAG(vlan, tag);
2183 tpd->word1 |= 1 << TPD_INS_VTAG_SHIFT;
2184 tpd->vlan_tag = tag;
2185 }
2186
2187 if (skb_network_offset(skb) != ETH_HLEN)
2188 tpd->word1 |= 1 << TPD_ETH_TYPE_SHIFT; /* Ethernet frame */
2189
2190 atl1c_tx_map(adapter, skb, tpd, type);
2191 atl1c_tx_queue(adapter, skb, tpd, type);
2192
43250ddd
JY		 2193 spin_unlock_irqrestore(&adapter->tx_lock, flags);
2194 return NETDEV_TX_OK;
2195}
2196
2197static void atl1c_free_irq(struct atl1c_adapter *adapter)
2198{
2199 struct net_device *netdev = adapter->netdev;
2200
2201 free_irq(adapter->pdev->irq, netdev);
2202
2203 if (adapter->have_msi)
2204 pci_disable_msi(adapter->pdev);
2205}
2206
2207static int atl1c_request_irq(struct atl1c_adapter *adapter)
2208{
2209 struct pci_dev *pdev = adapter->pdev;
2210 struct net_device *netdev = adapter->netdev;
2211 int flags = 0;
2212 int err = 0;
2213
2214 adapter->have_msi = true;
2215 err = pci_enable_msi(adapter->pdev);
2216 if (err) {
2217 if (netif_msg_ifup(adapter))
2218 dev_err(&pdev->dev,
2219 "Unable to allocate MSI interrupt Error: %d\n",
2220 err);
2221 adapter->have_msi = false;
93f7fab4 2222 }
43250ddd
JY		 2223
2224 if (!adapter->have_msi)
2225 flags |= IRQF_SHARED;
9aff7e92 2226 err = request_irq(adapter->pdev->irq, atl1c_intr, flags,
43250ddd
JY		 2227 netdev->name, netdev);
2228 if (err) {
2229 if (netif_msg_ifup(adapter))
2230 dev_err(&pdev->dev,
2231 "Unable to allocate interrupt Error: %d\n",
2232 err);
2233 if (adapter->have_msi)
2234 pci_disable_msi(adapter->pdev);
2235 return err;
2236 }
2237 if (netif_msg_ifup(adapter))
2238 dev_dbg(&pdev->dev, "atl1c_request_irq OK\n");
2239 return err;
2240}
2241
0fb1e54e 2242static int atl1c_up(struct atl1c_adapter *adapter)
43250ddd
JY		 2243{
2244 struct net_device *netdev = adapter->netdev;
2245 int num;
2246 int err;
43250ddd
JY		 2247
2248 netif_carrier_off(netdev);
2249 atl1c_init_ring_ptrs(adapter);
2250 atl1c_set_multi(netdev);
2251 atl1c_restore_vlan(adapter);
2252
9f1fd0ef
HX		 2253 num = atl1c_alloc_rx_buffer(adapter);
2254 if (unlikely(num == 0)) {
2255 err = -ENOMEM;
2256 goto err_alloc_rx;
43250ddd
JY		 2257 }
2258
2259 if (atl1c_configure(adapter)) {
2260 err = -EIO;
2261 goto err_up;
2262 }
2263
2264 err = atl1c_request_irq(adapter);
2265 if (unlikely(err))
2266 goto err_up;
2267
2268 clear_bit(__AT_DOWN, &adapter->flags);
2269 napi_enable(&adapter->napi);
2270 atl1c_irq_enable(adapter);
2271 atl1c_check_link_status(adapter);
2272 netif_start_queue(netdev);
2273 return err;
2274
2275err_up:
2276err_alloc_rx:
2277 atl1c_clean_rx_ring(adapter);
2278 return err;
2279}
2280
0fb1e54e 2281static void atl1c_down(struct atl1c_adapter *adapter)
43250ddd
JY		 2282{
2283 struct net_device *netdev = adapter->netdev;
2284
2285 atl1c_del_timer(adapter);
cb190546 2286 adapter->work_event = 0; /* clear all event */
43250ddd
JY		 2287 /* signal that we're down so the interrupt handler does not
2288 * reschedule our watchdog timer */
2289 set_bit(__AT_DOWN, &adapter->flags);
2290 netif_carrier_off(netdev);
2291 napi_disable(&adapter->napi);
2292 atl1c_irq_disable(adapter);
2293 atl1c_free_irq(adapter);
43250ddd
JY		 2294 /* reset MAC to disable all RX/TX */
2295 atl1c_reset_mac(&adapter->hw);
2296 msleep(1);
2297
2298 adapter->link_speed = SPEED_0;
2299 adapter->link_duplex = -1;
2300 atl1c_clean_tx_ring(adapter, atl1c_trans_normal);
2301 atl1c_clean_tx_ring(adapter, atl1c_trans_high);
2302 atl1c_clean_rx_ring(adapter);
2303}
2304
2305/*
2306 * atl1c_open - Called when a network interface is made active
2307 * @netdev: network interface device structure
2308 *
2309 * Returns 0 on success, negative value on failure
2310 *
2311 * The open entry point is called when a network interface is made
2312 * active by the system (IFF_UP). At this point all resources needed
2313 * for transmit and receive operations are allocated, the interrupt
2314 * handler is registered with the OS, the watchdog timer is started,
2315 * and the stack is notified that the interface is ready.
2316 */
2317static int atl1c_open(struct net_device *netdev)
2318{
2319 struct atl1c_adapter *adapter = netdev_priv(netdev);
2320 int err;
2321
2322 /* disallow open during test */
2323 if (test_bit(__AT_TESTING, &adapter->flags))
2324 return -EBUSY;
2325
2326 /* allocate rx/tx dma buffer & descriptors */
2327 err = atl1c_setup_ring_resources(adapter);
2328 if (unlikely(err))
2329 return err;
2330
2331 err = atl1c_up(adapter);
2332 if (unlikely(err))
2333 goto err_up;
2334
2335 if (adapter->hw.ctrl_flags & ATL1C_FPGA_VERSION) {
2336 u32 phy_data;
2337
2338 AT_READ_REG(&adapter->hw, REG_MDIO_CTRL, &phy_data);
2339 phy_data |= MDIO_AP_EN;
2340 AT_WRITE_REG(&adapter->hw, REG_MDIO_CTRL, phy_data);
2341 }
2342 return 0;
2343
2344err_up:
2345 atl1c_free_irq(adapter);
2346 atl1c_free_ring_resources(adapter);
2347 atl1c_reset_mac(&adapter->hw);
2348 return err;
2349}
2350
2351/*
2352 * atl1c_close - Disables a network interface
2353 * @netdev: network interface device structure
2354 *
2355 * Returns 0, this is not allowed to fail
2356 *
2357 * The close entry point is called when an interface is de-activated
2358 * by the OS. The hardware is still under the drivers control, but
2359 * needs to be disabled. A global MAC reset is issued to stop the
2360 * hardware, and all transmit and receive resources are freed.
2361 */
2362static int atl1c_close(struct net_device *netdev)
2363{
2364 struct atl1c_adapter *adapter = netdev_priv(netdev);
2365
2366 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2367 atl1c_down(adapter);
2368 atl1c_free_ring_resources(adapter);
2369 return 0;
2370}
2371
762e3023 2372static int atl1c_suspend(struct device *dev)
43250ddd 2373{
762e3023 2374 struct pci_dev *pdev = to_pci_dev(dev);
43250ddd
JY		 2375 struct net_device *netdev = pci_get_drvdata(pdev);
2376 struct atl1c_adapter *adapter = netdev_priv(netdev);
2377 struct atl1c_hw *hw = &adapter->hw;
8f574b35
JY		 2378 u32 mac_ctrl_data = 0;
2379 u32 master_ctrl_data = 0;
55865c66 2380 u32 wol_ctrl_data = 0;
8f574b35 2381 u16 mii_intr_status_data = 0;
43250ddd 2382 u32 wufc = adapter->wol;
43250ddd 2383
8f574b35 2384 atl1c_disable_l0s_l1(hw);
43250ddd
JY		 2385 if (netif_running(netdev)) {
2386 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2387 atl1c_down(adapter);
2388 }
2389 netif_device_detach(netdev);
8f574b35
JY		 2390
2391 if (wufc)
2392 if (atl1c_phy_power_saving(hw) != 0)
2393 dev_dbg(&pdev->dev, "phy power saving failed");
2394
2395 AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data);
2396 AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data);
2397
2398 master_ctrl_data &= ~MASTER_CTRL_CLK_SEL_DIS;
2399 mac_ctrl_data &= ~(MAC_CTRL_PRMLEN_MASK << MAC_CTRL_PRMLEN_SHIFT);
2400 mac_ctrl_data |= (((u32)adapter->hw.preamble_len &
2401 MAC_CTRL_PRMLEN_MASK) <<
2402 MAC_CTRL_PRMLEN_SHIFT);
2403 mac_ctrl_data &= ~(MAC_CTRL_SPEED_MASK << MAC_CTRL_SPEED_SHIFT);
2404 mac_ctrl_data &= ~MAC_CTRL_DUPLX;
2405
43250ddd 2406 if (wufc) {
8f574b35
JY		 2407 mac_ctrl_data |= MAC_CTRL_RX_EN;
2408 if (adapter->link_speed == SPEED_1000 ||
2409 adapter->link_speed == SPEED_0) {
2410 mac_ctrl_data |= atl1c_mac_speed_1000 <<
2411 MAC_CTRL_SPEED_SHIFT;
2412 mac_ctrl_data |= MAC_CTRL_DUPLX;
2413 } else
2414 mac_ctrl_data |= atl1c_mac_speed_10_100 <<
2415 MAC_CTRL_SPEED_SHIFT;
2416
2417 if (adapter->link_duplex == DUPLEX_FULL)
2418 mac_ctrl_data |= MAC_CTRL_DUPLX;
2419
43250ddd
JY		 2420 /* turn on magic packet wol */
2421 if (wufc & AT_WUFC_MAG)
8f574b35 2422 wol_ctrl_data |= WOL_MAGIC_EN | WOL_MAGIC_PME_EN;
43250ddd
JY		 2423
2424 if (wufc & AT_WUFC_LNKC) {
43250ddd
JY		 2425 wol_ctrl_data |= WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN;
2426 /* only link up can wake up */
2427 if (atl1c_write_phy_reg(hw, MII_IER, IER_LINK_UP) != 0) {
8f574b35
JY		 2428 dev_dbg(&pdev->dev, "%s: read write phy "
2429 "register failed.\n",
2430 atl1c_driver_name);
43250ddd
JY		 2431 }
2432 }
2433 /* clear phy interrupt */
2434 atl1c_read_phy_reg(hw, MII_ISR, &mii_intr_status_data);
2435 /* Config MAC Ctrl register */
46facce9 2436 __atl1c_vlan_mode(netdev->features, &mac_ctrl_data);
43250ddd
JY		 2437
2438 /* magic packet maybe Broadcast&multicast&Unicast frame */
2439 if (wufc & AT_WUFC_MAG)
2440 mac_ctrl_data |= MAC_CTRL_BC_EN;
2441
8f574b35
JY		 2442 dev_dbg(&pdev->dev,
2443 "%s: suspend MAC=0x%x\n",
2444 atl1c_driver_name, mac_ctrl_data);
43250ddd
JY		 2445 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
2446 AT_WRITE_REG(hw, REG_WOL_CTRL, wol_ctrl_data);
2447 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
2448
8f574b35
JY		 2449 AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_DEFAULT |
2450 GPHY_CTRL_EXT_RESET);
8f574b35
JY		 2451 } else {
2452 AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_POWER_SAVING);
2453 master_ctrl_data |= MASTER_CTRL_CLK_SEL_DIS;
2454 mac_ctrl_data |= atl1c_mac_speed_10_100 << MAC_CTRL_SPEED_SHIFT;
2455 mac_ctrl_data |= MAC_CTRL_DUPLX;
2456 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
2457 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
2458 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
2459 hw->phy_configured = false; /* re-init PHY when resume */
43250ddd 2460 }
43250ddd 2461
43250ddd
JY		 2462 return 0;
2463}
2464
d187c1aa 2465#ifdef CONFIG_PM_SLEEP
762e3023 2466static int atl1c_resume(struct device *dev)
43250ddd 2467{
762e3023 2468 struct pci_dev *pdev = to_pci_dev(dev);
43250ddd
JY		 2469 struct net_device *netdev = pci_get_drvdata(pdev);
2470 struct atl1c_adapter *adapter = netdev_priv(netdev);
2471
43250ddd 2472 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
8f574b35
JY		 2473 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE |
2474 ATL1C_PCIE_PHY_RESET);
43250ddd
JY		 2475
2476 atl1c_phy_reset(&adapter->hw);
2477 atl1c_reset_mac(&adapter->hw);
8f574b35
JY		 2478 atl1c_phy_init(&adapter->hw);
2479
2480#if 0
2481 AT_READ_REG(&adapter->hw, REG_PM_CTRLSTAT, &pm_data);
2482 pm_data &= ~PM_CTRLSTAT_PME_EN;
2483 AT_WRITE_REG(&adapter->hw, REG_PM_CTRLSTAT, pm_data);
2484#endif
2485
43250ddd
JY		 2486 netif_device_attach(netdev);
2487 if (netif_running(netdev))
2488 atl1c_up(adapter);
2489
2490 return 0;
2491}
d187c1aa 2492#endif
43250ddd
JY		 2493
2494static void atl1c_shutdown(struct pci_dev *pdev)
2495{
762e3023
RW		 2496 struct net_device *netdev = pci_get_drvdata(pdev);
2497 struct atl1c_adapter *adapter = netdev_priv(netdev);
2498
2499 atl1c_suspend(&pdev->dev);
2500 pci_wake_from_d3(pdev, adapter->wol);
2501 pci_set_power_state(pdev, PCI_D3hot);
43250ddd
JY		 2502}
2503
2504static const struct net_device_ops atl1c_netdev_ops = {
2505 .ndo_open = atl1c_open,
2506 .ndo_stop = atl1c_close,
2507 .ndo_validate_addr = eth_validate_addr,
2508 .ndo_start_xmit = atl1c_xmit_frame,
46facce9 2509 .ndo_set_mac_address = atl1c_set_mac_addr,
afc4b13d 2510 .ndo_set_rx_mode = atl1c_set_multi,
43250ddd 2511 .ndo_change_mtu = atl1c_change_mtu,
782d640a 2512 .ndo_fix_features = atl1c_fix_features,
46facce9 2513 .ndo_set_features = atl1c_set_features,
43250ddd
JY		 2514 .ndo_do_ioctl = atl1c_ioctl,
2515 .ndo_tx_timeout = atl1c_tx_timeout,
2516 .ndo_get_stats = atl1c_get_stats,
43250ddd
JY		 2517#ifdef CONFIG_NET_POLL_CONTROLLER
2518 .ndo_poll_controller = atl1c_netpoll,
2519#endif
2520};
2521
2522static int atl1c_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
2523{
2524 SET_NETDEV_DEV(netdev, &pdev->dev);
2525 pci_set_drvdata(pdev, netdev);
2526
43250ddd
JY		 2527 netdev->netdev_ops = &atl1c_netdev_ops;
2528 netdev->watchdog_timeo = AT_TX_WATCHDOG;
2529 atl1c_set_ethtool_ops(netdev);
2530
2531 /* TODO: add when ready */
782d640a 2532 netdev->hw_features = NETIF_F_SG |
43250ddd 2533 NETIF_F_HW_CSUM |
46facce9 2534 NETIF_F_HW_VLAN_RX |
43250ddd
JY		 2535 NETIF_F_TSO |
2536 NETIF_F_TSO6;
782d640a 2537 netdev->features = netdev->hw_features |
46facce9 2538 NETIF_F_HW_VLAN_TX;
43250ddd
JY		 2539 return 0;
2540}
2541
2542/*
2543 * atl1c_probe - Device Initialization Routine
2544 * @pdev: PCI device information struct
2545 * @ent: entry in atl1c_pci_tbl
2546 *
2547 * Returns 0 on success, negative on failure
2548 *
2549 * atl1c_probe initializes an adapter identified by a pci_dev structure.
2550 * The OS initialization, configuring of the adapter private structure,
2551 * and a hardware reset occur.
2552 */
2553static int __devinit atl1c_probe(struct pci_dev *pdev,
2554 const struct pci_device_id *ent)
2555{
2556 struct net_device *netdev;
2557 struct atl1c_adapter *adapter;
2558 static int cards_found;
2559
2560 int err = 0;
2561
2562 /* enable device (incl. PCI PM wakeup and hotplug setup) */
2563 err = pci_enable_device_mem(pdev);
2564 if (err) {
2565 dev_err(&pdev->dev, "cannot enable PCI device\n");
2566 return err;
2567 }
2568
2569 /*
2570 * The atl1c chip can DMA to 64-bit addresses, but it uses a single
2571 * shared register for the high 32 bits, so only a single, aligned,
2572 * 4 GB physical address range can be used at a time.
2573 *
2574 * Supporting 64-bit DMA on this hardware is more trouble than it's
2575 * worth. It is far easier to limit to 32-bit DMA than update
2576 * various kernel subsystems to support the mechanics required by a
2577 * fixed-high-32-bit system.
2578 */
e930438c
YH		 2579 if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) ||
2580 (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) {
43250ddd
JY		 2581 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n");
2582 goto err_dma;
2583 }
2584
2585 err = pci_request_regions(pdev, atl1c_driver_name);
2586 if (err) {
2587 dev_err(&pdev->dev, "cannot obtain PCI resources\n");
2588 goto err_pci_reg;
2589 }
2590
2591 pci_set_master(pdev);
2592
2593 netdev = alloc_etherdev(sizeof(struct atl1c_adapter));
2594 if (netdev == NULL) {
2595 err = -ENOMEM;
43250ddd
JY		 2596 goto err_alloc_etherdev;
2597 }
2598
2599 err = atl1c_init_netdev(netdev, pdev);
2600 if (err) {
2601 dev_err(&pdev->dev, "init netdevice failed\n");
2602 goto err_init_netdev;
2603 }
2604 adapter = netdev_priv(netdev);
2605 adapter->bd_number = cards_found;
2606 adapter->netdev = netdev;
2607 adapter->pdev = pdev;
2608 adapter->hw.adapter = adapter;
2609 adapter->msg_enable = netif_msg_init(-1, atl1c_default_msg);
2610 adapter->hw.hw_addr = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
2611 if (!adapter->hw.hw_addr) {
2612 err = -EIO;
2613 dev_err(&pdev->dev, "cannot map device registers\n");
2614 goto err_ioremap;
2615 }
43250ddd
JY		 2616
2617 /* init mii data */
2618 adapter->mii.dev = netdev;
2619 adapter->mii.mdio_read = atl1c_mdio_read;
2620 adapter->mii.mdio_write = atl1c_mdio_write;
2621 adapter->mii.phy_id_mask = 0x1f;
2622 adapter->mii.reg_num_mask = MDIO_REG_ADDR_MASK;
2623 netif_napi_add(netdev, &adapter->napi, atl1c_clean, 64);
2624 setup_timer(&adapter->phy_config_timer, atl1c_phy_config,
2625 (unsigned long)adapter);
2626 /* setup the private structure */
2627 err = atl1c_sw_init(adapter);
2628 if (err) {
2629 dev_err(&pdev->dev, "net device private data init failed\n");
2630 goto err_sw_init;
2631 }
2632 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE |
2633 ATL1C_PCIE_PHY_RESET);
2634
2635 /* Init GPHY as early as possible due to power saving issue */
2636 atl1c_phy_reset(&adapter->hw);
2637
2638 err = atl1c_reset_mac(&adapter->hw);
2639 if (err) {
2640 err = -EIO;
2641 goto err_reset;
2642 }
2643
43250ddd
JY		 2644 /* reset the controller to
2645 * put the device in a known good starting state */
2646 err = atl1c_phy_init(&adapter->hw);
2647 if (err) {
2648 err = -EIO;
2649 goto err_reset;
2650 }
6a214fd4
DK		 2651 if (atl1c_read_mac_addr(&adapter->hw)) {
2652 /* got a random MAC address, set NET_ADDR_RANDOM to netdev */
2653 netdev->addr_assign_type |= NET_ADDR_RANDOM;
43250ddd
JY		 2654 }
2655 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
2656 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
2657 if (netif_msg_probe(adapter))
82991172 2658 dev_dbg(&pdev->dev, "mac address : %pM\n",
2659 adapter->hw.mac_addr);
43250ddd
JY		 2660
2661 atl1c_hw_set_mac_addr(&adapter->hw);
cb190546
JY		 2662 INIT_WORK(&adapter->common_task, atl1c_common_task);
2663 adapter->work_event = 0;
43250ddd
JY		 2664 err = register_netdev(netdev);
2665 if (err) {
2666 dev_err(&pdev->dev, "register netdevice failed\n");
2667 goto err_register;
2668 }
2669
2670 if (netif_msg_probe(adapter))
2671 dev_info(&pdev->dev, "version %s\n", ATL1C_DRV_VERSION);
2672 cards_found++;
2673 return 0;
2674
2675err_reset:
2676err_register:
2677err_sw_init:
43250ddd
JY		 2678 iounmap(adapter->hw.hw_addr);
2679err_init_netdev:
2680err_ioremap:
2681 free_netdev(netdev);
2682err_alloc_etherdev:
2683 pci_release_regions(pdev);
2684err_pci_reg:
2685err_dma:
2686 pci_disable_device(pdev);
2687 return err;
2688}
2689
2690/*
2691 * atl1c_remove - Device Removal Routine
2692 * @pdev: PCI device information struct
2693 *
2694 * atl1c_remove is called by the PCI subsystem to alert the driver
2695 * that it should release a PCI device. The could be caused by a
2696 * Hot-Plug event, or because the driver is going to be removed from
2697 * memory.
2698 */
2699static void __devexit atl1c_remove(struct pci_dev *pdev)
2700{
2701 struct net_device *netdev = pci_get_drvdata(pdev);
2702 struct atl1c_adapter *adapter = netdev_priv(netdev);
2703
2704 unregister_netdev(netdev);
2705 atl1c_phy_disable(&adapter->hw);
2706
2707 iounmap(adapter->hw.hw_addr);
2708
2709 pci_release_regions(pdev);
2710 pci_disable_device(pdev);
2711 free_netdev(netdev);
2712}
2713
2714/*
2715 * atl1c_io_error_detected - called when PCI error is detected
2716 * @pdev: Pointer to PCI device
2717 * @state: The current pci connection state
2718 *
2719 * This function is called after a PCI bus error affecting
2720 * this device has been detected.
2721 */
2722static pci_ers_result_t atl1c_io_error_detected(struct pci_dev *pdev,
2723 pci_channel_state_t state)
2724{
2725 struct net_device *netdev = pci_get_drvdata(pdev);
2726 struct atl1c_adapter *adapter = netdev_priv(netdev);
2727
2728 netif_device_detach(netdev);
2729
005fb4f0
DN		 2730 if (state == pci_channel_io_perm_failure)
2731 return PCI_ERS_RESULT_DISCONNECT;
2732
43250ddd
JY		 2733 if (netif_running(netdev))
2734 atl1c_down(adapter);
2735
2736 pci_disable_device(pdev);
2737
2738 /* Request a slot slot reset. */
2739 return PCI_ERS_RESULT_NEED_RESET;
2740}
2741
2742/*
2743 * atl1c_io_slot_reset - called after the pci bus has been reset.
2744 * @pdev: Pointer to PCI device
2745 *
2746 * Restart the card from scratch, as if from a cold-boot. Implementation
2747 * resembles the first-half of the e1000_resume routine.
2748 */
2749static pci_ers_result_t atl1c_io_slot_reset(struct pci_dev *pdev)
2750{
2751 struct net_device *netdev = pci_get_drvdata(pdev);
2752 struct atl1c_adapter *adapter = netdev_priv(netdev);
2753
2754 if (pci_enable_device(pdev)) {
2755 if (netif_msg_hw(adapter))
2756 dev_err(&pdev->dev,
2757 "Cannot re-enable PCI device after reset\n");
2758 return PCI_ERS_RESULT_DISCONNECT;
2759 }
2760 pci_set_master(pdev);
2761
2762 pci_enable_wake(pdev, PCI_D3hot, 0);
2763 pci_enable_wake(pdev, PCI_D3cold, 0);
2764
2765 atl1c_reset_mac(&adapter->hw);
2766
2767 return PCI_ERS_RESULT_RECOVERED;
2768}
2769
2770/*
2771 * atl1c_io_resume - called when traffic can start flowing again.
2772 * @pdev: Pointer to PCI device
2773 *
2774 * This callback is called when the error recovery driver tells us that
2775 * its OK to resume normal operation. Implementation resembles the
2776 * second-half of the atl1c_resume routine.
2777 */
2778static void atl1c_io_resume(struct pci_dev *pdev)
2779{
2780 struct net_device *netdev = pci_get_drvdata(pdev);
2781 struct atl1c_adapter *adapter = netdev_priv(netdev);
2782
2783 if (netif_running(netdev)) {
2784 if (atl1c_up(adapter)) {
2785 if (netif_msg_hw(adapter))
2786 dev_err(&pdev->dev,
2787 "Cannot bring device back up after reset\n");
2788 return;
2789 }
2790 }
2791
2792 netif_device_attach(netdev);
2793}
2794
2795static struct pci_error_handlers atl1c_err_handler = {
2796 .error_detected = atl1c_io_error_detected,
2797 .slot_reset = atl1c_io_slot_reset,
2798 .resume = atl1c_io_resume,
2799};
2800
762e3023
RW		 2801static SIMPLE_DEV_PM_OPS(atl1c_pm_ops, atl1c_suspend, atl1c_resume);
2802
43250ddd
JY		 2803static struct pci_driver atl1c_driver = {
2804 .name = atl1c_driver_name,
2805 .id_table = atl1c_pci_tbl,
2806 .probe = atl1c_probe,
2807 .remove = __devexit_p(atl1c_remove),
43250ddd 2808 .shutdown = atl1c_shutdown,
762e3023
RW		 2809 .err_handler = &atl1c_err_handler,
2810 .driver.pm = &atl1c_pm_ops,
43250ddd
JY		 2811};
2812
2813/*
2814 * atl1c_init_module - Driver Registration Routine
2815 *
2816 * atl1c_init_module is the first routine called when the driver is
2817 * loaded. All it does is register with the PCI subsystem.
2818 */
2819static int __init atl1c_init_module(void)
2820{
2821 return pci_register_driver(&atl1c_driver);
2822}
2823
2824/*
2825 * atl1c_exit_module - Driver Exit Cleanup Routine
2826 *
2827 * atl1c_exit_module is called just before the driver is removed
2828 * from memory.
2829 */
2830static void __exit atl1c_exit_module(void)
2831{
2832 pci_unregister_driver(&atl1c_driver);
2833}
2834
2835module_init(atl1c_init_module);
2836module_exit(atl1c_exit_module);
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