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Commit | Line | Data |
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c0c050c5 MC |
1 | /* Broadcom NetXtreme-C/E network driver. |
2 | * | |
11f15ed3 | 3 | * Copyright (c) 2014-2016 Broadcom Corporation |
8e202366 | 4 | * Copyright (c) 2016-2017 Broadcom Limited |
c0c050c5 MC |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation. | |
9 | */ | |
10 | ||
3ebf6f0a | 11 | #include <linux/ctype.h> |
8ddc9aaa | 12 | #include <linux/stringify.h> |
c0c050c5 MC |
13 | #include <linux/ethtool.h> |
14 | #include <linux/interrupt.h> | |
15 | #include <linux/pci.h> | |
16 | #include <linux/etherdevice.h> | |
17 | #include <linux/crc32.h> | |
18 | #include <linux/firmware.h> | |
19 | #include "bnxt_hsi.h" | |
20 | #include "bnxt.h" | |
f7dc1ea6 | 21 | #include "bnxt_xdp.h" |
c0c050c5 MC |
22 | #include "bnxt_ethtool.h" |
23 | #include "bnxt_nvm_defs.h" /* NVRAM content constant and structure defs */ | |
24 | #include "bnxt_fw_hdr.h" /* Firmware hdr constant and structure defs */ | |
25 | #define FLASH_NVRAM_TIMEOUT ((HWRM_CMD_TIMEOUT) * 100) | |
5ac67d8b RS |
26 | #define FLASH_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200) |
27 | #define INSTALL_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200) | |
c0c050c5 | 28 | |
3ebf6f0a RS |
29 | static char *bnxt_get_pkgver(struct net_device *dev, char *buf, size_t buflen); |
30 | ||
c0c050c5 MC |
31 | static u32 bnxt_get_msglevel(struct net_device *dev) |
32 | { | |
33 | struct bnxt *bp = netdev_priv(dev); | |
34 | ||
35 | return bp->msg_enable; | |
36 | } | |
37 | ||
38 | static void bnxt_set_msglevel(struct net_device *dev, u32 value) | |
39 | { | |
40 | struct bnxt *bp = netdev_priv(dev); | |
41 | ||
42 | bp->msg_enable = value; | |
43 | } | |
44 | ||
45 | static int bnxt_get_coalesce(struct net_device *dev, | |
46 | struct ethtool_coalesce *coal) | |
47 | { | |
48 | struct bnxt *bp = netdev_priv(dev); | |
49 | ||
50 | memset(coal, 0, sizeof(*coal)); | |
51 | ||
dfb5b894 MC |
52 | coal->rx_coalesce_usecs = bp->rx_coal_ticks; |
53 | /* 2 completion records per rx packet */ | |
54 | coal->rx_max_coalesced_frames = bp->rx_coal_bufs / 2; | |
55 | coal->rx_coalesce_usecs_irq = bp->rx_coal_ticks_irq; | |
56 | coal->rx_max_coalesced_frames_irq = bp->rx_coal_bufs_irq / 2; | |
c0c050c5 | 57 | |
dfc9c94a MC |
58 | coal->tx_coalesce_usecs = bp->tx_coal_ticks; |
59 | coal->tx_max_coalesced_frames = bp->tx_coal_bufs; | |
60 | coal->tx_coalesce_usecs_irq = bp->tx_coal_ticks_irq; | |
61 | coal->tx_max_coalesced_frames_irq = bp->tx_coal_bufs_irq; | |
62 | ||
51f30785 MC |
63 | coal->stats_block_coalesce_usecs = bp->stats_coal_ticks; |
64 | ||
c0c050c5 MC |
65 | return 0; |
66 | } | |
67 | ||
68 | static int bnxt_set_coalesce(struct net_device *dev, | |
69 | struct ethtool_coalesce *coal) | |
70 | { | |
71 | struct bnxt *bp = netdev_priv(dev); | |
51f30785 | 72 | bool update_stats = false; |
c0c050c5 MC |
73 | int rc = 0; |
74 | ||
dfb5b894 MC |
75 | bp->rx_coal_ticks = coal->rx_coalesce_usecs; |
76 | /* 2 completion records per rx packet */ | |
77 | bp->rx_coal_bufs = coal->rx_max_coalesced_frames * 2; | |
78 | bp->rx_coal_ticks_irq = coal->rx_coalesce_usecs_irq; | |
79 | bp->rx_coal_bufs_irq = coal->rx_max_coalesced_frames_irq * 2; | |
c0c050c5 | 80 | |
dfc9c94a MC |
81 | bp->tx_coal_ticks = coal->tx_coalesce_usecs; |
82 | bp->tx_coal_bufs = coal->tx_max_coalesced_frames; | |
83 | bp->tx_coal_ticks_irq = coal->tx_coalesce_usecs_irq; | |
84 | bp->tx_coal_bufs_irq = coal->tx_max_coalesced_frames_irq; | |
85 | ||
51f30785 MC |
86 | if (bp->stats_coal_ticks != coal->stats_block_coalesce_usecs) { |
87 | u32 stats_ticks = coal->stats_block_coalesce_usecs; | |
88 | ||
adcc331e MC |
89 | /* Allow 0, which means disable. */ |
90 | if (stats_ticks) | |
91 | stats_ticks = clamp_t(u32, stats_ticks, | |
92 | BNXT_MIN_STATS_COAL_TICKS, | |
93 | BNXT_MAX_STATS_COAL_TICKS); | |
51f30785 MC |
94 | stats_ticks = rounddown(stats_ticks, BNXT_MIN_STATS_COAL_TICKS); |
95 | bp->stats_coal_ticks = stats_ticks; | |
96 | update_stats = true; | |
97 | } | |
98 | ||
99 | if (netif_running(dev)) { | |
100 | if (update_stats) { | |
101 | rc = bnxt_close_nic(bp, true, false); | |
102 | if (!rc) | |
103 | rc = bnxt_open_nic(bp, true, false); | |
104 | } else { | |
105 | rc = bnxt_hwrm_set_coal(bp); | |
106 | } | |
107 | } | |
c0c050c5 MC |
108 | |
109 | return rc; | |
110 | } | |
111 | ||
112 | #define BNXT_NUM_STATS 21 | |
113 | ||
8ddc9aaa MC |
114 | #define BNXT_RX_STATS_ENTRY(counter) \ |
115 | { BNXT_RX_STATS_OFFSET(counter), __stringify(counter) } | |
116 | ||
8ddc9aaa MC |
117 | #define BNXT_TX_STATS_ENTRY(counter) \ |
118 | { BNXT_TX_STATS_OFFSET(counter), __stringify(counter) } | |
119 | ||
120 | static const struct { | |
121 | long offset; | |
122 | char string[ETH_GSTRING_LEN]; | |
123 | } bnxt_port_stats_arr[] = { | |
124 | BNXT_RX_STATS_ENTRY(rx_64b_frames), | |
125 | BNXT_RX_STATS_ENTRY(rx_65b_127b_frames), | |
126 | BNXT_RX_STATS_ENTRY(rx_128b_255b_frames), | |
127 | BNXT_RX_STATS_ENTRY(rx_256b_511b_frames), | |
128 | BNXT_RX_STATS_ENTRY(rx_512b_1023b_frames), | |
129 | BNXT_RX_STATS_ENTRY(rx_1024b_1518_frames), | |
130 | BNXT_RX_STATS_ENTRY(rx_good_vlan_frames), | |
131 | BNXT_RX_STATS_ENTRY(rx_1519b_2047b_frames), | |
132 | BNXT_RX_STATS_ENTRY(rx_2048b_4095b_frames), | |
133 | BNXT_RX_STATS_ENTRY(rx_4096b_9216b_frames), | |
134 | BNXT_RX_STATS_ENTRY(rx_9217b_16383b_frames), | |
135 | BNXT_RX_STATS_ENTRY(rx_total_frames), | |
136 | BNXT_RX_STATS_ENTRY(rx_ucast_frames), | |
137 | BNXT_RX_STATS_ENTRY(rx_mcast_frames), | |
138 | BNXT_RX_STATS_ENTRY(rx_bcast_frames), | |
139 | BNXT_RX_STATS_ENTRY(rx_fcs_err_frames), | |
140 | BNXT_RX_STATS_ENTRY(rx_ctrl_frames), | |
141 | BNXT_RX_STATS_ENTRY(rx_pause_frames), | |
142 | BNXT_RX_STATS_ENTRY(rx_pfc_frames), | |
143 | BNXT_RX_STATS_ENTRY(rx_align_err_frames), | |
144 | BNXT_RX_STATS_ENTRY(rx_ovrsz_frames), | |
145 | BNXT_RX_STATS_ENTRY(rx_jbr_frames), | |
146 | BNXT_RX_STATS_ENTRY(rx_mtu_err_frames), | |
147 | BNXT_RX_STATS_ENTRY(rx_tagged_frames), | |
148 | BNXT_RX_STATS_ENTRY(rx_double_tagged_frames), | |
149 | BNXT_RX_STATS_ENTRY(rx_good_frames), | |
c77192f2 MC |
150 | BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri0), |
151 | BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri1), | |
152 | BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri2), | |
153 | BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri3), | |
154 | BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri4), | |
155 | BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri5), | |
156 | BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri6), | |
157 | BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri7), | |
8ddc9aaa MC |
158 | BNXT_RX_STATS_ENTRY(rx_undrsz_frames), |
159 | BNXT_RX_STATS_ENTRY(rx_eee_lpi_events), | |
160 | BNXT_RX_STATS_ENTRY(rx_eee_lpi_duration), | |
161 | BNXT_RX_STATS_ENTRY(rx_bytes), | |
162 | BNXT_RX_STATS_ENTRY(rx_runt_bytes), | |
163 | BNXT_RX_STATS_ENTRY(rx_runt_frames), | |
164 | ||
165 | BNXT_TX_STATS_ENTRY(tx_64b_frames), | |
166 | BNXT_TX_STATS_ENTRY(tx_65b_127b_frames), | |
167 | BNXT_TX_STATS_ENTRY(tx_128b_255b_frames), | |
168 | BNXT_TX_STATS_ENTRY(tx_256b_511b_frames), | |
169 | BNXT_TX_STATS_ENTRY(tx_512b_1023b_frames), | |
170 | BNXT_TX_STATS_ENTRY(tx_1024b_1518_frames), | |
171 | BNXT_TX_STATS_ENTRY(tx_good_vlan_frames), | |
172 | BNXT_TX_STATS_ENTRY(tx_1519b_2047_frames), | |
173 | BNXT_TX_STATS_ENTRY(tx_2048b_4095b_frames), | |
174 | BNXT_TX_STATS_ENTRY(tx_4096b_9216b_frames), | |
175 | BNXT_TX_STATS_ENTRY(tx_9217b_16383b_frames), | |
176 | BNXT_TX_STATS_ENTRY(tx_good_frames), | |
177 | BNXT_TX_STATS_ENTRY(tx_total_frames), | |
178 | BNXT_TX_STATS_ENTRY(tx_ucast_frames), | |
179 | BNXT_TX_STATS_ENTRY(tx_mcast_frames), | |
180 | BNXT_TX_STATS_ENTRY(tx_bcast_frames), | |
181 | BNXT_TX_STATS_ENTRY(tx_pause_frames), | |
182 | BNXT_TX_STATS_ENTRY(tx_pfc_frames), | |
183 | BNXT_TX_STATS_ENTRY(tx_jabber_frames), | |
184 | BNXT_TX_STATS_ENTRY(tx_fcs_err_frames), | |
185 | BNXT_TX_STATS_ENTRY(tx_err), | |
186 | BNXT_TX_STATS_ENTRY(tx_fifo_underruns), | |
c77192f2 MC |
187 | BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri0), |
188 | BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri1), | |
189 | BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri2), | |
190 | BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri3), | |
191 | BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri4), | |
192 | BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri5), | |
193 | BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri6), | |
194 | BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri7), | |
8ddc9aaa MC |
195 | BNXT_TX_STATS_ENTRY(tx_eee_lpi_events), |
196 | BNXT_TX_STATS_ENTRY(tx_eee_lpi_duration), | |
197 | BNXT_TX_STATS_ENTRY(tx_total_collisions), | |
198 | BNXT_TX_STATS_ENTRY(tx_bytes), | |
199 | }; | |
200 | ||
201 | #define BNXT_NUM_PORT_STATS ARRAY_SIZE(bnxt_port_stats_arr) | |
202 | ||
5c8227d0 MC |
203 | static int bnxt_get_num_stats(struct bnxt *bp) |
204 | { | |
205 | int num_stats = BNXT_NUM_STATS * bp->cp_nr_rings; | |
206 | ||
207 | if (bp->flags & BNXT_FLAG_PORT_STATS) | |
208 | num_stats += BNXT_NUM_PORT_STATS; | |
209 | ||
210 | return num_stats; | |
211 | } | |
212 | ||
c0c050c5 MC |
213 | static int bnxt_get_sset_count(struct net_device *dev, int sset) |
214 | { | |
215 | struct bnxt *bp = netdev_priv(dev); | |
216 | ||
217 | switch (sset) { | |
5c8227d0 MC |
218 | case ETH_SS_STATS: |
219 | return bnxt_get_num_stats(bp); | |
eb513658 MC |
220 | case ETH_SS_TEST: |
221 | if (!bp->num_tests) | |
222 | return -EOPNOTSUPP; | |
223 | return bp->num_tests; | |
c0c050c5 MC |
224 | default: |
225 | return -EOPNOTSUPP; | |
226 | } | |
227 | } | |
228 | ||
229 | static void bnxt_get_ethtool_stats(struct net_device *dev, | |
230 | struct ethtool_stats *stats, u64 *buf) | |
231 | { | |
232 | u32 i, j = 0; | |
233 | struct bnxt *bp = netdev_priv(dev); | |
c0c050c5 MC |
234 | u32 stat_fields = sizeof(struct ctx_hw_stats) / 8; |
235 | ||
c0c050c5 MC |
236 | if (!bp->bnapi) |
237 | return; | |
238 | ||
239 | for (i = 0; i < bp->cp_nr_rings; i++) { | |
240 | struct bnxt_napi *bnapi = bp->bnapi[i]; | |
241 | struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; | |
242 | __le64 *hw_stats = (__le64 *)cpr->hw_stats; | |
243 | int k; | |
244 | ||
245 | for (k = 0; k < stat_fields; j++, k++) | |
246 | buf[j] = le64_to_cpu(hw_stats[k]); | |
247 | buf[j++] = cpr->rx_l4_csum_errors; | |
248 | } | |
8ddc9aaa MC |
249 | if (bp->flags & BNXT_FLAG_PORT_STATS) { |
250 | __le64 *port_stats = (__le64 *)bp->hw_rx_port_stats; | |
251 | ||
252 | for (i = 0; i < BNXT_NUM_PORT_STATS; i++, j++) { | |
253 | buf[j] = le64_to_cpu(*(port_stats + | |
254 | bnxt_port_stats_arr[i].offset)); | |
255 | } | |
256 | } | |
c0c050c5 MC |
257 | } |
258 | ||
259 | static void bnxt_get_strings(struct net_device *dev, u32 stringset, u8 *buf) | |
260 | { | |
261 | struct bnxt *bp = netdev_priv(dev); | |
262 | u32 i; | |
263 | ||
264 | switch (stringset) { | |
265 | /* The number of strings must match BNXT_NUM_STATS defined above. */ | |
266 | case ETH_SS_STATS: | |
267 | for (i = 0; i < bp->cp_nr_rings; i++) { | |
268 | sprintf(buf, "[%d]: rx_ucast_packets", i); | |
269 | buf += ETH_GSTRING_LEN; | |
270 | sprintf(buf, "[%d]: rx_mcast_packets", i); | |
271 | buf += ETH_GSTRING_LEN; | |
272 | sprintf(buf, "[%d]: rx_bcast_packets", i); | |
273 | buf += ETH_GSTRING_LEN; | |
274 | sprintf(buf, "[%d]: rx_discards", i); | |
275 | buf += ETH_GSTRING_LEN; | |
276 | sprintf(buf, "[%d]: rx_drops", i); | |
277 | buf += ETH_GSTRING_LEN; | |
278 | sprintf(buf, "[%d]: rx_ucast_bytes", i); | |
279 | buf += ETH_GSTRING_LEN; | |
280 | sprintf(buf, "[%d]: rx_mcast_bytes", i); | |
281 | buf += ETH_GSTRING_LEN; | |
282 | sprintf(buf, "[%d]: rx_bcast_bytes", i); | |
283 | buf += ETH_GSTRING_LEN; | |
284 | sprintf(buf, "[%d]: tx_ucast_packets", i); | |
285 | buf += ETH_GSTRING_LEN; | |
286 | sprintf(buf, "[%d]: tx_mcast_packets", i); | |
287 | buf += ETH_GSTRING_LEN; | |
288 | sprintf(buf, "[%d]: tx_bcast_packets", i); | |
289 | buf += ETH_GSTRING_LEN; | |
290 | sprintf(buf, "[%d]: tx_discards", i); | |
291 | buf += ETH_GSTRING_LEN; | |
292 | sprintf(buf, "[%d]: tx_drops", i); | |
293 | buf += ETH_GSTRING_LEN; | |
294 | sprintf(buf, "[%d]: tx_ucast_bytes", i); | |
295 | buf += ETH_GSTRING_LEN; | |
296 | sprintf(buf, "[%d]: tx_mcast_bytes", i); | |
297 | buf += ETH_GSTRING_LEN; | |
298 | sprintf(buf, "[%d]: tx_bcast_bytes", i); | |
299 | buf += ETH_GSTRING_LEN; | |
300 | sprintf(buf, "[%d]: tpa_packets", i); | |
301 | buf += ETH_GSTRING_LEN; | |
302 | sprintf(buf, "[%d]: tpa_bytes", i); | |
303 | buf += ETH_GSTRING_LEN; | |
304 | sprintf(buf, "[%d]: tpa_events", i); | |
305 | buf += ETH_GSTRING_LEN; | |
306 | sprintf(buf, "[%d]: tpa_aborts", i); | |
307 | buf += ETH_GSTRING_LEN; | |
308 | sprintf(buf, "[%d]: rx_l4_csum_errors", i); | |
309 | buf += ETH_GSTRING_LEN; | |
310 | } | |
8ddc9aaa MC |
311 | if (bp->flags & BNXT_FLAG_PORT_STATS) { |
312 | for (i = 0; i < BNXT_NUM_PORT_STATS; i++) { | |
313 | strcpy(buf, bnxt_port_stats_arr[i].string); | |
314 | buf += ETH_GSTRING_LEN; | |
315 | } | |
316 | } | |
c0c050c5 | 317 | break; |
eb513658 MC |
318 | case ETH_SS_TEST: |
319 | if (bp->num_tests) | |
320 | memcpy(buf, bp->test_info->string, | |
321 | bp->num_tests * ETH_GSTRING_LEN); | |
322 | break; | |
c0c050c5 MC |
323 | default: |
324 | netdev_err(bp->dev, "bnxt_get_strings invalid request %x\n", | |
325 | stringset); | |
326 | break; | |
327 | } | |
328 | } | |
329 | ||
330 | static void bnxt_get_ringparam(struct net_device *dev, | |
331 | struct ethtool_ringparam *ering) | |
332 | { | |
333 | struct bnxt *bp = netdev_priv(dev); | |
334 | ||
335 | ering->rx_max_pending = BNXT_MAX_RX_DESC_CNT; | |
336 | ering->rx_jumbo_max_pending = BNXT_MAX_RX_JUM_DESC_CNT; | |
337 | ering->tx_max_pending = BNXT_MAX_TX_DESC_CNT; | |
338 | ||
339 | ering->rx_pending = bp->rx_ring_size; | |
340 | ering->rx_jumbo_pending = bp->rx_agg_ring_size; | |
341 | ering->tx_pending = bp->tx_ring_size; | |
342 | } | |
343 | ||
344 | static int bnxt_set_ringparam(struct net_device *dev, | |
345 | struct ethtool_ringparam *ering) | |
346 | { | |
347 | struct bnxt *bp = netdev_priv(dev); | |
348 | ||
349 | if ((ering->rx_pending > BNXT_MAX_RX_DESC_CNT) || | |
350 | (ering->tx_pending > BNXT_MAX_TX_DESC_CNT) || | |
351 | (ering->tx_pending <= MAX_SKB_FRAGS)) | |
352 | return -EINVAL; | |
353 | ||
354 | if (netif_running(dev)) | |
355 | bnxt_close_nic(bp, false, false); | |
356 | ||
357 | bp->rx_ring_size = ering->rx_pending; | |
358 | bp->tx_ring_size = ering->tx_pending; | |
359 | bnxt_set_ring_params(bp); | |
360 | ||
361 | if (netif_running(dev)) | |
362 | return bnxt_open_nic(bp, false, false); | |
363 | ||
364 | return 0; | |
365 | } | |
366 | ||
367 | static void bnxt_get_channels(struct net_device *dev, | |
368 | struct ethtool_channels *channel) | |
369 | { | |
370 | struct bnxt *bp = netdev_priv(dev); | |
371 | int max_rx_rings, max_tx_rings, tcs; | |
372 | ||
6e6c5a57 | 373 | bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, true); |
a79a5276 | 374 | channel->max_combined = min_t(int, max_rx_rings, max_tx_rings); |
068c9ec6 | 375 | |
18d6e4e2 SB |
376 | if (bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, false)) { |
377 | max_rx_rings = 0; | |
378 | max_tx_rings = 0; | |
379 | } | |
380 | ||
c0c050c5 MC |
381 | tcs = netdev_get_num_tc(dev); |
382 | if (tcs > 1) | |
383 | max_tx_rings /= tcs; | |
384 | ||
385 | channel->max_rx = max_rx_rings; | |
386 | channel->max_tx = max_tx_rings; | |
387 | channel->max_other = 0; | |
068c9ec6 MC |
388 | if (bp->flags & BNXT_FLAG_SHARED_RINGS) { |
389 | channel->combined_count = bp->rx_nr_rings; | |
76595193 PS |
390 | if (BNXT_CHIP_TYPE_NITRO_A0(bp)) |
391 | channel->combined_count--; | |
068c9ec6 | 392 | } else { |
76595193 PS |
393 | if (!BNXT_CHIP_TYPE_NITRO_A0(bp)) { |
394 | channel->rx_count = bp->rx_nr_rings; | |
395 | channel->tx_count = bp->tx_nr_rings_per_tc; | |
396 | } | |
068c9ec6 | 397 | } |
c0c050c5 MC |
398 | } |
399 | ||
400 | static int bnxt_set_channels(struct net_device *dev, | |
401 | struct ethtool_channels *channel) | |
402 | { | |
403 | struct bnxt *bp = netdev_priv(dev); | |
d1e7925e | 404 | int req_tx_rings, req_rx_rings, tcs; |
068c9ec6 | 405 | bool sh = false; |
5f449249 | 406 | int tx_xdp = 0; |
d1e7925e | 407 | int rc = 0; |
c0c050c5 | 408 | |
068c9ec6 | 409 | if (channel->other_count) |
c0c050c5 MC |
410 | return -EINVAL; |
411 | ||
068c9ec6 MC |
412 | if (!channel->combined_count && |
413 | (!channel->rx_count || !channel->tx_count)) | |
414 | return -EINVAL; | |
415 | ||
416 | if (channel->combined_count && | |
417 | (channel->rx_count || channel->tx_count)) | |
418 | return -EINVAL; | |
419 | ||
76595193 PS |
420 | if (BNXT_CHIP_TYPE_NITRO_A0(bp) && (channel->rx_count || |
421 | channel->tx_count)) | |
422 | return -EINVAL; | |
423 | ||
068c9ec6 MC |
424 | if (channel->combined_count) |
425 | sh = true; | |
426 | ||
c0c050c5 | 427 | tcs = netdev_get_num_tc(dev); |
c0c050c5 | 428 | |
391be5c2 | 429 | req_tx_rings = sh ? channel->combined_count : channel->tx_count; |
d1e7925e | 430 | req_rx_rings = sh ? channel->combined_count : channel->rx_count; |
5f449249 MC |
431 | if (bp->tx_nr_rings_xdp) { |
432 | if (!sh) { | |
433 | netdev_err(dev, "Only combined mode supported when XDP is enabled.\n"); | |
434 | return -EINVAL; | |
435 | } | |
436 | tx_xdp = req_rx_rings; | |
437 | } | |
98fdbe73 | 438 | rc = bnxt_check_rings(bp, req_tx_rings, req_rx_rings, sh, tcs, tx_xdp); |
d1e7925e MC |
439 | if (rc) { |
440 | netdev_warn(dev, "Unable to allocate the requested rings\n"); | |
441 | return rc; | |
391be5c2 MC |
442 | } |
443 | ||
c0c050c5 MC |
444 | if (netif_running(dev)) { |
445 | if (BNXT_PF(bp)) { | |
446 | /* TODO CHIMP_FW: Send message to all VF's | |
447 | * before PF unload | |
448 | */ | |
449 | } | |
450 | rc = bnxt_close_nic(bp, true, false); | |
451 | if (rc) { | |
452 | netdev_err(bp->dev, "Set channel failure rc :%x\n", | |
453 | rc); | |
454 | return rc; | |
455 | } | |
456 | } | |
457 | ||
068c9ec6 MC |
458 | if (sh) { |
459 | bp->flags |= BNXT_FLAG_SHARED_RINGS; | |
d1e7925e MC |
460 | bp->rx_nr_rings = channel->combined_count; |
461 | bp->tx_nr_rings_per_tc = channel->combined_count; | |
068c9ec6 MC |
462 | } else { |
463 | bp->flags &= ~BNXT_FLAG_SHARED_RINGS; | |
464 | bp->rx_nr_rings = channel->rx_count; | |
465 | bp->tx_nr_rings_per_tc = channel->tx_count; | |
466 | } | |
5f449249 MC |
467 | bp->tx_nr_rings_xdp = tx_xdp; |
468 | bp->tx_nr_rings = bp->tx_nr_rings_per_tc + tx_xdp; | |
c0c050c5 | 469 | if (tcs > 1) |
5f449249 | 470 | bp->tx_nr_rings = bp->tx_nr_rings_per_tc * tcs + tx_xdp; |
068c9ec6 MC |
471 | |
472 | bp->cp_nr_rings = sh ? max_t(int, bp->tx_nr_rings, bp->rx_nr_rings) : | |
473 | bp->tx_nr_rings + bp->rx_nr_rings; | |
474 | ||
c0c050c5 MC |
475 | bp->num_stat_ctxs = bp->cp_nr_rings; |
476 | ||
2bcfa6f6 MC |
477 | /* After changing number of rx channels, update NTUPLE feature. */ |
478 | netdev_update_features(dev); | |
c0c050c5 MC |
479 | if (netif_running(dev)) { |
480 | rc = bnxt_open_nic(bp, true, false); | |
481 | if ((!rc) && BNXT_PF(bp)) { | |
482 | /* TODO CHIMP_FW: Send message to all VF's | |
483 | * to renable | |
484 | */ | |
485 | } | |
486 | } | |
487 | ||
488 | return rc; | |
489 | } | |
490 | ||
491 | #ifdef CONFIG_RFS_ACCEL | |
492 | static int bnxt_grxclsrlall(struct bnxt *bp, struct ethtool_rxnfc *cmd, | |
493 | u32 *rule_locs) | |
494 | { | |
495 | int i, j = 0; | |
496 | ||
497 | cmd->data = bp->ntp_fltr_count; | |
498 | for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) { | |
499 | struct hlist_head *head; | |
500 | struct bnxt_ntuple_filter *fltr; | |
501 | ||
502 | head = &bp->ntp_fltr_hash_tbl[i]; | |
503 | rcu_read_lock(); | |
504 | hlist_for_each_entry_rcu(fltr, head, hash) { | |
505 | if (j == cmd->rule_cnt) | |
506 | break; | |
507 | rule_locs[j++] = fltr->sw_id; | |
508 | } | |
509 | rcu_read_unlock(); | |
510 | if (j == cmd->rule_cnt) | |
511 | break; | |
512 | } | |
513 | cmd->rule_cnt = j; | |
514 | return 0; | |
515 | } | |
516 | ||
517 | static int bnxt_grxclsrule(struct bnxt *bp, struct ethtool_rxnfc *cmd) | |
518 | { | |
519 | struct ethtool_rx_flow_spec *fs = | |
520 | (struct ethtool_rx_flow_spec *)&cmd->fs; | |
521 | struct bnxt_ntuple_filter *fltr; | |
522 | struct flow_keys *fkeys; | |
523 | int i, rc = -EINVAL; | |
524 | ||
b721cfaf | 525 | if (fs->location >= BNXT_NTP_FLTR_MAX_FLTR) |
c0c050c5 MC |
526 | return rc; |
527 | ||
528 | for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) { | |
529 | struct hlist_head *head; | |
530 | ||
531 | head = &bp->ntp_fltr_hash_tbl[i]; | |
532 | rcu_read_lock(); | |
533 | hlist_for_each_entry_rcu(fltr, head, hash) { | |
534 | if (fltr->sw_id == fs->location) | |
535 | goto fltr_found; | |
536 | } | |
537 | rcu_read_unlock(); | |
538 | } | |
539 | return rc; | |
540 | ||
541 | fltr_found: | |
542 | fkeys = &fltr->fkeys; | |
dda0e746 MC |
543 | if (fkeys->basic.n_proto == htons(ETH_P_IP)) { |
544 | if (fkeys->basic.ip_proto == IPPROTO_TCP) | |
545 | fs->flow_type = TCP_V4_FLOW; | |
546 | else if (fkeys->basic.ip_proto == IPPROTO_UDP) | |
547 | fs->flow_type = UDP_V4_FLOW; | |
548 | else | |
549 | goto fltr_err; | |
c0c050c5 | 550 | |
dda0e746 MC |
551 | fs->h_u.tcp_ip4_spec.ip4src = fkeys->addrs.v4addrs.src; |
552 | fs->m_u.tcp_ip4_spec.ip4src = cpu_to_be32(~0); | |
c0c050c5 | 553 | |
dda0e746 MC |
554 | fs->h_u.tcp_ip4_spec.ip4dst = fkeys->addrs.v4addrs.dst; |
555 | fs->m_u.tcp_ip4_spec.ip4dst = cpu_to_be32(~0); | |
c0c050c5 | 556 | |
dda0e746 MC |
557 | fs->h_u.tcp_ip4_spec.psrc = fkeys->ports.src; |
558 | fs->m_u.tcp_ip4_spec.psrc = cpu_to_be16(~0); | |
c0c050c5 | 559 | |
dda0e746 MC |
560 | fs->h_u.tcp_ip4_spec.pdst = fkeys->ports.dst; |
561 | fs->m_u.tcp_ip4_spec.pdst = cpu_to_be16(~0); | |
562 | } else { | |
563 | int i; | |
564 | ||
565 | if (fkeys->basic.ip_proto == IPPROTO_TCP) | |
566 | fs->flow_type = TCP_V6_FLOW; | |
567 | else if (fkeys->basic.ip_proto == IPPROTO_UDP) | |
568 | fs->flow_type = UDP_V6_FLOW; | |
569 | else | |
570 | goto fltr_err; | |
571 | ||
572 | *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6src[0] = | |
573 | fkeys->addrs.v6addrs.src; | |
574 | *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6dst[0] = | |
575 | fkeys->addrs.v6addrs.dst; | |
576 | for (i = 0; i < 4; i++) { | |
577 | fs->m_u.tcp_ip6_spec.ip6src[i] = cpu_to_be32(~0); | |
578 | fs->m_u.tcp_ip6_spec.ip6dst[i] = cpu_to_be32(~0); | |
579 | } | |
580 | fs->h_u.tcp_ip6_spec.psrc = fkeys->ports.src; | |
581 | fs->m_u.tcp_ip6_spec.psrc = cpu_to_be16(~0); | |
582 | ||
583 | fs->h_u.tcp_ip6_spec.pdst = fkeys->ports.dst; | |
584 | fs->m_u.tcp_ip6_spec.pdst = cpu_to_be16(~0); | |
585 | } | |
c0c050c5 MC |
586 | |
587 | fs->ring_cookie = fltr->rxq; | |
588 | rc = 0; | |
589 | ||
590 | fltr_err: | |
591 | rcu_read_unlock(); | |
592 | ||
593 | return rc; | |
594 | } | |
a011952a MC |
595 | #endif |
596 | ||
597 | static u64 get_ethtool_ipv4_rss(struct bnxt *bp) | |
598 | { | |
599 | if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4) | |
600 | return RXH_IP_SRC | RXH_IP_DST; | |
601 | return 0; | |
602 | } | |
603 | ||
604 | static u64 get_ethtool_ipv6_rss(struct bnxt *bp) | |
605 | { | |
606 | if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6) | |
607 | return RXH_IP_SRC | RXH_IP_DST; | |
608 | return 0; | |
609 | } | |
610 | ||
611 | static int bnxt_grxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd) | |
612 | { | |
613 | cmd->data = 0; | |
614 | switch (cmd->flow_type) { | |
615 | case TCP_V4_FLOW: | |
616 | if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4) | |
617 | cmd->data |= RXH_IP_SRC | RXH_IP_DST | | |
618 | RXH_L4_B_0_1 | RXH_L4_B_2_3; | |
619 | cmd->data |= get_ethtool_ipv4_rss(bp); | |
620 | break; | |
621 | case UDP_V4_FLOW: | |
622 | if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4) | |
623 | cmd->data |= RXH_IP_SRC | RXH_IP_DST | | |
624 | RXH_L4_B_0_1 | RXH_L4_B_2_3; | |
625 | /* fall through */ | |
626 | case SCTP_V4_FLOW: | |
627 | case AH_ESP_V4_FLOW: | |
628 | case AH_V4_FLOW: | |
629 | case ESP_V4_FLOW: | |
630 | case IPV4_FLOW: | |
631 | cmd->data |= get_ethtool_ipv4_rss(bp); | |
632 | break; | |
633 | ||
634 | case TCP_V6_FLOW: | |
635 | if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6) | |
636 | cmd->data |= RXH_IP_SRC | RXH_IP_DST | | |
637 | RXH_L4_B_0_1 | RXH_L4_B_2_3; | |
638 | cmd->data |= get_ethtool_ipv6_rss(bp); | |
639 | break; | |
640 | case UDP_V6_FLOW: | |
641 | if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6) | |
642 | cmd->data |= RXH_IP_SRC | RXH_IP_DST | | |
643 | RXH_L4_B_0_1 | RXH_L4_B_2_3; | |
644 | /* fall through */ | |
645 | case SCTP_V6_FLOW: | |
646 | case AH_ESP_V6_FLOW: | |
647 | case AH_V6_FLOW: | |
648 | case ESP_V6_FLOW: | |
649 | case IPV6_FLOW: | |
650 | cmd->data |= get_ethtool_ipv6_rss(bp); | |
651 | break; | |
652 | } | |
653 | return 0; | |
654 | } | |
655 | ||
656 | #define RXH_4TUPLE (RXH_IP_SRC | RXH_IP_DST | RXH_L4_B_0_1 | RXH_L4_B_2_3) | |
657 | #define RXH_2TUPLE (RXH_IP_SRC | RXH_IP_DST) | |
658 | ||
659 | static int bnxt_srxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd) | |
660 | { | |
661 | u32 rss_hash_cfg = bp->rss_hash_cfg; | |
662 | int tuple, rc = 0; | |
663 | ||
664 | if (cmd->data == RXH_4TUPLE) | |
665 | tuple = 4; | |
666 | else if (cmd->data == RXH_2TUPLE) | |
667 | tuple = 2; | |
668 | else if (!cmd->data) | |
669 | tuple = 0; | |
670 | else | |
671 | return -EINVAL; | |
672 | ||
673 | if (cmd->flow_type == TCP_V4_FLOW) { | |
674 | rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4; | |
675 | if (tuple == 4) | |
676 | rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4; | |
677 | } else if (cmd->flow_type == UDP_V4_FLOW) { | |
678 | if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP)) | |
679 | return -EINVAL; | |
680 | rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4; | |
681 | if (tuple == 4) | |
682 | rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4; | |
683 | } else if (cmd->flow_type == TCP_V6_FLOW) { | |
684 | rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6; | |
685 | if (tuple == 4) | |
686 | rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6; | |
687 | } else if (cmd->flow_type == UDP_V6_FLOW) { | |
688 | if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP)) | |
689 | return -EINVAL; | |
690 | rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6; | |
691 | if (tuple == 4) | |
692 | rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6; | |
693 | } else if (tuple == 4) { | |
694 | return -EINVAL; | |
695 | } | |
696 | ||
697 | switch (cmd->flow_type) { | |
698 | case TCP_V4_FLOW: | |
699 | case UDP_V4_FLOW: | |
700 | case SCTP_V4_FLOW: | |
701 | case AH_ESP_V4_FLOW: | |
702 | case AH_V4_FLOW: | |
703 | case ESP_V4_FLOW: | |
704 | case IPV4_FLOW: | |
705 | if (tuple == 2) | |
706 | rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4; | |
707 | else if (!tuple) | |
708 | rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4; | |
709 | break; | |
710 | ||
711 | case TCP_V6_FLOW: | |
712 | case UDP_V6_FLOW: | |
713 | case SCTP_V6_FLOW: | |
714 | case AH_ESP_V6_FLOW: | |
715 | case AH_V6_FLOW: | |
716 | case ESP_V6_FLOW: | |
717 | case IPV6_FLOW: | |
718 | if (tuple == 2) | |
719 | rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6; | |
720 | else if (!tuple) | |
721 | rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6; | |
722 | break; | |
723 | } | |
724 | ||
725 | if (bp->rss_hash_cfg == rss_hash_cfg) | |
726 | return 0; | |
727 | ||
728 | bp->rss_hash_cfg = rss_hash_cfg; | |
729 | if (netif_running(bp->dev)) { | |
730 | bnxt_close_nic(bp, false, false); | |
731 | rc = bnxt_open_nic(bp, false, false); | |
732 | } | |
733 | return rc; | |
734 | } | |
c0c050c5 MC |
735 | |
736 | static int bnxt_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd, | |
737 | u32 *rule_locs) | |
738 | { | |
739 | struct bnxt *bp = netdev_priv(dev); | |
740 | int rc = 0; | |
741 | ||
742 | switch (cmd->cmd) { | |
a011952a | 743 | #ifdef CONFIG_RFS_ACCEL |
c0c050c5 MC |
744 | case ETHTOOL_GRXRINGS: |
745 | cmd->data = bp->rx_nr_rings; | |
746 | break; | |
747 | ||
748 | case ETHTOOL_GRXCLSRLCNT: | |
749 | cmd->rule_cnt = bp->ntp_fltr_count; | |
750 | cmd->data = BNXT_NTP_FLTR_MAX_FLTR; | |
751 | break; | |
752 | ||
753 | case ETHTOOL_GRXCLSRLALL: | |
754 | rc = bnxt_grxclsrlall(bp, cmd, (u32 *)rule_locs); | |
755 | break; | |
756 | ||
757 | case ETHTOOL_GRXCLSRULE: | |
758 | rc = bnxt_grxclsrule(bp, cmd); | |
759 | break; | |
a011952a MC |
760 | #endif |
761 | ||
762 | case ETHTOOL_GRXFH: | |
763 | rc = bnxt_grxfh(bp, cmd); | |
764 | break; | |
c0c050c5 MC |
765 | |
766 | default: | |
767 | rc = -EOPNOTSUPP; | |
768 | break; | |
769 | } | |
770 | ||
771 | return rc; | |
772 | } | |
a011952a MC |
773 | |
774 | static int bnxt_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd) | |
775 | { | |
776 | struct bnxt *bp = netdev_priv(dev); | |
777 | int rc; | |
778 | ||
779 | switch (cmd->cmd) { | |
780 | case ETHTOOL_SRXFH: | |
781 | rc = bnxt_srxfh(bp, cmd); | |
782 | break; | |
783 | ||
784 | default: | |
785 | rc = -EOPNOTSUPP; | |
786 | break; | |
787 | } | |
788 | return rc; | |
789 | } | |
c0c050c5 MC |
790 | |
791 | static u32 bnxt_get_rxfh_indir_size(struct net_device *dev) | |
792 | { | |
793 | return HW_HASH_INDEX_SIZE; | |
794 | } | |
795 | ||
796 | static u32 bnxt_get_rxfh_key_size(struct net_device *dev) | |
797 | { | |
798 | return HW_HASH_KEY_SIZE; | |
799 | } | |
800 | ||
801 | static int bnxt_get_rxfh(struct net_device *dev, u32 *indir, u8 *key, | |
802 | u8 *hfunc) | |
803 | { | |
804 | struct bnxt *bp = netdev_priv(dev); | |
805 | struct bnxt_vnic_info *vnic = &bp->vnic_info[0]; | |
806 | int i = 0; | |
807 | ||
808 | if (hfunc) | |
809 | *hfunc = ETH_RSS_HASH_TOP; | |
810 | ||
811 | if (indir) | |
812 | for (i = 0; i < HW_HASH_INDEX_SIZE; i++) | |
813 | indir[i] = le16_to_cpu(vnic->rss_table[i]); | |
814 | ||
815 | if (key) | |
816 | memcpy(key, vnic->rss_hash_key, HW_HASH_KEY_SIZE); | |
817 | ||
818 | return 0; | |
819 | } | |
820 | ||
821 | static void bnxt_get_drvinfo(struct net_device *dev, | |
822 | struct ethtool_drvinfo *info) | |
823 | { | |
824 | struct bnxt *bp = netdev_priv(dev); | |
3ebf6f0a RS |
825 | char *pkglog; |
826 | char *pkgver = NULL; | |
c0c050c5 | 827 | |
3ebf6f0a RS |
828 | pkglog = kmalloc(BNX_PKG_LOG_MAX_LENGTH, GFP_KERNEL); |
829 | if (pkglog) | |
830 | pkgver = bnxt_get_pkgver(dev, pkglog, BNX_PKG_LOG_MAX_LENGTH); | |
c0c050c5 MC |
831 | strlcpy(info->driver, DRV_MODULE_NAME, sizeof(info->driver)); |
832 | strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version)); | |
3ebf6f0a RS |
833 | if (pkgver && *pkgver != 0 && isdigit(*pkgver)) |
834 | snprintf(info->fw_version, sizeof(info->fw_version) - 1, | |
835 | "%s pkg %s", bp->fw_ver_str, pkgver); | |
836 | else | |
837 | strlcpy(info->fw_version, bp->fw_ver_str, | |
838 | sizeof(info->fw_version)); | |
c0c050c5 | 839 | strlcpy(info->bus_info, pci_name(bp->pdev), sizeof(info->bus_info)); |
5c8227d0 | 840 | info->n_stats = bnxt_get_num_stats(bp); |
eb513658 | 841 | info->testinfo_len = bp->num_tests; |
c0c050c5 MC |
842 | /* TODO CHIMP_FW: eeprom dump details */ |
843 | info->eedump_len = 0; | |
844 | /* TODO CHIMP FW: reg dump details */ | |
845 | info->regdump_len = 0; | |
3ebf6f0a | 846 | kfree(pkglog); |
c0c050c5 MC |
847 | } |
848 | ||
8e202366 MC |
849 | static void bnxt_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) |
850 | { | |
851 | struct bnxt *bp = netdev_priv(dev); | |
852 | ||
853 | wol->supported = 0; | |
854 | wol->wolopts = 0; | |
855 | memset(&wol->sopass, 0, sizeof(wol->sopass)); | |
856 | if (bp->flags & BNXT_FLAG_WOL_CAP) { | |
857 | wol->supported = WAKE_MAGIC; | |
858 | if (bp->wol) | |
859 | wol->wolopts = WAKE_MAGIC; | |
860 | } | |
861 | } | |
862 | ||
5282db6c MC |
863 | static int bnxt_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) |
864 | { | |
865 | struct bnxt *bp = netdev_priv(dev); | |
866 | ||
867 | if (wol->wolopts & ~WAKE_MAGIC) | |
868 | return -EINVAL; | |
869 | ||
870 | if (wol->wolopts & WAKE_MAGIC) { | |
871 | if (!(bp->flags & BNXT_FLAG_WOL_CAP)) | |
872 | return -EINVAL; | |
873 | if (!bp->wol) { | |
874 | if (bnxt_hwrm_alloc_wol_fltr(bp)) | |
875 | return -EBUSY; | |
876 | bp->wol = 1; | |
877 | } | |
878 | } else { | |
879 | if (bp->wol) { | |
880 | if (bnxt_hwrm_free_wol_fltr(bp)) | |
881 | return -EBUSY; | |
882 | bp->wol = 0; | |
883 | } | |
884 | } | |
885 | return 0; | |
886 | } | |
887 | ||
170ce013 | 888 | u32 _bnxt_fw_to_ethtool_adv_spds(u16 fw_speeds, u8 fw_pause) |
c0c050c5 | 889 | { |
c0c050c5 MC |
890 | u32 speed_mask = 0; |
891 | ||
892 | /* TODO: support 25GB, 40GB, 50GB with different cable type */ | |
893 | /* set the advertised speeds */ | |
894 | if (fw_speeds & BNXT_LINK_SPEED_MSK_100MB) | |
895 | speed_mask |= ADVERTISED_100baseT_Full; | |
896 | if (fw_speeds & BNXT_LINK_SPEED_MSK_1GB) | |
897 | speed_mask |= ADVERTISED_1000baseT_Full; | |
898 | if (fw_speeds & BNXT_LINK_SPEED_MSK_2_5GB) | |
899 | speed_mask |= ADVERTISED_2500baseX_Full; | |
900 | if (fw_speeds & BNXT_LINK_SPEED_MSK_10GB) | |
901 | speed_mask |= ADVERTISED_10000baseT_Full; | |
c0c050c5 | 902 | if (fw_speeds & BNXT_LINK_SPEED_MSK_40GB) |
1c49c421 | 903 | speed_mask |= ADVERTISED_40000baseCR4_Full; |
27c4d578 MC |
904 | |
905 | if ((fw_pause & BNXT_LINK_PAUSE_BOTH) == BNXT_LINK_PAUSE_BOTH) | |
906 | speed_mask |= ADVERTISED_Pause; | |
907 | else if (fw_pause & BNXT_LINK_PAUSE_TX) | |
908 | speed_mask |= ADVERTISED_Asym_Pause; | |
909 | else if (fw_pause & BNXT_LINK_PAUSE_RX) | |
910 | speed_mask |= ADVERTISED_Pause | ADVERTISED_Asym_Pause; | |
911 | ||
c0c050c5 MC |
912 | return speed_mask; |
913 | } | |
914 | ||
00c04a92 MC |
915 | #define BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, name)\ |
916 | { \ | |
917 | if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100MB) \ | |
918 | ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ | |
919 | 100baseT_Full); \ | |
920 | if ((fw_speeds) & BNXT_LINK_SPEED_MSK_1GB) \ | |
921 | ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ | |
922 | 1000baseT_Full); \ | |
923 | if ((fw_speeds) & BNXT_LINK_SPEED_MSK_10GB) \ | |
924 | ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ | |
925 | 10000baseT_Full); \ | |
926 | if ((fw_speeds) & BNXT_LINK_SPEED_MSK_25GB) \ | |
927 | ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ | |
928 | 25000baseCR_Full); \ | |
929 | if ((fw_speeds) & BNXT_LINK_SPEED_MSK_40GB) \ | |
930 | ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ | |
931 | 40000baseCR4_Full);\ | |
932 | if ((fw_speeds) & BNXT_LINK_SPEED_MSK_50GB) \ | |
933 | ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ | |
934 | 50000baseCR2_Full);\ | |
38a21b34 DK |
935 | if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100GB) \ |
936 | ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ | |
937 | 100000baseCR4_Full);\ | |
00c04a92 MC |
938 | if ((fw_pause) & BNXT_LINK_PAUSE_RX) { \ |
939 | ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ | |
940 | Pause); \ | |
941 | if (!((fw_pause) & BNXT_LINK_PAUSE_TX)) \ | |
942 | ethtool_link_ksettings_add_link_mode( \ | |
943 | lk_ksettings, name, Asym_Pause);\ | |
944 | } else if ((fw_pause) & BNXT_LINK_PAUSE_TX) { \ | |
945 | ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ | |
946 | Asym_Pause); \ | |
947 | } \ | |
948 | } | |
949 | ||
950 | #define BNXT_ETHTOOL_TO_FW_SPDS(fw_speeds, lk_ksettings, name) \ | |
951 | { \ | |
952 | if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ | |
953 | 100baseT_Full) || \ | |
954 | ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ | |
955 | 100baseT_Half)) \ | |
956 | (fw_speeds) |= BNXT_LINK_SPEED_MSK_100MB; \ | |
957 | if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ | |
958 | 1000baseT_Full) || \ | |
959 | ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ | |
960 | 1000baseT_Half)) \ | |
961 | (fw_speeds) |= BNXT_LINK_SPEED_MSK_1GB; \ | |
962 | if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ | |
963 | 10000baseT_Full)) \ | |
964 | (fw_speeds) |= BNXT_LINK_SPEED_MSK_10GB; \ | |
965 | if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ | |
966 | 25000baseCR_Full)) \ | |
967 | (fw_speeds) |= BNXT_LINK_SPEED_MSK_25GB; \ | |
968 | if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ | |
969 | 40000baseCR4_Full)) \ | |
970 | (fw_speeds) |= BNXT_LINK_SPEED_MSK_40GB; \ | |
971 | if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ | |
972 | 50000baseCR2_Full)) \ | |
973 | (fw_speeds) |= BNXT_LINK_SPEED_MSK_50GB; \ | |
38a21b34 DK |
974 | if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ |
975 | 100000baseCR4_Full)) \ | |
976 | (fw_speeds) |= BNXT_LINK_SPEED_MSK_100GB; \ | |
00c04a92 MC |
977 | } |
978 | ||
979 | static void bnxt_fw_to_ethtool_advertised_spds(struct bnxt_link_info *link_info, | |
980 | struct ethtool_link_ksettings *lk_ksettings) | |
27c4d578 | 981 | { |
68515a18 | 982 | u16 fw_speeds = link_info->advertising; |
27c4d578 MC |
983 | u8 fw_pause = 0; |
984 | ||
985 | if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL) | |
986 | fw_pause = link_info->auto_pause_setting; | |
987 | ||
00c04a92 | 988 | BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, advertising); |
27c4d578 MC |
989 | } |
990 | ||
00c04a92 MC |
991 | static void bnxt_fw_to_ethtool_lp_adv(struct bnxt_link_info *link_info, |
992 | struct ethtool_link_ksettings *lk_ksettings) | |
3277360e MC |
993 | { |
994 | u16 fw_speeds = link_info->lp_auto_link_speeds; | |
995 | u8 fw_pause = 0; | |
996 | ||
997 | if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL) | |
998 | fw_pause = link_info->lp_pause; | |
999 | ||
00c04a92 MC |
1000 | BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, |
1001 | lp_advertising); | |
3277360e MC |
1002 | } |
1003 | ||
00c04a92 MC |
1004 | static void bnxt_fw_to_ethtool_support_spds(struct bnxt_link_info *link_info, |
1005 | struct ethtool_link_ksettings *lk_ksettings) | |
4b32cacc MC |
1006 | { |
1007 | u16 fw_speeds = link_info->support_speeds; | |
4b32cacc | 1008 | |
00c04a92 | 1009 | BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, 0, lk_ksettings, supported); |
4b32cacc | 1010 | |
00c04a92 MC |
1011 | ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, Pause); |
1012 | ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, | |
1013 | Asym_Pause); | |
93ed8117 | 1014 | |
00c04a92 MC |
1015 | if (link_info->support_auto_speeds) |
1016 | ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, | |
1017 | Autoneg); | |
93ed8117 MC |
1018 | } |
1019 | ||
c0c050c5 MC |
1020 | u32 bnxt_fw_to_ethtool_speed(u16 fw_link_speed) |
1021 | { | |
1022 | switch (fw_link_speed) { | |
1023 | case BNXT_LINK_SPEED_100MB: | |
1024 | return SPEED_100; | |
1025 | case BNXT_LINK_SPEED_1GB: | |
1026 | return SPEED_1000; | |
1027 | case BNXT_LINK_SPEED_2_5GB: | |
1028 | return SPEED_2500; | |
1029 | case BNXT_LINK_SPEED_10GB: | |
1030 | return SPEED_10000; | |
1031 | case BNXT_LINK_SPEED_20GB: | |
1032 | return SPEED_20000; | |
1033 | case BNXT_LINK_SPEED_25GB: | |
1034 | return SPEED_25000; | |
1035 | case BNXT_LINK_SPEED_40GB: | |
1036 | return SPEED_40000; | |
1037 | case BNXT_LINK_SPEED_50GB: | |
1038 | return SPEED_50000; | |
38a21b34 DK |
1039 | case BNXT_LINK_SPEED_100GB: |
1040 | return SPEED_100000; | |
c0c050c5 MC |
1041 | default: |
1042 | return SPEED_UNKNOWN; | |
1043 | } | |
1044 | } | |
1045 | ||
00c04a92 MC |
1046 | static int bnxt_get_link_ksettings(struct net_device *dev, |
1047 | struct ethtool_link_ksettings *lk_ksettings) | |
c0c050c5 MC |
1048 | { |
1049 | struct bnxt *bp = netdev_priv(dev); | |
1050 | struct bnxt_link_info *link_info = &bp->link_info; | |
00c04a92 MC |
1051 | struct ethtool_link_settings *base = &lk_ksettings->base; |
1052 | u32 ethtool_speed; | |
c0c050c5 | 1053 | |
00c04a92 | 1054 | ethtool_link_ksettings_zero_link_mode(lk_ksettings, supported); |
e2dc9b6e | 1055 | mutex_lock(&bp->link_lock); |
00c04a92 | 1056 | bnxt_fw_to_ethtool_support_spds(link_info, lk_ksettings); |
c0c050c5 | 1057 | |
00c04a92 | 1058 | ethtool_link_ksettings_zero_link_mode(lk_ksettings, advertising); |
b763499e | 1059 | if (link_info->autoneg) { |
00c04a92 MC |
1060 | bnxt_fw_to_ethtool_advertised_spds(link_info, lk_ksettings); |
1061 | ethtool_link_ksettings_add_link_mode(lk_ksettings, | |
1062 | advertising, Autoneg); | |
1063 | base->autoneg = AUTONEG_ENABLE; | |
3277360e | 1064 | if (link_info->phy_link_status == BNXT_LINK_LINK) |
00c04a92 | 1065 | bnxt_fw_to_ethtool_lp_adv(link_info, lk_ksettings); |
29c262fe MC |
1066 | ethtool_speed = bnxt_fw_to_ethtool_speed(link_info->link_speed); |
1067 | if (!netif_carrier_ok(dev)) | |
00c04a92 | 1068 | base->duplex = DUPLEX_UNKNOWN; |
29c262fe | 1069 | else if (link_info->duplex & BNXT_LINK_DUPLEX_FULL) |
00c04a92 | 1070 | base->duplex = DUPLEX_FULL; |
29c262fe | 1071 | else |
00c04a92 | 1072 | base->duplex = DUPLEX_HALF; |
c0c050c5 | 1073 | } else { |
00c04a92 | 1074 | base->autoneg = AUTONEG_DISABLE; |
29c262fe MC |
1075 | ethtool_speed = |
1076 | bnxt_fw_to_ethtool_speed(link_info->req_link_speed); | |
00c04a92 | 1077 | base->duplex = DUPLEX_HALF; |
29c262fe | 1078 | if (link_info->req_duplex == BNXT_LINK_DUPLEX_FULL) |
00c04a92 | 1079 | base->duplex = DUPLEX_FULL; |
c0c050c5 | 1080 | } |
00c04a92 | 1081 | base->speed = ethtool_speed; |
c0c050c5 | 1082 | |
00c04a92 | 1083 | base->port = PORT_NONE; |
c0c050c5 | 1084 | if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) { |
00c04a92 MC |
1085 | base->port = PORT_TP; |
1086 | ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, | |
1087 | TP); | |
1088 | ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising, | |
1089 | TP); | |
c0c050c5 | 1090 | } else { |
00c04a92 MC |
1091 | ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, |
1092 | FIBRE); | |
1093 | ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising, | |
1094 | FIBRE); | |
c0c050c5 MC |
1095 | |
1096 | if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_DAC) | |
00c04a92 | 1097 | base->port = PORT_DA; |
c0c050c5 MC |
1098 | else if (link_info->media_type == |
1099 | PORT_PHY_QCFG_RESP_MEDIA_TYPE_FIBRE) | |
00c04a92 | 1100 | base->port = PORT_FIBRE; |
c0c050c5 | 1101 | } |
00c04a92 | 1102 | base->phy_address = link_info->phy_addr; |
e2dc9b6e | 1103 | mutex_unlock(&bp->link_lock); |
c0c050c5 MC |
1104 | |
1105 | return 0; | |
1106 | } | |
1107 | ||
38a21b34 | 1108 | static u32 bnxt_get_fw_speed(struct net_device *dev, u32 ethtool_speed) |
c0c050c5 | 1109 | { |
9d9cee08 MC |
1110 | struct bnxt *bp = netdev_priv(dev); |
1111 | struct bnxt_link_info *link_info = &bp->link_info; | |
1112 | u16 support_spds = link_info->support_speeds; | |
1113 | u32 fw_speed = 0; | |
1114 | ||
c0c050c5 MC |
1115 | switch (ethtool_speed) { |
1116 | case SPEED_100: | |
9d9cee08 MC |
1117 | if (support_spds & BNXT_LINK_SPEED_MSK_100MB) |
1118 | fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100MB; | |
1119 | break; | |
c0c050c5 | 1120 | case SPEED_1000: |
9d9cee08 MC |
1121 | if (support_spds & BNXT_LINK_SPEED_MSK_1GB) |
1122 | fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_1GB; | |
1123 | break; | |
c0c050c5 | 1124 | case SPEED_2500: |
9d9cee08 MC |
1125 | if (support_spds & BNXT_LINK_SPEED_MSK_2_5GB) |
1126 | fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_2_5GB; | |
1127 | break; | |
c0c050c5 | 1128 | case SPEED_10000: |
9d9cee08 MC |
1129 | if (support_spds & BNXT_LINK_SPEED_MSK_10GB) |
1130 | fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_10GB; | |
1131 | break; | |
c0c050c5 | 1132 | case SPEED_20000: |
9d9cee08 MC |
1133 | if (support_spds & BNXT_LINK_SPEED_MSK_20GB) |
1134 | fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_20GB; | |
1135 | break; | |
c0c050c5 | 1136 | case SPEED_25000: |
9d9cee08 MC |
1137 | if (support_spds & BNXT_LINK_SPEED_MSK_25GB) |
1138 | fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_25GB; | |
1139 | break; | |
c0c050c5 | 1140 | case SPEED_40000: |
9d9cee08 MC |
1141 | if (support_spds & BNXT_LINK_SPEED_MSK_40GB) |
1142 | fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_40GB; | |
1143 | break; | |
c0c050c5 | 1144 | case SPEED_50000: |
9d9cee08 MC |
1145 | if (support_spds & BNXT_LINK_SPEED_MSK_50GB) |
1146 | fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_50GB; | |
1147 | break; | |
38a21b34 DK |
1148 | case SPEED_100000: |
1149 | if (support_spds & BNXT_LINK_SPEED_MSK_100GB) | |
1150 | fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100GB; | |
1151 | break; | |
c0c050c5 MC |
1152 | default: |
1153 | netdev_err(dev, "unsupported speed!\n"); | |
1154 | break; | |
1155 | } | |
9d9cee08 | 1156 | return fw_speed; |
c0c050c5 MC |
1157 | } |
1158 | ||
939f7f0c | 1159 | u16 bnxt_get_fw_auto_link_speeds(u32 advertising) |
c0c050c5 MC |
1160 | { |
1161 | u16 fw_speed_mask = 0; | |
1162 | ||
1163 | /* only support autoneg at speed 100, 1000, and 10000 */ | |
1164 | if (advertising & (ADVERTISED_100baseT_Full | | |
1165 | ADVERTISED_100baseT_Half)) { | |
1166 | fw_speed_mask |= BNXT_LINK_SPEED_MSK_100MB; | |
1167 | } | |
1168 | if (advertising & (ADVERTISED_1000baseT_Full | | |
1169 | ADVERTISED_1000baseT_Half)) { | |
1170 | fw_speed_mask |= BNXT_LINK_SPEED_MSK_1GB; | |
1171 | } | |
1172 | if (advertising & ADVERTISED_10000baseT_Full) | |
1173 | fw_speed_mask |= BNXT_LINK_SPEED_MSK_10GB; | |
1174 | ||
1c49c421 MC |
1175 | if (advertising & ADVERTISED_40000baseCR4_Full) |
1176 | fw_speed_mask |= BNXT_LINK_SPEED_MSK_40GB; | |
1177 | ||
c0c050c5 MC |
1178 | return fw_speed_mask; |
1179 | } | |
1180 | ||
00c04a92 MC |
1181 | static int bnxt_set_link_ksettings(struct net_device *dev, |
1182 | const struct ethtool_link_ksettings *lk_ksettings) | |
c0c050c5 | 1183 | { |
c0c050c5 MC |
1184 | struct bnxt *bp = netdev_priv(dev); |
1185 | struct bnxt_link_info *link_info = &bp->link_info; | |
00c04a92 | 1186 | const struct ethtool_link_settings *base = &lk_ksettings->base; |
c0c050c5 | 1187 | bool set_pause = false; |
68515a18 MC |
1188 | u16 fw_advertising = 0; |
1189 | u32 speed; | |
00c04a92 | 1190 | int rc = 0; |
c0c050c5 | 1191 | |
567b2abe | 1192 | if (!BNXT_SINGLE_PF(bp)) |
00c04a92 | 1193 | return -EOPNOTSUPP; |
f1a082a6 | 1194 | |
e2dc9b6e | 1195 | mutex_lock(&bp->link_lock); |
00c04a92 MC |
1196 | if (base->autoneg == AUTONEG_ENABLE) { |
1197 | BNXT_ETHTOOL_TO_FW_SPDS(fw_advertising, lk_ksettings, | |
1198 | advertising); | |
c0c050c5 MC |
1199 | link_info->autoneg |= BNXT_AUTONEG_SPEED; |
1200 | if (!fw_advertising) | |
93ed8117 | 1201 | link_info->advertising = link_info->support_auto_speeds; |
c0c050c5 MC |
1202 | else |
1203 | link_info->advertising = fw_advertising; | |
1204 | /* any change to autoneg will cause link change, therefore the | |
1205 | * driver should put back the original pause setting in autoneg | |
1206 | */ | |
1207 | set_pause = true; | |
1208 | } else { | |
9d9cee08 | 1209 | u16 fw_speed; |
03efbec0 | 1210 | u8 phy_type = link_info->phy_type; |
9d9cee08 | 1211 | |
03efbec0 MC |
1212 | if (phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASET || |
1213 | phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASETE || | |
1214 | link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) { | |
1215 | netdev_err(dev, "10GBase-T devices must autoneg\n"); | |
1216 | rc = -EINVAL; | |
1217 | goto set_setting_exit; | |
1218 | } | |
00c04a92 | 1219 | if (base->duplex == DUPLEX_HALF) { |
c0c050c5 MC |
1220 | netdev_err(dev, "HALF DUPLEX is not supported!\n"); |
1221 | rc = -EINVAL; | |
1222 | goto set_setting_exit; | |
1223 | } | |
00c04a92 | 1224 | speed = base->speed; |
9d9cee08 MC |
1225 | fw_speed = bnxt_get_fw_speed(dev, speed); |
1226 | if (!fw_speed) { | |
1227 | rc = -EINVAL; | |
1228 | goto set_setting_exit; | |
1229 | } | |
1230 | link_info->req_link_speed = fw_speed; | |
c0c050c5 | 1231 | link_info->req_duplex = BNXT_LINK_DUPLEX_FULL; |
b763499e | 1232 | link_info->autoneg = 0; |
c0c050c5 MC |
1233 | link_info->advertising = 0; |
1234 | } | |
1235 | ||
1236 | if (netif_running(dev)) | |
939f7f0c | 1237 | rc = bnxt_hwrm_set_link_setting(bp, set_pause, false); |
c0c050c5 MC |
1238 | |
1239 | set_setting_exit: | |
e2dc9b6e | 1240 | mutex_unlock(&bp->link_lock); |
c0c050c5 MC |
1241 | return rc; |
1242 | } | |
1243 | ||
1244 | static void bnxt_get_pauseparam(struct net_device *dev, | |
1245 | struct ethtool_pauseparam *epause) | |
1246 | { | |
1247 | struct bnxt *bp = netdev_priv(dev); | |
1248 | struct bnxt_link_info *link_info = &bp->link_info; | |
1249 | ||
1250 | if (BNXT_VF(bp)) | |
1251 | return; | |
b763499e | 1252 | epause->autoneg = !!(link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL); |
3c02d1bb MC |
1253 | epause->rx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_RX); |
1254 | epause->tx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_TX); | |
c0c050c5 MC |
1255 | } |
1256 | ||
1257 | static int bnxt_set_pauseparam(struct net_device *dev, | |
1258 | struct ethtool_pauseparam *epause) | |
1259 | { | |
1260 | int rc = 0; | |
1261 | struct bnxt *bp = netdev_priv(dev); | |
1262 | struct bnxt_link_info *link_info = &bp->link_info; | |
1263 | ||
567b2abe | 1264 | if (!BNXT_SINGLE_PF(bp)) |
75362a3f | 1265 | return -EOPNOTSUPP; |
c0c050c5 MC |
1266 | |
1267 | if (epause->autoneg) { | |
b763499e MC |
1268 | if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) |
1269 | return -EINVAL; | |
1270 | ||
c0c050c5 | 1271 | link_info->autoneg |= BNXT_AUTONEG_FLOW_CTRL; |
c9ee9516 MC |
1272 | if (bp->hwrm_spec_code >= 0x10201) |
1273 | link_info->req_flow_ctrl = | |
1274 | PORT_PHY_CFG_REQ_AUTO_PAUSE_AUTONEG_PAUSE; | |
c0c050c5 MC |
1275 | } else { |
1276 | /* when transition from auto pause to force pause, | |
1277 | * force a link change | |
1278 | */ | |
1279 | if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL) | |
1280 | link_info->force_link_chng = true; | |
1281 | link_info->autoneg &= ~BNXT_AUTONEG_FLOW_CTRL; | |
c9ee9516 | 1282 | link_info->req_flow_ctrl = 0; |
c0c050c5 MC |
1283 | } |
1284 | if (epause->rx_pause) | |
1285 | link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_RX; | |
c0c050c5 MC |
1286 | |
1287 | if (epause->tx_pause) | |
1288 | link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_TX; | |
c0c050c5 MC |
1289 | |
1290 | if (netif_running(dev)) | |
1291 | rc = bnxt_hwrm_set_pause(bp); | |
1292 | return rc; | |
1293 | } | |
1294 | ||
1295 | static u32 bnxt_get_link(struct net_device *dev) | |
1296 | { | |
1297 | struct bnxt *bp = netdev_priv(dev); | |
1298 | ||
1299 | /* TODO: handle MF, VF, driver close case */ | |
1300 | return bp->link_info.link_up; | |
1301 | } | |
1302 | ||
5ac67d8b RS |
1303 | static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal, |
1304 | u16 ext, u16 *index, u32 *item_length, | |
1305 | u32 *data_length); | |
1306 | ||
c0c050c5 MC |
1307 | static int bnxt_flash_nvram(struct net_device *dev, |
1308 | u16 dir_type, | |
1309 | u16 dir_ordinal, | |
1310 | u16 dir_ext, | |
1311 | u16 dir_attr, | |
1312 | const u8 *data, | |
1313 | size_t data_len) | |
1314 | { | |
1315 | struct bnxt *bp = netdev_priv(dev); | |
1316 | int rc; | |
1317 | struct hwrm_nvm_write_input req = {0}; | |
1318 | dma_addr_t dma_handle; | |
1319 | u8 *kmem; | |
1320 | ||
1321 | bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_WRITE, -1, -1); | |
1322 | ||
1323 | req.dir_type = cpu_to_le16(dir_type); | |
1324 | req.dir_ordinal = cpu_to_le16(dir_ordinal); | |
1325 | req.dir_ext = cpu_to_le16(dir_ext); | |
1326 | req.dir_attr = cpu_to_le16(dir_attr); | |
1327 | req.dir_data_length = cpu_to_le32(data_len); | |
1328 | ||
1329 | kmem = dma_alloc_coherent(&bp->pdev->dev, data_len, &dma_handle, | |
1330 | GFP_KERNEL); | |
1331 | if (!kmem) { | |
1332 | netdev_err(dev, "dma_alloc_coherent failure, length = %u\n", | |
1333 | (unsigned)data_len); | |
1334 | return -ENOMEM; | |
1335 | } | |
1336 | memcpy(kmem, data, data_len); | |
1337 | req.host_src_addr = cpu_to_le64(dma_handle); | |
1338 | ||
1339 | rc = hwrm_send_message(bp, &req, sizeof(req), FLASH_NVRAM_TIMEOUT); | |
1340 | dma_free_coherent(&bp->pdev->dev, data_len, kmem, dma_handle); | |
1341 | ||
1342 | return rc; | |
1343 | } | |
1344 | ||
d2d6318c RS |
1345 | static int bnxt_firmware_reset(struct net_device *dev, |
1346 | u16 dir_type) | |
1347 | { | |
1348 | struct bnxt *bp = netdev_priv(dev); | |
1349 | struct hwrm_fw_reset_input req = {0}; | |
1350 | ||
1351 | bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FW_RESET, -1, -1); | |
1352 | ||
1353 | /* TODO: Support ASAP ChiMP self-reset (e.g. upon PF driver unload) */ | |
1354 | /* TODO: Address self-reset of APE/KONG/BONO/TANG or ungraceful reset */ | |
1355 | /* (e.g. when firmware isn't already running) */ | |
1356 | switch (dir_type) { | |
1357 | case BNX_DIR_TYPE_CHIMP_PATCH: | |
1358 | case BNX_DIR_TYPE_BOOTCODE: | |
1359 | case BNX_DIR_TYPE_BOOTCODE_2: | |
1360 | req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_BOOT; | |
1361 | /* Self-reset ChiMP upon next PCIe reset: */ | |
1362 | req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST; | |
1363 | break; | |
1364 | case BNX_DIR_TYPE_APE_FW: | |
1365 | case BNX_DIR_TYPE_APE_PATCH: | |
1366 | req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_MGMT; | |
08141e0b RS |
1367 | /* Self-reset APE upon next PCIe reset: */ |
1368 | req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST; | |
d2d6318c RS |
1369 | break; |
1370 | case BNX_DIR_TYPE_KONG_FW: | |
1371 | case BNX_DIR_TYPE_KONG_PATCH: | |
1372 | req.embedded_proc_type = | |
1373 | FW_RESET_REQ_EMBEDDED_PROC_TYPE_NETCTRL; | |
1374 | break; | |
1375 | case BNX_DIR_TYPE_BONO_FW: | |
1376 | case BNX_DIR_TYPE_BONO_PATCH: | |
1377 | req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_ROCE; | |
1378 | break; | |
1379 | default: | |
1380 | return -EINVAL; | |
1381 | } | |
1382 | ||
1383 | return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); | |
1384 | } | |
1385 | ||
c0c050c5 MC |
1386 | static int bnxt_flash_firmware(struct net_device *dev, |
1387 | u16 dir_type, | |
1388 | const u8 *fw_data, | |
1389 | size_t fw_size) | |
1390 | { | |
1391 | int rc = 0; | |
1392 | u16 code_type; | |
1393 | u32 stored_crc; | |
1394 | u32 calculated_crc; | |
1395 | struct bnxt_fw_header *header = (struct bnxt_fw_header *)fw_data; | |
1396 | ||
1397 | switch (dir_type) { | |
1398 | case BNX_DIR_TYPE_BOOTCODE: | |
1399 | case BNX_DIR_TYPE_BOOTCODE_2: | |
1400 | code_type = CODE_BOOT; | |
1401 | break; | |
93e0b4fe RS |
1402 | case BNX_DIR_TYPE_CHIMP_PATCH: |
1403 | code_type = CODE_CHIMP_PATCH; | |
1404 | break; | |
2731d70f RS |
1405 | case BNX_DIR_TYPE_APE_FW: |
1406 | code_type = CODE_MCTP_PASSTHRU; | |
1407 | break; | |
93e0b4fe RS |
1408 | case BNX_DIR_TYPE_APE_PATCH: |
1409 | code_type = CODE_APE_PATCH; | |
1410 | break; | |
1411 | case BNX_DIR_TYPE_KONG_FW: | |
1412 | code_type = CODE_KONG_FW; | |
1413 | break; | |
1414 | case BNX_DIR_TYPE_KONG_PATCH: | |
1415 | code_type = CODE_KONG_PATCH; | |
1416 | break; | |
1417 | case BNX_DIR_TYPE_BONO_FW: | |
1418 | code_type = CODE_BONO_FW; | |
1419 | break; | |
1420 | case BNX_DIR_TYPE_BONO_PATCH: | |
1421 | code_type = CODE_BONO_PATCH; | |
1422 | break; | |
c0c050c5 MC |
1423 | default: |
1424 | netdev_err(dev, "Unsupported directory entry type: %u\n", | |
1425 | dir_type); | |
1426 | return -EINVAL; | |
1427 | } | |
1428 | if (fw_size < sizeof(struct bnxt_fw_header)) { | |
1429 | netdev_err(dev, "Invalid firmware file size: %u\n", | |
1430 | (unsigned int)fw_size); | |
1431 | return -EINVAL; | |
1432 | } | |
1433 | if (header->signature != cpu_to_le32(BNXT_FIRMWARE_BIN_SIGNATURE)) { | |
1434 | netdev_err(dev, "Invalid firmware signature: %08X\n", | |
1435 | le32_to_cpu(header->signature)); | |
1436 | return -EINVAL; | |
1437 | } | |
1438 | if (header->code_type != code_type) { | |
1439 | netdev_err(dev, "Expected firmware type: %d, read: %d\n", | |
1440 | code_type, header->code_type); | |
1441 | return -EINVAL; | |
1442 | } | |
1443 | if (header->device != DEVICE_CUMULUS_FAMILY) { | |
1444 | netdev_err(dev, "Expected firmware device family %d, read: %d\n", | |
1445 | DEVICE_CUMULUS_FAMILY, header->device); | |
1446 | return -EINVAL; | |
1447 | } | |
1448 | /* Confirm the CRC32 checksum of the file: */ | |
1449 | stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size - | |
1450 | sizeof(stored_crc))); | |
1451 | calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc)); | |
1452 | if (calculated_crc != stored_crc) { | |
1453 | netdev_err(dev, "Firmware file CRC32 checksum (%08lX) does not match calculated checksum (%08lX)\n", | |
1454 | (unsigned long)stored_crc, | |
1455 | (unsigned long)calculated_crc); | |
1456 | return -EINVAL; | |
1457 | } | |
c0c050c5 MC |
1458 | rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST, |
1459 | 0, 0, fw_data, fw_size); | |
d2d6318c RS |
1460 | if (rc == 0) /* Firmware update successful */ |
1461 | rc = bnxt_firmware_reset(dev, dir_type); | |
1462 | ||
c0c050c5 MC |
1463 | return rc; |
1464 | } | |
1465 | ||
5ac67d8b RS |
1466 | static int bnxt_flash_microcode(struct net_device *dev, |
1467 | u16 dir_type, | |
1468 | const u8 *fw_data, | |
1469 | size_t fw_size) | |
1470 | { | |
1471 | struct bnxt_ucode_trailer *trailer; | |
1472 | u32 calculated_crc; | |
1473 | u32 stored_crc; | |
1474 | int rc = 0; | |
1475 | ||
1476 | if (fw_size < sizeof(struct bnxt_ucode_trailer)) { | |
1477 | netdev_err(dev, "Invalid microcode file size: %u\n", | |
1478 | (unsigned int)fw_size); | |
1479 | return -EINVAL; | |
1480 | } | |
1481 | trailer = (struct bnxt_ucode_trailer *)(fw_data + (fw_size - | |
1482 | sizeof(*trailer))); | |
1483 | if (trailer->sig != cpu_to_le32(BNXT_UCODE_TRAILER_SIGNATURE)) { | |
1484 | netdev_err(dev, "Invalid microcode trailer signature: %08X\n", | |
1485 | le32_to_cpu(trailer->sig)); | |
1486 | return -EINVAL; | |
1487 | } | |
1488 | if (le16_to_cpu(trailer->dir_type) != dir_type) { | |
1489 | netdev_err(dev, "Expected microcode type: %d, read: %d\n", | |
1490 | dir_type, le16_to_cpu(trailer->dir_type)); | |
1491 | return -EINVAL; | |
1492 | } | |
1493 | if (le16_to_cpu(trailer->trailer_length) < | |
1494 | sizeof(struct bnxt_ucode_trailer)) { | |
1495 | netdev_err(dev, "Invalid microcode trailer length: %d\n", | |
1496 | le16_to_cpu(trailer->trailer_length)); | |
1497 | return -EINVAL; | |
1498 | } | |
1499 | ||
1500 | /* Confirm the CRC32 checksum of the file: */ | |
1501 | stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size - | |
1502 | sizeof(stored_crc))); | |
1503 | calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc)); | |
1504 | if (calculated_crc != stored_crc) { | |
1505 | netdev_err(dev, | |
1506 | "CRC32 (%08lX) does not match calculated: %08lX\n", | |
1507 | (unsigned long)stored_crc, | |
1508 | (unsigned long)calculated_crc); | |
1509 | return -EINVAL; | |
1510 | } | |
1511 | rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST, | |
1512 | 0, 0, fw_data, fw_size); | |
1513 | ||
1514 | return rc; | |
1515 | } | |
1516 | ||
c0c050c5 MC |
1517 | static bool bnxt_dir_type_is_ape_bin_format(u16 dir_type) |
1518 | { | |
1519 | switch (dir_type) { | |
1520 | case BNX_DIR_TYPE_CHIMP_PATCH: | |
1521 | case BNX_DIR_TYPE_BOOTCODE: | |
1522 | case BNX_DIR_TYPE_BOOTCODE_2: | |
1523 | case BNX_DIR_TYPE_APE_FW: | |
1524 | case BNX_DIR_TYPE_APE_PATCH: | |
1525 | case BNX_DIR_TYPE_KONG_FW: | |
1526 | case BNX_DIR_TYPE_KONG_PATCH: | |
93e0b4fe RS |
1527 | case BNX_DIR_TYPE_BONO_FW: |
1528 | case BNX_DIR_TYPE_BONO_PATCH: | |
c0c050c5 MC |
1529 | return true; |
1530 | } | |
1531 | ||
1532 | return false; | |
1533 | } | |
1534 | ||
5ac67d8b | 1535 | static bool bnxt_dir_type_is_other_exec_format(u16 dir_type) |
c0c050c5 MC |
1536 | { |
1537 | switch (dir_type) { | |
1538 | case BNX_DIR_TYPE_AVS: | |
1539 | case BNX_DIR_TYPE_EXP_ROM_MBA: | |
1540 | case BNX_DIR_TYPE_PCIE: | |
1541 | case BNX_DIR_TYPE_TSCF_UCODE: | |
1542 | case BNX_DIR_TYPE_EXT_PHY: | |
1543 | case BNX_DIR_TYPE_CCM: | |
1544 | case BNX_DIR_TYPE_ISCSI_BOOT: | |
1545 | case BNX_DIR_TYPE_ISCSI_BOOT_IPV6: | |
1546 | case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6: | |
1547 | return true; | |
1548 | } | |
1549 | ||
1550 | return false; | |
1551 | } | |
1552 | ||
1553 | static bool bnxt_dir_type_is_executable(u16 dir_type) | |
1554 | { | |
1555 | return bnxt_dir_type_is_ape_bin_format(dir_type) || | |
5ac67d8b | 1556 | bnxt_dir_type_is_other_exec_format(dir_type); |
c0c050c5 MC |
1557 | } |
1558 | ||
1559 | static int bnxt_flash_firmware_from_file(struct net_device *dev, | |
1560 | u16 dir_type, | |
1561 | const char *filename) | |
1562 | { | |
1563 | const struct firmware *fw; | |
1564 | int rc; | |
1565 | ||
c0c050c5 MC |
1566 | rc = request_firmware(&fw, filename, &dev->dev); |
1567 | if (rc != 0) { | |
1568 | netdev_err(dev, "Error %d requesting firmware file: %s\n", | |
1569 | rc, filename); | |
1570 | return rc; | |
1571 | } | |
1572 | if (bnxt_dir_type_is_ape_bin_format(dir_type) == true) | |
1573 | rc = bnxt_flash_firmware(dev, dir_type, fw->data, fw->size); | |
5ac67d8b RS |
1574 | else if (bnxt_dir_type_is_other_exec_format(dir_type) == true) |
1575 | rc = bnxt_flash_microcode(dev, dir_type, fw->data, fw->size); | |
c0c050c5 MC |
1576 | else |
1577 | rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST, | |
1578 | 0, 0, fw->data, fw->size); | |
1579 | release_firmware(fw); | |
1580 | return rc; | |
1581 | } | |
1582 | ||
1583 | static int bnxt_flash_package_from_file(struct net_device *dev, | |
5ac67d8b | 1584 | char *filename, u32 install_type) |
c0c050c5 | 1585 | { |
5ac67d8b RS |
1586 | struct bnxt *bp = netdev_priv(dev); |
1587 | struct hwrm_nvm_install_update_output *resp = bp->hwrm_cmd_resp_addr; | |
1588 | struct hwrm_nvm_install_update_input install = {0}; | |
1589 | const struct firmware *fw; | |
1590 | u32 item_len; | |
1591 | u16 index; | |
1592 | int rc; | |
1593 | ||
1594 | bnxt_hwrm_fw_set_time(bp); | |
1595 | ||
1596 | if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_UPDATE, | |
1597 | BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE, | |
1598 | &index, &item_len, NULL) != 0) { | |
1599 | netdev_err(dev, "PKG update area not created in nvram\n"); | |
1600 | return -ENOBUFS; | |
1601 | } | |
1602 | ||
1603 | rc = request_firmware(&fw, filename, &dev->dev); | |
1604 | if (rc != 0) { | |
1605 | netdev_err(dev, "PKG error %d requesting file: %s\n", | |
1606 | rc, filename); | |
1607 | return rc; | |
1608 | } | |
1609 | ||
1610 | if (fw->size > item_len) { | |
1611 | netdev_err(dev, "PKG insufficient update area in nvram: %lu", | |
1612 | (unsigned long)fw->size); | |
1613 | rc = -EFBIG; | |
1614 | } else { | |
1615 | dma_addr_t dma_handle; | |
1616 | u8 *kmem; | |
1617 | struct hwrm_nvm_modify_input modify = {0}; | |
1618 | ||
1619 | bnxt_hwrm_cmd_hdr_init(bp, &modify, HWRM_NVM_MODIFY, -1, -1); | |
1620 | ||
1621 | modify.dir_idx = cpu_to_le16(index); | |
1622 | modify.len = cpu_to_le32(fw->size); | |
1623 | ||
1624 | kmem = dma_alloc_coherent(&bp->pdev->dev, fw->size, | |
1625 | &dma_handle, GFP_KERNEL); | |
1626 | if (!kmem) { | |
1627 | netdev_err(dev, | |
1628 | "dma_alloc_coherent failure, length = %u\n", | |
1629 | (unsigned int)fw->size); | |
1630 | rc = -ENOMEM; | |
1631 | } else { | |
1632 | memcpy(kmem, fw->data, fw->size); | |
1633 | modify.host_src_addr = cpu_to_le64(dma_handle); | |
1634 | ||
1635 | rc = hwrm_send_message(bp, &modify, sizeof(modify), | |
1636 | FLASH_PACKAGE_TIMEOUT); | |
1637 | dma_free_coherent(&bp->pdev->dev, fw->size, kmem, | |
1638 | dma_handle); | |
1639 | } | |
1640 | } | |
1641 | release_firmware(fw); | |
1642 | if (rc) | |
1643 | return rc; | |
1644 | ||
1645 | if ((install_type & 0xffff) == 0) | |
1646 | install_type >>= 16; | |
1647 | bnxt_hwrm_cmd_hdr_init(bp, &install, HWRM_NVM_INSTALL_UPDATE, -1, -1); | |
1648 | install.install_type = cpu_to_le32(install_type); | |
1649 | ||
cb4d1d62 KS |
1650 | mutex_lock(&bp->hwrm_cmd_lock); |
1651 | rc = _hwrm_send_message(bp, &install, sizeof(install), | |
1652 | INSTALL_PACKAGE_TIMEOUT); | |
1653 | if (rc) { | |
1654 | rc = -EOPNOTSUPP; | |
1655 | goto flash_pkg_exit; | |
1656 | } | |
1657 | ||
1658 | if (resp->error_code) { | |
1659 | u8 error_code = ((struct hwrm_err_output *)resp)->cmd_err; | |
1660 | ||
1661 | if (error_code == NVM_INSTALL_UPDATE_CMD_ERR_CODE_FRAG_ERR) { | |
1662 | install.flags |= cpu_to_le16( | |
1663 | NVM_INSTALL_UPDATE_REQ_FLAGS_ALLOWED_TO_DEFRAG); | |
1664 | rc = _hwrm_send_message(bp, &install, sizeof(install), | |
1665 | INSTALL_PACKAGE_TIMEOUT); | |
1666 | if (rc) { | |
1667 | rc = -EOPNOTSUPP; | |
1668 | goto flash_pkg_exit; | |
1669 | } | |
1670 | } | |
1671 | } | |
5ac67d8b RS |
1672 | |
1673 | if (resp->result) { | |
1674 | netdev_err(dev, "PKG install error = %d, problem_item = %d\n", | |
1675 | (s8)resp->result, (int)resp->problem_item); | |
cb4d1d62 | 1676 | rc = -ENOPKG; |
5ac67d8b | 1677 | } |
cb4d1d62 KS |
1678 | flash_pkg_exit: |
1679 | mutex_unlock(&bp->hwrm_cmd_lock); | |
1680 | return rc; | |
c0c050c5 MC |
1681 | } |
1682 | ||
1683 | static int bnxt_flash_device(struct net_device *dev, | |
1684 | struct ethtool_flash *flash) | |
1685 | { | |
1686 | if (!BNXT_PF((struct bnxt *)netdev_priv(dev))) { | |
1687 | netdev_err(dev, "flashdev not supported from a virtual function\n"); | |
1688 | return -EINVAL; | |
1689 | } | |
1690 | ||
5ac67d8b RS |
1691 | if (flash->region == ETHTOOL_FLASH_ALL_REGIONS || |
1692 | flash->region > 0xffff) | |
1693 | return bnxt_flash_package_from_file(dev, flash->data, | |
1694 | flash->region); | |
c0c050c5 MC |
1695 | |
1696 | return bnxt_flash_firmware_from_file(dev, flash->region, flash->data); | |
1697 | } | |
1698 | ||
1699 | static int nvm_get_dir_info(struct net_device *dev, u32 *entries, u32 *length) | |
1700 | { | |
1701 | struct bnxt *bp = netdev_priv(dev); | |
1702 | int rc; | |
1703 | struct hwrm_nvm_get_dir_info_input req = {0}; | |
1704 | struct hwrm_nvm_get_dir_info_output *output = bp->hwrm_cmd_resp_addr; | |
1705 | ||
1706 | bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_INFO, -1, -1); | |
1707 | ||
1708 | mutex_lock(&bp->hwrm_cmd_lock); | |
1709 | rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); | |
1710 | if (!rc) { | |
1711 | *entries = le32_to_cpu(output->entries); | |
1712 | *length = le32_to_cpu(output->entry_length); | |
1713 | } | |
1714 | mutex_unlock(&bp->hwrm_cmd_lock); | |
1715 | return rc; | |
1716 | } | |
1717 | ||
1718 | static int bnxt_get_eeprom_len(struct net_device *dev) | |
1719 | { | |
1720 | /* The -1 return value allows the entire 32-bit range of offsets to be | |
1721 | * passed via the ethtool command-line utility. | |
1722 | */ | |
1723 | return -1; | |
1724 | } | |
1725 | ||
1726 | static int bnxt_get_nvram_directory(struct net_device *dev, u32 len, u8 *data) | |
1727 | { | |
1728 | struct bnxt *bp = netdev_priv(dev); | |
1729 | int rc; | |
1730 | u32 dir_entries; | |
1731 | u32 entry_length; | |
1732 | u8 *buf; | |
1733 | size_t buflen; | |
1734 | dma_addr_t dma_handle; | |
1735 | struct hwrm_nvm_get_dir_entries_input req = {0}; | |
1736 | ||
1737 | rc = nvm_get_dir_info(dev, &dir_entries, &entry_length); | |
1738 | if (rc != 0) | |
1739 | return rc; | |
1740 | ||
1741 | /* Insert 2 bytes of directory info (count and size of entries) */ | |
1742 | if (len < 2) | |
1743 | return -EINVAL; | |
1744 | ||
1745 | *data++ = dir_entries; | |
1746 | *data++ = entry_length; | |
1747 | len -= 2; | |
1748 | memset(data, 0xff, len); | |
1749 | ||
1750 | buflen = dir_entries * entry_length; | |
1751 | buf = dma_alloc_coherent(&bp->pdev->dev, buflen, &dma_handle, | |
1752 | GFP_KERNEL); | |
1753 | if (!buf) { | |
1754 | netdev_err(dev, "dma_alloc_coherent failure, length = %u\n", | |
1755 | (unsigned)buflen); | |
1756 | return -ENOMEM; | |
1757 | } | |
1758 | bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_ENTRIES, -1, -1); | |
1759 | req.host_dest_addr = cpu_to_le64(dma_handle); | |
1760 | rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); | |
1761 | if (rc == 0) | |
1762 | memcpy(data, buf, len > buflen ? buflen : len); | |
1763 | dma_free_coherent(&bp->pdev->dev, buflen, buf, dma_handle); | |
1764 | return rc; | |
1765 | } | |
1766 | ||
1767 | static int bnxt_get_nvram_item(struct net_device *dev, u32 index, u32 offset, | |
1768 | u32 length, u8 *data) | |
1769 | { | |
1770 | struct bnxt *bp = netdev_priv(dev); | |
1771 | int rc; | |
1772 | u8 *buf; | |
1773 | dma_addr_t dma_handle; | |
1774 | struct hwrm_nvm_read_input req = {0}; | |
1775 | ||
1776 | buf = dma_alloc_coherent(&bp->pdev->dev, length, &dma_handle, | |
1777 | GFP_KERNEL); | |
1778 | if (!buf) { | |
1779 | netdev_err(dev, "dma_alloc_coherent failure, length = %u\n", | |
1780 | (unsigned)length); | |
1781 | return -ENOMEM; | |
1782 | } | |
1783 | bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_READ, -1, -1); | |
1784 | req.host_dest_addr = cpu_to_le64(dma_handle); | |
1785 | req.dir_idx = cpu_to_le16(index); | |
1786 | req.offset = cpu_to_le32(offset); | |
1787 | req.len = cpu_to_le32(length); | |
1788 | ||
1789 | rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); | |
1790 | if (rc == 0) | |
1791 | memcpy(data, buf, length); | |
1792 | dma_free_coherent(&bp->pdev->dev, length, buf, dma_handle); | |
1793 | return rc; | |
1794 | } | |
1795 | ||
3ebf6f0a RS |
1796 | static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal, |
1797 | u16 ext, u16 *index, u32 *item_length, | |
1798 | u32 *data_length) | |
1799 | { | |
1800 | struct bnxt *bp = netdev_priv(dev); | |
1801 | int rc; | |
1802 | struct hwrm_nvm_find_dir_entry_input req = {0}; | |
1803 | struct hwrm_nvm_find_dir_entry_output *output = bp->hwrm_cmd_resp_addr; | |
1804 | ||
1805 | bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_FIND_DIR_ENTRY, -1, -1); | |
1806 | req.enables = 0; | |
1807 | req.dir_idx = 0; | |
1808 | req.dir_type = cpu_to_le16(type); | |
1809 | req.dir_ordinal = cpu_to_le16(ordinal); | |
1810 | req.dir_ext = cpu_to_le16(ext); | |
1811 | req.opt_ordinal = NVM_FIND_DIR_ENTRY_REQ_OPT_ORDINAL_EQ; | |
cc72f3b1 MC |
1812 | mutex_lock(&bp->hwrm_cmd_lock); |
1813 | rc = _hwrm_send_message_silent(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); | |
3ebf6f0a RS |
1814 | if (rc == 0) { |
1815 | if (index) | |
1816 | *index = le16_to_cpu(output->dir_idx); | |
1817 | if (item_length) | |
1818 | *item_length = le32_to_cpu(output->dir_item_length); | |
1819 | if (data_length) | |
1820 | *data_length = le32_to_cpu(output->dir_data_length); | |
1821 | } | |
cc72f3b1 | 1822 | mutex_unlock(&bp->hwrm_cmd_lock); |
3ebf6f0a RS |
1823 | return rc; |
1824 | } | |
1825 | ||
1826 | static char *bnxt_parse_pkglog(int desired_field, u8 *data, size_t datalen) | |
1827 | { | |
1828 | char *retval = NULL; | |
1829 | char *p; | |
1830 | char *value; | |
1831 | int field = 0; | |
1832 | ||
1833 | if (datalen < 1) | |
1834 | return NULL; | |
1835 | /* null-terminate the log data (removing last '\n'): */ | |
1836 | data[datalen - 1] = 0; | |
1837 | for (p = data; *p != 0; p++) { | |
1838 | field = 0; | |
1839 | retval = NULL; | |
1840 | while (*p != 0 && *p != '\n') { | |
1841 | value = p; | |
1842 | while (*p != 0 && *p != '\t' && *p != '\n') | |
1843 | p++; | |
1844 | if (field == desired_field) | |
1845 | retval = value; | |
1846 | if (*p != '\t') | |
1847 | break; | |
1848 | *p = 0; | |
1849 | field++; | |
1850 | p++; | |
1851 | } | |
1852 | if (*p == 0) | |
1853 | break; | |
1854 | *p = 0; | |
1855 | } | |
1856 | return retval; | |
1857 | } | |
1858 | ||
1859 | static char *bnxt_get_pkgver(struct net_device *dev, char *buf, size_t buflen) | |
1860 | { | |
1861 | u16 index = 0; | |
1862 | u32 datalen; | |
1863 | ||
1864 | if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_PKG_LOG, | |
1865 | BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE, | |
1866 | &index, NULL, &datalen) != 0) | |
1867 | return NULL; | |
1868 | ||
1869 | memset(buf, 0, buflen); | |
1870 | if (bnxt_get_nvram_item(dev, index, 0, datalen, buf) != 0) | |
1871 | return NULL; | |
1872 | ||
1873 | return bnxt_parse_pkglog(BNX_PKG_LOG_FIELD_IDX_PKG_VERSION, buf, | |
1874 | datalen); | |
1875 | } | |
1876 | ||
c0c050c5 MC |
1877 | static int bnxt_get_eeprom(struct net_device *dev, |
1878 | struct ethtool_eeprom *eeprom, | |
1879 | u8 *data) | |
1880 | { | |
1881 | u32 index; | |
1882 | u32 offset; | |
1883 | ||
1884 | if (eeprom->offset == 0) /* special offset value to get directory */ | |
1885 | return bnxt_get_nvram_directory(dev, eeprom->len, data); | |
1886 | ||
1887 | index = eeprom->offset >> 24; | |
1888 | offset = eeprom->offset & 0xffffff; | |
1889 | ||
1890 | if (index == 0) { | |
1891 | netdev_err(dev, "unsupported index value: %d\n", index); | |
1892 | return -EINVAL; | |
1893 | } | |
1894 | ||
1895 | return bnxt_get_nvram_item(dev, index - 1, offset, eeprom->len, data); | |
1896 | } | |
1897 | ||
1898 | static int bnxt_erase_nvram_directory(struct net_device *dev, u8 index) | |
1899 | { | |
1900 | struct bnxt *bp = netdev_priv(dev); | |
1901 | struct hwrm_nvm_erase_dir_entry_input req = {0}; | |
1902 | ||
1903 | bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_ERASE_DIR_ENTRY, -1, -1); | |
1904 | req.dir_idx = cpu_to_le16(index); | |
1905 | return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); | |
1906 | } | |
1907 | ||
1908 | static int bnxt_set_eeprom(struct net_device *dev, | |
1909 | struct ethtool_eeprom *eeprom, | |
1910 | u8 *data) | |
1911 | { | |
1912 | struct bnxt *bp = netdev_priv(dev); | |
1913 | u8 index, dir_op; | |
1914 | u16 type, ext, ordinal, attr; | |
1915 | ||
1916 | if (!BNXT_PF(bp)) { | |
1917 | netdev_err(dev, "NVM write not supported from a virtual function\n"); | |
1918 | return -EINVAL; | |
1919 | } | |
1920 | ||
1921 | type = eeprom->magic >> 16; | |
1922 | ||
1923 | if (type == 0xffff) { /* special value for directory operations */ | |
1924 | index = eeprom->magic & 0xff; | |
1925 | dir_op = eeprom->magic >> 8; | |
1926 | if (index == 0) | |
1927 | return -EINVAL; | |
1928 | switch (dir_op) { | |
1929 | case 0x0e: /* erase */ | |
1930 | if (eeprom->offset != ~eeprom->magic) | |
1931 | return -EINVAL; | |
1932 | return bnxt_erase_nvram_directory(dev, index - 1); | |
1933 | default: | |
1934 | return -EINVAL; | |
1935 | } | |
1936 | } | |
1937 | ||
1938 | /* Create or re-write an NVM item: */ | |
1939 | if (bnxt_dir_type_is_executable(type) == true) | |
5ac67d8b | 1940 | return -EOPNOTSUPP; |
c0c050c5 MC |
1941 | ext = eeprom->magic & 0xffff; |
1942 | ordinal = eeprom->offset >> 16; | |
1943 | attr = eeprom->offset & 0xffff; | |
1944 | ||
1945 | return bnxt_flash_nvram(dev, type, ordinal, ext, attr, data, | |
1946 | eeprom->len); | |
1947 | } | |
1948 | ||
72b34f04 MC |
1949 | static int bnxt_set_eee(struct net_device *dev, struct ethtool_eee *edata) |
1950 | { | |
1951 | struct bnxt *bp = netdev_priv(dev); | |
1952 | struct ethtool_eee *eee = &bp->eee; | |
1953 | struct bnxt_link_info *link_info = &bp->link_info; | |
1954 | u32 advertising = | |
1955 | _bnxt_fw_to_ethtool_adv_spds(link_info->advertising, 0); | |
1956 | int rc = 0; | |
1957 | ||
567b2abe | 1958 | if (!BNXT_SINGLE_PF(bp)) |
75362a3f | 1959 | return -EOPNOTSUPP; |
72b34f04 MC |
1960 | |
1961 | if (!(bp->flags & BNXT_FLAG_EEE_CAP)) | |
1962 | return -EOPNOTSUPP; | |
1963 | ||
1964 | if (!edata->eee_enabled) | |
1965 | goto eee_ok; | |
1966 | ||
1967 | if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) { | |
1968 | netdev_warn(dev, "EEE requires autoneg\n"); | |
1969 | return -EINVAL; | |
1970 | } | |
1971 | if (edata->tx_lpi_enabled) { | |
1972 | if (bp->lpi_tmr_hi && (edata->tx_lpi_timer > bp->lpi_tmr_hi || | |
1973 | edata->tx_lpi_timer < bp->lpi_tmr_lo)) { | |
1974 | netdev_warn(dev, "Valid LPI timer range is %d and %d microsecs\n", | |
1975 | bp->lpi_tmr_lo, bp->lpi_tmr_hi); | |
1976 | return -EINVAL; | |
1977 | } else if (!bp->lpi_tmr_hi) { | |
1978 | edata->tx_lpi_timer = eee->tx_lpi_timer; | |
1979 | } | |
1980 | } | |
1981 | if (!edata->advertised) { | |
1982 | edata->advertised = advertising & eee->supported; | |
1983 | } else if (edata->advertised & ~advertising) { | |
1984 | netdev_warn(dev, "EEE advertised %x must be a subset of autoneg advertised speeds %x\n", | |
1985 | edata->advertised, advertising); | |
1986 | return -EINVAL; | |
1987 | } | |
1988 | ||
1989 | eee->advertised = edata->advertised; | |
1990 | eee->tx_lpi_enabled = edata->tx_lpi_enabled; | |
1991 | eee->tx_lpi_timer = edata->tx_lpi_timer; | |
1992 | eee_ok: | |
1993 | eee->eee_enabled = edata->eee_enabled; | |
1994 | ||
1995 | if (netif_running(dev)) | |
1996 | rc = bnxt_hwrm_set_link_setting(bp, false, true); | |
1997 | ||
1998 | return rc; | |
1999 | } | |
2000 | ||
2001 | static int bnxt_get_eee(struct net_device *dev, struct ethtool_eee *edata) | |
2002 | { | |
2003 | struct bnxt *bp = netdev_priv(dev); | |
2004 | ||
2005 | if (!(bp->flags & BNXT_FLAG_EEE_CAP)) | |
2006 | return -EOPNOTSUPP; | |
2007 | ||
2008 | *edata = bp->eee; | |
2009 | if (!bp->eee.eee_enabled) { | |
2010 | /* Preserve tx_lpi_timer so that the last value will be used | |
2011 | * by default when it is re-enabled. | |
2012 | */ | |
2013 | edata->advertised = 0; | |
2014 | edata->tx_lpi_enabled = 0; | |
2015 | } | |
2016 | ||
2017 | if (!bp->eee.eee_active) | |
2018 | edata->lp_advertised = 0; | |
2019 | ||
2020 | return 0; | |
2021 | } | |
2022 | ||
42ee18fe AK |
2023 | static int bnxt_read_sfp_module_eeprom_info(struct bnxt *bp, u16 i2c_addr, |
2024 | u16 page_number, u16 start_addr, | |
2025 | u16 data_length, u8 *buf) | |
2026 | { | |
2027 | struct hwrm_port_phy_i2c_read_input req = {0}; | |
2028 | struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr; | |
2029 | int rc, byte_offset = 0; | |
2030 | ||
2031 | bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1); | |
2032 | req.i2c_slave_addr = i2c_addr; | |
2033 | req.page_number = cpu_to_le16(page_number); | |
2034 | req.port_id = cpu_to_le16(bp->pf.port_id); | |
2035 | do { | |
2036 | u16 xfer_size; | |
2037 | ||
2038 | xfer_size = min_t(u16, data_length, BNXT_MAX_PHY_I2C_RESP_SIZE); | |
2039 | data_length -= xfer_size; | |
2040 | req.page_offset = cpu_to_le16(start_addr + byte_offset); | |
2041 | req.data_length = xfer_size; | |
2042 | req.enables = cpu_to_le32(start_addr + byte_offset ? | |
2043 | PORT_PHY_I2C_READ_REQ_ENABLES_PAGE_OFFSET : 0); | |
2044 | mutex_lock(&bp->hwrm_cmd_lock); | |
2045 | rc = _hwrm_send_message(bp, &req, sizeof(req), | |
2046 | HWRM_CMD_TIMEOUT); | |
2047 | if (!rc) | |
2048 | memcpy(buf + byte_offset, output->data, xfer_size); | |
2049 | mutex_unlock(&bp->hwrm_cmd_lock); | |
2050 | byte_offset += xfer_size; | |
2051 | } while (!rc && data_length > 0); | |
2052 | ||
2053 | return rc; | |
2054 | } | |
2055 | ||
2056 | static int bnxt_get_module_info(struct net_device *dev, | |
2057 | struct ethtool_modinfo *modinfo) | |
2058 | { | |
2059 | struct bnxt *bp = netdev_priv(dev); | |
2060 | struct hwrm_port_phy_i2c_read_input req = {0}; | |
2061 | struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr; | |
2062 | int rc; | |
2063 | ||
2064 | /* No point in going further if phy status indicates | |
2065 | * module is not inserted or if it is powered down or | |
2066 | * if it is of type 10GBase-T | |
2067 | */ | |
2068 | if (bp->link_info.module_status > | |
2069 | PORT_PHY_QCFG_RESP_MODULE_STATUS_WARNINGMSG) | |
2070 | return -EOPNOTSUPP; | |
2071 | ||
2072 | /* This feature is not supported in older firmware versions */ | |
2073 | if (bp->hwrm_spec_code < 0x10202) | |
2074 | return -EOPNOTSUPP; | |
2075 | ||
2076 | bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1); | |
2077 | req.i2c_slave_addr = I2C_DEV_ADDR_A0; | |
2078 | req.page_number = 0; | |
2079 | req.page_offset = cpu_to_le16(SFP_EEPROM_SFF_8472_COMP_ADDR); | |
2080 | req.data_length = SFP_EEPROM_SFF_8472_COMP_SIZE; | |
2081 | req.port_id = cpu_to_le16(bp->pf.port_id); | |
2082 | mutex_lock(&bp->hwrm_cmd_lock); | |
2083 | rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); | |
2084 | if (!rc) { | |
2085 | u32 module_id = le32_to_cpu(output->data[0]); | |
2086 | ||
2087 | switch (module_id) { | |
2088 | case SFF_MODULE_ID_SFP: | |
2089 | modinfo->type = ETH_MODULE_SFF_8472; | |
2090 | modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; | |
2091 | break; | |
2092 | case SFF_MODULE_ID_QSFP: | |
2093 | case SFF_MODULE_ID_QSFP_PLUS: | |
2094 | modinfo->type = ETH_MODULE_SFF_8436; | |
2095 | modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN; | |
2096 | break; | |
2097 | case SFF_MODULE_ID_QSFP28: | |
2098 | modinfo->type = ETH_MODULE_SFF_8636; | |
2099 | modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN; | |
2100 | break; | |
2101 | default: | |
2102 | rc = -EOPNOTSUPP; | |
2103 | break; | |
2104 | } | |
2105 | } | |
2106 | mutex_unlock(&bp->hwrm_cmd_lock); | |
2107 | return rc; | |
2108 | } | |
2109 | ||
2110 | static int bnxt_get_module_eeprom(struct net_device *dev, | |
2111 | struct ethtool_eeprom *eeprom, | |
2112 | u8 *data) | |
2113 | { | |
2114 | struct bnxt *bp = netdev_priv(dev); | |
2115 | u16 start = eeprom->offset, length = eeprom->len; | |
f3ea3119 | 2116 | int rc = 0; |
42ee18fe AK |
2117 | |
2118 | memset(data, 0, eeprom->len); | |
2119 | ||
2120 | /* Read A0 portion of the EEPROM */ | |
2121 | if (start < ETH_MODULE_SFF_8436_LEN) { | |
2122 | if (start + eeprom->len > ETH_MODULE_SFF_8436_LEN) | |
2123 | length = ETH_MODULE_SFF_8436_LEN - start; | |
2124 | rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0, | |
2125 | start, length, data); | |
2126 | if (rc) | |
2127 | return rc; | |
2128 | start += length; | |
2129 | data += length; | |
2130 | length = eeprom->len - length; | |
2131 | } | |
2132 | ||
2133 | /* Read A2 portion of the EEPROM */ | |
2134 | if (length) { | |
2135 | start -= ETH_MODULE_SFF_8436_LEN; | |
2136 | bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A2, 1, start, | |
2137 | length, data); | |
2138 | } | |
2139 | return rc; | |
2140 | } | |
2141 | ||
ae8e98a6 DK |
2142 | static int bnxt_nway_reset(struct net_device *dev) |
2143 | { | |
2144 | int rc = 0; | |
2145 | ||
2146 | struct bnxt *bp = netdev_priv(dev); | |
2147 | struct bnxt_link_info *link_info = &bp->link_info; | |
2148 | ||
2149 | if (!BNXT_SINGLE_PF(bp)) | |
2150 | return -EOPNOTSUPP; | |
2151 | ||
2152 | if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) | |
2153 | return -EINVAL; | |
2154 | ||
2155 | if (netif_running(dev)) | |
2156 | rc = bnxt_hwrm_set_link_setting(bp, true, false); | |
2157 | ||
2158 | return rc; | |
2159 | } | |
2160 | ||
5ad2cbee MC |
2161 | static int bnxt_set_phys_id(struct net_device *dev, |
2162 | enum ethtool_phys_id_state state) | |
2163 | { | |
2164 | struct hwrm_port_led_cfg_input req = {0}; | |
2165 | struct bnxt *bp = netdev_priv(dev); | |
2166 | struct bnxt_pf_info *pf = &bp->pf; | |
2167 | struct bnxt_led_cfg *led_cfg; | |
2168 | u8 led_state; | |
2169 | __le16 duration; | |
2170 | int i, rc; | |
2171 | ||
2172 | if (!bp->num_leds || BNXT_VF(bp)) | |
2173 | return -EOPNOTSUPP; | |
2174 | ||
2175 | if (state == ETHTOOL_ID_ACTIVE) { | |
2176 | led_state = PORT_LED_CFG_REQ_LED0_STATE_BLINKALT; | |
2177 | duration = cpu_to_le16(500); | |
2178 | } else if (state == ETHTOOL_ID_INACTIVE) { | |
2179 | led_state = PORT_LED_CFG_REQ_LED1_STATE_DEFAULT; | |
2180 | duration = cpu_to_le16(0); | |
2181 | } else { | |
2182 | return -EINVAL; | |
2183 | } | |
2184 | bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_LED_CFG, -1, -1); | |
2185 | req.port_id = cpu_to_le16(pf->port_id); | |
2186 | req.num_leds = bp->num_leds; | |
2187 | led_cfg = (struct bnxt_led_cfg *)&req.led0_id; | |
2188 | for (i = 0; i < bp->num_leds; i++, led_cfg++) { | |
2189 | req.enables |= BNXT_LED_DFLT_ENABLES(i); | |
2190 | led_cfg->led_id = bp->leds[i].led_id; | |
2191 | led_cfg->led_state = led_state; | |
2192 | led_cfg->led_blink_on = duration; | |
2193 | led_cfg->led_blink_off = duration; | |
2194 | led_cfg->led_group_id = bp->leds[i].led_group_id; | |
2195 | } | |
2196 | rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); | |
2197 | if (rc) | |
2198 | rc = -EIO; | |
2199 | return rc; | |
2200 | } | |
2201 | ||
67fea463 MC |
2202 | static int bnxt_hwrm_selftest_irq(struct bnxt *bp, u16 cmpl_ring) |
2203 | { | |
2204 | struct hwrm_selftest_irq_input req = {0}; | |
2205 | ||
2206 | bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_IRQ, cmpl_ring, -1); | |
2207 | return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); | |
2208 | } | |
2209 | ||
2210 | static int bnxt_test_irq(struct bnxt *bp) | |
2211 | { | |
2212 | int i; | |
2213 | ||
2214 | for (i = 0; i < bp->cp_nr_rings; i++) { | |
2215 | u16 cmpl_ring = bp->grp_info[i].cp_fw_ring_id; | |
2216 | int rc; | |
2217 | ||
2218 | rc = bnxt_hwrm_selftest_irq(bp, cmpl_ring); | |
2219 | if (rc) | |
2220 | return rc; | |
2221 | } | |
2222 | return 0; | |
2223 | } | |
2224 | ||
f7dc1ea6 MC |
2225 | static int bnxt_hwrm_mac_loopback(struct bnxt *bp, bool enable) |
2226 | { | |
2227 | struct hwrm_port_mac_cfg_input req = {0}; | |
2228 | ||
2229 | bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_MAC_CFG, -1, -1); | |
2230 | ||
2231 | req.enables = cpu_to_le32(PORT_MAC_CFG_REQ_ENABLES_LPBK); | |
2232 | if (enable) | |
2233 | req.lpbk = PORT_MAC_CFG_REQ_LPBK_LOCAL; | |
2234 | else | |
2235 | req.lpbk = PORT_MAC_CFG_REQ_LPBK_NONE; | |
2236 | return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); | |
2237 | } | |
2238 | ||
91725d89 MC |
2239 | static int bnxt_disable_an_for_lpbk(struct bnxt *bp, |
2240 | struct hwrm_port_phy_cfg_input *req) | |
2241 | { | |
2242 | struct bnxt_link_info *link_info = &bp->link_info; | |
2243 | u16 fw_advertising = link_info->advertising; | |
2244 | u16 fw_speed; | |
2245 | int rc; | |
2246 | ||
2247 | if (!link_info->autoneg) | |
2248 | return 0; | |
2249 | ||
2250 | fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_1GB; | |
2251 | if (netif_carrier_ok(bp->dev)) | |
2252 | fw_speed = bp->link_info.link_speed; | |
2253 | else if (fw_advertising & BNXT_LINK_SPEED_MSK_10GB) | |
2254 | fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_10GB; | |
2255 | else if (fw_advertising & BNXT_LINK_SPEED_MSK_25GB) | |
2256 | fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_25GB; | |
2257 | else if (fw_advertising & BNXT_LINK_SPEED_MSK_40GB) | |
2258 | fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_40GB; | |
2259 | else if (fw_advertising & BNXT_LINK_SPEED_MSK_50GB) | |
2260 | fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_50GB; | |
2261 | ||
2262 | req->force_link_speed = cpu_to_le16(fw_speed); | |
2263 | req->flags |= cpu_to_le32(PORT_PHY_CFG_REQ_FLAGS_FORCE | | |
2264 | PORT_PHY_CFG_REQ_FLAGS_RESET_PHY); | |
2265 | rc = hwrm_send_message(bp, req, sizeof(*req), HWRM_CMD_TIMEOUT); | |
2266 | req->flags = 0; | |
2267 | req->force_link_speed = cpu_to_le16(0); | |
2268 | return rc; | |
2269 | } | |
2270 | ||
2271 | static int bnxt_hwrm_phy_loopback(struct bnxt *bp, bool enable) | |
2272 | { | |
2273 | struct hwrm_port_phy_cfg_input req = {0}; | |
2274 | ||
2275 | bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_CFG, -1, -1); | |
2276 | ||
2277 | if (enable) { | |
2278 | bnxt_disable_an_for_lpbk(bp, &req); | |
2279 | req.lpbk = PORT_PHY_CFG_REQ_LPBK_LOCAL; | |
2280 | } else { | |
2281 | req.lpbk = PORT_PHY_CFG_REQ_LPBK_NONE; | |
2282 | } | |
2283 | req.enables = cpu_to_le32(PORT_PHY_CFG_REQ_ENABLES_LPBK); | |
2284 | return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); | |
2285 | } | |
2286 | ||
f7dc1ea6 MC |
2287 | static int bnxt_rx_loopback(struct bnxt *bp, struct bnxt_napi *bnapi, |
2288 | u32 raw_cons, int pkt_size) | |
2289 | { | |
2290 | struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; | |
2291 | struct bnxt_rx_ring_info *rxr = bnapi->rx_ring; | |
2292 | struct bnxt_sw_rx_bd *rx_buf; | |
2293 | struct rx_cmp *rxcmp; | |
2294 | u16 cp_cons, cons; | |
2295 | u8 *data; | |
2296 | u32 len; | |
2297 | int i; | |
2298 | ||
2299 | cp_cons = RING_CMP(raw_cons); | |
2300 | rxcmp = (struct rx_cmp *) | |
2301 | &cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)]; | |
2302 | cons = rxcmp->rx_cmp_opaque; | |
2303 | rx_buf = &rxr->rx_buf_ring[cons]; | |
2304 | data = rx_buf->data_ptr; | |
2305 | len = le32_to_cpu(rxcmp->rx_cmp_len_flags_type) >> RX_CMP_LEN_SHIFT; | |
2306 | if (len != pkt_size) | |
2307 | return -EIO; | |
2308 | i = ETH_ALEN; | |
2309 | if (!ether_addr_equal(data + i, bnapi->bp->dev->dev_addr)) | |
2310 | return -EIO; | |
2311 | i += ETH_ALEN; | |
2312 | for ( ; i < pkt_size; i++) { | |
2313 | if (data[i] != (u8)(i & 0xff)) | |
2314 | return -EIO; | |
2315 | } | |
2316 | return 0; | |
2317 | } | |
2318 | ||
2319 | static int bnxt_poll_loopback(struct bnxt *bp, int pkt_size) | |
2320 | { | |
2321 | struct bnxt_napi *bnapi = bp->bnapi[0]; | |
2322 | struct bnxt_cp_ring_info *cpr; | |
2323 | struct tx_cmp *txcmp; | |
2324 | int rc = -EIO; | |
2325 | u32 raw_cons; | |
2326 | u32 cons; | |
2327 | int i; | |
2328 | ||
2329 | cpr = &bnapi->cp_ring; | |
2330 | raw_cons = cpr->cp_raw_cons; | |
2331 | for (i = 0; i < 200; i++) { | |
2332 | cons = RING_CMP(raw_cons); | |
2333 | txcmp = &cpr->cp_desc_ring[CP_RING(cons)][CP_IDX(cons)]; | |
2334 | ||
2335 | if (!TX_CMP_VALID(txcmp, raw_cons)) { | |
2336 | udelay(5); | |
2337 | continue; | |
2338 | } | |
2339 | ||
2340 | /* The valid test of the entry must be done first before | |
2341 | * reading any further. | |
2342 | */ | |
2343 | dma_rmb(); | |
2344 | if (TX_CMP_TYPE(txcmp) == CMP_TYPE_RX_L2_CMP) { | |
2345 | rc = bnxt_rx_loopback(bp, bnapi, raw_cons, pkt_size); | |
2346 | raw_cons = NEXT_RAW_CMP(raw_cons); | |
2347 | raw_cons = NEXT_RAW_CMP(raw_cons); | |
2348 | break; | |
2349 | } | |
2350 | raw_cons = NEXT_RAW_CMP(raw_cons); | |
2351 | } | |
2352 | cpr->cp_raw_cons = raw_cons; | |
2353 | return rc; | |
2354 | } | |
2355 | ||
2356 | static int bnxt_run_loopback(struct bnxt *bp) | |
2357 | { | |
2358 | struct bnxt_tx_ring_info *txr = &bp->tx_ring[0]; | |
2359 | int pkt_size, i = 0; | |
2360 | struct sk_buff *skb; | |
2361 | dma_addr_t map; | |
2362 | u8 *data; | |
2363 | int rc; | |
2364 | ||
2365 | pkt_size = min(bp->dev->mtu + ETH_HLEN, bp->rx_copy_thresh); | |
2366 | skb = netdev_alloc_skb(bp->dev, pkt_size); | |
2367 | if (!skb) | |
2368 | return -ENOMEM; | |
2369 | data = skb_put(skb, pkt_size); | |
2370 | eth_broadcast_addr(data); | |
2371 | i += ETH_ALEN; | |
2372 | ether_addr_copy(&data[i], bp->dev->dev_addr); | |
2373 | i += ETH_ALEN; | |
2374 | for ( ; i < pkt_size; i++) | |
2375 | data[i] = (u8)(i & 0xff); | |
2376 | ||
2377 | map = dma_map_single(&bp->pdev->dev, skb->data, pkt_size, | |
2378 | PCI_DMA_TODEVICE); | |
2379 | if (dma_mapping_error(&bp->pdev->dev, map)) { | |
2380 | dev_kfree_skb(skb); | |
2381 | return -EIO; | |
2382 | } | |
2383 | bnxt_xmit_xdp(bp, txr, map, pkt_size, 0); | |
2384 | ||
2385 | /* Sync BD data before updating doorbell */ | |
2386 | wmb(); | |
2387 | ||
434c975a | 2388 | bnxt_db_write(bp, txr->tx_doorbell, DB_KEY_TX | txr->tx_prod); |
f7dc1ea6 MC |
2389 | rc = bnxt_poll_loopback(bp, pkt_size); |
2390 | ||
2391 | dma_unmap_single(&bp->pdev->dev, map, pkt_size, PCI_DMA_TODEVICE); | |
2392 | dev_kfree_skb(skb); | |
2393 | return rc; | |
2394 | } | |
2395 | ||
eb513658 MC |
2396 | static int bnxt_run_fw_tests(struct bnxt *bp, u8 test_mask, u8 *test_results) |
2397 | { | |
2398 | struct hwrm_selftest_exec_output *resp = bp->hwrm_cmd_resp_addr; | |
2399 | struct hwrm_selftest_exec_input req = {0}; | |
2400 | int rc; | |
2401 | ||
2402 | bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_EXEC, -1, -1); | |
2403 | mutex_lock(&bp->hwrm_cmd_lock); | |
2404 | resp->test_success = 0; | |
2405 | req.flags = test_mask; | |
2406 | rc = _hwrm_send_message(bp, &req, sizeof(req), bp->test_info->timeout); | |
2407 | *test_results = resp->test_success; | |
2408 | mutex_unlock(&bp->hwrm_cmd_lock); | |
2409 | return rc; | |
2410 | } | |
2411 | ||
67fea463 | 2412 | #define BNXT_DRV_TESTS 3 |
f7dc1ea6 | 2413 | #define BNXT_MACLPBK_TEST_IDX (bp->num_tests - BNXT_DRV_TESTS) |
91725d89 | 2414 | #define BNXT_PHYLPBK_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 1) |
67fea463 | 2415 | #define BNXT_IRQ_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 2) |
eb513658 MC |
2416 | |
2417 | static void bnxt_self_test(struct net_device *dev, struct ethtool_test *etest, | |
2418 | u64 *buf) | |
2419 | { | |
2420 | struct bnxt *bp = netdev_priv(dev); | |
2421 | bool offline = false; | |
2422 | u8 test_results = 0; | |
2423 | u8 test_mask = 0; | |
2424 | int rc, i; | |
2425 | ||
2426 | if (!bp->num_tests || !BNXT_SINGLE_PF(bp)) | |
2427 | return; | |
2428 | memset(buf, 0, sizeof(u64) * bp->num_tests); | |
2429 | if (!netif_running(dev)) { | |
2430 | etest->flags |= ETH_TEST_FL_FAILED; | |
2431 | return; | |
2432 | } | |
2433 | ||
2434 | if (etest->flags & ETH_TEST_FL_OFFLINE) { | |
2435 | if (bp->pf.active_vfs) { | |
2436 | etest->flags |= ETH_TEST_FL_FAILED; | |
2437 | netdev_warn(dev, "Offline tests cannot be run with active VFs\n"); | |
2438 | return; | |
2439 | } | |
2440 | offline = true; | |
2441 | } | |
2442 | ||
2443 | for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) { | |
2444 | u8 bit_val = 1 << i; | |
2445 | ||
2446 | if (!(bp->test_info->offline_mask & bit_val)) | |
2447 | test_mask |= bit_val; | |
2448 | else if (offline) | |
2449 | test_mask |= bit_val; | |
2450 | } | |
2451 | if (!offline) { | |
2452 | bnxt_run_fw_tests(bp, test_mask, &test_results); | |
2453 | } else { | |
2454 | rc = bnxt_close_nic(bp, false, false); | |
2455 | if (rc) | |
2456 | return; | |
2457 | bnxt_run_fw_tests(bp, test_mask, &test_results); | |
f7dc1ea6 MC |
2458 | |
2459 | buf[BNXT_MACLPBK_TEST_IDX] = 1; | |
2460 | bnxt_hwrm_mac_loopback(bp, true); | |
2461 | msleep(250); | |
2462 | rc = bnxt_half_open_nic(bp); | |
2463 | if (rc) { | |
2464 | bnxt_hwrm_mac_loopback(bp, false); | |
2465 | etest->flags |= ETH_TEST_FL_FAILED; | |
2466 | return; | |
2467 | } | |
2468 | if (bnxt_run_loopback(bp)) | |
2469 | etest->flags |= ETH_TEST_FL_FAILED; | |
2470 | else | |
2471 | buf[BNXT_MACLPBK_TEST_IDX] = 0; | |
2472 | ||
f7dc1ea6 | 2473 | bnxt_hwrm_mac_loopback(bp, false); |
91725d89 MC |
2474 | bnxt_hwrm_phy_loopback(bp, true); |
2475 | msleep(1000); | |
2476 | if (bnxt_run_loopback(bp)) { | |
2477 | buf[BNXT_PHYLPBK_TEST_IDX] = 1; | |
2478 | etest->flags |= ETH_TEST_FL_FAILED; | |
2479 | } | |
2480 | bnxt_hwrm_phy_loopback(bp, false); | |
2481 | bnxt_half_close_nic(bp); | |
eb513658 MC |
2482 | bnxt_open_nic(bp, false, true); |
2483 | } | |
67fea463 MC |
2484 | if (bnxt_test_irq(bp)) { |
2485 | buf[BNXT_IRQ_TEST_IDX] = 1; | |
2486 | etest->flags |= ETH_TEST_FL_FAILED; | |
2487 | } | |
eb513658 MC |
2488 | for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) { |
2489 | u8 bit_val = 1 << i; | |
2490 | ||
2491 | if ((test_mask & bit_val) && !(test_results & bit_val)) { | |
2492 | buf[i] = 1; | |
2493 | etest->flags |= ETH_TEST_FL_FAILED; | |
2494 | } | |
2495 | } | |
2496 | } | |
2497 | ||
2498 | void bnxt_ethtool_init(struct bnxt *bp) | |
2499 | { | |
2500 | struct hwrm_selftest_qlist_output *resp = bp->hwrm_cmd_resp_addr; | |
2501 | struct hwrm_selftest_qlist_input req = {0}; | |
2502 | struct bnxt_test_info *test_info; | |
2503 | int i, rc; | |
2504 | ||
2505 | if (bp->hwrm_spec_code < 0x10704 || !BNXT_SINGLE_PF(bp)) | |
2506 | return; | |
2507 | ||
2508 | bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_QLIST, -1, -1); | |
2509 | mutex_lock(&bp->hwrm_cmd_lock); | |
2510 | rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); | |
2511 | if (rc) | |
2512 | goto ethtool_init_exit; | |
2513 | ||
2514 | test_info = kzalloc(sizeof(*bp->test_info), GFP_KERNEL); | |
2515 | if (!test_info) | |
2516 | goto ethtool_init_exit; | |
2517 | ||
2518 | bp->test_info = test_info; | |
2519 | bp->num_tests = resp->num_tests + BNXT_DRV_TESTS; | |
2520 | if (bp->num_tests > BNXT_MAX_TEST) | |
2521 | bp->num_tests = BNXT_MAX_TEST; | |
2522 | ||
2523 | test_info->offline_mask = resp->offline_tests; | |
2524 | test_info->timeout = le16_to_cpu(resp->test_timeout); | |
2525 | if (!test_info->timeout) | |
2526 | test_info->timeout = HWRM_CMD_TIMEOUT; | |
2527 | for (i = 0; i < bp->num_tests; i++) { | |
2528 | char *str = test_info->string[i]; | |
2529 | char *fw_str = resp->test0_name + i * 32; | |
2530 | ||
f7dc1ea6 MC |
2531 | if (i == BNXT_MACLPBK_TEST_IDX) { |
2532 | strcpy(str, "Mac loopback test (offline)"); | |
91725d89 MC |
2533 | } else if (i == BNXT_PHYLPBK_TEST_IDX) { |
2534 | strcpy(str, "Phy loopback test (offline)"); | |
67fea463 MC |
2535 | } else if (i == BNXT_IRQ_TEST_IDX) { |
2536 | strcpy(str, "Interrupt_test (offline)"); | |
f7dc1ea6 MC |
2537 | } else { |
2538 | strlcpy(str, fw_str, ETH_GSTRING_LEN); | |
2539 | strncat(str, " test", ETH_GSTRING_LEN - strlen(str)); | |
2540 | if (test_info->offline_mask & (1 << i)) | |
2541 | strncat(str, " (offline)", | |
2542 | ETH_GSTRING_LEN - strlen(str)); | |
2543 | else | |
2544 | strncat(str, " (online)", | |
2545 | ETH_GSTRING_LEN - strlen(str)); | |
2546 | } | |
eb513658 MC |
2547 | } |
2548 | ||
2549 | ethtool_init_exit: | |
2550 | mutex_unlock(&bp->hwrm_cmd_lock); | |
2551 | } | |
2552 | ||
2553 | void bnxt_ethtool_free(struct bnxt *bp) | |
2554 | { | |
2555 | kfree(bp->test_info); | |
2556 | bp->test_info = NULL; | |
2557 | } | |
2558 | ||
c0c050c5 | 2559 | const struct ethtool_ops bnxt_ethtool_ops = { |
00c04a92 MC |
2560 | .get_link_ksettings = bnxt_get_link_ksettings, |
2561 | .set_link_ksettings = bnxt_set_link_ksettings, | |
c0c050c5 MC |
2562 | .get_pauseparam = bnxt_get_pauseparam, |
2563 | .set_pauseparam = bnxt_set_pauseparam, | |
2564 | .get_drvinfo = bnxt_get_drvinfo, | |
8e202366 | 2565 | .get_wol = bnxt_get_wol, |
5282db6c | 2566 | .set_wol = bnxt_set_wol, |
c0c050c5 MC |
2567 | .get_coalesce = bnxt_get_coalesce, |
2568 | .set_coalesce = bnxt_set_coalesce, | |
2569 | .get_msglevel = bnxt_get_msglevel, | |
2570 | .set_msglevel = bnxt_set_msglevel, | |
2571 | .get_sset_count = bnxt_get_sset_count, | |
2572 | .get_strings = bnxt_get_strings, | |
2573 | .get_ethtool_stats = bnxt_get_ethtool_stats, | |
2574 | .set_ringparam = bnxt_set_ringparam, | |
2575 | .get_ringparam = bnxt_get_ringparam, | |
2576 | .get_channels = bnxt_get_channels, | |
2577 | .set_channels = bnxt_set_channels, | |
c0c050c5 | 2578 | .get_rxnfc = bnxt_get_rxnfc, |
a011952a | 2579 | .set_rxnfc = bnxt_set_rxnfc, |
c0c050c5 MC |
2580 | .get_rxfh_indir_size = bnxt_get_rxfh_indir_size, |
2581 | .get_rxfh_key_size = bnxt_get_rxfh_key_size, | |
2582 | .get_rxfh = bnxt_get_rxfh, | |
2583 | .flash_device = bnxt_flash_device, | |
2584 | .get_eeprom_len = bnxt_get_eeprom_len, | |
2585 | .get_eeprom = bnxt_get_eeprom, | |
2586 | .set_eeprom = bnxt_set_eeprom, | |
2587 | .get_link = bnxt_get_link, | |
72b34f04 MC |
2588 | .get_eee = bnxt_get_eee, |
2589 | .set_eee = bnxt_set_eee, | |
42ee18fe AK |
2590 | .get_module_info = bnxt_get_module_info, |
2591 | .get_module_eeprom = bnxt_get_module_eeprom, | |
5ad2cbee MC |
2592 | .nway_reset = bnxt_nway_reset, |
2593 | .set_phys_id = bnxt_set_phys_id, | |
eb513658 | 2594 | .self_test = bnxt_self_test, |
c0c050c5 | 2595 | }; |