]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c
projects / mirror_ubuntu-artful-kernel.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
bnxt_en: Add interrupt test to ethtool -t selftest.
[mirror_ubuntu-artful-kernel.git] / drivers / net / ethernet / broadcom / bnxt / bnxt_ethtool.c
CommitLineData
c0c050c5
MC		 1/* Broadcom NetXtreme-C/E network driver.
2 *
11f15ed3 3 * Copyright (c) 2014-2016 Broadcom Corporation
8e202366 4 * Copyright (c) 2016-2017 Broadcom Limited
c0c050c5
MC		 5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation.
9 */
10
3ebf6f0a 11#include <linux/ctype.h>
8ddc9aaa 12#include <linux/stringify.h>
c0c050c5
MC		 13#include <linux/ethtool.h>
14#include <linux/interrupt.h>
15#include <linux/pci.h>
16#include <linux/etherdevice.h>
17#include <linux/crc32.h>
18#include <linux/firmware.h>
19#include "bnxt_hsi.h"
20#include "bnxt.h"
f7dc1ea6 21#include "bnxt_xdp.h"
c0c050c5
MC		 22#include "bnxt_ethtool.h"
23#include "bnxt_nvm_defs.h" /* NVRAM content constant and structure defs */
24#include "bnxt_fw_hdr.h" /* Firmware hdr constant and structure defs */
25#define FLASH_NVRAM_TIMEOUT ((HWRM_CMD_TIMEOUT) * 100)
5ac67d8b
RS		 26#define FLASH_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200)
27#define INSTALL_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200)
c0c050c5 28
3ebf6f0a
RS		 29static char *bnxt_get_pkgver(struct net_device *dev, char *buf, size_t buflen);
30
c0c050c5
MC		 31static u32 bnxt_get_msglevel(struct net_device *dev)
32{
33 struct bnxt *bp = netdev_priv(dev);
34
35 return bp->msg_enable;
36}
37
38static void bnxt_set_msglevel(struct net_device *dev, u32 value)
39{
40 struct bnxt *bp = netdev_priv(dev);
41
42 bp->msg_enable = value;
43}
44
45static int bnxt_get_coalesce(struct net_device *dev,
46 struct ethtool_coalesce *coal)
47{
48 struct bnxt *bp = netdev_priv(dev);
49
50 memset(coal, 0, sizeof(*coal));
51
dfb5b894
MC		 52 coal->rx_coalesce_usecs = bp->rx_coal_ticks;
53 /* 2 completion records per rx packet */
54 coal->rx_max_coalesced_frames = bp->rx_coal_bufs / 2;
55 coal->rx_coalesce_usecs_irq = bp->rx_coal_ticks_irq;
56 coal->rx_max_coalesced_frames_irq = bp->rx_coal_bufs_irq / 2;
c0c050c5 57
dfc9c94a
MC		 58 coal->tx_coalesce_usecs = bp->tx_coal_ticks;
59 coal->tx_max_coalesced_frames = bp->tx_coal_bufs;
60 coal->tx_coalesce_usecs_irq = bp->tx_coal_ticks_irq;
61 coal->tx_max_coalesced_frames_irq = bp->tx_coal_bufs_irq;
62
51f30785
MC		 63 coal->stats_block_coalesce_usecs = bp->stats_coal_ticks;
64
c0c050c5
MC		 65 return 0;
66}
67
68static int bnxt_set_coalesce(struct net_device *dev,
69 struct ethtool_coalesce *coal)
70{
71 struct bnxt *bp = netdev_priv(dev);
51f30785 72 bool update_stats = false;
c0c050c5
MC		 73 int rc = 0;
74
dfb5b894
MC		 75 bp->rx_coal_ticks = coal->rx_coalesce_usecs;
76 /* 2 completion records per rx packet */
77 bp->rx_coal_bufs = coal->rx_max_coalesced_frames * 2;
78 bp->rx_coal_ticks_irq = coal->rx_coalesce_usecs_irq;
79 bp->rx_coal_bufs_irq = coal->rx_max_coalesced_frames_irq * 2;
c0c050c5 80
dfc9c94a
MC		 81 bp->tx_coal_ticks = coal->tx_coalesce_usecs;
82 bp->tx_coal_bufs = coal->tx_max_coalesced_frames;
83 bp->tx_coal_ticks_irq = coal->tx_coalesce_usecs_irq;
84 bp->tx_coal_bufs_irq = coal->tx_max_coalesced_frames_irq;
85
51f30785
MC		 86 if (bp->stats_coal_ticks != coal->stats_block_coalesce_usecs) {
87 u32 stats_ticks = coal->stats_block_coalesce_usecs;
88
89 stats_ticks = clamp_t(u32, stats_ticks,
90 BNXT_MIN_STATS_COAL_TICKS,
91 BNXT_MAX_STATS_COAL_TICKS);
92 stats_ticks = rounddown(stats_ticks, BNXT_MIN_STATS_COAL_TICKS);
93 bp->stats_coal_ticks = stats_ticks;
94 update_stats = true;
95 }
96
97 if (netif_running(dev)) {
98 if (update_stats) {
99 rc = bnxt_close_nic(bp, true, false);
100 if (!rc)
101 rc = bnxt_open_nic(bp, true, false);
102 } else {
103 rc = bnxt_hwrm_set_coal(bp);
104 }
105 }
c0c050c5
MC		 106
107 return rc;
108}
109
110#define BNXT_NUM_STATS 21
111
8ddc9aaa
MC		 112#define BNXT_RX_STATS_ENTRY(counter) \
113 { BNXT_RX_STATS_OFFSET(counter), __stringify(counter) }
114
8ddc9aaa
MC		 115#define BNXT_TX_STATS_ENTRY(counter) \
116 { BNXT_TX_STATS_OFFSET(counter), __stringify(counter) }
117
118static const struct {
119 long offset;
120 char string[ETH_GSTRING_LEN];
121} bnxt_port_stats_arr[] = {
122 BNXT_RX_STATS_ENTRY(rx_64b_frames),
123 BNXT_RX_STATS_ENTRY(rx_65b_127b_frames),
124 BNXT_RX_STATS_ENTRY(rx_128b_255b_frames),
125 BNXT_RX_STATS_ENTRY(rx_256b_511b_frames),
126 BNXT_RX_STATS_ENTRY(rx_512b_1023b_frames),
127 BNXT_RX_STATS_ENTRY(rx_1024b_1518_frames),
128 BNXT_RX_STATS_ENTRY(rx_good_vlan_frames),
129 BNXT_RX_STATS_ENTRY(rx_1519b_2047b_frames),
130 BNXT_RX_STATS_ENTRY(rx_2048b_4095b_frames),
131 BNXT_RX_STATS_ENTRY(rx_4096b_9216b_frames),
132 BNXT_RX_STATS_ENTRY(rx_9217b_16383b_frames),
133 BNXT_RX_STATS_ENTRY(rx_total_frames),
134 BNXT_RX_STATS_ENTRY(rx_ucast_frames),
135 BNXT_RX_STATS_ENTRY(rx_mcast_frames),
136 BNXT_RX_STATS_ENTRY(rx_bcast_frames),
137 BNXT_RX_STATS_ENTRY(rx_fcs_err_frames),
138 BNXT_RX_STATS_ENTRY(rx_ctrl_frames),
139 BNXT_RX_STATS_ENTRY(rx_pause_frames),
140 BNXT_RX_STATS_ENTRY(rx_pfc_frames),
141 BNXT_RX_STATS_ENTRY(rx_align_err_frames),
142 BNXT_RX_STATS_ENTRY(rx_ovrsz_frames),
143 BNXT_RX_STATS_ENTRY(rx_jbr_frames),
144 BNXT_RX_STATS_ENTRY(rx_mtu_err_frames),
145 BNXT_RX_STATS_ENTRY(rx_tagged_frames),
146 BNXT_RX_STATS_ENTRY(rx_double_tagged_frames),
147 BNXT_RX_STATS_ENTRY(rx_good_frames),
c77192f2
MC		 148 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri0),
149 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri1),
150 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri2),
151 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri3),
152 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri4),
153 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri5),
154 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri6),
155 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri7),
8ddc9aaa
MC		 156 BNXT_RX_STATS_ENTRY(rx_undrsz_frames),
157 BNXT_RX_STATS_ENTRY(rx_eee_lpi_events),
158 BNXT_RX_STATS_ENTRY(rx_eee_lpi_duration),
159 BNXT_RX_STATS_ENTRY(rx_bytes),
160 BNXT_RX_STATS_ENTRY(rx_runt_bytes),
161 BNXT_RX_STATS_ENTRY(rx_runt_frames),
162
163 BNXT_TX_STATS_ENTRY(tx_64b_frames),
164 BNXT_TX_STATS_ENTRY(tx_65b_127b_frames),
165 BNXT_TX_STATS_ENTRY(tx_128b_255b_frames),
166 BNXT_TX_STATS_ENTRY(tx_256b_511b_frames),
167 BNXT_TX_STATS_ENTRY(tx_512b_1023b_frames),
168 BNXT_TX_STATS_ENTRY(tx_1024b_1518_frames),
169 BNXT_TX_STATS_ENTRY(tx_good_vlan_frames),
170 BNXT_TX_STATS_ENTRY(tx_1519b_2047_frames),
171 BNXT_TX_STATS_ENTRY(tx_2048b_4095b_frames),
172 BNXT_TX_STATS_ENTRY(tx_4096b_9216b_frames),
173 BNXT_TX_STATS_ENTRY(tx_9217b_16383b_frames),
174 BNXT_TX_STATS_ENTRY(tx_good_frames),
175 BNXT_TX_STATS_ENTRY(tx_total_frames),
176 BNXT_TX_STATS_ENTRY(tx_ucast_frames),
177 BNXT_TX_STATS_ENTRY(tx_mcast_frames),
178 BNXT_TX_STATS_ENTRY(tx_bcast_frames),
179 BNXT_TX_STATS_ENTRY(tx_pause_frames),
180 BNXT_TX_STATS_ENTRY(tx_pfc_frames),
181 BNXT_TX_STATS_ENTRY(tx_jabber_frames),
182 BNXT_TX_STATS_ENTRY(tx_fcs_err_frames),
183 BNXT_TX_STATS_ENTRY(tx_err),
184 BNXT_TX_STATS_ENTRY(tx_fifo_underruns),
c77192f2
MC		 185 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri0),
186 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri1),
187 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri2),
188 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri3),
189 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri4),
190 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri5),
191 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri6),
192 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri7),
8ddc9aaa
MC		 193 BNXT_TX_STATS_ENTRY(tx_eee_lpi_events),
194 BNXT_TX_STATS_ENTRY(tx_eee_lpi_duration),
195 BNXT_TX_STATS_ENTRY(tx_total_collisions),
196 BNXT_TX_STATS_ENTRY(tx_bytes),
197};
198
199#define BNXT_NUM_PORT_STATS ARRAY_SIZE(bnxt_port_stats_arr)
200
c0c050c5
MC		 201static int bnxt_get_sset_count(struct net_device *dev, int sset)
202{
203 struct bnxt *bp = netdev_priv(dev);
204
205 switch (sset) {
8ddc9aaa
MC		 206 case ETH_SS_STATS: {
207 int num_stats = BNXT_NUM_STATS * bp->cp_nr_rings;
208
209 if (bp->flags & BNXT_FLAG_PORT_STATS)
210 num_stats += BNXT_NUM_PORT_STATS;
211
212 return num_stats;
213 }
eb513658
MC		 214 case ETH_SS_TEST:
215 if (!bp->num_tests)
216 return -EOPNOTSUPP;
217 return bp->num_tests;
c0c050c5
MC		 218 default:
219 return -EOPNOTSUPP;
220 }
221}
222
223static void bnxt_get_ethtool_stats(struct net_device *dev,
224 struct ethtool_stats *stats, u64 *buf)
225{
226 u32 i, j = 0;
227 struct bnxt *bp = netdev_priv(dev);
228 u32 buf_size = sizeof(struct ctx_hw_stats) * bp->cp_nr_rings;
229 u32 stat_fields = sizeof(struct ctx_hw_stats) / 8;
230
231 memset(buf, 0, buf_size);
232
233 if (!bp->bnapi)
234 return;
235
236 for (i = 0; i < bp->cp_nr_rings; i++) {
237 struct bnxt_napi *bnapi = bp->bnapi[i];
238 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;
239 __le64 *hw_stats = (__le64 *)cpr->hw_stats;
240 int k;
241
242 for (k = 0; k < stat_fields; j++, k++)
243 buf[j] = le64_to_cpu(hw_stats[k]);
244 buf[j++] = cpr->rx_l4_csum_errors;
245 }
8ddc9aaa
MC		 246 if (bp->flags & BNXT_FLAG_PORT_STATS) {
247 __le64 *port_stats = (__le64 *)bp->hw_rx_port_stats;
248
249 for (i = 0; i < BNXT_NUM_PORT_STATS; i++, j++) {
250 buf[j] = le64_to_cpu(*(port_stats +
251 bnxt_port_stats_arr[i].offset));
252 }
253 }
c0c050c5
MC		 254}
255
256static void bnxt_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
257{
258 struct bnxt *bp = netdev_priv(dev);
259 u32 i;
260
261 switch (stringset) {
262 /* The number of strings must match BNXT_NUM_STATS defined above. */
263 case ETH_SS_STATS:
264 for (i = 0; i < bp->cp_nr_rings; i++) {
265 sprintf(buf, "[%d]: rx_ucast_packets", i);
266 buf += ETH_GSTRING_LEN;
267 sprintf(buf, "[%d]: rx_mcast_packets", i);
268 buf += ETH_GSTRING_LEN;
269 sprintf(buf, "[%d]: rx_bcast_packets", i);
270 buf += ETH_GSTRING_LEN;
271 sprintf(buf, "[%d]: rx_discards", i);
272 buf += ETH_GSTRING_LEN;
273 sprintf(buf, "[%d]: rx_drops", i);
274 buf += ETH_GSTRING_LEN;
275 sprintf(buf, "[%d]: rx_ucast_bytes", i);
276 buf += ETH_GSTRING_LEN;
277 sprintf(buf, "[%d]: rx_mcast_bytes", i);
278 buf += ETH_GSTRING_LEN;
279 sprintf(buf, "[%d]: rx_bcast_bytes", i);
280 buf += ETH_GSTRING_LEN;
281 sprintf(buf, "[%d]: tx_ucast_packets", i);
282 buf += ETH_GSTRING_LEN;
283 sprintf(buf, "[%d]: tx_mcast_packets", i);
284 buf += ETH_GSTRING_LEN;
285 sprintf(buf, "[%d]: tx_bcast_packets", i);
286 buf += ETH_GSTRING_LEN;
287 sprintf(buf, "[%d]: tx_discards", i);
288 buf += ETH_GSTRING_LEN;
289 sprintf(buf, "[%d]: tx_drops", i);
290 buf += ETH_GSTRING_LEN;
291 sprintf(buf, "[%d]: tx_ucast_bytes", i);
292 buf += ETH_GSTRING_LEN;
293 sprintf(buf, "[%d]: tx_mcast_bytes", i);
294 buf += ETH_GSTRING_LEN;
295 sprintf(buf, "[%d]: tx_bcast_bytes", i);
296 buf += ETH_GSTRING_LEN;
297 sprintf(buf, "[%d]: tpa_packets", i);
298 buf += ETH_GSTRING_LEN;
299 sprintf(buf, "[%d]: tpa_bytes", i);
300 buf += ETH_GSTRING_LEN;
301 sprintf(buf, "[%d]: tpa_events", i);
302 buf += ETH_GSTRING_LEN;
303 sprintf(buf, "[%d]: tpa_aborts", i);
304 buf += ETH_GSTRING_LEN;
305 sprintf(buf, "[%d]: rx_l4_csum_errors", i);
306 buf += ETH_GSTRING_LEN;
307 }
8ddc9aaa
MC		 308 if (bp->flags & BNXT_FLAG_PORT_STATS) {
309 for (i = 0; i < BNXT_NUM_PORT_STATS; i++) {
310 strcpy(buf, bnxt_port_stats_arr[i].string);
311 buf += ETH_GSTRING_LEN;
312 }
313 }
c0c050c5 314 break;
eb513658
MC		 315 case ETH_SS_TEST:
316 if (bp->num_tests)
317 memcpy(buf, bp->test_info->string,
318 bp->num_tests * ETH_GSTRING_LEN);
319 break;
c0c050c5
MC		 320 default:
321 netdev_err(bp->dev, "bnxt_get_strings invalid request %x\n",
322 stringset);
323 break;
324 }
325}
326
327static void bnxt_get_ringparam(struct net_device *dev,
328 struct ethtool_ringparam *ering)
329{
330 struct bnxt *bp = netdev_priv(dev);
331
332 ering->rx_max_pending = BNXT_MAX_RX_DESC_CNT;
333 ering->rx_jumbo_max_pending = BNXT_MAX_RX_JUM_DESC_CNT;
334 ering->tx_max_pending = BNXT_MAX_TX_DESC_CNT;
335
336 ering->rx_pending = bp->rx_ring_size;
337 ering->rx_jumbo_pending = bp->rx_agg_ring_size;
338 ering->tx_pending = bp->tx_ring_size;
339}
340
341static int bnxt_set_ringparam(struct net_device *dev,
342 struct ethtool_ringparam *ering)
343{
344 struct bnxt *bp = netdev_priv(dev);
345
346 if ((ering->rx_pending > BNXT_MAX_RX_DESC_CNT) ||
347 (ering->tx_pending > BNXT_MAX_TX_DESC_CNT) ||
348 (ering->tx_pending <= MAX_SKB_FRAGS))
349 return -EINVAL;
350
351 if (netif_running(dev))
352 bnxt_close_nic(bp, false, false);
353
354 bp->rx_ring_size = ering->rx_pending;
355 bp->tx_ring_size = ering->tx_pending;
356 bnxt_set_ring_params(bp);
357
358 if (netif_running(dev))
359 return bnxt_open_nic(bp, false, false);
360
361 return 0;
362}
363
364static void bnxt_get_channels(struct net_device *dev,
365 struct ethtool_channels *channel)
366{
367 struct bnxt *bp = netdev_priv(dev);
368 int max_rx_rings, max_tx_rings, tcs;
369
6e6c5a57 370 bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, true);
a79a5276 371 channel->max_combined = min_t(int, max_rx_rings, max_tx_rings);
068c9ec6 372
18d6e4e2
SB		 373 if (bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, false)) {
374 max_rx_rings = 0;
375 max_tx_rings = 0;
376 }
377
c0c050c5
MC		 378 tcs = netdev_get_num_tc(dev);
379 if (tcs > 1)
380 max_tx_rings /= tcs;
381
382 channel->max_rx = max_rx_rings;
383 channel->max_tx = max_tx_rings;
384 channel->max_other = 0;
068c9ec6
MC		 385 if (bp->flags & BNXT_FLAG_SHARED_RINGS) {
386 channel->combined_count = bp->rx_nr_rings;
76595193
PS		 387 if (BNXT_CHIP_TYPE_NITRO_A0(bp))
388 channel->combined_count--;
068c9ec6 389 } else {
76595193
PS		 390 if (!BNXT_CHIP_TYPE_NITRO_A0(bp)) {
391 channel->rx_count = bp->rx_nr_rings;
392 channel->tx_count = bp->tx_nr_rings_per_tc;
393 }
068c9ec6 394 }
c0c050c5
MC		 395}
396
397static int bnxt_set_channels(struct net_device *dev,
398 struct ethtool_channels *channel)
399{
400 struct bnxt *bp = netdev_priv(dev);
d1e7925e 401 int req_tx_rings, req_rx_rings, tcs;
068c9ec6 402 bool sh = false;
5f449249 403 int tx_xdp = 0;
d1e7925e 404 int rc = 0;
c0c050c5 405
068c9ec6 406 if (channel->other_count)
c0c050c5
MC		 407 return -EINVAL;
408
068c9ec6
MC		 409 if (!channel->combined_count &&
410 (!channel->rx_count || !channel->tx_count))
411 return -EINVAL;
412
413 if (channel->combined_count &&
414 (channel->rx_count || channel->tx_count))
415 return -EINVAL;
416
76595193
PS		 417 if (BNXT_CHIP_TYPE_NITRO_A0(bp) && (channel->rx_count ||
418 channel->tx_count))
419 return -EINVAL;
420
068c9ec6
MC		 421 if (channel->combined_count)
422 sh = true;
423
c0c050c5 424 tcs = netdev_get_num_tc(dev);
c0c050c5 425
391be5c2 426 req_tx_rings = sh ? channel->combined_count : channel->tx_count;
d1e7925e 427 req_rx_rings = sh ? channel->combined_count : channel->rx_count;
5f449249
MC		 428 if (bp->tx_nr_rings_xdp) {
429 if (!sh) {
430 netdev_err(dev, "Only combined mode supported when XDP is enabled.\n");
431 return -EINVAL;
432 }
433 tx_xdp = req_rx_rings;
434 }
435 rc = bnxt_reserve_rings(bp, req_tx_rings, req_rx_rings, tcs, tx_xdp);
d1e7925e
MC		 436 if (rc) {
437 netdev_warn(dev, "Unable to allocate the requested rings\n");
438 return rc;
391be5c2
MC		 439 }
440
c0c050c5
MC		 441 if (netif_running(dev)) {
442 if (BNXT_PF(bp)) {
443 /* TODO CHIMP_FW: Send message to all VF's
444 * before PF unload
445 */
446 }
447 rc = bnxt_close_nic(bp, true, false);
448 if (rc) {
449 netdev_err(bp->dev, "Set channel failure rc :%x\n",
450 rc);
451 return rc;
452 }
453 }
454
068c9ec6
MC		 455 if (sh) {
456 bp->flags |= BNXT_FLAG_SHARED_RINGS;
d1e7925e
MC		 457 bp->rx_nr_rings = channel->combined_count;
458 bp->tx_nr_rings_per_tc = channel->combined_count;
068c9ec6
MC		 459 } else {
460 bp->flags &= ~BNXT_FLAG_SHARED_RINGS;
461 bp->rx_nr_rings = channel->rx_count;
462 bp->tx_nr_rings_per_tc = channel->tx_count;
463 }
5f449249
MC		 464 bp->tx_nr_rings_xdp = tx_xdp;
465 bp->tx_nr_rings = bp->tx_nr_rings_per_tc + tx_xdp;
c0c050c5 466 if (tcs > 1)
5f449249 467 bp->tx_nr_rings = bp->tx_nr_rings_per_tc * tcs + tx_xdp;
068c9ec6
MC		 468
469 bp->cp_nr_rings = sh ? max_t(int, bp->tx_nr_rings, bp->rx_nr_rings) :
470 bp->tx_nr_rings + bp->rx_nr_rings;
471
c0c050c5
MC		 472 bp->num_stat_ctxs = bp->cp_nr_rings;
473
2bcfa6f6
MC		 474 /* After changing number of rx channels, update NTUPLE feature. */
475 netdev_update_features(dev);
c0c050c5
MC		 476 if (netif_running(dev)) {
477 rc = bnxt_open_nic(bp, true, false);
478 if ((!rc) && BNXT_PF(bp)) {
479 /* TODO CHIMP_FW: Send message to all VF's
480 * to renable
481 */
482 }
483 }
484
485 return rc;
486}
487
488#ifdef CONFIG_RFS_ACCEL
489static int bnxt_grxclsrlall(struct bnxt *bp, struct ethtool_rxnfc *cmd,
490 u32 *rule_locs)
491{
492 int i, j = 0;
493
494 cmd->data = bp->ntp_fltr_count;
495 for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) {
496 struct hlist_head *head;
497 struct bnxt_ntuple_filter *fltr;
498
499 head = &bp->ntp_fltr_hash_tbl[i];
500 rcu_read_lock();
501 hlist_for_each_entry_rcu(fltr, head, hash) {
502 if (j == cmd->rule_cnt)
503 break;
504 rule_locs[j++] = fltr->sw_id;
505 }
506 rcu_read_unlock();
507 if (j == cmd->rule_cnt)
508 break;
509 }
510 cmd->rule_cnt = j;
511 return 0;
512}
513
514static int bnxt_grxclsrule(struct bnxt *bp, struct ethtool_rxnfc *cmd)
515{
516 struct ethtool_rx_flow_spec *fs =
517 (struct ethtool_rx_flow_spec *)&cmd->fs;
518 struct bnxt_ntuple_filter *fltr;
519 struct flow_keys *fkeys;
520 int i, rc = -EINVAL;
521
522 if (fs->location < 0 || fs->location >= BNXT_NTP_FLTR_MAX_FLTR)
523 return rc;
524
525 for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) {
526 struct hlist_head *head;
527
528 head = &bp->ntp_fltr_hash_tbl[i];
529 rcu_read_lock();
530 hlist_for_each_entry_rcu(fltr, head, hash) {
531 if (fltr->sw_id == fs->location)
532 goto fltr_found;
533 }
534 rcu_read_unlock();
535 }
536 return rc;
537
538fltr_found:
539 fkeys = &fltr->fkeys;
dda0e746
MC		 540 if (fkeys->basic.n_proto == htons(ETH_P_IP)) {
541 if (fkeys->basic.ip_proto == IPPROTO_TCP)
542 fs->flow_type = TCP_V4_FLOW;
543 else if (fkeys->basic.ip_proto == IPPROTO_UDP)
544 fs->flow_type = UDP_V4_FLOW;
545 else
546 goto fltr_err;
c0c050c5 547
dda0e746
MC		 548 fs->h_u.tcp_ip4_spec.ip4src = fkeys->addrs.v4addrs.src;
549 fs->m_u.tcp_ip4_spec.ip4src = cpu_to_be32(~0);
c0c050c5 550
dda0e746
MC		 551 fs->h_u.tcp_ip4_spec.ip4dst = fkeys->addrs.v4addrs.dst;
552 fs->m_u.tcp_ip4_spec.ip4dst = cpu_to_be32(~0);
c0c050c5 553
dda0e746
MC		 554 fs->h_u.tcp_ip4_spec.psrc = fkeys->ports.src;
555 fs->m_u.tcp_ip4_spec.psrc = cpu_to_be16(~0);
c0c050c5 556
dda0e746
MC		 557 fs->h_u.tcp_ip4_spec.pdst = fkeys->ports.dst;
558 fs->m_u.tcp_ip4_spec.pdst = cpu_to_be16(~0);
559 } else {
560 int i;
561
562 if (fkeys->basic.ip_proto == IPPROTO_TCP)
563 fs->flow_type = TCP_V6_FLOW;
564 else if (fkeys->basic.ip_proto == IPPROTO_UDP)
565 fs->flow_type = UDP_V6_FLOW;
566 else
567 goto fltr_err;
568
569 *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6src[0] =
570 fkeys->addrs.v6addrs.src;
571 *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6dst[0] =
572 fkeys->addrs.v6addrs.dst;
573 for (i = 0; i < 4; i++) {
574 fs->m_u.tcp_ip6_spec.ip6src[i] = cpu_to_be32(~0);
575 fs->m_u.tcp_ip6_spec.ip6dst[i] = cpu_to_be32(~0);
576 }
577 fs->h_u.tcp_ip6_spec.psrc = fkeys->ports.src;
578 fs->m_u.tcp_ip6_spec.psrc = cpu_to_be16(~0);
579
580 fs->h_u.tcp_ip6_spec.pdst = fkeys->ports.dst;
581 fs->m_u.tcp_ip6_spec.pdst = cpu_to_be16(~0);
582 }
c0c050c5
MC		 583
584 fs->ring_cookie = fltr->rxq;
585 rc = 0;
586
587fltr_err:
588 rcu_read_unlock();
589
590 return rc;
591}
a011952a
MC		 592#endif
593
594static u64 get_ethtool_ipv4_rss(struct bnxt *bp)
595{
596 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4)
597 return RXH_IP_SRC | RXH_IP_DST;
598 return 0;
599}
600
601static u64 get_ethtool_ipv6_rss(struct bnxt *bp)
602{
603 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6)
604 return RXH_IP_SRC | RXH_IP_DST;
605 return 0;
606}
607
608static int bnxt_grxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)
609{
610 cmd->data = 0;
611 switch (cmd->flow_type) {
612 case TCP_V4_FLOW:
613 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4)
614 cmd->data |= RXH_IP_SRC | RXH_IP_DST |
615 RXH_L4_B_0_1 | RXH_L4_B_2_3;
616 cmd->data |= get_ethtool_ipv4_rss(bp);
617 break;
618 case UDP_V4_FLOW:
619 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4)
620 cmd->data |= RXH_IP_SRC | RXH_IP_DST |
621 RXH_L4_B_0_1 | RXH_L4_B_2_3;
622 /* fall through */
623 case SCTP_V4_FLOW:
624 case AH_ESP_V4_FLOW:
625 case AH_V4_FLOW:
626 case ESP_V4_FLOW:
627 case IPV4_FLOW:
628 cmd->data |= get_ethtool_ipv4_rss(bp);
629 break;
630
631 case TCP_V6_FLOW:
632 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6)
633 cmd->data |= RXH_IP_SRC | RXH_IP_DST |
634 RXH_L4_B_0_1 | RXH_L4_B_2_3;
635 cmd->data |= get_ethtool_ipv6_rss(bp);
636 break;
637 case UDP_V6_FLOW:
638 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6)
639 cmd->data |= RXH_IP_SRC | RXH_IP_DST |
640 RXH_L4_B_0_1 | RXH_L4_B_2_3;
641 /* fall through */
642 case SCTP_V6_FLOW:
643 case AH_ESP_V6_FLOW:
644 case AH_V6_FLOW:
645 case ESP_V6_FLOW:
646 case IPV6_FLOW:
647 cmd->data |= get_ethtool_ipv6_rss(bp);
648 break;
649 }
650 return 0;
651}
652
653#define RXH_4TUPLE (RXH_IP_SRC | RXH_IP_DST | RXH_L4_B_0_1 | RXH_L4_B_2_3)
654#define RXH_2TUPLE (RXH_IP_SRC | RXH_IP_DST)
655
656static int bnxt_srxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)
657{
658 u32 rss_hash_cfg = bp->rss_hash_cfg;
659 int tuple, rc = 0;
660
661 if (cmd->data == RXH_4TUPLE)
662 tuple = 4;
663 else if (cmd->data == RXH_2TUPLE)
664 tuple = 2;
665 else if (!cmd->data)
666 tuple = 0;
667 else
668 return -EINVAL;
669
670 if (cmd->flow_type == TCP_V4_FLOW) {
671 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4;
672 if (tuple == 4)
673 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4;
674 } else if (cmd->flow_type == UDP_V4_FLOW) {
675 if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP))
676 return -EINVAL;
677 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4;
678 if (tuple == 4)
679 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4;
680 } else if (cmd->flow_type == TCP_V6_FLOW) {
681 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6;
682 if (tuple == 4)
683 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6;
684 } else if (cmd->flow_type == UDP_V6_FLOW) {
685 if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP))
686 return -EINVAL;
687 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6;
688 if (tuple == 4)
689 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6;
690 } else if (tuple == 4) {
691 return -EINVAL;
692 }
693
694 switch (cmd->flow_type) {
695 case TCP_V4_FLOW:
696 case UDP_V4_FLOW:
697 case SCTP_V4_FLOW:
698 case AH_ESP_V4_FLOW:
699 case AH_V4_FLOW:
700 case ESP_V4_FLOW:
701 case IPV4_FLOW:
702 if (tuple == 2)
703 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4;
704 else if (!tuple)
705 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4;
706 break;
707
708 case TCP_V6_FLOW:
709 case UDP_V6_FLOW:
710 case SCTP_V6_FLOW:
711 case AH_ESP_V6_FLOW:
712 case AH_V6_FLOW:
713 case ESP_V6_FLOW:
714 case IPV6_FLOW:
715 if (tuple == 2)
716 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6;
717 else if (!tuple)
718 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6;
719 break;
720 }
721
722 if (bp->rss_hash_cfg == rss_hash_cfg)
723 return 0;
724
725 bp->rss_hash_cfg = rss_hash_cfg;
726 if (netif_running(bp->dev)) {
727 bnxt_close_nic(bp, false, false);
728 rc = bnxt_open_nic(bp, false, false);
729 }
730 return rc;
731}
c0c050c5
MC		 732
733static int bnxt_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
734 u32 *rule_locs)
735{
736 struct bnxt *bp = netdev_priv(dev);
737 int rc = 0;
738
739 switch (cmd->cmd) {
a011952a 740#ifdef CONFIG_RFS_ACCEL
c0c050c5
MC		 741 case ETHTOOL_GRXRINGS:
742 cmd->data = bp->rx_nr_rings;
743 break;
744
745 case ETHTOOL_GRXCLSRLCNT:
746 cmd->rule_cnt = bp->ntp_fltr_count;
747 cmd->data = BNXT_NTP_FLTR_MAX_FLTR;
748 break;
749
750 case ETHTOOL_GRXCLSRLALL:
751 rc = bnxt_grxclsrlall(bp, cmd, (u32 *)rule_locs);
752 break;
753
754 case ETHTOOL_GRXCLSRULE:
755 rc = bnxt_grxclsrule(bp, cmd);
756 break;
a011952a
MC		 757#endif
758
759 case ETHTOOL_GRXFH:
760 rc = bnxt_grxfh(bp, cmd);
761 break;
c0c050c5
MC		 762
763 default:
764 rc = -EOPNOTSUPP;
765 break;
766 }
767
768 return rc;
769}
a011952a
MC		 770
771static int bnxt_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
772{
773 struct bnxt *bp = netdev_priv(dev);
774 int rc;
775
776 switch (cmd->cmd) {
777 case ETHTOOL_SRXFH:
778 rc = bnxt_srxfh(bp, cmd);
779 break;
780
781 default:
782 rc = -EOPNOTSUPP;
783 break;
784 }
785 return rc;
786}
c0c050c5
MC		 787
788static u32 bnxt_get_rxfh_indir_size(struct net_device *dev)
789{
790 return HW_HASH_INDEX_SIZE;
791}
792
793static u32 bnxt_get_rxfh_key_size(struct net_device *dev)
794{
795 return HW_HASH_KEY_SIZE;
796}
797
798static int bnxt_get_rxfh(struct net_device *dev, u32 *indir, u8 *key,
799 u8 *hfunc)
800{
801 struct bnxt *bp = netdev_priv(dev);
802 struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
803 int i = 0;
804
805 if (hfunc)
806 *hfunc = ETH_RSS_HASH_TOP;
807
808 if (indir)
809 for (i = 0; i < HW_HASH_INDEX_SIZE; i++)
810 indir[i] = le16_to_cpu(vnic->rss_table[i]);
811
812 if (key)
813 memcpy(key, vnic->rss_hash_key, HW_HASH_KEY_SIZE);
814
815 return 0;
816}
817
818static void bnxt_get_drvinfo(struct net_device *dev,
819 struct ethtool_drvinfo *info)
820{
821 struct bnxt *bp = netdev_priv(dev);
3ebf6f0a
RS		 822 char *pkglog;
823 char *pkgver = NULL;
c0c050c5 824
3ebf6f0a
RS		 825 pkglog = kmalloc(BNX_PKG_LOG_MAX_LENGTH, GFP_KERNEL);
826 if (pkglog)
827 pkgver = bnxt_get_pkgver(dev, pkglog, BNX_PKG_LOG_MAX_LENGTH);
c0c050c5
MC		 828 strlcpy(info->driver, DRV_MODULE_NAME, sizeof(info->driver));
829 strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version));
3ebf6f0a
RS		 830 if (pkgver && *pkgver != 0 && isdigit(*pkgver))
831 snprintf(info->fw_version, sizeof(info->fw_version) - 1,
832 "%s pkg %s", bp->fw_ver_str, pkgver);
833 else
834 strlcpy(info->fw_version, bp->fw_ver_str,
835 sizeof(info->fw_version));
c0c050c5
MC		 836 strlcpy(info->bus_info, pci_name(bp->pdev), sizeof(info->bus_info));
837 info->n_stats = BNXT_NUM_STATS * bp->cp_nr_rings;
eb513658 838 info->testinfo_len = bp->num_tests;
c0c050c5
MC		 839 /* TODO CHIMP_FW: eeprom dump details */
840 info->eedump_len = 0;
841 /* TODO CHIMP FW: reg dump details */
842 info->regdump_len = 0;
3ebf6f0a 843 kfree(pkglog);
c0c050c5
MC		 844}
845
8e202366
MC		 846static void bnxt_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
847{
848 struct bnxt *bp = netdev_priv(dev);
849
850 wol->supported = 0;
851 wol->wolopts = 0;
852 memset(&wol->sopass, 0, sizeof(wol->sopass));
853 if (bp->flags & BNXT_FLAG_WOL_CAP) {
854 wol->supported = WAKE_MAGIC;
855 if (bp->wol)
856 wol->wolopts = WAKE_MAGIC;
857 }
858}
859
5282db6c
MC		 860static int bnxt_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
861{
862 struct bnxt *bp = netdev_priv(dev);
863
864 if (wol->wolopts & ~WAKE_MAGIC)
865 return -EINVAL;
866
867 if (wol->wolopts & WAKE_MAGIC) {
868 if (!(bp->flags & BNXT_FLAG_WOL_CAP))
869 return -EINVAL;
870 if (!bp->wol) {
871 if (bnxt_hwrm_alloc_wol_fltr(bp))
872 return -EBUSY;
873 bp->wol = 1;
874 }
875 } else {
876 if (bp->wol) {
877 if (bnxt_hwrm_free_wol_fltr(bp))
878 return -EBUSY;
879 bp->wol = 0;
880 }
881 }
882 return 0;
883}
884
170ce013 885u32 _bnxt_fw_to_ethtool_adv_spds(u16 fw_speeds, u8 fw_pause)
c0c050c5 886{
c0c050c5
MC		 887 u32 speed_mask = 0;
888
889 /* TODO: support 25GB, 40GB, 50GB with different cable type */
890 /* set the advertised speeds */
891 if (fw_speeds & BNXT_LINK_SPEED_MSK_100MB)
892 speed_mask |= ADVERTISED_100baseT_Full;
893 if (fw_speeds & BNXT_LINK_SPEED_MSK_1GB)
894 speed_mask |= ADVERTISED_1000baseT_Full;
895 if (fw_speeds & BNXT_LINK_SPEED_MSK_2_5GB)
896 speed_mask |= ADVERTISED_2500baseX_Full;
897 if (fw_speeds & BNXT_LINK_SPEED_MSK_10GB)
898 speed_mask |= ADVERTISED_10000baseT_Full;
c0c050c5 899 if (fw_speeds & BNXT_LINK_SPEED_MSK_40GB)
1c49c421 900 speed_mask |= ADVERTISED_40000baseCR4_Full;
27c4d578
MC		 901
902 if ((fw_pause & BNXT_LINK_PAUSE_BOTH) == BNXT_LINK_PAUSE_BOTH)
903 speed_mask |= ADVERTISED_Pause;
904 else if (fw_pause & BNXT_LINK_PAUSE_TX)
905 speed_mask |= ADVERTISED_Asym_Pause;
906 else if (fw_pause & BNXT_LINK_PAUSE_RX)
907 speed_mask |= ADVERTISED_Pause | ADVERTISED_Asym_Pause;
908
c0c050c5
MC		 909 return speed_mask;
910}
911
00c04a92
MC		 912#define BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, name)\
913{ \
914 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100MB) \
915 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
916 100baseT_Full); \
917 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_1GB) \
918 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
919 1000baseT_Full); \
920 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_10GB) \
921 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
922 10000baseT_Full); \
923 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_25GB) \
924 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
925 25000baseCR_Full); \
926 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_40GB) \
927 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
928 40000baseCR4_Full);\
929 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_50GB) \
930 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
931 50000baseCR2_Full);\
932 if ((fw_pause) & BNXT_LINK_PAUSE_RX) { \
933 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
934 Pause); \
935 if (!((fw_pause) & BNXT_LINK_PAUSE_TX)) \
936 ethtool_link_ksettings_add_link_mode( \
937 lk_ksettings, name, Asym_Pause);\
938 } else if ((fw_pause) & BNXT_LINK_PAUSE_TX) { \
939 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
940 Asym_Pause); \
941 } \
942}
943
944#define BNXT_ETHTOOL_TO_FW_SPDS(fw_speeds, lk_ksettings, name) \
945{ \
946 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
947 100baseT_Full) || \
948 ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
949 100baseT_Half)) \
950 (fw_speeds) |= BNXT_LINK_SPEED_MSK_100MB; \
951 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
952 1000baseT_Full) || \
953 ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
954 1000baseT_Half)) \
955 (fw_speeds) |= BNXT_LINK_SPEED_MSK_1GB; \
956 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
957 10000baseT_Full)) \
958 (fw_speeds) |= BNXT_LINK_SPEED_MSK_10GB; \
959 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
960 25000baseCR_Full)) \
961 (fw_speeds) |= BNXT_LINK_SPEED_MSK_25GB; \
962 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
963 40000baseCR4_Full)) \
964 (fw_speeds) |= BNXT_LINK_SPEED_MSK_40GB; \
965 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
966 50000baseCR2_Full)) \
967 (fw_speeds) |= BNXT_LINK_SPEED_MSK_50GB; \
968}
969
970static void bnxt_fw_to_ethtool_advertised_spds(struct bnxt_link_info *link_info,
971 struct ethtool_link_ksettings *lk_ksettings)
27c4d578 972{
68515a18 973 u16 fw_speeds = link_info->advertising;
27c4d578
MC		 974 u8 fw_pause = 0;
975
976 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
977 fw_pause = link_info->auto_pause_setting;
978
00c04a92 979 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, advertising);
27c4d578
MC		 980}
981
00c04a92
MC		 982static void bnxt_fw_to_ethtool_lp_adv(struct bnxt_link_info *link_info,
983 struct ethtool_link_ksettings *lk_ksettings)
3277360e
MC		 984{
985 u16 fw_speeds = link_info->lp_auto_link_speeds;
986 u8 fw_pause = 0;
987
988 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
989 fw_pause = link_info->lp_pause;
990
00c04a92
MC		 991 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings,
992 lp_advertising);
3277360e
MC		 993}
994
00c04a92
MC		 995static void bnxt_fw_to_ethtool_support_spds(struct bnxt_link_info *link_info,
996 struct ethtool_link_ksettings *lk_ksettings)
4b32cacc
MC		 997{
998 u16 fw_speeds = link_info->support_speeds;
4b32cacc 999
00c04a92 1000 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, 0, lk_ksettings, supported);
4b32cacc 1001
00c04a92
MC		 1002 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, Pause);
1003 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1004 Asym_Pause);
93ed8117 1005
00c04a92
MC		 1006 if (link_info->support_auto_speeds)
1007 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1008 Autoneg);
93ed8117
MC		 1009}
1010
c0c050c5
MC		 1011u32 bnxt_fw_to_ethtool_speed(u16 fw_link_speed)
1012{
1013 switch (fw_link_speed) {
1014 case BNXT_LINK_SPEED_100MB:
1015 return SPEED_100;
1016 case BNXT_LINK_SPEED_1GB:
1017 return SPEED_1000;
1018 case BNXT_LINK_SPEED_2_5GB:
1019 return SPEED_2500;
1020 case BNXT_LINK_SPEED_10GB:
1021 return SPEED_10000;
1022 case BNXT_LINK_SPEED_20GB:
1023 return SPEED_20000;
1024 case BNXT_LINK_SPEED_25GB:
1025 return SPEED_25000;
1026 case BNXT_LINK_SPEED_40GB:
1027 return SPEED_40000;
1028 case BNXT_LINK_SPEED_50GB:
1029 return SPEED_50000;
1030 default:
1031 return SPEED_UNKNOWN;
1032 }
1033}
1034
00c04a92
MC		 1035static int bnxt_get_link_ksettings(struct net_device *dev,
1036 struct ethtool_link_ksettings *lk_ksettings)
c0c050c5
MC		 1037{
1038 struct bnxt *bp = netdev_priv(dev);
1039 struct bnxt_link_info *link_info = &bp->link_info;
00c04a92
MC		 1040 struct ethtool_link_settings *base = &lk_ksettings->base;
1041 u32 ethtool_speed;
c0c050c5 1042
00c04a92
MC		 1043 ethtool_link_ksettings_zero_link_mode(lk_ksettings, supported);
1044 bnxt_fw_to_ethtool_support_spds(link_info, lk_ksettings);
c0c050c5 1045
00c04a92 1046 ethtool_link_ksettings_zero_link_mode(lk_ksettings, advertising);
b763499e 1047 if (link_info->autoneg) {
00c04a92
MC		 1048 bnxt_fw_to_ethtool_advertised_spds(link_info, lk_ksettings);
1049 ethtool_link_ksettings_add_link_mode(lk_ksettings,
1050 advertising, Autoneg);
1051 base->autoneg = AUTONEG_ENABLE;
3277360e 1052 if (link_info->phy_link_status == BNXT_LINK_LINK)
00c04a92 1053 bnxt_fw_to_ethtool_lp_adv(link_info, lk_ksettings);
29c262fe
MC		 1054 ethtool_speed = bnxt_fw_to_ethtool_speed(link_info->link_speed);
1055 if (!netif_carrier_ok(dev))
00c04a92 1056 base->duplex = DUPLEX_UNKNOWN;
29c262fe 1057 else if (link_info->duplex & BNXT_LINK_DUPLEX_FULL)
00c04a92 1058 base->duplex = DUPLEX_FULL;
29c262fe 1059 else
00c04a92 1060 base->duplex = DUPLEX_HALF;
c0c050c5 1061 } else {
00c04a92 1062 base->autoneg = AUTONEG_DISABLE;
29c262fe
MC		 1063 ethtool_speed =
1064 bnxt_fw_to_ethtool_speed(link_info->req_link_speed);
00c04a92 1065 base->duplex = DUPLEX_HALF;
29c262fe 1066 if (link_info->req_duplex == BNXT_LINK_DUPLEX_FULL)
00c04a92 1067 base->duplex = DUPLEX_FULL;
c0c050c5 1068 }
00c04a92 1069 base->speed = ethtool_speed;
c0c050c5 1070
00c04a92 1071 base->port = PORT_NONE;
c0c050c5 1072 if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
00c04a92
MC		 1073 base->port = PORT_TP;
1074 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1075 TP);
1076 ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising,
1077 TP);
c0c050c5 1078 } else {
00c04a92
MC		 1079 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1080 FIBRE);
1081 ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising,
1082 FIBRE);
c0c050c5
MC		 1083
1084 if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_DAC)
00c04a92 1085 base->port = PORT_DA;
c0c050c5
MC		 1086 else if (link_info->media_type ==
1087 PORT_PHY_QCFG_RESP_MEDIA_TYPE_FIBRE)
00c04a92 1088 base->port = PORT_FIBRE;
c0c050c5 1089 }
00c04a92 1090 base->phy_address = link_info->phy_addr;
c0c050c5
MC		 1091
1092 return 0;
1093}
1094
1095static u32 bnxt_get_fw_speed(struct net_device *dev, u16 ethtool_speed)
1096{
9d9cee08
MC		 1097 struct bnxt *bp = netdev_priv(dev);
1098 struct bnxt_link_info *link_info = &bp->link_info;
1099 u16 support_spds = link_info->support_speeds;
1100 u32 fw_speed = 0;
1101
c0c050c5
MC		 1102 switch (ethtool_speed) {
1103 case SPEED_100:
9d9cee08
MC		 1104 if (support_spds & BNXT_LINK_SPEED_MSK_100MB)
1105 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100MB;
1106 break;
c0c050c5 1107 case SPEED_1000:
9d9cee08
MC		 1108 if (support_spds & BNXT_LINK_SPEED_MSK_1GB)
1109 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_1GB;
1110 break;
c0c050c5 1111 case SPEED_2500:
9d9cee08
MC		 1112 if (support_spds & BNXT_LINK_SPEED_MSK_2_5GB)
1113 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_2_5GB;
1114 break;
c0c050c5 1115 case SPEED_10000:
9d9cee08
MC		 1116 if (support_spds & BNXT_LINK_SPEED_MSK_10GB)
1117 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_10GB;
1118 break;
c0c050c5 1119 case SPEED_20000:
9d9cee08
MC		 1120 if (support_spds & BNXT_LINK_SPEED_MSK_20GB)
1121 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_20GB;
1122 break;
c0c050c5 1123 case SPEED_25000:
9d9cee08
MC		 1124 if (support_spds & BNXT_LINK_SPEED_MSK_25GB)
1125 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_25GB;
1126 break;
c0c050c5 1127 case SPEED_40000:
9d9cee08
MC		 1128 if (support_spds & BNXT_LINK_SPEED_MSK_40GB)
1129 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_40GB;
1130 break;
c0c050c5 1131 case SPEED_50000:
9d9cee08
MC		 1132 if (support_spds & BNXT_LINK_SPEED_MSK_50GB)
1133 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_50GB;
1134 break;
c0c050c5
MC		 1135 default:
1136 netdev_err(dev, "unsupported speed!\n");
1137 break;
1138 }
9d9cee08 1139 return fw_speed;
c0c050c5
MC		 1140}
1141
939f7f0c 1142u16 bnxt_get_fw_auto_link_speeds(u32 advertising)
c0c050c5
MC		 1143{
1144 u16 fw_speed_mask = 0;
1145
1146 /* only support autoneg at speed 100, 1000, and 10000 */
1147 if (advertising & (ADVERTISED_100baseT_Full |
1148 ADVERTISED_100baseT_Half)) {
1149 fw_speed_mask |= BNXT_LINK_SPEED_MSK_100MB;
1150 }
1151 if (advertising & (ADVERTISED_1000baseT_Full |
1152 ADVERTISED_1000baseT_Half)) {
1153 fw_speed_mask |= BNXT_LINK_SPEED_MSK_1GB;
1154 }
1155 if (advertising & ADVERTISED_10000baseT_Full)
1156 fw_speed_mask |= BNXT_LINK_SPEED_MSK_10GB;
1157
1c49c421
MC		 1158 if (advertising & ADVERTISED_40000baseCR4_Full)
1159 fw_speed_mask |= BNXT_LINK_SPEED_MSK_40GB;
1160
c0c050c5
MC		 1161 return fw_speed_mask;
1162}
1163
00c04a92
MC		 1164static int bnxt_set_link_ksettings(struct net_device *dev,
1165 const struct ethtool_link_ksettings *lk_ksettings)
c0c050c5 1166{
c0c050c5
MC		 1167 struct bnxt *bp = netdev_priv(dev);
1168 struct bnxt_link_info *link_info = &bp->link_info;
00c04a92 1169 const struct ethtool_link_settings *base = &lk_ksettings->base;
c0c050c5 1170 bool set_pause = false;
68515a18
MC		 1171 u16 fw_advertising = 0;
1172 u32 speed;
00c04a92 1173 int rc = 0;
c0c050c5 1174
567b2abe 1175 if (!BNXT_SINGLE_PF(bp))
00c04a92 1176 return -EOPNOTSUPP;
f1a082a6 1177
00c04a92
MC		 1178 if (base->autoneg == AUTONEG_ENABLE) {
1179 BNXT_ETHTOOL_TO_FW_SPDS(fw_advertising, lk_ksettings,
1180 advertising);
c0c050c5
MC		 1181 link_info->autoneg |= BNXT_AUTONEG_SPEED;
1182 if (!fw_advertising)
93ed8117 1183 link_info->advertising = link_info->support_auto_speeds;
c0c050c5
MC		 1184 else
1185 link_info->advertising = fw_advertising;
1186 /* any change to autoneg will cause link change, therefore the
1187 * driver should put back the original pause setting in autoneg
1188 */
1189 set_pause = true;
1190 } else {
9d9cee08 1191 u16 fw_speed;
03efbec0 1192 u8 phy_type = link_info->phy_type;
9d9cee08 1193
03efbec0
MC		 1194 if (phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASET ||
1195 phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASETE ||
1196 link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
1197 netdev_err(dev, "10GBase-T devices must autoneg\n");
1198 rc = -EINVAL;
1199 goto set_setting_exit;
1200 }
00c04a92 1201 if (base->duplex == DUPLEX_HALF) {
c0c050c5
MC		 1202 netdev_err(dev, "HALF DUPLEX is not supported!\n");
1203 rc = -EINVAL;
1204 goto set_setting_exit;
1205 }
00c04a92 1206 speed = base->speed;
9d9cee08
MC		 1207 fw_speed = bnxt_get_fw_speed(dev, speed);
1208 if (!fw_speed) {
1209 rc = -EINVAL;
1210 goto set_setting_exit;
1211 }
1212 link_info->req_link_speed = fw_speed;
c0c050c5 1213 link_info->req_duplex = BNXT_LINK_DUPLEX_FULL;
b763499e 1214 link_info->autoneg = 0;
c0c050c5
MC		 1215 link_info->advertising = 0;
1216 }
1217
1218 if (netif_running(dev))
939f7f0c 1219 rc = bnxt_hwrm_set_link_setting(bp, set_pause, false);
c0c050c5
MC		 1220
1221set_setting_exit:
1222 return rc;
1223}
1224
1225static void bnxt_get_pauseparam(struct net_device *dev,
1226 struct ethtool_pauseparam *epause)
1227{
1228 struct bnxt *bp = netdev_priv(dev);
1229 struct bnxt_link_info *link_info = &bp->link_info;
1230
1231 if (BNXT_VF(bp))
1232 return;
b763499e 1233 epause->autoneg = !!(link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL);
3c02d1bb
MC		 1234 epause->rx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_RX);
1235 epause->tx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_TX);
c0c050c5
MC		 1236}
1237
1238static int bnxt_set_pauseparam(struct net_device *dev,
1239 struct ethtool_pauseparam *epause)
1240{
1241 int rc = 0;
1242 struct bnxt *bp = netdev_priv(dev);
1243 struct bnxt_link_info *link_info = &bp->link_info;
1244
567b2abe 1245 if (!BNXT_SINGLE_PF(bp))
75362a3f 1246 return -EOPNOTSUPP;
c0c050c5
MC		 1247
1248 if (epause->autoneg) {
b763499e
MC		 1249 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED))
1250 return -EINVAL;
1251
c0c050c5 1252 link_info->autoneg |= BNXT_AUTONEG_FLOW_CTRL;
c9ee9516
MC		 1253 if (bp->hwrm_spec_code >= 0x10201)
1254 link_info->req_flow_ctrl =
1255 PORT_PHY_CFG_REQ_AUTO_PAUSE_AUTONEG_PAUSE;
c0c050c5
MC		 1256 } else {
1257 /* when transition from auto pause to force pause,
1258 * force a link change
1259 */
1260 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
1261 link_info->force_link_chng = true;
1262 link_info->autoneg &= ~BNXT_AUTONEG_FLOW_CTRL;
c9ee9516 1263 link_info->req_flow_ctrl = 0;
c0c050c5
MC		 1264 }
1265 if (epause->rx_pause)
1266 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_RX;
c0c050c5
MC		 1267
1268 if (epause->tx_pause)
1269 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_TX;
c0c050c5
MC		 1270
1271 if (netif_running(dev))
1272 rc = bnxt_hwrm_set_pause(bp);
1273 return rc;
1274}
1275
1276static u32 bnxt_get_link(struct net_device *dev)
1277{
1278 struct bnxt *bp = netdev_priv(dev);
1279
1280 /* TODO: handle MF, VF, driver close case */
1281 return bp->link_info.link_up;
1282}
1283
5ac67d8b
RS		 1284static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
1285 u16 ext, u16 *index, u32 *item_length,
1286 u32 *data_length);
1287
c0c050c5
MC		 1288static int bnxt_flash_nvram(struct net_device *dev,
1289 u16 dir_type,
1290 u16 dir_ordinal,
1291 u16 dir_ext,
1292 u16 dir_attr,
1293 const u8 *data,
1294 size_t data_len)
1295{
1296 struct bnxt *bp = netdev_priv(dev);
1297 int rc;
1298 struct hwrm_nvm_write_input req = {0};
1299 dma_addr_t dma_handle;
1300 u8 *kmem;
1301
1302 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_WRITE, -1, -1);
1303
1304 req.dir_type = cpu_to_le16(dir_type);
1305 req.dir_ordinal = cpu_to_le16(dir_ordinal);
1306 req.dir_ext = cpu_to_le16(dir_ext);
1307 req.dir_attr = cpu_to_le16(dir_attr);
1308 req.dir_data_length = cpu_to_le32(data_len);
1309
1310 kmem = dma_alloc_coherent(&bp->pdev->dev, data_len, &dma_handle,
1311 GFP_KERNEL);
1312 if (!kmem) {
1313 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
1314 (unsigned)data_len);
1315 return -ENOMEM;
1316 }
1317 memcpy(kmem, data, data_len);
1318 req.host_src_addr = cpu_to_le64(dma_handle);
1319
1320 rc = hwrm_send_message(bp, &req, sizeof(req), FLASH_NVRAM_TIMEOUT);
1321 dma_free_coherent(&bp->pdev->dev, data_len, kmem, dma_handle);
1322
1323 return rc;
1324}
1325
d2d6318c
RS		 1326static int bnxt_firmware_reset(struct net_device *dev,
1327 u16 dir_type)
1328{
1329 struct bnxt *bp = netdev_priv(dev);
1330 struct hwrm_fw_reset_input req = {0};
1331
1332 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FW_RESET, -1, -1);
1333
1334 /* TODO: Support ASAP ChiMP self-reset (e.g. upon PF driver unload) */
1335 /* TODO: Address self-reset of APE/KONG/BONO/TANG or ungraceful reset */
1336 /* (e.g. when firmware isn't already running) */
1337 switch (dir_type) {
1338 case BNX_DIR_TYPE_CHIMP_PATCH:
1339 case BNX_DIR_TYPE_BOOTCODE:
1340 case BNX_DIR_TYPE_BOOTCODE_2:
1341 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_BOOT;
1342 /* Self-reset ChiMP upon next PCIe reset: */
1343 req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
1344 break;
1345 case BNX_DIR_TYPE_APE_FW:
1346 case BNX_DIR_TYPE_APE_PATCH:
1347 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_MGMT;
08141e0b
RS		 1348 /* Self-reset APE upon next PCIe reset: */
1349 req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
d2d6318c
RS		 1350 break;
1351 case BNX_DIR_TYPE_KONG_FW:
1352 case BNX_DIR_TYPE_KONG_PATCH:
1353 req.embedded_proc_type =
1354 FW_RESET_REQ_EMBEDDED_PROC_TYPE_NETCTRL;
1355 break;
1356 case BNX_DIR_TYPE_BONO_FW:
1357 case BNX_DIR_TYPE_BONO_PATCH:
1358 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_ROCE;
1359 break;
1360 default:
1361 return -EINVAL;
1362 }
1363
1364 return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1365}
1366
c0c050c5
MC		 1367static int bnxt_flash_firmware(struct net_device *dev,
1368 u16 dir_type,
1369 const u8 *fw_data,
1370 size_t fw_size)
1371{
1372 int rc = 0;
1373 u16 code_type;
1374 u32 stored_crc;
1375 u32 calculated_crc;
1376 struct bnxt_fw_header *header = (struct bnxt_fw_header *)fw_data;
1377
1378 switch (dir_type) {
1379 case BNX_DIR_TYPE_BOOTCODE:
1380 case BNX_DIR_TYPE_BOOTCODE_2:
1381 code_type = CODE_BOOT;
1382 break;
93e0b4fe
RS		 1383 case BNX_DIR_TYPE_CHIMP_PATCH:
1384 code_type = CODE_CHIMP_PATCH;
1385 break;
2731d70f
RS		 1386 case BNX_DIR_TYPE_APE_FW:
1387 code_type = CODE_MCTP_PASSTHRU;
1388 break;
93e0b4fe
RS		 1389 case BNX_DIR_TYPE_APE_PATCH:
1390 code_type = CODE_APE_PATCH;
1391 break;
1392 case BNX_DIR_TYPE_KONG_FW:
1393 code_type = CODE_KONG_FW;
1394 break;
1395 case BNX_DIR_TYPE_KONG_PATCH:
1396 code_type = CODE_KONG_PATCH;
1397 break;
1398 case BNX_DIR_TYPE_BONO_FW:
1399 code_type = CODE_BONO_FW;
1400 break;
1401 case BNX_DIR_TYPE_BONO_PATCH:
1402 code_type = CODE_BONO_PATCH;
1403 break;
c0c050c5
MC		 1404 default:
1405 netdev_err(dev, "Unsupported directory entry type: %u\n",
1406 dir_type);
1407 return -EINVAL;
1408 }
1409 if (fw_size < sizeof(struct bnxt_fw_header)) {
1410 netdev_err(dev, "Invalid firmware file size: %u\n",
1411 (unsigned int)fw_size);
1412 return -EINVAL;
1413 }
1414 if (header->signature != cpu_to_le32(BNXT_FIRMWARE_BIN_SIGNATURE)) {
1415 netdev_err(dev, "Invalid firmware signature: %08X\n",
1416 le32_to_cpu(header->signature));
1417 return -EINVAL;
1418 }
1419 if (header->code_type != code_type) {
1420 netdev_err(dev, "Expected firmware type: %d, read: %d\n",
1421 code_type, header->code_type);
1422 return -EINVAL;
1423 }
1424 if (header->device != DEVICE_CUMULUS_FAMILY) {
1425 netdev_err(dev, "Expected firmware device family %d, read: %d\n",
1426 DEVICE_CUMULUS_FAMILY, header->device);
1427 return -EINVAL;
1428 }
1429 /* Confirm the CRC32 checksum of the file: */
1430 stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
1431 sizeof(stored_crc)));
1432 calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
1433 if (calculated_crc != stored_crc) {
1434 netdev_err(dev, "Firmware file CRC32 checksum (%08lX) does not match calculated checksum (%08lX)\n",
1435 (unsigned long)stored_crc,
1436 (unsigned long)calculated_crc);
1437 return -EINVAL;
1438 }
c0c050c5
MC		 1439 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
1440 0, 0, fw_data, fw_size);
d2d6318c
RS		 1441 if (rc == 0) /* Firmware update successful */
1442 rc = bnxt_firmware_reset(dev, dir_type);
1443
c0c050c5
MC		 1444 return rc;
1445}
1446
5ac67d8b
RS		 1447static int bnxt_flash_microcode(struct net_device *dev,
1448 u16 dir_type,
1449 const u8 *fw_data,
1450 size_t fw_size)
1451{
1452 struct bnxt_ucode_trailer *trailer;
1453 u32 calculated_crc;
1454 u32 stored_crc;
1455 int rc = 0;
1456
1457 if (fw_size < sizeof(struct bnxt_ucode_trailer)) {
1458 netdev_err(dev, "Invalid microcode file size: %u\n",
1459 (unsigned int)fw_size);
1460 return -EINVAL;
1461 }
1462 trailer = (struct bnxt_ucode_trailer *)(fw_data + (fw_size -
1463 sizeof(*trailer)));
1464 if (trailer->sig != cpu_to_le32(BNXT_UCODE_TRAILER_SIGNATURE)) {
1465 netdev_err(dev, "Invalid microcode trailer signature: %08X\n",
1466 le32_to_cpu(trailer->sig));
1467 return -EINVAL;
1468 }
1469 if (le16_to_cpu(trailer->dir_type) != dir_type) {
1470 netdev_err(dev, "Expected microcode type: %d, read: %d\n",
1471 dir_type, le16_to_cpu(trailer->dir_type));
1472 return -EINVAL;
1473 }
1474 if (le16_to_cpu(trailer->trailer_length) <
1475 sizeof(struct bnxt_ucode_trailer)) {
1476 netdev_err(dev, "Invalid microcode trailer length: %d\n",
1477 le16_to_cpu(trailer->trailer_length));
1478 return -EINVAL;
1479 }
1480
1481 /* Confirm the CRC32 checksum of the file: */
1482 stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
1483 sizeof(stored_crc)));
1484 calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
1485 if (calculated_crc != stored_crc) {
1486 netdev_err(dev,
1487 "CRC32 (%08lX) does not match calculated: %08lX\n",
1488 (unsigned long)stored_crc,
1489 (unsigned long)calculated_crc);
1490 return -EINVAL;
1491 }
1492 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
1493 0, 0, fw_data, fw_size);
1494
1495 return rc;
1496}
1497
c0c050c5
MC		 1498static bool bnxt_dir_type_is_ape_bin_format(u16 dir_type)
1499{
1500 switch (dir_type) {
1501 case BNX_DIR_TYPE_CHIMP_PATCH:
1502 case BNX_DIR_TYPE_BOOTCODE:
1503 case BNX_DIR_TYPE_BOOTCODE_2:
1504 case BNX_DIR_TYPE_APE_FW:
1505 case BNX_DIR_TYPE_APE_PATCH:
1506 case BNX_DIR_TYPE_KONG_FW:
1507 case BNX_DIR_TYPE_KONG_PATCH:
93e0b4fe
RS		 1508 case BNX_DIR_TYPE_BONO_FW:
1509 case BNX_DIR_TYPE_BONO_PATCH:
c0c050c5
MC		 1510 return true;
1511 }
1512
1513 return false;
1514}
1515
5ac67d8b 1516static bool bnxt_dir_type_is_other_exec_format(u16 dir_type)
c0c050c5
MC		 1517{
1518 switch (dir_type) {
1519 case BNX_DIR_TYPE_AVS:
1520 case BNX_DIR_TYPE_EXP_ROM_MBA:
1521 case BNX_DIR_TYPE_PCIE:
1522 case BNX_DIR_TYPE_TSCF_UCODE:
1523 case BNX_DIR_TYPE_EXT_PHY:
1524 case BNX_DIR_TYPE_CCM:
1525 case BNX_DIR_TYPE_ISCSI_BOOT:
1526 case BNX_DIR_TYPE_ISCSI_BOOT_IPV6:
1527 case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6:
1528 return true;
1529 }
1530
1531 return false;
1532}
1533
1534static bool bnxt_dir_type_is_executable(u16 dir_type)
1535{
1536 return bnxt_dir_type_is_ape_bin_format(dir_type) ||
5ac67d8b 1537 bnxt_dir_type_is_other_exec_format(dir_type);
c0c050c5
MC		 1538}
1539
1540static int bnxt_flash_firmware_from_file(struct net_device *dev,
1541 u16 dir_type,
1542 const char *filename)
1543{
1544 const struct firmware *fw;
1545 int rc;
1546
c0c050c5
MC		 1547 rc = request_firmware(&fw, filename, &dev->dev);
1548 if (rc != 0) {
1549 netdev_err(dev, "Error %d requesting firmware file: %s\n",
1550 rc, filename);
1551 return rc;
1552 }
1553 if (bnxt_dir_type_is_ape_bin_format(dir_type) == true)
1554 rc = bnxt_flash_firmware(dev, dir_type, fw->data, fw->size);
5ac67d8b
RS		 1555 else if (bnxt_dir_type_is_other_exec_format(dir_type) == true)
1556 rc = bnxt_flash_microcode(dev, dir_type, fw->data, fw->size);
c0c050c5
MC		 1557 else
1558 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
1559 0, 0, fw->data, fw->size);
1560 release_firmware(fw);
1561 return rc;
1562}
1563
1564static int bnxt_flash_package_from_file(struct net_device *dev,
5ac67d8b 1565 char *filename, u32 install_type)
c0c050c5 1566{
5ac67d8b
RS		 1567 struct bnxt *bp = netdev_priv(dev);
1568 struct hwrm_nvm_install_update_output *resp = bp->hwrm_cmd_resp_addr;
1569 struct hwrm_nvm_install_update_input install = {0};
1570 const struct firmware *fw;
1571 u32 item_len;
1572 u16 index;
1573 int rc;
1574
1575 bnxt_hwrm_fw_set_time(bp);
1576
1577 if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_UPDATE,
1578 BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
1579 &index, &item_len, NULL) != 0) {
1580 netdev_err(dev, "PKG update area not created in nvram\n");
1581 return -ENOBUFS;
1582 }
1583
1584 rc = request_firmware(&fw, filename, &dev->dev);
1585 if (rc != 0) {
1586 netdev_err(dev, "PKG error %d requesting file: %s\n",
1587 rc, filename);
1588 return rc;
1589 }
1590
1591 if (fw->size > item_len) {
1592 netdev_err(dev, "PKG insufficient update area in nvram: %lu",
1593 (unsigned long)fw->size);
1594 rc = -EFBIG;
1595 } else {
1596 dma_addr_t dma_handle;
1597 u8 *kmem;
1598 struct hwrm_nvm_modify_input modify = {0};
1599
1600 bnxt_hwrm_cmd_hdr_init(bp, &modify, HWRM_NVM_MODIFY, -1, -1);
1601
1602 modify.dir_idx = cpu_to_le16(index);
1603 modify.len = cpu_to_le32(fw->size);
1604
1605 kmem = dma_alloc_coherent(&bp->pdev->dev, fw->size,
1606 &dma_handle, GFP_KERNEL);
1607 if (!kmem) {
1608 netdev_err(dev,
1609 "dma_alloc_coherent failure, length = %u\n",
1610 (unsigned int)fw->size);
1611 rc = -ENOMEM;
1612 } else {
1613 memcpy(kmem, fw->data, fw->size);
1614 modify.host_src_addr = cpu_to_le64(dma_handle);
1615
1616 rc = hwrm_send_message(bp, &modify, sizeof(modify),
1617 FLASH_PACKAGE_TIMEOUT);
1618 dma_free_coherent(&bp->pdev->dev, fw->size, kmem,
1619 dma_handle);
1620 }
1621 }
1622 release_firmware(fw);
1623 if (rc)
1624 return rc;
1625
1626 if ((install_type & 0xffff) == 0)
1627 install_type >>= 16;
1628 bnxt_hwrm_cmd_hdr_init(bp, &install, HWRM_NVM_INSTALL_UPDATE, -1, -1);
1629 install.install_type = cpu_to_le32(install_type);
1630
cb4d1d62
KS		 1631 mutex_lock(&bp->hwrm_cmd_lock);
1632 rc = _hwrm_send_message(bp, &install, sizeof(install),
1633 INSTALL_PACKAGE_TIMEOUT);
1634 if (rc) {
1635 rc = -EOPNOTSUPP;
1636 goto flash_pkg_exit;
1637 }
1638
1639 if (resp->error_code) {
1640 u8 error_code = ((struct hwrm_err_output *)resp)->cmd_err;
1641
1642 if (error_code == NVM_INSTALL_UPDATE_CMD_ERR_CODE_FRAG_ERR) {
1643 install.flags |= cpu_to_le16(
1644 NVM_INSTALL_UPDATE_REQ_FLAGS_ALLOWED_TO_DEFRAG);
1645 rc = _hwrm_send_message(bp, &install, sizeof(install),
1646 INSTALL_PACKAGE_TIMEOUT);
1647 if (rc) {
1648 rc = -EOPNOTSUPP;
1649 goto flash_pkg_exit;
1650 }
1651 }
1652 }
5ac67d8b
RS		 1653
1654 if (resp->result) {
1655 netdev_err(dev, "PKG install error = %d, problem_item = %d\n",
1656 (s8)resp->result, (int)resp->problem_item);
cb4d1d62 1657 rc = -ENOPKG;
5ac67d8b 1658 }
cb4d1d62
KS		 1659flash_pkg_exit:
1660 mutex_unlock(&bp->hwrm_cmd_lock);
1661 return rc;
c0c050c5
MC		 1662}
1663
1664static int bnxt_flash_device(struct net_device *dev,
1665 struct ethtool_flash *flash)
1666{
1667 if (!BNXT_PF((struct bnxt *)netdev_priv(dev))) {
1668 netdev_err(dev, "flashdev not supported from a virtual function\n");
1669 return -EINVAL;
1670 }
1671
5ac67d8b
RS		 1672 if (flash->region == ETHTOOL_FLASH_ALL_REGIONS ||
1673 flash->region > 0xffff)
1674 return bnxt_flash_package_from_file(dev, flash->data,
1675 flash->region);
c0c050c5
MC		 1676
1677 return bnxt_flash_firmware_from_file(dev, flash->region, flash->data);
1678}
1679
1680static int nvm_get_dir_info(struct net_device *dev, u32 *entries, u32 *length)
1681{
1682 struct bnxt *bp = netdev_priv(dev);
1683 int rc;
1684 struct hwrm_nvm_get_dir_info_input req = {0};
1685 struct hwrm_nvm_get_dir_info_output *output = bp->hwrm_cmd_resp_addr;
1686
1687 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_INFO, -1, -1);
1688
1689 mutex_lock(&bp->hwrm_cmd_lock);
1690 rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1691 if (!rc) {
1692 *entries = le32_to_cpu(output->entries);
1693 *length = le32_to_cpu(output->entry_length);
1694 }
1695 mutex_unlock(&bp->hwrm_cmd_lock);
1696 return rc;
1697}
1698
1699static int bnxt_get_eeprom_len(struct net_device *dev)
1700{
1701 /* The -1 return value allows the entire 32-bit range of offsets to be
1702 * passed via the ethtool command-line utility.
1703 */
1704 return -1;
1705}
1706
1707static int bnxt_get_nvram_directory(struct net_device *dev, u32 len, u8 *data)
1708{
1709 struct bnxt *bp = netdev_priv(dev);
1710 int rc;
1711 u32 dir_entries;
1712 u32 entry_length;
1713 u8 *buf;
1714 size_t buflen;
1715 dma_addr_t dma_handle;
1716 struct hwrm_nvm_get_dir_entries_input req = {0};
1717
1718 rc = nvm_get_dir_info(dev, &dir_entries, &entry_length);
1719 if (rc != 0)
1720 return rc;
1721
1722 /* Insert 2 bytes of directory info (count and size of entries) */
1723 if (len < 2)
1724 return -EINVAL;
1725
1726 *data++ = dir_entries;
1727 *data++ = entry_length;
1728 len -= 2;
1729 memset(data, 0xff, len);
1730
1731 buflen = dir_entries * entry_length;
1732 buf = dma_alloc_coherent(&bp->pdev->dev, buflen, &dma_handle,
1733 GFP_KERNEL);
1734 if (!buf) {
1735 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
1736 (unsigned)buflen);
1737 return -ENOMEM;
1738 }
1739 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_ENTRIES, -1, -1);
1740 req.host_dest_addr = cpu_to_le64(dma_handle);
1741 rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1742 if (rc == 0)
1743 memcpy(data, buf, len > buflen ? buflen : len);
1744 dma_free_coherent(&bp->pdev->dev, buflen, buf, dma_handle);
1745 return rc;
1746}
1747
1748static int bnxt_get_nvram_item(struct net_device *dev, u32 index, u32 offset,
1749 u32 length, u8 *data)
1750{
1751 struct bnxt *bp = netdev_priv(dev);
1752 int rc;
1753 u8 *buf;
1754 dma_addr_t dma_handle;
1755 struct hwrm_nvm_read_input req = {0};
1756
1757 buf = dma_alloc_coherent(&bp->pdev->dev, length, &dma_handle,
1758 GFP_KERNEL);
1759 if (!buf) {
1760 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
1761 (unsigned)length);
1762 return -ENOMEM;
1763 }
1764 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_READ, -1, -1);
1765 req.host_dest_addr = cpu_to_le64(dma_handle);
1766 req.dir_idx = cpu_to_le16(index);
1767 req.offset = cpu_to_le32(offset);
1768 req.len = cpu_to_le32(length);
1769
1770 rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1771 if (rc == 0)
1772 memcpy(data, buf, length);
1773 dma_free_coherent(&bp->pdev->dev, length, buf, dma_handle);
1774 return rc;
1775}
1776
3ebf6f0a
RS		 1777static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
1778 u16 ext, u16 *index, u32 *item_length,
1779 u32 *data_length)
1780{
1781 struct bnxt *bp = netdev_priv(dev);
1782 int rc;
1783 struct hwrm_nvm_find_dir_entry_input req = {0};
1784 struct hwrm_nvm_find_dir_entry_output *output = bp->hwrm_cmd_resp_addr;
1785
1786 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_FIND_DIR_ENTRY, -1, -1);
1787 req.enables = 0;
1788 req.dir_idx = 0;
1789 req.dir_type = cpu_to_le16(type);
1790 req.dir_ordinal = cpu_to_le16(ordinal);
1791 req.dir_ext = cpu_to_le16(ext);
1792 req.opt_ordinal = NVM_FIND_DIR_ENTRY_REQ_OPT_ORDINAL_EQ;
90e20921 1793 rc = hwrm_send_message_silent(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
3ebf6f0a
RS		 1794 if (rc == 0) {
1795 if (index)
1796 *index = le16_to_cpu(output->dir_idx);
1797 if (item_length)
1798 *item_length = le32_to_cpu(output->dir_item_length);
1799 if (data_length)
1800 *data_length = le32_to_cpu(output->dir_data_length);
1801 }
1802 return rc;
1803}
1804
1805static char *bnxt_parse_pkglog(int desired_field, u8 *data, size_t datalen)
1806{
1807 char *retval = NULL;
1808 char *p;
1809 char *value;
1810 int field = 0;
1811
1812 if (datalen < 1)
1813 return NULL;
1814 /* null-terminate the log data (removing last '\n'): */
1815 data[datalen - 1] = 0;
1816 for (p = data; *p != 0; p++) {
1817 field = 0;
1818 retval = NULL;
1819 while (*p != 0 && *p != '\n') {
1820 value = p;
1821 while (*p != 0 && *p != '\t' && *p != '\n')
1822 p++;
1823 if (field == desired_field)
1824 retval = value;
1825 if (*p != '\t')
1826 break;
1827 *p = 0;
1828 field++;
1829 p++;
1830 }
1831 if (*p == 0)
1832 break;
1833 *p = 0;
1834 }
1835 return retval;
1836}
1837
1838static char *bnxt_get_pkgver(struct net_device *dev, char *buf, size_t buflen)
1839{
1840 u16 index = 0;
1841 u32 datalen;
1842
1843 if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_PKG_LOG,
1844 BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
1845 &index, NULL, &datalen) != 0)
1846 return NULL;
1847
1848 memset(buf, 0, buflen);
1849 if (bnxt_get_nvram_item(dev, index, 0, datalen, buf) != 0)
1850 return NULL;
1851
1852 return bnxt_parse_pkglog(BNX_PKG_LOG_FIELD_IDX_PKG_VERSION, buf,
1853 datalen);
1854}
1855
c0c050c5
MC		 1856static int bnxt_get_eeprom(struct net_device *dev,
1857 struct ethtool_eeprom *eeprom,
1858 u8 *data)
1859{
1860 u32 index;
1861 u32 offset;
1862
1863 if (eeprom->offset == 0) /* special offset value to get directory */
1864 return bnxt_get_nvram_directory(dev, eeprom->len, data);
1865
1866 index = eeprom->offset >> 24;
1867 offset = eeprom->offset & 0xffffff;
1868
1869 if (index == 0) {
1870 netdev_err(dev, "unsupported index value: %d\n", index);
1871 return -EINVAL;
1872 }
1873
1874 return bnxt_get_nvram_item(dev, index - 1, offset, eeprom->len, data);
1875}
1876
1877static int bnxt_erase_nvram_directory(struct net_device *dev, u8 index)
1878{
1879 struct bnxt *bp = netdev_priv(dev);
1880 struct hwrm_nvm_erase_dir_entry_input req = {0};
1881
1882 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_ERASE_DIR_ENTRY, -1, -1);
1883 req.dir_idx = cpu_to_le16(index);
1884 return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1885}
1886
1887static int bnxt_set_eeprom(struct net_device *dev,
1888 struct ethtool_eeprom *eeprom,
1889 u8 *data)
1890{
1891 struct bnxt *bp = netdev_priv(dev);
1892 u8 index, dir_op;
1893 u16 type, ext, ordinal, attr;
1894
1895 if (!BNXT_PF(bp)) {
1896 netdev_err(dev, "NVM write not supported from a virtual function\n");
1897 return -EINVAL;
1898 }
1899
1900 type = eeprom->magic >> 16;
1901
1902 if (type == 0xffff) { /* special value for directory operations */
1903 index = eeprom->magic & 0xff;
1904 dir_op = eeprom->magic >> 8;
1905 if (index == 0)
1906 return -EINVAL;
1907 switch (dir_op) {
1908 case 0x0e: /* erase */
1909 if (eeprom->offset != ~eeprom->magic)
1910 return -EINVAL;
1911 return bnxt_erase_nvram_directory(dev, index - 1);
1912 default:
1913 return -EINVAL;
1914 }
1915 }
1916
1917 /* Create or re-write an NVM item: */
1918 if (bnxt_dir_type_is_executable(type) == true)
5ac67d8b 1919 return -EOPNOTSUPP;
c0c050c5
MC		 1920 ext = eeprom->magic & 0xffff;
1921 ordinal = eeprom->offset >> 16;
1922 attr = eeprom->offset & 0xffff;
1923
1924 return bnxt_flash_nvram(dev, type, ordinal, ext, attr, data,
1925 eeprom->len);
1926}
1927
72b34f04
MC		 1928static int bnxt_set_eee(struct net_device *dev, struct ethtool_eee *edata)
1929{
1930 struct bnxt *bp = netdev_priv(dev);
1931 struct ethtool_eee *eee = &bp->eee;
1932 struct bnxt_link_info *link_info = &bp->link_info;
1933 u32 advertising =
1934 _bnxt_fw_to_ethtool_adv_spds(link_info->advertising, 0);
1935 int rc = 0;
1936
567b2abe 1937 if (!BNXT_SINGLE_PF(bp))
75362a3f 1938 return -EOPNOTSUPP;
72b34f04
MC		 1939
1940 if (!(bp->flags & BNXT_FLAG_EEE_CAP))
1941 return -EOPNOTSUPP;
1942
1943 if (!edata->eee_enabled)
1944 goto eee_ok;
1945
1946 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) {
1947 netdev_warn(dev, "EEE requires autoneg\n");
1948 return -EINVAL;
1949 }
1950 if (edata->tx_lpi_enabled) {
1951 if (bp->lpi_tmr_hi && (edata->tx_lpi_timer > bp->lpi_tmr_hi ||
1952 edata->tx_lpi_timer < bp->lpi_tmr_lo)) {
1953 netdev_warn(dev, "Valid LPI timer range is %d and %d microsecs\n",
1954 bp->lpi_tmr_lo, bp->lpi_tmr_hi);
1955 return -EINVAL;
1956 } else if (!bp->lpi_tmr_hi) {
1957 edata->tx_lpi_timer = eee->tx_lpi_timer;
1958 }
1959 }
1960 if (!edata->advertised) {
1961 edata->advertised = advertising & eee->supported;
1962 } else if (edata->advertised & ~advertising) {
1963 netdev_warn(dev, "EEE advertised %x must be a subset of autoneg advertised speeds %x\n",
1964 edata->advertised, advertising);
1965 return -EINVAL;
1966 }
1967
1968 eee->advertised = edata->advertised;
1969 eee->tx_lpi_enabled = edata->tx_lpi_enabled;
1970 eee->tx_lpi_timer = edata->tx_lpi_timer;
1971eee_ok:
1972 eee->eee_enabled = edata->eee_enabled;
1973
1974 if (netif_running(dev))
1975 rc = bnxt_hwrm_set_link_setting(bp, false, true);
1976
1977 return rc;
1978}
1979
1980static int bnxt_get_eee(struct net_device *dev, struct ethtool_eee *edata)
1981{
1982 struct bnxt *bp = netdev_priv(dev);
1983
1984 if (!(bp->flags & BNXT_FLAG_EEE_CAP))
1985 return -EOPNOTSUPP;
1986
1987 *edata = bp->eee;
1988 if (!bp->eee.eee_enabled) {
1989 /* Preserve tx_lpi_timer so that the last value will be used
1990 * by default when it is re-enabled.
1991 */
1992 edata->advertised = 0;
1993 edata->tx_lpi_enabled = 0;
1994 }
1995
1996 if (!bp->eee.eee_active)
1997 edata->lp_advertised = 0;
1998
1999 return 0;
2000}
2001
42ee18fe
AK		 2002static int bnxt_read_sfp_module_eeprom_info(struct bnxt *bp, u16 i2c_addr,
2003 u16 page_number, u16 start_addr,
2004 u16 data_length, u8 *buf)
2005{
2006 struct hwrm_port_phy_i2c_read_input req = {0};
2007 struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr;
2008 int rc, byte_offset = 0;
2009
2010 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1);
2011 req.i2c_slave_addr = i2c_addr;
2012 req.page_number = cpu_to_le16(page_number);
2013 req.port_id = cpu_to_le16(bp->pf.port_id);
2014 do {
2015 u16 xfer_size;
2016
2017 xfer_size = min_t(u16, data_length, BNXT_MAX_PHY_I2C_RESP_SIZE);
2018 data_length -= xfer_size;
2019 req.page_offset = cpu_to_le16(start_addr + byte_offset);
2020 req.data_length = xfer_size;
2021 req.enables = cpu_to_le32(start_addr + byte_offset ?
2022 PORT_PHY_I2C_READ_REQ_ENABLES_PAGE_OFFSET : 0);
2023 mutex_lock(&bp->hwrm_cmd_lock);
2024 rc = _hwrm_send_message(bp, &req, sizeof(req),
2025 HWRM_CMD_TIMEOUT);
2026 if (!rc)
2027 memcpy(buf + byte_offset, output->data, xfer_size);
2028 mutex_unlock(&bp->hwrm_cmd_lock);
2029 byte_offset += xfer_size;
2030 } while (!rc && data_length > 0);
2031
2032 return rc;
2033}
2034
2035static int bnxt_get_module_info(struct net_device *dev,
2036 struct ethtool_modinfo *modinfo)
2037{
2038 struct bnxt *bp = netdev_priv(dev);
2039 struct hwrm_port_phy_i2c_read_input req = {0};
2040 struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr;
2041 int rc;
2042
2043 /* No point in going further if phy status indicates
2044 * module is not inserted or if it is powered down or
2045 * if it is of type 10GBase-T
2046 */
2047 if (bp->link_info.module_status >
2048 PORT_PHY_QCFG_RESP_MODULE_STATUS_WARNINGMSG)
2049 return -EOPNOTSUPP;
2050
2051 /* This feature is not supported in older firmware versions */
2052 if (bp->hwrm_spec_code < 0x10202)
2053 return -EOPNOTSUPP;
2054
2055 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1);
2056 req.i2c_slave_addr = I2C_DEV_ADDR_A0;
2057 req.page_number = 0;
2058 req.page_offset = cpu_to_le16(SFP_EEPROM_SFF_8472_COMP_ADDR);
2059 req.data_length = SFP_EEPROM_SFF_8472_COMP_SIZE;
2060 req.port_id = cpu_to_le16(bp->pf.port_id);
2061 mutex_lock(&bp->hwrm_cmd_lock);
2062 rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2063 if (!rc) {
2064 u32 module_id = le32_to_cpu(output->data[0]);
2065
2066 switch (module_id) {
2067 case SFF_MODULE_ID_SFP:
2068 modinfo->type = ETH_MODULE_SFF_8472;
2069 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
2070 break;
2071 case SFF_MODULE_ID_QSFP:
2072 case SFF_MODULE_ID_QSFP_PLUS:
2073 modinfo->type = ETH_MODULE_SFF_8436;
2074 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
2075 break;
2076 case SFF_MODULE_ID_QSFP28:
2077 modinfo->type = ETH_MODULE_SFF_8636;
2078 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
2079 break;
2080 default:
2081 rc = -EOPNOTSUPP;
2082 break;
2083 }
2084 }
2085 mutex_unlock(&bp->hwrm_cmd_lock);
2086 return rc;
2087}
2088
2089static int bnxt_get_module_eeprom(struct net_device *dev,
2090 struct ethtool_eeprom *eeprom,
2091 u8 *data)
2092{
2093 struct bnxt *bp = netdev_priv(dev);
2094 u16 start = eeprom->offset, length = eeprom->len;
f3ea3119 2095 int rc = 0;
42ee18fe
AK		 2096
2097 memset(data, 0, eeprom->len);
2098
2099 /* Read A0 portion of the EEPROM */
2100 if (start < ETH_MODULE_SFF_8436_LEN) {
2101 if (start + eeprom->len > ETH_MODULE_SFF_8436_LEN)
2102 length = ETH_MODULE_SFF_8436_LEN - start;
2103 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0,
2104 start, length, data);
2105 if (rc)
2106 return rc;
2107 start += length;
2108 data += length;
2109 length = eeprom->len - length;
2110 }
2111
2112 /* Read A2 portion of the EEPROM */
2113 if (length) {
2114 start -= ETH_MODULE_SFF_8436_LEN;
2115 bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A2, 1, start,
2116 length, data);
2117 }
2118 return rc;
2119}
2120
ae8e98a6
DK		 2121static int bnxt_nway_reset(struct net_device *dev)
2122{
2123 int rc = 0;
2124
2125 struct bnxt *bp = netdev_priv(dev);
2126 struct bnxt_link_info *link_info = &bp->link_info;
2127
2128 if (!BNXT_SINGLE_PF(bp))
2129 return -EOPNOTSUPP;
2130
2131 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED))
2132 return -EINVAL;
2133
2134 if (netif_running(dev))
2135 rc = bnxt_hwrm_set_link_setting(bp, true, false);
2136
2137 return rc;
2138}
2139
5ad2cbee
MC		 2140static int bnxt_set_phys_id(struct net_device *dev,
2141 enum ethtool_phys_id_state state)
2142{
2143 struct hwrm_port_led_cfg_input req = {0};
2144 struct bnxt *bp = netdev_priv(dev);
2145 struct bnxt_pf_info *pf = &bp->pf;
2146 struct bnxt_led_cfg *led_cfg;
2147 u8 led_state;
2148 __le16 duration;
2149 int i, rc;
2150
2151 if (!bp->num_leds || BNXT_VF(bp))
2152 return -EOPNOTSUPP;
2153
2154 if (state == ETHTOOL_ID_ACTIVE) {
2155 led_state = PORT_LED_CFG_REQ_LED0_STATE_BLINKALT;
2156 duration = cpu_to_le16(500);
2157 } else if (state == ETHTOOL_ID_INACTIVE) {
2158 led_state = PORT_LED_CFG_REQ_LED1_STATE_DEFAULT;
2159 duration = cpu_to_le16(0);
2160 } else {
2161 return -EINVAL;
2162 }
2163 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_LED_CFG, -1, -1);
2164 req.port_id = cpu_to_le16(pf->port_id);
2165 req.num_leds = bp->num_leds;
2166 led_cfg = (struct bnxt_led_cfg *)&req.led0_id;
2167 for (i = 0; i < bp->num_leds; i++, led_cfg++) {
2168 req.enables |= BNXT_LED_DFLT_ENABLES(i);
2169 led_cfg->led_id = bp->leds[i].led_id;
2170 led_cfg->led_state = led_state;
2171 led_cfg->led_blink_on = duration;
2172 led_cfg->led_blink_off = duration;
2173 led_cfg->led_group_id = bp->leds[i].led_group_id;
2174 }
2175 rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2176 if (rc)
2177 rc = -EIO;
2178 return rc;
2179}
2180
67fea463
MC		 2181static int bnxt_hwrm_selftest_irq(struct bnxt *bp, u16 cmpl_ring)
2182{
2183 struct hwrm_selftest_irq_input req = {0};
2184
2185 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_IRQ, cmpl_ring, -1);
2186 return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2187}
2188
2189static int bnxt_test_irq(struct bnxt *bp)
2190{
2191 int i;
2192
2193 for (i = 0; i < bp->cp_nr_rings; i++) {
2194 u16 cmpl_ring = bp->grp_info[i].cp_fw_ring_id;
2195 int rc;
2196
2197 rc = bnxt_hwrm_selftest_irq(bp, cmpl_ring);
2198 if (rc)
2199 return rc;
2200 }
2201 return 0;
2202}
2203
f7dc1ea6
MC		 2204static int bnxt_hwrm_mac_loopback(struct bnxt *bp, bool enable)
2205{
2206 struct hwrm_port_mac_cfg_input req = {0};
2207
2208 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_MAC_CFG, -1, -1);
2209
2210 req.enables = cpu_to_le32(PORT_MAC_CFG_REQ_ENABLES_LPBK);
2211 if (enable)
2212 req.lpbk = PORT_MAC_CFG_REQ_LPBK_LOCAL;
2213 else
2214 req.lpbk = PORT_MAC_CFG_REQ_LPBK_NONE;
2215 return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2216}
2217
91725d89
MC		 2218static int bnxt_disable_an_for_lpbk(struct bnxt *bp,
2219 struct hwrm_port_phy_cfg_input *req)
2220{
2221 struct bnxt_link_info *link_info = &bp->link_info;
2222 u16 fw_advertising = link_info->advertising;
2223 u16 fw_speed;
2224 int rc;
2225
2226 if (!link_info->autoneg)
2227 return 0;
2228
2229 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_1GB;
2230 if (netif_carrier_ok(bp->dev))
2231 fw_speed = bp->link_info.link_speed;
2232 else if (fw_advertising & BNXT_LINK_SPEED_MSK_10GB)
2233 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_10GB;
2234 else if (fw_advertising & BNXT_LINK_SPEED_MSK_25GB)
2235 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_25GB;
2236 else if (fw_advertising & BNXT_LINK_SPEED_MSK_40GB)
2237 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_40GB;
2238 else if (fw_advertising & BNXT_LINK_SPEED_MSK_50GB)
2239 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_50GB;
2240
2241 req->force_link_speed = cpu_to_le16(fw_speed);
2242 req->flags |= cpu_to_le32(PORT_PHY_CFG_REQ_FLAGS_FORCE |
2243 PORT_PHY_CFG_REQ_FLAGS_RESET_PHY);
2244 rc = hwrm_send_message(bp, req, sizeof(*req), HWRM_CMD_TIMEOUT);
2245 req->flags = 0;
2246 req->force_link_speed = cpu_to_le16(0);
2247 return rc;
2248}
2249
2250static int bnxt_hwrm_phy_loopback(struct bnxt *bp, bool enable)
2251{
2252 struct hwrm_port_phy_cfg_input req = {0};
2253
2254 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_CFG, -1, -1);
2255
2256 if (enable) {
2257 bnxt_disable_an_for_lpbk(bp, &req);
2258 req.lpbk = PORT_PHY_CFG_REQ_LPBK_LOCAL;
2259 } else {
2260 req.lpbk = PORT_PHY_CFG_REQ_LPBK_NONE;
2261 }
2262 req.enables = cpu_to_le32(PORT_PHY_CFG_REQ_ENABLES_LPBK);
2263 return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2264}
2265
f7dc1ea6
MC		 2266static int bnxt_rx_loopback(struct bnxt *bp, struct bnxt_napi *bnapi,
2267 u32 raw_cons, int pkt_size)
2268{
2269 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;
2270 struct bnxt_rx_ring_info *rxr = bnapi->rx_ring;
2271 struct bnxt_sw_rx_bd *rx_buf;
2272 struct rx_cmp *rxcmp;
2273 u16 cp_cons, cons;
2274 u8 *data;
2275 u32 len;
2276 int i;
2277
2278 cp_cons = RING_CMP(raw_cons);
2279 rxcmp = (struct rx_cmp *)
2280 &cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)];
2281 cons = rxcmp->rx_cmp_opaque;
2282 rx_buf = &rxr->rx_buf_ring[cons];
2283 data = rx_buf->data_ptr;
2284 len = le32_to_cpu(rxcmp->rx_cmp_len_flags_type) >> RX_CMP_LEN_SHIFT;
2285 if (len != pkt_size)
2286 return -EIO;
2287 i = ETH_ALEN;
2288 if (!ether_addr_equal(data + i, bnapi->bp->dev->dev_addr))
2289 return -EIO;
2290 i += ETH_ALEN;
2291 for ( ; i < pkt_size; i++) {
2292 if (data[i] != (u8)(i & 0xff))
2293 return -EIO;
2294 }
2295 return 0;
2296}
2297
2298static int bnxt_poll_loopback(struct bnxt *bp, int pkt_size)
2299{
2300 struct bnxt_napi *bnapi = bp->bnapi[0];
2301 struct bnxt_cp_ring_info *cpr;
2302 struct tx_cmp *txcmp;
2303 int rc = -EIO;
2304 u32 raw_cons;
2305 u32 cons;
2306 int i;
2307
2308 cpr = &bnapi->cp_ring;
2309 raw_cons = cpr->cp_raw_cons;
2310 for (i = 0; i < 200; i++) {
2311 cons = RING_CMP(raw_cons);
2312 txcmp = &cpr->cp_desc_ring[CP_RING(cons)][CP_IDX(cons)];
2313
2314 if (!TX_CMP_VALID(txcmp, raw_cons)) {
2315 udelay(5);
2316 continue;
2317 }
2318
2319 /* The valid test of the entry must be done first before
2320 * reading any further.
2321 */
2322 dma_rmb();
2323 if (TX_CMP_TYPE(txcmp) == CMP_TYPE_RX_L2_CMP) {
2324 rc = bnxt_rx_loopback(bp, bnapi, raw_cons, pkt_size);
2325 raw_cons = NEXT_RAW_CMP(raw_cons);
2326 raw_cons = NEXT_RAW_CMP(raw_cons);
2327 break;
2328 }
2329 raw_cons = NEXT_RAW_CMP(raw_cons);
2330 }
2331 cpr->cp_raw_cons = raw_cons;
2332 return rc;
2333}
2334
2335static int bnxt_run_loopback(struct bnxt *bp)
2336{
2337 struct bnxt_tx_ring_info *txr = &bp->tx_ring[0];
2338 int pkt_size, i = 0;
2339 struct sk_buff *skb;
2340 dma_addr_t map;
2341 u8 *data;
2342 int rc;
2343
2344 pkt_size = min(bp->dev->mtu + ETH_HLEN, bp->rx_copy_thresh);
2345 skb = netdev_alloc_skb(bp->dev, pkt_size);
2346 if (!skb)
2347 return -ENOMEM;
2348 data = skb_put(skb, pkt_size);
2349 eth_broadcast_addr(data);
2350 i += ETH_ALEN;
2351 ether_addr_copy(&data[i], bp->dev->dev_addr);
2352 i += ETH_ALEN;
2353 for ( ; i < pkt_size; i++)
2354 data[i] = (u8)(i & 0xff);
2355
2356 map = dma_map_single(&bp->pdev->dev, skb->data, pkt_size,
2357 PCI_DMA_TODEVICE);
2358 if (dma_mapping_error(&bp->pdev->dev, map)) {
2359 dev_kfree_skb(skb);
2360 return -EIO;
2361 }
2362 bnxt_xmit_xdp(bp, txr, map, pkt_size, 0);
2363
2364 /* Sync BD data before updating doorbell */
2365 wmb();
2366
2367 writel(DB_KEY_TX | txr->tx_prod, txr->tx_doorbell);
2368 writel(DB_KEY_TX | txr->tx_prod, txr->tx_doorbell);
2369 rc = bnxt_poll_loopback(bp, pkt_size);
2370
2371 dma_unmap_single(&bp->pdev->dev, map, pkt_size, PCI_DMA_TODEVICE);
2372 dev_kfree_skb(skb);
2373 return rc;
2374}
2375
eb513658
MC		 2376static int bnxt_run_fw_tests(struct bnxt *bp, u8 test_mask, u8 *test_results)
2377{
2378 struct hwrm_selftest_exec_output *resp = bp->hwrm_cmd_resp_addr;
2379 struct hwrm_selftest_exec_input req = {0};
2380 int rc;
2381
2382 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_EXEC, -1, -1);
2383 mutex_lock(&bp->hwrm_cmd_lock);
2384 resp->test_success = 0;
2385 req.flags = test_mask;
2386 rc = _hwrm_send_message(bp, &req, sizeof(req), bp->test_info->timeout);
2387 *test_results = resp->test_success;
2388 mutex_unlock(&bp->hwrm_cmd_lock);
2389 return rc;
2390}
2391
67fea463 2392#define BNXT_DRV_TESTS 3
f7dc1ea6 2393#define BNXT_MACLPBK_TEST_IDX (bp->num_tests - BNXT_DRV_TESTS)
91725d89 2394#define BNXT_PHYLPBK_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 1)
67fea463 2395#define BNXT_IRQ_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 2)
eb513658
MC		 2396
2397static void bnxt_self_test(struct net_device *dev, struct ethtool_test *etest,
2398 u64 *buf)
2399{
2400 struct bnxt *bp = netdev_priv(dev);
2401 bool offline = false;
2402 u8 test_results = 0;
2403 u8 test_mask = 0;
2404 int rc, i;
2405
2406 if (!bp->num_tests || !BNXT_SINGLE_PF(bp))
2407 return;
2408 memset(buf, 0, sizeof(u64) * bp->num_tests);
2409 if (!netif_running(dev)) {
2410 etest->flags |= ETH_TEST_FL_FAILED;
2411 return;
2412 }
2413
2414 if (etest->flags & ETH_TEST_FL_OFFLINE) {
2415 if (bp->pf.active_vfs) {
2416 etest->flags |= ETH_TEST_FL_FAILED;
2417 netdev_warn(dev, "Offline tests cannot be run with active VFs\n");
2418 return;
2419 }
2420 offline = true;
2421 }
2422
2423 for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) {
2424 u8 bit_val = 1 << i;
2425
2426 if (!(bp->test_info->offline_mask & bit_val))
2427 test_mask |= bit_val;
2428 else if (offline)
2429 test_mask |= bit_val;
2430 }
2431 if (!offline) {
2432 bnxt_run_fw_tests(bp, test_mask, &test_results);
2433 } else {
2434 rc = bnxt_close_nic(bp, false, false);
2435 if (rc)
2436 return;
2437 bnxt_run_fw_tests(bp, test_mask, &test_results);
f7dc1ea6
MC		 2438
2439 buf[BNXT_MACLPBK_TEST_IDX] = 1;
2440 bnxt_hwrm_mac_loopback(bp, true);
2441 msleep(250);
2442 rc = bnxt_half_open_nic(bp);
2443 if (rc) {
2444 bnxt_hwrm_mac_loopback(bp, false);
2445 etest->flags |= ETH_TEST_FL_FAILED;
2446 return;
2447 }
2448 if (bnxt_run_loopback(bp))
2449 etest->flags |= ETH_TEST_FL_FAILED;
2450 else
2451 buf[BNXT_MACLPBK_TEST_IDX] = 0;
2452
f7dc1ea6 2453 bnxt_hwrm_mac_loopback(bp, false);
91725d89
MC		 2454 bnxt_hwrm_phy_loopback(bp, true);
2455 msleep(1000);
2456 if (bnxt_run_loopback(bp)) {
2457 buf[BNXT_PHYLPBK_TEST_IDX] = 1;
2458 etest->flags |= ETH_TEST_FL_FAILED;
2459 }
2460 bnxt_hwrm_phy_loopback(bp, false);
2461 bnxt_half_close_nic(bp);
eb513658
MC		 2462 bnxt_open_nic(bp, false, true);
2463 }
67fea463
MC		 2464 if (bnxt_test_irq(bp)) {
2465 buf[BNXT_IRQ_TEST_IDX] = 1;
2466 etest->flags |= ETH_TEST_FL_FAILED;
2467 }
eb513658
MC		 2468 for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) {
2469 u8 bit_val = 1 << i;
2470
2471 if ((test_mask & bit_val) && !(test_results & bit_val)) {
2472 buf[i] = 1;
2473 etest->flags |= ETH_TEST_FL_FAILED;
2474 }
2475 }
2476}
2477
2478void bnxt_ethtool_init(struct bnxt *bp)
2479{
2480 struct hwrm_selftest_qlist_output *resp = bp->hwrm_cmd_resp_addr;
2481 struct hwrm_selftest_qlist_input req = {0};
2482 struct bnxt_test_info *test_info;
2483 int i, rc;
2484
2485 if (bp->hwrm_spec_code < 0x10704 || !BNXT_SINGLE_PF(bp))
2486 return;
2487
2488 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_QLIST, -1, -1);
2489 mutex_lock(&bp->hwrm_cmd_lock);
2490 rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2491 if (rc)
2492 goto ethtool_init_exit;
2493
2494 test_info = kzalloc(sizeof(*bp->test_info), GFP_KERNEL);
2495 if (!test_info)
2496 goto ethtool_init_exit;
2497
2498 bp->test_info = test_info;
2499 bp->num_tests = resp->num_tests + BNXT_DRV_TESTS;
2500 if (bp->num_tests > BNXT_MAX_TEST)
2501 bp->num_tests = BNXT_MAX_TEST;
2502
2503 test_info->offline_mask = resp->offline_tests;
2504 test_info->timeout = le16_to_cpu(resp->test_timeout);
2505 if (!test_info->timeout)
2506 test_info->timeout = HWRM_CMD_TIMEOUT;
2507 for (i = 0; i < bp->num_tests; i++) {
2508 char *str = test_info->string[i];
2509 char *fw_str = resp->test0_name + i * 32;
2510
f7dc1ea6
MC		 2511 if (i == BNXT_MACLPBK_TEST_IDX) {
2512 strcpy(str, "Mac loopback test (offline)");
91725d89
MC		 2513 } else if (i == BNXT_PHYLPBK_TEST_IDX) {
2514 strcpy(str, "Phy loopback test (offline)");
67fea463
MC		 2515 } else if (i == BNXT_IRQ_TEST_IDX) {
2516 strcpy(str, "Interrupt_test (offline)");
f7dc1ea6
MC		 2517 } else {
2518 strlcpy(str, fw_str, ETH_GSTRING_LEN);
2519 strncat(str, " test", ETH_GSTRING_LEN - strlen(str));
2520 if (test_info->offline_mask & (1 << i))
2521 strncat(str, " (offline)",
2522 ETH_GSTRING_LEN - strlen(str));
2523 else
2524 strncat(str, " (online)",
2525 ETH_GSTRING_LEN - strlen(str));
2526 }
eb513658
MC		 2527 }
2528
2529ethtool_init_exit:
2530 mutex_unlock(&bp->hwrm_cmd_lock);
2531}
2532
2533void bnxt_ethtool_free(struct bnxt *bp)
2534{
2535 kfree(bp->test_info);
2536 bp->test_info = NULL;
2537}
2538
c0c050c5 2539const struct ethtool_ops bnxt_ethtool_ops = {
00c04a92
MC		 2540 .get_link_ksettings = bnxt_get_link_ksettings,
2541 .set_link_ksettings = bnxt_set_link_ksettings,
c0c050c5
MC		 2542 .get_pauseparam = bnxt_get_pauseparam,
2543 .set_pauseparam = bnxt_set_pauseparam,
2544 .get_drvinfo = bnxt_get_drvinfo,
8e202366 2545 .get_wol = bnxt_get_wol,
5282db6c 2546 .set_wol = bnxt_set_wol,
c0c050c5
MC		 2547 .get_coalesce = bnxt_get_coalesce,
2548 .set_coalesce = bnxt_set_coalesce,
2549 .get_msglevel = bnxt_get_msglevel,
2550 .set_msglevel = bnxt_set_msglevel,
2551 .get_sset_count = bnxt_get_sset_count,
2552 .get_strings = bnxt_get_strings,
2553 .get_ethtool_stats = bnxt_get_ethtool_stats,
2554 .set_ringparam = bnxt_set_ringparam,
2555 .get_ringparam = bnxt_get_ringparam,
2556 .get_channels = bnxt_get_channels,
2557 .set_channels = bnxt_set_channels,
c0c050c5 2558 .get_rxnfc = bnxt_get_rxnfc,
a011952a 2559 .set_rxnfc = bnxt_set_rxnfc,
c0c050c5
MC		 2560 .get_rxfh_indir_size = bnxt_get_rxfh_indir_size,
2561 .get_rxfh_key_size = bnxt_get_rxfh_key_size,
2562 .get_rxfh = bnxt_get_rxfh,
2563 .flash_device = bnxt_flash_device,
2564 .get_eeprom_len = bnxt_get_eeprom_len,
2565 .get_eeprom = bnxt_get_eeprom,
2566 .set_eeprom = bnxt_set_eeprom,
2567 .get_link = bnxt_get_link,
72b34f04
MC		 2568 .get_eee = bnxt_get_eee,
2569 .set_eee = bnxt_set_eee,
42ee18fe
AK		 2570 .get_module_info = bnxt_get_module_info,
2571 .get_module_eeprom = bnxt_get_module_eeprom,
5ad2cbee
MC		 2572 .nway_reset = bnxt_nway_reset,
2573 .set_phys_id = bnxt_set_phys_id,
eb513658 2574 .self_test = bnxt_self_test,
c0c050c5 2575};
Ubuntu Artful kernel mirror