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Commit | Line | Data |
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c0c050c5 MC |
1 | /* Broadcom NetXtreme-C/E network driver. |
2 | * | |
11f15ed3 | 3 | * Copyright (c) 2014-2016 Broadcom Corporation |
c0c050c5 MC |
4 | * |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License as published by | |
7 | * the Free Software Foundation. | |
8 | */ | |
9 | ||
3ebf6f0a | 10 | #include <linux/ctype.h> |
8ddc9aaa | 11 | #include <linux/stringify.h> |
c0c050c5 MC |
12 | #include <linux/ethtool.h> |
13 | #include <linux/interrupt.h> | |
14 | #include <linux/pci.h> | |
15 | #include <linux/etherdevice.h> | |
16 | #include <linux/crc32.h> | |
17 | #include <linux/firmware.h> | |
18 | #include "bnxt_hsi.h" | |
19 | #include "bnxt.h" | |
20 | #include "bnxt_ethtool.h" | |
21 | #include "bnxt_nvm_defs.h" /* NVRAM content constant and structure defs */ | |
22 | #include "bnxt_fw_hdr.h" /* Firmware hdr constant and structure defs */ | |
23 | #define FLASH_NVRAM_TIMEOUT ((HWRM_CMD_TIMEOUT) * 100) | |
5ac67d8b RS |
24 | #define FLASH_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200) |
25 | #define INSTALL_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200) | |
c0c050c5 | 26 | |
3ebf6f0a RS |
27 | static char *bnxt_get_pkgver(struct net_device *dev, char *buf, size_t buflen); |
28 | ||
c0c050c5 MC |
29 | static u32 bnxt_get_msglevel(struct net_device *dev) |
30 | { | |
31 | struct bnxt *bp = netdev_priv(dev); | |
32 | ||
33 | return bp->msg_enable; | |
34 | } | |
35 | ||
36 | static void bnxt_set_msglevel(struct net_device *dev, u32 value) | |
37 | { | |
38 | struct bnxt *bp = netdev_priv(dev); | |
39 | ||
40 | bp->msg_enable = value; | |
41 | } | |
42 | ||
43 | static int bnxt_get_coalesce(struct net_device *dev, | |
44 | struct ethtool_coalesce *coal) | |
45 | { | |
46 | struct bnxt *bp = netdev_priv(dev); | |
47 | ||
48 | memset(coal, 0, sizeof(*coal)); | |
49 | ||
dfb5b894 MC |
50 | coal->rx_coalesce_usecs = bp->rx_coal_ticks; |
51 | /* 2 completion records per rx packet */ | |
52 | coal->rx_max_coalesced_frames = bp->rx_coal_bufs / 2; | |
53 | coal->rx_coalesce_usecs_irq = bp->rx_coal_ticks_irq; | |
54 | coal->rx_max_coalesced_frames_irq = bp->rx_coal_bufs_irq / 2; | |
c0c050c5 | 55 | |
dfc9c94a MC |
56 | coal->tx_coalesce_usecs = bp->tx_coal_ticks; |
57 | coal->tx_max_coalesced_frames = bp->tx_coal_bufs; | |
58 | coal->tx_coalesce_usecs_irq = bp->tx_coal_ticks_irq; | |
59 | coal->tx_max_coalesced_frames_irq = bp->tx_coal_bufs_irq; | |
60 | ||
51f30785 MC |
61 | coal->stats_block_coalesce_usecs = bp->stats_coal_ticks; |
62 | ||
c0c050c5 MC |
63 | return 0; |
64 | } | |
65 | ||
66 | static int bnxt_set_coalesce(struct net_device *dev, | |
67 | struct ethtool_coalesce *coal) | |
68 | { | |
69 | struct bnxt *bp = netdev_priv(dev); | |
51f30785 | 70 | bool update_stats = false; |
c0c050c5 MC |
71 | int rc = 0; |
72 | ||
dfb5b894 MC |
73 | bp->rx_coal_ticks = coal->rx_coalesce_usecs; |
74 | /* 2 completion records per rx packet */ | |
75 | bp->rx_coal_bufs = coal->rx_max_coalesced_frames * 2; | |
76 | bp->rx_coal_ticks_irq = coal->rx_coalesce_usecs_irq; | |
77 | bp->rx_coal_bufs_irq = coal->rx_max_coalesced_frames_irq * 2; | |
c0c050c5 | 78 | |
dfc9c94a MC |
79 | bp->tx_coal_ticks = coal->tx_coalesce_usecs; |
80 | bp->tx_coal_bufs = coal->tx_max_coalesced_frames; | |
81 | bp->tx_coal_ticks_irq = coal->tx_coalesce_usecs_irq; | |
82 | bp->tx_coal_bufs_irq = coal->tx_max_coalesced_frames_irq; | |
83 | ||
51f30785 MC |
84 | if (bp->stats_coal_ticks != coal->stats_block_coalesce_usecs) { |
85 | u32 stats_ticks = coal->stats_block_coalesce_usecs; | |
86 | ||
87 | stats_ticks = clamp_t(u32, stats_ticks, | |
88 | BNXT_MIN_STATS_COAL_TICKS, | |
89 | BNXT_MAX_STATS_COAL_TICKS); | |
90 | stats_ticks = rounddown(stats_ticks, BNXT_MIN_STATS_COAL_TICKS); | |
91 | bp->stats_coal_ticks = stats_ticks; | |
92 | update_stats = true; | |
93 | } | |
94 | ||
95 | if (netif_running(dev)) { | |
96 | if (update_stats) { | |
97 | rc = bnxt_close_nic(bp, true, false); | |
98 | if (!rc) | |
99 | rc = bnxt_open_nic(bp, true, false); | |
100 | } else { | |
101 | rc = bnxt_hwrm_set_coal(bp); | |
102 | } | |
103 | } | |
c0c050c5 MC |
104 | |
105 | return rc; | |
106 | } | |
107 | ||
108 | #define BNXT_NUM_STATS 21 | |
109 | ||
8ddc9aaa MC |
110 | #define BNXT_RX_STATS_ENTRY(counter) \ |
111 | { BNXT_RX_STATS_OFFSET(counter), __stringify(counter) } | |
112 | ||
8ddc9aaa MC |
113 | #define BNXT_TX_STATS_ENTRY(counter) \ |
114 | { BNXT_TX_STATS_OFFSET(counter), __stringify(counter) } | |
115 | ||
116 | static const struct { | |
117 | long offset; | |
118 | char string[ETH_GSTRING_LEN]; | |
119 | } bnxt_port_stats_arr[] = { | |
120 | BNXT_RX_STATS_ENTRY(rx_64b_frames), | |
121 | BNXT_RX_STATS_ENTRY(rx_65b_127b_frames), | |
122 | BNXT_RX_STATS_ENTRY(rx_128b_255b_frames), | |
123 | BNXT_RX_STATS_ENTRY(rx_256b_511b_frames), | |
124 | BNXT_RX_STATS_ENTRY(rx_512b_1023b_frames), | |
125 | BNXT_RX_STATS_ENTRY(rx_1024b_1518_frames), | |
126 | BNXT_RX_STATS_ENTRY(rx_good_vlan_frames), | |
127 | BNXT_RX_STATS_ENTRY(rx_1519b_2047b_frames), | |
128 | BNXT_RX_STATS_ENTRY(rx_2048b_4095b_frames), | |
129 | BNXT_RX_STATS_ENTRY(rx_4096b_9216b_frames), | |
130 | BNXT_RX_STATS_ENTRY(rx_9217b_16383b_frames), | |
131 | BNXT_RX_STATS_ENTRY(rx_total_frames), | |
132 | BNXT_RX_STATS_ENTRY(rx_ucast_frames), | |
133 | BNXT_RX_STATS_ENTRY(rx_mcast_frames), | |
134 | BNXT_RX_STATS_ENTRY(rx_bcast_frames), | |
135 | BNXT_RX_STATS_ENTRY(rx_fcs_err_frames), | |
136 | BNXT_RX_STATS_ENTRY(rx_ctrl_frames), | |
137 | BNXT_RX_STATS_ENTRY(rx_pause_frames), | |
138 | BNXT_RX_STATS_ENTRY(rx_pfc_frames), | |
139 | BNXT_RX_STATS_ENTRY(rx_align_err_frames), | |
140 | BNXT_RX_STATS_ENTRY(rx_ovrsz_frames), | |
141 | BNXT_RX_STATS_ENTRY(rx_jbr_frames), | |
142 | BNXT_RX_STATS_ENTRY(rx_mtu_err_frames), | |
143 | BNXT_RX_STATS_ENTRY(rx_tagged_frames), | |
144 | BNXT_RX_STATS_ENTRY(rx_double_tagged_frames), | |
145 | BNXT_RX_STATS_ENTRY(rx_good_frames), | |
c77192f2 MC |
146 | BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri0), |
147 | BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri1), | |
148 | BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri2), | |
149 | BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri3), | |
150 | BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri4), | |
151 | BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri5), | |
152 | BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri6), | |
153 | BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri7), | |
8ddc9aaa MC |
154 | BNXT_RX_STATS_ENTRY(rx_undrsz_frames), |
155 | BNXT_RX_STATS_ENTRY(rx_eee_lpi_events), | |
156 | BNXT_RX_STATS_ENTRY(rx_eee_lpi_duration), | |
157 | BNXT_RX_STATS_ENTRY(rx_bytes), | |
158 | BNXT_RX_STATS_ENTRY(rx_runt_bytes), | |
159 | BNXT_RX_STATS_ENTRY(rx_runt_frames), | |
160 | ||
161 | BNXT_TX_STATS_ENTRY(tx_64b_frames), | |
162 | BNXT_TX_STATS_ENTRY(tx_65b_127b_frames), | |
163 | BNXT_TX_STATS_ENTRY(tx_128b_255b_frames), | |
164 | BNXT_TX_STATS_ENTRY(tx_256b_511b_frames), | |
165 | BNXT_TX_STATS_ENTRY(tx_512b_1023b_frames), | |
166 | BNXT_TX_STATS_ENTRY(tx_1024b_1518_frames), | |
167 | BNXT_TX_STATS_ENTRY(tx_good_vlan_frames), | |
168 | BNXT_TX_STATS_ENTRY(tx_1519b_2047_frames), | |
169 | BNXT_TX_STATS_ENTRY(tx_2048b_4095b_frames), | |
170 | BNXT_TX_STATS_ENTRY(tx_4096b_9216b_frames), | |
171 | BNXT_TX_STATS_ENTRY(tx_9217b_16383b_frames), | |
172 | BNXT_TX_STATS_ENTRY(tx_good_frames), | |
173 | BNXT_TX_STATS_ENTRY(tx_total_frames), | |
174 | BNXT_TX_STATS_ENTRY(tx_ucast_frames), | |
175 | BNXT_TX_STATS_ENTRY(tx_mcast_frames), | |
176 | BNXT_TX_STATS_ENTRY(tx_bcast_frames), | |
177 | BNXT_TX_STATS_ENTRY(tx_pause_frames), | |
178 | BNXT_TX_STATS_ENTRY(tx_pfc_frames), | |
179 | BNXT_TX_STATS_ENTRY(tx_jabber_frames), | |
180 | BNXT_TX_STATS_ENTRY(tx_fcs_err_frames), | |
181 | BNXT_TX_STATS_ENTRY(tx_err), | |
182 | BNXT_TX_STATS_ENTRY(tx_fifo_underruns), | |
c77192f2 MC |
183 | BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri0), |
184 | BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri1), | |
185 | BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri2), | |
186 | BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri3), | |
187 | BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri4), | |
188 | BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri5), | |
189 | BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri6), | |
190 | BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri7), | |
8ddc9aaa MC |
191 | BNXT_TX_STATS_ENTRY(tx_eee_lpi_events), |
192 | BNXT_TX_STATS_ENTRY(tx_eee_lpi_duration), | |
193 | BNXT_TX_STATS_ENTRY(tx_total_collisions), | |
194 | BNXT_TX_STATS_ENTRY(tx_bytes), | |
195 | }; | |
196 | ||
197 | #define BNXT_NUM_PORT_STATS ARRAY_SIZE(bnxt_port_stats_arr) | |
198 | ||
c0c050c5 MC |
199 | static int bnxt_get_sset_count(struct net_device *dev, int sset) |
200 | { | |
201 | struct bnxt *bp = netdev_priv(dev); | |
202 | ||
203 | switch (sset) { | |
8ddc9aaa MC |
204 | case ETH_SS_STATS: { |
205 | int num_stats = BNXT_NUM_STATS * bp->cp_nr_rings; | |
206 | ||
207 | if (bp->flags & BNXT_FLAG_PORT_STATS) | |
208 | num_stats += BNXT_NUM_PORT_STATS; | |
209 | ||
210 | return num_stats; | |
211 | } | |
c0c050c5 MC |
212 | default: |
213 | return -EOPNOTSUPP; | |
214 | } | |
215 | } | |
216 | ||
217 | static void bnxt_get_ethtool_stats(struct net_device *dev, | |
218 | struct ethtool_stats *stats, u64 *buf) | |
219 | { | |
220 | u32 i, j = 0; | |
221 | struct bnxt *bp = netdev_priv(dev); | |
222 | u32 buf_size = sizeof(struct ctx_hw_stats) * bp->cp_nr_rings; | |
223 | u32 stat_fields = sizeof(struct ctx_hw_stats) / 8; | |
224 | ||
225 | memset(buf, 0, buf_size); | |
226 | ||
227 | if (!bp->bnapi) | |
228 | return; | |
229 | ||
230 | for (i = 0; i < bp->cp_nr_rings; i++) { | |
231 | struct bnxt_napi *bnapi = bp->bnapi[i]; | |
232 | struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; | |
233 | __le64 *hw_stats = (__le64 *)cpr->hw_stats; | |
234 | int k; | |
235 | ||
236 | for (k = 0; k < stat_fields; j++, k++) | |
237 | buf[j] = le64_to_cpu(hw_stats[k]); | |
238 | buf[j++] = cpr->rx_l4_csum_errors; | |
239 | } | |
8ddc9aaa MC |
240 | if (bp->flags & BNXT_FLAG_PORT_STATS) { |
241 | __le64 *port_stats = (__le64 *)bp->hw_rx_port_stats; | |
242 | ||
243 | for (i = 0; i < BNXT_NUM_PORT_STATS; i++, j++) { | |
244 | buf[j] = le64_to_cpu(*(port_stats + | |
245 | bnxt_port_stats_arr[i].offset)); | |
246 | } | |
247 | } | |
c0c050c5 MC |
248 | } |
249 | ||
250 | static void bnxt_get_strings(struct net_device *dev, u32 stringset, u8 *buf) | |
251 | { | |
252 | struct bnxt *bp = netdev_priv(dev); | |
253 | u32 i; | |
254 | ||
255 | switch (stringset) { | |
256 | /* The number of strings must match BNXT_NUM_STATS defined above. */ | |
257 | case ETH_SS_STATS: | |
258 | for (i = 0; i < bp->cp_nr_rings; i++) { | |
259 | sprintf(buf, "[%d]: rx_ucast_packets", i); | |
260 | buf += ETH_GSTRING_LEN; | |
261 | sprintf(buf, "[%d]: rx_mcast_packets", i); | |
262 | buf += ETH_GSTRING_LEN; | |
263 | sprintf(buf, "[%d]: rx_bcast_packets", i); | |
264 | buf += ETH_GSTRING_LEN; | |
265 | sprintf(buf, "[%d]: rx_discards", i); | |
266 | buf += ETH_GSTRING_LEN; | |
267 | sprintf(buf, "[%d]: rx_drops", i); | |
268 | buf += ETH_GSTRING_LEN; | |
269 | sprintf(buf, "[%d]: rx_ucast_bytes", i); | |
270 | buf += ETH_GSTRING_LEN; | |
271 | sprintf(buf, "[%d]: rx_mcast_bytes", i); | |
272 | buf += ETH_GSTRING_LEN; | |
273 | sprintf(buf, "[%d]: rx_bcast_bytes", i); | |
274 | buf += ETH_GSTRING_LEN; | |
275 | sprintf(buf, "[%d]: tx_ucast_packets", i); | |
276 | buf += ETH_GSTRING_LEN; | |
277 | sprintf(buf, "[%d]: tx_mcast_packets", i); | |
278 | buf += ETH_GSTRING_LEN; | |
279 | sprintf(buf, "[%d]: tx_bcast_packets", i); | |
280 | buf += ETH_GSTRING_LEN; | |
281 | sprintf(buf, "[%d]: tx_discards", i); | |
282 | buf += ETH_GSTRING_LEN; | |
283 | sprintf(buf, "[%d]: tx_drops", i); | |
284 | buf += ETH_GSTRING_LEN; | |
285 | sprintf(buf, "[%d]: tx_ucast_bytes", i); | |
286 | buf += ETH_GSTRING_LEN; | |
287 | sprintf(buf, "[%d]: tx_mcast_bytes", i); | |
288 | buf += ETH_GSTRING_LEN; | |
289 | sprintf(buf, "[%d]: tx_bcast_bytes", i); | |
290 | buf += ETH_GSTRING_LEN; | |
291 | sprintf(buf, "[%d]: tpa_packets", i); | |
292 | buf += ETH_GSTRING_LEN; | |
293 | sprintf(buf, "[%d]: tpa_bytes", i); | |
294 | buf += ETH_GSTRING_LEN; | |
295 | sprintf(buf, "[%d]: tpa_events", i); | |
296 | buf += ETH_GSTRING_LEN; | |
297 | sprintf(buf, "[%d]: tpa_aborts", i); | |
298 | buf += ETH_GSTRING_LEN; | |
299 | sprintf(buf, "[%d]: rx_l4_csum_errors", i); | |
300 | buf += ETH_GSTRING_LEN; | |
301 | } | |
8ddc9aaa MC |
302 | if (bp->flags & BNXT_FLAG_PORT_STATS) { |
303 | for (i = 0; i < BNXT_NUM_PORT_STATS; i++) { | |
304 | strcpy(buf, bnxt_port_stats_arr[i].string); | |
305 | buf += ETH_GSTRING_LEN; | |
306 | } | |
307 | } | |
c0c050c5 MC |
308 | break; |
309 | default: | |
310 | netdev_err(bp->dev, "bnxt_get_strings invalid request %x\n", | |
311 | stringset); | |
312 | break; | |
313 | } | |
314 | } | |
315 | ||
316 | static void bnxt_get_ringparam(struct net_device *dev, | |
317 | struct ethtool_ringparam *ering) | |
318 | { | |
319 | struct bnxt *bp = netdev_priv(dev); | |
320 | ||
321 | ering->rx_max_pending = BNXT_MAX_RX_DESC_CNT; | |
322 | ering->rx_jumbo_max_pending = BNXT_MAX_RX_JUM_DESC_CNT; | |
323 | ering->tx_max_pending = BNXT_MAX_TX_DESC_CNT; | |
324 | ||
325 | ering->rx_pending = bp->rx_ring_size; | |
326 | ering->rx_jumbo_pending = bp->rx_agg_ring_size; | |
327 | ering->tx_pending = bp->tx_ring_size; | |
328 | } | |
329 | ||
330 | static int bnxt_set_ringparam(struct net_device *dev, | |
331 | struct ethtool_ringparam *ering) | |
332 | { | |
333 | struct bnxt *bp = netdev_priv(dev); | |
334 | ||
335 | if ((ering->rx_pending > BNXT_MAX_RX_DESC_CNT) || | |
336 | (ering->tx_pending > BNXT_MAX_TX_DESC_CNT) || | |
337 | (ering->tx_pending <= MAX_SKB_FRAGS)) | |
338 | return -EINVAL; | |
339 | ||
340 | if (netif_running(dev)) | |
341 | bnxt_close_nic(bp, false, false); | |
342 | ||
343 | bp->rx_ring_size = ering->rx_pending; | |
344 | bp->tx_ring_size = ering->tx_pending; | |
345 | bnxt_set_ring_params(bp); | |
346 | ||
347 | if (netif_running(dev)) | |
348 | return bnxt_open_nic(bp, false, false); | |
349 | ||
350 | return 0; | |
351 | } | |
352 | ||
353 | static void bnxt_get_channels(struct net_device *dev, | |
354 | struct ethtool_channels *channel) | |
355 | { | |
356 | struct bnxt *bp = netdev_priv(dev); | |
357 | int max_rx_rings, max_tx_rings, tcs; | |
358 | ||
6e6c5a57 | 359 | bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, true); |
a79a5276 | 360 | channel->max_combined = min_t(int, max_rx_rings, max_tx_rings); |
068c9ec6 | 361 | |
18d6e4e2 SB |
362 | if (bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, false)) { |
363 | max_rx_rings = 0; | |
364 | max_tx_rings = 0; | |
365 | } | |
366 | ||
c0c050c5 MC |
367 | tcs = netdev_get_num_tc(dev); |
368 | if (tcs > 1) | |
369 | max_tx_rings /= tcs; | |
370 | ||
371 | channel->max_rx = max_rx_rings; | |
372 | channel->max_tx = max_tx_rings; | |
373 | channel->max_other = 0; | |
068c9ec6 MC |
374 | if (bp->flags & BNXT_FLAG_SHARED_RINGS) { |
375 | channel->combined_count = bp->rx_nr_rings; | |
76595193 PS |
376 | if (BNXT_CHIP_TYPE_NITRO_A0(bp)) |
377 | channel->combined_count--; | |
068c9ec6 | 378 | } else { |
76595193 PS |
379 | if (!BNXT_CHIP_TYPE_NITRO_A0(bp)) { |
380 | channel->rx_count = bp->rx_nr_rings; | |
381 | channel->tx_count = bp->tx_nr_rings_per_tc; | |
382 | } | |
068c9ec6 | 383 | } |
c0c050c5 MC |
384 | } |
385 | ||
386 | static int bnxt_set_channels(struct net_device *dev, | |
387 | struct ethtool_channels *channel) | |
388 | { | |
389 | struct bnxt *bp = netdev_priv(dev); | |
d1e7925e | 390 | int req_tx_rings, req_rx_rings, tcs; |
068c9ec6 | 391 | bool sh = false; |
5f449249 | 392 | int tx_xdp = 0; |
d1e7925e | 393 | int rc = 0; |
c0c050c5 | 394 | |
068c9ec6 | 395 | if (channel->other_count) |
c0c050c5 MC |
396 | return -EINVAL; |
397 | ||
068c9ec6 MC |
398 | if (!channel->combined_count && |
399 | (!channel->rx_count || !channel->tx_count)) | |
400 | return -EINVAL; | |
401 | ||
402 | if (channel->combined_count && | |
403 | (channel->rx_count || channel->tx_count)) | |
404 | return -EINVAL; | |
405 | ||
76595193 PS |
406 | if (BNXT_CHIP_TYPE_NITRO_A0(bp) && (channel->rx_count || |
407 | channel->tx_count)) | |
408 | return -EINVAL; | |
409 | ||
068c9ec6 MC |
410 | if (channel->combined_count) |
411 | sh = true; | |
412 | ||
c0c050c5 | 413 | tcs = netdev_get_num_tc(dev); |
c0c050c5 | 414 | |
391be5c2 | 415 | req_tx_rings = sh ? channel->combined_count : channel->tx_count; |
d1e7925e | 416 | req_rx_rings = sh ? channel->combined_count : channel->rx_count; |
5f449249 MC |
417 | if (bp->tx_nr_rings_xdp) { |
418 | if (!sh) { | |
419 | netdev_err(dev, "Only combined mode supported when XDP is enabled.\n"); | |
420 | return -EINVAL; | |
421 | } | |
422 | tx_xdp = req_rx_rings; | |
423 | } | |
424 | rc = bnxt_reserve_rings(bp, req_tx_rings, req_rx_rings, tcs, tx_xdp); | |
d1e7925e MC |
425 | if (rc) { |
426 | netdev_warn(dev, "Unable to allocate the requested rings\n"); | |
427 | return rc; | |
391be5c2 MC |
428 | } |
429 | ||
c0c050c5 MC |
430 | if (netif_running(dev)) { |
431 | if (BNXT_PF(bp)) { | |
432 | /* TODO CHIMP_FW: Send message to all VF's | |
433 | * before PF unload | |
434 | */ | |
435 | } | |
436 | rc = bnxt_close_nic(bp, true, false); | |
437 | if (rc) { | |
438 | netdev_err(bp->dev, "Set channel failure rc :%x\n", | |
439 | rc); | |
440 | return rc; | |
441 | } | |
442 | } | |
443 | ||
068c9ec6 MC |
444 | if (sh) { |
445 | bp->flags |= BNXT_FLAG_SHARED_RINGS; | |
d1e7925e MC |
446 | bp->rx_nr_rings = channel->combined_count; |
447 | bp->tx_nr_rings_per_tc = channel->combined_count; | |
068c9ec6 MC |
448 | } else { |
449 | bp->flags &= ~BNXT_FLAG_SHARED_RINGS; | |
450 | bp->rx_nr_rings = channel->rx_count; | |
451 | bp->tx_nr_rings_per_tc = channel->tx_count; | |
452 | } | |
5f449249 MC |
453 | bp->tx_nr_rings_xdp = tx_xdp; |
454 | bp->tx_nr_rings = bp->tx_nr_rings_per_tc + tx_xdp; | |
c0c050c5 | 455 | if (tcs > 1) |
5f449249 | 456 | bp->tx_nr_rings = bp->tx_nr_rings_per_tc * tcs + tx_xdp; |
068c9ec6 MC |
457 | |
458 | bp->cp_nr_rings = sh ? max_t(int, bp->tx_nr_rings, bp->rx_nr_rings) : | |
459 | bp->tx_nr_rings + bp->rx_nr_rings; | |
460 | ||
c0c050c5 MC |
461 | bp->num_stat_ctxs = bp->cp_nr_rings; |
462 | ||
2bcfa6f6 MC |
463 | /* After changing number of rx channels, update NTUPLE feature. */ |
464 | netdev_update_features(dev); | |
c0c050c5 MC |
465 | if (netif_running(dev)) { |
466 | rc = bnxt_open_nic(bp, true, false); | |
467 | if ((!rc) && BNXT_PF(bp)) { | |
468 | /* TODO CHIMP_FW: Send message to all VF's | |
469 | * to renable | |
470 | */ | |
471 | } | |
472 | } | |
473 | ||
474 | return rc; | |
475 | } | |
476 | ||
477 | #ifdef CONFIG_RFS_ACCEL | |
478 | static int bnxt_grxclsrlall(struct bnxt *bp, struct ethtool_rxnfc *cmd, | |
479 | u32 *rule_locs) | |
480 | { | |
481 | int i, j = 0; | |
482 | ||
483 | cmd->data = bp->ntp_fltr_count; | |
484 | for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) { | |
485 | struct hlist_head *head; | |
486 | struct bnxt_ntuple_filter *fltr; | |
487 | ||
488 | head = &bp->ntp_fltr_hash_tbl[i]; | |
489 | rcu_read_lock(); | |
490 | hlist_for_each_entry_rcu(fltr, head, hash) { | |
491 | if (j == cmd->rule_cnt) | |
492 | break; | |
493 | rule_locs[j++] = fltr->sw_id; | |
494 | } | |
495 | rcu_read_unlock(); | |
496 | if (j == cmd->rule_cnt) | |
497 | break; | |
498 | } | |
499 | cmd->rule_cnt = j; | |
500 | return 0; | |
501 | } | |
502 | ||
503 | static int bnxt_grxclsrule(struct bnxt *bp, struct ethtool_rxnfc *cmd) | |
504 | { | |
505 | struct ethtool_rx_flow_spec *fs = | |
506 | (struct ethtool_rx_flow_spec *)&cmd->fs; | |
507 | struct bnxt_ntuple_filter *fltr; | |
508 | struct flow_keys *fkeys; | |
509 | int i, rc = -EINVAL; | |
510 | ||
511 | if (fs->location < 0 || fs->location >= BNXT_NTP_FLTR_MAX_FLTR) | |
512 | return rc; | |
513 | ||
514 | for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) { | |
515 | struct hlist_head *head; | |
516 | ||
517 | head = &bp->ntp_fltr_hash_tbl[i]; | |
518 | rcu_read_lock(); | |
519 | hlist_for_each_entry_rcu(fltr, head, hash) { | |
520 | if (fltr->sw_id == fs->location) | |
521 | goto fltr_found; | |
522 | } | |
523 | rcu_read_unlock(); | |
524 | } | |
525 | return rc; | |
526 | ||
527 | fltr_found: | |
528 | fkeys = &fltr->fkeys; | |
dda0e746 MC |
529 | if (fkeys->basic.n_proto == htons(ETH_P_IP)) { |
530 | if (fkeys->basic.ip_proto == IPPROTO_TCP) | |
531 | fs->flow_type = TCP_V4_FLOW; | |
532 | else if (fkeys->basic.ip_proto == IPPROTO_UDP) | |
533 | fs->flow_type = UDP_V4_FLOW; | |
534 | else | |
535 | goto fltr_err; | |
c0c050c5 | 536 | |
dda0e746 MC |
537 | fs->h_u.tcp_ip4_spec.ip4src = fkeys->addrs.v4addrs.src; |
538 | fs->m_u.tcp_ip4_spec.ip4src = cpu_to_be32(~0); | |
c0c050c5 | 539 | |
dda0e746 MC |
540 | fs->h_u.tcp_ip4_spec.ip4dst = fkeys->addrs.v4addrs.dst; |
541 | fs->m_u.tcp_ip4_spec.ip4dst = cpu_to_be32(~0); | |
c0c050c5 | 542 | |
dda0e746 MC |
543 | fs->h_u.tcp_ip4_spec.psrc = fkeys->ports.src; |
544 | fs->m_u.tcp_ip4_spec.psrc = cpu_to_be16(~0); | |
c0c050c5 | 545 | |
dda0e746 MC |
546 | fs->h_u.tcp_ip4_spec.pdst = fkeys->ports.dst; |
547 | fs->m_u.tcp_ip4_spec.pdst = cpu_to_be16(~0); | |
548 | } else { | |
549 | int i; | |
550 | ||
551 | if (fkeys->basic.ip_proto == IPPROTO_TCP) | |
552 | fs->flow_type = TCP_V6_FLOW; | |
553 | else if (fkeys->basic.ip_proto == IPPROTO_UDP) | |
554 | fs->flow_type = UDP_V6_FLOW; | |
555 | else | |
556 | goto fltr_err; | |
557 | ||
558 | *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6src[0] = | |
559 | fkeys->addrs.v6addrs.src; | |
560 | *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6dst[0] = | |
561 | fkeys->addrs.v6addrs.dst; | |
562 | for (i = 0; i < 4; i++) { | |
563 | fs->m_u.tcp_ip6_spec.ip6src[i] = cpu_to_be32(~0); | |
564 | fs->m_u.tcp_ip6_spec.ip6dst[i] = cpu_to_be32(~0); | |
565 | } | |
566 | fs->h_u.tcp_ip6_spec.psrc = fkeys->ports.src; | |
567 | fs->m_u.tcp_ip6_spec.psrc = cpu_to_be16(~0); | |
568 | ||
569 | fs->h_u.tcp_ip6_spec.pdst = fkeys->ports.dst; | |
570 | fs->m_u.tcp_ip6_spec.pdst = cpu_to_be16(~0); | |
571 | } | |
c0c050c5 MC |
572 | |
573 | fs->ring_cookie = fltr->rxq; | |
574 | rc = 0; | |
575 | ||
576 | fltr_err: | |
577 | rcu_read_unlock(); | |
578 | ||
579 | return rc; | |
580 | } | |
a011952a MC |
581 | #endif |
582 | ||
583 | static u64 get_ethtool_ipv4_rss(struct bnxt *bp) | |
584 | { | |
585 | if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4) | |
586 | return RXH_IP_SRC | RXH_IP_DST; | |
587 | return 0; | |
588 | } | |
589 | ||
590 | static u64 get_ethtool_ipv6_rss(struct bnxt *bp) | |
591 | { | |
592 | if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6) | |
593 | return RXH_IP_SRC | RXH_IP_DST; | |
594 | return 0; | |
595 | } | |
596 | ||
597 | static int bnxt_grxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd) | |
598 | { | |
599 | cmd->data = 0; | |
600 | switch (cmd->flow_type) { | |
601 | case TCP_V4_FLOW: | |
602 | if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4) | |
603 | cmd->data |= RXH_IP_SRC | RXH_IP_DST | | |
604 | RXH_L4_B_0_1 | RXH_L4_B_2_3; | |
605 | cmd->data |= get_ethtool_ipv4_rss(bp); | |
606 | break; | |
607 | case UDP_V4_FLOW: | |
608 | if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4) | |
609 | cmd->data |= RXH_IP_SRC | RXH_IP_DST | | |
610 | RXH_L4_B_0_1 | RXH_L4_B_2_3; | |
611 | /* fall through */ | |
612 | case SCTP_V4_FLOW: | |
613 | case AH_ESP_V4_FLOW: | |
614 | case AH_V4_FLOW: | |
615 | case ESP_V4_FLOW: | |
616 | case IPV4_FLOW: | |
617 | cmd->data |= get_ethtool_ipv4_rss(bp); | |
618 | break; | |
619 | ||
620 | case TCP_V6_FLOW: | |
621 | if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6) | |
622 | cmd->data |= RXH_IP_SRC | RXH_IP_DST | | |
623 | RXH_L4_B_0_1 | RXH_L4_B_2_3; | |
624 | cmd->data |= get_ethtool_ipv6_rss(bp); | |
625 | break; | |
626 | case UDP_V6_FLOW: | |
627 | if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6) | |
628 | cmd->data |= RXH_IP_SRC | RXH_IP_DST | | |
629 | RXH_L4_B_0_1 | RXH_L4_B_2_3; | |
630 | /* fall through */ | |
631 | case SCTP_V6_FLOW: | |
632 | case AH_ESP_V6_FLOW: | |
633 | case AH_V6_FLOW: | |
634 | case ESP_V6_FLOW: | |
635 | case IPV6_FLOW: | |
636 | cmd->data |= get_ethtool_ipv6_rss(bp); | |
637 | break; | |
638 | } | |
639 | return 0; | |
640 | } | |
641 | ||
642 | #define RXH_4TUPLE (RXH_IP_SRC | RXH_IP_DST | RXH_L4_B_0_1 | RXH_L4_B_2_3) | |
643 | #define RXH_2TUPLE (RXH_IP_SRC | RXH_IP_DST) | |
644 | ||
645 | static int bnxt_srxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd) | |
646 | { | |
647 | u32 rss_hash_cfg = bp->rss_hash_cfg; | |
648 | int tuple, rc = 0; | |
649 | ||
650 | if (cmd->data == RXH_4TUPLE) | |
651 | tuple = 4; | |
652 | else if (cmd->data == RXH_2TUPLE) | |
653 | tuple = 2; | |
654 | else if (!cmd->data) | |
655 | tuple = 0; | |
656 | else | |
657 | return -EINVAL; | |
658 | ||
659 | if (cmd->flow_type == TCP_V4_FLOW) { | |
660 | rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4; | |
661 | if (tuple == 4) | |
662 | rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4; | |
663 | } else if (cmd->flow_type == UDP_V4_FLOW) { | |
664 | if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP)) | |
665 | return -EINVAL; | |
666 | rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4; | |
667 | if (tuple == 4) | |
668 | rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4; | |
669 | } else if (cmd->flow_type == TCP_V6_FLOW) { | |
670 | rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6; | |
671 | if (tuple == 4) | |
672 | rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6; | |
673 | } else if (cmd->flow_type == UDP_V6_FLOW) { | |
674 | if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP)) | |
675 | return -EINVAL; | |
676 | rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6; | |
677 | if (tuple == 4) | |
678 | rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6; | |
679 | } else if (tuple == 4) { | |
680 | return -EINVAL; | |
681 | } | |
682 | ||
683 | switch (cmd->flow_type) { | |
684 | case TCP_V4_FLOW: | |
685 | case UDP_V4_FLOW: | |
686 | case SCTP_V4_FLOW: | |
687 | case AH_ESP_V4_FLOW: | |
688 | case AH_V4_FLOW: | |
689 | case ESP_V4_FLOW: | |
690 | case IPV4_FLOW: | |
691 | if (tuple == 2) | |
692 | rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4; | |
693 | else if (!tuple) | |
694 | rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4; | |
695 | break; | |
696 | ||
697 | case TCP_V6_FLOW: | |
698 | case UDP_V6_FLOW: | |
699 | case SCTP_V6_FLOW: | |
700 | case AH_ESP_V6_FLOW: | |
701 | case AH_V6_FLOW: | |
702 | case ESP_V6_FLOW: | |
703 | case IPV6_FLOW: | |
704 | if (tuple == 2) | |
705 | rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6; | |
706 | else if (!tuple) | |
707 | rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6; | |
708 | break; | |
709 | } | |
710 | ||
711 | if (bp->rss_hash_cfg == rss_hash_cfg) | |
712 | return 0; | |
713 | ||
714 | bp->rss_hash_cfg = rss_hash_cfg; | |
715 | if (netif_running(bp->dev)) { | |
716 | bnxt_close_nic(bp, false, false); | |
717 | rc = bnxt_open_nic(bp, false, false); | |
718 | } | |
719 | return rc; | |
720 | } | |
c0c050c5 MC |
721 | |
722 | static int bnxt_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd, | |
723 | u32 *rule_locs) | |
724 | { | |
725 | struct bnxt *bp = netdev_priv(dev); | |
726 | int rc = 0; | |
727 | ||
728 | switch (cmd->cmd) { | |
a011952a | 729 | #ifdef CONFIG_RFS_ACCEL |
c0c050c5 MC |
730 | case ETHTOOL_GRXRINGS: |
731 | cmd->data = bp->rx_nr_rings; | |
732 | break; | |
733 | ||
734 | case ETHTOOL_GRXCLSRLCNT: | |
735 | cmd->rule_cnt = bp->ntp_fltr_count; | |
736 | cmd->data = BNXT_NTP_FLTR_MAX_FLTR; | |
737 | break; | |
738 | ||
739 | case ETHTOOL_GRXCLSRLALL: | |
740 | rc = bnxt_grxclsrlall(bp, cmd, (u32 *)rule_locs); | |
741 | break; | |
742 | ||
743 | case ETHTOOL_GRXCLSRULE: | |
744 | rc = bnxt_grxclsrule(bp, cmd); | |
745 | break; | |
a011952a MC |
746 | #endif |
747 | ||
748 | case ETHTOOL_GRXFH: | |
749 | rc = bnxt_grxfh(bp, cmd); | |
750 | break; | |
c0c050c5 MC |
751 | |
752 | default: | |
753 | rc = -EOPNOTSUPP; | |
754 | break; | |
755 | } | |
756 | ||
757 | return rc; | |
758 | } | |
a011952a MC |
759 | |
760 | static int bnxt_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd) | |
761 | { | |
762 | struct bnxt *bp = netdev_priv(dev); | |
763 | int rc; | |
764 | ||
765 | switch (cmd->cmd) { | |
766 | case ETHTOOL_SRXFH: | |
767 | rc = bnxt_srxfh(bp, cmd); | |
768 | break; | |
769 | ||
770 | default: | |
771 | rc = -EOPNOTSUPP; | |
772 | break; | |
773 | } | |
774 | return rc; | |
775 | } | |
c0c050c5 MC |
776 | |
777 | static u32 bnxt_get_rxfh_indir_size(struct net_device *dev) | |
778 | { | |
779 | return HW_HASH_INDEX_SIZE; | |
780 | } | |
781 | ||
782 | static u32 bnxt_get_rxfh_key_size(struct net_device *dev) | |
783 | { | |
784 | return HW_HASH_KEY_SIZE; | |
785 | } | |
786 | ||
787 | static int bnxt_get_rxfh(struct net_device *dev, u32 *indir, u8 *key, | |
788 | u8 *hfunc) | |
789 | { | |
790 | struct bnxt *bp = netdev_priv(dev); | |
791 | struct bnxt_vnic_info *vnic = &bp->vnic_info[0]; | |
792 | int i = 0; | |
793 | ||
794 | if (hfunc) | |
795 | *hfunc = ETH_RSS_HASH_TOP; | |
796 | ||
797 | if (indir) | |
798 | for (i = 0; i < HW_HASH_INDEX_SIZE; i++) | |
799 | indir[i] = le16_to_cpu(vnic->rss_table[i]); | |
800 | ||
801 | if (key) | |
802 | memcpy(key, vnic->rss_hash_key, HW_HASH_KEY_SIZE); | |
803 | ||
804 | return 0; | |
805 | } | |
806 | ||
807 | static void bnxt_get_drvinfo(struct net_device *dev, | |
808 | struct ethtool_drvinfo *info) | |
809 | { | |
810 | struct bnxt *bp = netdev_priv(dev); | |
3ebf6f0a RS |
811 | char *pkglog; |
812 | char *pkgver = NULL; | |
c0c050c5 | 813 | |
3ebf6f0a RS |
814 | pkglog = kmalloc(BNX_PKG_LOG_MAX_LENGTH, GFP_KERNEL); |
815 | if (pkglog) | |
816 | pkgver = bnxt_get_pkgver(dev, pkglog, BNX_PKG_LOG_MAX_LENGTH); | |
c0c050c5 MC |
817 | strlcpy(info->driver, DRV_MODULE_NAME, sizeof(info->driver)); |
818 | strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version)); | |
3ebf6f0a RS |
819 | if (pkgver && *pkgver != 0 && isdigit(*pkgver)) |
820 | snprintf(info->fw_version, sizeof(info->fw_version) - 1, | |
821 | "%s pkg %s", bp->fw_ver_str, pkgver); | |
822 | else | |
823 | strlcpy(info->fw_version, bp->fw_ver_str, | |
824 | sizeof(info->fw_version)); | |
c0c050c5 MC |
825 | strlcpy(info->bus_info, pci_name(bp->pdev), sizeof(info->bus_info)); |
826 | info->n_stats = BNXT_NUM_STATS * bp->cp_nr_rings; | |
827 | info->testinfo_len = BNXT_NUM_TESTS(bp); | |
828 | /* TODO CHIMP_FW: eeprom dump details */ | |
829 | info->eedump_len = 0; | |
830 | /* TODO CHIMP FW: reg dump details */ | |
831 | info->regdump_len = 0; | |
3ebf6f0a | 832 | kfree(pkglog); |
c0c050c5 MC |
833 | } |
834 | ||
170ce013 | 835 | u32 _bnxt_fw_to_ethtool_adv_spds(u16 fw_speeds, u8 fw_pause) |
c0c050c5 | 836 | { |
c0c050c5 MC |
837 | u32 speed_mask = 0; |
838 | ||
839 | /* TODO: support 25GB, 40GB, 50GB with different cable type */ | |
840 | /* set the advertised speeds */ | |
841 | if (fw_speeds & BNXT_LINK_SPEED_MSK_100MB) | |
842 | speed_mask |= ADVERTISED_100baseT_Full; | |
843 | if (fw_speeds & BNXT_LINK_SPEED_MSK_1GB) | |
844 | speed_mask |= ADVERTISED_1000baseT_Full; | |
845 | if (fw_speeds & BNXT_LINK_SPEED_MSK_2_5GB) | |
846 | speed_mask |= ADVERTISED_2500baseX_Full; | |
847 | if (fw_speeds & BNXT_LINK_SPEED_MSK_10GB) | |
848 | speed_mask |= ADVERTISED_10000baseT_Full; | |
c0c050c5 | 849 | if (fw_speeds & BNXT_LINK_SPEED_MSK_40GB) |
1c49c421 | 850 | speed_mask |= ADVERTISED_40000baseCR4_Full; |
27c4d578 MC |
851 | |
852 | if ((fw_pause & BNXT_LINK_PAUSE_BOTH) == BNXT_LINK_PAUSE_BOTH) | |
853 | speed_mask |= ADVERTISED_Pause; | |
854 | else if (fw_pause & BNXT_LINK_PAUSE_TX) | |
855 | speed_mask |= ADVERTISED_Asym_Pause; | |
856 | else if (fw_pause & BNXT_LINK_PAUSE_RX) | |
857 | speed_mask |= ADVERTISED_Pause | ADVERTISED_Asym_Pause; | |
858 | ||
c0c050c5 MC |
859 | return speed_mask; |
860 | } | |
861 | ||
00c04a92 MC |
862 | #define BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, name)\ |
863 | { \ | |
864 | if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100MB) \ | |
865 | ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ | |
866 | 100baseT_Full); \ | |
867 | if ((fw_speeds) & BNXT_LINK_SPEED_MSK_1GB) \ | |
868 | ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ | |
869 | 1000baseT_Full); \ | |
870 | if ((fw_speeds) & BNXT_LINK_SPEED_MSK_10GB) \ | |
871 | ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ | |
872 | 10000baseT_Full); \ | |
873 | if ((fw_speeds) & BNXT_LINK_SPEED_MSK_25GB) \ | |
874 | ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ | |
875 | 25000baseCR_Full); \ | |
876 | if ((fw_speeds) & BNXT_LINK_SPEED_MSK_40GB) \ | |
877 | ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ | |
878 | 40000baseCR4_Full);\ | |
879 | if ((fw_speeds) & BNXT_LINK_SPEED_MSK_50GB) \ | |
880 | ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ | |
881 | 50000baseCR2_Full);\ | |
882 | if ((fw_pause) & BNXT_LINK_PAUSE_RX) { \ | |
883 | ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ | |
884 | Pause); \ | |
885 | if (!((fw_pause) & BNXT_LINK_PAUSE_TX)) \ | |
886 | ethtool_link_ksettings_add_link_mode( \ | |
887 | lk_ksettings, name, Asym_Pause);\ | |
888 | } else if ((fw_pause) & BNXT_LINK_PAUSE_TX) { \ | |
889 | ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\ | |
890 | Asym_Pause); \ | |
891 | } \ | |
892 | } | |
893 | ||
894 | #define BNXT_ETHTOOL_TO_FW_SPDS(fw_speeds, lk_ksettings, name) \ | |
895 | { \ | |
896 | if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ | |
897 | 100baseT_Full) || \ | |
898 | ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ | |
899 | 100baseT_Half)) \ | |
900 | (fw_speeds) |= BNXT_LINK_SPEED_MSK_100MB; \ | |
901 | if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ | |
902 | 1000baseT_Full) || \ | |
903 | ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ | |
904 | 1000baseT_Half)) \ | |
905 | (fw_speeds) |= BNXT_LINK_SPEED_MSK_1GB; \ | |
906 | if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ | |
907 | 10000baseT_Full)) \ | |
908 | (fw_speeds) |= BNXT_LINK_SPEED_MSK_10GB; \ | |
909 | if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ | |
910 | 25000baseCR_Full)) \ | |
911 | (fw_speeds) |= BNXT_LINK_SPEED_MSK_25GB; \ | |
912 | if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ | |
913 | 40000baseCR4_Full)) \ | |
914 | (fw_speeds) |= BNXT_LINK_SPEED_MSK_40GB; \ | |
915 | if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \ | |
916 | 50000baseCR2_Full)) \ | |
917 | (fw_speeds) |= BNXT_LINK_SPEED_MSK_50GB; \ | |
918 | } | |
919 | ||
920 | static void bnxt_fw_to_ethtool_advertised_spds(struct bnxt_link_info *link_info, | |
921 | struct ethtool_link_ksettings *lk_ksettings) | |
27c4d578 | 922 | { |
68515a18 | 923 | u16 fw_speeds = link_info->advertising; |
27c4d578 MC |
924 | u8 fw_pause = 0; |
925 | ||
926 | if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL) | |
927 | fw_pause = link_info->auto_pause_setting; | |
928 | ||
00c04a92 | 929 | BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, advertising); |
27c4d578 MC |
930 | } |
931 | ||
00c04a92 MC |
932 | static void bnxt_fw_to_ethtool_lp_adv(struct bnxt_link_info *link_info, |
933 | struct ethtool_link_ksettings *lk_ksettings) | |
3277360e MC |
934 | { |
935 | u16 fw_speeds = link_info->lp_auto_link_speeds; | |
936 | u8 fw_pause = 0; | |
937 | ||
938 | if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL) | |
939 | fw_pause = link_info->lp_pause; | |
940 | ||
00c04a92 MC |
941 | BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, |
942 | lp_advertising); | |
3277360e MC |
943 | } |
944 | ||
00c04a92 MC |
945 | static void bnxt_fw_to_ethtool_support_spds(struct bnxt_link_info *link_info, |
946 | struct ethtool_link_ksettings *lk_ksettings) | |
4b32cacc MC |
947 | { |
948 | u16 fw_speeds = link_info->support_speeds; | |
4b32cacc | 949 | |
00c04a92 | 950 | BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, 0, lk_ksettings, supported); |
4b32cacc | 951 | |
00c04a92 MC |
952 | ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, Pause); |
953 | ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, | |
954 | Asym_Pause); | |
93ed8117 | 955 | |
00c04a92 MC |
956 | if (link_info->support_auto_speeds) |
957 | ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, | |
958 | Autoneg); | |
93ed8117 MC |
959 | } |
960 | ||
c0c050c5 MC |
961 | u32 bnxt_fw_to_ethtool_speed(u16 fw_link_speed) |
962 | { | |
963 | switch (fw_link_speed) { | |
964 | case BNXT_LINK_SPEED_100MB: | |
965 | return SPEED_100; | |
966 | case BNXT_LINK_SPEED_1GB: | |
967 | return SPEED_1000; | |
968 | case BNXT_LINK_SPEED_2_5GB: | |
969 | return SPEED_2500; | |
970 | case BNXT_LINK_SPEED_10GB: | |
971 | return SPEED_10000; | |
972 | case BNXT_LINK_SPEED_20GB: | |
973 | return SPEED_20000; | |
974 | case BNXT_LINK_SPEED_25GB: | |
975 | return SPEED_25000; | |
976 | case BNXT_LINK_SPEED_40GB: | |
977 | return SPEED_40000; | |
978 | case BNXT_LINK_SPEED_50GB: | |
979 | return SPEED_50000; | |
980 | default: | |
981 | return SPEED_UNKNOWN; | |
982 | } | |
983 | } | |
984 | ||
00c04a92 MC |
985 | static int bnxt_get_link_ksettings(struct net_device *dev, |
986 | struct ethtool_link_ksettings *lk_ksettings) | |
c0c050c5 MC |
987 | { |
988 | struct bnxt *bp = netdev_priv(dev); | |
989 | struct bnxt_link_info *link_info = &bp->link_info; | |
00c04a92 MC |
990 | struct ethtool_link_settings *base = &lk_ksettings->base; |
991 | u32 ethtool_speed; | |
c0c050c5 | 992 | |
00c04a92 MC |
993 | ethtool_link_ksettings_zero_link_mode(lk_ksettings, supported); |
994 | bnxt_fw_to_ethtool_support_spds(link_info, lk_ksettings); | |
c0c050c5 | 995 | |
00c04a92 | 996 | ethtool_link_ksettings_zero_link_mode(lk_ksettings, advertising); |
b763499e | 997 | if (link_info->autoneg) { |
00c04a92 MC |
998 | bnxt_fw_to_ethtool_advertised_spds(link_info, lk_ksettings); |
999 | ethtool_link_ksettings_add_link_mode(lk_ksettings, | |
1000 | advertising, Autoneg); | |
1001 | base->autoneg = AUTONEG_ENABLE; | |
3277360e | 1002 | if (link_info->phy_link_status == BNXT_LINK_LINK) |
00c04a92 | 1003 | bnxt_fw_to_ethtool_lp_adv(link_info, lk_ksettings); |
29c262fe MC |
1004 | ethtool_speed = bnxt_fw_to_ethtool_speed(link_info->link_speed); |
1005 | if (!netif_carrier_ok(dev)) | |
00c04a92 | 1006 | base->duplex = DUPLEX_UNKNOWN; |
29c262fe | 1007 | else if (link_info->duplex & BNXT_LINK_DUPLEX_FULL) |
00c04a92 | 1008 | base->duplex = DUPLEX_FULL; |
29c262fe | 1009 | else |
00c04a92 | 1010 | base->duplex = DUPLEX_HALF; |
c0c050c5 | 1011 | } else { |
00c04a92 | 1012 | base->autoneg = AUTONEG_DISABLE; |
29c262fe MC |
1013 | ethtool_speed = |
1014 | bnxt_fw_to_ethtool_speed(link_info->req_link_speed); | |
00c04a92 | 1015 | base->duplex = DUPLEX_HALF; |
29c262fe | 1016 | if (link_info->req_duplex == BNXT_LINK_DUPLEX_FULL) |
00c04a92 | 1017 | base->duplex = DUPLEX_FULL; |
c0c050c5 | 1018 | } |
00c04a92 | 1019 | base->speed = ethtool_speed; |
c0c050c5 | 1020 | |
00c04a92 | 1021 | base->port = PORT_NONE; |
c0c050c5 | 1022 | if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) { |
00c04a92 MC |
1023 | base->port = PORT_TP; |
1024 | ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, | |
1025 | TP); | |
1026 | ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising, | |
1027 | TP); | |
c0c050c5 | 1028 | } else { |
00c04a92 MC |
1029 | ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, |
1030 | FIBRE); | |
1031 | ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising, | |
1032 | FIBRE); | |
c0c050c5 MC |
1033 | |
1034 | if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_DAC) | |
00c04a92 | 1035 | base->port = PORT_DA; |
c0c050c5 MC |
1036 | else if (link_info->media_type == |
1037 | PORT_PHY_QCFG_RESP_MEDIA_TYPE_FIBRE) | |
00c04a92 | 1038 | base->port = PORT_FIBRE; |
c0c050c5 | 1039 | } |
00c04a92 | 1040 | base->phy_address = link_info->phy_addr; |
c0c050c5 MC |
1041 | |
1042 | return 0; | |
1043 | } | |
1044 | ||
1045 | static u32 bnxt_get_fw_speed(struct net_device *dev, u16 ethtool_speed) | |
1046 | { | |
9d9cee08 MC |
1047 | struct bnxt *bp = netdev_priv(dev); |
1048 | struct bnxt_link_info *link_info = &bp->link_info; | |
1049 | u16 support_spds = link_info->support_speeds; | |
1050 | u32 fw_speed = 0; | |
1051 | ||
c0c050c5 MC |
1052 | switch (ethtool_speed) { |
1053 | case SPEED_100: | |
9d9cee08 MC |
1054 | if (support_spds & BNXT_LINK_SPEED_MSK_100MB) |
1055 | fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100MB; | |
1056 | break; | |
c0c050c5 | 1057 | case SPEED_1000: |
9d9cee08 MC |
1058 | if (support_spds & BNXT_LINK_SPEED_MSK_1GB) |
1059 | fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_1GB; | |
1060 | break; | |
c0c050c5 | 1061 | case SPEED_2500: |
9d9cee08 MC |
1062 | if (support_spds & BNXT_LINK_SPEED_MSK_2_5GB) |
1063 | fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_2_5GB; | |
1064 | break; | |
c0c050c5 | 1065 | case SPEED_10000: |
9d9cee08 MC |
1066 | if (support_spds & BNXT_LINK_SPEED_MSK_10GB) |
1067 | fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_10GB; | |
1068 | break; | |
c0c050c5 | 1069 | case SPEED_20000: |
9d9cee08 MC |
1070 | if (support_spds & BNXT_LINK_SPEED_MSK_20GB) |
1071 | fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_20GB; | |
1072 | break; | |
c0c050c5 | 1073 | case SPEED_25000: |
9d9cee08 MC |
1074 | if (support_spds & BNXT_LINK_SPEED_MSK_25GB) |
1075 | fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_25GB; | |
1076 | break; | |
c0c050c5 | 1077 | case SPEED_40000: |
9d9cee08 MC |
1078 | if (support_spds & BNXT_LINK_SPEED_MSK_40GB) |
1079 | fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_40GB; | |
1080 | break; | |
c0c050c5 | 1081 | case SPEED_50000: |
9d9cee08 MC |
1082 | if (support_spds & BNXT_LINK_SPEED_MSK_50GB) |
1083 | fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_50GB; | |
1084 | break; | |
c0c050c5 MC |
1085 | default: |
1086 | netdev_err(dev, "unsupported speed!\n"); | |
1087 | break; | |
1088 | } | |
9d9cee08 | 1089 | return fw_speed; |
c0c050c5 MC |
1090 | } |
1091 | ||
939f7f0c | 1092 | u16 bnxt_get_fw_auto_link_speeds(u32 advertising) |
c0c050c5 MC |
1093 | { |
1094 | u16 fw_speed_mask = 0; | |
1095 | ||
1096 | /* only support autoneg at speed 100, 1000, and 10000 */ | |
1097 | if (advertising & (ADVERTISED_100baseT_Full | | |
1098 | ADVERTISED_100baseT_Half)) { | |
1099 | fw_speed_mask |= BNXT_LINK_SPEED_MSK_100MB; | |
1100 | } | |
1101 | if (advertising & (ADVERTISED_1000baseT_Full | | |
1102 | ADVERTISED_1000baseT_Half)) { | |
1103 | fw_speed_mask |= BNXT_LINK_SPEED_MSK_1GB; | |
1104 | } | |
1105 | if (advertising & ADVERTISED_10000baseT_Full) | |
1106 | fw_speed_mask |= BNXT_LINK_SPEED_MSK_10GB; | |
1107 | ||
1c49c421 MC |
1108 | if (advertising & ADVERTISED_40000baseCR4_Full) |
1109 | fw_speed_mask |= BNXT_LINK_SPEED_MSK_40GB; | |
1110 | ||
c0c050c5 MC |
1111 | return fw_speed_mask; |
1112 | } | |
1113 | ||
00c04a92 MC |
1114 | static int bnxt_set_link_ksettings(struct net_device *dev, |
1115 | const struct ethtool_link_ksettings *lk_ksettings) | |
c0c050c5 | 1116 | { |
c0c050c5 MC |
1117 | struct bnxt *bp = netdev_priv(dev); |
1118 | struct bnxt_link_info *link_info = &bp->link_info; | |
00c04a92 | 1119 | const struct ethtool_link_settings *base = &lk_ksettings->base; |
c0c050c5 | 1120 | bool set_pause = false; |
68515a18 MC |
1121 | u16 fw_advertising = 0; |
1122 | u32 speed; | |
00c04a92 | 1123 | int rc = 0; |
c0c050c5 | 1124 | |
567b2abe | 1125 | if (!BNXT_SINGLE_PF(bp)) |
00c04a92 | 1126 | return -EOPNOTSUPP; |
f1a082a6 | 1127 | |
00c04a92 MC |
1128 | if (base->autoneg == AUTONEG_ENABLE) { |
1129 | BNXT_ETHTOOL_TO_FW_SPDS(fw_advertising, lk_ksettings, | |
1130 | advertising); | |
c0c050c5 MC |
1131 | link_info->autoneg |= BNXT_AUTONEG_SPEED; |
1132 | if (!fw_advertising) | |
93ed8117 | 1133 | link_info->advertising = link_info->support_auto_speeds; |
c0c050c5 MC |
1134 | else |
1135 | link_info->advertising = fw_advertising; | |
1136 | /* any change to autoneg will cause link change, therefore the | |
1137 | * driver should put back the original pause setting in autoneg | |
1138 | */ | |
1139 | set_pause = true; | |
1140 | } else { | |
9d9cee08 | 1141 | u16 fw_speed; |
03efbec0 | 1142 | u8 phy_type = link_info->phy_type; |
9d9cee08 | 1143 | |
03efbec0 MC |
1144 | if (phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASET || |
1145 | phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASETE || | |
1146 | link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) { | |
1147 | netdev_err(dev, "10GBase-T devices must autoneg\n"); | |
1148 | rc = -EINVAL; | |
1149 | goto set_setting_exit; | |
1150 | } | |
00c04a92 | 1151 | if (base->duplex == DUPLEX_HALF) { |
c0c050c5 MC |
1152 | netdev_err(dev, "HALF DUPLEX is not supported!\n"); |
1153 | rc = -EINVAL; | |
1154 | goto set_setting_exit; | |
1155 | } | |
00c04a92 | 1156 | speed = base->speed; |
9d9cee08 MC |
1157 | fw_speed = bnxt_get_fw_speed(dev, speed); |
1158 | if (!fw_speed) { | |
1159 | rc = -EINVAL; | |
1160 | goto set_setting_exit; | |
1161 | } | |
1162 | link_info->req_link_speed = fw_speed; | |
c0c050c5 | 1163 | link_info->req_duplex = BNXT_LINK_DUPLEX_FULL; |
b763499e | 1164 | link_info->autoneg = 0; |
c0c050c5 MC |
1165 | link_info->advertising = 0; |
1166 | } | |
1167 | ||
1168 | if (netif_running(dev)) | |
939f7f0c | 1169 | rc = bnxt_hwrm_set_link_setting(bp, set_pause, false); |
c0c050c5 MC |
1170 | |
1171 | set_setting_exit: | |
1172 | return rc; | |
1173 | } | |
1174 | ||
1175 | static void bnxt_get_pauseparam(struct net_device *dev, | |
1176 | struct ethtool_pauseparam *epause) | |
1177 | { | |
1178 | struct bnxt *bp = netdev_priv(dev); | |
1179 | struct bnxt_link_info *link_info = &bp->link_info; | |
1180 | ||
1181 | if (BNXT_VF(bp)) | |
1182 | return; | |
b763499e | 1183 | epause->autoneg = !!(link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL); |
3c02d1bb MC |
1184 | epause->rx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_RX); |
1185 | epause->tx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_TX); | |
c0c050c5 MC |
1186 | } |
1187 | ||
1188 | static int bnxt_set_pauseparam(struct net_device *dev, | |
1189 | struct ethtool_pauseparam *epause) | |
1190 | { | |
1191 | int rc = 0; | |
1192 | struct bnxt *bp = netdev_priv(dev); | |
1193 | struct bnxt_link_info *link_info = &bp->link_info; | |
1194 | ||
567b2abe | 1195 | if (!BNXT_SINGLE_PF(bp)) |
75362a3f | 1196 | return -EOPNOTSUPP; |
c0c050c5 MC |
1197 | |
1198 | if (epause->autoneg) { | |
b763499e MC |
1199 | if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) |
1200 | return -EINVAL; | |
1201 | ||
c0c050c5 | 1202 | link_info->autoneg |= BNXT_AUTONEG_FLOW_CTRL; |
c9ee9516 MC |
1203 | if (bp->hwrm_spec_code >= 0x10201) |
1204 | link_info->req_flow_ctrl = | |
1205 | PORT_PHY_CFG_REQ_AUTO_PAUSE_AUTONEG_PAUSE; | |
c0c050c5 MC |
1206 | } else { |
1207 | /* when transition from auto pause to force pause, | |
1208 | * force a link change | |
1209 | */ | |
1210 | if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL) | |
1211 | link_info->force_link_chng = true; | |
1212 | link_info->autoneg &= ~BNXT_AUTONEG_FLOW_CTRL; | |
c9ee9516 | 1213 | link_info->req_flow_ctrl = 0; |
c0c050c5 MC |
1214 | } |
1215 | if (epause->rx_pause) | |
1216 | link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_RX; | |
c0c050c5 MC |
1217 | |
1218 | if (epause->tx_pause) | |
1219 | link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_TX; | |
c0c050c5 MC |
1220 | |
1221 | if (netif_running(dev)) | |
1222 | rc = bnxt_hwrm_set_pause(bp); | |
1223 | return rc; | |
1224 | } | |
1225 | ||
1226 | static u32 bnxt_get_link(struct net_device *dev) | |
1227 | { | |
1228 | struct bnxt *bp = netdev_priv(dev); | |
1229 | ||
1230 | /* TODO: handle MF, VF, driver close case */ | |
1231 | return bp->link_info.link_up; | |
1232 | } | |
1233 | ||
5ac67d8b RS |
1234 | static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal, |
1235 | u16 ext, u16 *index, u32 *item_length, | |
1236 | u32 *data_length); | |
1237 | ||
c0c050c5 MC |
1238 | static int bnxt_flash_nvram(struct net_device *dev, |
1239 | u16 dir_type, | |
1240 | u16 dir_ordinal, | |
1241 | u16 dir_ext, | |
1242 | u16 dir_attr, | |
1243 | const u8 *data, | |
1244 | size_t data_len) | |
1245 | { | |
1246 | struct bnxt *bp = netdev_priv(dev); | |
1247 | int rc; | |
1248 | struct hwrm_nvm_write_input req = {0}; | |
1249 | dma_addr_t dma_handle; | |
1250 | u8 *kmem; | |
1251 | ||
1252 | bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_WRITE, -1, -1); | |
1253 | ||
1254 | req.dir_type = cpu_to_le16(dir_type); | |
1255 | req.dir_ordinal = cpu_to_le16(dir_ordinal); | |
1256 | req.dir_ext = cpu_to_le16(dir_ext); | |
1257 | req.dir_attr = cpu_to_le16(dir_attr); | |
1258 | req.dir_data_length = cpu_to_le32(data_len); | |
1259 | ||
1260 | kmem = dma_alloc_coherent(&bp->pdev->dev, data_len, &dma_handle, | |
1261 | GFP_KERNEL); | |
1262 | if (!kmem) { | |
1263 | netdev_err(dev, "dma_alloc_coherent failure, length = %u\n", | |
1264 | (unsigned)data_len); | |
1265 | return -ENOMEM; | |
1266 | } | |
1267 | memcpy(kmem, data, data_len); | |
1268 | req.host_src_addr = cpu_to_le64(dma_handle); | |
1269 | ||
1270 | rc = hwrm_send_message(bp, &req, sizeof(req), FLASH_NVRAM_TIMEOUT); | |
1271 | dma_free_coherent(&bp->pdev->dev, data_len, kmem, dma_handle); | |
1272 | ||
1273 | return rc; | |
1274 | } | |
1275 | ||
d2d6318c RS |
1276 | static int bnxt_firmware_reset(struct net_device *dev, |
1277 | u16 dir_type) | |
1278 | { | |
1279 | struct bnxt *bp = netdev_priv(dev); | |
1280 | struct hwrm_fw_reset_input req = {0}; | |
1281 | ||
1282 | bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FW_RESET, -1, -1); | |
1283 | ||
1284 | /* TODO: Support ASAP ChiMP self-reset (e.g. upon PF driver unload) */ | |
1285 | /* TODO: Address self-reset of APE/KONG/BONO/TANG or ungraceful reset */ | |
1286 | /* (e.g. when firmware isn't already running) */ | |
1287 | switch (dir_type) { | |
1288 | case BNX_DIR_TYPE_CHIMP_PATCH: | |
1289 | case BNX_DIR_TYPE_BOOTCODE: | |
1290 | case BNX_DIR_TYPE_BOOTCODE_2: | |
1291 | req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_BOOT; | |
1292 | /* Self-reset ChiMP upon next PCIe reset: */ | |
1293 | req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST; | |
1294 | break; | |
1295 | case BNX_DIR_TYPE_APE_FW: | |
1296 | case BNX_DIR_TYPE_APE_PATCH: | |
1297 | req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_MGMT; | |
08141e0b RS |
1298 | /* Self-reset APE upon next PCIe reset: */ |
1299 | req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST; | |
d2d6318c RS |
1300 | break; |
1301 | case BNX_DIR_TYPE_KONG_FW: | |
1302 | case BNX_DIR_TYPE_KONG_PATCH: | |
1303 | req.embedded_proc_type = | |
1304 | FW_RESET_REQ_EMBEDDED_PROC_TYPE_NETCTRL; | |
1305 | break; | |
1306 | case BNX_DIR_TYPE_BONO_FW: | |
1307 | case BNX_DIR_TYPE_BONO_PATCH: | |
1308 | req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_ROCE; | |
1309 | break; | |
1310 | default: | |
1311 | return -EINVAL; | |
1312 | } | |
1313 | ||
1314 | return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); | |
1315 | } | |
1316 | ||
c0c050c5 MC |
1317 | static int bnxt_flash_firmware(struct net_device *dev, |
1318 | u16 dir_type, | |
1319 | const u8 *fw_data, | |
1320 | size_t fw_size) | |
1321 | { | |
1322 | int rc = 0; | |
1323 | u16 code_type; | |
1324 | u32 stored_crc; | |
1325 | u32 calculated_crc; | |
1326 | struct bnxt_fw_header *header = (struct bnxt_fw_header *)fw_data; | |
1327 | ||
1328 | switch (dir_type) { | |
1329 | case BNX_DIR_TYPE_BOOTCODE: | |
1330 | case BNX_DIR_TYPE_BOOTCODE_2: | |
1331 | code_type = CODE_BOOT; | |
1332 | break; | |
93e0b4fe RS |
1333 | case BNX_DIR_TYPE_CHIMP_PATCH: |
1334 | code_type = CODE_CHIMP_PATCH; | |
1335 | break; | |
2731d70f RS |
1336 | case BNX_DIR_TYPE_APE_FW: |
1337 | code_type = CODE_MCTP_PASSTHRU; | |
1338 | break; | |
93e0b4fe RS |
1339 | case BNX_DIR_TYPE_APE_PATCH: |
1340 | code_type = CODE_APE_PATCH; | |
1341 | break; | |
1342 | case BNX_DIR_TYPE_KONG_FW: | |
1343 | code_type = CODE_KONG_FW; | |
1344 | break; | |
1345 | case BNX_DIR_TYPE_KONG_PATCH: | |
1346 | code_type = CODE_KONG_PATCH; | |
1347 | break; | |
1348 | case BNX_DIR_TYPE_BONO_FW: | |
1349 | code_type = CODE_BONO_FW; | |
1350 | break; | |
1351 | case BNX_DIR_TYPE_BONO_PATCH: | |
1352 | code_type = CODE_BONO_PATCH; | |
1353 | break; | |
c0c050c5 MC |
1354 | default: |
1355 | netdev_err(dev, "Unsupported directory entry type: %u\n", | |
1356 | dir_type); | |
1357 | return -EINVAL; | |
1358 | } | |
1359 | if (fw_size < sizeof(struct bnxt_fw_header)) { | |
1360 | netdev_err(dev, "Invalid firmware file size: %u\n", | |
1361 | (unsigned int)fw_size); | |
1362 | return -EINVAL; | |
1363 | } | |
1364 | if (header->signature != cpu_to_le32(BNXT_FIRMWARE_BIN_SIGNATURE)) { | |
1365 | netdev_err(dev, "Invalid firmware signature: %08X\n", | |
1366 | le32_to_cpu(header->signature)); | |
1367 | return -EINVAL; | |
1368 | } | |
1369 | if (header->code_type != code_type) { | |
1370 | netdev_err(dev, "Expected firmware type: %d, read: %d\n", | |
1371 | code_type, header->code_type); | |
1372 | return -EINVAL; | |
1373 | } | |
1374 | if (header->device != DEVICE_CUMULUS_FAMILY) { | |
1375 | netdev_err(dev, "Expected firmware device family %d, read: %d\n", | |
1376 | DEVICE_CUMULUS_FAMILY, header->device); | |
1377 | return -EINVAL; | |
1378 | } | |
1379 | /* Confirm the CRC32 checksum of the file: */ | |
1380 | stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size - | |
1381 | sizeof(stored_crc))); | |
1382 | calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc)); | |
1383 | if (calculated_crc != stored_crc) { | |
1384 | netdev_err(dev, "Firmware file CRC32 checksum (%08lX) does not match calculated checksum (%08lX)\n", | |
1385 | (unsigned long)stored_crc, | |
1386 | (unsigned long)calculated_crc); | |
1387 | return -EINVAL; | |
1388 | } | |
c0c050c5 MC |
1389 | rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST, |
1390 | 0, 0, fw_data, fw_size); | |
d2d6318c RS |
1391 | if (rc == 0) /* Firmware update successful */ |
1392 | rc = bnxt_firmware_reset(dev, dir_type); | |
1393 | ||
c0c050c5 MC |
1394 | return rc; |
1395 | } | |
1396 | ||
5ac67d8b RS |
1397 | static int bnxt_flash_microcode(struct net_device *dev, |
1398 | u16 dir_type, | |
1399 | const u8 *fw_data, | |
1400 | size_t fw_size) | |
1401 | { | |
1402 | struct bnxt_ucode_trailer *trailer; | |
1403 | u32 calculated_crc; | |
1404 | u32 stored_crc; | |
1405 | int rc = 0; | |
1406 | ||
1407 | if (fw_size < sizeof(struct bnxt_ucode_trailer)) { | |
1408 | netdev_err(dev, "Invalid microcode file size: %u\n", | |
1409 | (unsigned int)fw_size); | |
1410 | return -EINVAL; | |
1411 | } | |
1412 | trailer = (struct bnxt_ucode_trailer *)(fw_data + (fw_size - | |
1413 | sizeof(*trailer))); | |
1414 | if (trailer->sig != cpu_to_le32(BNXT_UCODE_TRAILER_SIGNATURE)) { | |
1415 | netdev_err(dev, "Invalid microcode trailer signature: %08X\n", | |
1416 | le32_to_cpu(trailer->sig)); | |
1417 | return -EINVAL; | |
1418 | } | |
1419 | if (le16_to_cpu(trailer->dir_type) != dir_type) { | |
1420 | netdev_err(dev, "Expected microcode type: %d, read: %d\n", | |
1421 | dir_type, le16_to_cpu(trailer->dir_type)); | |
1422 | return -EINVAL; | |
1423 | } | |
1424 | if (le16_to_cpu(trailer->trailer_length) < | |
1425 | sizeof(struct bnxt_ucode_trailer)) { | |
1426 | netdev_err(dev, "Invalid microcode trailer length: %d\n", | |
1427 | le16_to_cpu(trailer->trailer_length)); | |
1428 | return -EINVAL; | |
1429 | } | |
1430 | ||
1431 | /* Confirm the CRC32 checksum of the file: */ | |
1432 | stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size - | |
1433 | sizeof(stored_crc))); | |
1434 | calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc)); | |
1435 | if (calculated_crc != stored_crc) { | |
1436 | netdev_err(dev, | |
1437 | "CRC32 (%08lX) does not match calculated: %08lX\n", | |
1438 | (unsigned long)stored_crc, | |
1439 | (unsigned long)calculated_crc); | |
1440 | return -EINVAL; | |
1441 | } | |
1442 | rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST, | |
1443 | 0, 0, fw_data, fw_size); | |
1444 | ||
1445 | return rc; | |
1446 | } | |
1447 | ||
c0c050c5 MC |
1448 | static bool bnxt_dir_type_is_ape_bin_format(u16 dir_type) |
1449 | { | |
1450 | switch (dir_type) { | |
1451 | case BNX_DIR_TYPE_CHIMP_PATCH: | |
1452 | case BNX_DIR_TYPE_BOOTCODE: | |
1453 | case BNX_DIR_TYPE_BOOTCODE_2: | |
1454 | case BNX_DIR_TYPE_APE_FW: | |
1455 | case BNX_DIR_TYPE_APE_PATCH: | |
1456 | case BNX_DIR_TYPE_KONG_FW: | |
1457 | case BNX_DIR_TYPE_KONG_PATCH: | |
93e0b4fe RS |
1458 | case BNX_DIR_TYPE_BONO_FW: |
1459 | case BNX_DIR_TYPE_BONO_PATCH: | |
c0c050c5 MC |
1460 | return true; |
1461 | } | |
1462 | ||
1463 | return false; | |
1464 | } | |
1465 | ||
5ac67d8b | 1466 | static bool bnxt_dir_type_is_other_exec_format(u16 dir_type) |
c0c050c5 MC |
1467 | { |
1468 | switch (dir_type) { | |
1469 | case BNX_DIR_TYPE_AVS: | |
1470 | case BNX_DIR_TYPE_EXP_ROM_MBA: | |
1471 | case BNX_DIR_TYPE_PCIE: | |
1472 | case BNX_DIR_TYPE_TSCF_UCODE: | |
1473 | case BNX_DIR_TYPE_EXT_PHY: | |
1474 | case BNX_DIR_TYPE_CCM: | |
1475 | case BNX_DIR_TYPE_ISCSI_BOOT: | |
1476 | case BNX_DIR_TYPE_ISCSI_BOOT_IPV6: | |
1477 | case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6: | |
1478 | return true; | |
1479 | } | |
1480 | ||
1481 | return false; | |
1482 | } | |
1483 | ||
1484 | static bool bnxt_dir_type_is_executable(u16 dir_type) | |
1485 | { | |
1486 | return bnxt_dir_type_is_ape_bin_format(dir_type) || | |
5ac67d8b | 1487 | bnxt_dir_type_is_other_exec_format(dir_type); |
c0c050c5 MC |
1488 | } |
1489 | ||
1490 | static int bnxt_flash_firmware_from_file(struct net_device *dev, | |
1491 | u16 dir_type, | |
1492 | const char *filename) | |
1493 | { | |
1494 | const struct firmware *fw; | |
1495 | int rc; | |
1496 | ||
c0c050c5 MC |
1497 | rc = request_firmware(&fw, filename, &dev->dev); |
1498 | if (rc != 0) { | |
1499 | netdev_err(dev, "Error %d requesting firmware file: %s\n", | |
1500 | rc, filename); | |
1501 | return rc; | |
1502 | } | |
1503 | if (bnxt_dir_type_is_ape_bin_format(dir_type) == true) | |
1504 | rc = bnxt_flash_firmware(dev, dir_type, fw->data, fw->size); | |
5ac67d8b RS |
1505 | else if (bnxt_dir_type_is_other_exec_format(dir_type) == true) |
1506 | rc = bnxt_flash_microcode(dev, dir_type, fw->data, fw->size); | |
c0c050c5 MC |
1507 | else |
1508 | rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST, | |
1509 | 0, 0, fw->data, fw->size); | |
1510 | release_firmware(fw); | |
1511 | return rc; | |
1512 | } | |
1513 | ||
1514 | static int bnxt_flash_package_from_file(struct net_device *dev, | |
5ac67d8b | 1515 | char *filename, u32 install_type) |
c0c050c5 | 1516 | { |
5ac67d8b RS |
1517 | struct bnxt *bp = netdev_priv(dev); |
1518 | struct hwrm_nvm_install_update_output *resp = bp->hwrm_cmd_resp_addr; | |
1519 | struct hwrm_nvm_install_update_input install = {0}; | |
1520 | const struct firmware *fw; | |
1521 | u32 item_len; | |
1522 | u16 index; | |
1523 | int rc; | |
1524 | ||
1525 | bnxt_hwrm_fw_set_time(bp); | |
1526 | ||
1527 | if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_UPDATE, | |
1528 | BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE, | |
1529 | &index, &item_len, NULL) != 0) { | |
1530 | netdev_err(dev, "PKG update area not created in nvram\n"); | |
1531 | return -ENOBUFS; | |
1532 | } | |
1533 | ||
1534 | rc = request_firmware(&fw, filename, &dev->dev); | |
1535 | if (rc != 0) { | |
1536 | netdev_err(dev, "PKG error %d requesting file: %s\n", | |
1537 | rc, filename); | |
1538 | return rc; | |
1539 | } | |
1540 | ||
1541 | if (fw->size > item_len) { | |
1542 | netdev_err(dev, "PKG insufficient update area in nvram: %lu", | |
1543 | (unsigned long)fw->size); | |
1544 | rc = -EFBIG; | |
1545 | } else { | |
1546 | dma_addr_t dma_handle; | |
1547 | u8 *kmem; | |
1548 | struct hwrm_nvm_modify_input modify = {0}; | |
1549 | ||
1550 | bnxt_hwrm_cmd_hdr_init(bp, &modify, HWRM_NVM_MODIFY, -1, -1); | |
1551 | ||
1552 | modify.dir_idx = cpu_to_le16(index); | |
1553 | modify.len = cpu_to_le32(fw->size); | |
1554 | ||
1555 | kmem = dma_alloc_coherent(&bp->pdev->dev, fw->size, | |
1556 | &dma_handle, GFP_KERNEL); | |
1557 | if (!kmem) { | |
1558 | netdev_err(dev, | |
1559 | "dma_alloc_coherent failure, length = %u\n", | |
1560 | (unsigned int)fw->size); | |
1561 | rc = -ENOMEM; | |
1562 | } else { | |
1563 | memcpy(kmem, fw->data, fw->size); | |
1564 | modify.host_src_addr = cpu_to_le64(dma_handle); | |
1565 | ||
1566 | rc = hwrm_send_message(bp, &modify, sizeof(modify), | |
1567 | FLASH_PACKAGE_TIMEOUT); | |
1568 | dma_free_coherent(&bp->pdev->dev, fw->size, kmem, | |
1569 | dma_handle); | |
1570 | } | |
1571 | } | |
1572 | release_firmware(fw); | |
1573 | if (rc) | |
1574 | return rc; | |
1575 | ||
1576 | if ((install_type & 0xffff) == 0) | |
1577 | install_type >>= 16; | |
1578 | bnxt_hwrm_cmd_hdr_init(bp, &install, HWRM_NVM_INSTALL_UPDATE, -1, -1); | |
1579 | install.install_type = cpu_to_le32(install_type); | |
1580 | ||
cb4d1d62 KS |
1581 | mutex_lock(&bp->hwrm_cmd_lock); |
1582 | rc = _hwrm_send_message(bp, &install, sizeof(install), | |
1583 | INSTALL_PACKAGE_TIMEOUT); | |
1584 | if (rc) { | |
1585 | rc = -EOPNOTSUPP; | |
1586 | goto flash_pkg_exit; | |
1587 | } | |
1588 | ||
1589 | if (resp->error_code) { | |
1590 | u8 error_code = ((struct hwrm_err_output *)resp)->cmd_err; | |
1591 | ||
1592 | if (error_code == NVM_INSTALL_UPDATE_CMD_ERR_CODE_FRAG_ERR) { | |
1593 | install.flags |= cpu_to_le16( | |
1594 | NVM_INSTALL_UPDATE_REQ_FLAGS_ALLOWED_TO_DEFRAG); | |
1595 | rc = _hwrm_send_message(bp, &install, sizeof(install), | |
1596 | INSTALL_PACKAGE_TIMEOUT); | |
1597 | if (rc) { | |
1598 | rc = -EOPNOTSUPP; | |
1599 | goto flash_pkg_exit; | |
1600 | } | |
1601 | } | |
1602 | } | |
5ac67d8b RS |
1603 | |
1604 | if (resp->result) { | |
1605 | netdev_err(dev, "PKG install error = %d, problem_item = %d\n", | |
1606 | (s8)resp->result, (int)resp->problem_item); | |
cb4d1d62 | 1607 | rc = -ENOPKG; |
5ac67d8b | 1608 | } |
cb4d1d62 KS |
1609 | flash_pkg_exit: |
1610 | mutex_unlock(&bp->hwrm_cmd_lock); | |
1611 | return rc; | |
c0c050c5 MC |
1612 | } |
1613 | ||
1614 | static int bnxt_flash_device(struct net_device *dev, | |
1615 | struct ethtool_flash *flash) | |
1616 | { | |
1617 | if (!BNXT_PF((struct bnxt *)netdev_priv(dev))) { | |
1618 | netdev_err(dev, "flashdev not supported from a virtual function\n"); | |
1619 | return -EINVAL; | |
1620 | } | |
1621 | ||
5ac67d8b RS |
1622 | if (flash->region == ETHTOOL_FLASH_ALL_REGIONS || |
1623 | flash->region > 0xffff) | |
1624 | return bnxt_flash_package_from_file(dev, flash->data, | |
1625 | flash->region); | |
c0c050c5 MC |
1626 | |
1627 | return bnxt_flash_firmware_from_file(dev, flash->region, flash->data); | |
1628 | } | |
1629 | ||
1630 | static int nvm_get_dir_info(struct net_device *dev, u32 *entries, u32 *length) | |
1631 | { | |
1632 | struct bnxt *bp = netdev_priv(dev); | |
1633 | int rc; | |
1634 | struct hwrm_nvm_get_dir_info_input req = {0}; | |
1635 | struct hwrm_nvm_get_dir_info_output *output = bp->hwrm_cmd_resp_addr; | |
1636 | ||
1637 | bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_INFO, -1, -1); | |
1638 | ||
1639 | mutex_lock(&bp->hwrm_cmd_lock); | |
1640 | rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); | |
1641 | if (!rc) { | |
1642 | *entries = le32_to_cpu(output->entries); | |
1643 | *length = le32_to_cpu(output->entry_length); | |
1644 | } | |
1645 | mutex_unlock(&bp->hwrm_cmd_lock); | |
1646 | return rc; | |
1647 | } | |
1648 | ||
1649 | static int bnxt_get_eeprom_len(struct net_device *dev) | |
1650 | { | |
1651 | /* The -1 return value allows the entire 32-bit range of offsets to be | |
1652 | * passed via the ethtool command-line utility. | |
1653 | */ | |
1654 | return -1; | |
1655 | } | |
1656 | ||
1657 | static int bnxt_get_nvram_directory(struct net_device *dev, u32 len, u8 *data) | |
1658 | { | |
1659 | struct bnxt *bp = netdev_priv(dev); | |
1660 | int rc; | |
1661 | u32 dir_entries; | |
1662 | u32 entry_length; | |
1663 | u8 *buf; | |
1664 | size_t buflen; | |
1665 | dma_addr_t dma_handle; | |
1666 | struct hwrm_nvm_get_dir_entries_input req = {0}; | |
1667 | ||
1668 | rc = nvm_get_dir_info(dev, &dir_entries, &entry_length); | |
1669 | if (rc != 0) | |
1670 | return rc; | |
1671 | ||
1672 | /* Insert 2 bytes of directory info (count and size of entries) */ | |
1673 | if (len < 2) | |
1674 | return -EINVAL; | |
1675 | ||
1676 | *data++ = dir_entries; | |
1677 | *data++ = entry_length; | |
1678 | len -= 2; | |
1679 | memset(data, 0xff, len); | |
1680 | ||
1681 | buflen = dir_entries * entry_length; | |
1682 | buf = dma_alloc_coherent(&bp->pdev->dev, buflen, &dma_handle, | |
1683 | GFP_KERNEL); | |
1684 | if (!buf) { | |
1685 | netdev_err(dev, "dma_alloc_coherent failure, length = %u\n", | |
1686 | (unsigned)buflen); | |
1687 | return -ENOMEM; | |
1688 | } | |
1689 | bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_ENTRIES, -1, -1); | |
1690 | req.host_dest_addr = cpu_to_le64(dma_handle); | |
1691 | rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); | |
1692 | if (rc == 0) | |
1693 | memcpy(data, buf, len > buflen ? buflen : len); | |
1694 | dma_free_coherent(&bp->pdev->dev, buflen, buf, dma_handle); | |
1695 | return rc; | |
1696 | } | |
1697 | ||
1698 | static int bnxt_get_nvram_item(struct net_device *dev, u32 index, u32 offset, | |
1699 | u32 length, u8 *data) | |
1700 | { | |
1701 | struct bnxt *bp = netdev_priv(dev); | |
1702 | int rc; | |
1703 | u8 *buf; | |
1704 | dma_addr_t dma_handle; | |
1705 | struct hwrm_nvm_read_input req = {0}; | |
1706 | ||
1707 | buf = dma_alloc_coherent(&bp->pdev->dev, length, &dma_handle, | |
1708 | GFP_KERNEL); | |
1709 | if (!buf) { | |
1710 | netdev_err(dev, "dma_alloc_coherent failure, length = %u\n", | |
1711 | (unsigned)length); | |
1712 | return -ENOMEM; | |
1713 | } | |
1714 | bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_READ, -1, -1); | |
1715 | req.host_dest_addr = cpu_to_le64(dma_handle); | |
1716 | req.dir_idx = cpu_to_le16(index); | |
1717 | req.offset = cpu_to_le32(offset); | |
1718 | req.len = cpu_to_le32(length); | |
1719 | ||
1720 | rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); | |
1721 | if (rc == 0) | |
1722 | memcpy(data, buf, length); | |
1723 | dma_free_coherent(&bp->pdev->dev, length, buf, dma_handle); | |
1724 | return rc; | |
1725 | } | |
1726 | ||
3ebf6f0a RS |
1727 | static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal, |
1728 | u16 ext, u16 *index, u32 *item_length, | |
1729 | u32 *data_length) | |
1730 | { | |
1731 | struct bnxt *bp = netdev_priv(dev); | |
1732 | int rc; | |
1733 | struct hwrm_nvm_find_dir_entry_input req = {0}; | |
1734 | struct hwrm_nvm_find_dir_entry_output *output = bp->hwrm_cmd_resp_addr; | |
1735 | ||
1736 | bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_FIND_DIR_ENTRY, -1, -1); | |
1737 | req.enables = 0; | |
1738 | req.dir_idx = 0; | |
1739 | req.dir_type = cpu_to_le16(type); | |
1740 | req.dir_ordinal = cpu_to_le16(ordinal); | |
1741 | req.dir_ext = cpu_to_le16(ext); | |
1742 | req.opt_ordinal = NVM_FIND_DIR_ENTRY_REQ_OPT_ORDINAL_EQ; | |
90e20921 | 1743 | rc = hwrm_send_message_silent(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); |
3ebf6f0a RS |
1744 | if (rc == 0) { |
1745 | if (index) | |
1746 | *index = le16_to_cpu(output->dir_idx); | |
1747 | if (item_length) | |
1748 | *item_length = le32_to_cpu(output->dir_item_length); | |
1749 | if (data_length) | |
1750 | *data_length = le32_to_cpu(output->dir_data_length); | |
1751 | } | |
1752 | return rc; | |
1753 | } | |
1754 | ||
1755 | static char *bnxt_parse_pkglog(int desired_field, u8 *data, size_t datalen) | |
1756 | { | |
1757 | char *retval = NULL; | |
1758 | char *p; | |
1759 | char *value; | |
1760 | int field = 0; | |
1761 | ||
1762 | if (datalen < 1) | |
1763 | return NULL; | |
1764 | /* null-terminate the log data (removing last '\n'): */ | |
1765 | data[datalen - 1] = 0; | |
1766 | for (p = data; *p != 0; p++) { | |
1767 | field = 0; | |
1768 | retval = NULL; | |
1769 | while (*p != 0 && *p != '\n') { | |
1770 | value = p; | |
1771 | while (*p != 0 && *p != '\t' && *p != '\n') | |
1772 | p++; | |
1773 | if (field == desired_field) | |
1774 | retval = value; | |
1775 | if (*p != '\t') | |
1776 | break; | |
1777 | *p = 0; | |
1778 | field++; | |
1779 | p++; | |
1780 | } | |
1781 | if (*p == 0) | |
1782 | break; | |
1783 | *p = 0; | |
1784 | } | |
1785 | return retval; | |
1786 | } | |
1787 | ||
1788 | static char *bnxt_get_pkgver(struct net_device *dev, char *buf, size_t buflen) | |
1789 | { | |
1790 | u16 index = 0; | |
1791 | u32 datalen; | |
1792 | ||
1793 | if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_PKG_LOG, | |
1794 | BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE, | |
1795 | &index, NULL, &datalen) != 0) | |
1796 | return NULL; | |
1797 | ||
1798 | memset(buf, 0, buflen); | |
1799 | if (bnxt_get_nvram_item(dev, index, 0, datalen, buf) != 0) | |
1800 | return NULL; | |
1801 | ||
1802 | return bnxt_parse_pkglog(BNX_PKG_LOG_FIELD_IDX_PKG_VERSION, buf, | |
1803 | datalen); | |
1804 | } | |
1805 | ||
c0c050c5 MC |
1806 | static int bnxt_get_eeprom(struct net_device *dev, |
1807 | struct ethtool_eeprom *eeprom, | |
1808 | u8 *data) | |
1809 | { | |
1810 | u32 index; | |
1811 | u32 offset; | |
1812 | ||
1813 | if (eeprom->offset == 0) /* special offset value to get directory */ | |
1814 | return bnxt_get_nvram_directory(dev, eeprom->len, data); | |
1815 | ||
1816 | index = eeprom->offset >> 24; | |
1817 | offset = eeprom->offset & 0xffffff; | |
1818 | ||
1819 | if (index == 0) { | |
1820 | netdev_err(dev, "unsupported index value: %d\n", index); | |
1821 | return -EINVAL; | |
1822 | } | |
1823 | ||
1824 | return bnxt_get_nvram_item(dev, index - 1, offset, eeprom->len, data); | |
1825 | } | |
1826 | ||
1827 | static int bnxt_erase_nvram_directory(struct net_device *dev, u8 index) | |
1828 | { | |
1829 | struct bnxt *bp = netdev_priv(dev); | |
1830 | struct hwrm_nvm_erase_dir_entry_input req = {0}; | |
1831 | ||
1832 | bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_ERASE_DIR_ENTRY, -1, -1); | |
1833 | req.dir_idx = cpu_to_le16(index); | |
1834 | return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); | |
1835 | } | |
1836 | ||
1837 | static int bnxt_set_eeprom(struct net_device *dev, | |
1838 | struct ethtool_eeprom *eeprom, | |
1839 | u8 *data) | |
1840 | { | |
1841 | struct bnxt *bp = netdev_priv(dev); | |
1842 | u8 index, dir_op; | |
1843 | u16 type, ext, ordinal, attr; | |
1844 | ||
1845 | if (!BNXT_PF(bp)) { | |
1846 | netdev_err(dev, "NVM write not supported from a virtual function\n"); | |
1847 | return -EINVAL; | |
1848 | } | |
1849 | ||
1850 | type = eeprom->magic >> 16; | |
1851 | ||
1852 | if (type == 0xffff) { /* special value for directory operations */ | |
1853 | index = eeprom->magic & 0xff; | |
1854 | dir_op = eeprom->magic >> 8; | |
1855 | if (index == 0) | |
1856 | return -EINVAL; | |
1857 | switch (dir_op) { | |
1858 | case 0x0e: /* erase */ | |
1859 | if (eeprom->offset != ~eeprom->magic) | |
1860 | return -EINVAL; | |
1861 | return bnxt_erase_nvram_directory(dev, index - 1); | |
1862 | default: | |
1863 | return -EINVAL; | |
1864 | } | |
1865 | } | |
1866 | ||
1867 | /* Create or re-write an NVM item: */ | |
1868 | if (bnxt_dir_type_is_executable(type) == true) | |
5ac67d8b | 1869 | return -EOPNOTSUPP; |
c0c050c5 MC |
1870 | ext = eeprom->magic & 0xffff; |
1871 | ordinal = eeprom->offset >> 16; | |
1872 | attr = eeprom->offset & 0xffff; | |
1873 | ||
1874 | return bnxt_flash_nvram(dev, type, ordinal, ext, attr, data, | |
1875 | eeprom->len); | |
1876 | } | |
1877 | ||
72b34f04 MC |
1878 | static int bnxt_set_eee(struct net_device *dev, struct ethtool_eee *edata) |
1879 | { | |
1880 | struct bnxt *bp = netdev_priv(dev); | |
1881 | struct ethtool_eee *eee = &bp->eee; | |
1882 | struct bnxt_link_info *link_info = &bp->link_info; | |
1883 | u32 advertising = | |
1884 | _bnxt_fw_to_ethtool_adv_spds(link_info->advertising, 0); | |
1885 | int rc = 0; | |
1886 | ||
567b2abe | 1887 | if (!BNXT_SINGLE_PF(bp)) |
75362a3f | 1888 | return -EOPNOTSUPP; |
72b34f04 MC |
1889 | |
1890 | if (!(bp->flags & BNXT_FLAG_EEE_CAP)) | |
1891 | return -EOPNOTSUPP; | |
1892 | ||
1893 | if (!edata->eee_enabled) | |
1894 | goto eee_ok; | |
1895 | ||
1896 | if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) { | |
1897 | netdev_warn(dev, "EEE requires autoneg\n"); | |
1898 | return -EINVAL; | |
1899 | } | |
1900 | if (edata->tx_lpi_enabled) { | |
1901 | if (bp->lpi_tmr_hi && (edata->tx_lpi_timer > bp->lpi_tmr_hi || | |
1902 | edata->tx_lpi_timer < bp->lpi_tmr_lo)) { | |
1903 | netdev_warn(dev, "Valid LPI timer range is %d and %d microsecs\n", | |
1904 | bp->lpi_tmr_lo, bp->lpi_tmr_hi); | |
1905 | return -EINVAL; | |
1906 | } else if (!bp->lpi_tmr_hi) { | |
1907 | edata->tx_lpi_timer = eee->tx_lpi_timer; | |
1908 | } | |
1909 | } | |
1910 | if (!edata->advertised) { | |
1911 | edata->advertised = advertising & eee->supported; | |
1912 | } else if (edata->advertised & ~advertising) { | |
1913 | netdev_warn(dev, "EEE advertised %x must be a subset of autoneg advertised speeds %x\n", | |
1914 | edata->advertised, advertising); | |
1915 | return -EINVAL; | |
1916 | } | |
1917 | ||
1918 | eee->advertised = edata->advertised; | |
1919 | eee->tx_lpi_enabled = edata->tx_lpi_enabled; | |
1920 | eee->tx_lpi_timer = edata->tx_lpi_timer; | |
1921 | eee_ok: | |
1922 | eee->eee_enabled = edata->eee_enabled; | |
1923 | ||
1924 | if (netif_running(dev)) | |
1925 | rc = bnxt_hwrm_set_link_setting(bp, false, true); | |
1926 | ||
1927 | return rc; | |
1928 | } | |
1929 | ||
1930 | static int bnxt_get_eee(struct net_device *dev, struct ethtool_eee *edata) | |
1931 | { | |
1932 | struct bnxt *bp = netdev_priv(dev); | |
1933 | ||
1934 | if (!(bp->flags & BNXT_FLAG_EEE_CAP)) | |
1935 | return -EOPNOTSUPP; | |
1936 | ||
1937 | *edata = bp->eee; | |
1938 | if (!bp->eee.eee_enabled) { | |
1939 | /* Preserve tx_lpi_timer so that the last value will be used | |
1940 | * by default when it is re-enabled. | |
1941 | */ | |
1942 | edata->advertised = 0; | |
1943 | edata->tx_lpi_enabled = 0; | |
1944 | } | |
1945 | ||
1946 | if (!bp->eee.eee_active) | |
1947 | edata->lp_advertised = 0; | |
1948 | ||
1949 | return 0; | |
1950 | } | |
1951 | ||
42ee18fe AK |
1952 | static int bnxt_read_sfp_module_eeprom_info(struct bnxt *bp, u16 i2c_addr, |
1953 | u16 page_number, u16 start_addr, | |
1954 | u16 data_length, u8 *buf) | |
1955 | { | |
1956 | struct hwrm_port_phy_i2c_read_input req = {0}; | |
1957 | struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr; | |
1958 | int rc, byte_offset = 0; | |
1959 | ||
1960 | bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1); | |
1961 | req.i2c_slave_addr = i2c_addr; | |
1962 | req.page_number = cpu_to_le16(page_number); | |
1963 | req.port_id = cpu_to_le16(bp->pf.port_id); | |
1964 | do { | |
1965 | u16 xfer_size; | |
1966 | ||
1967 | xfer_size = min_t(u16, data_length, BNXT_MAX_PHY_I2C_RESP_SIZE); | |
1968 | data_length -= xfer_size; | |
1969 | req.page_offset = cpu_to_le16(start_addr + byte_offset); | |
1970 | req.data_length = xfer_size; | |
1971 | req.enables = cpu_to_le32(start_addr + byte_offset ? | |
1972 | PORT_PHY_I2C_READ_REQ_ENABLES_PAGE_OFFSET : 0); | |
1973 | mutex_lock(&bp->hwrm_cmd_lock); | |
1974 | rc = _hwrm_send_message(bp, &req, sizeof(req), | |
1975 | HWRM_CMD_TIMEOUT); | |
1976 | if (!rc) | |
1977 | memcpy(buf + byte_offset, output->data, xfer_size); | |
1978 | mutex_unlock(&bp->hwrm_cmd_lock); | |
1979 | byte_offset += xfer_size; | |
1980 | } while (!rc && data_length > 0); | |
1981 | ||
1982 | return rc; | |
1983 | } | |
1984 | ||
1985 | static int bnxt_get_module_info(struct net_device *dev, | |
1986 | struct ethtool_modinfo *modinfo) | |
1987 | { | |
1988 | struct bnxt *bp = netdev_priv(dev); | |
1989 | struct hwrm_port_phy_i2c_read_input req = {0}; | |
1990 | struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr; | |
1991 | int rc; | |
1992 | ||
1993 | /* No point in going further if phy status indicates | |
1994 | * module is not inserted or if it is powered down or | |
1995 | * if it is of type 10GBase-T | |
1996 | */ | |
1997 | if (bp->link_info.module_status > | |
1998 | PORT_PHY_QCFG_RESP_MODULE_STATUS_WARNINGMSG) | |
1999 | return -EOPNOTSUPP; | |
2000 | ||
2001 | /* This feature is not supported in older firmware versions */ | |
2002 | if (bp->hwrm_spec_code < 0x10202) | |
2003 | return -EOPNOTSUPP; | |
2004 | ||
2005 | bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1); | |
2006 | req.i2c_slave_addr = I2C_DEV_ADDR_A0; | |
2007 | req.page_number = 0; | |
2008 | req.page_offset = cpu_to_le16(SFP_EEPROM_SFF_8472_COMP_ADDR); | |
2009 | req.data_length = SFP_EEPROM_SFF_8472_COMP_SIZE; | |
2010 | req.port_id = cpu_to_le16(bp->pf.port_id); | |
2011 | mutex_lock(&bp->hwrm_cmd_lock); | |
2012 | rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); | |
2013 | if (!rc) { | |
2014 | u32 module_id = le32_to_cpu(output->data[0]); | |
2015 | ||
2016 | switch (module_id) { | |
2017 | case SFF_MODULE_ID_SFP: | |
2018 | modinfo->type = ETH_MODULE_SFF_8472; | |
2019 | modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; | |
2020 | break; | |
2021 | case SFF_MODULE_ID_QSFP: | |
2022 | case SFF_MODULE_ID_QSFP_PLUS: | |
2023 | modinfo->type = ETH_MODULE_SFF_8436; | |
2024 | modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN; | |
2025 | break; | |
2026 | case SFF_MODULE_ID_QSFP28: | |
2027 | modinfo->type = ETH_MODULE_SFF_8636; | |
2028 | modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN; | |
2029 | break; | |
2030 | default: | |
2031 | rc = -EOPNOTSUPP; | |
2032 | break; | |
2033 | } | |
2034 | } | |
2035 | mutex_unlock(&bp->hwrm_cmd_lock); | |
2036 | return rc; | |
2037 | } | |
2038 | ||
2039 | static int bnxt_get_module_eeprom(struct net_device *dev, | |
2040 | struct ethtool_eeprom *eeprom, | |
2041 | u8 *data) | |
2042 | { | |
2043 | struct bnxt *bp = netdev_priv(dev); | |
2044 | u16 start = eeprom->offset, length = eeprom->len; | |
f3ea3119 | 2045 | int rc = 0; |
42ee18fe AK |
2046 | |
2047 | memset(data, 0, eeprom->len); | |
2048 | ||
2049 | /* Read A0 portion of the EEPROM */ | |
2050 | if (start < ETH_MODULE_SFF_8436_LEN) { | |
2051 | if (start + eeprom->len > ETH_MODULE_SFF_8436_LEN) | |
2052 | length = ETH_MODULE_SFF_8436_LEN - start; | |
2053 | rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0, | |
2054 | start, length, data); | |
2055 | if (rc) | |
2056 | return rc; | |
2057 | start += length; | |
2058 | data += length; | |
2059 | length = eeprom->len - length; | |
2060 | } | |
2061 | ||
2062 | /* Read A2 portion of the EEPROM */ | |
2063 | if (length) { | |
2064 | start -= ETH_MODULE_SFF_8436_LEN; | |
2065 | bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A2, 1, start, | |
2066 | length, data); | |
2067 | } | |
2068 | return rc; | |
2069 | } | |
2070 | ||
ae8e98a6 DK |
2071 | static int bnxt_nway_reset(struct net_device *dev) |
2072 | { | |
2073 | int rc = 0; | |
2074 | ||
2075 | struct bnxt *bp = netdev_priv(dev); | |
2076 | struct bnxt_link_info *link_info = &bp->link_info; | |
2077 | ||
2078 | if (!BNXT_SINGLE_PF(bp)) | |
2079 | return -EOPNOTSUPP; | |
2080 | ||
2081 | if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) | |
2082 | return -EINVAL; | |
2083 | ||
2084 | if (netif_running(dev)) | |
2085 | rc = bnxt_hwrm_set_link_setting(bp, true, false); | |
2086 | ||
2087 | return rc; | |
2088 | } | |
2089 | ||
5ad2cbee MC |
2090 | static int bnxt_set_phys_id(struct net_device *dev, |
2091 | enum ethtool_phys_id_state state) | |
2092 | { | |
2093 | struct hwrm_port_led_cfg_input req = {0}; | |
2094 | struct bnxt *bp = netdev_priv(dev); | |
2095 | struct bnxt_pf_info *pf = &bp->pf; | |
2096 | struct bnxt_led_cfg *led_cfg; | |
2097 | u8 led_state; | |
2098 | __le16 duration; | |
2099 | int i, rc; | |
2100 | ||
2101 | if (!bp->num_leds || BNXT_VF(bp)) | |
2102 | return -EOPNOTSUPP; | |
2103 | ||
2104 | if (state == ETHTOOL_ID_ACTIVE) { | |
2105 | led_state = PORT_LED_CFG_REQ_LED0_STATE_BLINKALT; | |
2106 | duration = cpu_to_le16(500); | |
2107 | } else if (state == ETHTOOL_ID_INACTIVE) { | |
2108 | led_state = PORT_LED_CFG_REQ_LED1_STATE_DEFAULT; | |
2109 | duration = cpu_to_le16(0); | |
2110 | } else { | |
2111 | return -EINVAL; | |
2112 | } | |
2113 | bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_LED_CFG, -1, -1); | |
2114 | req.port_id = cpu_to_le16(pf->port_id); | |
2115 | req.num_leds = bp->num_leds; | |
2116 | led_cfg = (struct bnxt_led_cfg *)&req.led0_id; | |
2117 | for (i = 0; i < bp->num_leds; i++, led_cfg++) { | |
2118 | req.enables |= BNXT_LED_DFLT_ENABLES(i); | |
2119 | led_cfg->led_id = bp->leds[i].led_id; | |
2120 | led_cfg->led_state = led_state; | |
2121 | led_cfg->led_blink_on = duration; | |
2122 | led_cfg->led_blink_off = duration; | |
2123 | led_cfg->led_group_id = bp->leds[i].led_group_id; | |
2124 | } | |
2125 | rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); | |
2126 | if (rc) | |
2127 | rc = -EIO; | |
2128 | return rc; | |
2129 | } | |
2130 | ||
c0c050c5 | 2131 | const struct ethtool_ops bnxt_ethtool_ops = { |
00c04a92 MC |
2132 | .get_link_ksettings = bnxt_get_link_ksettings, |
2133 | .set_link_ksettings = bnxt_set_link_ksettings, | |
c0c050c5 MC |
2134 | .get_pauseparam = bnxt_get_pauseparam, |
2135 | .set_pauseparam = bnxt_set_pauseparam, | |
2136 | .get_drvinfo = bnxt_get_drvinfo, | |
2137 | .get_coalesce = bnxt_get_coalesce, | |
2138 | .set_coalesce = bnxt_set_coalesce, | |
2139 | .get_msglevel = bnxt_get_msglevel, | |
2140 | .set_msglevel = bnxt_set_msglevel, | |
2141 | .get_sset_count = bnxt_get_sset_count, | |
2142 | .get_strings = bnxt_get_strings, | |
2143 | .get_ethtool_stats = bnxt_get_ethtool_stats, | |
2144 | .set_ringparam = bnxt_set_ringparam, | |
2145 | .get_ringparam = bnxt_get_ringparam, | |
2146 | .get_channels = bnxt_get_channels, | |
2147 | .set_channels = bnxt_set_channels, | |
c0c050c5 | 2148 | .get_rxnfc = bnxt_get_rxnfc, |
a011952a | 2149 | .set_rxnfc = bnxt_set_rxnfc, |
c0c050c5 MC |
2150 | .get_rxfh_indir_size = bnxt_get_rxfh_indir_size, |
2151 | .get_rxfh_key_size = bnxt_get_rxfh_key_size, | |
2152 | .get_rxfh = bnxt_get_rxfh, | |
2153 | .flash_device = bnxt_flash_device, | |
2154 | .get_eeprom_len = bnxt_get_eeprom_len, | |
2155 | .get_eeprom = bnxt_get_eeprom, | |
2156 | .set_eeprom = bnxt_set_eeprom, | |
2157 | .get_link = bnxt_get_link, | |
72b34f04 MC |
2158 | .get_eee = bnxt_get_eee, |
2159 | .set_eee = bnxt_set_eee, | |
42ee18fe AK |
2160 | .get_module_info = bnxt_get_module_info, |
2161 | .get_module_eeprom = bnxt_get_module_eeprom, | |
5ad2cbee MC |
2162 | .nway_reset = bnxt_nway_reset, |
2163 | .set_phys_id = bnxt_set_phys_id, | |
c0c050c5 | 2164 | }; |