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bnxt_en: Add tx ring mapping logic.
[mirror_ubuntu-artful-kernel.git] / drivers / net / ethernet / broadcom / bnxt / bnxt_ethtool.c
CommitLineData
c0c050c5
MC		 1/* Broadcom NetXtreme-C/E network driver.
2 *
11f15ed3 3 * Copyright (c) 2014-2016 Broadcom Corporation
c0c050c5
MC		 4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation.
8 */
9
3ebf6f0a 10#include <linux/ctype.h>
8ddc9aaa 11#include <linux/stringify.h>
c0c050c5
MC		 12#include <linux/ethtool.h>
13#include <linux/interrupt.h>
14#include <linux/pci.h>
15#include <linux/etherdevice.h>
16#include <linux/crc32.h>
17#include <linux/firmware.h>
18#include "bnxt_hsi.h"
19#include "bnxt.h"
20#include "bnxt_ethtool.h"
21#include "bnxt_nvm_defs.h" /* NVRAM content constant and structure defs */
22#include "bnxt_fw_hdr.h" /* Firmware hdr constant and structure defs */
23#define FLASH_NVRAM_TIMEOUT ((HWRM_CMD_TIMEOUT) * 100)
5ac67d8b
RS		 24#define FLASH_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200)
25#define INSTALL_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200)
c0c050c5 26
3ebf6f0a
RS		 27static char *bnxt_get_pkgver(struct net_device *dev, char *buf, size_t buflen);
28
c0c050c5
MC		 29static u32 bnxt_get_msglevel(struct net_device *dev)
30{
31 struct bnxt *bp = netdev_priv(dev);
32
33 return bp->msg_enable;
34}
35
36static void bnxt_set_msglevel(struct net_device *dev, u32 value)
37{
38 struct bnxt *bp = netdev_priv(dev);
39
40 bp->msg_enable = value;
41}
42
43static int bnxt_get_coalesce(struct net_device *dev,
44 struct ethtool_coalesce *coal)
45{
46 struct bnxt *bp = netdev_priv(dev);
47
48 memset(coal, 0, sizeof(*coal));
49
dfb5b894
MC		 50 coal->rx_coalesce_usecs = bp->rx_coal_ticks;
51 /* 2 completion records per rx packet */
52 coal->rx_max_coalesced_frames = bp->rx_coal_bufs / 2;
53 coal->rx_coalesce_usecs_irq = bp->rx_coal_ticks_irq;
54 coal->rx_max_coalesced_frames_irq = bp->rx_coal_bufs_irq / 2;
c0c050c5 55
dfc9c94a
MC		 56 coal->tx_coalesce_usecs = bp->tx_coal_ticks;
57 coal->tx_max_coalesced_frames = bp->tx_coal_bufs;
58 coal->tx_coalesce_usecs_irq = bp->tx_coal_ticks_irq;
59 coal->tx_max_coalesced_frames_irq = bp->tx_coal_bufs_irq;
60
51f30785
MC		 61 coal->stats_block_coalesce_usecs = bp->stats_coal_ticks;
62
c0c050c5
MC		 63 return 0;
64}
65
66static int bnxt_set_coalesce(struct net_device *dev,
67 struct ethtool_coalesce *coal)
68{
69 struct bnxt *bp = netdev_priv(dev);
51f30785 70 bool update_stats = false;
c0c050c5
MC		 71 int rc = 0;
72
dfb5b894
MC		 73 bp->rx_coal_ticks = coal->rx_coalesce_usecs;
74 /* 2 completion records per rx packet */
75 bp->rx_coal_bufs = coal->rx_max_coalesced_frames * 2;
76 bp->rx_coal_ticks_irq = coal->rx_coalesce_usecs_irq;
77 bp->rx_coal_bufs_irq = coal->rx_max_coalesced_frames_irq * 2;
c0c050c5 78
dfc9c94a
MC		 79 bp->tx_coal_ticks = coal->tx_coalesce_usecs;
80 bp->tx_coal_bufs = coal->tx_max_coalesced_frames;
81 bp->tx_coal_ticks_irq = coal->tx_coalesce_usecs_irq;
82 bp->tx_coal_bufs_irq = coal->tx_max_coalesced_frames_irq;
83
51f30785
MC		 84 if (bp->stats_coal_ticks != coal->stats_block_coalesce_usecs) {
85 u32 stats_ticks = coal->stats_block_coalesce_usecs;
86
87 stats_ticks = clamp_t(u32, stats_ticks,
88 BNXT_MIN_STATS_COAL_TICKS,
89 BNXT_MAX_STATS_COAL_TICKS);
90 stats_ticks = rounddown(stats_ticks, BNXT_MIN_STATS_COAL_TICKS);
91 bp->stats_coal_ticks = stats_ticks;
92 update_stats = true;
93 }
94
95 if (netif_running(dev)) {
96 if (update_stats) {
97 rc = bnxt_close_nic(bp, true, false);
98 if (!rc)
99 rc = bnxt_open_nic(bp, true, false);
100 } else {
101 rc = bnxt_hwrm_set_coal(bp);
102 }
103 }
c0c050c5
MC		 104
105 return rc;
106}
107
108#define BNXT_NUM_STATS 21
109
8ddc9aaa
MC		 110#define BNXT_RX_STATS_ENTRY(counter) \
111 { BNXT_RX_STATS_OFFSET(counter), __stringify(counter) }
112
8ddc9aaa
MC		 113#define BNXT_TX_STATS_ENTRY(counter) \
114 { BNXT_TX_STATS_OFFSET(counter), __stringify(counter) }
115
116static const struct {
117 long offset;
118 char string[ETH_GSTRING_LEN];
119} bnxt_port_stats_arr[] = {
120 BNXT_RX_STATS_ENTRY(rx_64b_frames),
121 BNXT_RX_STATS_ENTRY(rx_65b_127b_frames),
122 BNXT_RX_STATS_ENTRY(rx_128b_255b_frames),
123 BNXT_RX_STATS_ENTRY(rx_256b_511b_frames),
124 BNXT_RX_STATS_ENTRY(rx_512b_1023b_frames),
125 BNXT_RX_STATS_ENTRY(rx_1024b_1518_frames),
126 BNXT_RX_STATS_ENTRY(rx_good_vlan_frames),
127 BNXT_RX_STATS_ENTRY(rx_1519b_2047b_frames),
128 BNXT_RX_STATS_ENTRY(rx_2048b_4095b_frames),
129 BNXT_RX_STATS_ENTRY(rx_4096b_9216b_frames),
130 BNXT_RX_STATS_ENTRY(rx_9217b_16383b_frames),
131 BNXT_RX_STATS_ENTRY(rx_total_frames),
132 BNXT_RX_STATS_ENTRY(rx_ucast_frames),
133 BNXT_RX_STATS_ENTRY(rx_mcast_frames),
134 BNXT_RX_STATS_ENTRY(rx_bcast_frames),
135 BNXT_RX_STATS_ENTRY(rx_fcs_err_frames),
136 BNXT_RX_STATS_ENTRY(rx_ctrl_frames),
137 BNXT_RX_STATS_ENTRY(rx_pause_frames),
138 BNXT_RX_STATS_ENTRY(rx_pfc_frames),
139 BNXT_RX_STATS_ENTRY(rx_align_err_frames),
140 BNXT_RX_STATS_ENTRY(rx_ovrsz_frames),
141 BNXT_RX_STATS_ENTRY(rx_jbr_frames),
142 BNXT_RX_STATS_ENTRY(rx_mtu_err_frames),
143 BNXT_RX_STATS_ENTRY(rx_tagged_frames),
144 BNXT_RX_STATS_ENTRY(rx_double_tagged_frames),
145 BNXT_RX_STATS_ENTRY(rx_good_frames),
c77192f2
MC		 146 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri0),
147 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri1),
148 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri2),
149 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri3),
150 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri4),
151 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri5),
152 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri6),
153 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri7),
8ddc9aaa
MC		 154 BNXT_RX_STATS_ENTRY(rx_undrsz_frames),
155 BNXT_RX_STATS_ENTRY(rx_eee_lpi_events),
156 BNXT_RX_STATS_ENTRY(rx_eee_lpi_duration),
157 BNXT_RX_STATS_ENTRY(rx_bytes),
158 BNXT_RX_STATS_ENTRY(rx_runt_bytes),
159 BNXT_RX_STATS_ENTRY(rx_runt_frames),
160
161 BNXT_TX_STATS_ENTRY(tx_64b_frames),
162 BNXT_TX_STATS_ENTRY(tx_65b_127b_frames),
163 BNXT_TX_STATS_ENTRY(tx_128b_255b_frames),
164 BNXT_TX_STATS_ENTRY(tx_256b_511b_frames),
165 BNXT_TX_STATS_ENTRY(tx_512b_1023b_frames),
166 BNXT_TX_STATS_ENTRY(tx_1024b_1518_frames),
167 BNXT_TX_STATS_ENTRY(tx_good_vlan_frames),
168 BNXT_TX_STATS_ENTRY(tx_1519b_2047_frames),
169 BNXT_TX_STATS_ENTRY(tx_2048b_4095b_frames),
170 BNXT_TX_STATS_ENTRY(tx_4096b_9216b_frames),
171 BNXT_TX_STATS_ENTRY(tx_9217b_16383b_frames),
172 BNXT_TX_STATS_ENTRY(tx_good_frames),
173 BNXT_TX_STATS_ENTRY(tx_total_frames),
174 BNXT_TX_STATS_ENTRY(tx_ucast_frames),
175 BNXT_TX_STATS_ENTRY(tx_mcast_frames),
176 BNXT_TX_STATS_ENTRY(tx_bcast_frames),
177 BNXT_TX_STATS_ENTRY(tx_pause_frames),
178 BNXT_TX_STATS_ENTRY(tx_pfc_frames),
179 BNXT_TX_STATS_ENTRY(tx_jabber_frames),
180 BNXT_TX_STATS_ENTRY(tx_fcs_err_frames),
181 BNXT_TX_STATS_ENTRY(tx_err),
182 BNXT_TX_STATS_ENTRY(tx_fifo_underruns),
c77192f2
MC		 183 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri0),
184 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri1),
185 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri2),
186 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri3),
187 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri4),
188 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri5),
189 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri6),
190 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri7),
8ddc9aaa
MC		 191 BNXT_TX_STATS_ENTRY(tx_eee_lpi_events),
192 BNXT_TX_STATS_ENTRY(tx_eee_lpi_duration),
193 BNXT_TX_STATS_ENTRY(tx_total_collisions),
194 BNXT_TX_STATS_ENTRY(tx_bytes),
195};
196
197#define BNXT_NUM_PORT_STATS ARRAY_SIZE(bnxt_port_stats_arr)
198
c0c050c5
MC		 199static int bnxt_get_sset_count(struct net_device *dev, int sset)
200{
201 struct bnxt *bp = netdev_priv(dev);
202
203 switch (sset) {
8ddc9aaa
MC		 204 case ETH_SS_STATS: {
205 int num_stats = BNXT_NUM_STATS * bp->cp_nr_rings;
206
207 if (bp->flags & BNXT_FLAG_PORT_STATS)
208 num_stats += BNXT_NUM_PORT_STATS;
209
210 return num_stats;
211 }
c0c050c5
MC		 212 default:
213 return -EOPNOTSUPP;
214 }
215}
216
217static void bnxt_get_ethtool_stats(struct net_device *dev,
218 struct ethtool_stats *stats, u64 *buf)
219{
220 u32 i, j = 0;
221 struct bnxt *bp = netdev_priv(dev);
222 u32 buf_size = sizeof(struct ctx_hw_stats) * bp->cp_nr_rings;
223 u32 stat_fields = sizeof(struct ctx_hw_stats) / 8;
224
225 memset(buf, 0, buf_size);
226
227 if (!bp->bnapi)
228 return;
229
230 for (i = 0; i < bp->cp_nr_rings; i++) {
231 struct bnxt_napi *bnapi = bp->bnapi[i];
232 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;
233 __le64 *hw_stats = (__le64 *)cpr->hw_stats;
234 int k;
235
236 for (k = 0; k < stat_fields; j++, k++)
237 buf[j] = le64_to_cpu(hw_stats[k]);
238 buf[j++] = cpr->rx_l4_csum_errors;
239 }
8ddc9aaa
MC		 240 if (bp->flags & BNXT_FLAG_PORT_STATS) {
241 __le64 *port_stats = (__le64 *)bp->hw_rx_port_stats;
242
243 for (i = 0; i < BNXT_NUM_PORT_STATS; i++, j++) {
244 buf[j] = le64_to_cpu(*(port_stats +
245 bnxt_port_stats_arr[i].offset));
246 }
247 }
c0c050c5
MC		 248}
249
250static void bnxt_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
251{
252 struct bnxt *bp = netdev_priv(dev);
253 u32 i;
254
255 switch (stringset) {
256 /* The number of strings must match BNXT_NUM_STATS defined above. */
257 case ETH_SS_STATS:
258 for (i = 0; i < bp->cp_nr_rings; i++) {
259 sprintf(buf, "[%d]: rx_ucast_packets", i);
260 buf += ETH_GSTRING_LEN;
261 sprintf(buf, "[%d]: rx_mcast_packets", i);
262 buf += ETH_GSTRING_LEN;
263 sprintf(buf, "[%d]: rx_bcast_packets", i);
264 buf += ETH_GSTRING_LEN;
265 sprintf(buf, "[%d]: rx_discards", i);
266 buf += ETH_GSTRING_LEN;
267 sprintf(buf, "[%d]: rx_drops", i);
268 buf += ETH_GSTRING_LEN;
269 sprintf(buf, "[%d]: rx_ucast_bytes", i);
270 buf += ETH_GSTRING_LEN;
271 sprintf(buf, "[%d]: rx_mcast_bytes", i);
272 buf += ETH_GSTRING_LEN;
273 sprintf(buf, "[%d]: rx_bcast_bytes", i);
274 buf += ETH_GSTRING_LEN;
275 sprintf(buf, "[%d]: tx_ucast_packets", i);
276 buf += ETH_GSTRING_LEN;
277 sprintf(buf, "[%d]: tx_mcast_packets", i);
278 buf += ETH_GSTRING_LEN;
279 sprintf(buf, "[%d]: tx_bcast_packets", i);
280 buf += ETH_GSTRING_LEN;
281 sprintf(buf, "[%d]: tx_discards", i);
282 buf += ETH_GSTRING_LEN;
283 sprintf(buf, "[%d]: tx_drops", i);
284 buf += ETH_GSTRING_LEN;
285 sprintf(buf, "[%d]: tx_ucast_bytes", i);
286 buf += ETH_GSTRING_LEN;
287 sprintf(buf, "[%d]: tx_mcast_bytes", i);
288 buf += ETH_GSTRING_LEN;
289 sprintf(buf, "[%d]: tx_bcast_bytes", i);
290 buf += ETH_GSTRING_LEN;
291 sprintf(buf, "[%d]: tpa_packets", i);
292 buf += ETH_GSTRING_LEN;
293 sprintf(buf, "[%d]: tpa_bytes", i);
294 buf += ETH_GSTRING_LEN;
295 sprintf(buf, "[%d]: tpa_events", i);
296 buf += ETH_GSTRING_LEN;
297 sprintf(buf, "[%d]: tpa_aborts", i);
298 buf += ETH_GSTRING_LEN;
299 sprintf(buf, "[%d]: rx_l4_csum_errors", i);
300 buf += ETH_GSTRING_LEN;
301 }
8ddc9aaa
MC		 302 if (bp->flags & BNXT_FLAG_PORT_STATS) {
303 for (i = 0; i < BNXT_NUM_PORT_STATS; i++) {
304 strcpy(buf, bnxt_port_stats_arr[i].string);
305 buf += ETH_GSTRING_LEN;
306 }
307 }
c0c050c5
MC		 308 break;
309 default:
310 netdev_err(bp->dev, "bnxt_get_strings invalid request %x\n",
311 stringset);
312 break;
313 }
314}
315
316static void bnxt_get_ringparam(struct net_device *dev,
317 struct ethtool_ringparam *ering)
318{
319 struct bnxt *bp = netdev_priv(dev);
320
321 ering->rx_max_pending = BNXT_MAX_RX_DESC_CNT;
322 ering->rx_jumbo_max_pending = BNXT_MAX_RX_JUM_DESC_CNT;
323 ering->tx_max_pending = BNXT_MAX_TX_DESC_CNT;
324
325 ering->rx_pending = bp->rx_ring_size;
326 ering->rx_jumbo_pending = bp->rx_agg_ring_size;
327 ering->tx_pending = bp->tx_ring_size;
328}
329
330static int bnxt_set_ringparam(struct net_device *dev,
331 struct ethtool_ringparam *ering)
332{
333 struct bnxt *bp = netdev_priv(dev);
334
335 if ((ering->rx_pending > BNXT_MAX_RX_DESC_CNT) ||
336 (ering->tx_pending > BNXT_MAX_TX_DESC_CNT) ||
337 (ering->tx_pending <= MAX_SKB_FRAGS))
338 return -EINVAL;
339
340 if (netif_running(dev))
341 bnxt_close_nic(bp, false, false);
342
343 bp->rx_ring_size = ering->rx_pending;
344 bp->tx_ring_size = ering->tx_pending;
345 bnxt_set_ring_params(bp);
346
347 if (netif_running(dev))
348 return bnxt_open_nic(bp, false, false);
349
350 return 0;
351}
352
353static void bnxt_get_channels(struct net_device *dev,
354 struct ethtool_channels *channel)
355{
356 struct bnxt *bp = netdev_priv(dev);
357 int max_rx_rings, max_tx_rings, tcs;
358
6e6c5a57 359 bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, true);
47f8e8b9 360 channel->max_combined = max_t(int, max_rx_rings, max_tx_rings);
068c9ec6 361
18d6e4e2
SB		 362 if (bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, false)) {
363 max_rx_rings = 0;
364 max_tx_rings = 0;
365 }
366
c0c050c5
MC		 367 tcs = netdev_get_num_tc(dev);
368 if (tcs > 1)
369 max_tx_rings /= tcs;
370
371 channel->max_rx = max_rx_rings;
372 channel->max_tx = max_tx_rings;
373 channel->max_other = 0;
068c9ec6
MC		 374 if (bp->flags & BNXT_FLAG_SHARED_RINGS) {
375 channel->combined_count = bp->rx_nr_rings;
76595193
PS		 376 if (BNXT_CHIP_TYPE_NITRO_A0(bp))
377 channel->combined_count--;
068c9ec6 378 } else {
76595193
PS		 379 if (!BNXT_CHIP_TYPE_NITRO_A0(bp)) {
380 channel->rx_count = bp->rx_nr_rings;
381 channel->tx_count = bp->tx_nr_rings_per_tc;
382 }
068c9ec6 383 }
c0c050c5
MC		 384}
385
386static int bnxt_set_channels(struct net_device *dev,
387 struct ethtool_channels *channel)
388{
389 struct bnxt *bp = netdev_priv(dev);
d1e7925e 390 int req_tx_rings, req_rx_rings, tcs;
068c9ec6 391 bool sh = false;
d1e7925e 392 int rc = 0;
c0c050c5 393
068c9ec6 394 if (channel->other_count)
c0c050c5
MC		 395 return -EINVAL;
396
068c9ec6
MC		 397 if (!channel->combined_count &&
398 (!channel->rx_count || !channel->tx_count))
399 return -EINVAL;
400
401 if (channel->combined_count &&
402 (channel->rx_count || channel->tx_count))
403 return -EINVAL;
404
76595193
PS		 405 if (BNXT_CHIP_TYPE_NITRO_A0(bp) && (channel->rx_count ||
406 channel->tx_count))
407 return -EINVAL;
408
068c9ec6
MC		 409 if (channel->combined_count)
410 sh = true;
411
c0c050c5 412 tcs = netdev_get_num_tc(dev);
c0c050c5 413
391be5c2 414 req_tx_rings = sh ? channel->combined_count : channel->tx_count;
d1e7925e
MC		 415 req_rx_rings = sh ? channel->combined_count : channel->rx_count;
416 rc = bnxt_reserve_rings(bp, req_tx_rings, req_rx_rings, tcs);
417 if (rc) {
418 netdev_warn(dev, "Unable to allocate the requested rings\n");
419 return rc;
391be5c2
MC		 420 }
421
c0c050c5
MC		 422 if (netif_running(dev)) {
423 if (BNXT_PF(bp)) {
424 /* TODO CHIMP_FW: Send message to all VF's
425 * before PF unload
426 */
427 }
428 rc = bnxt_close_nic(bp, true, false);
429 if (rc) {
430 netdev_err(bp->dev, "Set channel failure rc :%x\n",
431 rc);
432 return rc;
433 }
434 }
435
068c9ec6
MC		 436 if (sh) {
437 bp->flags |= BNXT_FLAG_SHARED_RINGS;
d1e7925e
MC		 438 bp->rx_nr_rings = channel->combined_count;
439 bp->tx_nr_rings_per_tc = channel->combined_count;
068c9ec6
MC		 440 } else {
441 bp->flags &= ~BNXT_FLAG_SHARED_RINGS;
442 bp->rx_nr_rings = channel->rx_count;
443 bp->tx_nr_rings_per_tc = channel->tx_count;
444 }
445
c0c050c5
MC		 446 bp->tx_nr_rings = bp->tx_nr_rings_per_tc;
447 if (tcs > 1)
448 bp->tx_nr_rings = bp->tx_nr_rings_per_tc * tcs;
068c9ec6
MC		 449
450 bp->cp_nr_rings = sh ? max_t(int, bp->tx_nr_rings, bp->rx_nr_rings) :
451 bp->tx_nr_rings + bp->rx_nr_rings;
452
c0c050c5
MC		 453 bp->num_stat_ctxs = bp->cp_nr_rings;
454
2bcfa6f6
MC		 455 /* After changing number of rx channels, update NTUPLE feature. */
456 netdev_update_features(dev);
c0c050c5
MC		 457 if (netif_running(dev)) {
458 rc = bnxt_open_nic(bp, true, false);
459 if ((!rc) && BNXT_PF(bp)) {
460 /* TODO CHIMP_FW: Send message to all VF's
461 * to renable
462 */
463 }
464 }
465
466 return rc;
467}
468
469#ifdef CONFIG_RFS_ACCEL
470static int bnxt_grxclsrlall(struct bnxt *bp, struct ethtool_rxnfc *cmd,
471 u32 *rule_locs)
472{
473 int i, j = 0;
474
475 cmd->data = bp->ntp_fltr_count;
476 for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) {
477 struct hlist_head *head;
478 struct bnxt_ntuple_filter *fltr;
479
480 head = &bp->ntp_fltr_hash_tbl[i];
481 rcu_read_lock();
482 hlist_for_each_entry_rcu(fltr, head, hash) {
483 if (j == cmd->rule_cnt)
484 break;
485 rule_locs[j++] = fltr->sw_id;
486 }
487 rcu_read_unlock();
488 if (j == cmd->rule_cnt)
489 break;
490 }
491 cmd->rule_cnt = j;
492 return 0;
493}
494
495static int bnxt_grxclsrule(struct bnxt *bp, struct ethtool_rxnfc *cmd)
496{
497 struct ethtool_rx_flow_spec *fs =
498 (struct ethtool_rx_flow_spec *)&cmd->fs;
499 struct bnxt_ntuple_filter *fltr;
500 struct flow_keys *fkeys;
501 int i, rc = -EINVAL;
502
503 if (fs->location < 0 || fs->location >= BNXT_NTP_FLTR_MAX_FLTR)
504 return rc;
505
506 for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) {
507 struct hlist_head *head;
508
509 head = &bp->ntp_fltr_hash_tbl[i];
510 rcu_read_lock();
511 hlist_for_each_entry_rcu(fltr, head, hash) {
512 if (fltr->sw_id == fs->location)
513 goto fltr_found;
514 }
515 rcu_read_unlock();
516 }
517 return rc;
518
519fltr_found:
520 fkeys = &fltr->fkeys;
dda0e746
MC		 521 if (fkeys->basic.n_proto == htons(ETH_P_IP)) {
522 if (fkeys->basic.ip_proto == IPPROTO_TCP)
523 fs->flow_type = TCP_V4_FLOW;
524 else if (fkeys->basic.ip_proto == IPPROTO_UDP)
525 fs->flow_type = UDP_V4_FLOW;
526 else
527 goto fltr_err;
c0c050c5 528
dda0e746
MC		 529 fs->h_u.tcp_ip4_spec.ip4src = fkeys->addrs.v4addrs.src;
530 fs->m_u.tcp_ip4_spec.ip4src = cpu_to_be32(~0);
c0c050c5 531
dda0e746
MC		 532 fs->h_u.tcp_ip4_spec.ip4dst = fkeys->addrs.v4addrs.dst;
533 fs->m_u.tcp_ip4_spec.ip4dst = cpu_to_be32(~0);
c0c050c5 534
dda0e746
MC		 535 fs->h_u.tcp_ip4_spec.psrc = fkeys->ports.src;
536 fs->m_u.tcp_ip4_spec.psrc = cpu_to_be16(~0);
c0c050c5 537
dda0e746
MC		 538 fs->h_u.tcp_ip4_spec.pdst = fkeys->ports.dst;
539 fs->m_u.tcp_ip4_spec.pdst = cpu_to_be16(~0);
540 } else {
541 int i;
542
543 if (fkeys->basic.ip_proto == IPPROTO_TCP)
544 fs->flow_type = TCP_V6_FLOW;
545 else if (fkeys->basic.ip_proto == IPPROTO_UDP)
546 fs->flow_type = UDP_V6_FLOW;
547 else
548 goto fltr_err;
549
550 *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6src[0] =
551 fkeys->addrs.v6addrs.src;
552 *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6dst[0] =
553 fkeys->addrs.v6addrs.dst;
554 for (i = 0; i < 4; i++) {
555 fs->m_u.tcp_ip6_spec.ip6src[i] = cpu_to_be32(~0);
556 fs->m_u.tcp_ip6_spec.ip6dst[i] = cpu_to_be32(~0);
557 }
558 fs->h_u.tcp_ip6_spec.psrc = fkeys->ports.src;
559 fs->m_u.tcp_ip6_spec.psrc = cpu_to_be16(~0);
560
561 fs->h_u.tcp_ip6_spec.pdst = fkeys->ports.dst;
562 fs->m_u.tcp_ip6_spec.pdst = cpu_to_be16(~0);
563 }
c0c050c5
MC		 564
565 fs->ring_cookie = fltr->rxq;
566 rc = 0;
567
568fltr_err:
569 rcu_read_unlock();
570
571 return rc;
572}
a011952a
MC		 573#endif
574
575static u64 get_ethtool_ipv4_rss(struct bnxt *bp)
576{
577 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4)
578 return RXH_IP_SRC | RXH_IP_DST;
579 return 0;
580}
581
582static u64 get_ethtool_ipv6_rss(struct bnxt *bp)
583{
584 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6)
585 return RXH_IP_SRC | RXH_IP_DST;
586 return 0;
587}
588
589static int bnxt_grxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)
590{
591 cmd->data = 0;
592 switch (cmd->flow_type) {
593 case TCP_V4_FLOW:
594 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4)
595 cmd->data |= RXH_IP_SRC | RXH_IP_DST |
596 RXH_L4_B_0_1 | RXH_L4_B_2_3;
597 cmd->data |= get_ethtool_ipv4_rss(bp);
598 break;
599 case UDP_V4_FLOW:
600 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4)
601 cmd->data |= RXH_IP_SRC | RXH_IP_DST |
602 RXH_L4_B_0_1 | RXH_L4_B_2_3;
603 /* fall through */
604 case SCTP_V4_FLOW:
605 case AH_ESP_V4_FLOW:
606 case AH_V4_FLOW:
607 case ESP_V4_FLOW:
608 case IPV4_FLOW:
609 cmd->data |= get_ethtool_ipv4_rss(bp);
610 break;
611
612 case TCP_V6_FLOW:
613 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6)
614 cmd->data |= RXH_IP_SRC | RXH_IP_DST |
615 RXH_L4_B_0_1 | RXH_L4_B_2_3;
616 cmd->data |= get_ethtool_ipv6_rss(bp);
617 break;
618 case UDP_V6_FLOW:
619 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6)
620 cmd->data |= RXH_IP_SRC | RXH_IP_DST |
621 RXH_L4_B_0_1 | RXH_L4_B_2_3;
622 /* fall through */
623 case SCTP_V6_FLOW:
624 case AH_ESP_V6_FLOW:
625 case AH_V6_FLOW:
626 case ESP_V6_FLOW:
627 case IPV6_FLOW:
628 cmd->data |= get_ethtool_ipv6_rss(bp);
629 break;
630 }
631 return 0;
632}
633
634#define RXH_4TUPLE (RXH_IP_SRC | RXH_IP_DST | RXH_L4_B_0_1 | RXH_L4_B_2_3)
635#define RXH_2TUPLE (RXH_IP_SRC | RXH_IP_DST)
636
637static int bnxt_srxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)
638{
639 u32 rss_hash_cfg = bp->rss_hash_cfg;
640 int tuple, rc = 0;
641
642 if (cmd->data == RXH_4TUPLE)
643 tuple = 4;
644 else if (cmd->data == RXH_2TUPLE)
645 tuple = 2;
646 else if (!cmd->data)
647 tuple = 0;
648 else
649 return -EINVAL;
650
651 if (cmd->flow_type == TCP_V4_FLOW) {
652 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4;
653 if (tuple == 4)
654 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4;
655 } else if (cmd->flow_type == UDP_V4_FLOW) {
656 if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP))
657 return -EINVAL;
658 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4;
659 if (tuple == 4)
660 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4;
661 } else if (cmd->flow_type == TCP_V6_FLOW) {
662 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6;
663 if (tuple == 4)
664 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6;
665 } else if (cmd->flow_type == UDP_V6_FLOW) {
666 if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP))
667 return -EINVAL;
668 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6;
669 if (tuple == 4)
670 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6;
671 } else if (tuple == 4) {
672 return -EINVAL;
673 }
674
675 switch (cmd->flow_type) {
676 case TCP_V4_FLOW:
677 case UDP_V4_FLOW:
678 case SCTP_V4_FLOW:
679 case AH_ESP_V4_FLOW:
680 case AH_V4_FLOW:
681 case ESP_V4_FLOW:
682 case IPV4_FLOW:
683 if (tuple == 2)
684 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4;
685 else if (!tuple)
686 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4;
687 break;
688
689 case TCP_V6_FLOW:
690 case UDP_V6_FLOW:
691 case SCTP_V6_FLOW:
692 case AH_ESP_V6_FLOW:
693 case AH_V6_FLOW:
694 case ESP_V6_FLOW:
695 case IPV6_FLOW:
696 if (tuple == 2)
697 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6;
698 else if (!tuple)
699 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6;
700 break;
701 }
702
703 if (bp->rss_hash_cfg == rss_hash_cfg)
704 return 0;
705
706 bp->rss_hash_cfg = rss_hash_cfg;
707 if (netif_running(bp->dev)) {
708 bnxt_close_nic(bp, false, false);
709 rc = bnxt_open_nic(bp, false, false);
710 }
711 return rc;
712}
c0c050c5
MC		 713
714static int bnxt_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
715 u32 *rule_locs)
716{
717 struct bnxt *bp = netdev_priv(dev);
718 int rc = 0;
719
720 switch (cmd->cmd) {
a011952a 721#ifdef CONFIG_RFS_ACCEL
c0c050c5
MC		 722 case ETHTOOL_GRXRINGS:
723 cmd->data = bp->rx_nr_rings;
724 break;
725
726 case ETHTOOL_GRXCLSRLCNT:
727 cmd->rule_cnt = bp->ntp_fltr_count;
728 cmd->data = BNXT_NTP_FLTR_MAX_FLTR;
729 break;
730
731 case ETHTOOL_GRXCLSRLALL:
732 rc = bnxt_grxclsrlall(bp, cmd, (u32 *)rule_locs);
733 break;
734
735 case ETHTOOL_GRXCLSRULE:
736 rc = bnxt_grxclsrule(bp, cmd);
737 break;
a011952a
MC		 738#endif
739
740 case ETHTOOL_GRXFH:
741 rc = bnxt_grxfh(bp, cmd);
742 break;
c0c050c5
MC		 743
744 default:
745 rc = -EOPNOTSUPP;
746 break;
747 }
748
749 return rc;
750}
a011952a
MC		 751
752static int bnxt_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
753{
754 struct bnxt *bp = netdev_priv(dev);
755 int rc;
756
757 switch (cmd->cmd) {
758 case ETHTOOL_SRXFH:
759 rc = bnxt_srxfh(bp, cmd);
760 break;
761
762 default:
763 rc = -EOPNOTSUPP;
764 break;
765 }
766 return rc;
767}
c0c050c5
MC		 768
769static u32 bnxt_get_rxfh_indir_size(struct net_device *dev)
770{
771 return HW_HASH_INDEX_SIZE;
772}
773
774static u32 bnxt_get_rxfh_key_size(struct net_device *dev)
775{
776 return HW_HASH_KEY_SIZE;
777}
778
779static int bnxt_get_rxfh(struct net_device *dev, u32 *indir, u8 *key,
780 u8 *hfunc)
781{
782 struct bnxt *bp = netdev_priv(dev);
783 struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
784 int i = 0;
785
786 if (hfunc)
787 *hfunc = ETH_RSS_HASH_TOP;
788
789 if (indir)
790 for (i = 0; i < HW_HASH_INDEX_SIZE; i++)
791 indir[i] = le16_to_cpu(vnic->rss_table[i]);
792
793 if (key)
794 memcpy(key, vnic->rss_hash_key, HW_HASH_KEY_SIZE);
795
796 return 0;
797}
798
799static void bnxt_get_drvinfo(struct net_device *dev,
800 struct ethtool_drvinfo *info)
801{
802 struct bnxt *bp = netdev_priv(dev);
3ebf6f0a
RS		 803 char *pkglog;
804 char *pkgver = NULL;
c0c050c5 805
3ebf6f0a
RS		 806 pkglog = kmalloc(BNX_PKG_LOG_MAX_LENGTH, GFP_KERNEL);
807 if (pkglog)
808 pkgver = bnxt_get_pkgver(dev, pkglog, BNX_PKG_LOG_MAX_LENGTH);
c0c050c5
MC		 809 strlcpy(info->driver, DRV_MODULE_NAME, sizeof(info->driver));
810 strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version));
3ebf6f0a
RS		 811 if (pkgver && *pkgver != 0 && isdigit(*pkgver))
812 snprintf(info->fw_version, sizeof(info->fw_version) - 1,
813 "%s pkg %s", bp->fw_ver_str, pkgver);
814 else
815 strlcpy(info->fw_version, bp->fw_ver_str,
816 sizeof(info->fw_version));
c0c050c5
MC		 817 strlcpy(info->bus_info, pci_name(bp->pdev), sizeof(info->bus_info));
818 info->n_stats = BNXT_NUM_STATS * bp->cp_nr_rings;
819 info->testinfo_len = BNXT_NUM_TESTS(bp);
820 /* TODO CHIMP_FW: eeprom dump details */
821 info->eedump_len = 0;
822 /* TODO CHIMP FW: reg dump details */
823 info->regdump_len = 0;
3ebf6f0a 824 kfree(pkglog);
c0c050c5
MC		 825}
826
170ce013 827u32 _bnxt_fw_to_ethtool_adv_spds(u16 fw_speeds, u8 fw_pause)
c0c050c5 828{
c0c050c5
MC		 829 u32 speed_mask = 0;
830
831 /* TODO: support 25GB, 40GB, 50GB with different cable type */
832 /* set the advertised speeds */
833 if (fw_speeds & BNXT_LINK_SPEED_MSK_100MB)
834 speed_mask |= ADVERTISED_100baseT_Full;
835 if (fw_speeds & BNXT_LINK_SPEED_MSK_1GB)
836 speed_mask |= ADVERTISED_1000baseT_Full;
837 if (fw_speeds & BNXT_LINK_SPEED_MSK_2_5GB)
838 speed_mask |= ADVERTISED_2500baseX_Full;
839 if (fw_speeds & BNXT_LINK_SPEED_MSK_10GB)
840 speed_mask |= ADVERTISED_10000baseT_Full;
c0c050c5 841 if (fw_speeds & BNXT_LINK_SPEED_MSK_40GB)
1c49c421 842 speed_mask |= ADVERTISED_40000baseCR4_Full;
27c4d578
MC		 843
844 if ((fw_pause & BNXT_LINK_PAUSE_BOTH) == BNXT_LINK_PAUSE_BOTH)
845 speed_mask |= ADVERTISED_Pause;
846 else if (fw_pause & BNXT_LINK_PAUSE_TX)
847 speed_mask |= ADVERTISED_Asym_Pause;
848 else if (fw_pause & BNXT_LINK_PAUSE_RX)
849 speed_mask |= ADVERTISED_Pause | ADVERTISED_Asym_Pause;
850
c0c050c5
MC		 851 return speed_mask;
852}
853
00c04a92
MC		 854#define BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, name)\
855{ \
856 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100MB) \
857 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
858 100baseT_Full); \
859 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_1GB) \
860 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
861 1000baseT_Full); \
862 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_10GB) \
863 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
864 10000baseT_Full); \
865 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_25GB) \
866 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
867 25000baseCR_Full); \
868 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_40GB) \
869 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
870 40000baseCR4_Full);\
871 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_50GB) \
872 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
873 50000baseCR2_Full);\
874 if ((fw_pause) & BNXT_LINK_PAUSE_RX) { \
875 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
876 Pause); \
877 if (!((fw_pause) & BNXT_LINK_PAUSE_TX)) \
878 ethtool_link_ksettings_add_link_mode( \
879 lk_ksettings, name, Asym_Pause);\
880 } else if ((fw_pause) & BNXT_LINK_PAUSE_TX) { \
881 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
882 Asym_Pause); \
883 } \
884}
885
886#define BNXT_ETHTOOL_TO_FW_SPDS(fw_speeds, lk_ksettings, name) \
887{ \
888 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
889 100baseT_Full) || \
890 ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
891 100baseT_Half)) \
892 (fw_speeds) |= BNXT_LINK_SPEED_MSK_100MB; \
893 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
894 1000baseT_Full) || \
895 ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
896 1000baseT_Half)) \
897 (fw_speeds) |= BNXT_LINK_SPEED_MSK_1GB; \
898 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
899 10000baseT_Full)) \
900 (fw_speeds) |= BNXT_LINK_SPEED_MSK_10GB; \
901 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
902 25000baseCR_Full)) \
903 (fw_speeds) |= BNXT_LINK_SPEED_MSK_25GB; \
904 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
905 40000baseCR4_Full)) \
906 (fw_speeds) |= BNXT_LINK_SPEED_MSK_40GB; \
907 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
908 50000baseCR2_Full)) \
909 (fw_speeds) |= BNXT_LINK_SPEED_MSK_50GB; \
910}
911
912static void bnxt_fw_to_ethtool_advertised_spds(struct bnxt_link_info *link_info,
913 struct ethtool_link_ksettings *lk_ksettings)
27c4d578 914{
68515a18 915 u16 fw_speeds = link_info->advertising;
27c4d578
MC		 916 u8 fw_pause = 0;
917
918 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
919 fw_pause = link_info->auto_pause_setting;
920
00c04a92 921 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, advertising);
27c4d578
MC		 922}
923
00c04a92
MC		 924static void bnxt_fw_to_ethtool_lp_adv(struct bnxt_link_info *link_info,
925 struct ethtool_link_ksettings *lk_ksettings)
3277360e
MC		 926{
927 u16 fw_speeds = link_info->lp_auto_link_speeds;
928 u8 fw_pause = 0;
929
930 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
931 fw_pause = link_info->lp_pause;
932
00c04a92
MC		 933 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings,
934 lp_advertising);
3277360e
MC		 935}
936
00c04a92
MC		 937static void bnxt_fw_to_ethtool_support_spds(struct bnxt_link_info *link_info,
938 struct ethtool_link_ksettings *lk_ksettings)
4b32cacc
MC		 939{
940 u16 fw_speeds = link_info->support_speeds;
4b32cacc 941
00c04a92 942 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, 0, lk_ksettings, supported);
4b32cacc 943
00c04a92
MC		 944 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, Pause);
945 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
946 Asym_Pause);
93ed8117 947
00c04a92
MC		 948 if (link_info->support_auto_speeds)
949 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
950 Autoneg);
93ed8117
MC		 951}
952
c0c050c5
MC		 953u32 bnxt_fw_to_ethtool_speed(u16 fw_link_speed)
954{
955 switch (fw_link_speed) {
956 case BNXT_LINK_SPEED_100MB:
957 return SPEED_100;
958 case BNXT_LINK_SPEED_1GB:
959 return SPEED_1000;
960 case BNXT_LINK_SPEED_2_5GB:
961 return SPEED_2500;
962 case BNXT_LINK_SPEED_10GB:
963 return SPEED_10000;
964 case BNXT_LINK_SPEED_20GB:
965 return SPEED_20000;
966 case BNXT_LINK_SPEED_25GB:
967 return SPEED_25000;
968 case BNXT_LINK_SPEED_40GB:
969 return SPEED_40000;
970 case BNXT_LINK_SPEED_50GB:
971 return SPEED_50000;
972 default:
973 return SPEED_UNKNOWN;
974 }
975}
976
00c04a92
MC		 977static int bnxt_get_link_ksettings(struct net_device *dev,
978 struct ethtool_link_ksettings *lk_ksettings)
c0c050c5
MC		 979{
980 struct bnxt *bp = netdev_priv(dev);
981 struct bnxt_link_info *link_info = &bp->link_info;
00c04a92
MC		 982 struct ethtool_link_settings *base = &lk_ksettings->base;
983 u32 ethtool_speed;
c0c050c5 984
00c04a92
MC		 985 ethtool_link_ksettings_zero_link_mode(lk_ksettings, supported);
986 bnxt_fw_to_ethtool_support_spds(link_info, lk_ksettings);
c0c050c5 987
00c04a92 988 ethtool_link_ksettings_zero_link_mode(lk_ksettings, advertising);
b763499e 989 if (link_info->autoneg) {
00c04a92
MC		 990 bnxt_fw_to_ethtool_advertised_spds(link_info, lk_ksettings);
991 ethtool_link_ksettings_add_link_mode(lk_ksettings,
992 advertising, Autoneg);
993 base->autoneg = AUTONEG_ENABLE;
3277360e 994 if (link_info->phy_link_status == BNXT_LINK_LINK)
00c04a92 995 bnxt_fw_to_ethtool_lp_adv(link_info, lk_ksettings);
29c262fe
MC		 996 ethtool_speed = bnxt_fw_to_ethtool_speed(link_info->link_speed);
997 if (!netif_carrier_ok(dev))
00c04a92 998 base->duplex = DUPLEX_UNKNOWN;
29c262fe 999 else if (link_info->duplex & BNXT_LINK_DUPLEX_FULL)
00c04a92 1000 base->duplex = DUPLEX_FULL;
29c262fe 1001 else
00c04a92 1002 base->duplex = DUPLEX_HALF;
c0c050c5 1003 } else {
00c04a92 1004 base->autoneg = AUTONEG_DISABLE;
29c262fe
MC		 1005 ethtool_speed =
1006 bnxt_fw_to_ethtool_speed(link_info->req_link_speed);
00c04a92 1007 base->duplex = DUPLEX_HALF;
29c262fe 1008 if (link_info->req_duplex == BNXT_LINK_DUPLEX_FULL)
00c04a92 1009 base->duplex = DUPLEX_FULL;
c0c050c5 1010 }
00c04a92 1011 base->speed = ethtool_speed;
c0c050c5 1012
00c04a92 1013 base->port = PORT_NONE;
c0c050c5 1014 if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
00c04a92
MC		 1015 base->port = PORT_TP;
1016 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1017 TP);
1018 ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising,
1019 TP);
c0c050c5 1020 } else {
00c04a92
MC		 1021 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1022 FIBRE);
1023 ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising,
1024 FIBRE);
c0c050c5
MC		 1025
1026 if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_DAC)
00c04a92 1027 base->port = PORT_DA;
c0c050c5
MC		 1028 else if (link_info->media_type ==
1029 PORT_PHY_QCFG_RESP_MEDIA_TYPE_FIBRE)
00c04a92 1030 base->port = PORT_FIBRE;
c0c050c5 1031 }
00c04a92 1032 base->phy_address = link_info->phy_addr;
c0c050c5
MC		 1033
1034 return 0;
1035}
1036
1037static u32 bnxt_get_fw_speed(struct net_device *dev, u16 ethtool_speed)
1038{
9d9cee08
MC		 1039 struct bnxt *bp = netdev_priv(dev);
1040 struct bnxt_link_info *link_info = &bp->link_info;
1041 u16 support_spds = link_info->support_speeds;
1042 u32 fw_speed = 0;
1043
c0c050c5
MC		 1044 switch (ethtool_speed) {
1045 case SPEED_100:
9d9cee08
MC		 1046 if (support_spds & BNXT_LINK_SPEED_MSK_100MB)
1047 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100MB;
1048 break;
c0c050c5 1049 case SPEED_1000:
9d9cee08
MC		 1050 if (support_spds & BNXT_LINK_SPEED_MSK_1GB)
1051 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_1GB;
1052 break;
c0c050c5 1053 case SPEED_2500:
9d9cee08
MC		 1054 if (support_spds & BNXT_LINK_SPEED_MSK_2_5GB)
1055 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_2_5GB;
1056 break;
c0c050c5 1057 case SPEED_10000:
9d9cee08
MC		 1058 if (support_spds & BNXT_LINK_SPEED_MSK_10GB)
1059 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_10GB;
1060 break;
c0c050c5 1061 case SPEED_20000:
9d9cee08
MC		 1062 if (support_spds & BNXT_LINK_SPEED_MSK_20GB)
1063 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_20GB;
1064 break;
c0c050c5 1065 case SPEED_25000:
9d9cee08
MC		 1066 if (support_spds & BNXT_LINK_SPEED_MSK_25GB)
1067 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_25GB;
1068 break;
c0c050c5 1069 case SPEED_40000:
9d9cee08
MC		 1070 if (support_spds & BNXT_LINK_SPEED_MSK_40GB)
1071 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_40GB;
1072 break;
c0c050c5 1073 case SPEED_50000:
9d9cee08
MC		 1074 if (support_spds & BNXT_LINK_SPEED_MSK_50GB)
1075 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_50GB;
1076 break;
c0c050c5
MC		 1077 default:
1078 netdev_err(dev, "unsupported speed!\n");
1079 break;
1080 }
9d9cee08 1081 return fw_speed;
c0c050c5
MC		 1082}
1083
939f7f0c 1084u16 bnxt_get_fw_auto_link_speeds(u32 advertising)
c0c050c5
MC		 1085{
1086 u16 fw_speed_mask = 0;
1087
1088 /* only support autoneg at speed 100, 1000, and 10000 */
1089 if (advertising & (ADVERTISED_100baseT_Full |
1090 ADVERTISED_100baseT_Half)) {
1091 fw_speed_mask |= BNXT_LINK_SPEED_MSK_100MB;
1092 }
1093 if (advertising & (ADVERTISED_1000baseT_Full |
1094 ADVERTISED_1000baseT_Half)) {
1095 fw_speed_mask |= BNXT_LINK_SPEED_MSK_1GB;
1096 }
1097 if (advertising & ADVERTISED_10000baseT_Full)
1098 fw_speed_mask |= BNXT_LINK_SPEED_MSK_10GB;
1099
1c49c421
MC		 1100 if (advertising & ADVERTISED_40000baseCR4_Full)
1101 fw_speed_mask |= BNXT_LINK_SPEED_MSK_40GB;
1102
c0c050c5
MC		 1103 return fw_speed_mask;
1104}
1105
00c04a92
MC		 1106static int bnxt_set_link_ksettings(struct net_device *dev,
1107 const struct ethtool_link_ksettings *lk_ksettings)
c0c050c5 1108{
c0c050c5
MC		 1109 struct bnxt *bp = netdev_priv(dev);
1110 struct bnxt_link_info *link_info = &bp->link_info;
00c04a92 1111 const struct ethtool_link_settings *base = &lk_ksettings->base;
c0c050c5 1112 bool set_pause = false;
68515a18
MC		 1113 u16 fw_advertising = 0;
1114 u32 speed;
00c04a92 1115 int rc = 0;
c0c050c5 1116
567b2abe 1117 if (!BNXT_SINGLE_PF(bp))
00c04a92 1118 return -EOPNOTSUPP;
f1a082a6 1119
00c04a92
MC		 1120 if (base->autoneg == AUTONEG_ENABLE) {
1121 BNXT_ETHTOOL_TO_FW_SPDS(fw_advertising, lk_ksettings,
1122 advertising);
c0c050c5
MC		 1123 link_info->autoneg |= BNXT_AUTONEG_SPEED;
1124 if (!fw_advertising)
93ed8117 1125 link_info->advertising = link_info->support_auto_speeds;
c0c050c5
MC		 1126 else
1127 link_info->advertising = fw_advertising;
1128 /* any change to autoneg will cause link change, therefore the
1129 * driver should put back the original pause setting in autoneg
1130 */
1131 set_pause = true;
1132 } else {
9d9cee08 1133 u16 fw_speed;
03efbec0 1134 u8 phy_type = link_info->phy_type;
9d9cee08 1135
03efbec0
MC		 1136 if (phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASET ||
1137 phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASETE ||
1138 link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
1139 netdev_err(dev, "10GBase-T devices must autoneg\n");
1140 rc = -EINVAL;
1141 goto set_setting_exit;
1142 }
00c04a92 1143 if (base->duplex == DUPLEX_HALF) {
c0c050c5
MC		 1144 netdev_err(dev, "HALF DUPLEX is not supported!\n");
1145 rc = -EINVAL;
1146 goto set_setting_exit;
1147 }
00c04a92 1148 speed = base->speed;
9d9cee08
MC		 1149 fw_speed = bnxt_get_fw_speed(dev, speed);
1150 if (!fw_speed) {
1151 rc = -EINVAL;
1152 goto set_setting_exit;
1153 }
1154 link_info->req_link_speed = fw_speed;
c0c050c5 1155 link_info->req_duplex = BNXT_LINK_DUPLEX_FULL;
b763499e 1156 link_info->autoneg = 0;
c0c050c5
MC		 1157 link_info->advertising = 0;
1158 }
1159
1160 if (netif_running(dev))
939f7f0c 1161 rc = bnxt_hwrm_set_link_setting(bp, set_pause, false);
c0c050c5
MC		 1162
1163set_setting_exit:
1164 return rc;
1165}
1166
1167static void bnxt_get_pauseparam(struct net_device *dev,
1168 struct ethtool_pauseparam *epause)
1169{
1170 struct bnxt *bp = netdev_priv(dev);
1171 struct bnxt_link_info *link_info = &bp->link_info;
1172
1173 if (BNXT_VF(bp))
1174 return;
b763499e 1175 epause->autoneg = !!(link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL);
3c02d1bb
MC		 1176 epause->rx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_RX);
1177 epause->tx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_TX);
c0c050c5
MC		 1178}
1179
1180static int bnxt_set_pauseparam(struct net_device *dev,
1181 struct ethtool_pauseparam *epause)
1182{
1183 int rc = 0;
1184 struct bnxt *bp = netdev_priv(dev);
1185 struct bnxt_link_info *link_info = &bp->link_info;
1186
567b2abe 1187 if (!BNXT_SINGLE_PF(bp))
75362a3f 1188 return -EOPNOTSUPP;
c0c050c5
MC		 1189
1190 if (epause->autoneg) {
b763499e
MC		 1191 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED))
1192 return -EINVAL;
1193
c0c050c5 1194 link_info->autoneg |= BNXT_AUTONEG_FLOW_CTRL;
c9ee9516
MC		 1195 if (bp->hwrm_spec_code >= 0x10201)
1196 link_info->req_flow_ctrl =
1197 PORT_PHY_CFG_REQ_AUTO_PAUSE_AUTONEG_PAUSE;
c0c050c5
MC		 1198 } else {
1199 /* when transition from auto pause to force pause,
1200 * force a link change
1201 */
1202 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
1203 link_info->force_link_chng = true;
1204 link_info->autoneg &= ~BNXT_AUTONEG_FLOW_CTRL;
c9ee9516 1205 link_info->req_flow_ctrl = 0;
c0c050c5
MC		 1206 }
1207 if (epause->rx_pause)
1208 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_RX;
c0c050c5
MC		 1209
1210 if (epause->tx_pause)
1211 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_TX;
c0c050c5
MC		 1212
1213 if (netif_running(dev))
1214 rc = bnxt_hwrm_set_pause(bp);
1215 return rc;
1216}
1217
1218static u32 bnxt_get_link(struct net_device *dev)
1219{
1220 struct bnxt *bp = netdev_priv(dev);
1221
1222 /* TODO: handle MF, VF, driver close case */
1223 return bp->link_info.link_up;
1224}
1225
5ac67d8b
RS		 1226static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
1227 u16 ext, u16 *index, u32 *item_length,
1228 u32 *data_length);
1229
c0c050c5
MC		 1230static int bnxt_flash_nvram(struct net_device *dev,
1231 u16 dir_type,
1232 u16 dir_ordinal,
1233 u16 dir_ext,
1234 u16 dir_attr,
1235 const u8 *data,
1236 size_t data_len)
1237{
1238 struct bnxt *bp = netdev_priv(dev);
1239 int rc;
1240 struct hwrm_nvm_write_input req = {0};
1241 dma_addr_t dma_handle;
1242 u8 *kmem;
1243
1244 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_WRITE, -1, -1);
1245
1246 req.dir_type = cpu_to_le16(dir_type);
1247 req.dir_ordinal = cpu_to_le16(dir_ordinal);
1248 req.dir_ext = cpu_to_le16(dir_ext);
1249 req.dir_attr = cpu_to_le16(dir_attr);
1250 req.dir_data_length = cpu_to_le32(data_len);
1251
1252 kmem = dma_alloc_coherent(&bp->pdev->dev, data_len, &dma_handle,
1253 GFP_KERNEL);
1254 if (!kmem) {
1255 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
1256 (unsigned)data_len);
1257 return -ENOMEM;
1258 }
1259 memcpy(kmem, data, data_len);
1260 req.host_src_addr = cpu_to_le64(dma_handle);
1261
1262 rc = hwrm_send_message(bp, &req, sizeof(req), FLASH_NVRAM_TIMEOUT);
1263 dma_free_coherent(&bp->pdev->dev, data_len, kmem, dma_handle);
1264
1265 return rc;
1266}
1267
d2d6318c
RS		 1268static int bnxt_firmware_reset(struct net_device *dev,
1269 u16 dir_type)
1270{
1271 struct bnxt *bp = netdev_priv(dev);
1272 struct hwrm_fw_reset_input req = {0};
1273
1274 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FW_RESET, -1, -1);
1275
1276 /* TODO: Support ASAP ChiMP self-reset (e.g. upon PF driver unload) */
1277 /* TODO: Address self-reset of APE/KONG/BONO/TANG or ungraceful reset */
1278 /* (e.g. when firmware isn't already running) */
1279 switch (dir_type) {
1280 case BNX_DIR_TYPE_CHIMP_PATCH:
1281 case BNX_DIR_TYPE_BOOTCODE:
1282 case BNX_DIR_TYPE_BOOTCODE_2:
1283 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_BOOT;
1284 /* Self-reset ChiMP upon next PCIe reset: */
1285 req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
1286 break;
1287 case BNX_DIR_TYPE_APE_FW:
1288 case BNX_DIR_TYPE_APE_PATCH:
1289 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_MGMT;
08141e0b
RS		 1290 /* Self-reset APE upon next PCIe reset: */
1291 req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
d2d6318c
RS		 1292 break;
1293 case BNX_DIR_TYPE_KONG_FW:
1294 case BNX_DIR_TYPE_KONG_PATCH:
1295 req.embedded_proc_type =
1296 FW_RESET_REQ_EMBEDDED_PROC_TYPE_NETCTRL;
1297 break;
1298 case BNX_DIR_TYPE_BONO_FW:
1299 case BNX_DIR_TYPE_BONO_PATCH:
1300 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_ROCE;
1301 break;
1302 default:
1303 return -EINVAL;
1304 }
1305
1306 return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1307}
1308
c0c050c5
MC		 1309static int bnxt_flash_firmware(struct net_device *dev,
1310 u16 dir_type,
1311 const u8 *fw_data,
1312 size_t fw_size)
1313{
1314 int rc = 0;
1315 u16 code_type;
1316 u32 stored_crc;
1317 u32 calculated_crc;
1318 struct bnxt_fw_header *header = (struct bnxt_fw_header *)fw_data;
1319
1320 switch (dir_type) {
1321 case BNX_DIR_TYPE_BOOTCODE:
1322 case BNX_DIR_TYPE_BOOTCODE_2:
1323 code_type = CODE_BOOT;
1324 break;
93e0b4fe
RS		 1325 case BNX_DIR_TYPE_CHIMP_PATCH:
1326 code_type = CODE_CHIMP_PATCH;
1327 break;
2731d70f
RS		 1328 case BNX_DIR_TYPE_APE_FW:
1329 code_type = CODE_MCTP_PASSTHRU;
1330 break;
93e0b4fe
RS		 1331 case BNX_DIR_TYPE_APE_PATCH:
1332 code_type = CODE_APE_PATCH;
1333 break;
1334 case BNX_DIR_TYPE_KONG_FW:
1335 code_type = CODE_KONG_FW;
1336 break;
1337 case BNX_DIR_TYPE_KONG_PATCH:
1338 code_type = CODE_KONG_PATCH;
1339 break;
1340 case BNX_DIR_TYPE_BONO_FW:
1341 code_type = CODE_BONO_FW;
1342 break;
1343 case BNX_DIR_TYPE_BONO_PATCH:
1344 code_type = CODE_BONO_PATCH;
1345 break;
c0c050c5
MC		 1346 default:
1347 netdev_err(dev, "Unsupported directory entry type: %u\n",
1348 dir_type);
1349 return -EINVAL;
1350 }
1351 if (fw_size < sizeof(struct bnxt_fw_header)) {
1352 netdev_err(dev, "Invalid firmware file size: %u\n",
1353 (unsigned int)fw_size);
1354 return -EINVAL;
1355 }
1356 if (header->signature != cpu_to_le32(BNXT_FIRMWARE_BIN_SIGNATURE)) {
1357 netdev_err(dev, "Invalid firmware signature: %08X\n",
1358 le32_to_cpu(header->signature));
1359 return -EINVAL;
1360 }
1361 if (header->code_type != code_type) {
1362 netdev_err(dev, "Expected firmware type: %d, read: %d\n",
1363 code_type, header->code_type);
1364 return -EINVAL;
1365 }
1366 if (header->device != DEVICE_CUMULUS_FAMILY) {
1367 netdev_err(dev, "Expected firmware device family %d, read: %d\n",
1368 DEVICE_CUMULUS_FAMILY, header->device);
1369 return -EINVAL;
1370 }
1371 /* Confirm the CRC32 checksum of the file: */
1372 stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
1373 sizeof(stored_crc)));
1374 calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
1375 if (calculated_crc != stored_crc) {
1376 netdev_err(dev, "Firmware file CRC32 checksum (%08lX) does not match calculated checksum (%08lX)\n",
1377 (unsigned long)stored_crc,
1378 (unsigned long)calculated_crc);
1379 return -EINVAL;
1380 }
c0c050c5
MC		 1381 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
1382 0, 0, fw_data, fw_size);
d2d6318c
RS		 1383 if (rc == 0) /* Firmware update successful */
1384 rc = bnxt_firmware_reset(dev, dir_type);
1385
c0c050c5
MC		 1386 return rc;
1387}
1388
5ac67d8b
RS		 1389static int bnxt_flash_microcode(struct net_device *dev,
1390 u16 dir_type,
1391 const u8 *fw_data,
1392 size_t fw_size)
1393{
1394 struct bnxt_ucode_trailer *trailer;
1395 u32 calculated_crc;
1396 u32 stored_crc;
1397 int rc = 0;
1398
1399 if (fw_size < sizeof(struct bnxt_ucode_trailer)) {
1400 netdev_err(dev, "Invalid microcode file size: %u\n",
1401 (unsigned int)fw_size);
1402 return -EINVAL;
1403 }
1404 trailer = (struct bnxt_ucode_trailer *)(fw_data + (fw_size -
1405 sizeof(*trailer)));
1406 if (trailer->sig != cpu_to_le32(BNXT_UCODE_TRAILER_SIGNATURE)) {
1407 netdev_err(dev, "Invalid microcode trailer signature: %08X\n",
1408 le32_to_cpu(trailer->sig));
1409 return -EINVAL;
1410 }
1411 if (le16_to_cpu(trailer->dir_type) != dir_type) {
1412 netdev_err(dev, "Expected microcode type: %d, read: %d\n",
1413 dir_type, le16_to_cpu(trailer->dir_type));
1414 return -EINVAL;
1415 }
1416 if (le16_to_cpu(trailer->trailer_length) <
1417 sizeof(struct bnxt_ucode_trailer)) {
1418 netdev_err(dev, "Invalid microcode trailer length: %d\n",
1419 le16_to_cpu(trailer->trailer_length));
1420 return -EINVAL;
1421 }
1422
1423 /* Confirm the CRC32 checksum of the file: */
1424 stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
1425 sizeof(stored_crc)));
1426 calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
1427 if (calculated_crc != stored_crc) {
1428 netdev_err(dev,
1429 "CRC32 (%08lX) does not match calculated: %08lX\n",
1430 (unsigned long)stored_crc,
1431 (unsigned long)calculated_crc);
1432 return -EINVAL;
1433 }
1434 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
1435 0, 0, fw_data, fw_size);
1436
1437 return rc;
1438}
1439
c0c050c5
MC		 1440static bool bnxt_dir_type_is_ape_bin_format(u16 dir_type)
1441{
1442 switch (dir_type) {
1443 case BNX_DIR_TYPE_CHIMP_PATCH:
1444 case BNX_DIR_TYPE_BOOTCODE:
1445 case BNX_DIR_TYPE_BOOTCODE_2:
1446 case BNX_DIR_TYPE_APE_FW:
1447 case BNX_DIR_TYPE_APE_PATCH:
1448 case BNX_DIR_TYPE_KONG_FW:
1449 case BNX_DIR_TYPE_KONG_PATCH:
93e0b4fe
RS		 1450 case BNX_DIR_TYPE_BONO_FW:
1451 case BNX_DIR_TYPE_BONO_PATCH:
c0c050c5
MC		 1452 return true;
1453 }
1454
1455 return false;
1456}
1457
5ac67d8b 1458static bool bnxt_dir_type_is_other_exec_format(u16 dir_type)
c0c050c5
MC		 1459{
1460 switch (dir_type) {
1461 case BNX_DIR_TYPE_AVS:
1462 case BNX_DIR_TYPE_EXP_ROM_MBA:
1463 case BNX_DIR_TYPE_PCIE:
1464 case BNX_DIR_TYPE_TSCF_UCODE:
1465 case BNX_DIR_TYPE_EXT_PHY:
1466 case BNX_DIR_TYPE_CCM:
1467 case BNX_DIR_TYPE_ISCSI_BOOT:
1468 case BNX_DIR_TYPE_ISCSI_BOOT_IPV6:
1469 case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6:
1470 return true;
1471 }
1472
1473 return false;
1474}
1475
1476static bool bnxt_dir_type_is_executable(u16 dir_type)
1477{
1478 return bnxt_dir_type_is_ape_bin_format(dir_type) ||
5ac67d8b 1479 bnxt_dir_type_is_other_exec_format(dir_type);
c0c050c5
MC		 1480}
1481
1482static int bnxt_flash_firmware_from_file(struct net_device *dev,
1483 u16 dir_type,
1484 const char *filename)
1485{
1486 const struct firmware *fw;
1487 int rc;
1488
c0c050c5
MC		 1489 rc = request_firmware(&fw, filename, &dev->dev);
1490 if (rc != 0) {
1491 netdev_err(dev, "Error %d requesting firmware file: %s\n",
1492 rc, filename);
1493 return rc;
1494 }
1495 if (bnxt_dir_type_is_ape_bin_format(dir_type) == true)
1496 rc = bnxt_flash_firmware(dev, dir_type, fw->data, fw->size);
5ac67d8b
RS		 1497 else if (bnxt_dir_type_is_other_exec_format(dir_type) == true)
1498 rc = bnxt_flash_microcode(dev, dir_type, fw->data, fw->size);
c0c050c5
MC		 1499 else
1500 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
1501 0, 0, fw->data, fw->size);
1502 release_firmware(fw);
1503 return rc;
1504}
1505
1506static int bnxt_flash_package_from_file(struct net_device *dev,
5ac67d8b 1507 char *filename, u32 install_type)
c0c050c5 1508{
5ac67d8b
RS		 1509 struct bnxt *bp = netdev_priv(dev);
1510 struct hwrm_nvm_install_update_output *resp = bp->hwrm_cmd_resp_addr;
1511 struct hwrm_nvm_install_update_input install = {0};
1512 const struct firmware *fw;
1513 u32 item_len;
1514 u16 index;
1515 int rc;
1516
1517 bnxt_hwrm_fw_set_time(bp);
1518
1519 if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_UPDATE,
1520 BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
1521 &index, &item_len, NULL) != 0) {
1522 netdev_err(dev, "PKG update area not created in nvram\n");
1523 return -ENOBUFS;
1524 }
1525
1526 rc = request_firmware(&fw, filename, &dev->dev);
1527 if (rc != 0) {
1528 netdev_err(dev, "PKG error %d requesting file: %s\n",
1529 rc, filename);
1530 return rc;
1531 }
1532
1533 if (fw->size > item_len) {
1534 netdev_err(dev, "PKG insufficient update area in nvram: %lu",
1535 (unsigned long)fw->size);
1536 rc = -EFBIG;
1537 } else {
1538 dma_addr_t dma_handle;
1539 u8 *kmem;
1540 struct hwrm_nvm_modify_input modify = {0};
1541
1542 bnxt_hwrm_cmd_hdr_init(bp, &modify, HWRM_NVM_MODIFY, -1, -1);
1543
1544 modify.dir_idx = cpu_to_le16(index);
1545 modify.len = cpu_to_le32(fw->size);
1546
1547 kmem = dma_alloc_coherent(&bp->pdev->dev, fw->size,
1548 &dma_handle, GFP_KERNEL);
1549 if (!kmem) {
1550 netdev_err(dev,
1551 "dma_alloc_coherent failure, length = %u\n",
1552 (unsigned int)fw->size);
1553 rc = -ENOMEM;
1554 } else {
1555 memcpy(kmem, fw->data, fw->size);
1556 modify.host_src_addr = cpu_to_le64(dma_handle);
1557
1558 rc = hwrm_send_message(bp, &modify, sizeof(modify),
1559 FLASH_PACKAGE_TIMEOUT);
1560 dma_free_coherent(&bp->pdev->dev, fw->size, kmem,
1561 dma_handle);
1562 }
1563 }
1564 release_firmware(fw);
1565 if (rc)
1566 return rc;
1567
1568 if ((install_type & 0xffff) == 0)
1569 install_type >>= 16;
1570 bnxt_hwrm_cmd_hdr_init(bp, &install, HWRM_NVM_INSTALL_UPDATE, -1, -1);
1571 install.install_type = cpu_to_le32(install_type);
1572
1573 rc = hwrm_send_message(bp, &install, sizeof(install),
1574 INSTALL_PACKAGE_TIMEOUT);
1575 if (rc)
1576 return -EOPNOTSUPP;
1577
1578 if (resp->result) {
1579 netdev_err(dev, "PKG install error = %d, problem_item = %d\n",
1580 (s8)resp->result, (int)resp->problem_item);
1581 return -ENOPKG;
1582 }
1583 return 0;
c0c050c5
MC		 1584}
1585
1586static int bnxt_flash_device(struct net_device *dev,
1587 struct ethtool_flash *flash)
1588{
1589 if (!BNXT_PF((struct bnxt *)netdev_priv(dev))) {
1590 netdev_err(dev, "flashdev not supported from a virtual function\n");
1591 return -EINVAL;
1592 }
1593
5ac67d8b
RS		 1594 if (flash->region == ETHTOOL_FLASH_ALL_REGIONS ||
1595 flash->region > 0xffff)
1596 return bnxt_flash_package_from_file(dev, flash->data,
1597 flash->region);
c0c050c5
MC		 1598
1599 return bnxt_flash_firmware_from_file(dev, flash->region, flash->data);
1600}
1601
1602static int nvm_get_dir_info(struct net_device *dev, u32 *entries, u32 *length)
1603{
1604 struct bnxt *bp = netdev_priv(dev);
1605 int rc;
1606 struct hwrm_nvm_get_dir_info_input req = {0};
1607 struct hwrm_nvm_get_dir_info_output *output = bp->hwrm_cmd_resp_addr;
1608
1609 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_INFO, -1, -1);
1610
1611 mutex_lock(&bp->hwrm_cmd_lock);
1612 rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1613 if (!rc) {
1614 *entries = le32_to_cpu(output->entries);
1615 *length = le32_to_cpu(output->entry_length);
1616 }
1617 mutex_unlock(&bp->hwrm_cmd_lock);
1618 return rc;
1619}
1620
1621static int bnxt_get_eeprom_len(struct net_device *dev)
1622{
1623 /* The -1 return value allows the entire 32-bit range of offsets to be
1624 * passed via the ethtool command-line utility.
1625 */
1626 return -1;
1627}
1628
1629static int bnxt_get_nvram_directory(struct net_device *dev, u32 len, u8 *data)
1630{
1631 struct bnxt *bp = netdev_priv(dev);
1632 int rc;
1633 u32 dir_entries;
1634 u32 entry_length;
1635 u8 *buf;
1636 size_t buflen;
1637 dma_addr_t dma_handle;
1638 struct hwrm_nvm_get_dir_entries_input req = {0};
1639
1640 rc = nvm_get_dir_info(dev, &dir_entries, &entry_length);
1641 if (rc != 0)
1642 return rc;
1643
1644 /* Insert 2 bytes of directory info (count and size of entries) */
1645 if (len < 2)
1646 return -EINVAL;
1647
1648 *data++ = dir_entries;
1649 *data++ = entry_length;
1650 len -= 2;
1651 memset(data, 0xff, len);
1652
1653 buflen = dir_entries * entry_length;
1654 buf = dma_alloc_coherent(&bp->pdev->dev, buflen, &dma_handle,
1655 GFP_KERNEL);
1656 if (!buf) {
1657 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
1658 (unsigned)buflen);
1659 return -ENOMEM;
1660 }
1661 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_ENTRIES, -1, -1);
1662 req.host_dest_addr = cpu_to_le64(dma_handle);
1663 rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1664 if (rc == 0)
1665 memcpy(data, buf, len > buflen ? buflen : len);
1666 dma_free_coherent(&bp->pdev->dev, buflen, buf, dma_handle);
1667 return rc;
1668}
1669
1670static int bnxt_get_nvram_item(struct net_device *dev, u32 index, u32 offset,
1671 u32 length, u8 *data)
1672{
1673 struct bnxt *bp = netdev_priv(dev);
1674 int rc;
1675 u8 *buf;
1676 dma_addr_t dma_handle;
1677 struct hwrm_nvm_read_input req = {0};
1678
1679 buf = dma_alloc_coherent(&bp->pdev->dev, length, &dma_handle,
1680 GFP_KERNEL);
1681 if (!buf) {
1682 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
1683 (unsigned)length);
1684 return -ENOMEM;
1685 }
1686 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_READ, -1, -1);
1687 req.host_dest_addr = cpu_to_le64(dma_handle);
1688 req.dir_idx = cpu_to_le16(index);
1689 req.offset = cpu_to_le32(offset);
1690 req.len = cpu_to_le32(length);
1691
1692 rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1693 if (rc == 0)
1694 memcpy(data, buf, length);
1695 dma_free_coherent(&bp->pdev->dev, length, buf, dma_handle);
1696 return rc;
1697}
1698
3ebf6f0a
RS		 1699static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
1700 u16 ext, u16 *index, u32 *item_length,
1701 u32 *data_length)
1702{
1703 struct bnxt *bp = netdev_priv(dev);
1704 int rc;
1705 struct hwrm_nvm_find_dir_entry_input req = {0};
1706 struct hwrm_nvm_find_dir_entry_output *output = bp->hwrm_cmd_resp_addr;
1707
1708 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_FIND_DIR_ENTRY, -1, -1);
1709 req.enables = 0;
1710 req.dir_idx = 0;
1711 req.dir_type = cpu_to_le16(type);
1712 req.dir_ordinal = cpu_to_le16(ordinal);
1713 req.dir_ext = cpu_to_le16(ext);
1714 req.opt_ordinal = NVM_FIND_DIR_ENTRY_REQ_OPT_ORDINAL_EQ;
90e20921 1715 rc = hwrm_send_message_silent(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
3ebf6f0a
RS		 1716 if (rc == 0) {
1717 if (index)
1718 *index = le16_to_cpu(output->dir_idx);
1719 if (item_length)
1720 *item_length = le32_to_cpu(output->dir_item_length);
1721 if (data_length)
1722 *data_length = le32_to_cpu(output->dir_data_length);
1723 }
1724 return rc;
1725}
1726
1727static char *bnxt_parse_pkglog(int desired_field, u8 *data, size_t datalen)
1728{
1729 char *retval = NULL;
1730 char *p;
1731 char *value;
1732 int field = 0;
1733
1734 if (datalen < 1)
1735 return NULL;
1736 /* null-terminate the log data (removing last '\n'): */
1737 data[datalen - 1] = 0;
1738 for (p = data; *p != 0; p++) {
1739 field = 0;
1740 retval = NULL;
1741 while (*p != 0 && *p != '\n') {
1742 value = p;
1743 while (*p != 0 && *p != '\t' && *p != '\n')
1744 p++;
1745 if (field == desired_field)
1746 retval = value;
1747 if (*p != '\t')
1748 break;
1749 *p = 0;
1750 field++;
1751 p++;
1752 }
1753 if (*p == 0)
1754 break;
1755 *p = 0;
1756 }
1757 return retval;
1758}
1759
1760static char *bnxt_get_pkgver(struct net_device *dev, char *buf, size_t buflen)
1761{
1762 u16 index = 0;
1763 u32 datalen;
1764
1765 if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_PKG_LOG,
1766 BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
1767 &index, NULL, &datalen) != 0)
1768 return NULL;
1769
1770 memset(buf, 0, buflen);
1771 if (bnxt_get_nvram_item(dev, index, 0, datalen, buf) != 0)
1772 return NULL;
1773
1774 return bnxt_parse_pkglog(BNX_PKG_LOG_FIELD_IDX_PKG_VERSION, buf,
1775 datalen);
1776}
1777
c0c050c5
MC		 1778static int bnxt_get_eeprom(struct net_device *dev,
1779 struct ethtool_eeprom *eeprom,
1780 u8 *data)
1781{
1782 u32 index;
1783 u32 offset;
1784
1785 if (eeprom->offset == 0) /* special offset value to get directory */
1786 return bnxt_get_nvram_directory(dev, eeprom->len, data);
1787
1788 index = eeprom->offset >> 24;
1789 offset = eeprom->offset & 0xffffff;
1790
1791 if (index == 0) {
1792 netdev_err(dev, "unsupported index value: %d\n", index);
1793 return -EINVAL;
1794 }
1795
1796 return bnxt_get_nvram_item(dev, index - 1, offset, eeprom->len, data);
1797}
1798
1799static int bnxt_erase_nvram_directory(struct net_device *dev, u8 index)
1800{
1801 struct bnxt *bp = netdev_priv(dev);
1802 struct hwrm_nvm_erase_dir_entry_input req = {0};
1803
1804 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_ERASE_DIR_ENTRY, -1, -1);
1805 req.dir_idx = cpu_to_le16(index);
1806 return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1807}
1808
1809static int bnxt_set_eeprom(struct net_device *dev,
1810 struct ethtool_eeprom *eeprom,
1811 u8 *data)
1812{
1813 struct bnxt *bp = netdev_priv(dev);
1814 u8 index, dir_op;
1815 u16 type, ext, ordinal, attr;
1816
1817 if (!BNXT_PF(bp)) {
1818 netdev_err(dev, "NVM write not supported from a virtual function\n");
1819 return -EINVAL;
1820 }
1821
1822 type = eeprom->magic >> 16;
1823
1824 if (type == 0xffff) { /* special value for directory operations */
1825 index = eeprom->magic & 0xff;
1826 dir_op = eeprom->magic >> 8;
1827 if (index == 0)
1828 return -EINVAL;
1829 switch (dir_op) {
1830 case 0x0e: /* erase */
1831 if (eeprom->offset != ~eeprom->magic)
1832 return -EINVAL;
1833 return bnxt_erase_nvram_directory(dev, index - 1);
1834 default:
1835 return -EINVAL;
1836 }
1837 }
1838
1839 /* Create or re-write an NVM item: */
1840 if (bnxt_dir_type_is_executable(type) == true)
5ac67d8b 1841 return -EOPNOTSUPP;
c0c050c5
MC		 1842 ext = eeprom->magic & 0xffff;
1843 ordinal = eeprom->offset >> 16;
1844 attr = eeprom->offset & 0xffff;
1845
1846 return bnxt_flash_nvram(dev, type, ordinal, ext, attr, data,
1847 eeprom->len);
1848}
1849
72b34f04
MC		 1850static int bnxt_set_eee(struct net_device *dev, struct ethtool_eee *edata)
1851{
1852 struct bnxt *bp = netdev_priv(dev);
1853 struct ethtool_eee *eee = &bp->eee;
1854 struct bnxt_link_info *link_info = &bp->link_info;
1855 u32 advertising =
1856 _bnxt_fw_to_ethtool_adv_spds(link_info->advertising, 0);
1857 int rc = 0;
1858
567b2abe 1859 if (!BNXT_SINGLE_PF(bp))
75362a3f 1860 return -EOPNOTSUPP;
72b34f04
MC		 1861
1862 if (!(bp->flags & BNXT_FLAG_EEE_CAP))
1863 return -EOPNOTSUPP;
1864
1865 if (!edata->eee_enabled)
1866 goto eee_ok;
1867
1868 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) {
1869 netdev_warn(dev, "EEE requires autoneg\n");
1870 return -EINVAL;
1871 }
1872 if (edata->tx_lpi_enabled) {
1873 if (bp->lpi_tmr_hi && (edata->tx_lpi_timer > bp->lpi_tmr_hi ||
1874 edata->tx_lpi_timer < bp->lpi_tmr_lo)) {
1875 netdev_warn(dev, "Valid LPI timer range is %d and %d microsecs\n",
1876 bp->lpi_tmr_lo, bp->lpi_tmr_hi);
1877 return -EINVAL;
1878 } else if (!bp->lpi_tmr_hi) {
1879 edata->tx_lpi_timer = eee->tx_lpi_timer;
1880 }
1881 }
1882 if (!edata->advertised) {
1883 edata->advertised = advertising & eee->supported;
1884 } else if (edata->advertised & ~advertising) {
1885 netdev_warn(dev, "EEE advertised %x must be a subset of autoneg advertised speeds %x\n",
1886 edata->advertised, advertising);
1887 return -EINVAL;
1888 }
1889
1890 eee->advertised = edata->advertised;
1891 eee->tx_lpi_enabled = edata->tx_lpi_enabled;
1892 eee->tx_lpi_timer = edata->tx_lpi_timer;
1893eee_ok:
1894 eee->eee_enabled = edata->eee_enabled;
1895
1896 if (netif_running(dev))
1897 rc = bnxt_hwrm_set_link_setting(bp, false, true);
1898
1899 return rc;
1900}
1901
1902static int bnxt_get_eee(struct net_device *dev, struct ethtool_eee *edata)
1903{
1904 struct bnxt *bp = netdev_priv(dev);
1905
1906 if (!(bp->flags & BNXT_FLAG_EEE_CAP))
1907 return -EOPNOTSUPP;
1908
1909 *edata = bp->eee;
1910 if (!bp->eee.eee_enabled) {
1911 /* Preserve tx_lpi_timer so that the last value will be used
1912 * by default when it is re-enabled.
1913 */
1914 edata->advertised = 0;
1915 edata->tx_lpi_enabled = 0;
1916 }
1917
1918 if (!bp->eee.eee_active)
1919 edata->lp_advertised = 0;
1920
1921 return 0;
1922}
1923
42ee18fe
AK		 1924static int bnxt_read_sfp_module_eeprom_info(struct bnxt *bp, u16 i2c_addr,
1925 u16 page_number, u16 start_addr,
1926 u16 data_length, u8 *buf)
1927{
1928 struct hwrm_port_phy_i2c_read_input req = {0};
1929 struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr;
1930 int rc, byte_offset = 0;
1931
1932 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1);
1933 req.i2c_slave_addr = i2c_addr;
1934 req.page_number = cpu_to_le16(page_number);
1935 req.port_id = cpu_to_le16(bp->pf.port_id);
1936 do {
1937 u16 xfer_size;
1938
1939 xfer_size = min_t(u16, data_length, BNXT_MAX_PHY_I2C_RESP_SIZE);
1940 data_length -= xfer_size;
1941 req.page_offset = cpu_to_le16(start_addr + byte_offset);
1942 req.data_length = xfer_size;
1943 req.enables = cpu_to_le32(start_addr + byte_offset ?
1944 PORT_PHY_I2C_READ_REQ_ENABLES_PAGE_OFFSET : 0);
1945 mutex_lock(&bp->hwrm_cmd_lock);
1946 rc = _hwrm_send_message(bp, &req, sizeof(req),
1947 HWRM_CMD_TIMEOUT);
1948 if (!rc)
1949 memcpy(buf + byte_offset, output->data, xfer_size);
1950 mutex_unlock(&bp->hwrm_cmd_lock);
1951 byte_offset += xfer_size;
1952 } while (!rc && data_length > 0);
1953
1954 return rc;
1955}
1956
1957static int bnxt_get_module_info(struct net_device *dev,
1958 struct ethtool_modinfo *modinfo)
1959{
1960 struct bnxt *bp = netdev_priv(dev);
1961 struct hwrm_port_phy_i2c_read_input req = {0};
1962 struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr;
1963 int rc;
1964
1965 /* No point in going further if phy status indicates
1966 * module is not inserted or if it is powered down or
1967 * if it is of type 10GBase-T
1968 */
1969 if (bp->link_info.module_status >
1970 PORT_PHY_QCFG_RESP_MODULE_STATUS_WARNINGMSG)
1971 return -EOPNOTSUPP;
1972
1973 /* This feature is not supported in older firmware versions */
1974 if (bp->hwrm_spec_code < 0x10202)
1975 return -EOPNOTSUPP;
1976
1977 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1);
1978 req.i2c_slave_addr = I2C_DEV_ADDR_A0;
1979 req.page_number = 0;
1980 req.page_offset = cpu_to_le16(SFP_EEPROM_SFF_8472_COMP_ADDR);
1981 req.data_length = SFP_EEPROM_SFF_8472_COMP_SIZE;
1982 req.port_id = cpu_to_le16(bp->pf.port_id);
1983 mutex_lock(&bp->hwrm_cmd_lock);
1984 rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1985 if (!rc) {
1986 u32 module_id = le32_to_cpu(output->data[0]);
1987
1988 switch (module_id) {
1989 case SFF_MODULE_ID_SFP:
1990 modinfo->type = ETH_MODULE_SFF_8472;
1991 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
1992 break;
1993 case SFF_MODULE_ID_QSFP:
1994 case SFF_MODULE_ID_QSFP_PLUS:
1995 modinfo->type = ETH_MODULE_SFF_8436;
1996 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1997 break;
1998 case SFF_MODULE_ID_QSFP28:
1999 modinfo->type = ETH_MODULE_SFF_8636;
2000 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
2001 break;
2002 default:
2003 rc = -EOPNOTSUPP;
2004 break;
2005 }
2006 }
2007 mutex_unlock(&bp->hwrm_cmd_lock);
2008 return rc;
2009}
2010
2011static int bnxt_get_module_eeprom(struct net_device *dev,
2012 struct ethtool_eeprom *eeprom,
2013 u8 *data)
2014{
2015 struct bnxt *bp = netdev_priv(dev);
2016 u16 start = eeprom->offset, length = eeprom->len;
f3ea3119 2017 int rc = 0;
42ee18fe
AK		 2018
2019 memset(data, 0, eeprom->len);
2020
2021 /* Read A0 portion of the EEPROM */
2022 if (start < ETH_MODULE_SFF_8436_LEN) {
2023 if (start + eeprom->len > ETH_MODULE_SFF_8436_LEN)
2024 length = ETH_MODULE_SFF_8436_LEN - start;
2025 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0,
2026 start, length, data);
2027 if (rc)
2028 return rc;
2029 start += length;
2030 data += length;
2031 length = eeprom->len - length;
2032 }
2033
2034 /* Read A2 portion of the EEPROM */
2035 if (length) {
2036 start -= ETH_MODULE_SFF_8436_LEN;
2037 bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A2, 1, start,
2038 length, data);
2039 }
2040 return rc;
2041}
2042
ae8e98a6
DK		 2043static int bnxt_nway_reset(struct net_device *dev)
2044{
2045 int rc = 0;
2046
2047 struct bnxt *bp = netdev_priv(dev);
2048 struct bnxt_link_info *link_info = &bp->link_info;
2049
2050 if (!BNXT_SINGLE_PF(bp))
2051 return -EOPNOTSUPP;
2052
2053 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED))
2054 return -EINVAL;
2055
2056 if (netif_running(dev))
2057 rc = bnxt_hwrm_set_link_setting(bp, true, false);
2058
2059 return rc;
2060}
2061
5ad2cbee
MC		 2062static int bnxt_set_phys_id(struct net_device *dev,
2063 enum ethtool_phys_id_state state)
2064{
2065 struct hwrm_port_led_cfg_input req = {0};
2066 struct bnxt *bp = netdev_priv(dev);
2067 struct bnxt_pf_info *pf = &bp->pf;
2068 struct bnxt_led_cfg *led_cfg;
2069 u8 led_state;
2070 __le16 duration;
2071 int i, rc;
2072
2073 if (!bp->num_leds || BNXT_VF(bp))
2074 return -EOPNOTSUPP;
2075
2076 if (state == ETHTOOL_ID_ACTIVE) {
2077 led_state = PORT_LED_CFG_REQ_LED0_STATE_BLINKALT;
2078 duration = cpu_to_le16(500);
2079 } else if (state == ETHTOOL_ID_INACTIVE) {
2080 led_state = PORT_LED_CFG_REQ_LED1_STATE_DEFAULT;
2081 duration = cpu_to_le16(0);
2082 } else {
2083 return -EINVAL;
2084 }
2085 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_LED_CFG, -1, -1);
2086 req.port_id = cpu_to_le16(pf->port_id);
2087 req.num_leds = bp->num_leds;
2088 led_cfg = (struct bnxt_led_cfg *)&req.led0_id;
2089 for (i = 0; i < bp->num_leds; i++, led_cfg++) {
2090 req.enables |= BNXT_LED_DFLT_ENABLES(i);
2091 led_cfg->led_id = bp->leds[i].led_id;
2092 led_cfg->led_state = led_state;
2093 led_cfg->led_blink_on = duration;
2094 led_cfg->led_blink_off = duration;
2095 led_cfg->led_group_id = bp->leds[i].led_group_id;
2096 }
2097 rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2098 if (rc)
2099 rc = -EIO;
2100 return rc;
2101}
2102
c0c050c5 2103const struct ethtool_ops bnxt_ethtool_ops = {
00c04a92
MC		 2104 .get_link_ksettings = bnxt_get_link_ksettings,
2105 .set_link_ksettings = bnxt_set_link_ksettings,
c0c050c5
MC		 2106 .get_pauseparam = bnxt_get_pauseparam,
2107 .set_pauseparam = bnxt_set_pauseparam,
2108 .get_drvinfo = bnxt_get_drvinfo,
2109 .get_coalesce = bnxt_get_coalesce,
2110 .set_coalesce = bnxt_set_coalesce,
2111 .get_msglevel = bnxt_get_msglevel,
2112 .set_msglevel = bnxt_set_msglevel,
2113 .get_sset_count = bnxt_get_sset_count,
2114 .get_strings = bnxt_get_strings,
2115 .get_ethtool_stats = bnxt_get_ethtool_stats,
2116 .set_ringparam = bnxt_set_ringparam,
2117 .get_ringparam = bnxt_get_ringparam,
2118 .get_channels = bnxt_get_channels,
2119 .set_channels = bnxt_set_channels,
c0c050c5 2120 .get_rxnfc = bnxt_get_rxnfc,
a011952a 2121 .set_rxnfc = bnxt_set_rxnfc,
c0c050c5
MC		 2122 .get_rxfh_indir_size = bnxt_get_rxfh_indir_size,
2123 .get_rxfh_key_size = bnxt_get_rxfh_key_size,
2124 .get_rxfh = bnxt_get_rxfh,
2125 .flash_device = bnxt_flash_device,
2126 .get_eeprom_len = bnxt_get_eeprom_len,
2127 .get_eeprom = bnxt_get_eeprom,
2128 .set_eeprom = bnxt_set_eeprom,
2129 .get_link = bnxt_get_link,
72b34f04
MC		 2130 .get_eee = bnxt_get_eee,
2131 .set_eee = bnxt_set_eee,
42ee18fe
AK		 2132 .get_module_info = bnxt_get_module_info,
2133 .get_module_eeprom = bnxt_get_module_eeprom,
5ad2cbee
MC		 2134 .nway_reset = bnxt_nway_reset,
2135 .set_phys_id = bnxt_set_phys_id,
c0c050c5 2136};
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