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cnic: Eliminate CNIC_PORT macro and port_mode in local struct.
[mirror_ubuntu-artful-kernel.git] / drivers / net / ethernet / broadcom / cnic.c
CommitLineData
a4636960
MC		 1/* cnic.c: Broadcom CNIC core network driver.
2 *
ca67a3cb 3 * Copyright (c) 2006-2013 Broadcom Corporation
a4636960
MC		 4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation.
8 *
9 * Original skeleton written by: John(Zongxi) Chen (zongxi@broadcom.com)
10 * Modified and maintained by: Michael Chan <mchan@broadcom.com>
11 */
12
ddf79b20
JP		 13#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
14
a4636960
MC		 15#include <linux/module.h>
16
17#include <linux/kernel.h>
18#include <linux/errno.h>
19#include <linux/list.h>
20#include <linux/slab.h>
21#include <linux/pci.h>
22#include <linux/init.h>
23#include <linux/netdevice.h>
24#include <linux/uio_driver.h>
25#include <linux/in.h>
26#include <linux/dma-mapping.h>
27#include <linux/delay.h>
28#include <linux/ethtool.h>
29#include <linux/if_vlan.h>
70c71606 30#include <linux/prefetch.h>
973e574e 31#include <linux/random.h>
a4636960
MC		 32#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
33#define BCM_VLAN 1
34#endif
35#include <net/ip.h>
36#include <net/tcp.h>
37#include <net/route.h>
38#include <net/ipv6.h>
39#include <net/ip6_route.h>
c05e85a0 40#include <net/ip6_checksum.h>
a4636960
MC		 41#include <scsi/iscsi_if.h>
42
4bd9b0ff 43#define BCM_CNIC 1
a4636960
MC		 44#include "cnic_if.h"
45#include "bnx2.h"
68c64d20 46#include "bnx2x/bnx2x.h"
5d1e859c
DK		 47#include "bnx2x/bnx2x_reg.h"
48#include "bnx2x/bnx2x_fw_defs.h"
49#include "bnx2x/bnx2x_hsi.h"
adfc5217
JK		 50#include "../../../scsi/bnx2i/57xx_iscsi_constants.h"
51#include "../../../scsi/bnx2i/57xx_iscsi_hsi.h"
8ec3e702 52#include "../../../scsi/bnx2fc/bnx2fc_constants.h"
a4636960
MC		 53#include "cnic.h"
54#include "cnic_defs.h"
55
68c64d20 56#define CNIC_MODULE_NAME "cnic"
a4636960 57
047fc566 58static char version[] =
68c64d20 59 "Broadcom NetXtreme II CNIC Driver " CNIC_MODULE_NAME " v" CNIC_MODULE_VERSION " (" CNIC_MODULE_RELDATE ")\n";
a4636960
MC		 60
61MODULE_AUTHOR("Michael Chan <mchan@broadcom.com> and John(Zongxi) "
62 "Chen (zongxi@broadcom.com");
63MODULE_DESCRIPTION("Broadcom NetXtreme II CNIC Driver");
64MODULE_LICENSE("GPL");
65MODULE_VERSION(CNIC_MODULE_VERSION);
66
8adc9240 67/* cnic_dev_list modifications are protected by both rtnl and cnic_dev_lock */
a4636960 68static LIST_HEAD(cnic_dev_list);
a3ceeeb8 69static LIST_HEAD(cnic_udev_list);
a4636960
MC		 70static DEFINE_RWLOCK(cnic_dev_lock);
71static DEFINE_MUTEX(cnic_lock);
72
13707f9e
ED		 73static struct cnic_ulp_ops __rcu *cnic_ulp_tbl[MAX_CNIC_ULP_TYPE];
74
75/* helper function, assuming cnic_lock is held */
76static inline struct cnic_ulp_ops *cnic_ulp_tbl_prot(int type)
77{
78 return rcu_dereference_protected(cnic_ulp_tbl[type],
79 lockdep_is_held(&cnic_lock));
80}
a4636960
MC		 81
82static int cnic_service_bnx2(void *, void *);
71034ba8 83static int cnic_service_bnx2x(void *, void *);
a4636960
MC		 84static int cnic_ctl(void *, struct cnic_ctl_info *);
85
86static struct cnic_ops cnic_bnx2_ops = {
87 .cnic_owner = THIS_MODULE,
88 .cnic_handler = cnic_service_bnx2,
89 .cnic_ctl = cnic_ctl,
90};
91
71034ba8
MC		 92static struct cnic_ops cnic_bnx2x_ops = {
93 .cnic_owner = THIS_MODULE,
94 .cnic_handler = cnic_service_bnx2x,
95 .cnic_ctl = cnic_ctl,
96};
97
fdf24086
MC		 98static struct workqueue_struct *cnic_wq;
99
86b53606
MC		 100static void cnic_shutdown_rings(struct cnic_dev *);
101static void cnic_init_rings(struct cnic_dev *);
a4636960
MC		 102static int cnic_cm_set_pg(struct cnic_sock *);
103
104static int cnic_uio_open(struct uio_info *uinfo, struct inode *inode)
105{
cd801536
MC		 106 struct cnic_uio_dev *udev = uinfo->priv;
107 struct cnic_dev *dev;
a4636960
MC		 108
109 if (!capable(CAP_NET_ADMIN))
110 return -EPERM;
111
cd801536 112 if (udev->uio_dev != -1)
a4636960
MC		 113 return -EBUSY;
114
86b53606 115 rtnl_lock();
cd801536
MC		 116 dev = udev->dev;
117
a3ceeeb8 118 if (!dev || !test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
86b53606
MC		 119 rtnl_unlock();
120 return -ENODEV;
121 }
122
cd801536 123 udev->uio_dev = iminor(inode);
a4636960 124
a3ceeeb8 125 cnic_shutdown_rings(dev);
86b53606
MC		 126 cnic_init_rings(dev);
127 rtnl_unlock();
a4636960
MC		 128
129 return 0;
130}
131
132static int cnic_uio_close(struct uio_info *uinfo, struct inode *inode)
133{
cd801536 134 struct cnic_uio_dev *udev = uinfo->priv;
6ef57a0e 135
cd801536 136 udev->uio_dev = -1;
a4636960
MC		 137 return 0;
138}
139
140static inline void cnic_hold(struct cnic_dev *dev)
141{
142 atomic_inc(&dev->ref_count);
143}
144
145static inline void cnic_put(struct cnic_dev *dev)
146{
147 atomic_dec(&dev->ref_count);
148}
149
150static inline void csk_hold(struct cnic_sock *csk)
151{
152 atomic_inc(&csk->ref_count);
153}
154
155static inline void csk_put(struct cnic_sock *csk)
156{
157 atomic_dec(&csk->ref_count);
158}
159
160static struct cnic_dev *cnic_from_netdev(struct net_device *netdev)
161{
162 struct cnic_dev *cdev;
163
164 read_lock(&cnic_dev_lock);
165 list_for_each_entry(cdev, &cnic_dev_list, list) {
166 if (netdev == cdev->netdev) {
167 cnic_hold(cdev);
168 read_unlock(&cnic_dev_lock);
169 return cdev;
170 }
171 }
172 read_unlock(&cnic_dev_lock);
173 return NULL;
174}
175
7fc1ece4
MC		 176static inline void ulp_get(struct cnic_ulp_ops *ulp_ops)
177{
178 atomic_inc(&ulp_ops->ref_count);
179}
180
181static inline void ulp_put(struct cnic_ulp_ops *ulp_ops)
182{
183 atomic_dec(&ulp_ops->ref_count);
184}
185
a4636960
MC		 186static void cnic_ctx_wr(struct cnic_dev *dev, u32 cid_addr, u32 off, u32 val)
187{
188 struct cnic_local *cp = dev->cnic_priv;
189 struct cnic_eth_dev *ethdev = cp->ethdev;
190 struct drv_ctl_info info;
191 struct drv_ctl_io *io = &info.data.io;
192
193 info.cmd = DRV_CTL_CTX_WR_CMD;
194 io->cid_addr = cid_addr;
195 io->offset = off;
196 io->data = val;
197 ethdev->drv_ctl(dev->netdev, &info);
198}
199
71034ba8
MC		 200static void cnic_ctx_tbl_wr(struct cnic_dev *dev, u32 off, dma_addr_t addr)
201{
202 struct cnic_local *cp = dev->cnic_priv;
203 struct cnic_eth_dev *ethdev = cp->ethdev;
204 struct drv_ctl_info info;
205 struct drv_ctl_io *io = &info.data.io;
206
207 info.cmd = DRV_CTL_CTXTBL_WR_CMD;
208 io->offset = off;
209 io->dma_addr = addr;
210 ethdev->drv_ctl(dev->netdev, &info);
211}
212
213static void cnic_ring_ctl(struct cnic_dev *dev, u32 cid, u32 cl_id, int start)
214{
215 struct cnic_local *cp = dev->cnic_priv;
216 struct cnic_eth_dev *ethdev = cp->ethdev;
217 struct drv_ctl_info info;
218 struct drv_ctl_l2_ring *ring = &info.data.ring;
219
220 if (start)
221 info.cmd = DRV_CTL_START_L2_CMD;
222 else
223 info.cmd = DRV_CTL_STOP_L2_CMD;
224
225 ring->cid = cid;
226 ring->client_id = cl_id;
227 ethdev->drv_ctl(dev->netdev, &info);
228}
229
a4636960
MC		 230static void cnic_reg_wr_ind(struct cnic_dev *dev, u32 off, u32 val)
231{
232 struct cnic_local *cp = dev->cnic_priv;
233 struct cnic_eth_dev *ethdev = cp->ethdev;
234 struct drv_ctl_info info;
235 struct drv_ctl_io *io = &info.data.io;
236
237 info.cmd = DRV_CTL_IO_WR_CMD;
238 io->offset = off;
239 io->data = val;
240 ethdev->drv_ctl(dev->netdev, &info);
241}
242
243static u32 cnic_reg_rd_ind(struct cnic_dev *dev, u32 off)
244{
245 struct cnic_local *cp = dev->cnic_priv;
246 struct cnic_eth_dev *ethdev = cp->ethdev;
247 struct drv_ctl_info info;
248 struct drv_ctl_io *io = &info.data.io;
249
250 info.cmd = DRV_CTL_IO_RD_CMD;
251 io->offset = off;
252 ethdev->drv_ctl(dev->netdev, &info);
253 return io->data;
254}
255
1d187b34
BW		 256static void cnic_ulp_ctl(struct cnic_dev *dev, int ulp_type, bool reg)
257{
258 struct cnic_local *cp = dev->cnic_priv;
259 struct cnic_eth_dev *ethdev = cp->ethdev;
260 struct drv_ctl_info info;
2e499d3c
BW		 261 struct fcoe_capabilities *fcoe_cap =
262 &info.data.register_data.fcoe_features;
1d187b34 263
2e499d3c 264 if (reg) {
1d187b34 265 info.cmd = DRV_CTL_ULP_REGISTER_CMD;
2e499d3c
BW		 266 if (ulp_type == CNIC_ULP_FCOE && dev->fcoe_cap)
267 memcpy(fcoe_cap, dev->fcoe_cap, sizeof(*fcoe_cap));
268 } else {
1d187b34 269 info.cmd = DRV_CTL_ULP_UNREGISTER_CMD;
2e499d3c 270 }
1d187b34
BW		 271
272 info.data.ulp_type = ulp_type;
273 ethdev->drv_ctl(dev->netdev, &info);
274}
275
a4636960
MC		 276static int cnic_in_use(struct cnic_sock *csk)
277{
278 return test_bit(SK_F_INUSE, &csk->flags);
279}
280
c2bff63f 281static void cnic_spq_completion(struct cnic_dev *dev, int cmd, u32 count)
a4636960
MC		 282{
283 struct cnic_local *cp = dev->cnic_priv;
284 struct cnic_eth_dev *ethdev = cp->ethdev;
285 struct drv_ctl_info info;
286
c2bff63f
DK		 287 info.cmd = cmd;
288 info.data.credit.credit_count = count;
a4636960
MC		 289 ethdev->drv_ctl(dev->netdev, &info);
290}
291
71034ba8
MC		 292static int cnic_get_l5_cid(struct cnic_local *cp, u32 cid, u32 *l5_cid)
293{
294 u32 i;
295
a2028b23
MC		 296 if (!cp->ctx_tbl)
297 return -EINVAL;
298
520efdf4 299 for (i = 0; i < cp->max_cid_space; i++) {
71034ba8
MC		 300 if (cp->ctx_tbl[i].cid == cid) {
301 *l5_cid = i;
302 return 0;
303 }
304 }
305 return -EINVAL;
306}
307
a4636960
MC		 308static int cnic_send_nlmsg(struct cnic_local *cp, u32 type,
309 struct cnic_sock *csk)
310{
311 struct iscsi_path path_req;
312 char *buf = NULL;
313 u16 len = 0;
314 u32 msg_type = ISCSI_KEVENT_IF_DOWN;
315 struct cnic_ulp_ops *ulp_ops;
cd801536 316 struct cnic_uio_dev *udev = cp->udev;
939b82e5 317 int rc = 0, retry = 0;
a4636960 318
cd801536 319 if (!udev || udev->uio_dev == -1)
a4636960
MC		 320 return -ENODEV;
321
322 if (csk) {
323 len = sizeof(path_req);
324 buf = (char *) &path_req;
325 memset(&path_req, 0, len);
326
327 msg_type = ISCSI_KEVENT_PATH_REQ;
328 path_req.handle = (u64) csk->l5_cid;
329 if (test_bit(SK_F_IPV6, &csk->flags)) {
330 memcpy(&path_req.dst.v6_addr, &csk->dst_ip[0],
331 sizeof(struct in6_addr));
332 path_req.ip_addr_len = 16;
333 } else {
334 memcpy(&path_req.dst.v4_addr, &csk->dst_ip[0],
335 sizeof(struct in_addr));
336 path_req.ip_addr_len = 4;
337 }
338 path_req.vlan_id = csk->vlan_id;
339 path_req.pmtu = csk->mtu;
340 }
341
939b82e5
MC		 342 while (retry < 3) {
343 rc = 0;
344 rcu_read_lock();
345 ulp_ops = rcu_dereference(cnic_ulp_tbl[CNIC_ULP_ISCSI]);
346 if (ulp_ops)
347 rc = ulp_ops->iscsi_nl_send_msg(
348 cp->ulp_handle[CNIC_ULP_ISCSI],
349 msg_type, buf, len);
350 rcu_read_unlock();
351 if (rc == 0 || msg_type != ISCSI_KEVENT_PATH_REQ)
352 break;
353
354 msleep(100);
355 retry++;
356 }
558e4c75 357 return rc;
a4636960
MC		 358}
359
42ecbb84
EW		 360static void cnic_cm_upcall(struct cnic_local *, struct cnic_sock *, u8);
361
a4636960
MC		 362static int cnic_iscsi_nl_msg_recv(struct cnic_dev *dev, u32 msg_type,
363 char *buf, u16 len)
364{
365 int rc = -EINVAL;
366
367 switch (msg_type) {
368 case ISCSI_UEVENT_PATH_UPDATE: {
369 struct cnic_local *cp;
370 u32 l5_cid;
371 struct cnic_sock *csk;
372 struct iscsi_path *path_resp;
373
374 if (len < sizeof(*path_resp))
375 break;
376
377 path_resp = (struct iscsi_path *) buf;
378 cp = dev->cnic_priv;
379 l5_cid = (u32) path_resp->handle;
380 if (l5_cid >= MAX_CM_SK_TBL_SZ)
381 break;
382
d02a5e6c
MC		 383 rcu_read_lock();
384 if (!rcu_dereference(cp->ulp_ops[CNIC_ULP_L4])) {
385 rc = -ENODEV;
386 rcu_read_unlock();
387 break;
388 }
a4636960
MC		 389 csk = &cp->csk_tbl[l5_cid];
390 csk_hold(csk);
42ecbb84
EW		 391 if (cnic_in_use(csk) &&
392 test_bit(SK_F_CONNECT_START, &csk->flags)) {
393
4cbbb04d
EW		 394 csk->vlan_id = path_resp->vlan_id;
395
a4636960
MC		 396 memcpy(csk->ha, path_resp->mac_addr, 6);
397 if (test_bit(SK_F_IPV6, &csk->flags))
398 memcpy(&csk->src_ip[0], &path_resp->src.v6_addr,
399 sizeof(struct in6_addr));
400 else
401 memcpy(&csk->src_ip[0], &path_resp->src.v4_addr,
402 sizeof(struct in_addr));
42ecbb84
EW		 403
404 if (is_valid_ether_addr(csk->ha)) {
a4636960 405 cnic_cm_set_pg(csk);
42ecbb84
EW		 406 } else if (!test_bit(SK_F_OFFLD_SCHED, &csk->flags) &&
407 !test_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
408
409 cnic_cm_upcall(cp, csk,
410 L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE);
411 clear_bit(SK_F_CONNECT_START, &csk->flags);
412 }
a4636960
MC		 413 }
414 csk_put(csk);
d02a5e6c 415 rcu_read_unlock();
a4636960
MC		 416 rc = 0;
417 }
418 }
419
420 return rc;
421}
422
423static int cnic_offld_prep(struct cnic_sock *csk)
424{
425 if (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
426 return 0;
427
428 if (!test_bit(SK_F_CONNECT_START, &csk->flags)) {
429 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
430 return 0;
431 }
432
433 return 1;
434}
435
436static int cnic_close_prep(struct cnic_sock *csk)
437{
438 clear_bit(SK_F_CONNECT_START, &csk->flags);
439 smp_mb__after_clear_bit();
440
441 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
442 while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
443 msleep(1);
444
445 return 1;
446 }
447 return 0;
448}
449
450static int cnic_abort_prep(struct cnic_sock *csk)
451{
452 clear_bit(SK_F_CONNECT_START, &csk->flags);
453 smp_mb__after_clear_bit();
454
455 while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
456 msleep(1);
457
458 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
459 csk->state = L4_KCQE_OPCODE_VALUE_RESET_COMP;
460 return 1;
461 }
462
463 return 0;
464}
465
466int cnic_register_driver(int ulp_type, struct cnic_ulp_ops *ulp_ops)
467{
468 struct cnic_dev *dev;
469
0d37f36f 470 if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
ddf79b20 471 pr_err("%s: Bad type %d\n", __func__, ulp_type);
a4636960
MC		 472 return -EINVAL;
473 }
474 mutex_lock(&cnic_lock);
13707f9e 475 if (cnic_ulp_tbl_prot(ulp_type)) {
ddf79b20
JP		 476 pr_err("%s: Type %d has already been registered\n",
477 __func__, ulp_type);
a4636960
MC		 478 mutex_unlock(&cnic_lock);
479 return -EBUSY;
480 }
481
482 read_lock(&cnic_dev_lock);
483 list_for_each_entry(dev, &cnic_dev_list, list) {
484 struct cnic_local *cp = dev->cnic_priv;
485
486 clear_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]);
487 }
488 read_unlock(&cnic_dev_lock);
489
7fc1ece4 490 atomic_set(&ulp_ops->ref_count, 0);
a4636960
MC		 491 rcu_assign_pointer(cnic_ulp_tbl[ulp_type], ulp_ops);
492 mutex_unlock(&cnic_lock);
493
494 /* Prevent race conditions with netdev_event */
495 rtnl_lock();
a4636960
MC		 496 list_for_each_entry(dev, &cnic_dev_list, list) {
497 struct cnic_local *cp = dev->cnic_priv;
498
499 if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]))
500 ulp_ops->cnic_init(dev);
501 }
a4636960
MC		 502 rtnl_unlock();
503
504 return 0;
505}
506
507int cnic_unregister_driver(int ulp_type)
508{
509 struct cnic_dev *dev;
7fc1ece4
MC		 510 struct cnic_ulp_ops *ulp_ops;
511 int i = 0;
a4636960 512
0d37f36f 513 if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
ddf79b20 514 pr_err("%s: Bad type %d\n", __func__, ulp_type);
a4636960
MC		 515 return -EINVAL;
516 }
517 mutex_lock(&cnic_lock);
13707f9e 518 ulp_ops = cnic_ulp_tbl_prot(ulp_type);
7fc1ece4 519 if (!ulp_ops) {
ddf79b20
JP		 520 pr_err("%s: Type %d has not been registered\n",
521 __func__, ulp_type);
a4636960
MC		 522 goto out_unlock;
523 }
524 read_lock(&cnic_dev_lock);
525 list_for_each_entry(dev, &cnic_dev_list, list) {
526 struct cnic_local *cp = dev->cnic_priv;
527
528 if (rcu_dereference(cp->ulp_ops[ulp_type])) {
ddf79b20
JP		 529 pr_err("%s: Type %d still has devices registered\n",
530 __func__, ulp_type);
a4636960
MC		 531 read_unlock(&cnic_dev_lock);
532 goto out_unlock;
533 }
534 }
535 read_unlock(&cnic_dev_lock);
536
2cfa5a04 537 RCU_INIT_POINTER(cnic_ulp_tbl[ulp_type], NULL);
a4636960
MC		 538
539 mutex_unlock(&cnic_lock);
540 synchronize_rcu();
7fc1ece4
MC		 541 while ((atomic_read(&ulp_ops->ref_count) != 0) && (i < 20)) {
542 msleep(100);
543 i++;
544 }
545
546 if (atomic_read(&ulp_ops->ref_count) != 0)
022f0978
JL		 547 pr_warn("%s: Failed waiting for ref count to go to zero\n",
548 __func__);
a4636960
MC		 549 return 0;
550
551out_unlock:
552 mutex_unlock(&cnic_lock);
553 return -EINVAL;
554}
555
556static int cnic_start_hw(struct cnic_dev *);
557static void cnic_stop_hw(struct cnic_dev *);
558
559static int cnic_register_device(struct cnic_dev *dev, int ulp_type,
560 void *ulp_ctx)
561{
562 struct cnic_local *cp = dev->cnic_priv;
563 struct cnic_ulp_ops *ulp_ops;
564
0d37f36f 565 if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
ddf79b20 566 pr_err("%s: Bad type %d\n", __func__, ulp_type);
a4636960
MC		 567 return -EINVAL;
568 }
569 mutex_lock(&cnic_lock);
13707f9e 570 if (cnic_ulp_tbl_prot(ulp_type) == NULL) {
ddf79b20
JP		 571 pr_err("%s: Driver with type %d has not been registered\n",
572 __func__, ulp_type);
a4636960
MC		 573 mutex_unlock(&cnic_lock);
574 return -EAGAIN;
575 }
576 if (rcu_dereference(cp->ulp_ops[ulp_type])) {
ddf79b20
JP		 577 pr_err("%s: Type %d has already been registered to this device\n",
578 __func__, ulp_type);
a4636960
MC		 579 mutex_unlock(&cnic_lock);
580 return -EBUSY;
581 }
582
583 clear_bit(ULP_F_START, &cp->ulp_flags[ulp_type]);
584 cp->ulp_handle[ulp_type] = ulp_ctx;
13707f9e 585 ulp_ops = cnic_ulp_tbl_prot(ulp_type);
a4636960
MC		 586 rcu_assign_pointer(cp->ulp_ops[ulp_type], ulp_ops);
587 cnic_hold(dev);
588
589 if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
590 if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[ulp_type]))
591 ulp_ops->cnic_start(cp->ulp_handle[ulp_type]);
592
593 mutex_unlock(&cnic_lock);
594
1d187b34
BW		 595 cnic_ulp_ctl(dev, ulp_type, true);
596
a4636960
MC		 597 return 0;
598
599}
600EXPORT_SYMBOL(cnic_register_driver);
601
602static int cnic_unregister_device(struct cnic_dev *dev, int ulp_type)
603{
604 struct cnic_local *cp = dev->cnic_priv;
681dbd71 605 int i = 0;
a4636960 606
0d37f36f 607 if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
ddf79b20 608 pr_err("%s: Bad type %d\n", __func__, ulp_type);
a4636960
MC		 609 return -EINVAL;
610 }
611 mutex_lock(&cnic_lock);
612 if (rcu_dereference(cp->ulp_ops[ulp_type])) {
2cfa5a04 613 RCU_INIT_POINTER(cp->ulp_ops[ulp_type], NULL);
a4636960
MC		 614 cnic_put(dev);
615 } else {
ddf79b20
JP		 616 pr_err("%s: device not registered to this ulp type %d\n",
617 __func__, ulp_type);
a4636960
MC		 618 mutex_unlock(&cnic_lock);
619 return -EINVAL;
620 }
621 mutex_unlock(&cnic_lock);
622
42bb8d56
MC		 623 if (ulp_type == CNIC_ULP_ISCSI)
624 cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
2e499d3c
BW		 625 else if (ulp_type == CNIC_ULP_FCOE)
626 dev->fcoe_cap = NULL;
42bb8d56 627
a4636960
MC		 628 synchronize_rcu();
629
681dbd71
MC		 630 while (test_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[ulp_type]) &&
631 i < 20) {
632 msleep(100);
633 i++;
634 }
635 if (test_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[ulp_type]))
ddf79b20 636 netdev_warn(dev->netdev, "Failed waiting for ULP up call to complete\n");
681dbd71 637
1d187b34
BW		 638 cnic_ulp_ctl(dev, ulp_type, false);
639
a4636960
MC		 640 return 0;
641}
642EXPORT_SYMBOL(cnic_unregister_driver);
643
11f23aa8
EW		 644static int cnic_init_id_tbl(struct cnic_id_tbl *id_tbl, u32 size, u32 start_id,
645 u32 next)
a4636960
MC		 646{
647 id_tbl->start = start_id;
648 id_tbl->max = size;
11f23aa8 649 id_tbl->next = next;
a4636960
MC		 650 spin_lock_init(&id_tbl->lock);
651 id_tbl->table = kzalloc(DIV_ROUND_UP(size, 32) * 4, GFP_KERNEL);
652 if (!id_tbl->table)
653 return -ENOMEM;
654
655 return 0;
656}
657
658static void cnic_free_id_tbl(struct cnic_id_tbl *id_tbl)
659{
660 kfree(id_tbl->table);
661 id_tbl->table = NULL;
662}
663
664static int cnic_alloc_id(struct cnic_id_tbl *id_tbl, u32 id)
665{
666 int ret = -1;
667
668 id -= id_tbl->start;
669 if (id >= id_tbl->max)
670 return ret;
671
672 spin_lock(&id_tbl->lock);
673 if (!test_bit(id, id_tbl->table)) {
674 set_bit(id, id_tbl->table);
675 ret = 0;
676 }
677 spin_unlock(&id_tbl->lock);
678 return ret;
679}
680
681/* Returns -1 if not successful */
682static u32 cnic_alloc_new_id(struct cnic_id_tbl *id_tbl)
683{
684 u32 id;
685
686 spin_lock(&id_tbl->lock);
687 id = find_next_zero_bit(id_tbl->table, id_tbl->max, id_tbl->next);
688 if (id >= id_tbl->max) {
689 id = -1;
690 if (id_tbl->next != 0) {
691 id = find_first_zero_bit(id_tbl->table, id_tbl->next);
692 if (id >= id_tbl->next)
693 id = -1;
694 }
695 }
696
697 if (id < id_tbl->max) {
698 set_bit(id, id_tbl->table);
699 id_tbl->next = (id + 1) & (id_tbl->max - 1);
700 id += id_tbl->start;
701 }
702
703 spin_unlock(&id_tbl->lock);
704
705 return id;
706}
707
708static void cnic_free_id(struct cnic_id_tbl *id_tbl, u32 id)
709{
710 if (id == -1)
711 return;
712
713 id -= id_tbl->start;
714 if (id >= id_tbl->max)
715 return;
716
717 clear_bit(id, id_tbl->table);
718}
719
720static void cnic_free_dma(struct cnic_dev *dev, struct cnic_dma *dma)
721{
722 int i;
723
724 if (!dma->pg_arr)
725 return;
726
727 for (i = 0; i < dma->num_pages; i++) {
728 if (dma->pg_arr[i]) {
2bc4078e 729 dma_free_coherent(&dev->pcidev->dev, BNX2_PAGE_SIZE,
3248e168 730 dma->pg_arr[i], dma->pg_map_arr[i]);
a4636960
MC		 731 dma->pg_arr[i] = NULL;
732 }
733 }
734 if (dma->pgtbl) {
3248e168
MC		 735 dma_free_coherent(&dev->pcidev->dev, dma->pgtbl_size,
736 dma->pgtbl, dma->pgtbl_map);
a4636960
MC		 737 dma->pgtbl = NULL;
738 }
739 kfree(dma->pg_arr);
740 dma->pg_arr = NULL;
741 dma->num_pages = 0;
742}
743
744static void cnic_setup_page_tbl(struct cnic_dev *dev, struct cnic_dma *dma)
745{
746 int i;
5138826b 747 __le32 *page_table = (__le32 *) dma->pgtbl;
a4636960
MC		 748
749 for (i = 0; i < dma->num_pages; i++) {
750 /* Each entry needs to be in big endian format. */
5138826b 751 *page_table = cpu_to_le32((u64) dma->pg_map_arr[i] >> 32);
a4636960 752 page_table++;
5138826b 753 *page_table = cpu_to_le32(dma->pg_map_arr[i] & 0xffffffff);
a4636960
MC		 754 page_table++;
755 }
756}
757
71034ba8
MC		 758static void cnic_setup_page_tbl_le(struct cnic_dev *dev, struct cnic_dma *dma)
759{
760 int i;
5138826b 761 __le32 *page_table = (__le32 *) dma->pgtbl;
71034ba8
MC		 762
763 for (i = 0; i < dma->num_pages; i++) {
764 /* Each entry needs to be in little endian format. */
5138826b 765 *page_table = cpu_to_le32(dma->pg_map_arr[i] & 0xffffffff);
71034ba8 766 page_table++;
5138826b 767 *page_table = cpu_to_le32((u64) dma->pg_map_arr[i] >> 32);
71034ba8
MC		 768 page_table++;
769 }
770}
771
a4636960
MC		 772static int cnic_alloc_dma(struct cnic_dev *dev, struct cnic_dma *dma,
773 int pages, int use_pg_tbl)
774{
775 int i, size;
776 struct cnic_local *cp = dev->cnic_priv;
777
778 size = pages * (sizeof(void *) + sizeof(dma_addr_t));
779 dma->pg_arr = kzalloc(size, GFP_ATOMIC);
780 if (dma->pg_arr == NULL)
781 return -ENOMEM;
782
783 dma->pg_map_arr = (dma_addr_t *) (dma->pg_arr + pages);
784 dma->num_pages = pages;
785
786 for (i = 0; i < pages; i++) {
3248e168 787 dma->pg_arr[i] = dma_alloc_coherent(&dev->pcidev->dev,
2bc4078e 788 BNX2_PAGE_SIZE,
3248e168
MC		 789 &dma->pg_map_arr[i],
790 GFP_ATOMIC);
a4636960
MC		 791 if (dma->pg_arr[i] == NULL)
792 goto error;
793 }
794 if (!use_pg_tbl)
795 return 0;
796
2bc4078e
MC		 797 dma->pgtbl_size = ((pages * 8) + BNX2_PAGE_SIZE - 1) &
798 ~(BNX2_PAGE_SIZE - 1);
3248e168
MC		 799 dma->pgtbl = dma_alloc_coherent(&dev->pcidev->dev, dma->pgtbl_size,
800 &dma->pgtbl_map, GFP_ATOMIC);
a4636960
MC		 801 if (dma->pgtbl == NULL)
802 goto error;
803
804 cp->setup_pgtbl(dev, dma);
805
806 return 0;
807
808error:
809 cnic_free_dma(dev, dma);
810 return -ENOMEM;
811}
812
86b53606
MC		 813static void cnic_free_context(struct cnic_dev *dev)
814{
815 struct cnic_local *cp = dev->cnic_priv;
816 int i;
817
818 for (i = 0; i < cp->ctx_blks; i++) {
819 if (cp->ctx_arr[i].ctx) {
3248e168
MC		 820 dma_free_coherent(&dev->pcidev->dev, cp->ctx_blk_size,
821 cp->ctx_arr[i].ctx,
822 cp->ctx_arr[i].mapping);
86b53606
MC		 823 cp->ctx_arr[i].ctx = NULL;
824 }
825 }
826}
827
74dd0c42 828static void __cnic_free_uio_rings(struct cnic_uio_dev *udev)
a4636960 829{
cd801536
MC		 830 if (udev->l2_buf) {
831 dma_free_coherent(&udev->pdev->dev, udev->l2_buf_size,
832 udev->l2_buf, udev->l2_buf_map);
833 udev->l2_buf = NULL;
a4636960
MC		 834 }
835
cd801536
MC		 836 if (udev->l2_ring) {
837 dma_free_coherent(&udev->pdev->dev, udev->l2_ring_size,
838 udev->l2_ring, udev->l2_ring_map);
839 udev->l2_ring = NULL;
a4636960 840 }
a3ceeeb8 841
74dd0c42
MC		 842}
843
844static void __cnic_free_uio(struct cnic_uio_dev *udev)
845{
846 uio_unregister_device(&udev->cnic_uinfo);
847
848 __cnic_free_uio_rings(udev);
849
a3ceeeb8
MC		 850 pci_dev_put(udev->pdev);
851 kfree(udev);
c06c0462
MC		 852}
853
cd801536 854static void cnic_free_uio(struct cnic_uio_dev *udev)
c06c0462 855{
cd801536 856 if (!udev)
c06c0462
MC		 857 return;
858
a3ceeeb8
MC		 859 write_lock(&cnic_dev_lock);
860 list_del_init(&udev->list);
861 write_unlock(&cnic_dev_lock);
cd801536 862 __cnic_free_uio(udev);
c06c0462
MC		 863}
864
865static void cnic_free_resc(struct cnic_dev *dev)
866{
867 struct cnic_local *cp = dev->cnic_priv;
cd801536 868 struct cnic_uio_dev *udev = cp->udev;
c06c0462 869
cd801536 870 if (udev) {
a3ceeeb8 871 udev->dev = NULL;
cd801536 872 cp->udev = NULL;
f81b0ac4
MC		 873 if (udev->uio_dev == -1)
874 __cnic_free_uio_rings(udev);
c06c0462 875 }
a4636960 876
86b53606 877 cnic_free_context(dev);
a4636960
MC		 878 kfree(cp->ctx_arr);
879 cp->ctx_arr = NULL;
880 cp->ctx_blks = 0;
881
882 cnic_free_dma(dev, &cp->gbl_buf_info);
a4636960 883 cnic_free_dma(dev, &cp->kwq_info);
71034ba8 884 cnic_free_dma(dev, &cp->kwq_16_data_info);
e21ba414 885 cnic_free_dma(dev, &cp->kcq2.dma);
e6c28894 886 cnic_free_dma(dev, &cp->kcq1.dma);
a4636960
MC		 887 kfree(cp->iscsi_tbl);
888 cp->iscsi_tbl = NULL;
889 kfree(cp->ctx_tbl);
890 cp->ctx_tbl = NULL;
891
e1928c86 892 cnic_free_id_tbl(&cp->fcoe_cid_tbl);
a4636960
MC		 893 cnic_free_id_tbl(&cp->cid_tbl);
894}
895
896static int cnic_alloc_context(struct cnic_dev *dev)
897{
898 struct cnic_local *cp = dev->cnic_priv;
899
4ce45e02 900 if (BNX2_CHIP(cp) == BNX2_CHIP_5709) {
a4636960
MC		 901 int i, k, arr_size;
902
2bc4078e
MC		 903 cp->ctx_blk_size = BNX2_PAGE_SIZE;
904 cp->cids_per_blk = BNX2_PAGE_SIZE / 128;
a4636960
MC		 905 arr_size = BNX2_MAX_CID / cp->cids_per_blk *
906 sizeof(struct cnic_ctx);
907 cp->ctx_arr = kzalloc(arr_size, GFP_KERNEL);
908 if (cp->ctx_arr == NULL)
909 return -ENOMEM;
910
911 k = 0;
912 for (i = 0; i < 2; i++) {
913 u32 j, reg, off, lo, hi;
914
915 if (i == 0)
916 off = BNX2_PG_CTX_MAP;
917 else
918 off = BNX2_ISCSI_CTX_MAP;
919
920 reg = cnic_reg_rd_ind(dev, off);
921 lo = reg >> 16;
922 hi = reg & 0xffff;
923 for (j = lo; j < hi; j += cp->cids_per_blk, k++)
924 cp->ctx_arr[k].cid = j;
925 }
926
927 cp->ctx_blks = k;
928 if (cp->ctx_blks >= (BNX2_MAX_CID / cp->cids_per_blk)) {
929 cp->ctx_blks = 0;
930 return -ENOMEM;
931 }
932
933 for (i = 0; i < cp->ctx_blks; i++) {
934 cp->ctx_arr[i].ctx =
3248e168 935 dma_alloc_coherent(&dev->pcidev->dev,
2bc4078e 936 BNX2_PAGE_SIZE,
3248e168
MC		 937 &cp->ctx_arr[i].mapping,
938 GFP_KERNEL);
a4636960
MC		 939 if (cp->ctx_arr[i].ctx == NULL)
940 return -ENOMEM;
941 }
942 }
943 return 0;
944}
945
59e51373
MC		 946static u16 cnic_bnx2_next_idx(u16 idx)
947{
948 return idx + 1;
949}
950
951static u16 cnic_bnx2_hw_idx(u16 idx)
952{
953 return idx;
954}
955
956static u16 cnic_bnx2x_next_idx(u16 idx)
e6c28894 957{
59e51373
MC		 958 idx++;
959 if ((idx & MAX_KCQE_CNT) == MAX_KCQE_CNT)
960 idx++;
961
962 return idx;
963}
964
965static u16 cnic_bnx2x_hw_idx(u16 idx)
966{
967 if ((idx & MAX_KCQE_CNT) == MAX_KCQE_CNT)
968 idx++;
969 return idx;
970}
971
972static int cnic_alloc_kcq(struct cnic_dev *dev, struct kcq_info *info,
973 bool use_pg_tbl)
974{
975 int err, i, use_page_tbl = 0;
e6c28894
MC		 976 struct kcqe **kcq;
977
59e51373
MC		 978 if (use_pg_tbl)
979 use_page_tbl = 1;
e6c28894 980
59e51373 981 err = cnic_alloc_dma(dev, &info->dma, KCQ_PAGE_CNT, use_page_tbl);
e6c28894
MC		 982 if (err)
983 return err;
984
985 kcq = (struct kcqe **) info->dma.pg_arr;
986 info->kcq = kcq;
987
59e51373
MC		 988 info->next_idx = cnic_bnx2_next_idx;
989 info->hw_idx = cnic_bnx2_hw_idx;
990 if (use_pg_tbl)
e6c28894
MC		 991 return 0;
992
59e51373
MC		 993 info->next_idx = cnic_bnx2x_next_idx;
994 info->hw_idx = cnic_bnx2x_hw_idx;
995
e6c28894
MC		 996 for (i = 0; i < KCQ_PAGE_CNT; i++) {
997 struct bnx2x_bd_chain_next *next =
998 (struct bnx2x_bd_chain_next *) &kcq[i][MAX_KCQE_CNT];
999 int j = i + 1;
1000
1001 if (j >= KCQ_PAGE_CNT)
1002 j = 0;
1003 next->addr_hi = (u64) info->dma.pg_map_arr[j] >> 32;
1004 next->addr_lo = info->dma.pg_map_arr[j] & 0xffffffff;
1005 }
1006 return 0;
1007}
1008
74dd0c42
MC		 1009static int __cnic_alloc_uio_rings(struct cnic_uio_dev *udev, int pages)
1010{
1011 struct cnic_local *cp = udev->dev->cnic_priv;
1012
1013 if (udev->l2_ring)
1014 return 0;
1015
2bc4078e 1016 udev->l2_ring_size = pages * BNX2_PAGE_SIZE;
74dd0c42
MC		 1017 udev->l2_ring = dma_alloc_coherent(&udev->pdev->dev, udev->l2_ring_size,
1018 &udev->l2_ring_map,
1019 GFP_KERNEL | __GFP_COMP);
1020 if (!udev->l2_ring)
1021 return -ENOMEM;
1022
1023 udev->l2_buf_size = (cp->l2_rx_ring_size + 1) * cp->l2_single_buf_size;
1024 udev->l2_buf_size = PAGE_ALIGN(udev->l2_buf_size);
1025 udev->l2_buf = dma_alloc_coherent(&udev->pdev->dev, udev->l2_buf_size,
1026 &udev->l2_buf_map,
1027 GFP_KERNEL | __GFP_COMP);
1028 if (!udev->l2_buf) {
1029 __cnic_free_uio_rings(udev);
1030 return -ENOMEM;
1031 }
1032
1033 return 0;
1034
1035}
1036
cd801536 1037static int cnic_alloc_uio_rings(struct cnic_dev *dev, int pages)
ec0248ea
MC		 1038{
1039 struct cnic_local *cp = dev->cnic_priv;
cd801536
MC		 1040 struct cnic_uio_dev *udev;
1041
a3ceeeb8
MC		 1042 read_lock(&cnic_dev_lock);
1043 list_for_each_entry(udev, &cnic_udev_list, list) {
1044 if (udev->pdev == dev->pcidev) {
1045 udev->dev = dev;
f81b0ac4
MC		 1046 if (__cnic_alloc_uio_rings(udev, pages)) {
1047 udev->dev = NULL;
1048 read_unlock(&cnic_dev_lock);
1049 return -ENOMEM;
1050 }
a3ceeeb8
MC		 1051 cp->udev = udev;
1052 read_unlock(&cnic_dev_lock);
1053 return 0;
1054 }
1055 }
1056 read_unlock(&cnic_dev_lock);
1057
cd801536
MC		 1058 udev = kzalloc(sizeof(struct cnic_uio_dev), GFP_ATOMIC);
1059 if (!udev)
1060 return -ENOMEM;
1061
1062 udev->uio_dev = -1;
ec0248ea 1063
cd801536
MC		 1064 udev->dev = dev;
1065 udev->pdev = dev->pcidev;
ec0248ea 1066
74dd0c42
MC		 1067 if (__cnic_alloc_uio_rings(udev, pages))
1068 goto err_udev;
ec0248ea 1069
a3ceeeb8
MC		 1070 write_lock(&cnic_dev_lock);
1071 list_add(&udev->list, &cnic_udev_list);
1072 write_unlock(&cnic_dev_lock);
1073
1074 pci_dev_get(udev->pdev);
1075
cd801536
MC		 1076 cp->udev = udev;
1077
ec0248ea 1078 return 0;
74dd0c42 1079
f7e4c977
JJ		 1080 err_udev:
1081 kfree(udev);
1082 return -ENOMEM;
ec0248ea
MC		 1083}
1084
cd801536
MC		 1085static int cnic_init_uio(struct cnic_dev *dev)
1086{
a4636960 1087 struct cnic_local *cp = dev->cnic_priv;
cd801536 1088 struct cnic_uio_dev *udev = cp->udev;
a4636960 1089 struct uio_info *uinfo;
cd801536 1090 int ret = 0;
a4636960 1091
cd801536 1092 if (!udev)
5e9b2dbf 1093 return -ENOMEM;
a4636960 1094
cd801536
MC		 1095 uinfo = &udev->cnic_uinfo;
1096
ae0eef66
MC		 1097 uinfo->mem[0].addr = pci_resource_start(dev->pcidev, 0);
1098 uinfo->mem[0].internal_addr = dev->regview;
1099 uinfo->mem[0].memtype = UIO_MEM_PHYS;
a4636960 1100
5e9b2dbf 1101 if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
ae0eef66
MC		 1102 uinfo->mem[0].size = MB_GET_CID_ADDR(TX_TSS_CID +
1103 TX_MAX_TSS_RINGS + 1);
a4dde3ab 1104 uinfo->mem[1].addr = (unsigned long) cp->status_blk.gen &
cd801536 1105 PAGE_MASK;
5e9b2dbf
MC		 1106 if (cp->ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX)
1107 uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE * 9;
1108 else
1109 uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE;
1110
1111 uinfo->name = "bnx2_cnic";
71034ba8 1112 } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
ae0eef66
MC		 1113 uinfo->mem[0].size = pci_resource_len(dev->pcidev, 0);
1114
71034ba8
MC		 1115 uinfo->mem[1].addr = (unsigned long) cp->bnx2x_def_status_blk &
1116 PAGE_MASK;
523224a3 1117 uinfo->mem[1].size = sizeof(*cp->bnx2x_def_status_blk);
71034ba8
MC		 1118
1119 uinfo->name = "bnx2x_cnic";
5e9b2dbf
MC		 1120 }
1121
a4636960
MC		 1122 uinfo->mem[1].memtype = UIO_MEM_LOGICAL;
1123
cd801536
MC		 1124 uinfo->mem[2].addr = (unsigned long) udev->l2_ring;
1125 uinfo->mem[2].size = udev->l2_ring_size;
a4636960
MC		 1126 uinfo->mem[2].memtype = UIO_MEM_LOGICAL;
1127
cd801536
MC		 1128 uinfo->mem[3].addr = (unsigned long) udev->l2_buf;
1129 uinfo->mem[3].size = udev->l2_buf_size;
a4636960
MC		 1130 uinfo->mem[3].memtype = UIO_MEM_LOGICAL;
1131
a4636960
MC		 1132 uinfo->version = CNIC_MODULE_VERSION;
1133 uinfo->irq = UIO_IRQ_CUSTOM;
1134
1135 uinfo->open = cnic_uio_open;
1136 uinfo->release = cnic_uio_close;
1137
a3ceeeb8
MC		 1138 if (udev->uio_dev == -1) {
1139 if (!uinfo->priv) {
1140 uinfo->priv = udev;
a4636960 1141
a3ceeeb8
MC		 1142 ret = uio_register_device(&udev->pdev->dev, uinfo);
1143 }
1144 } else {
1145 cnic_init_rings(dev);
1146 }
a4636960 1147
cd801536 1148 return ret;
5e9b2dbf
MC		 1149}
1150
1151static int cnic_alloc_bnx2_resc(struct cnic_dev *dev)
1152{
1153 struct cnic_local *cp = dev->cnic_priv;
1154 int ret;
1155
1156 ret = cnic_alloc_dma(dev, &cp->kwq_info, KWQ_PAGE_CNT, 1);
1157 if (ret)
1158 goto error;
1159 cp->kwq = (struct kwqe **) cp->kwq_info.pg_arr;
1160
59e51373 1161 ret = cnic_alloc_kcq(dev, &cp->kcq1, true);
5e9b2dbf
MC		 1162 if (ret)
1163 goto error;
5e9b2dbf
MC		 1164
1165 ret = cnic_alloc_context(dev);
1166 if (ret)
1167 goto error;
1168
cd801536 1169 ret = cnic_alloc_uio_rings(dev, 2);
5e9b2dbf
MC		 1170 if (ret)
1171 goto error;
1172
cd801536 1173 ret = cnic_init_uio(dev);
5e9b2dbf
MC		 1174 if (ret)
1175 goto error;
a4636960
MC		 1176
1177 return 0;
1178
1179error:
1180 cnic_free_resc(dev);
1181 return ret;
1182}
1183
71034ba8
MC		 1184static int cnic_alloc_bnx2x_context(struct cnic_dev *dev)
1185{
1186 struct cnic_local *cp = dev->cnic_priv;
104a43ed 1187 struct bnx2x *bp = netdev_priv(dev->netdev);
71034ba8 1188 int ctx_blk_size = cp->ethdev->ctx_blk_size;
520efdf4 1189 int total_mem, blks, i;
71034ba8 1190
520efdf4 1191 total_mem = BNX2X_CONTEXT_MEM_SIZE * cp->max_cid_space;
71034ba8
MC		 1192 blks = total_mem / ctx_blk_size;
1193 if (total_mem % ctx_blk_size)
1194 blks++;
1195
1196 if (blks > cp->ethdev->ctx_tbl_len)
1197 return -ENOMEM;
1198
baeb2ffa 1199 cp->ctx_arr = kcalloc(blks, sizeof(struct cnic_ctx), GFP_KERNEL);
71034ba8
MC		 1200 if (cp->ctx_arr == NULL)
1201 return -ENOMEM;
1202
1203 cp->ctx_blks = blks;
1204 cp->ctx_blk_size = ctx_blk_size;
104a43ed 1205 if (!CHIP_IS_E1(bp))
71034ba8
MC		 1206 cp->ctx_align = 0;
1207 else
1208 cp->ctx_align = ctx_blk_size;
1209
1210 cp->cids_per_blk = ctx_blk_size / BNX2X_CONTEXT_MEM_SIZE;
1211
1212 for (i = 0; i < blks; i++) {
1213 cp->ctx_arr[i].ctx =
3248e168
MC		 1214 dma_alloc_coherent(&dev->pcidev->dev, cp->ctx_blk_size,
1215 &cp->ctx_arr[i].mapping,
1216 GFP_KERNEL);
71034ba8
MC		 1217 if (cp->ctx_arr[i].ctx == NULL)
1218 return -ENOMEM;
1219
1220 if (cp->ctx_align && cp->ctx_blk_size == ctx_blk_size) {
1221 if (cp->ctx_arr[i].mapping & (cp->ctx_align - 1)) {
1222 cnic_free_context(dev);
1223 cp->ctx_blk_size += cp->ctx_align;
1224 i = -1;
1225 continue;
1226 }
1227 }
1228 }
1229 return 0;
1230}
1231
1232static int cnic_alloc_bnx2x_resc(struct cnic_dev *dev)
1233{
1234 struct cnic_local *cp = dev->cnic_priv;
104a43ed 1235 struct bnx2x *bp = netdev_priv(dev->netdev);
520efdf4
MC		 1236 struct cnic_eth_dev *ethdev = cp->ethdev;
1237 u32 start_cid = ethdev->starting_cid;
71034ba8
MC		 1238 int i, j, n, ret, pages;
1239 struct cnic_dma *kwq_16_dma = &cp->kwq_16_data_info;
1240
b37a41e3 1241 cp->max_cid_space = MAX_ISCSI_TBL_SZ;
520efdf4 1242 cp->iscsi_start_cid = start_cid;
e1928c86
MC		 1243 cp->fcoe_start_cid = start_cid + MAX_ISCSI_TBL_SZ;
1244
104a43ed 1245 if (BNX2X_CHIP_IS_E2_PLUS(bp)) {
dc219a2e 1246 cp->max_cid_space += dev->max_fcoe_conn;
e1928c86
MC		 1247 cp->fcoe_init_cid = ethdev->fcoe_init_cid;
1248 if (!cp->fcoe_init_cid)
1249 cp->fcoe_init_cid = 0x10;
1250 }
1251
71034ba8
MC		 1252 cp->iscsi_tbl = kzalloc(sizeof(struct cnic_iscsi) * MAX_ISCSI_TBL_SZ,
1253 GFP_KERNEL);
1254 if (!cp->iscsi_tbl)
1255 goto error;
1256
1257 cp->ctx_tbl = kzalloc(sizeof(struct cnic_context) *
520efdf4 1258 cp->max_cid_space, GFP_KERNEL);
71034ba8
MC		 1259 if (!cp->ctx_tbl)
1260 goto error;
1261
1262 for (i = 0; i < MAX_ISCSI_TBL_SZ; i++) {
1263 cp->ctx_tbl[i].proto.iscsi = &cp->iscsi_tbl[i];
1264 cp->ctx_tbl[i].ulp_proto_id = CNIC_ULP_ISCSI;
1265 }
1266
e1928c86
MC		 1267 for (i = MAX_ISCSI_TBL_SZ; i < cp->max_cid_space; i++)
1268 cp->ctx_tbl[i].ulp_proto_id = CNIC_ULP_FCOE;
1269
520efdf4 1270 pages = PAGE_ALIGN(cp->max_cid_space * CNIC_KWQ16_DATA_SIZE) /
71034ba8
MC		 1271 PAGE_SIZE;
1272
1273 ret = cnic_alloc_dma(dev, kwq_16_dma, pages, 0);
1274 if (ret)
1275 return -ENOMEM;
1276
1277 n = PAGE_SIZE / CNIC_KWQ16_DATA_SIZE;
520efdf4 1278 for (i = 0, j = 0; i < cp->max_cid_space; i++) {
71034ba8
MC		 1279 long off = CNIC_KWQ16_DATA_SIZE * (i % n);
1280
1281 cp->ctx_tbl[i].kwqe_data = kwq_16_dma->pg_arr[j] + off;
1282 cp->ctx_tbl[i].kwqe_data_mapping = kwq_16_dma->pg_map_arr[j] +
1283 off;
1284
1285 if ((i % n) == (n - 1))
1286 j++;
1287 }
1288
59e51373 1289 ret = cnic_alloc_kcq(dev, &cp->kcq1, false);
71034ba8
MC		 1290 if (ret)
1291 goto error;
71034ba8 1292
104a43ed 1293 if (CNIC_SUPPORTS_FCOE(bp)) {
619c5cb6 1294 ret = cnic_alloc_kcq(dev, &cp->kcq2, true);
e21ba414
MC		 1295 if (ret)
1296 goto error;
1297 }
1298
71034ba8
MC		 1299 pages = PAGE_ALIGN(BNX2X_ISCSI_GLB_BUF_SIZE) / PAGE_SIZE;
1300 ret = cnic_alloc_dma(dev, &cp->gbl_buf_info, pages, 0);
1301 if (ret)
1302 goto error;
1303
1304 ret = cnic_alloc_bnx2x_context(dev);
1305 if (ret)
1306 goto error;
1307
82346a7b
MC		 1308 if (cp->ethdev->drv_state & CNIC_DRV_STATE_NO_ISCSI)
1309 return 0;
1310
71034ba8
MC		 1311 cp->bnx2x_def_status_blk = cp->ethdev->irq_arr[1].status_blk;
1312
1313 cp->l2_rx_ring_size = 15;
1314
cd801536 1315 ret = cnic_alloc_uio_rings(dev, 4);
71034ba8
MC		 1316 if (ret)
1317 goto error;
1318
cd801536 1319 ret = cnic_init_uio(dev);
71034ba8
MC		 1320 if (ret)
1321 goto error;
1322
1323 return 0;
1324
1325error:
1326 cnic_free_resc(dev);
1327 return -ENOMEM;
1328}
1329
a4636960
MC		 1330static inline u32 cnic_kwq_avail(struct cnic_local *cp)
1331{
1332 return cp->max_kwq_idx -
1333 ((cp->kwq_prod_idx - cp->kwq_con_idx) & cp->max_kwq_idx);
1334}
1335
1336static int cnic_submit_bnx2_kwqes(struct cnic_dev *dev, struct kwqe *wqes[],
1337 u32 num_wqes)
1338{
1339 struct cnic_local *cp = dev->cnic_priv;
1340 struct kwqe *prod_qe;
1341 u16 prod, sw_prod, i;
1342
1343 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
1344 return -EAGAIN; /* bnx2 is down */
1345
1346 spin_lock_bh(&cp->cnic_ulp_lock);
1347 if (num_wqes > cnic_kwq_avail(cp) &&
1f1332a3 1348 !test_bit(CNIC_LCL_FL_KWQ_INIT, &cp->cnic_local_flags)) {
a4636960
MC		 1349 spin_unlock_bh(&cp->cnic_ulp_lock);
1350 return -EAGAIN;
1351 }
1352
1f1332a3 1353 clear_bit(CNIC_LCL_FL_KWQ_INIT, &cp->cnic_local_flags);
a4636960
MC		 1354
1355 prod = cp->kwq_prod_idx;
1356 sw_prod = prod & MAX_KWQ_IDX;
1357 for (i = 0; i < num_wqes; i++) {
1358 prod_qe = &cp->kwq[KWQ_PG(sw_prod)][KWQ_IDX(sw_prod)];
1359 memcpy(prod_qe, wqes[i], sizeof(struct kwqe));
1360 prod++;
1361 sw_prod = prod & MAX_KWQ_IDX;
1362 }
1363 cp->kwq_prod_idx = prod;
1364
1365 CNIC_WR16(dev, cp->kwq_io_addr, cp->kwq_prod_idx);
1366
1367 spin_unlock_bh(&cp->cnic_ulp_lock);
1368 return 0;
1369}
1370
71034ba8
MC		 1371static void *cnic_get_kwqe_16_data(struct cnic_local *cp, u32 l5_cid,
1372 union l5cm_specific_data *l5_data)
1373{
1374 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1375 dma_addr_t map;
1376
1377 map = ctx->kwqe_data_mapping;
1378 l5_data->phy_address.lo = (u64) map & 0xffffffff;
1379 l5_data->phy_address.hi = (u64) map >> 32;
1380 return ctx->kwqe_data;
1381}
1382
1383static int cnic_submit_kwqe_16(struct cnic_dev *dev, u32 cmd, u32 cid,
1384 u32 type, union l5cm_specific_data *l5_data)
1385{
1386 struct cnic_local *cp = dev->cnic_priv;
5e65789f 1387 struct bnx2x *bp = netdev_priv(dev->netdev);
71034ba8
MC		 1388 struct l5cm_spe kwqe;
1389 struct kwqe_16 *kwq[1];
68d7c1aa 1390 u16 type_16;
71034ba8
MC		 1391 int ret;
1392
1393 kwqe.hdr.conn_and_cmd_data =
1394 cpu_to_le32(((cmd << SPE_HDR_CMD_ID_SHIFT) |
5e65789f 1395 BNX2X_HW_CID(bp, cid)));
68d7c1aa
MC		 1396
1397 type_16 = (type << SPE_HDR_CONN_TYPE_SHIFT) & SPE_HDR_CONN_TYPE;
1398 type_16 |= (cp->pfid << SPE_HDR_FUNCTION_ID_SHIFT) &
1399 SPE_HDR_FUNCTION_ID;
1400
1401 kwqe.hdr.type = cpu_to_le16(type_16);
523224a3 1402 kwqe.hdr.reserved1 = 0;
71034ba8
MC		 1403 kwqe.data.phy_address.lo = cpu_to_le32(l5_data->phy_address.lo);
1404 kwqe.data.phy_address.hi = cpu_to_le32(l5_data->phy_address.hi);
1405
1406 kwq[0] = (struct kwqe_16 *) &kwqe;
1407
1408 spin_lock_bh(&cp->cnic_ulp_lock);
1409 ret = cp->ethdev->drv_submit_kwqes_16(dev->netdev, kwq, 1);
1410 spin_unlock_bh(&cp->cnic_ulp_lock);
1411
1412 if (ret == 1)
1413 return 0;
1414
23021c21 1415 return ret;
71034ba8
MC		 1416}
1417
1418static void cnic_reply_bnx2x_kcqes(struct cnic_dev *dev, int ulp_type,
1419 struct kcqe *cqes[], u32 num_cqes)
1420{
1421 struct cnic_local *cp = dev->cnic_priv;
1422 struct cnic_ulp_ops *ulp_ops;
1423
1424 rcu_read_lock();
1425 ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
1426 if (likely(ulp_ops)) {
1427 ulp_ops->indicate_kcqes(cp->ulp_handle[ulp_type],
1428 cqes, num_cqes);
1429 }
1430 rcu_read_unlock();
1431}
1432
b3bd2d65
EW		 1433static void cnic_bnx2x_set_tcp_options(struct cnic_dev *dev, int time_stamps,
1434 int en_tcp_dack)
1435{
1436 struct cnic_local *cp = dev->cnic_priv;
1437 struct bnx2x *bp = netdev_priv(dev->netdev);
1438 u8 xstorm_flags = XSTORM_L5CM_TCP_FLAGS_WND_SCL_EN;
1439 u16 tstorm_flags = 0;
1440
1441 if (time_stamps) {
1442 xstorm_flags |= XSTORM_L5CM_TCP_FLAGS_TS_ENABLED;
1443 tstorm_flags |= TSTORM_L5CM_TCP_FLAGS_TS_ENABLED;
1444 }
1445 if (en_tcp_dack)
1446 tstorm_flags |= TSTORM_L5CM_TCP_FLAGS_DELAYED_ACK_EN;
1447
1448 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1449 XSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(cp->pfid), xstorm_flags);
1450
1451 CNIC_WR16(dev, BAR_TSTRORM_INTMEM +
1452 TSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(cp->pfid), tstorm_flags);
1453}
1454
71034ba8
MC		 1455static int cnic_bnx2x_iscsi_init1(struct cnic_dev *dev, struct kwqe *kwqe)
1456{
1457 struct cnic_local *cp = dev->cnic_priv;
68c64d20 1458 struct bnx2x *bp = netdev_priv(dev->netdev);
71034ba8 1459 struct iscsi_kwqe_init1 *req1 = (struct iscsi_kwqe_init1 *) kwqe;
1420398d
MC		 1460 int hq_bds, pages;
1461 u32 pfid = cp->pfid;
71034ba8
MC		 1462
1463 cp->num_iscsi_tasks = req1->num_tasks_per_conn;
1464 cp->num_ccells = req1->num_ccells_per_conn;
1465 cp->task_array_size = BNX2X_ISCSI_TASK_CONTEXT_SIZE *
1466 cp->num_iscsi_tasks;
1467 cp->r2tq_size = cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS *
1468 BNX2X_ISCSI_R2TQE_SIZE;
1469 cp->hq_size = cp->num_ccells * BNX2X_ISCSI_HQ_BD_SIZE;
1470 pages = PAGE_ALIGN(cp->hq_size) / PAGE_SIZE;
1471 hq_bds = pages * (PAGE_SIZE / BNX2X_ISCSI_HQ_BD_SIZE);
1472 cp->num_cqs = req1->num_cqs;
1473
1474 if (!dev->max_iscsi_conn)
1475 return 0;
1476
1477 /* init Tstorm RAM */
1420398d 1478 CNIC_WR16(dev, BAR_TSTRORM_INTMEM + TSTORM_ISCSI_RQ_SIZE_OFFSET(pfid),
71034ba8 1479 req1->rq_num_wqes);
1420398d 1480 CNIC_WR16(dev, BAR_TSTRORM_INTMEM + TSTORM_ISCSI_PAGE_SIZE_OFFSET(pfid),
71034ba8
MC		 1481 PAGE_SIZE);
1482 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1420398d 1483 TSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid), PAGE_SHIFT);
71034ba8 1484 CNIC_WR16(dev, BAR_TSTRORM_INTMEM +
1420398d 1485 TSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid),
71034ba8
MC		 1486 req1->num_tasks_per_conn);
1487
1488 /* init Ustorm RAM */
1489 CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1420398d 1490 USTORM_ISCSI_RQ_BUFFER_SIZE_OFFSET(pfid),
71034ba8 1491 req1->rq_buffer_size);
1420398d 1492 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_PAGE_SIZE_OFFSET(pfid),
71034ba8
MC		 1493 PAGE_SIZE);
1494 CNIC_WR8(dev, BAR_USTRORM_INTMEM +
1420398d 1495 USTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid), PAGE_SHIFT);
71034ba8 1496 CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1420398d 1497 USTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid),
71034ba8 1498 req1->num_tasks_per_conn);
1420398d 1499 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_RQ_SIZE_OFFSET(pfid),
71034ba8 1500 req1->rq_num_wqes);
1420398d 1501 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_CQ_SIZE_OFFSET(pfid),
71034ba8 1502 req1->cq_num_wqes);
1420398d 1503 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_R2TQ_SIZE_OFFSET(pfid),
71034ba8
MC		 1504 cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS);
1505
1506 /* init Xstorm RAM */
1420398d 1507 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_PAGE_SIZE_OFFSET(pfid),
71034ba8
MC		 1508 PAGE_SIZE);
1509 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1420398d 1510 XSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid), PAGE_SHIFT);
71034ba8 1511 CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
1420398d 1512 XSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid),
71034ba8 1513 req1->num_tasks_per_conn);
1420398d 1514 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_HQ_SIZE_OFFSET(pfid),
71034ba8 1515 hq_bds);
1420398d 1516 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_SQ_SIZE_OFFSET(pfid),
71034ba8 1517 req1->num_tasks_per_conn);
1420398d 1518 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_R2TQ_SIZE_OFFSET(pfid),
71034ba8
MC		 1519 cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS);
1520
1521 /* init Cstorm RAM */
1420398d 1522 CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_PAGE_SIZE_OFFSET(pfid),
71034ba8
MC		 1523 PAGE_SIZE);
1524 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
1420398d 1525 CSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid), PAGE_SHIFT);
71034ba8 1526 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
1420398d 1527 CSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid),
71034ba8 1528 req1->num_tasks_per_conn);
1420398d 1529 CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_CQ_SIZE_OFFSET(pfid),
71034ba8 1530 req1->cq_num_wqes);
1420398d 1531 CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_HQ_SIZE_OFFSET(pfid),
71034ba8
MC		 1532 hq_bds);
1533
b3bd2d65
EW		 1534 cnic_bnx2x_set_tcp_options(dev,
1535 req1->flags & ISCSI_KWQE_INIT1_TIME_STAMPS_ENABLE,
1536 req1->flags & ISCSI_KWQE_INIT1_DELAYED_ACK_ENABLE);
1537
71034ba8
MC		 1538 return 0;
1539}
1540
1541static int cnic_bnx2x_iscsi_init2(struct cnic_dev *dev, struct kwqe *kwqe)
1542{
1543 struct iscsi_kwqe_init2 *req2 = (struct iscsi_kwqe_init2 *) kwqe;
1544 struct cnic_local *cp = dev->cnic_priv;
68c64d20 1545 struct bnx2x *bp = netdev_priv(dev->netdev);
1420398d 1546 u32 pfid = cp->pfid;
71034ba8
MC		 1547 struct iscsi_kcqe kcqe;
1548 struct kcqe *cqes[1];
1549
1550 memset(&kcqe, 0, sizeof(kcqe));
1551 if (!dev->max_iscsi_conn) {
1552 kcqe.completion_status =
1553 ISCSI_KCQE_COMPLETION_STATUS_ISCSI_NOT_SUPPORTED;
1554 goto done;
1555 }
1556
1557 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
1420398d 1558 TSTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid), req2->error_bit_map[0]);
71034ba8 1559 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
1420398d 1560 TSTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid) + 4,
71034ba8
MC		 1561 req2->error_bit_map[1]);
1562
1563 CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1420398d 1564 USTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfid), req2->max_cq_sqn);
71034ba8 1565 CNIC_WR(dev, BAR_USTRORM_INTMEM +
1420398d 1566 USTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid), req2->error_bit_map[0]);
71034ba8 1567 CNIC_WR(dev, BAR_USTRORM_INTMEM +
1420398d 1568 USTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid) + 4,
71034ba8
MC		 1569 req2->error_bit_map[1]);
1570
1571 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
1420398d 1572 CSTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfid), req2->max_cq_sqn);
71034ba8
MC		 1573
1574 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
1575
1576done:
1577 kcqe.op_code = ISCSI_KCQE_OPCODE_INIT;
1578 cqes[0] = (struct kcqe *) &kcqe;
1579 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
1580
1581 return 0;
1582}
1583
1584static void cnic_free_bnx2x_conn_resc(struct cnic_dev *dev, u32 l5_cid)
1585{
1586 struct cnic_local *cp = dev->cnic_priv;
1587 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1588
1589 if (ctx->ulp_proto_id == CNIC_ULP_ISCSI) {
1590 struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1591
1592 cnic_free_dma(dev, &iscsi->hq_info);
1593 cnic_free_dma(dev, &iscsi->r2tq_info);
1594 cnic_free_dma(dev, &iscsi->task_array_info);
e1928c86
MC		 1595 cnic_free_id(&cp->cid_tbl, ctx->cid);
1596 } else {
1597 cnic_free_id(&cp->fcoe_cid_tbl, ctx->cid);
71034ba8 1598 }
e1928c86 1599
71034ba8
MC		 1600 ctx->cid = 0;
1601}
1602
1603static int cnic_alloc_bnx2x_conn_resc(struct cnic_dev *dev, u32 l5_cid)
1604{
1605 u32 cid;
1606 int ret, pages;
1607 struct cnic_local *cp = dev->cnic_priv;
1608 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1609 struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1610
e1928c86
MC		 1611 if (ctx->ulp_proto_id == CNIC_ULP_FCOE) {
1612 cid = cnic_alloc_new_id(&cp->fcoe_cid_tbl);
1613 if (cid == -1) {
1614 ret = -ENOMEM;
1615 goto error;
1616 }
1617 ctx->cid = cid;
1618 return 0;
1619 }
1620
71034ba8
MC		 1621 cid = cnic_alloc_new_id(&cp->cid_tbl);
1622 if (cid == -1) {
1623 ret = -ENOMEM;
1624 goto error;
1625 }
1626
1627 ctx->cid = cid;
1628 pages = PAGE_ALIGN(cp->task_array_size) / PAGE_SIZE;
1629
1630 ret = cnic_alloc_dma(dev, &iscsi->task_array_info, pages, 1);
1631 if (ret)
1632 goto error;
1633
1634 pages = PAGE_ALIGN(cp->r2tq_size) / PAGE_SIZE;
1635 ret = cnic_alloc_dma(dev, &iscsi->r2tq_info, pages, 1);
1636 if (ret)
1637 goto error;
1638
1639 pages = PAGE_ALIGN(cp->hq_size) / PAGE_SIZE;
1640 ret = cnic_alloc_dma(dev, &iscsi->hq_info, pages, 1);
1641 if (ret)
1642 goto error;
1643
1644 return 0;
1645
1646error:
1647 cnic_free_bnx2x_conn_resc(dev, l5_cid);
1648 return ret;
1649}
1650
1651static void *cnic_get_bnx2x_ctx(struct cnic_dev *dev, u32 cid, int init,
1652 struct regpair *ctx_addr)
1653{
1654 struct cnic_local *cp = dev->cnic_priv;
1655 struct cnic_eth_dev *ethdev = cp->ethdev;
1656 int blk = (cid - ethdev->starting_cid) / cp->cids_per_blk;
1657 int off = (cid - ethdev->starting_cid) % cp->cids_per_blk;
1658 unsigned long align_off = 0;
1659 dma_addr_t ctx_map;
1660 void *ctx;
1661
1662 if (cp->ctx_align) {
1663 unsigned long mask = cp->ctx_align - 1;
1664
1665 if (cp->ctx_arr[blk].mapping & mask)
1666 align_off = cp->ctx_align -
1667 (cp->ctx_arr[blk].mapping & mask);
1668 }
1669 ctx_map = cp->ctx_arr[blk].mapping + align_off +
1670 (off * BNX2X_CONTEXT_MEM_SIZE);
1671 ctx = cp->ctx_arr[blk].ctx + align_off +
1672 (off * BNX2X_CONTEXT_MEM_SIZE);
1673 if (init)
1674 memset(ctx, 0, BNX2X_CONTEXT_MEM_SIZE);
1675
1676 ctx_addr->lo = ctx_map & 0xffffffff;
1677 ctx_addr->hi = (u64) ctx_map >> 32;
1678 return ctx;
1679}
1680
1681static int cnic_setup_bnx2x_ctx(struct cnic_dev *dev, struct kwqe *wqes[],
1682 u32 num)
1683{
1684 struct cnic_local *cp = dev->cnic_priv;
104a43ed 1685 struct bnx2x *bp = netdev_priv(dev->netdev);
71034ba8
MC		 1686 struct iscsi_kwqe_conn_offload1 *req1 =
1687 (struct iscsi_kwqe_conn_offload1 *) wqes[0];
1688 struct iscsi_kwqe_conn_offload2 *req2 =
1689 (struct iscsi_kwqe_conn_offload2 *) wqes[1];
1690 struct iscsi_kwqe_conn_offload3 *req3;
1691 struct cnic_context *ctx = &cp->ctx_tbl[req1->iscsi_conn_id];
1692 struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1693 u32 cid = ctx->cid;
5e65789f 1694 u32 hw_cid = BNX2X_HW_CID(bp, cid);
71034ba8
MC		 1695 struct iscsi_context *ictx;
1696 struct regpair context_addr;
1697 int i, j, n = 2, n_max;
5bf945a8 1698 u8 port = BP_PORT(bp);
71034ba8
MC		 1699
1700 ctx->ctx_flags = 0;
1701 if (!req2->num_additional_wqes)
1702 return -EINVAL;
1703
1704 n_max = req2->num_additional_wqes + 2;
1705
1706 ictx = cnic_get_bnx2x_ctx(dev, cid, 1, &context_addr);
1707 if (ictx == NULL)
1708 return -ENOMEM;
1709
1710 req3 = (struct iscsi_kwqe_conn_offload3 *) wqes[n++];
1711
1712 ictx->xstorm_ag_context.hq_prod = 1;
1713
1714 ictx->xstorm_st_context.iscsi.first_burst_length =
1715 ISCSI_DEF_FIRST_BURST_LEN;
1716 ictx->xstorm_st_context.iscsi.max_send_pdu_length =
1717 ISCSI_DEF_MAX_RECV_SEG_LEN;
1718 ictx->xstorm_st_context.iscsi.sq_pbl_base.lo =
1719 req1->sq_page_table_addr_lo;
1720 ictx->xstorm_st_context.iscsi.sq_pbl_base.hi =
1721 req1->sq_page_table_addr_hi;
1722 ictx->xstorm_st_context.iscsi.sq_curr_pbe.lo = req2->sq_first_pte.hi;
1723 ictx->xstorm_st_context.iscsi.sq_curr_pbe.hi = req2->sq_first_pte.lo;
1724 ictx->xstorm_st_context.iscsi.hq_pbl_base.lo =
1725 iscsi->hq_info.pgtbl_map & 0xffffffff;
1726 ictx->xstorm_st_context.iscsi.hq_pbl_base.hi =
1727 (u64) iscsi->hq_info.pgtbl_map >> 32;
1728 ictx->xstorm_st_context.iscsi.hq_curr_pbe_base.lo =
1729 iscsi->hq_info.pgtbl[0];
1730 ictx->xstorm_st_context.iscsi.hq_curr_pbe_base.hi =
1731 iscsi->hq_info.pgtbl[1];
1732 ictx->xstorm_st_context.iscsi.r2tq_pbl_base.lo =
1733 iscsi->r2tq_info.pgtbl_map & 0xffffffff;
1734 ictx->xstorm_st_context.iscsi.r2tq_pbl_base.hi =
1735 (u64) iscsi->r2tq_info.pgtbl_map >> 32;
1736 ictx->xstorm_st_context.iscsi.r2tq_curr_pbe_base.lo =
1737 iscsi->r2tq_info.pgtbl[0];
1738 ictx->xstorm_st_context.iscsi.r2tq_curr_pbe_base.hi =
1739 iscsi->r2tq_info.pgtbl[1];
1740 ictx->xstorm_st_context.iscsi.task_pbl_base.lo =
1741 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1742 ictx->xstorm_st_context.iscsi.task_pbl_base.hi =
1743 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1744 ictx->xstorm_st_context.iscsi.task_pbl_cache_idx =
1745 BNX2X_ISCSI_PBL_NOT_CACHED;
1746 ictx->xstorm_st_context.iscsi.flags.flags |=
1747 XSTORM_ISCSI_CONTEXT_FLAGS_B_IMMEDIATE_DATA;
1748 ictx->xstorm_st_context.iscsi.flags.flags |=
1749 XSTORM_ISCSI_CONTEXT_FLAGS_B_INITIAL_R2T;
619c5cb6
VZ		 1750 ictx->xstorm_st_context.common.ethernet.reserved_vlan_type =
1751 ETH_P_8021Q;
104a43ed 1752 if (BNX2X_CHIP_IS_E2_PLUS(bp) &&
5bf945a8 1753 bp->common.chip_port_mode == CHIP_2_PORT_MODE) {
619c5cb6
VZ		 1754
1755 port = 0;
1756 }
1757 ictx->xstorm_st_context.common.flags =
1758 1 << XSTORM_COMMON_CONTEXT_SECTION_PHYSQ_INITIALIZED_SHIFT;
1759 ictx->xstorm_st_context.common.flags =
1760 port << XSTORM_COMMON_CONTEXT_SECTION_PBF_PORT_SHIFT;
71034ba8
MC		 1761
1762 ictx->tstorm_st_context.iscsi.hdr_bytes_2_fetch = ISCSI_HEADER_SIZE;
1763 /* TSTORM requires the base address of RQ DB & not PTE */
1764 ictx->tstorm_st_context.iscsi.rq_db_phy_addr.lo =
1765 req2->rq_page_table_addr_lo & PAGE_MASK;
1766 ictx->tstorm_st_context.iscsi.rq_db_phy_addr.hi =
1767 req2->rq_page_table_addr_hi;
1768 ictx->tstorm_st_context.iscsi.iscsi_conn_id = req1->iscsi_conn_id;
1769 ictx->tstorm_st_context.tcp.cwnd = 0x5A8;
1770 ictx->tstorm_st_context.tcp.flags2 |=
1771 TSTORM_TCP_ST_CONTEXT_SECTION_DA_EN;
523224a3
DK		 1772 ictx->tstorm_st_context.tcp.ooo_support_mode =
1773 TCP_TSTORM_OOO_DROP_AND_PROC_ACK;
71034ba8 1774
523224a3 1775 ictx->timers_context.flags |= TIMERS_BLOCK_CONTEXT_CONN_VALID_FLG;
71034ba8
MC		 1776
1777 ictx->ustorm_st_context.ring.rq.pbl_base.lo =
15971c3c 1778 req2->rq_page_table_addr_lo;
71034ba8 1779 ictx->ustorm_st_context.ring.rq.pbl_base.hi =
15971c3c 1780 req2->rq_page_table_addr_hi;
71034ba8
MC		 1781 ictx->ustorm_st_context.ring.rq.curr_pbe.lo = req3->qp_first_pte[0].hi;
1782 ictx->ustorm_st_context.ring.rq.curr_pbe.hi = req3->qp_first_pte[0].lo;
1783 ictx->ustorm_st_context.ring.r2tq.pbl_base.lo =
1784 iscsi->r2tq_info.pgtbl_map & 0xffffffff;
1785 ictx->ustorm_st_context.ring.r2tq.pbl_base.hi =
1786 (u64) iscsi->r2tq_info.pgtbl_map >> 32;
1787 ictx->ustorm_st_context.ring.r2tq.curr_pbe.lo =
1788 iscsi->r2tq_info.pgtbl[0];
1789 ictx->ustorm_st_context.ring.r2tq.curr_pbe.hi =
1790 iscsi->r2tq_info.pgtbl[1];
1791 ictx->ustorm_st_context.ring.cq_pbl_base.lo =
1792 req1->cq_page_table_addr_lo;
1793 ictx->ustorm_st_context.ring.cq_pbl_base.hi =
1794 req1->cq_page_table_addr_hi;
1795 ictx->ustorm_st_context.ring.cq[0].cq_sn = ISCSI_INITIAL_SN;
1796 ictx->ustorm_st_context.ring.cq[0].curr_pbe.lo = req2->cq_first_pte.hi;
1797 ictx->ustorm_st_context.ring.cq[0].curr_pbe.hi = req2->cq_first_pte.lo;
1798 ictx->ustorm_st_context.task_pbe_cache_index =
1799 BNX2X_ISCSI_PBL_NOT_CACHED;
1800 ictx->ustorm_st_context.task_pdu_cache_index =
1801 BNX2X_ISCSI_PDU_HEADER_NOT_CACHED;
1802
1803 for (i = 1, j = 1; i < cp->num_cqs; i++, j++) {
1804 if (j == 3) {
1805 if (n >= n_max)
1806 break;
1807 req3 = (struct iscsi_kwqe_conn_offload3 *) wqes[n++];
1808 j = 0;
1809 }
1810 ictx->ustorm_st_context.ring.cq[i].cq_sn = ISCSI_INITIAL_SN;
1811 ictx->ustorm_st_context.ring.cq[i].curr_pbe.lo =
1812 req3->qp_first_pte[j].hi;
1813 ictx->ustorm_st_context.ring.cq[i].curr_pbe.hi =
1814 req3->qp_first_pte[j].lo;
1815 }
1816
1817 ictx->ustorm_st_context.task_pbl_base.lo =
1818 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1819 ictx->ustorm_st_context.task_pbl_base.hi =
1820 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1821 ictx->ustorm_st_context.tce_phy_addr.lo =
1822 iscsi->task_array_info.pgtbl[0];
1823 ictx->ustorm_st_context.tce_phy_addr.hi =
1824 iscsi->task_array_info.pgtbl[1];
1825 ictx->ustorm_st_context.iscsi_conn_id = req1->iscsi_conn_id;
1826 ictx->ustorm_st_context.num_cqs = cp->num_cqs;
1827 ictx->ustorm_st_context.negotiated_rx |= ISCSI_DEF_MAX_RECV_SEG_LEN;
1828 ictx->ustorm_st_context.negotiated_rx_and_flags |=
1829 ISCSI_DEF_MAX_BURST_LEN;
1830 ictx->ustorm_st_context.negotiated_rx |=
1831 ISCSI_DEFAULT_MAX_OUTSTANDING_R2T <<
1832 USTORM_ISCSI_ST_CONTEXT_MAX_OUTSTANDING_R2TS_SHIFT;
1833
1834 ictx->cstorm_st_context.hq_pbl_base.lo =
1835 iscsi->hq_info.pgtbl_map & 0xffffffff;
1836 ictx->cstorm_st_context.hq_pbl_base.hi =
1837 (u64) iscsi->hq_info.pgtbl_map >> 32;
1838 ictx->cstorm_st_context.hq_curr_pbe.lo = iscsi->hq_info.pgtbl[0];
1839 ictx->cstorm_st_context.hq_curr_pbe.hi = iscsi->hq_info.pgtbl[1];
1840 ictx->cstorm_st_context.task_pbl_base.lo =
1841 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1842 ictx->cstorm_st_context.task_pbl_base.hi =
1843 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1844 /* CSTORM and USTORM initialization is different, CSTORM requires
1845 * CQ DB base & not PTE addr */
1846 ictx->cstorm_st_context.cq_db_base.lo =
1847 req1->cq_page_table_addr_lo & PAGE_MASK;
1848 ictx->cstorm_st_context.cq_db_base.hi = req1->cq_page_table_addr_hi;
1849 ictx->cstorm_st_context.iscsi_conn_id = req1->iscsi_conn_id;
1850 ictx->cstorm_st_context.cq_proc_en_bit_map = (1 << cp->num_cqs) - 1;
1851 for (i = 0; i < cp->num_cqs; i++) {
1852 ictx->cstorm_st_context.cq_c_prod_sqn_arr.sqn[i] =
1853 ISCSI_INITIAL_SN;
1854 ictx->cstorm_st_context.cq_c_sqn_2_notify_arr.sqn[i] =
1855 ISCSI_INITIAL_SN;
1856 }
1857
1858 ictx->xstorm_ag_context.cdu_reserved =
1859 CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_XCM_AG,
1860 ISCSI_CONNECTION_TYPE);
1861 ictx->ustorm_ag_context.cdu_usage =
1862 CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_UCM_AG,
1863 ISCSI_CONNECTION_TYPE);
1864 return 0;
1865
1866}
1867
1868static int cnic_bnx2x_iscsi_ofld1(struct cnic_dev *dev, struct kwqe *wqes[],
1869 u32 num, int *work)
1870{
1871 struct iscsi_kwqe_conn_offload1 *req1;
1872 struct iscsi_kwqe_conn_offload2 *req2;
1873 struct cnic_local *cp = dev->cnic_priv;
5e65789f 1874 struct bnx2x *bp = netdev_priv(dev->netdev);
fdf24086 1875 struct cnic_context *ctx;
71034ba8
MC		 1876 struct iscsi_kcqe kcqe;
1877 struct kcqe *cqes[1];
1878 u32 l5_cid;
fdf24086 1879 int ret = 0;
71034ba8
MC		 1880
1881 if (num < 2) {
1882 *work = num;
1883 return -EINVAL;
1884 }
1885
1886 req1 = (struct iscsi_kwqe_conn_offload1 *) wqes[0];
1887 req2 = (struct iscsi_kwqe_conn_offload2 *) wqes[1];
1888 if ((num - 2) < req2->num_additional_wqes) {
1889 *work = num;
1890 return -EINVAL;
1891 }
779bb41d 1892 *work = 2 + req2->num_additional_wqes;
71034ba8
MC		 1893
1894 l5_cid = req1->iscsi_conn_id;
1895 if (l5_cid >= MAX_ISCSI_TBL_SZ)
1896 return -EINVAL;
1897
1898 memset(&kcqe, 0, sizeof(kcqe));
1899 kcqe.op_code = ISCSI_KCQE_OPCODE_OFFLOAD_CONN;
1900 kcqe.iscsi_conn_id = l5_cid;
1901 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAILURE;
1902
fdf24086
MC		 1903 ctx = &cp->ctx_tbl[l5_cid];
1904 if (test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags)) {
1905 kcqe.completion_status =
1906 ISCSI_KCQE_COMPLETION_STATUS_CID_BUSY;
1907 goto done;
1908 }
1909
71034ba8
MC		 1910 if (atomic_inc_return(&cp->iscsi_conn) > dev->max_iscsi_conn) {
1911 atomic_dec(&cp->iscsi_conn);
71034ba8
MC		 1912 goto done;
1913 }
1914 ret = cnic_alloc_bnx2x_conn_resc(dev, l5_cid);
1915 if (ret) {
1916 atomic_dec(&cp->iscsi_conn);
1917 ret = 0;
1918 goto done;
1919 }
1920 ret = cnic_setup_bnx2x_ctx(dev, wqes, num);
1921 if (ret < 0) {
1922 cnic_free_bnx2x_conn_resc(dev, l5_cid);
1923 atomic_dec(&cp->iscsi_conn);
1924 goto done;
1925 }
1926
1927 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
5e65789f 1928 kcqe.iscsi_conn_context_id = BNX2X_HW_CID(bp, cp->ctx_tbl[l5_cid].cid);
71034ba8
MC		 1929
1930done:
1931 cqes[0] = (struct kcqe *) &kcqe;
1932 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
23021c21 1933 return 0;
71034ba8
MC		 1934}
1935
1936
1937static int cnic_bnx2x_iscsi_update(struct cnic_dev *dev, struct kwqe *kwqe)
1938{
1939 struct cnic_local *cp = dev->cnic_priv;
1940 struct iscsi_kwqe_conn_update *req =
1941 (struct iscsi_kwqe_conn_update *) kwqe;
1942 void *data;
1943 union l5cm_specific_data l5_data;
1944 u32 l5_cid, cid = BNX2X_SW_CID(req->context_id);
1945 int ret;
1946
1947 if (cnic_get_l5_cid(cp, cid, &l5_cid) != 0)
1948 return -EINVAL;
1949
1950 data = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
1951 if (!data)
1952 return -ENOMEM;
1953
1954 memcpy(data, kwqe, sizeof(struct kwqe));
1955
1956 ret = cnic_submit_kwqe_16(dev, ISCSI_RAMROD_CMD_ID_UPDATE_CONN,
1957 req->context_id, ISCSI_CONNECTION_TYPE, &l5_data);
1958 return ret;
1959}
1960
a2c9e769 1961static int cnic_bnx2x_destroy_ramrod(struct cnic_dev *dev, u32 l5_cid)
71034ba8
MC		 1962{
1963 struct cnic_local *cp = dev->cnic_priv;
5e65789f 1964 struct bnx2x *bp = netdev_priv(dev->netdev);
71034ba8 1965 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
a2c9e769
MC		 1966 union l5cm_specific_data l5_data;
1967 int ret;
68d7c1aa 1968 u32 hw_cid;
71034ba8 1969
71034ba8
MC		 1970 init_waitqueue_head(&ctx->waitq);
1971 ctx->wait_cond = 0;
1972 memset(&l5_data, 0, sizeof(l5_data));
5e65789f 1973 hw_cid = BNX2X_HW_CID(bp, ctx->cid);
523224a3
DK		 1974
1975 ret = cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_COMMON_CFC_DEL,
68d7c1aa 1976 hw_cid, NONE_CONNECTION_TYPE, &l5_data);
523224a3 1977
619c5cb6 1978 if (ret == 0) {
dcc7e3a6 1979 wait_event_timeout(ctx->waitq, ctx->wait_cond, CNIC_RAMROD_TMO);
619c5cb6
VZ		 1980 if (unlikely(test_bit(CTX_FL_CID_ERROR, &ctx->ctx_flags)))
1981 return -EBUSY;
1982 }
71034ba8 1983
dcc7e3a6 1984 return 0;
a2c9e769
MC		 1985}
1986
1987static int cnic_bnx2x_iscsi_destroy(struct cnic_dev *dev, struct kwqe *kwqe)
1988{
1989 struct cnic_local *cp = dev->cnic_priv;
1990 struct iscsi_kwqe_conn_destroy *req =
1991 (struct iscsi_kwqe_conn_destroy *) kwqe;
1992 u32 l5_cid = req->reserved0;
1993 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1994 int ret = 0;
1995 struct iscsi_kcqe kcqe;
1996 struct kcqe *cqes[1];
1997
1998 if (!test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
1999 goto skip_cfc_delete;
2000
fdf24086
MC		 2001 if (!time_after(jiffies, ctx->timestamp + (2 * HZ))) {
2002 unsigned long delta = ctx->timestamp + (2 * HZ) - jiffies;
2003
2004 if (delta > (2 * HZ))
2005 delta = 0;
2006
2007 set_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags);
2008 queue_delayed_work(cnic_wq, &cp->delete_task, delta);
2009 goto destroy_reply;
2010 }
a2c9e769
MC		 2011
2012 ret = cnic_bnx2x_destroy_ramrod(dev, l5_cid);
2013
71034ba8
MC		 2014skip_cfc_delete:
2015 cnic_free_bnx2x_conn_resc(dev, l5_cid);
2016
619c5cb6
VZ		 2017 if (!ret) {
2018 atomic_dec(&cp->iscsi_conn);
2019 clear_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags);
2020 }
71034ba8 2021
fdf24086 2022destroy_reply:
71034ba8
MC		 2023 memset(&kcqe, 0, sizeof(kcqe));
2024 kcqe.op_code = ISCSI_KCQE_OPCODE_DESTROY_CONN;
2025 kcqe.iscsi_conn_id = l5_cid;
2026 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
2027 kcqe.iscsi_conn_context_id = req->context_id;
2028
2029 cqes[0] = (struct kcqe *) &kcqe;
2030 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
2031
23021c21 2032 return 0;
71034ba8
MC		 2033}
2034
2035static void cnic_init_storm_conn_bufs(struct cnic_dev *dev,
2036 struct l4_kwq_connect_req1 *kwqe1,
2037 struct l4_kwq_connect_req3 *kwqe3,
2038 struct l5cm_active_conn_buffer *conn_buf)
2039{
2040 struct l5cm_conn_addr_params *conn_addr = &conn_buf->conn_addr_buf;
2041 struct l5cm_xstorm_conn_buffer *xstorm_buf =
2042 &conn_buf->xstorm_conn_buffer;
2043 struct l5cm_tstorm_conn_buffer *tstorm_buf =
2044 &conn_buf->tstorm_conn_buffer;
2045 struct regpair context_addr;
2046 u32 cid = BNX2X_SW_CID(kwqe1->cid);
2047 struct in6_addr src_ip, dst_ip;
2048 int i;
2049 u32 *addrp;
2050
2051 addrp = (u32 *) &conn_addr->local_ip_addr;
2052 for (i = 0; i < 4; i++, addrp++)
2053 src_ip.in6_u.u6_addr32[i] = cpu_to_be32(*addrp);
2054
2055 addrp = (u32 *) &conn_addr->remote_ip_addr;
2056 for (i = 0; i < 4; i++, addrp++)
2057 dst_ip.in6_u.u6_addr32[i] = cpu_to_be32(*addrp);
2058
2059 cnic_get_bnx2x_ctx(dev, cid, 0, &context_addr);
2060
2061 xstorm_buf->context_addr.hi = context_addr.hi;
2062 xstorm_buf->context_addr.lo = context_addr.lo;
2063 xstorm_buf->mss = 0xffff;
2064 xstorm_buf->rcv_buf = kwqe3->rcv_buf;
2065 if (kwqe1->tcp_flags & L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE)
2066 xstorm_buf->params |= L5CM_XSTORM_CONN_BUFFER_NAGLE_ENABLE;
2067 xstorm_buf->pseudo_header_checksum =
2068 swab16(~csum_ipv6_magic(&src_ip, &dst_ip, 0, IPPROTO_TCP, 0));
2069
71034ba8
MC		 2070 if (kwqe3->ka_timeout) {
2071 tstorm_buf->ka_enable = 1;
2072 tstorm_buf->ka_timeout = kwqe3->ka_timeout;
2073 tstorm_buf->ka_interval = kwqe3->ka_interval;
2074 tstorm_buf->ka_max_probe_count = kwqe3->ka_max_probe_count;
2075 }
71034ba8
MC		 2076 tstorm_buf->max_rt_time = 0xffffffff;
2077}
2078
2079static void cnic_init_bnx2x_mac(struct cnic_dev *dev)
2080{
2081 struct cnic_local *cp = dev->cnic_priv;
68c64d20 2082 struct bnx2x *bp = netdev_priv(dev->netdev);
1420398d 2083 u32 pfid = cp->pfid;
71034ba8
MC		 2084 u8 *mac = dev->mac_addr;
2085
2086 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1420398d 2087 XSTORM_ISCSI_LOCAL_MAC_ADDR0_OFFSET(pfid), mac[0]);
71034ba8 2088 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1420398d 2089 XSTORM_ISCSI_LOCAL_MAC_ADDR1_OFFSET(pfid), mac[1]);
71034ba8 2090 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1420398d 2091 XSTORM_ISCSI_LOCAL_MAC_ADDR2_OFFSET(pfid), mac[2]);
71034ba8 2092 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1420398d 2093 XSTORM_ISCSI_LOCAL_MAC_ADDR3_OFFSET(pfid), mac[3]);
71034ba8 2094 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1420398d 2095 XSTORM_ISCSI_LOCAL_MAC_ADDR4_OFFSET(pfid), mac[4]);
71034ba8 2096 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1420398d 2097 XSTORM_ISCSI_LOCAL_MAC_ADDR5_OFFSET(pfid), mac[5]);
71034ba8
MC		 2098
2099 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1420398d 2100 TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(pfid), mac[5]);
71034ba8 2101 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1420398d 2102 TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(pfid) + 1,
71034ba8
MC		 2103 mac[4]);
2104 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
619c5cb6 2105 TSTORM_ISCSI_TCP_VARS_MID_LOCAL_MAC_ADDR_OFFSET(pfid), mac[3]);
71034ba8 2106 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
619c5cb6 2107 TSTORM_ISCSI_TCP_VARS_MID_LOCAL_MAC_ADDR_OFFSET(pfid) + 1,
71034ba8
MC		 2108 mac[2]);
2109 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
619c5cb6 2110 TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfid), mac[1]);
71034ba8 2111 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
619c5cb6 2112 TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfid) + 1,
71034ba8
MC		 2113 mac[0]);
2114}
2115
71034ba8
MC		 2116static int cnic_bnx2x_connect(struct cnic_dev *dev, struct kwqe *wqes[],
2117 u32 num, int *work)
2118{
2119 struct cnic_local *cp = dev->cnic_priv;
68c64d20 2120 struct bnx2x *bp = netdev_priv(dev->netdev);
71034ba8
MC		 2121 struct l4_kwq_connect_req1 *kwqe1 =
2122 (struct l4_kwq_connect_req1 *) wqes[0];
2123 struct l4_kwq_connect_req3 *kwqe3;
2124 struct l5cm_active_conn_buffer *conn_buf;
2125 struct l5cm_conn_addr_params *conn_addr;
2126 union l5cm_specific_data l5_data;
2127 u32 l5_cid = kwqe1->pg_cid;
2128 struct cnic_sock *csk = &cp->csk_tbl[l5_cid];
2129 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
2130 int ret;
2131
2132 if (num < 2) {
2133 *work = num;
2134 return -EINVAL;
2135 }
2136
2137 if (kwqe1->conn_flags & L4_KWQ_CONNECT_REQ1_IP_V6)
2138 *work = 3;
2139 else
2140 *work = 2;
2141
2142 if (num < *work) {
2143 *work = num;
2144 return -EINVAL;
2145 }
2146
2147 if (sizeof(*conn_buf) > CNIC_KWQ16_DATA_SIZE) {
ddf79b20 2148 netdev_err(dev->netdev, "conn_buf size too big\n");
71034ba8
MC		 2149 return -ENOMEM;
2150 }
2151 conn_buf = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
2152 if (!conn_buf)
2153 return -ENOMEM;
2154
2155 memset(conn_buf, 0, sizeof(*conn_buf));
2156
2157 conn_addr = &conn_buf->conn_addr_buf;
2158 conn_addr->remote_addr_0 = csk->ha[0];
2159 conn_addr->remote_addr_1 = csk->ha[1];
2160 conn_addr->remote_addr_2 = csk->ha[2];
2161 conn_addr->remote_addr_3 = csk->ha[3];
2162 conn_addr->remote_addr_4 = csk->ha[4];
2163 conn_addr->remote_addr_5 = csk->ha[5];
2164
2165 if (kwqe1->conn_flags & L4_KWQ_CONNECT_REQ1_IP_V6) {
2166 struct l4_kwq_connect_req2 *kwqe2 =
2167 (struct l4_kwq_connect_req2 *) wqes[1];
2168
2169 conn_addr->local_ip_addr.ip_addr_hi_hi = kwqe2->src_ip_v6_4;
2170 conn_addr->local_ip_addr.ip_addr_hi_lo = kwqe2->src_ip_v6_3;
2171 conn_addr->local_ip_addr.ip_addr_lo_hi = kwqe2->src_ip_v6_2;
2172
2173 conn_addr->remote_ip_addr.ip_addr_hi_hi = kwqe2->dst_ip_v6_4;
2174 conn_addr->remote_ip_addr.ip_addr_hi_lo = kwqe2->dst_ip_v6_3;
2175 conn_addr->remote_ip_addr.ip_addr_lo_hi = kwqe2->dst_ip_v6_2;
2176 conn_addr->params |= L5CM_CONN_ADDR_PARAMS_IP_VERSION;
2177 }
2178 kwqe3 = (struct l4_kwq_connect_req3 *) wqes[*work - 1];
2179
2180 conn_addr->local_ip_addr.ip_addr_lo_lo = kwqe1->src_ip;
2181 conn_addr->remote_ip_addr.ip_addr_lo_lo = kwqe1->dst_ip;
2182 conn_addr->local_tcp_port = kwqe1->src_port;
2183 conn_addr->remote_tcp_port = kwqe1->dst_port;
2184
2185 conn_addr->pmtu = kwqe3->pmtu;
2186 cnic_init_storm_conn_bufs(dev, kwqe1, kwqe3, conn_buf);
2187
2188 CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
1420398d 2189 XSTORM_ISCSI_LOCAL_VLAN_OFFSET(cp->pfid), csk->vlan_id);
71034ba8 2190
71034ba8
MC		 2191 ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_TCP_CONNECT,
2192 kwqe1->cid, ISCSI_CONNECTION_TYPE, &l5_data);
2193 if (!ret)
6e0dda0c 2194 set_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags);
71034ba8
MC		 2195
2196 return ret;
2197}
2198
2199static int cnic_bnx2x_close(struct cnic_dev *dev, struct kwqe *kwqe)
2200{
2201 struct l4_kwq_close_req *req = (struct l4_kwq_close_req *) kwqe;
2202 union l5cm_specific_data l5_data;
2203 int ret;
2204
2205 memset(&l5_data, 0, sizeof(l5_data));
2206 ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_CLOSE,
2207 req->cid, ISCSI_CONNECTION_TYPE, &l5_data);
2208 return ret;
2209}
2210
2211static int cnic_bnx2x_reset(struct cnic_dev *dev, struct kwqe *kwqe)
2212{
2213 struct l4_kwq_reset_req *req = (struct l4_kwq_reset_req *) kwqe;
2214 union l5cm_specific_data l5_data;
2215 int ret;
2216
2217 memset(&l5_data, 0, sizeof(l5_data));
2218 ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_ABORT,
2219 req->cid, ISCSI_CONNECTION_TYPE, &l5_data);
2220 return ret;
2221}
2222static int cnic_bnx2x_offload_pg(struct cnic_dev *dev, struct kwqe *kwqe)
2223{
2224 struct l4_kwq_offload_pg *req = (struct l4_kwq_offload_pg *) kwqe;
2225 struct l4_kcq kcqe;
2226 struct kcqe *cqes[1];
2227
2228 memset(&kcqe, 0, sizeof(kcqe));
2229 kcqe.pg_host_opaque = req->host_opaque;
2230 kcqe.pg_cid = req->host_opaque;
2231 kcqe.op_code = L4_KCQE_OPCODE_VALUE_OFFLOAD_PG;
2232 cqes[0] = (struct kcqe *) &kcqe;
2233 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_L4, cqes, 1);
2234 return 0;
2235}
2236
2237static int cnic_bnx2x_update_pg(struct cnic_dev *dev, struct kwqe *kwqe)
2238{
2239 struct l4_kwq_update_pg *req = (struct l4_kwq_update_pg *) kwqe;
2240 struct l4_kcq kcqe;
2241 struct kcqe *cqes[1];
2242
2243 memset(&kcqe, 0, sizeof(kcqe));
2244 kcqe.pg_host_opaque = req->pg_host_opaque;
2245 kcqe.pg_cid = req->pg_cid;
2246 kcqe.op_code = L4_KCQE_OPCODE_VALUE_UPDATE_PG;
2247 cqes[0] = (struct kcqe *) &kcqe;
2248 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_L4, cqes, 1);
2249 return 0;
2250}
2251
e1928c86
MC		 2252static int cnic_bnx2x_fcoe_stat(struct cnic_dev *dev, struct kwqe *kwqe)
2253{
2254 struct fcoe_kwqe_stat *req;
2255 struct fcoe_stat_ramrod_params *fcoe_stat;
2256 union l5cm_specific_data l5_data;
2257 struct cnic_local *cp = dev->cnic_priv;
5e65789f 2258 struct bnx2x *bp = netdev_priv(dev->netdev);
e1928c86
MC		 2259 int ret;
2260 u32 cid;
2261
2262 req = (struct fcoe_kwqe_stat *) kwqe;
5e65789f 2263 cid = BNX2X_HW_CID(bp, cp->fcoe_init_cid);
e1928c86
MC		 2264
2265 fcoe_stat = cnic_get_kwqe_16_data(cp, BNX2X_FCOE_L5_CID_BASE, &l5_data);
2266 if (!fcoe_stat)
2267 return -ENOMEM;
2268
2269 memset(fcoe_stat, 0, sizeof(*fcoe_stat));
2270 memcpy(&fcoe_stat->stat_kwqe, req, sizeof(*req));
2271
619c5cb6 2272 ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_STAT_FUNC, cid,
e1928c86
MC		 2273 FCOE_CONNECTION_TYPE, &l5_data);
2274 return ret;
2275}
2276
2277static int cnic_bnx2x_fcoe_init1(struct cnic_dev *dev, struct kwqe *wqes[],
2278 u32 num, int *work)
2279{
2280 int ret;
2281 struct cnic_local *cp = dev->cnic_priv;
5e65789f 2282 struct bnx2x *bp = netdev_priv(dev->netdev);
e1928c86
MC		 2283 u32 cid;
2284 struct fcoe_init_ramrod_params *fcoe_init;
2285 struct fcoe_kwqe_init1 *req1;
2286 struct fcoe_kwqe_init2 *req2;
2287 struct fcoe_kwqe_init3 *req3;
2288 union l5cm_specific_data l5_data;
2289
2290 if (num < 3) {
2291 *work = num;
2292 return -EINVAL;
2293 }
2294 req1 = (struct fcoe_kwqe_init1 *) wqes[0];
2295 req2 = (struct fcoe_kwqe_init2 *) wqes[1];
2296 req3 = (struct fcoe_kwqe_init3 *) wqes[2];
2297 if (req2->hdr.op_code != FCOE_KWQE_OPCODE_INIT2) {
2298 *work = 1;
2299 return -EINVAL;
2300 }
2301 if (req3->hdr.op_code != FCOE_KWQE_OPCODE_INIT3) {
2302 *work = 2;
2303 return -EINVAL;
2304 }
2305
2306 if (sizeof(*fcoe_init) > CNIC_KWQ16_DATA_SIZE) {
2307 netdev_err(dev->netdev, "fcoe_init size too big\n");
2308 return -ENOMEM;
2309 }
2310 fcoe_init = cnic_get_kwqe_16_data(cp, BNX2X_FCOE_L5_CID_BASE, &l5_data);
2311 if (!fcoe_init)
2312 return -ENOMEM;
2313
2314 memset(fcoe_init, 0, sizeof(*fcoe_init));
2315 memcpy(&fcoe_init->init_kwqe1, req1, sizeof(*req1));
2316 memcpy(&fcoe_init->init_kwqe2, req2, sizeof(*req2));
2317 memcpy(&fcoe_init->init_kwqe3, req3, sizeof(*req3));
619c5cb6
VZ		 2318 fcoe_init->eq_pbl_base.lo = cp->kcq2.dma.pgtbl_map & 0xffffffff;
2319 fcoe_init->eq_pbl_base.hi = (u64) cp->kcq2.dma.pgtbl_map >> 32;
2320 fcoe_init->eq_pbl_size = cp->kcq2.dma.num_pages;
e1928c86
MC		 2321
2322 fcoe_init->sb_num = cp->status_blk_num;
2323 fcoe_init->eq_prod = MAX_KCQ_IDX;
2324 fcoe_init->sb_id = HC_INDEX_FCOE_EQ_CONS;
2325 cp->kcq2.sw_prod_idx = 0;
2326
5e65789f 2327 cid = BNX2X_HW_CID(bp, cp->fcoe_init_cid);
619c5cb6 2328 ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_INIT_FUNC, cid,
e1928c86
MC		 2329 FCOE_CONNECTION_TYPE, &l5_data);
2330 *work = 3;
2331 return ret;
2332}
2333
2334static int cnic_bnx2x_fcoe_ofld1(struct cnic_dev *dev, struct kwqe *wqes[],
2335 u32 num, int *work)
2336{
2337 int ret = 0;
2338 u32 cid = -1, l5_cid;
2339 struct cnic_local *cp = dev->cnic_priv;
5e65789f 2340 struct bnx2x *bp = netdev_priv(dev->netdev);
e1928c86
MC		 2341 struct fcoe_kwqe_conn_offload1 *req1;
2342 struct fcoe_kwqe_conn_offload2 *req2;
2343 struct fcoe_kwqe_conn_offload3 *req3;
2344 struct fcoe_kwqe_conn_offload4 *req4;
2345 struct fcoe_conn_offload_ramrod_params *fcoe_offload;
2346 struct cnic_context *ctx;
2347 struct fcoe_context *fctx;
2348 struct regpair ctx_addr;
2349 union l5cm_specific_data l5_data;
2350 struct fcoe_kcqe kcqe;
2351 struct kcqe *cqes[1];
2352
2353 if (num < 4) {
2354 *work = num;
2355 return -EINVAL;
2356 }
2357 req1 = (struct fcoe_kwqe_conn_offload1 *) wqes[0];
2358 req2 = (struct fcoe_kwqe_conn_offload2 *) wqes[1];
2359 req3 = (struct fcoe_kwqe_conn_offload3 *) wqes[2];
2360 req4 = (struct fcoe_kwqe_conn_offload4 *) wqes[3];
2361
2362 *work = 4;
2363
2364 l5_cid = req1->fcoe_conn_id;
dc219a2e 2365 if (l5_cid >= dev->max_fcoe_conn)
e1928c86
MC		 2366 goto err_reply;
2367
2368 l5_cid += BNX2X_FCOE_L5_CID_BASE;
2369
2370 ctx = &cp->ctx_tbl[l5_cid];
2371 if (test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
2372 goto err_reply;
2373
2374 ret = cnic_alloc_bnx2x_conn_resc(dev, l5_cid);
2375 if (ret) {
2376 ret = 0;
2377 goto err_reply;
2378 }
2379 cid = ctx->cid;
2380
2381 fctx = cnic_get_bnx2x_ctx(dev, cid, 1, &ctx_addr);
2382 if (fctx) {
5e65789f 2383 u32 hw_cid = BNX2X_HW_CID(bp, cid);
e1928c86
MC		 2384 u32 val;
2385
2386 val = CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_XCM_AG,
2387 FCOE_CONNECTION_TYPE);
2388 fctx->xstorm_ag_context.cdu_reserved = val;
2389 val = CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_UCM_AG,
2390 FCOE_CONNECTION_TYPE);
2391 fctx->ustorm_ag_context.cdu_usage = val;
2392 }
2393 if (sizeof(*fcoe_offload) > CNIC_KWQ16_DATA_SIZE) {
2394 netdev_err(dev->netdev, "fcoe_offload size too big\n");
2395 goto err_reply;
2396 }
2397 fcoe_offload = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
2398 if (!fcoe_offload)
2399 goto err_reply;
2400
2401 memset(fcoe_offload, 0, sizeof(*fcoe_offload));
2402 memcpy(&fcoe_offload->offload_kwqe1, req1, sizeof(*req1));
2403 memcpy(&fcoe_offload->offload_kwqe2, req2, sizeof(*req2));
2404 memcpy(&fcoe_offload->offload_kwqe3, req3, sizeof(*req3));
2405 memcpy(&fcoe_offload->offload_kwqe4, req4, sizeof(*req4));
2406
5e65789f 2407 cid = BNX2X_HW_CID(bp, cid);
e1928c86
MC		 2408 ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_OFFLOAD_CONN, cid,
2409 FCOE_CONNECTION_TYPE, &l5_data);
2410 if (!ret)
2411 set_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags);
2412
2413 return ret;
2414
2415err_reply:
2416 if (cid != -1)
2417 cnic_free_bnx2x_conn_resc(dev, l5_cid);
2418
2419 memset(&kcqe, 0, sizeof(kcqe));
2420 kcqe.op_code = FCOE_KCQE_OPCODE_OFFLOAD_CONN;
2421 kcqe.fcoe_conn_id = req1->fcoe_conn_id;
2422 kcqe.completion_status = FCOE_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAILURE;
2423
2424 cqes[0] = (struct kcqe *) &kcqe;
2425 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_FCOE, cqes, 1);
2426 return ret;
2427}
2428
2429static int cnic_bnx2x_fcoe_enable(struct cnic_dev *dev, struct kwqe *kwqe)
2430{
2431 struct fcoe_kwqe_conn_enable_disable *req;
2432 struct fcoe_conn_enable_disable_ramrod_params *fcoe_enable;
2433 union l5cm_specific_data l5_data;
2434 int ret;
2435 u32 cid, l5_cid;
2436 struct cnic_local *cp = dev->cnic_priv;
2437
2438 req = (struct fcoe_kwqe_conn_enable_disable *) kwqe;
2439 cid = req->context_id;
2440 l5_cid = req->conn_id + BNX2X_FCOE_L5_CID_BASE;
2441
2442 if (sizeof(*fcoe_enable) > CNIC_KWQ16_DATA_SIZE) {
2443 netdev_err(dev->netdev, "fcoe_enable size too big\n");
2444 return -ENOMEM;
2445 }
2446 fcoe_enable = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
2447 if (!fcoe_enable)
2448 return -ENOMEM;
2449
2450 memset(fcoe_enable, 0, sizeof(*fcoe_enable));
2451 memcpy(&fcoe_enable->enable_disable_kwqe, req, sizeof(*req));
2452 ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_ENABLE_CONN, cid,
2453 FCOE_CONNECTION_TYPE, &l5_data);
2454 return ret;
2455}
2456
2457static int cnic_bnx2x_fcoe_disable(struct cnic_dev *dev, struct kwqe *kwqe)
2458{
2459 struct fcoe_kwqe_conn_enable_disable *req;
2460 struct fcoe_conn_enable_disable_ramrod_params *fcoe_disable;
2461 union l5cm_specific_data l5_data;
2462 int ret;
2463 u32 cid, l5_cid;
2464 struct cnic_local *cp = dev->cnic_priv;
2465
2466 req = (struct fcoe_kwqe_conn_enable_disable *) kwqe;
2467 cid = req->context_id;
2468 l5_cid = req->conn_id;
dc219a2e 2469 if (l5_cid >= dev->max_fcoe_conn)
e1928c86
MC		 2470 return -EINVAL;
2471
2472 l5_cid += BNX2X_FCOE_L5_CID_BASE;
2473
2474 if (sizeof(*fcoe_disable) > CNIC_KWQ16_DATA_SIZE) {
2475 netdev_err(dev->netdev, "fcoe_disable size too big\n");
2476 return -ENOMEM;
2477 }
2478 fcoe_disable = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
2479 if (!fcoe_disable)
2480 return -ENOMEM;
2481
2482 memset(fcoe_disable, 0, sizeof(*fcoe_disable));
2483 memcpy(&fcoe_disable->enable_disable_kwqe, req, sizeof(*req));
2484 ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_DISABLE_CONN, cid,
2485 FCOE_CONNECTION_TYPE, &l5_data);
2486 return ret;
2487}
2488
2489static int cnic_bnx2x_fcoe_destroy(struct cnic_dev *dev, struct kwqe *kwqe)
2490{
2491 struct fcoe_kwqe_conn_destroy *req;
2492 union l5cm_specific_data l5_data;
2493 int ret;
2494 u32 cid, l5_cid;
2495 struct cnic_local *cp = dev->cnic_priv;
2496 struct cnic_context *ctx;
2497 struct fcoe_kcqe kcqe;
2498 struct kcqe *cqes[1];
2499
2500 req = (struct fcoe_kwqe_conn_destroy *) kwqe;
2501 cid = req->context_id;
2502 l5_cid = req->conn_id;
dc219a2e 2503 if (l5_cid >= dev->max_fcoe_conn)
e1928c86
MC		 2504 return -EINVAL;
2505
2506 l5_cid += BNX2X_FCOE_L5_CID_BASE;
2507
2508 ctx = &cp->ctx_tbl[l5_cid];
2509
2510 init_waitqueue_head(&ctx->waitq);
2511 ctx->wait_cond = 0;
2512
dcc7e3a6
MC		 2513 memset(&kcqe, 0, sizeof(kcqe));
2514 kcqe.completion_status = FCOE_KCQE_COMPLETION_STATUS_ERROR;
e1928c86
MC		 2515 memset(&l5_data, 0, sizeof(l5_data));
2516 ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_TERMINATE_CONN, cid,
2517 FCOE_CONNECTION_TYPE, &l5_data);
2518 if (ret == 0) {
dcc7e3a6
MC		 2519 wait_event_timeout(ctx->waitq, ctx->wait_cond, CNIC_RAMROD_TMO);
2520 if (ctx->wait_cond)
2521 kcqe.completion_status = 0;
e1928c86
MC		 2522 }
2523
dcc7e3a6
MC		 2524 set_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags);
2525 queue_delayed_work(cnic_wq, &cp->delete_task, msecs_to_jiffies(2000));
2526
e1928c86
MC		 2527 kcqe.op_code = FCOE_KCQE_OPCODE_DESTROY_CONN;
2528 kcqe.fcoe_conn_id = req->conn_id;
2529 kcqe.fcoe_conn_context_id = cid;
2530
2531 cqes[0] = (struct kcqe *) &kcqe;
2532 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_FCOE, cqes, 1);
2533 return ret;
2534}
2535
74e49bbd
MC		 2536static void cnic_bnx2x_delete_wait(struct cnic_dev *dev, u32 start_cid)
2537{
2538 struct cnic_local *cp = dev->cnic_priv;
2539 u32 i;
2540
2541 for (i = start_cid; i < cp->max_cid_space; i++) {
2542 struct cnic_context *ctx = &cp->ctx_tbl[i];
2543 int j;
2544
2545 while (test_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags))
2546 msleep(10);
2547
2548 for (j = 0; j < 5; j++) {
2549 if (!test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
2550 break;
2551 msleep(20);
2552 }
2553
2554 if (test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
2555 netdev_warn(dev->netdev, "CID %x not deleted\n",
2556 ctx->cid);
2557 }
2558}
2559
e1928c86
MC		 2560static int cnic_bnx2x_fcoe_fw_destroy(struct cnic_dev *dev, struct kwqe *kwqe)
2561{
2562 struct fcoe_kwqe_destroy *req;
2563 union l5cm_specific_data l5_data;
2564 struct cnic_local *cp = dev->cnic_priv;
5e65789f 2565 struct bnx2x *bp = netdev_priv(dev->netdev);
e1928c86
MC		 2566 int ret;
2567 u32 cid;
2568
74e49bbd
MC		 2569 cnic_bnx2x_delete_wait(dev, MAX_ISCSI_TBL_SZ);
2570
e1928c86 2571 req = (struct fcoe_kwqe_destroy *) kwqe;
5e65789f 2572 cid = BNX2X_HW_CID(bp, cp->fcoe_init_cid);
e1928c86
MC		 2573
2574 memset(&l5_data, 0, sizeof(l5_data));
619c5cb6 2575 ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_DESTROY_FUNC, cid,
e1928c86
MC		 2576 FCOE_CONNECTION_TYPE, &l5_data);
2577 return ret;
2578}
2579
23021c21
MC		 2580static void cnic_bnx2x_kwqe_err(struct cnic_dev *dev, struct kwqe *kwqe)
2581{
2582 struct cnic_local *cp = dev->cnic_priv;
2583 struct kcqe kcqe;
2584 struct kcqe *cqes[1];
2585 u32 cid;
2586 u32 opcode = KWQE_OPCODE(kwqe->kwqe_op_flag);
2587 u32 layer_code = kwqe->kwqe_op_flag & KWQE_LAYER_MASK;
3238a9be 2588 u32 kcqe_op;
23021c21
MC		 2589 int ulp_type;
2590
2591 cid = kwqe->kwqe_info0;
2592 memset(&kcqe, 0, sizeof(kcqe));
2593
3238a9be
MC		 2594 if (layer_code == KWQE_FLAGS_LAYER_MASK_L5_FCOE) {
2595 u32 l5_cid = 0;
2596
2597 ulp_type = CNIC_ULP_FCOE;
2598 if (opcode == FCOE_KWQE_OPCODE_DISABLE_CONN) {
2599 struct fcoe_kwqe_conn_enable_disable *req;
2600
2601 req = (struct fcoe_kwqe_conn_enable_disable *) kwqe;
2602 kcqe_op = FCOE_KCQE_OPCODE_DISABLE_CONN;
2603 cid = req->context_id;
2604 l5_cid = req->conn_id;
2605 } else if (opcode == FCOE_KWQE_OPCODE_DESTROY) {
2606 kcqe_op = FCOE_KCQE_OPCODE_DESTROY_FUNC;
2607 } else {
2608 return;
2609 }
2610 kcqe.kcqe_op_flag = kcqe_op << KCQE_FLAGS_OPCODE_SHIFT;
2611 kcqe.kcqe_op_flag |= KCQE_FLAGS_LAYER_MASK_L5_FCOE;
8ec3e702 2612 kcqe.kcqe_info1 = FCOE_KCQE_COMPLETION_STATUS_PARITY_ERROR;
3238a9be
MC		 2613 kcqe.kcqe_info2 = cid;
2614 kcqe.kcqe_info0 = l5_cid;
2615
2616 } else if (layer_code == KWQE_FLAGS_LAYER_MASK_L5_ISCSI) {
23021c21
MC		 2617 ulp_type = CNIC_ULP_ISCSI;
2618 if (opcode == ISCSI_KWQE_OPCODE_UPDATE_CONN)
2619 cid = kwqe->kwqe_info1;
2620
2621 kcqe.kcqe_op_flag = (opcode + 0x10) << KCQE_FLAGS_OPCODE_SHIFT;
2622 kcqe.kcqe_op_flag |= KCQE_FLAGS_LAYER_MASK_L5_ISCSI;
8ec3e702 2623 kcqe.kcqe_info1 = ISCSI_KCQE_COMPLETION_STATUS_PARITY_ERR;
23021c21
MC		 2624 kcqe.kcqe_info2 = cid;
2625 cnic_get_l5_cid(cp, BNX2X_SW_CID(cid), &kcqe.kcqe_info0);
2626
2627 } else if (layer_code == KWQE_FLAGS_LAYER_MASK_L4) {
2628 struct l4_kcq *l4kcqe = (struct l4_kcq *) &kcqe;
23021c21
MC		 2629
2630 ulp_type = CNIC_ULP_L4;
2631 if (opcode == L4_KWQE_OPCODE_VALUE_CONNECT1)
2632 kcqe_op = L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE;
2633 else if (opcode == L4_KWQE_OPCODE_VALUE_RESET)
2634 kcqe_op = L4_KCQE_OPCODE_VALUE_RESET_COMP;
2635 else if (opcode == L4_KWQE_OPCODE_VALUE_CLOSE)
2636 kcqe_op = L4_KCQE_OPCODE_VALUE_CLOSE_COMP;
2637 else
2638 return;
2639
2640 kcqe.kcqe_op_flag = (kcqe_op << KCQE_FLAGS_OPCODE_SHIFT) |
2641 KCQE_FLAGS_LAYER_MASK_L4;
8ec3e702 2642 l4kcqe->status = L4_KCQE_COMPLETION_STATUS_PARITY_ERROR;
23021c21
MC		 2643 l4kcqe->cid = cid;
2644 cnic_get_l5_cid(cp, BNX2X_SW_CID(cid), &l4kcqe->conn_id);
2645 } else {
2646 return;
2647 }
2648
64699336 2649 cqes[0] = &kcqe;
23021c21
MC		 2650 cnic_reply_bnx2x_kcqes(dev, ulp_type, cqes, 1);
2651}
2652
e1928c86
MC		 2653static int cnic_submit_bnx2x_iscsi_kwqes(struct cnic_dev *dev,
2654 struct kwqe *wqes[], u32 num_wqes)
71034ba8
MC		 2655{
2656 int i, work, ret;
2657 u32 opcode;
2658 struct kwqe *kwqe;
2659
2660 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
2661 return -EAGAIN; /* bnx2 is down */
2662
2663 for (i = 0; i < num_wqes; ) {
2664 kwqe = wqes[i];
2665 opcode = KWQE_OPCODE(kwqe->kwqe_op_flag);
2666 work = 1;
2667
2668 switch (opcode) {
2669 case ISCSI_KWQE_OPCODE_INIT1:
2670 ret = cnic_bnx2x_iscsi_init1(dev, kwqe);
2671 break;
2672 case ISCSI_KWQE_OPCODE_INIT2:
2673 ret = cnic_bnx2x_iscsi_init2(dev, kwqe);
2674 break;
2675 case ISCSI_KWQE_OPCODE_OFFLOAD_CONN1:
2676 ret = cnic_bnx2x_iscsi_ofld1(dev, &wqes[i],
2677 num_wqes - i, &work);
2678 break;
2679 case ISCSI_KWQE_OPCODE_UPDATE_CONN:
2680 ret = cnic_bnx2x_iscsi_update(dev, kwqe);
2681 break;
2682 case ISCSI_KWQE_OPCODE_DESTROY_CONN:
2683 ret = cnic_bnx2x_iscsi_destroy(dev, kwqe);
2684 break;
2685 case L4_KWQE_OPCODE_VALUE_CONNECT1:
2686 ret = cnic_bnx2x_connect(dev, &wqes[i], num_wqes - i,
2687 &work);
2688 break;
2689 case L4_KWQE_OPCODE_VALUE_CLOSE:
2690 ret = cnic_bnx2x_close(dev, kwqe);
2691 break;
2692 case L4_KWQE_OPCODE_VALUE_RESET:
2693 ret = cnic_bnx2x_reset(dev, kwqe);
2694 break;
2695 case L4_KWQE_OPCODE_VALUE_OFFLOAD_PG:
2696 ret = cnic_bnx2x_offload_pg(dev, kwqe);
2697 break;
2698 case L4_KWQE_OPCODE_VALUE_UPDATE_PG:
2699 ret = cnic_bnx2x_update_pg(dev, kwqe);
2700 break;
2701 case L4_KWQE_OPCODE_VALUE_UPLOAD_PG:
2702 ret = 0;
2703 break;
2704 default:
2705 ret = 0;
ddf79b20
JP		 2706 netdev_err(dev->netdev, "Unknown type of KWQE(0x%x)\n",
2707 opcode);
71034ba8
MC		 2708 break;
2709 }
23021c21 2710 if (ret < 0) {
ddf79b20
JP		 2711 netdev_err(dev->netdev, "KWQE(0x%x) failed\n",
2712 opcode);
23021c21
MC		 2713
2714 /* Possibly bnx2x parity error, send completion
2715 * to ulp drivers with error code to speed up
2716 * cleanup and reset recovery.
2717 */
2718 if (ret == -EIO || ret == -EAGAIN)
2719 cnic_bnx2x_kwqe_err(dev, kwqe);
2720 }
71034ba8
MC		 2721 i += work;
2722 }
2723 return 0;
2724}
2725
e1928c86
MC		 2726static int cnic_submit_bnx2x_fcoe_kwqes(struct cnic_dev *dev,
2727 struct kwqe *wqes[], u32 num_wqes)
2728{
104a43ed 2729 struct bnx2x *bp = netdev_priv(dev->netdev);
e1928c86
MC		 2730 int i, work, ret;
2731 u32 opcode;
2732 struct kwqe *kwqe;
2733
2734 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
2735 return -EAGAIN; /* bnx2 is down */
2736
104a43ed 2737 if (!BNX2X_CHIP_IS_E2_PLUS(bp))
e1928c86
MC		 2738 return -EINVAL;
2739
2740 for (i = 0; i < num_wqes; ) {
2741 kwqe = wqes[i];
2742 opcode = KWQE_OPCODE(kwqe->kwqe_op_flag);
2743 work = 1;
2744
2745 switch (opcode) {
2746 case FCOE_KWQE_OPCODE_INIT1:
2747 ret = cnic_bnx2x_fcoe_init1(dev, &wqes[i],
2748 num_wqes - i, &work);
2749 break;
2750 case FCOE_KWQE_OPCODE_OFFLOAD_CONN1:
2751 ret = cnic_bnx2x_fcoe_ofld1(dev, &wqes[i],
2752 num_wqes - i, &work);
2753 break;
2754 case FCOE_KWQE_OPCODE_ENABLE_CONN:
2755 ret = cnic_bnx2x_fcoe_enable(dev, kwqe);
2756 break;
2757 case FCOE_KWQE_OPCODE_DISABLE_CONN:
2758 ret = cnic_bnx2x_fcoe_disable(dev, kwqe);
2759 break;
2760 case FCOE_KWQE_OPCODE_DESTROY_CONN:
2761 ret = cnic_bnx2x_fcoe_destroy(dev, kwqe);
2762 break;
2763 case FCOE_KWQE_OPCODE_DESTROY:
2764 ret = cnic_bnx2x_fcoe_fw_destroy(dev, kwqe);
2765 break;
2766 case FCOE_KWQE_OPCODE_STAT:
2767 ret = cnic_bnx2x_fcoe_stat(dev, kwqe);
2768 break;
2769 default:
2770 ret = 0;
2771 netdev_err(dev->netdev, "Unknown type of KWQE(0x%x)\n",
2772 opcode);
2773 break;
2774 }
3238a9be 2775 if (ret < 0) {
e1928c86
MC		 2776 netdev_err(dev->netdev, "KWQE(0x%x) failed\n",
2777 opcode);
3238a9be
MC		 2778
2779 /* Possibly bnx2x parity error, send completion
2780 * to ulp drivers with error code to speed up
2781 * cleanup and reset recovery.
2782 */
2783 if (ret == -EIO || ret == -EAGAIN)
2784 cnic_bnx2x_kwqe_err(dev, kwqe);
2785 }
e1928c86
MC		 2786 i += work;
2787 }
2788 return 0;
2789}
2790
2791static int cnic_submit_bnx2x_kwqes(struct cnic_dev *dev, struct kwqe *wqes[],
2792 u32 num_wqes)
2793{
2794 int ret = -EINVAL;
2795 u32 layer_code;
2796
2797 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
2798 return -EAGAIN; /* bnx2x is down */
2799
2800 if (!num_wqes)
2801 return 0;
2802
2803 layer_code = wqes[0]->kwqe_op_flag & KWQE_LAYER_MASK;
2804 switch (layer_code) {
2805 case KWQE_FLAGS_LAYER_MASK_L5_ISCSI:
2806 case KWQE_FLAGS_LAYER_MASK_L4:
2807 case KWQE_FLAGS_LAYER_MASK_L2:
2808 ret = cnic_submit_bnx2x_iscsi_kwqes(dev, wqes, num_wqes);
2809 break;
2810
2811 case KWQE_FLAGS_LAYER_MASK_L5_FCOE:
2812 ret = cnic_submit_bnx2x_fcoe_kwqes(dev, wqes, num_wqes);
2813 break;
2814 }
2815 return ret;
2816}
2817
2818static inline u32 cnic_get_kcqe_layer_mask(u32 opflag)
2819{
2820 if (unlikely(KCQE_OPCODE(opflag) == FCOE_RAMROD_CMD_ID_TERMINATE_CONN))
2821 return KCQE_FLAGS_LAYER_MASK_L4;
2822
2823 return opflag & KCQE_FLAGS_LAYER_MASK;
2824}
2825
a4636960
MC		 2826static void service_kcqes(struct cnic_dev *dev, int num_cqes)
2827{
2828 struct cnic_local *cp = dev->cnic_priv;
c2bff63f 2829 int i, j, comp = 0;
a4636960
MC		 2830
2831 i = 0;
2832 j = 1;
2833 while (num_cqes) {
2834 struct cnic_ulp_ops *ulp_ops;
2835 int ulp_type;
2836 u32 kcqe_op_flag = cp->completed_kcq[i]->kcqe_op_flag;
e1928c86 2837 u32 kcqe_layer = cnic_get_kcqe_layer_mask(kcqe_op_flag);
a4636960
MC		 2838
2839 if (unlikely(kcqe_op_flag & KCQE_RAMROD_COMPLETION))
c2bff63f 2840 comp++;
a4636960
MC		 2841
2842 while (j < num_cqes) {
2843 u32 next_op = cp->completed_kcq[i + j]->kcqe_op_flag;
2844
e1928c86 2845 if (cnic_get_kcqe_layer_mask(next_op) != kcqe_layer)
a4636960
MC		 2846 break;
2847
2848 if (unlikely(next_op & KCQE_RAMROD_COMPLETION))
c2bff63f 2849 comp++;
a4636960
MC		 2850 j++;
2851 }
2852
2853 if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_RDMA)
2854 ulp_type = CNIC_ULP_RDMA;
2855 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_ISCSI)
2856 ulp_type = CNIC_ULP_ISCSI;
e1928c86
MC		 2857 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_FCOE)
2858 ulp_type = CNIC_ULP_FCOE;
a4636960
MC		 2859 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L4)
2860 ulp_type = CNIC_ULP_L4;
2861 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L2)
2862 goto end;
2863 else {
ddf79b20
JP		 2864 netdev_err(dev->netdev, "Unknown type of KCQE(0x%x)\n",
2865 kcqe_op_flag);
a4636960
MC		 2866 goto end;
2867 }
2868
2869 rcu_read_lock();
2870 ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
2871 if (likely(ulp_ops)) {
2872 ulp_ops->indicate_kcqes(cp->ulp_handle[ulp_type],
2873 cp->completed_kcq + i, j);
2874 }
2875 rcu_read_unlock();
2876end:
2877 num_cqes -= j;
2878 i += j;
2879 j = 1;
2880 }
c2bff63f
DK		 2881 if (unlikely(comp))
2882 cnic_spq_completion(dev, DRV_CTL_RET_L5_SPQ_CREDIT_CMD, comp);
a4636960
MC		 2883}
2884
644b9d4f 2885static int cnic_get_kcqes(struct cnic_dev *dev, struct kcq_info *info)
a4636960
MC		 2886{
2887 struct cnic_local *cp = dev->cnic_priv;
644b9d4f 2888 u16 i, ri, hw_prod, last;
a4636960
MC		 2889 struct kcqe *kcqe;
2890 int kcqe_cnt = 0, last_cnt = 0;
2891
644b9d4f 2892 i = ri = last = info->sw_prod_idx;
a4636960 2893 ri &= MAX_KCQ_IDX;
644b9d4f 2894 hw_prod = *info->hw_prod_idx_ptr;
59e51373 2895 hw_prod = info->hw_idx(hw_prod);
a4636960
MC		 2896
2897 while ((i != hw_prod) && (kcqe_cnt < MAX_COMPLETED_KCQE)) {
644b9d4f 2898 kcqe = &info->kcq[KCQ_PG(ri)][KCQ_IDX(ri)];
a4636960 2899 cp->completed_kcq[kcqe_cnt++] = kcqe;
59e51373 2900 i = info->next_idx(i);
a4636960
MC		 2901 ri = i & MAX_KCQ_IDX;
2902 if (likely(!(kcqe->kcqe_op_flag & KCQE_FLAGS_NEXT))) {
2903 last_cnt = kcqe_cnt;
2904 last = i;
2905 }
2906 }
2907
644b9d4f 2908 info->sw_prod_idx = last;
a4636960
MC		 2909 return last_cnt;
2910}
2911
48f753d2
MC		 2912static int cnic_l2_completion(struct cnic_local *cp)
2913{
2914 u16 hw_cons, sw_cons;
cd801536 2915 struct cnic_uio_dev *udev = cp->udev;
48f753d2 2916 union eth_rx_cqe *cqe, *cqe_ring = (union eth_rx_cqe *)
2bc4078e 2917 (udev->l2_ring + (2 * BNX2_PAGE_SIZE));
48f753d2
MC		 2918 u32 cmd;
2919 int comp = 0;
2920
2921 if (!test_bit(CNIC_F_BNX2X_CLASS, &cp->dev->flags))
2922 return 0;
2923
2924 hw_cons = *cp->rx_cons_ptr;
2925 if ((hw_cons & BNX2X_MAX_RCQ_DESC_CNT) == BNX2X_MAX_RCQ_DESC_CNT)
2926 hw_cons++;
2927
2928 sw_cons = cp->rx_cons;
2929 while (sw_cons != hw_cons) {
2930 u8 cqe_fp_flags;
2931
2932 cqe = &cqe_ring[sw_cons & BNX2X_MAX_RCQ_DESC_CNT];
2933 cqe_fp_flags = cqe->fast_path_cqe.type_error_flags;
2934 if (cqe_fp_flags & ETH_FAST_PATH_RX_CQE_TYPE) {
2935 cmd = le32_to_cpu(cqe->ramrod_cqe.conn_and_cmd_data);
2936 cmd >>= COMMON_RAMROD_ETH_RX_CQE_CMD_ID_SHIFT;
2937 if (cmd == RAMROD_CMD_ID_ETH_CLIENT_SETUP ||
2938 cmd == RAMROD_CMD_ID_ETH_HALT)
2939 comp++;
2940 }
2941 sw_cons = BNX2X_NEXT_RCQE(sw_cons);
2942 }
2943 return comp;
2944}
2945
86b53606 2946static void cnic_chk_pkt_rings(struct cnic_local *cp)
a4636960 2947{
541a7810 2948 u16 rx_cons, tx_cons;
48f753d2 2949 int comp = 0;
a4636960 2950
541a7810 2951 if (!test_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags))
66fee9ed
MC		 2952 return;
2953
541a7810
MC		 2954 rx_cons = *cp->rx_cons_ptr;
2955 tx_cons = *cp->tx_cons_ptr;
a4636960 2956 if (cp->tx_cons != tx_cons || cp->rx_cons != rx_cons) {
48f753d2
MC		 2957 if (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags))
2958 comp = cnic_l2_completion(cp);
2959
a4636960
MC		 2960 cp->tx_cons = tx_cons;
2961 cp->rx_cons = rx_cons;
71034ba8 2962
cd801536
MC		 2963 if (cp->udev)
2964 uio_event_notify(&cp->udev->cnic_uinfo);
a4636960 2965 }
48f753d2
MC		 2966 if (comp)
2967 clear_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags);
a4636960
MC		 2968}
2969
b177a5d5 2970static u32 cnic_service_bnx2_queues(struct cnic_dev *dev)
a4636960 2971{
a4636960 2972 struct cnic_local *cp = dev->cnic_priv;
b177a5d5 2973 u32 status_idx = (u16) *cp->kcq1.status_idx_ptr;
a4636960
MC		 2974 int kcqe_cnt;
2975
107c3f4d
MC		 2976 /* status block index must be read before reading other fields */
2977 rmb();
a4636960
MC		 2978 cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
2979
644b9d4f 2980 while ((kcqe_cnt = cnic_get_kcqes(dev, &cp->kcq1))) {
a4636960
MC		 2981
2982 service_kcqes(dev, kcqe_cnt);
2983
2984 /* Tell compiler that status_blk fields can change. */
2985 barrier();
93736656
MC		 2986 status_idx = (u16) *cp->kcq1.status_idx_ptr;
2987 /* status block index must be read first */
2988 rmb();
2989 cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
a4636960
MC		 2990 }
2991
644b9d4f 2992 CNIC_WR16(dev, cp->kcq1.io_addr, cp->kcq1.sw_prod_idx);
a4636960 2993
86b53606 2994 cnic_chk_pkt_rings(cp);
b177a5d5 2995
a4636960
MC		 2996 return status_idx;
2997}
2998
b177a5d5 2999static int cnic_service_bnx2(void *data, void *status_blk)
a4636960 3000{
b177a5d5 3001 struct cnic_dev *dev = data;
a4636960 3002
eaaa6e9c
MC		 3003 if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags))) {
3004 struct status_block *sblk = status_blk;
3005
3006 return sblk->status_idx;
3007 }
a4636960 3008
b177a5d5
MC		 3009 return cnic_service_bnx2_queues(dev);
3010}
a4636960 3011
b177a5d5
MC		 3012static void cnic_service_bnx2_msix(unsigned long data)
3013{
3014 struct cnic_dev *dev = (struct cnic_dev *) data;
3015 struct cnic_local *cp = dev->cnic_priv;
a4636960 3016
b177a5d5 3017 cp->last_status_idx = cnic_service_bnx2_queues(dev);
a4636960 3018
a4636960
MC		 3019 CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
3020 BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
3021}
3022
66fee9ed
MC		 3023static void cnic_doirq(struct cnic_dev *dev)
3024{
3025 struct cnic_local *cp = dev->cnic_priv;
66fee9ed
MC		 3026
3027 if (likely(test_bit(CNIC_F_CNIC_UP, &dev->flags))) {
eaaa6e9c
MC		 3028 u16 prod = cp->kcq1.sw_prod_idx & MAX_KCQ_IDX;
3029
66fee9ed 3030 prefetch(cp->status_blk.gen);
e6c28894 3031 prefetch(&cp->kcq1.kcq[KCQ_PG(prod)][KCQ_IDX(prod)]);
66fee9ed
MC		 3032
3033 tasklet_schedule(&cp->cnic_irq_task);
3034 }
3035}
3036
a4636960
MC		 3037static irqreturn_t cnic_irq(int irq, void *dev_instance)
3038{
3039 struct cnic_dev *dev = dev_instance;
3040 struct cnic_local *cp = dev->cnic_priv;
a4636960
MC		 3041
3042 if (cp->ack_int)
3043 cp->ack_int(dev);
3044
66fee9ed 3045 cnic_doirq(dev);
a4636960
MC		 3046
3047 return IRQ_HANDLED;
3048}
3049
71034ba8
MC		 3050static inline void cnic_ack_bnx2x_int(struct cnic_dev *dev, u8 id, u8 storm,
3051 u16 index, u8 op, u8 update)
3052{
5bf945a8
MC		 3053 struct bnx2x *bp = netdev_priv(dev->netdev);
3054 u32 hc_addr = (HC_REG_COMMAND_REG + BP_PORT(bp) * 32 +
71034ba8
MC		 3055 COMMAND_REG_INT_ACK);
3056 struct igu_ack_register igu_ack;
3057
3058 igu_ack.status_block_index = index;
3059 igu_ack.sb_id_and_flags =
3060 ((id << IGU_ACK_REGISTER_STATUS_BLOCK_ID_SHIFT) |
3061 (storm << IGU_ACK_REGISTER_STORM_ID_SHIFT) |
3062 (update << IGU_ACK_REGISTER_UPDATE_INDEX_SHIFT) |
3063 (op << IGU_ACK_REGISTER_INTERRUPT_MODE_SHIFT));
3064
3065 CNIC_WR(dev, hc_addr, (*(u32 *)&igu_ack));
3066}
3067
ee87a82a
MC		 3068static void cnic_ack_igu_sb(struct cnic_dev *dev, u8 igu_sb_id, u8 segment,
3069 u16 index, u8 op, u8 update)
3070{
3071 struct igu_regular cmd_data;
3072 u32 igu_addr = BAR_IGU_INTMEM + (IGU_CMD_INT_ACK_BASE + igu_sb_id) * 8;
3073
3074 cmd_data.sb_id_and_flags =
3075 (index << IGU_REGULAR_SB_INDEX_SHIFT) |
3076 (segment << IGU_REGULAR_SEGMENT_ACCESS_SHIFT) |
3077 (update << IGU_REGULAR_BUPDATE_SHIFT) |
3078 (op << IGU_REGULAR_ENABLE_INT_SHIFT);
3079
3080
3081 CNIC_WR(dev, igu_addr, cmd_data.sb_id_and_flags);
3082}
3083
71034ba8
MC		 3084static void cnic_ack_bnx2x_msix(struct cnic_dev *dev)
3085{
3086 struct cnic_local *cp = dev->cnic_priv;
3087
523224a3 3088 cnic_ack_bnx2x_int(dev, cp->bnx2x_igu_sb_id, CSTORM_ID, 0,
71034ba8
MC		 3089 IGU_INT_DISABLE, 0);
3090}
3091
ee87a82a
MC		 3092static void cnic_ack_bnx2x_e2_msix(struct cnic_dev *dev)
3093{
3094 struct cnic_local *cp = dev->cnic_priv;
3095
3096 cnic_ack_igu_sb(dev, cp->bnx2x_igu_sb_id, IGU_SEG_ACCESS_DEF, 0,
3097 IGU_INT_DISABLE, 0);
3098}
3099
8cc0e028
MC		 3100static void cnic_arm_bnx2x_msix(struct cnic_dev *dev, u32 idx)
3101{
3102 struct cnic_local *cp = dev->cnic_priv;
3103
3104 cnic_ack_bnx2x_int(dev, cp->bnx2x_igu_sb_id, CSTORM_ID, idx,
3105 IGU_INT_ENABLE, 1);
3106}
3107
3108static void cnic_arm_bnx2x_e2_msix(struct cnic_dev *dev, u32 idx)
3109{
3110 struct cnic_local *cp = dev->cnic_priv;
3111
3112 cnic_ack_igu_sb(dev, cp->bnx2x_igu_sb_id, IGU_SEG_ACCESS_DEF, idx,
3113 IGU_INT_ENABLE, 1);
3114}
3115
b177a5d5 3116static u32 cnic_service_bnx2x_kcq(struct cnic_dev *dev, struct kcq_info *info)
71034ba8 3117{
b177a5d5 3118 u32 last_status = *info->status_idx_ptr;
71034ba8
MC		 3119 int kcqe_cnt;
3120
107c3f4d
MC		 3121 /* status block index must be read before reading the KCQ */
3122 rmb();
b177a5d5 3123 while ((kcqe_cnt = cnic_get_kcqes(dev, info))) {
71034ba8
MC		 3124
3125 service_kcqes(dev, kcqe_cnt);
3126
3127 /* Tell compiler that sblk fields can change. */
3128 barrier();
71034ba8 3129
b177a5d5 3130 last_status = *info->status_idx_ptr;
107c3f4d
MC		 3131 /* status block index must be read before reading the KCQ */
3132 rmb();
71034ba8 3133 }
b177a5d5
MC		 3134 return last_status;
3135}
3136
3137static void cnic_service_bnx2x_bh(unsigned long data)
3138{
3139 struct cnic_dev *dev = (struct cnic_dev *) data;
3140 struct cnic_local *cp = dev->cnic_priv;
0197b087 3141 u32 status_idx, new_status_idx;
b177a5d5
MC		 3142
3143 if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags)))
3144 return;
3145
0197b087
MC		 3146 while (1) {
3147 status_idx = cnic_service_bnx2x_kcq(dev, &cp->kcq1);
71034ba8 3148
0197b087
MC		 3149 CNIC_WR16(dev, cp->kcq1.io_addr,
3150 cp->kcq1.sw_prod_idx + MAX_KCQ_IDX);
e21ba414 3151
51a8f54d 3152 if (cp->ethdev->drv_state & CNIC_DRV_STATE_NO_FCOE) {
8cc0e028 3153 cp->arm_int(dev, status_idx);
0197b087
MC		 3154 break;
3155 }
3156
3157 new_status_idx = cnic_service_bnx2x_kcq(dev, &cp->kcq2);
3158
3159 if (new_status_idx != status_idx)
3160 continue;
e21ba414
MC		 3161
3162 CNIC_WR16(dev, cp->kcq2.io_addr, cp->kcq2.sw_prod_idx +
3163 MAX_KCQ_IDX);
3164
ee87a82a
MC		 3165 cnic_ack_igu_sb(dev, cp->bnx2x_igu_sb_id, IGU_SEG_ACCESS_DEF,
3166 status_idx, IGU_INT_ENABLE, 1);
0197b087
MC		 3167
3168 break;
e21ba414 3169 }
71034ba8
MC		 3170}
3171
3172static int cnic_service_bnx2x(void *data, void *status_blk)
3173{
3174 struct cnic_dev *dev = data;
3175 struct cnic_local *cp = dev->cnic_priv;
71034ba8 3176
66fee9ed
MC		 3177 if (!(cp->ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
3178 cnic_doirq(dev);
71034ba8 3179
66fee9ed 3180 cnic_chk_pkt_rings(cp);
71034ba8
MC		 3181
3182 return 0;
3183}
3184
fab0dc89 3185static void cnic_ulp_stop_one(struct cnic_local *cp, int if_type)
a4636960 3186{
fab0dc89 3187 struct cnic_ulp_ops *ulp_ops;
6d7760a8 3188
fab0dc89
DK		 3189 if (if_type == CNIC_ULP_ISCSI)
3190 cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
a4636960 3191
fab0dc89
DK		 3192 mutex_lock(&cnic_lock);
3193 ulp_ops = rcu_dereference_protected(cp->ulp_ops[if_type],
3194 lockdep_is_held(&cnic_lock));
3195 if (!ulp_ops) {
681dbd71 3196 mutex_unlock(&cnic_lock);
fab0dc89
DK		 3197 return;
3198 }
3199 set_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
3200 mutex_unlock(&cnic_lock);
a4636960 3201
fab0dc89
DK		 3202 if (test_and_clear_bit(ULP_F_START, &cp->ulp_flags[if_type]))
3203 ulp_ops->cnic_stop(cp->ulp_handle[if_type]);
681dbd71 3204
fab0dc89
DK		 3205 clear_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
3206}
3207
3208static void cnic_ulp_stop(struct cnic_dev *dev)
3209{
3210 struct cnic_local *cp = dev->cnic_priv;
3211 int if_type;
3212
3213 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++)
3214 cnic_ulp_stop_one(cp, if_type);
a4636960
MC		 3215}
3216
3217static void cnic_ulp_start(struct cnic_dev *dev)
3218{
3219 struct cnic_local *cp = dev->cnic_priv;
3220 int if_type;
3221
a4636960
MC		 3222 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
3223 struct cnic_ulp_ops *ulp_ops;
3224
681dbd71 3225 mutex_lock(&cnic_lock);
13707f9e
ED		 3226 ulp_ops = rcu_dereference_protected(cp->ulp_ops[if_type],
3227 lockdep_is_held(&cnic_lock));
681dbd71
MC		 3228 if (!ulp_ops || !ulp_ops->cnic_start) {
3229 mutex_unlock(&cnic_lock);
a4636960 3230 continue;
681dbd71
MC		 3231 }
3232 set_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
3233 mutex_unlock(&cnic_lock);
a4636960
MC		 3234
3235 if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[if_type]))
3236 ulp_ops->cnic_start(cp->ulp_handle[if_type]);
681dbd71
MC		 3237
3238 clear_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
a4636960 3239 }
a4636960
MC		 3240}
3241
1d187b34
BW		 3242static int cnic_copy_ulp_stats(struct cnic_dev *dev, int ulp_type)
3243{
3244 struct cnic_local *cp = dev->cnic_priv;
3245 struct cnic_ulp_ops *ulp_ops;
3246 int rc;
3247
3248 mutex_lock(&cnic_lock);
3249 ulp_ops = cnic_ulp_tbl_prot(ulp_type);
3250 if (ulp_ops && ulp_ops->cnic_get_stats)
3251 rc = ulp_ops->cnic_get_stats(cp->ulp_handle[ulp_type]);
3252 else
3253 rc = -ENODEV;
3254 mutex_unlock(&cnic_lock);
3255 return rc;
3256}
3257
a4636960
MC		 3258static int cnic_ctl(void *data, struct cnic_ctl_info *info)
3259{
3260 struct cnic_dev *dev = data;
1d187b34 3261 int ulp_type = CNIC_ULP_ISCSI;
a4636960
MC		 3262
3263 switch (info->cmd) {
3264 case CNIC_CTL_STOP_CMD:
3265 cnic_hold(dev);
a4636960
MC		 3266
3267 cnic_ulp_stop(dev);
3268 cnic_stop_hw(dev);
3269
a4636960
MC		 3270 cnic_put(dev);
3271 break;
3272 case CNIC_CTL_START_CMD:
3273 cnic_hold(dev);
a4636960
MC		 3274
3275 if (!cnic_start_hw(dev))
3276 cnic_ulp_start(dev);
3277
a4636960
MC		 3278 cnic_put(dev);
3279 break;
fab0dc89
DK		 3280 case CNIC_CTL_STOP_ISCSI_CMD: {
3281 struct cnic_local *cp = dev->cnic_priv;
3282 set_bit(CNIC_LCL_FL_STOP_ISCSI, &cp->cnic_local_flags);
3283 queue_delayed_work(cnic_wq, &cp->delete_task, 0);
3284 break;
3285 }
71034ba8 3286 case CNIC_CTL_COMPLETION_CMD: {
619c5cb6
VZ		 3287 struct cnic_ctl_completion *comp = &info->data.comp;
3288 u32 cid = BNX2X_SW_CID(comp->cid);
71034ba8
MC		 3289 u32 l5_cid;
3290 struct cnic_local *cp = dev->cnic_priv;
3291
a2028b23
MC		 3292 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
3293 break;
3294
71034ba8
MC		 3295 if (cnic_get_l5_cid(cp, cid, &l5_cid) == 0) {
3296 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
3297
619c5cb6
VZ		 3298 if (unlikely(comp->error)) {
3299 set_bit(CTX_FL_CID_ERROR, &ctx->ctx_flags);
3300 netdev_err(dev->netdev,
3301 "CID %x CFC delete comp error %x\n",
3302 cid, comp->error);
3303 }
3304
71034ba8
MC		 3305 ctx->wait_cond = 1;
3306 wake_up(&ctx->waitq);
3307 }
3308 break;
3309 }
1d187b34
BW		 3310 case CNIC_CTL_FCOE_STATS_GET_CMD:
3311 ulp_type = CNIC_ULP_FCOE;
3312 /* fall through */
3313 case CNIC_CTL_ISCSI_STATS_GET_CMD:
3314 cnic_hold(dev);
3315 cnic_copy_ulp_stats(dev, ulp_type);
3316 cnic_put(dev);
3317 break;
3318
a4636960
MC		 3319 default:
3320 return -EINVAL;
3321 }
3322 return 0;
3323}
3324
3325static void cnic_ulp_init(struct cnic_dev *dev)
3326{
3327 int i;
3328 struct cnic_local *cp = dev->cnic_priv;
3329
a4636960
MC		 3330 for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
3331 struct cnic_ulp_ops *ulp_ops;
3332
7fc1ece4 3333 mutex_lock(&cnic_lock);
13707f9e 3334 ulp_ops = cnic_ulp_tbl_prot(i);
7fc1ece4
MC		 3335 if (!ulp_ops || !ulp_ops->cnic_init) {
3336 mutex_unlock(&cnic_lock);
a4636960 3337 continue;
7fc1ece4
MC		 3338 }
3339 ulp_get(ulp_ops);
3340 mutex_unlock(&cnic_lock);
a4636960
MC		 3341
3342 if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[i]))
3343 ulp_ops->cnic_init(dev);
3344
7fc1ece4 3345 ulp_put(ulp_ops);
a4636960 3346 }
a4636960
MC		 3347}
3348
3349static void cnic_ulp_exit(struct cnic_dev *dev)
3350{
3351 int i;
3352 struct cnic_local *cp = dev->cnic_priv;
3353
a4636960
MC		 3354 for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
3355 struct cnic_ulp_ops *ulp_ops;
3356
7fc1ece4 3357 mutex_lock(&cnic_lock);
13707f9e 3358 ulp_ops = cnic_ulp_tbl_prot(i);
7fc1ece4
MC		 3359 if (!ulp_ops || !ulp_ops->cnic_exit) {
3360 mutex_unlock(&cnic_lock);
a4636960 3361 continue;
7fc1ece4
MC		 3362 }
3363 ulp_get(ulp_ops);
3364 mutex_unlock(&cnic_lock);
a4636960
MC		 3365
3366 if (test_and_clear_bit(ULP_F_INIT, &cp->ulp_flags[i]))
3367 ulp_ops->cnic_exit(dev);
3368
7fc1ece4 3369 ulp_put(ulp_ops);
a4636960 3370 }
a4636960
MC		 3371}
3372
3373static int cnic_cm_offload_pg(struct cnic_sock *csk)
3374{
3375 struct cnic_dev *dev = csk->dev;
3376 struct l4_kwq_offload_pg *l4kwqe;
3377 struct kwqe *wqes[1];
3378
3379 l4kwqe = (struct l4_kwq_offload_pg *) &csk->kwqe1;
3380 memset(l4kwqe, 0, sizeof(*l4kwqe));
3381 wqes[0] = (struct kwqe *) l4kwqe;
3382
3383 l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_OFFLOAD_PG;
3384 l4kwqe->flags =
3385 L4_LAYER_CODE << L4_KWQ_OFFLOAD_PG_LAYER_CODE_SHIFT;
3386 l4kwqe->l2hdr_nbytes = ETH_HLEN;
3387
3388 l4kwqe->da0 = csk->ha[0];
3389 l4kwqe->da1 = csk->ha[1];
3390 l4kwqe->da2 = csk->ha[2];
3391 l4kwqe->da3 = csk->ha[3];
3392 l4kwqe->da4 = csk->ha[4];
3393 l4kwqe->da5 = csk->ha[5];
3394
3395 l4kwqe->sa0 = dev->mac_addr[0];
3396 l4kwqe->sa1 = dev->mac_addr[1];
3397 l4kwqe->sa2 = dev->mac_addr[2];
3398 l4kwqe->sa3 = dev->mac_addr[3];
3399 l4kwqe->sa4 = dev->mac_addr[4];
3400 l4kwqe->sa5 = dev->mac_addr[5];
3401
3402 l4kwqe->etype = ETH_P_IP;
a9736c08 3403 l4kwqe->ipid_start = DEF_IPID_START;
a4636960
MC		 3404 l4kwqe->host_opaque = csk->l5_cid;
3405
3406 if (csk->vlan_id) {
3407 l4kwqe->pg_flags |= L4_KWQ_OFFLOAD_PG_VLAN_TAGGING;
3408 l4kwqe->vlan_tag = csk->vlan_id;
3409 l4kwqe->l2hdr_nbytes += 4;
3410 }
3411
3412 return dev->submit_kwqes(dev, wqes, 1);
3413}
3414
3415static int cnic_cm_update_pg(struct cnic_sock *csk)
3416{
3417 struct cnic_dev *dev = csk->dev;
3418 struct l4_kwq_update_pg *l4kwqe;
3419 struct kwqe *wqes[1];
3420
3421 l4kwqe = (struct l4_kwq_update_pg *) &csk->kwqe1;
3422 memset(l4kwqe, 0, sizeof(*l4kwqe));
3423 wqes[0] = (struct kwqe *) l4kwqe;
3424
3425 l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPDATE_PG;
3426 l4kwqe->flags =
3427 L4_LAYER_CODE << L4_KWQ_UPDATE_PG_LAYER_CODE_SHIFT;
3428 l4kwqe->pg_cid = csk->pg_cid;
3429
3430 l4kwqe->da0 = csk->ha[0];
3431 l4kwqe->da1 = csk->ha[1];
3432 l4kwqe->da2 = csk->ha[2];
3433 l4kwqe->da3 = csk->ha[3];
3434 l4kwqe->da4 = csk->ha[4];
3435 l4kwqe->da5 = csk->ha[5];
3436
3437 l4kwqe->pg_host_opaque = csk->l5_cid;
3438 l4kwqe->pg_valids = L4_KWQ_UPDATE_PG_VALIDS_DA;
3439
3440 return dev->submit_kwqes(dev, wqes, 1);
3441}
3442
3443static int cnic_cm_upload_pg(struct cnic_sock *csk)
3444{
3445 struct cnic_dev *dev = csk->dev;
3446 struct l4_kwq_upload *l4kwqe;
3447 struct kwqe *wqes[1];
3448
3449 l4kwqe = (struct l4_kwq_upload *) &csk->kwqe1;
3450 memset(l4kwqe, 0, sizeof(*l4kwqe));
3451 wqes[0] = (struct kwqe *) l4kwqe;
3452
3453 l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPLOAD_PG;
3454 l4kwqe->flags =
3455 L4_LAYER_CODE << L4_KWQ_UPLOAD_LAYER_CODE_SHIFT;
3456 l4kwqe->cid = csk->pg_cid;
3457
3458 return dev->submit_kwqes(dev, wqes, 1);
3459}
3460
3461static int cnic_cm_conn_req(struct cnic_sock *csk)
3462{
3463 struct cnic_dev *dev = csk->dev;
3464 struct l4_kwq_connect_req1 *l4kwqe1;
3465 struct l4_kwq_connect_req2 *l4kwqe2;
3466 struct l4_kwq_connect_req3 *l4kwqe3;
3467 struct kwqe *wqes[3];
3468 u8 tcp_flags = 0;
3469 int num_wqes = 2;
3470
3471 l4kwqe1 = (struct l4_kwq_connect_req1 *) &csk->kwqe1;
3472 l4kwqe2 = (struct l4_kwq_connect_req2 *) &csk->kwqe2;
3473 l4kwqe3 = (struct l4_kwq_connect_req3 *) &csk->kwqe3;
3474 memset(l4kwqe1, 0, sizeof(*l4kwqe1));
3475 memset(l4kwqe2, 0, sizeof(*l4kwqe2));
3476 memset(l4kwqe3, 0, sizeof(*l4kwqe3));
3477
3478 l4kwqe3->op_code = L4_KWQE_OPCODE_VALUE_CONNECT3;
3479 l4kwqe3->flags =
3480 L4_LAYER_CODE << L4_KWQ_CONNECT_REQ3_LAYER_CODE_SHIFT;
3481 l4kwqe3->ka_timeout = csk->ka_timeout;
3482 l4kwqe3->ka_interval = csk->ka_interval;
3483 l4kwqe3->ka_max_probe_count = csk->ka_max_probe_count;
3484 l4kwqe3->tos = csk->tos;
3485 l4kwqe3->ttl = csk->ttl;
3486 l4kwqe3->snd_seq_scale = csk->snd_seq_scale;
3487 l4kwqe3->pmtu = csk->mtu;
3488 l4kwqe3->rcv_buf = csk->rcv_buf;
3489 l4kwqe3->snd_buf = csk->snd_buf;
3490 l4kwqe3->seed = csk->seed;
3491
3492 wqes[0] = (struct kwqe *) l4kwqe1;
3493 if (test_bit(SK_F_IPV6, &csk->flags)) {
3494 wqes[1] = (struct kwqe *) l4kwqe2;
3495 wqes[2] = (struct kwqe *) l4kwqe3;
3496 num_wqes = 3;
3497
3498 l4kwqe1->conn_flags = L4_KWQ_CONNECT_REQ1_IP_V6;
3499 l4kwqe2->op_code = L4_KWQE_OPCODE_VALUE_CONNECT2;
3500 l4kwqe2->flags =
3501 L4_KWQ_CONNECT_REQ2_LINKED_WITH_NEXT |
3502 L4_LAYER_CODE << L4_KWQ_CONNECT_REQ2_LAYER_CODE_SHIFT;
3503 l4kwqe2->src_ip_v6_2 = be32_to_cpu(csk->src_ip[1]);
3504 l4kwqe2->src_ip_v6_3 = be32_to_cpu(csk->src_ip[2]);
3505 l4kwqe2->src_ip_v6_4 = be32_to_cpu(csk->src_ip[3]);
3506 l4kwqe2->dst_ip_v6_2 = be32_to_cpu(csk->dst_ip[1]);
3507 l4kwqe2->dst_ip_v6_3 = be32_to_cpu(csk->dst_ip[2]);
3508 l4kwqe2->dst_ip_v6_4 = be32_to_cpu(csk->dst_ip[3]);
3509 l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct ipv6hdr) -
3510 sizeof(struct tcphdr);
3511 } else {
3512 wqes[1] = (struct kwqe *) l4kwqe3;
3513 l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct iphdr) -
3514 sizeof(struct tcphdr);
3515 }
3516
3517 l4kwqe1->op_code = L4_KWQE_OPCODE_VALUE_CONNECT1;
3518 l4kwqe1->flags =
3519 (L4_LAYER_CODE << L4_KWQ_CONNECT_REQ1_LAYER_CODE_SHIFT) |
3520 L4_KWQ_CONNECT_REQ3_LINKED_WITH_NEXT;
3521 l4kwqe1->cid = csk->cid;
3522 l4kwqe1->pg_cid = csk->pg_cid;
3523 l4kwqe1->src_ip = be32_to_cpu(csk->src_ip[0]);
3524 l4kwqe1->dst_ip = be32_to_cpu(csk->dst_ip[0]);
3525 l4kwqe1->src_port = be16_to_cpu(csk->src_port);
3526 l4kwqe1->dst_port = be16_to_cpu(csk->dst_port);
3527 if (csk->tcp_flags & SK_TCP_NO_DELAY_ACK)
3528 tcp_flags |= L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK;
3529 if (csk->tcp_flags & SK_TCP_KEEP_ALIVE)
3530 tcp_flags |= L4_KWQ_CONNECT_REQ1_KEEP_ALIVE;
3531 if (csk->tcp_flags & SK_TCP_NAGLE)
3532 tcp_flags |= L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE;
3533 if (csk->tcp_flags & SK_TCP_TIMESTAMP)
3534 tcp_flags |= L4_KWQ_CONNECT_REQ1_TIME_STAMP;
3535 if (csk->tcp_flags & SK_TCP_SACK)
3536 tcp_flags |= L4_KWQ_CONNECT_REQ1_SACK;
3537 if (csk->tcp_flags & SK_TCP_SEG_SCALING)
3538 tcp_flags |= L4_KWQ_CONNECT_REQ1_SEG_SCALING;
3539
3540 l4kwqe1->tcp_flags = tcp_flags;
3541
3542 return dev->submit_kwqes(dev, wqes, num_wqes);
3543}
3544
3545static int cnic_cm_close_req(struct cnic_sock *csk)
3546{
3547 struct cnic_dev *dev = csk->dev;
3548 struct l4_kwq_close_req *l4kwqe;
3549 struct kwqe *wqes[1];
3550
3551 l4kwqe = (struct l4_kwq_close_req *) &csk->kwqe2;
3552 memset(l4kwqe, 0, sizeof(*l4kwqe));
3553 wqes[0] = (struct kwqe *) l4kwqe;
3554
3555 l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_CLOSE;
3556 l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_CLOSE_REQ_LAYER_CODE_SHIFT;
3557 l4kwqe->cid = csk->cid;
3558
3559 return dev->submit_kwqes(dev, wqes, 1);
3560}
3561
3562static int cnic_cm_abort_req(struct cnic_sock *csk)
3563{
3564 struct cnic_dev *dev = csk->dev;
3565 struct l4_kwq_reset_req *l4kwqe;
3566 struct kwqe *wqes[1];
3567
3568 l4kwqe = (struct l4_kwq_reset_req *) &csk->kwqe2;
3569 memset(l4kwqe, 0, sizeof(*l4kwqe));
3570 wqes[0] = (struct kwqe *) l4kwqe;
3571
3572 l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_RESET;
3573 l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_RESET_REQ_LAYER_CODE_SHIFT;
3574 l4kwqe->cid = csk->cid;
3575
3576 return dev->submit_kwqes(dev, wqes, 1);
3577}
3578
3579static int cnic_cm_create(struct cnic_dev *dev, int ulp_type, u32 cid,
3580 u32 l5_cid, struct cnic_sock **csk, void *context)
3581{
3582 struct cnic_local *cp = dev->cnic_priv;
3583 struct cnic_sock *csk1;
3584
3585 if (l5_cid >= MAX_CM_SK_TBL_SZ)
3586 return -EINVAL;
3587
fdf24086
MC		 3588 if (cp->ctx_tbl) {
3589 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
3590
3591 if (test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
3592 return -EAGAIN;
3593 }
3594
a4636960
MC		 3595 csk1 = &cp->csk_tbl[l5_cid];
3596 if (atomic_read(&csk1->ref_count))
3597 return -EAGAIN;
3598
3599 if (test_and_set_bit(SK_F_INUSE, &csk1->flags))
3600 return -EBUSY;
3601
3602 csk1->dev = dev;
3603 csk1->cid = cid;
3604 csk1->l5_cid = l5_cid;
3605 csk1->ulp_type = ulp_type;
3606 csk1->context = context;
3607
3608 csk1->ka_timeout = DEF_KA_TIMEOUT;
3609 csk1->ka_interval = DEF_KA_INTERVAL;
3610 csk1->ka_max_probe_count = DEF_KA_MAX_PROBE_COUNT;
3611 csk1->tos = DEF_TOS;
3612 csk1->ttl = DEF_TTL;
3613 csk1->snd_seq_scale = DEF_SND_SEQ_SCALE;
3614 csk1->rcv_buf = DEF_RCV_BUF;
3615 csk1->snd_buf = DEF_SND_BUF;
3616 csk1->seed = DEF_SEED;
6cdcdbba 3617 csk1->tcp_flags = 0;
a4636960
MC		 3618
3619 *csk = csk1;
3620 return 0;
3621}
3622
3623static void cnic_cm_cleanup(struct cnic_sock *csk)
3624{
3625 if (csk->src_port) {
3626 struct cnic_dev *dev = csk->dev;
3627 struct cnic_local *cp = dev->cnic_priv;
3628
9b093360 3629 cnic_free_id(&cp->csk_port_tbl, be16_to_cpu(csk->src_port));
a4636960
MC		 3630 csk->src_port = 0;
3631 }
3632}
3633
3634static void cnic_close_conn(struct cnic_sock *csk)
3635{
3636 if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags)) {
3637 cnic_cm_upload_pg(csk);
3638 clear_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
3639 }
3640 cnic_cm_cleanup(csk);
3641}
3642
3643static int cnic_cm_destroy(struct cnic_sock *csk)
3644{
3645 if (!cnic_in_use(csk))
3646 return -EINVAL;
3647
3648 csk_hold(csk);
3649 clear_bit(SK_F_INUSE, &csk->flags);
3650 smp_mb__after_clear_bit();
3651 while (atomic_read(&csk->ref_count) != 1)
3652 msleep(1);
3653 cnic_cm_cleanup(csk);
3654
3655 csk->flags = 0;
3656 csk_put(csk);
3657 return 0;
3658}
3659
3660static inline u16 cnic_get_vlan(struct net_device *dev,
3661 struct net_device **vlan_dev)
3662{
3663 if (dev->priv_flags & IFF_802_1Q_VLAN) {
3664 *vlan_dev = vlan_dev_real_dev(dev);
3665 return vlan_dev_vlan_id(dev);
3666 }
3667 *vlan_dev = dev;
3668 return 0;
3669}
3670
3671static int cnic_get_v4_route(struct sockaddr_in *dst_addr,
3672 struct dst_entry **dst)
3673{
faea56c9 3674#if defined(CONFIG_INET)
a4636960
MC		 3675 struct rtable *rt;
3676
78fbfd8a
DM		 3677 rt = ip_route_output(&init_net, dst_addr->sin_addr.s_addr, 0, 0, 0);
3678 if (!IS_ERR(rt)) {
d8d1f30b 3679 *dst = &rt->dst;
78fbfd8a
DM		 3680 return 0;
3681 }
3682 return PTR_ERR(rt);
faea56c9
RD		 3683#else
3684 return -ENETUNREACH;
3685#endif
a4636960
MC		 3686}
3687
3688static int cnic_get_v6_route(struct sockaddr_in6 *dst_addr,
3689 struct dst_entry **dst)
3690{
faea56c9 3691#if defined(CONFIG_IPV6) || (defined(CONFIG_IPV6_MODULE) && defined(MODULE))
4c9483b2 3692 struct flowi6 fl6;
a4636960 3693
4c9483b2 3694 memset(&fl6, 0, sizeof(fl6));
4e3fd7a0 3695 fl6.daddr = dst_addr->sin6_addr;
4c9483b2
DM		 3696 if (ipv6_addr_type(&fl6.daddr) & IPV6_ADDR_LINKLOCAL)
3697 fl6.flowi6_oif = dst_addr->sin6_scope_id;
a4636960 3698
4c9483b2 3699 *dst = ip6_route_output(&init_net, NULL, &fl6);
0541743b
RL		 3700 if ((*dst)->error) {
3701 dst_release(*dst);
3702 *dst = NULL;
3703 return -ENETUNREACH;
3704 } else
a4636960
MC		 3705 return 0;
3706#endif
3707
3708 return -ENETUNREACH;
3709}
3710
3711static struct cnic_dev *cnic_cm_select_dev(struct sockaddr_in *dst_addr,
3712 int ulp_type)
3713{
3714 struct cnic_dev *dev = NULL;
3715 struct dst_entry *dst;
3716 struct net_device *netdev = NULL;
3717 int err = -ENETUNREACH;
3718
3719 if (dst_addr->sin_family == AF_INET)
3720 err = cnic_get_v4_route(dst_addr, &dst);
3721 else if (dst_addr->sin_family == AF_INET6) {
3722 struct sockaddr_in6 *dst_addr6 =
3723 (struct sockaddr_in6 *) dst_addr;
3724
3725 err = cnic_get_v6_route(dst_addr6, &dst);
3726 } else
3727 return NULL;
3728
3729 if (err)
3730 return NULL;
3731
3732 if (!dst->dev)
3733 goto done;
3734
3735 cnic_get_vlan(dst->dev, &netdev);
3736
3737 dev = cnic_from_netdev(netdev);
3738
3739done:
3740 dst_release(dst);
3741 if (dev)
3742 cnic_put(dev);
3743 return dev;
3744}
3745
3746static int cnic_resolve_addr(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
3747{
3748 struct cnic_dev *dev = csk->dev;
3749 struct cnic_local *cp = dev->cnic_priv;
3750
3751 return cnic_send_nlmsg(cp, ISCSI_KEVENT_PATH_REQ, csk);
3752}
3753
3754static int cnic_get_route(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
3755{
3756 struct cnic_dev *dev = csk->dev;
3757 struct cnic_local *cp = dev->cnic_priv;
c76284af
MC		 3758 int is_v6, rc = 0;
3759 struct dst_entry *dst = NULL;
a4636960 3760 struct net_device *realdev;
9b093360
MC		 3761 __be16 local_port;
3762 u32 port_id;
a4636960
MC		 3763
3764 if (saddr->local.v6.sin6_family == AF_INET6 &&
3765 saddr->remote.v6.sin6_family == AF_INET6)
3766 is_v6 = 1;
3767 else if (saddr->local.v4.sin_family == AF_INET &&
3768 saddr->remote.v4.sin_family == AF_INET)
3769 is_v6 = 0;
3770 else
3771 return -EINVAL;
3772
3773 clear_bit(SK_F_IPV6, &csk->flags);
3774
3775 if (is_v6) {
a4636960 3776 set_bit(SK_F_IPV6, &csk->flags);
c76284af 3777 cnic_get_v6_route(&saddr->remote.v6, &dst);
a4636960
MC		 3778
3779 memcpy(&csk->dst_ip[0], &saddr->remote.v6.sin6_addr,
3780 sizeof(struct in6_addr));
3781 csk->dst_port = saddr->remote.v6.sin6_port;
3782 local_port = saddr->local.v6.sin6_port;
a4636960
MC		 3783
3784 } else {
c76284af 3785 cnic_get_v4_route(&saddr->remote.v4, &dst);
a4636960
MC		 3786
3787 csk->dst_ip[0] = saddr->remote.v4.sin_addr.s_addr;
3788 csk->dst_port = saddr->remote.v4.sin_port;
3789 local_port = saddr->local.v4.sin_port;
3790 }
3791
c76284af
MC		 3792 csk->vlan_id = 0;
3793 csk->mtu = dev->netdev->mtu;
3794 if (dst && dst->dev) {
3795 u16 vlan = cnic_get_vlan(dst->dev, &realdev);
3796 if (realdev == dev->netdev) {
3797 csk->vlan_id = vlan;
3798 csk->mtu = dst_mtu(dst);
3799 }
3800 }
a4636960 3801
9b093360
MC		 3802 port_id = be16_to_cpu(local_port);
3803 if (port_id >= CNIC_LOCAL_PORT_MIN &&
3804 port_id < CNIC_LOCAL_PORT_MAX) {
3805 if (cnic_alloc_id(&cp->csk_port_tbl, port_id))
3806 port_id = 0;
a4636960 3807 } else
9b093360 3808 port_id = 0;
a4636960 3809
9b093360
MC		 3810 if (!port_id) {
3811 port_id = cnic_alloc_new_id(&cp->csk_port_tbl);
3812 if (port_id == -1) {
a4636960
MC		 3813 rc = -ENOMEM;
3814 goto err_out;
3815 }
9b093360 3816 local_port = cpu_to_be16(port_id);
a4636960
MC		 3817 }
3818 csk->src_port = local_port;
3819
a4636960
MC		 3820err_out:
3821 dst_release(dst);
3822 return rc;
3823}
3824
3825static void cnic_init_csk_state(struct cnic_sock *csk)
3826{
3827 csk->state = 0;
3828 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3829 clear_bit(SK_F_CLOSING, &csk->flags);
3830}
3831
3832static int cnic_cm_connect(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
3833{
fab0dc89 3834 struct cnic_local *cp = csk->dev->cnic_priv;
a4636960
MC		 3835 int err = 0;
3836
fab0dc89
DK		 3837 if (cp->ethdev->drv_state & CNIC_DRV_STATE_NO_ISCSI)
3838 return -EOPNOTSUPP;
3839
a4636960
MC		 3840 if (!cnic_in_use(csk))
3841 return -EINVAL;
3842
3843 if (test_and_set_bit(SK_F_CONNECT_START, &csk->flags))
3844 return -EINVAL;
3845
3846 cnic_init_csk_state(csk);
3847
3848 err = cnic_get_route(csk, saddr);
3849 if (err)
3850 goto err_out;
3851
3852 err = cnic_resolve_addr(csk, saddr);
3853 if (!err)
3854 return 0;
3855
3856err_out:
3857 clear_bit(SK_F_CONNECT_START, &csk->flags);
3858 return err;
3859}
3860
3861static int cnic_cm_abort(struct cnic_sock *csk)
3862{
3863 struct cnic_local *cp = csk->dev->cnic_priv;
7b34a464 3864 u32 opcode = L4_KCQE_OPCODE_VALUE_RESET_COMP;
a4636960
MC		 3865
3866 if (!cnic_in_use(csk))
3867 return -EINVAL;
3868
3869 if (cnic_abort_prep(csk))
3870 return cnic_cm_abort_req(csk);
3871
3872 /* Getting here means that we haven't started connect, or
0d650ec7 3873 * connect was not successful, or it has been reset by the target.
a4636960
MC		 3874 */
3875
a4636960 3876 cp->close_conn(csk, opcode);
0d650ec7
EW		 3877 if (csk->state != opcode) {
3878 /* Wait for remote reset sequence to complete */
3879 while (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
3880 msleep(1);
3881
7b34a464 3882 return -EALREADY;
0d650ec7 3883 }
a4636960
MC		 3884
3885 return 0;
3886}
3887
3888static int cnic_cm_close(struct cnic_sock *csk)
3889{
3890 if (!cnic_in_use(csk))
3891 return -EINVAL;
3892
3893 if (cnic_close_prep(csk)) {
3894 csk->state = L4_KCQE_OPCODE_VALUE_CLOSE_COMP;
3895 return cnic_cm_close_req(csk);
ed99daa5 3896 } else {
0d650ec7
EW		 3897 /* Wait for remote reset sequence to complete */
3898 while (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
3899 msleep(1);
3900
ed99daa5 3901 return -EALREADY;
a4636960
MC		 3902 }
3903 return 0;
3904}
3905
3906static void cnic_cm_upcall(struct cnic_local *cp, struct cnic_sock *csk,
3907 u8 opcode)
3908{
3909 struct cnic_ulp_ops *ulp_ops;
3910 int ulp_type = csk->ulp_type;
3911
3912 rcu_read_lock();
3913 ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
3914 if (ulp_ops) {
3915 if (opcode == L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE)
3916 ulp_ops->cm_connect_complete(csk);
3917 else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_COMP)
3918 ulp_ops->cm_close_complete(csk);
3919 else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED)
3920 ulp_ops->cm_remote_abort(csk);
3921 else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_COMP)
3922 ulp_ops->cm_abort_complete(csk);
3923 else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED)
3924 ulp_ops->cm_remote_close(csk);
3925 }
3926 rcu_read_unlock();
3927}
3928
3929static int cnic_cm_set_pg(struct cnic_sock *csk)
3930{
3931 if (cnic_offld_prep(csk)) {
3932 if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
3933 cnic_cm_update_pg(csk);
3934 else
3935 cnic_cm_offload_pg(csk);
3936 }
3937 return 0;
3938}
3939
3940static void cnic_cm_process_offld_pg(struct cnic_dev *dev, struct l4_kcq *kcqe)
3941{
3942 struct cnic_local *cp = dev->cnic_priv;
3943 u32 l5_cid = kcqe->pg_host_opaque;
3944 u8 opcode = kcqe->op_code;
3945 struct cnic_sock *csk = &cp->csk_tbl[l5_cid];
3946
3947 csk_hold(csk);
3948 if (!cnic_in_use(csk))
3949 goto done;
3950
3951 if (opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
3952 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3953 goto done;
3954 }
a9736c08
EW		 3955 /* Possible PG kcqe status: SUCCESS, OFFLOADED_PG, or CTX_ALLOC_FAIL */
3956 if (kcqe->status == L4_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAIL) {
3957 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3958 cnic_cm_upcall(cp, csk,
3959 L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE);
3960 goto done;
3961 }
3962
a4636960
MC		 3963 csk->pg_cid = kcqe->pg_cid;
3964 set_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
3965 cnic_cm_conn_req(csk);
3966
3967done:
3968 csk_put(csk);
3969}
3970
e1928c86
MC		 3971static void cnic_process_fcoe_term_conn(struct cnic_dev *dev, struct kcqe *kcqe)
3972{
3973 struct cnic_local *cp = dev->cnic_priv;
3974 struct fcoe_kcqe *fc_kcqe = (struct fcoe_kcqe *) kcqe;
3975 u32 l5_cid = fc_kcqe->fcoe_conn_id + BNX2X_FCOE_L5_CID_BASE;
3976 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
3977
3978 ctx->timestamp = jiffies;
3979 ctx->wait_cond = 1;
3980 wake_up(&ctx->waitq);
3981}
3982
a4636960
MC		 3983static void cnic_cm_process_kcqe(struct cnic_dev *dev, struct kcqe *kcqe)
3984{
3985 struct cnic_local *cp = dev->cnic_priv;
3986 struct l4_kcq *l4kcqe = (struct l4_kcq *) kcqe;
3987 u8 opcode = l4kcqe->op_code;
3988 u32 l5_cid;
3989 struct cnic_sock *csk;
3990
e1928c86
MC		 3991 if (opcode == FCOE_RAMROD_CMD_ID_TERMINATE_CONN) {
3992 cnic_process_fcoe_term_conn(dev, kcqe);
3993 return;
3994 }
a4636960
MC		 3995 if (opcode == L4_KCQE_OPCODE_VALUE_OFFLOAD_PG ||
3996 opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
3997 cnic_cm_process_offld_pg(dev, l4kcqe);
3998 return;
3999 }
4000
4001 l5_cid = l4kcqe->conn_id;
4002 if (opcode & 0x80)
4003 l5_cid = l4kcqe->cid;
4004 if (l5_cid >= MAX_CM_SK_TBL_SZ)
4005 return;
4006
4007 csk = &cp->csk_tbl[l5_cid];
4008 csk_hold(csk);
4009
4010 if (!cnic_in_use(csk)) {
4011 csk_put(csk);
4012 return;
4013 }
4014
4015 switch (opcode) {
a9736c08
EW		 4016 case L5CM_RAMROD_CMD_ID_TCP_CONNECT:
4017 if (l4kcqe->status != 0) {
4018 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
4019 cnic_cm_upcall(cp, csk,
4020 L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE);
4021 }
4022 break;
a4636960
MC		 4023 case L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE:
4024 if (l4kcqe->status == 0)
4025 set_bit(SK_F_OFFLD_COMPLETE, &csk->flags);
8ec3e702
MC		 4026 else if (l4kcqe->status ==
4027 L4_KCQE_COMPLETION_STATUS_PARITY_ERROR)
0cb1f4b9 4028 set_bit(SK_F_HW_ERR, &csk->flags);
a4636960
MC		 4029
4030 smp_mb__before_clear_bit();
4031 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
4032 cnic_cm_upcall(cp, csk, opcode);
4033 break;
4034
28e3a8f3
EW		 4035 case L5CM_RAMROD_CMD_ID_CLOSE: {
4036 struct iscsi_kcqe *l5kcqe = (struct iscsi_kcqe *) kcqe;
4037
4038 if (l4kcqe->status != 0 || l5kcqe->completion_status != 0) {
4039 netdev_warn(dev->netdev, "RAMROD CLOSE compl with status 0x%x completion status 0x%x\n",
4040 l4kcqe->status, l5kcqe->completion_status);
7bc910fd
EW		 4041 opcode = L4_KCQE_OPCODE_VALUE_CLOSE_COMP;
4042 /* Fall through */
4043 } else {
4044 break;
4045 }
28e3a8f3 4046 }
a4636960 4047 case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED:
a4636960
MC		 4048 case L4_KCQE_OPCODE_VALUE_CLOSE_COMP:
4049 case L4_KCQE_OPCODE_VALUE_RESET_COMP:
71034ba8
MC		 4050 case L5CM_RAMROD_CMD_ID_SEARCHER_DELETE:
4051 case L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD:
8ec3e702 4052 if (l4kcqe->status == L4_KCQE_COMPLETION_STATUS_PARITY_ERROR)
23021c21
MC		 4053 set_bit(SK_F_HW_ERR, &csk->flags);
4054
a4636960
MC		 4055 cp->close_conn(csk, opcode);
4056 break;
4057
4058 case L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED:
101c40c8
MC		 4059 /* after we already sent CLOSE_REQ */
4060 if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags) &&
4061 !test_bit(SK_F_OFFLD_COMPLETE, &csk->flags) &&
4062 csk->state == L4_KCQE_OPCODE_VALUE_CLOSE_COMP)
4063 cp->close_conn(csk, L4_KCQE_OPCODE_VALUE_RESET_COMP);
4064 else
4065 cnic_cm_upcall(cp, csk, opcode);
a4636960
MC		 4066 break;
4067 }
4068 csk_put(csk);
4069}
4070
4071static void cnic_cm_indicate_kcqe(void *data, struct kcqe *kcqe[], u32 num)
4072{
4073 struct cnic_dev *dev = data;
4074 int i;
4075
4076 for (i = 0; i < num; i++)
4077 cnic_cm_process_kcqe(dev, kcqe[i]);
4078}
4079
4080static struct cnic_ulp_ops cm_ulp_ops = {
4081 .indicate_kcqes = cnic_cm_indicate_kcqe,
4082};
4083
4084static void cnic_cm_free_mem(struct cnic_dev *dev)
4085{
4086 struct cnic_local *cp = dev->cnic_priv;
4087
4088 kfree(cp->csk_tbl);
4089 cp->csk_tbl = NULL;
4090 cnic_free_id_tbl(&cp->csk_port_tbl);
4091}
4092
4093static int cnic_cm_alloc_mem(struct cnic_dev *dev)
4094{
4095 struct cnic_local *cp = dev->cnic_priv;
11f23aa8 4096 u32 port_id;
a4636960
MC		 4097
4098 cp->csk_tbl = kzalloc(sizeof(struct cnic_sock) * MAX_CM_SK_TBL_SZ,
4099 GFP_KERNEL);
4100 if (!cp->csk_tbl)
4101 return -ENOMEM;
4102
e00adf39 4103 port_id = prandom_u32();
11f23aa8 4104 port_id %= CNIC_LOCAL_PORT_RANGE;
a4636960 4105 if (cnic_init_id_tbl(&cp->csk_port_tbl, CNIC_LOCAL_PORT_RANGE,
11f23aa8 4106 CNIC_LOCAL_PORT_MIN, port_id)) {
a4636960
MC		 4107 cnic_cm_free_mem(dev);
4108 return -ENOMEM;
4109 }
4110 return 0;
4111}
4112
4113static int cnic_ready_to_close(struct cnic_sock *csk, u32 opcode)
4114{
943189f1
MC		 4115 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
4116 /* Unsolicited RESET_COMP or RESET_RECEIVED */
4117 opcode = L4_KCQE_OPCODE_VALUE_RESET_RECEIVED;
4118 csk->state = opcode;
a4636960 4119 }
943189f1
MC		 4120
4121 /* 1. If event opcode matches the expected event in csk->state
101c40c8
MC		 4122 * 2. If the expected event is CLOSE_COMP or RESET_COMP, we accept any
4123 * event
7b34a464
MC		 4124 * 3. If the expected event is 0, meaning the connection was never
4125 * never established, we accept the opcode from cm_abort.
66883e90 4126 */
7b34a464 4127 if (opcode == csk->state || csk->state == 0 ||
101c40c8
MC		 4128 csk->state == L4_KCQE_OPCODE_VALUE_CLOSE_COMP ||
4129 csk->state == L4_KCQE_OPCODE_VALUE_RESET_COMP) {
7b34a464
MC		 4130 if (!test_and_set_bit(SK_F_CLOSING, &csk->flags)) {
4131 if (csk->state == 0)
4132 csk->state = opcode;
66883e90 4133 return 1;
7b34a464 4134 }
66883e90 4135 }
a4636960
MC		 4136 return 0;
4137}
4138
4139static void cnic_close_bnx2_conn(struct cnic_sock *csk, u32 opcode)
4140{
4141 struct cnic_dev *dev = csk->dev;
4142 struct cnic_local *cp = dev->cnic_priv;
4143
a1e621bf
MC		 4144 if (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED) {
4145 cnic_cm_upcall(cp, csk, opcode);
4146 return;
4147 }
4148
a4636960 4149 clear_bit(SK_F_CONNECT_START, &csk->flags);
66883e90 4150 cnic_close_conn(csk);
7b34a464 4151 csk->state = opcode;
66883e90 4152 cnic_cm_upcall(cp, csk, opcode);
a4636960
MC		 4153}
4154
4155static void cnic_cm_stop_bnx2_hw(struct cnic_dev *dev)
4156{
4157}
4158
4159static int cnic_cm_init_bnx2_hw(struct cnic_dev *dev)
4160{
4161 u32 seed;
4162
e00adf39 4163 seed = prandom_u32();
a4636960
MC		 4164 cnic_ctx_wr(dev, 45, 0, seed);
4165 return 0;
4166}
4167
71034ba8
MC		 4168static void cnic_close_bnx2x_conn(struct cnic_sock *csk, u32 opcode)
4169{
4170 struct cnic_dev *dev = csk->dev;
4171 struct cnic_local *cp = dev->cnic_priv;
4172 struct cnic_context *ctx = &cp->ctx_tbl[csk->l5_cid];
4173 union l5cm_specific_data l5_data;
4174 u32 cmd = 0;
4175 int close_complete = 0;
4176
4177 switch (opcode) {
4178 case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED:
4179 case L4_KCQE_OPCODE_VALUE_CLOSE_COMP:
4180 case L4_KCQE_OPCODE_VALUE_RESET_COMP:
7b34a464 4181 if (cnic_ready_to_close(csk, opcode)) {
23021c21
MC		 4182 if (test_bit(SK_F_HW_ERR, &csk->flags))
4183 close_complete = 1;
4184 else if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
7b34a464
MC		 4185 cmd = L5CM_RAMROD_CMD_ID_SEARCHER_DELETE;
4186 else
4187 close_complete = 1;
4188 }
71034ba8
MC		 4189 break;
4190 case L5CM_RAMROD_CMD_ID_SEARCHER_DELETE:
4191 cmd = L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD;
4192 break;
4193 case L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD:
4194 close_complete = 1;
4195 break;
4196 }
4197 if (cmd) {
4198 memset(&l5_data, 0, sizeof(l5_data));
4199
4200 cnic_submit_kwqe_16(dev, cmd, csk->cid, ISCSI_CONNECTION_TYPE,
4201 &l5_data);
4202 } else if (close_complete) {
4203 ctx->timestamp = jiffies;
4204 cnic_close_conn(csk);
4205 cnic_cm_upcall(cp, csk, csk->state);
4206 }
4207}
4208
4209static void cnic_cm_stop_bnx2x_hw(struct cnic_dev *dev)
4210{
fdf24086 4211 struct cnic_local *cp = dev->cnic_priv;
fdf24086
MC		 4212
4213 if (!cp->ctx_tbl)
4214 return;
4215
4216 if (!netif_running(dev->netdev))
4217 return;
4218
74e49bbd 4219 cnic_bnx2x_delete_wait(dev, 0);
fdf24086
MC		 4220
4221 cancel_delayed_work(&cp->delete_task);
4222 flush_workqueue(cnic_wq);
4223
4224 if (atomic_read(&cp->iscsi_conn) != 0)
4225 netdev_warn(dev->netdev, "%d iSCSI connections not destroyed\n",
4226 atomic_read(&cp->iscsi_conn));
71034ba8
MC		 4227}
4228
4229static int cnic_cm_init_bnx2x_hw(struct cnic_dev *dev)
4230{
4231 struct cnic_local *cp = dev->cnic_priv;
68c64d20 4232 struct bnx2x *bp = netdev_priv(dev->netdev);
1420398d 4233 u32 pfid = cp->pfid;
5bf945a8 4234 u32 port = BP_PORT(bp);
71034ba8
MC		 4235
4236 cnic_init_bnx2x_mac(dev);
b3bd2d65 4237 cnic_bnx2x_set_tcp_options(dev, 0, 1);
71034ba8
MC		 4238
4239 CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
1420398d 4240 XSTORM_ISCSI_LOCAL_VLAN_OFFSET(pfid), 0);
71034ba8
MC		 4241
4242 CNIC_WR(dev, BAR_XSTRORM_INTMEM +
523224a3 4243 XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_ENABLED_OFFSET(port), 1);
71034ba8 4244 CNIC_WR(dev, BAR_XSTRORM_INTMEM +
523224a3 4245 XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_MAX_COUNT_OFFSET(port),
71034ba8
MC		 4246 DEF_MAX_DA_COUNT);
4247
4248 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1420398d 4249 XSTORM_ISCSI_TCP_VARS_TTL_OFFSET(pfid), DEF_TTL);
71034ba8 4250 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1420398d 4251 XSTORM_ISCSI_TCP_VARS_TOS_OFFSET(pfid), DEF_TOS);
71034ba8 4252 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1420398d 4253 XSTORM_ISCSI_TCP_VARS_ADV_WND_SCL_OFFSET(pfid), 2);
71034ba8 4254 CNIC_WR(dev, BAR_XSTRORM_INTMEM +
1420398d 4255 XSTORM_TCP_TX_SWS_TIMER_VAL_OFFSET(pfid), DEF_SWS_TIMER);
71034ba8 4256
1420398d 4257 CNIC_WR(dev, BAR_TSTRORM_INTMEM + TSTORM_TCP_MAX_CWND_OFFSET(pfid),
71034ba8
MC		 4258 DEF_MAX_CWND);
4259 return 0;
4260}
4261
fdf24086
MC		 4262static void cnic_delete_task(struct work_struct *work)
4263{
4264 struct cnic_local *cp;
4265 struct cnic_dev *dev;
4266 u32 i;
4267 int need_resched = 0;
4268
4269 cp = container_of(work, struct cnic_local, delete_task.work);
4270 dev = cp->dev;
4271
fab0dc89
DK		 4272 if (test_and_clear_bit(CNIC_LCL_FL_STOP_ISCSI, &cp->cnic_local_flags)) {
4273 struct drv_ctl_info info;
4274
fab0dc89 4275 cnic_ulp_stop_one(cp, CNIC_ULP_ISCSI);
fab0dc89
DK		 4276
4277 info.cmd = DRV_CTL_ISCSI_STOPPED_CMD;
4278 cp->ethdev->drv_ctl(dev->netdev, &info);
4279 }
4280
fdf24086
MC		 4281 for (i = 0; i < cp->max_cid_space; i++) {
4282 struct cnic_context *ctx = &cp->ctx_tbl[i];
619c5cb6 4283 int err;
fdf24086
MC		 4284
4285 if (!test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags) ||
4286 !test_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags))
4287 continue;
4288
4289 if (!time_after(jiffies, ctx->timestamp + (2 * HZ))) {
4290 need_resched = 1;
4291 continue;
4292 }
4293
4294 if (!test_and_clear_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags))
4295 continue;
4296
619c5cb6 4297 err = cnic_bnx2x_destroy_ramrod(dev, i);
fdf24086
MC		 4298
4299 cnic_free_bnx2x_conn_resc(dev, i);
619c5cb6
VZ		 4300 if (!err) {
4301 if (ctx->ulp_proto_id == CNIC_ULP_ISCSI)
4302 atomic_dec(&cp->iscsi_conn);
fdf24086 4303
619c5cb6
VZ		 4304 clear_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags);
4305 }
fdf24086
MC		 4306 }
4307
4308 if (need_resched)
4309 queue_delayed_work(cnic_wq, &cp->delete_task,
4310 msecs_to_jiffies(10));
4311
4312}
4313
a4636960
MC		 4314static int cnic_cm_open(struct cnic_dev *dev)
4315{
4316 struct cnic_local *cp = dev->cnic_priv;
4317 int err;
4318
4319 err = cnic_cm_alloc_mem(dev);
4320 if (err)
4321 return err;
4322
4323 err = cp->start_cm(dev);
4324
4325 if (err)
4326 goto err_out;
4327
fdf24086
MC		 4328 INIT_DELAYED_WORK(&cp->delete_task, cnic_delete_task);
4329
a4636960
MC		 4330 dev->cm_create = cnic_cm_create;
4331 dev->cm_destroy = cnic_cm_destroy;
4332 dev->cm_connect = cnic_cm_connect;
4333 dev->cm_abort = cnic_cm_abort;
4334 dev->cm_close = cnic_cm_close;
4335 dev->cm_select_dev = cnic_cm_select_dev;
4336
4337 cp->ulp_handle[CNIC_ULP_L4] = dev;
4338 rcu_assign_pointer(cp->ulp_ops[CNIC_ULP_L4], &cm_ulp_ops);
4339 return 0;
4340
4341err_out:
4342 cnic_cm_free_mem(dev);
4343 return err;
4344}
4345
4346static int cnic_cm_shutdown(struct cnic_dev *dev)
4347{
4348 struct cnic_local *cp = dev->cnic_priv;
4349 int i;
4350
a4636960
MC		 4351 if (!cp->csk_tbl)
4352 return 0;
4353
4354 for (i = 0; i < MAX_CM_SK_TBL_SZ; i++) {
4355 struct cnic_sock *csk = &cp->csk_tbl[i];
4356
4357 clear_bit(SK_F_INUSE, &csk->flags);
4358 cnic_cm_cleanup(csk);
4359 }
4360 cnic_cm_free_mem(dev);
4361
4362 return 0;
4363}
4364
4365static void cnic_init_context(struct cnic_dev *dev, u32 cid)
4366{
a4636960
MC		 4367 u32 cid_addr;
4368 int i;
4369
a4636960
MC		 4370 cid_addr = GET_CID_ADDR(cid);
4371
4372 for (i = 0; i < CTX_SIZE; i += 4)
4373 cnic_ctx_wr(dev, cid_addr, i, 0);
4374}
4375
4376static int cnic_setup_5709_context(struct cnic_dev *dev, int valid)
4377{
4378 struct cnic_local *cp = dev->cnic_priv;
4379 int ret = 0, i;
4380 u32 valid_bit = valid ? BNX2_CTX_HOST_PAGE_TBL_DATA0_VALID : 0;
4381
4ce45e02 4382 if (BNX2_CHIP(cp) != BNX2_CHIP_5709)
a4636960
MC		 4383 return 0;
4384
4385 for (i = 0; i < cp->ctx_blks; i++) {
4386 int j;
4387 u32 idx = cp->ctx_arr[i].cid / cp->cids_per_blk;
4388 u32 val;
4389
2bc4078e 4390 memset(cp->ctx_arr[i].ctx, 0, BNX2_PAGE_SIZE);
a4636960
MC		 4391
4392 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA0,
4393 (cp->ctx_arr[i].mapping & 0xffffffff) | valid_bit);
4394 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA1,
4395 (u64) cp->ctx_arr[i].mapping >> 32);
4396 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL, idx |
4397 BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ);
4398 for (j = 0; j < 10; j++) {
4399
4400 val = CNIC_RD(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL);
4401 if (!(val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ))
4402 break;
4403 udelay(5);
4404 }
4405 if (val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ) {
4406 ret = -EBUSY;
4407 break;
4408 }
4409 }
4410 return ret;
4411}
4412
4413static void cnic_free_irq(struct cnic_dev *dev)
4414{
4415 struct cnic_local *cp = dev->cnic_priv;
4416 struct cnic_eth_dev *ethdev = cp->ethdev;
4417
4418 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
4419 cp->disable_int_sync(dev);
6e0dc643 4420 tasklet_kill(&cp->cnic_irq_task);
a4636960
MC		 4421 free_irq(ethdev->irq_arr[0].vector, dev);
4422 }
4423}
4424
6e0dc643
MC		 4425static int cnic_request_irq(struct cnic_dev *dev)
4426{
4427 struct cnic_local *cp = dev->cnic_priv;
4428 struct cnic_eth_dev *ethdev = cp->ethdev;
4429 int err;
4430
4431 err = request_irq(ethdev->irq_arr[0].vector, cnic_irq, 0, "cnic", dev);
4432 if (err)
4433 tasklet_disable(&cp->cnic_irq_task);
4434
4435 return err;
4436}
4437
a4636960
MC		 4438static int cnic_init_bnx2_irq(struct cnic_dev *dev)
4439{
4440 struct cnic_local *cp = dev->cnic_priv;
4441 struct cnic_eth_dev *ethdev = cp->ethdev;
4442
4443 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
4444 int err, i = 0;
4445 int sblk_num = cp->status_blk_num;
4446 u32 base = ((sblk_num - 1) * BNX2_HC_SB_CONFIG_SIZE) +
4447 BNX2_HC_SB_CONFIG_1;
4448
4449 CNIC_WR(dev, base, BNX2_HC_SB_CONFIG_1_ONE_SHOT);
4450
4451 CNIC_WR(dev, base + BNX2_HC_COMP_PROD_TRIP_OFF, (2 << 16) | 8);
4452 CNIC_WR(dev, base + BNX2_HC_COM_TICKS_OFF, (64 << 16) | 220);
4453 CNIC_WR(dev, base + BNX2_HC_CMD_TICKS_OFF, (64 << 16) | 220);
4454
a4dde3ab 4455 cp->last_status_idx = cp->status_blk.bnx2->status_idx;
164165da 4456 tasklet_init(&cp->cnic_irq_task, cnic_service_bnx2_msix,
a4636960 4457 (unsigned long) dev);
6e0dc643
MC		 4458 err = cnic_request_irq(dev);
4459 if (err)
a4636960 4460 return err;
6e0dc643 4461
a4dde3ab 4462 while (cp->status_blk.bnx2->status_completion_producer_index &&
a4636960
MC		 4463 i < 10) {
4464 CNIC_WR(dev, BNX2_HC_COALESCE_NOW,
4465 1 << (11 + sblk_num));
4466 udelay(10);
4467 i++;
4468 barrier();
4469 }
a4dde3ab 4470 if (cp->status_blk.bnx2->status_completion_producer_index) {
a4636960
MC		 4471 cnic_free_irq(dev);
4472 goto failed;
4473 }
4474
4475 } else {
a4dde3ab 4476 struct status_block *sblk = cp->status_blk.gen;
a4636960
MC		 4477 u32 hc_cmd = CNIC_RD(dev, BNX2_HC_COMMAND);
4478 int i = 0;
4479
4480 while (sblk->status_completion_producer_index && i < 10) {
4481 CNIC_WR(dev, BNX2_HC_COMMAND,
4482 hc_cmd | BNX2_HC_COMMAND_COAL_NOW_WO_INT);
4483 udelay(10);
4484 i++;
4485 barrier();
4486 }
4487 if (sblk->status_completion_producer_index)
4488 goto failed;
4489
4490 }
4491 return 0;
4492
4493failed:
ddf79b20 4494 netdev_err(dev->netdev, "KCQ index not resetting to 0\n");
a4636960
MC		 4495 return -EBUSY;
4496}
4497
4498static void cnic_enable_bnx2_int(struct cnic_dev *dev)
4499{
4500 struct cnic_local *cp = dev->cnic_priv;
4501 struct cnic_eth_dev *ethdev = cp->ethdev;
4502
4503 if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
4504 return;
4505
4506 CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
4507 BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
4508}
4509
4510static void cnic_disable_bnx2_int_sync(struct cnic_dev *dev)
4511{
4512 struct cnic_local *cp = dev->cnic_priv;
4513 struct cnic_eth_dev *ethdev = cp->ethdev;
4514
4515 if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
4516 return;
4517
4518 CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
4519 BNX2_PCICFG_INT_ACK_CMD_MASK_INT);
4520 CNIC_RD(dev, BNX2_PCICFG_INT_ACK_CMD);
4521 synchronize_irq(ethdev->irq_arr[0].vector);
4522}
4523
4524static void cnic_init_bnx2_tx_ring(struct cnic_dev *dev)
4525{
4526 struct cnic_local *cp = dev->cnic_priv;
4527 struct cnic_eth_dev *ethdev = cp->ethdev;
cd801536 4528 struct cnic_uio_dev *udev = cp->udev;
a4636960
MC		 4529 u32 cid_addr, tx_cid, sb_id;
4530 u32 val, offset0, offset1, offset2, offset3;
4531 int i;
2bc4078e 4532 struct bnx2_tx_bd *txbd;
cd801536 4533 dma_addr_t buf_map, ring_map = udev->l2_ring_map;
a4dde3ab 4534 struct status_block *s_blk = cp->status_blk.gen;
a4636960
MC		 4535
4536 sb_id = cp->status_blk_num;
4537 tx_cid = 20;
a4636960
MC		 4538 cp->tx_cons_ptr = &s_blk->status_tx_quick_consumer_index2;
4539 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
a4dde3ab 4540 struct status_block_msix *sblk = cp->status_blk.bnx2;
a4636960
MC		 4541
4542 tx_cid = TX_TSS_CID + sb_id - 1;
a4636960
MC		 4543 CNIC_WR(dev, BNX2_TSCH_TSS_CFG, (sb_id << 24) |
4544 (TX_TSS_CID << 7));
4545 cp->tx_cons_ptr = &sblk->status_tx_quick_consumer_index;
4546 }
4547 cp->tx_cons = *cp->tx_cons_ptr;
4548
4549 cid_addr = GET_CID_ADDR(tx_cid);
4ce45e02 4550 if (BNX2_CHIP(cp) == BNX2_CHIP_5709) {
a4636960
MC		 4551 u32 cid_addr2 = GET_CID_ADDR(tx_cid + 4) + 0x40;
4552
4553 for (i = 0; i < PHY_CTX_SIZE; i += 4)
4554 cnic_ctx_wr(dev, cid_addr2, i, 0);
4555
4556 offset0 = BNX2_L2CTX_TYPE_XI;
4557 offset1 = BNX2_L2CTX_CMD_TYPE_XI;
4558 offset2 = BNX2_L2CTX_TBDR_BHADDR_HI_XI;
4559 offset3 = BNX2_L2CTX_TBDR_BHADDR_LO_XI;
4560 } else {
b58ffb41
MC		 4561 cnic_init_context(dev, tx_cid);
4562 cnic_init_context(dev, tx_cid + 1);
4563
a4636960
MC		 4564 offset0 = BNX2_L2CTX_TYPE;
4565 offset1 = BNX2_L2CTX_CMD_TYPE;
4566 offset2 = BNX2_L2CTX_TBDR_BHADDR_HI;
4567 offset3 = BNX2_L2CTX_TBDR_BHADDR_LO;
4568 }
4569 val = BNX2_L2CTX_TYPE_TYPE_L2 | BNX2_L2CTX_TYPE_SIZE_L2;
4570 cnic_ctx_wr(dev, cid_addr, offset0, val);
4571
4572 val = BNX2_L2CTX_CMD_TYPE_TYPE_L2 | (8 << 16);
4573 cnic_ctx_wr(dev, cid_addr, offset1, val);
4574
43d620c8 4575 txbd = udev->l2_ring;
a4636960 4576
cd801536 4577 buf_map = udev->l2_buf_map;
2bc4078e 4578 for (i = 0; i < BNX2_MAX_TX_DESC_CNT; i++, txbd++) {
a4636960
MC		 4579 txbd->tx_bd_haddr_hi = (u64) buf_map >> 32;
4580 txbd->tx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
4581 }
cd801536 4582 val = (u64) ring_map >> 32;
a4636960
MC		 4583 cnic_ctx_wr(dev, cid_addr, offset2, val);
4584 txbd->tx_bd_haddr_hi = val;
4585
cd801536 4586 val = (u64) ring_map & 0xffffffff;
a4636960
MC		 4587 cnic_ctx_wr(dev, cid_addr, offset3, val);
4588 txbd->tx_bd_haddr_lo = val;
4589}
4590
4591static void cnic_init_bnx2_rx_ring(struct cnic_dev *dev)
4592{
4593 struct cnic_local *cp = dev->cnic_priv;
4594 struct cnic_eth_dev *ethdev = cp->ethdev;
cd801536 4595 struct cnic_uio_dev *udev = cp->udev;
a4636960
MC		 4596 u32 cid_addr, sb_id, val, coal_reg, coal_val;
4597 int i;
2bc4078e 4598 struct bnx2_rx_bd *rxbd;
a4dde3ab 4599 struct status_block *s_blk = cp->status_blk.gen;
cd801536 4600 dma_addr_t ring_map = udev->l2_ring_map;
a4636960
MC		 4601
4602 sb_id = cp->status_blk_num;
4603 cnic_init_context(dev, 2);
4604 cp->rx_cons_ptr = &s_blk->status_rx_quick_consumer_index2;
4605 coal_reg = BNX2_HC_COMMAND;
4606 coal_val = CNIC_RD(dev, coal_reg);
4607 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
a4dde3ab 4608 struct status_block_msix *sblk = cp->status_blk.bnx2;
a4636960
MC		 4609
4610 cp->rx_cons_ptr = &sblk->status_rx_quick_consumer_index;
4611 coal_reg = BNX2_HC_COALESCE_NOW;
4612 coal_val = 1 << (11 + sb_id);
4613 }
4614 i = 0;
4615 while (!(*cp->rx_cons_ptr != 0) && i < 10) {
4616 CNIC_WR(dev, coal_reg, coal_val);
4617 udelay(10);
4618 i++;
4619 barrier();
4620 }
4621 cp->rx_cons = *cp->rx_cons_ptr;
4622
4623 cid_addr = GET_CID_ADDR(2);
4624 val = BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE |
4625 BNX2_L2CTX_CTX_TYPE_SIZE_L2 | (0x02 << 8);
4626 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_CTX_TYPE, val);
4627
4628 if (sb_id == 0)
d0549382 4629 val = 2 << BNX2_L2CTX_L2_STATUSB_NUM_SHIFT;
a4636960 4630 else
d0549382 4631 val = BNX2_L2CTX_L2_STATUSB_NUM(sb_id);
a4636960
MC		 4632 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_HOST_BDIDX, val);
4633
2bc4078e
MC		 4634 rxbd = udev->l2_ring + BNX2_PAGE_SIZE;
4635 for (i = 0; i < BNX2_MAX_RX_DESC_CNT; i++, rxbd++) {
a4636960
MC		 4636 dma_addr_t buf_map;
4637 int n = (i % cp->l2_rx_ring_size) + 1;
4638
cd801536 4639 buf_map = udev->l2_buf_map + (n * cp->l2_single_buf_size);
a4636960
MC		 4640 rxbd->rx_bd_len = cp->l2_single_buf_size;
4641 rxbd->rx_bd_flags = RX_BD_FLAGS_START | RX_BD_FLAGS_END;
4642 rxbd->rx_bd_haddr_hi = (u64) buf_map >> 32;
4643 rxbd->rx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
4644 }
2bc4078e 4645 val = (u64) (ring_map + BNX2_PAGE_SIZE) >> 32;
a4636960
MC		 4646 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_HI, val);
4647 rxbd->rx_bd_haddr_hi = val;
4648
2bc4078e 4649 val = (u64) (ring_map + BNX2_PAGE_SIZE) & 0xffffffff;
a4636960
MC		 4650 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_LO, val);
4651 rxbd->rx_bd_haddr_lo = val;
4652
4653 val = cnic_reg_rd_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD);
4654 cnic_reg_wr_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD, val | (1 << 2));
4655}
4656
4657static void cnic_shutdown_bnx2_rx_ring(struct cnic_dev *dev)
4658{
4659 struct kwqe *wqes[1], l2kwqe;
4660
4661 memset(&l2kwqe, 0, sizeof(l2kwqe));
4662 wqes[0] = &l2kwqe;
e1928c86 4663 l2kwqe.kwqe_op_flag = (L2_LAYER_CODE << KWQE_LAYER_SHIFT) |
a4636960
MC		 4664 (L2_KWQE_OPCODE_VALUE_FLUSH <<
4665 KWQE_OPCODE_SHIFT) | 2;
4666 dev->submit_kwqes(dev, wqes, 1);
4667}
4668
4669static void cnic_set_bnx2_mac(struct cnic_dev *dev)
4670{
4671 struct cnic_local *cp = dev->cnic_priv;
4672 u32 val;
4673
4674 val = cp->func << 2;
4675
4676 cp->shmem_base = cnic_reg_rd_ind(dev, BNX2_SHM_HDR_ADDR_0 + val);
4677
4678 val = cnic_reg_rd_ind(dev, cp->shmem_base +
4679 BNX2_PORT_HW_CFG_ISCSI_MAC_UPPER);
4680 dev->mac_addr[0] = (u8) (val >> 8);
4681 dev->mac_addr[1] = (u8) val;
4682
4683 CNIC_WR(dev, BNX2_EMAC_MAC_MATCH4, val);
4684
4685 val = cnic_reg_rd_ind(dev, cp->shmem_base +
4686 BNX2_PORT_HW_CFG_ISCSI_MAC_LOWER);
4687 dev->mac_addr[2] = (u8) (val >> 24);
4688 dev->mac_addr[3] = (u8) (val >> 16);
4689 dev->mac_addr[4] = (u8) (val >> 8);
4690 dev->mac_addr[5] = (u8) val;
4691
4692 CNIC_WR(dev, BNX2_EMAC_MAC_MATCH5, val);
4693
4694 val = 4 | BNX2_RPM_SORT_USER2_BC_EN;
4ce45e02 4695 if (BNX2_CHIP(cp) != BNX2_CHIP_5709)
a4636960
MC		 4696 val |= BNX2_RPM_SORT_USER2_PROM_VLAN;
4697
4698 CNIC_WR(dev, BNX2_RPM_SORT_USER2, 0x0);
4699 CNIC_WR(dev, BNX2_RPM_SORT_USER2, val);
4700 CNIC_WR(dev, BNX2_RPM_SORT_USER2, val | BNX2_RPM_SORT_USER2_ENA);
4701}
4702
4703static int cnic_start_bnx2_hw(struct cnic_dev *dev)
4704{
4705 struct cnic_local *cp = dev->cnic_priv;
4706 struct cnic_eth_dev *ethdev = cp->ethdev;
a4dde3ab 4707 struct status_block *sblk = cp->status_blk.gen;
e6c28894 4708 u32 val, kcq_cid_addr, kwq_cid_addr;
a4636960
MC		 4709 int err;
4710
4711 cnic_set_bnx2_mac(dev);
4712
4713 val = CNIC_RD(dev, BNX2_MQ_CONFIG);
4714 val &= ~BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE;
2bc4078e 4715 if (BNX2_PAGE_BITS > 12)
a4636960
MC		 4716 val |= (12 - 8) << 4;
4717 else
2bc4078e 4718 val |= (BNX2_PAGE_BITS - 8) << 4;
a4636960
MC		 4719
4720 CNIC_WR(dev, BNX2_MQ_CONFIG, val);
4721
4722 CNIC_WR(dev, BNX2_HC_COMP_PROD_TRIP, (2 << 16) | 8);
4723 CNIC_WR(dev, BNX2_HC_COM_TICKS, (64 << 16) | 220);
4724 CNIC_WR(dev, BNX2_HC_CMD_TICKS, (64 << 16) | 220);
4725
4726 err = cnic_setup_5709_context(dev, 1);
4727 if (err)
4728 return err;
4729
4730 cnic_init_context(dev, KWQ_CID);
4731 cnic_init_context(dev, KCQ_CID);
4732
e6c28894 4733 kwq_cid_addr = GET_CID_ADDR(KWQ_CID);
a4636960
MC		 4734 cp->kwq_io_addr = MB_GET_CID_ADDR(KWQ_CID) + L5_KRNLQ_HOST_QIDX;
4735
4736 cp->max_kwq_idx = MAX_KWQ_IDX;
4737 cp->kwq_prod_idx = 0;
4738 cp->kwq_con_idx = 0;
1f1332a3 4739 set_bit(CNIC_LCL_FL_KWQ_INIT, &cp->cnic_local_flags);
a4636960 4740
4ce45e02 4741 if (BNX2_CHIP(cp) == BNX2_CHIP_5706 || BNX2_CHIP(cp) == BNX2_CHIP_5708)
a4636960
MC		 4742 cp->kwq_con_idx_ptr = &sblk->status_rx_quick_consumer_index15;
4743 else
4744 cp->kwq_con_idx_ptr = &sblk->status_cmd_consumer_index;
4745
4746 /* Initialize the kernel work queue context. */
4747 val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
2bc4078e 4748 (BNX2_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
e6c28894 4749 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_TYPE, val);
a4636960 4750
2bc4078e 4751 val = (BNX2_PAGE_SIZE / sizeof(struct kwqe) - 1) << 16;
e6c28894 4752 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
a4636960 4753
2bc4078e 4754 val = ((BNX2_PAGE_SIZE / sizeof(struct kwqe)) << 16) | KWQ_PAGE_CNT;
e6c28894 4755 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
a4636960
MC		 4756
4757 val = (u32) ((u64) cp->kwq_info.pgtbl_map >> 32);
e6c28894 4758 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
a4636960
MC		 4759
4760 val = (u32) cp->kwq_info.pgtbl_map;
e6c28894
MC		 4761 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
4762
4763 kcq_cid_addr = GET_CID_ADDR(KCQ_CID);
4764 cp->kcq1.io_addr = MB_GET_CID_ADDR(KCQ_CID) + L5_KRNLQ_HOST_QIDX;
a4636960 4765
e6c28894
MC		 4766 cp->kcq1.sw_prod_idx = 0;
4767 cp->kcq1.hw_prod_idx_ptr =
64699336 4768 &sblk->status_completion_producer_index;
a4636960 4769
64699336 4770 cp->kcq1.status_idx_ptr = &sblk->status_idx;
a4636960
MC		 4771
4772 /* Initialize the kernel complete queue context. */
4773 val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
2bc4078e 4774 (BNX2_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
e6c28894 4775 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_TYPE, val);
a4636960 4776
2bc4078e 4777 val = (BNX2_PAGE_SIZE / sizeof(struct kcqe) - 1) << 16;
e6c28894 4778 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
a4636960 4779
2bc4078e 4780 val = ((BNX2_PAGE_SIZE / sizeof(struct kcqe)) << 16) | KCQ_PAGE_CNT;
e6c28894 4781 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
a4636960 4782
e6c28894
MC		 4783 val = (u32) ((u64) cp->kcq1.dma.pgtbl_map >> 32);
4784 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
a4636960 4785
e6c28894
MC		 4786 val = (u32) cp->kcq1.dma.pgtbl_map;
4787 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
a4636960
MC		 4788
4789 cp->int_num = 0;
4790 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
e6c28894 4791 struct status_block_msix *msblk = cp->status_blk.bnx2;
a4636960 4792 u32 sb_id = cp->status_blk_num;
d0549382 4793 u32 sb = BNX2_L2CTX_L5_STATUSB_NUM(sb_id);
a4636960 4794
e6c28894 4795 cp->kcq1.hw_prod_idx_ptr =
64699336
JP		 4796 &msblk->status_completion_producer_index;
4797 cp->kcq1.status_idx_ptr = &msblk->status_idx;
4798 cp->kwq_con_idx_ptr = &msblk->status_cmd_consumer_index;
a4636960 4799 cp->int_num = sb_id << BNX2_PCICFG_INT_ACK_CMD_INT_NUM_SHIFT;
e6c28894
MC		 4800 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
4801 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
a4636960
MC		 4802 }
4803
4804 /* Enable Commnad Scheduler notification when we write to the
4805 * host producer index of the kernel contexts. */
4806 CNIC_WR(dev, BNX2_MQ_KNL_CMD_MASK1, 2);
4807
4808 /* Enable Command Scheduler notification when we write to either
4809 * the Send Queue or Receive Queue producer indexes of the kernel
4810 * bypass contexts. */
4811 CNIC_WR(dev, BNX2_MQ_KNL_BYP_CMD_MASK1, 7);
4812 CNIC_WR(dev, BNX2_MQ_KNL_BYP_WRITE_MASK1, 7);
4813
4814 /* Notify COM when the driver post an application buffer. */
4815 CNIC_WR(dev, BNX2_MQ_KNL_RX_V2P_MASK2, 0x2000);
4816
4817 /* Set the CP and COM doorbells. These two processors polls the
4818 * doorbell for a non zero value before running. This must be done
4819 * after setting up the kernel queue contexts. */
4820 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 1);
4821 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 1);
4822
4823 cnic_init_bnx2_tx_ring(dev);
4824 cnic_init_bnx2_rx_ring(dev);
4825
4826 err = cnic_init_bnx2_irq(dev);
4827 if (err) {
ddf79b20 4828 netdev_err(dev->netdev, "cnic_init_irq failed\n");
a4636960
MC		 4829 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
4830 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
4831 return err;
4832 }
4833
ad9b4359
MC		 4834 ethdev->drv_state |= CNIC_DRV_STATE_HANDLES_IRQ;
4835
a4636960
MC		 4836 return 0;
4837}
4838
71034ba8
MC		 4839static void cnic_setup_bnx2x_context(struct cnic_dev *dev)
4840{
4841 struct cnic_local *cp = dev->cnic_priv;
4842 struct cnic_eth_dev *ethdev = cp->ethdev;
4843 u32 start_offset = ethdev->ctx_tbl_offset;
4844 int i;
4845
4846 for (i = 0; i < cp->ctx_blks; i++) {
4847 struct cnic_ctx *ctx = &cp->ctx_arr[i];
4848 dma_addr_t map = ctx->mapping;
4849
4850 if (cp->ctx_align) {
4851 unsigned long mask = cp->ctx_align - 1;
4852
4853 map = (map + mask) & ~mask;
4854 }
4855
4856 cnic_ctx_tbl_wr(dev, start_offset + i, map);
4857 }
4858}
4859
4860static int cnic_init_bnx2x_irq(struct cnic_dev *dev)
4861{
4862 struct cnic_local *cp = dev->cnic_priv;
4863 struct cnic_eth_dev *ethdev = cp->ethdev;
4864 int err = 0;
4865
164165da 4866 tasklet_init(&cp->cnic_irq_task, cnic_service_bnx2x_bh,
71034ba8 4867 (unsigned long) dev);
6e0dc643
MC		 4868 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX)
4869 err = cnic_request_irq(dev);
4870
71034ba8
MC		 4871 return err;
4872}
4873
523224a3
DK		 4874static inline void cnic_storm_memset_hc_disable(struct cnic_dev *dev,
4875 u16 sb_id, u8 sb_index,
4876 u8 disable)
4877{
68c64d20 4878 struct bnx2x *bp = netdev_priv(dev->netdev);
523224a3
DK		 4879
4880 u32 addr = BAR_CSTRORM_INTMEM +
4881 CSTORM_STATUS_BLOCK_DATA_OFFSET(sb_id) +
4882 offsetof(struct hc_status_block_data_e1x, index_data) +
4883 sizeof(struct hc_index_data)*sb_index +
4884 offsetof(struct hc_index_data, flags);
4885 u16 flags = CNIC_RD16(dev, addr);
4886 /* clear and set */
4887 flags &= ~HC_INDEX_DATA_HC_ENABLED;
4888 flags |= (((~disable) << HC_INDEX_DATA_HC_ENABLED_SHIFT) &
4889 HC_INDEX_DATA_HC_ENABLED);
4890 CNIC_WR16(dev, addr, flags);
4891}
4892
71034ba8
MC		 4893static void cnic_enable_bnx2x_int(struct cnic_dev *dev)
4894{
4895 struct cnic_local *cp = dev->cnic_priv;
68c64d20 4896 struct bnx2x *bp = netdev_priv(dev->netdev);
71034ba8 4897 u8 sb_id = cp->status_blk_num;
71034ba8
MC		 4898
4899 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
523224a3
DK		 4900 CSTORM_STATUS_BLOCK_DATA_OFFSET(sb_id) +
4901 offsetof(struct hc_status_block_data_e1x, index_data) +
4902 sizeof(struct hc_index_data)*HC_INDEX_ISCSI_EQ_CONS +
619c5cb6 4903 offsetof(struct hc_index_data, timeout), 64 / 4);
523224a3 4904 cnic_storm_memset_hc_disable(dev, sb_id, HC_INDEX_ISCSI_EQ_CONS, 0);
71034ba8
MC		 4905}
4906
4907static void cnic_disable_bnx2x_int_sync(struct cnic_dev *dev)
4908{
4909}
4910
523224a3
DK		 4911static void cnic_init_bnx2x_tx_ring(struct cnic_dev *dev,
4912 struct client_init_ramrod_data *data)
71034ba8
MC		 4913{
4914 struct cnic_local *cp = dev->cnic_priv;
104a43ed 4915 struct bnx2x *bp = netdev_priv(dev->netdev);
cd801536
MC		 4916 struct cnic_uio_dev *udev = cp->udev;
4917 union eth_tx_bd_types *txbd = (union eth_tx_bd_types *) udev->l2_ring;
4918 dma_addr_t buf_map, ring_map = udev->l2_ring_map;
523224a3 4919 struct host_sp_status_block *sb = cp->bnx2x_def_status_blk;
71034ba8 4920 int i;
5159fdc1 4921 u32 cli = cp->ethdev->iscsi_l2_client_id;
71034ba8
MC		 4922 u32 val;
4923
2bc4078e 4924 memset(txbd, 0, BNX2_PAGE_SIZE);
71034ba8 4925
cd801536 4926 buf_map = udev->l2_buf_map;
2bc4078e 4927 for (i = 0; i < BNX2_MAX_TX_DESC_CNT; i += 3, txbd += 3) {
71034ba8 4928 struct eth_tx_start_bd *start_bd = &txbd->start_bd;
96bed4b9
YM		 4929 struct eth_tx_parse_bd_e1x *pbd_e1x =
4930 &((txbd + 1)->parse_bd_e1x);
4931 struct eth_tx_parse_bd_e2 *pbd_e2 = &((txbd + 1)->parse_bd_e2);
71034ba8
MC		 4932 struct eth_tx_bd *reg_bd = &((txbd + 2)->reg_bd);
4933
4934 start_bd->addr_hi = cpu_to_le32((u64) buf_map >> 32);
4935 start_bd->addr_lo = cpu_to_le32(buf_map & 0xffffffff);
4936 reg_bd->addr_hi = start_bd->addr_hi;
4937 reg_bd->addr_lo = start_bd->addr_lo + 0x10;
4938 start_bd->nbytes = cpu_to_le16(0x10);
4939 start_bd->nbd = cpu_to_le16(3);
4940 start_bd->bd_flags.as_bitfield = ETH_TX_BD_FLAGS_START_BD;
96bed4b9 4941 start_bd->general_data &= ~ETH_TX_START_BD_PARSE_NBDS;
71034ba8
MC		 4942 start_bd->general_data |= (1 << ETH_TX_START_BD_HDR_NBDS_SHIFT);
4943
104a43ed 4944 if (BNX2X_CHIP_IS_E2_PLUS(bp))
96bed4b9 4945 pbd_e2->parsing_data = (UNICAST_ADDRESS <<
4ce45e02 4946 ETH_TX_PARSE_BD_E2_ETH_ADDR_TYPE_SHIFT);
96bed4b9 4947 else
4ce45e02 4948 pbd_e1x->global_data = (UNICAST_ADDRESS <<
96bed4b9 4949 ETH_TX_PARSE_BD_E1X_ETH_ADDR_TYPE_SHIFT);
71034ba8 4950 }
71034ba8 4951
523224a3 4952 val = (u64) ring_map >> 32;
71034ba8
MC		 4953 txbd->next_bd.addr_hi = cpu_to_le32(val);
4954
523224a3 4955 data->tx.tx_bd_page_base.hi = cpu_to_le32(val);
71034ba8 4956
523224a3 4957 val = (u64) ring_map & 0xffffffff;
71034ba8
MC		 4958 txbd->next_bd.addr_lo = cpu_to_le32(val);
4959
523224a3 4960 data->tx.tx_bd_page_base.lo = cpu_to_le32(val);
71034ba8 4961
523224a3
DK		 4962 /* Other ramrod params */
4963 data->tx.tx_sb_index_number = HC_SP_INDEX_ETH_ISCSI_CQ_CONS;
4964 data->tx.tx_status_block_id = BNX2X_DEF_SB_ID;
71034ba8
MC		 4965
4966 /* reset xstorm per client statistics */
523224a3 4967 if (cli < MAX_STAT_COUNTER_ID) {
619c5cb6
VZ		 4968 data->general.statistics_zero_flg = 1;
4969 data->general.statistics_en_flg = 1;
4970 data->general.statistics_counter_id = cli;
6b2a541d 4971 }
71034ba8
MC		 4972
4973 cp->tx_cons_ptr =
523224a3 4974 &sb->sp_sb.index_values[HC_SP_INDEX_ETH_ISCSI_CQ_CONS];
71034ba8
MC		 4975}
4976
523224a3
DK		 4977static void cnic_init_bnx2x_rx_ring(struct cnic_dev *dev,
4978 struct client_init_ramrod_data *data)
71034ba8
MC		 4979{
4980 struct cnic_local *cp = dev->cnic_priv;
104a43ed 4981 struct bnx2x *bp = netdev_priv(dev->netdev);
cd801536
MC		 4982 struct cnic_uio_dev *udev = cp->udev;
4983 struct eth_rx_bd *rxbd = (struct eth_rx_bd *) (udev->l2_ring +
2bc4078e 4984 BNX2_PAGE_SIZE);
71034ba8 4985 struct eth_rx_cqe_next_page *rxcqe = (struct eth_rx_cqe_next_page *)
2bc4078e 4986 (udev->l2_ring + (2 * BNX2_PAGE_SIZE));
523224a3 4987 struct host_sp_status_block *sb = cp->bnx2x_def_status_blk;
71034ba8 4988 int i;
5159fdc1 4989 u32 cli = cp->ethdev->iscsi_l2_client_id;
104a43ed 4990 int cl_qzone_id = BNX2X_CL_QZONE_ID(bp, cli);
71034ba8 4991 u32 val;
cd801536 4992 dma_addr_t ring_map = udev->l2_ring_map;
523224a3
DK		 4993
4994 /* General data */
4995 data->general.client_id = cli;
523224a3
DK		 4996 data->general.activate_flg = 1;
4997 data->general.sp_client_id = cli;
619c5cb6
VZ		 4998 data->general.mtu = cpu_to_le16(cp->l2_single_buf_size - 14);
4999 data->general.func_id = cp->pfid;
71034ba8
MC		 5000
5001 for (i = 0; i < BNX2X_MAX_RX_DESC_CNT; i++, rxbd++) {
5002 dma_addr_t buf_map;
5003 int n = (i % cp->l2_rx_ring_size) + 1;
5004
cd801536 5005 buf_map = udev->l2_buf_map + (n * cp->l2_single_buf_size);
71034ba8
MC		 5006 rxbd->addr_hi = cpu_to_le32((u64) buf_map >> 32);
5007 rxbd->addr_lo = cpu_to_le32(buf_map & 0xffffffff);
5008 }
71034ba8 5009
2bc4078e 5010 val = (u64) (ring_map + BNX2_PAGE_SIZE) >> 32;
71034ba8 5011 rxbd->addr_hi = cpu_to_le32(val);
523224a3 5012 data->rx.bd_page_base.hi = cpu_to_le32(val);
71034ba8 5013
2bc4078e 5014 val = (u64) (ring_map + BNX2_PAGE_SIZE) & 0xffffffff;
71034ba8 5015 rxbd->addr_lo = cpu_to_le32(val);
523224a3 5016 data->rx.bd_page_base.lo = cpu_to_le32(val);
71034ba8
MC		 5017
5018 rxcqe += BNX2X_MAX_RCQ_DESC_CNT;
2bc4078e 5019 val = (u64) (ring_map + (2 * BNX2_PAGE_SIZE)) >> 32;
71034ba8 5020 rxcqe->addr_hi = cpu_to_le32(val);
523224a3 5021 data->rx.cqe_page_base.hi = cpu_to_le32(val);
71034ba8 5022
2bc4078e 5023 val = (u64) (ring_map + (2 * BNX2_PAGE_SIZE)) & 0xffffffff;
71034ba8 5024 rxcqe->addr_lo = cpu_to_le32(val);
523224a3 5025 data->rx.cqe_page_base.lo = cpu_to_le32(val);
71034ba8 5026
523224a3
DK		 5027 /* Other ramrod params */
5028 data->rx.client_qzone_id = cl_qzone_id;
5029 data->rx.rx_sb_index_number = HC_SP_INDEX_ETH_ISCSI_RX_CQ_CONS;
5030 data->rx.status_block_id = BNX2X_DEF_SB_ID;
71034ba8 5031
523224a3 5032 data->rx.cache_line_alignment_log_size = L1_CACHE_SHIFT;
71034ba8 5033
619c5cb6 5034 data->rx.max_bytes_on_bd = cpu_to_le16(cp->l2_single_buf_size);
523224a3 5035 data->rx.outer_vlan_removal_enable_flg = 1;
619c5cb6
VZ		 5036 data->rx.silent_vlan_removal_flg = 1;
5037 data->rx.silent_vlan_value = 0;
5038 data->rx.silent_vlan_mask = 0xffff;
71034ba8
MC		 5039
5040 cp->rx_cons_ptr =
523224a3 5041 &sb->sp_sb.index_values[HC_SP_INDEX_ETH_ISCSI_RX_CQ_CONS];
5159fdc1 5042 cp->rx_cons = *cp->rx_cons_ptr;
71034ba8
MC		 5043}
5044
e21ba414
MC		 5045static void cnic_init_bnx2x_kcq(struct cnic_dev *dev)
5046{
5047 struct cnic_local *cp = dev->cnic_priv;
68c64d20 5048 struct bnx2x *bp = netdev_priv(dev->netdev);
e21ba414
MC		 5049 u32 pfid = cp->pfid;
5050
5051 cp->kcq1.io_addr = BAR_CSTRORM_INTMEM +
5052 CSTORM_ISCSI_EQ_PROD_OFFSET(pfid, 0);
5053 cp->kcq1.sw_prod_idx = 0;
5054
104a43ed 5055 if (BNX2X_CHIP_IS_E2_PLUS(bp)) {
e21ba414
MC		 5056 struct host_hc_status_block_e2 *sb = cp->status_blk.gen;
5057
5058 cp->kcq1.hw_prod_idx_ptr =
5059 &sb->sb.index_values[HC_INDEX_ISCSI_EQ_CONS];
5060 cp->kcq1.status_idx_ptr =
5061 &sb->sb.running_index[SM_RX_ID];
5062 } else {
5063 struct host_hc_status_block_e1x *sb = cp->status_blk.gen;
5064
5065 cp->kcq1.hw_prod_idx_ptr =
5066 &sb->sb.index_values[HC_INDEX_ISCSI_EQ_CONS];
5067 cp->kcq1.status_idx_ptr =
5068 &sb->sb.running_index[SM_RX_ID];
5069 }
5070
104a43ed 5071 if (BNX2X_CHIP_IS_E2_PLUS(bp)) {
e21ba414
MC		 5072 struct host_hc_status_block_e2 *sb = cp->status_blk.gen;
5073
5074 cp->kcq2.io_addr = BAR_USTRORM_INTMEM +
5075 USTORM_FCOE_EQ_PROD_OFFSET(pfid);
5076 cp->kcq2.sw_prod_idx = 0;
5077 cp->kcq2.hw_prod_idx_ptr =
5078 &sb->sb.index_values[HC_INDEX_FCOE_EQ_CONS];
5079 cp->kcq2.status_idx_ptr =
5080 &sb->sb.running_index[SM_RX_ID];
5081 }
5082}
5083
71034ba8
MC		 5084static int cnic_start_bnx2x_hw(struct cnic_dev *dev)
5085{
5086 struct cnic_local *cp = dev->cnic_priv;
68c64d20 5087 struct bnx2x *bp = netdev_priv(dev->netdev);
523224a3 5088 struct cnic_eth_dev *ethdev = cp->ethdev;
68c64d20 5089 int func, ret;
1420398d 5090 u32 pfid;
71034ba8 5091
a9e0a4f2 5092 dev->stats_addr = ethdev->addr_drv_info_to_mcp;
68c64d20
MC		 5093 cp->pfid = bp->pfid;
5094 cp->func = bp->pf_num;
ee87a82a 5095
68c64d20 5096 func = CNIC_FUNC(cp);
1420398d
MC		 5097 pfid = cp->pfid;
5098
71034ba8 5099 ret = cnic_init_id_tbl(&cp->cid_tbl, MAX_ISCSI_TBL_SZ,
11f23aa8 5100 cp->iscsi_start_cid, 0);
71034ba8
MC		 5101
5102 if (ret)
5103 return -ENOMEM;
5104
104a43ed 5105 if (BNX2X_CHIP_IS_E2_PLUS(bp)) {
dc219a2e 5106 ret = cnic_init_id_tbl(&cp->fcoe_cid_tbl, dev->max_fcoe_conn,
11f23aa8 5107 cp->fcoe_start_cid, 0);
e1928c86
MC		 5108
5109 if (ret)
5110 return -ENOMEM;
5111 }
5112
523224a3
DK		 5113 cp->bnx2x_igu_sb_id = ethdev->irq_arr[0].status_blk_num2;
5114
e21ba414 5115 cnic_init_bnx2x_kcq(dev);
71034ba8 5116
71034ba8 5117 /* Only 1 EQ */
e6c28894 5118 CNIC_WR16(dev, cp->kcq1.io_addr, MAX_KCQ_IDX);
71034ba8 5119 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
1420398d 5120 CSTORM_ISCSI_EQ_CONS_OFFSET(pfid, 0), 0);
71034ba8 5121 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
1420398d 5122 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(pfid, 0),
e6c28894 5123 cp->kcq1.dma.pg_map_arr[1] & 0xffffffff);
71034ba8 5124 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
1420398d 5125 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(pfid, 0) + 4,
e6c28894 5126 (u64) cp->kcq1.dma.pg_map_arr[1] >> 32);
71034ba8 5127 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
1420398d 5128 CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(pfid, 0),
e6c28894 5129 cp->kcq1.dma.pg_map_arr[0] & 0xffffffff);
71034ba8 5130 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
1420398d 5131 CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(pfid, 0) + 4,
e6c28894 5132 (u64) cp->kcq1.dma.pg_map_arr[0] >> 32);
71034ba8 5133 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
1420398d 5134 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_VALID_OFFSET(pfid, 0), 1);
71034ba8 5135 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
1420398d 5136 CSTORM_ISCSI_EQ_SB_NUM_OFFSET(pfid, 0), cp->status_blk_num);
71034ba8 5137 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
1420398d 5138 CSTORM_ISCSI_EQ_SB_INDEX_OFFSET(pfid, 0),
523224a3 5139 HC_INDEX_ISCSI_EQ_CONS);
71034ba8 5140
71034ba8 5141 CNIC_WR(dev, BAR_USTRORM_INTMEM +
1420398d 5142 USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(pfid),
71034ba8
MC		 5143 cp->gbl_buf_info.pg_map_arr[0] & 0xffffffff);
5144 CNIC_WR(dev, BAR_USTRORM_INTMEM +
1420398d 5145 USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(pfid) + 4,
71034ba8
MC		 5146 (u64) cp->gbl_buf_info.pg_map_arr[0] >> 32);
5147
523224a3
DK		 5148 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
5149 TSTORM_ISCSI_TCP_LOCAL_ADV_WND_OFFSET(pfid), DEF_RCV_BUF);
5150
71034ba8
MC		 5151 cnic_setup_bnx2x_context(dev);
5152
71034ba8
MC		 5153 ret = cnic_init_bnx2x_irq(dev);
5154 if (ret)
5155 return ret;
5156
ad9b4359 5157 ethdev->drv_state |= CNIC_DRV_STATE_HANDLES_IRQ;
71034ba8
MC		 5158 return 0;
5159}
5160
86b53606
MC		 5161static void cnic_init_rings(struct cnic_dev *dev)
5162{
541a7810 5163 struct cnic_local *cp = dev->cnic_priv;
68c64d20 5164 struct bnx2x *bp = netdev_priv(dev->netdev);
cd801536 5165 struct cnic_uio_dev *udev = cp->udev;
541a7810
MC		 5166
5167 if (test_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags))
5168 return;
5169
86b53606
MC		 5170 if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
5171 cnic_init_bnx2_tx_ring(dev);
5172 cnic_init_bnx2_rx_ring(dev);
541a7810 5173 set_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags);
71034ba8 5174 } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
5159fdc1
MC		 5175 u32 cli = cp->ethdev->iscsi_l2_client_id;
5176 u32 cid = cp->ethdev->iscsi_l2_cid;
68d7c1aa 5177 u32 cl_qzone_id;
523224a3 5178 struct client_init_ramrod_data *data;
71034ba8
MC		 5179 union l5cm_specific_data l5_data;
5180 struct ustorm_eth_rx_producers rx_prods = {0};
e1dd883c 5181 u32 off, i, *cid_ptr;
71034ba8
MC		 5182
5183 rx_prods.bd_prod = 0;
5184 rx_prods.cqe_prod = BNX2X_MAX_RCQ_DESC_CNT;
5185 barrier();
5186
104a43ed 5187 cl_qzone_id = BNX2X_CL_QZONE_ID(bp, cli);
523224a3 5188
c7596b79 5189 off = BAR_USTRORM_INTMEM +
104a43ed 5190 (BNX2X_CHIP_IS_E2_PLUS(bp) ?
ee87a82a 5191 USTORM_RX_PRODS_E2_OFFSET(cl_qzone_id) :
5bf945a8 5192 USTORM_RX_PRODS_E1X_OFFSET(BP_PORT(bp), cli));
71034ba8
MC		 5193
5194 for (i = 0; i < sizeof(struct ustorm_eth_rx_producers) / 4; i++)
c7596b79 5195 CNIC_WR(dev, off + i * 4, ((u32 *) &rx_prods)[i]);
71034ba8 5196
48f753d2
MC		 5197 set_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags);
5198
cd801536 5199 data = udev->l2_buf;
e1dd883c 5200 cid_ptr = udev->l2_buf + 12;
523224a3
DK		 5201
5202 memset(data, 0, sizeof(*data));
5203
5204 cnic_init_bnx2x_tx_ring(dev, data);
5205 cnic_init_bnx2x_rx_ring(dev, data);
5206
cd801536
MC		 5207 l5_data.phy_address.lo = udev->l2_buf_map & 0xffffffff;
5208 l5_data.phy_address.hi = (u64) udev->l2_buf_map >> 32;
523224a3 5209
541a7810
MC		 5210 set_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags);
5211
71034ba8 5212 cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_CLIENT_SETUP,
68d7c1aa 5213 cid, ETH_CONNECTION_TYPE, &l5_data);
523224a3 5214
48f753d2
MC		 5215 i = 0;
5216 while (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags) &&
5217 ++i < 10)
5218 msleep(1);
5219
5220 if (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags))
5221 netdev_err(dev->netdev,
5222 "iSCSI CLIENT_SETUP did not complete\n");
c2bff63f 5223 cnic_spq_completion(dev, DRV_CTL_RET_L2_SPQ_CREDIT_CMD, 1);
5159fdc1 5224 cnic_ring_ctl(dev, cid, cli, 1);
e1dd883c 5225 *cid_ptr = cid;
86b53606
MC		 5226 }
5227}
5228
5229static void cnic_shutdown_rings(struct cnic_dev *dev)
5230{
541a7810 5231 struct cnic_local *cp = dev->cnic_priv;
e1dd883c
MC		 5232 struct cnic_uio_dev *udev = cp->udev;
5233 void *rx_ring;
541a7810
MC		 5234
5235 if (!test_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags))
5236 return;
5237
86b53606
MC		 5238 if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
5239 cnic_shutdown_bnx2_rx_ring(dev);
71034ba8 5240 } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
5159fdc1
MC		 5241 u32 cli = cp->ethdev->iscsi_l2_client_id;
5242 u32 cid = cp->ethdev->iscsi_l2_cid;
8b065b67 5243 union l5cm_specific_data l5_data;
48f753d2 5244 int i;
71034ba8 5245
5159fdc1 5246 cnic_ring_ctl(dev, cid, cli, 0);
8b065b67 5247
48f753d2
MC		 5248 set_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags);
5249
8b065b67
MC		 5250 l5_data.phy_address.lo = cli;
5251 l5_data.phy_address.hi = 0;
5252 cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_HALT,
5159fdc1 5253 cid, ETH_CONNECTION_TYPE, &l5_data);
48f753d2
MC		 5254 i = 0;
5255 while (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags) &&
5256 ++i < 10)
5257 msleep(1);
5258
5259 if (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags))
5260 netdev_err(dev->netdev,
5261 "iSCSI CLIENT_HALT did not complete\n");
c2bff63f 5262 cnic_spq_completion(dev, DRV_CTL_RET_L2_SPQ_CREDIT_CMD, 1);
1bcdc32c
MC		 5263
5264 memset(&l5_data, 0, sizeof(l5_data));
523224a3 5265 cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_COMMON_CFC_DEL,
68d7c1aa 5266 cid, NONE_CONNECTION_TYPE, &l5_data);
1bcdc32c 5267 msleep(10);
86b53606 5268 }
541a7810 5269 clear_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags);
2bc4078e
MC		 5270 rx_ring = udev->l2_ring + BNX2_PAGE_SIZE;
5271 memset(rx_ring, 0, BNX2_PAGE_SIZE);
86b53606
MC		 5272}
5273
a3059b12 5274static int cnic_register_netdev(struct cnic_dev *dev)
a4636960
MC		 5275{
5276 struct cnic_local *cp = dev->cnic_priv;
5277 struct cnic_eth_dev *ethdev = cp->ethdev;
5278 int err;
5279
a3059b12
MC		 5280 if (!ethdev)
5281 return -ENODEV;
5282
5283 if (ethdev->drv_state & CNIC_DRV_STATE_REGD)
5284 return 0;
a4636960
MC		 5285
5286 err = ethdev->drv_register_cnic(dev->netdev, cp->cnic_ops, dev);
a3059b12 5287 if (err)
ddf79b20 5288 netdev_err(dev->netdev, "register_cnic failed\n");
a3059b12 5289
9e9402eb
MC		 5290 /* Read iSCSI config again. On some bnx2x device, iSCSI config
5291 * can change after firmware is downloaded.
5292 */
5293 dev->max_iscsi_conn = ethdev->max_iscsi_conn;
5294 if (ethdev->drv_state & CNIC_DRV_STATE_NO_ISCSI)
5295 dev->max_iscsi_conn = 0;
5296
a3059b12
MC		 5297 return err;
5298}
5299
5300static void cnic_unregister_netdev(struct cnic_dev *dev)
5301{
5302 struct cnic_local *cp = dev->cnic_priv;
5303 struct cnic_eth_dev *ethdev = cp->ethdev;
5304
5305 if (!ethdev)
5306 return;
5307
5308 ethdev->drv_unregister_cnic(dev->netdev);
5309}
5310
5311static int cnic_start_hw(struct cnic_dev *dev)
5312{
5313 struct cnic_local *cp = dev->cnic_priv;
5314 struct cnic_eth_dev *ethdev = cp->ethdev;
5315 int err;
5316
5317 if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
5318 return -EALREADY;
a4636960
MC		 5319
5320 dev->regview = ethdev->io_base;
a4636960
MC		 5321 pci_dev_get(dev->pcidev);
5322 cp->func = PCI_FUNC(dev->pcidev->devfn);
a4dde3ab 5323 cp->status_blk.gen = ethdev->irq_arr[0].status_blk;
a4636960
MC		 5324 cp->status_blk_num = ethdev->irq_arr[0].status_blk_num;
5325
5326 err = cp->alloc_resc(dev);
5327 if (err) {
ddf79b20 5328 netdev_err(dev->netdev, "allocate resource failure\n");
a4636960
MC		 5329 goto err1;
5330 }
5331
5332 err = cp->start_hw(dev);
5333 if (err)
5334 goto err1;
5335
5336 err = cnic_cm_open(dev);
5337 if (err)
5338 goto err1;
5339
5340 set_bit(CNIC_F_CNIC_UP, &dev->flags);
5341
5342 cp->enable_int(dev);
5343
5344 return 0;
5345
5346err1:
a4636960
MC		 5347 cp->free_resc(dev);
5348 pci_dev_put(dev->pcidev);
a4636960
MC		 5349 return err;
5350}
5351
5352static void cnic_stop_bnx2_hw(struct cnic_dev *dev)
5353{
a4636960
MC		 5354 cnic_disable_bnx2_int_sync(dev);
5355
5356 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
5357 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
5358
5359 cnic_init_context(dev, KWQ_CID);
5360 cnic_init_context(dev, KCQ_CID);
5361
5362 cnic_setup_5709_context(dev, 0);
5363 cnic_free_irq(dev);
5364
a4636960
MC		 5365 cnic_free_resc(dev);
5366}
5367
71034ba8
MC		 5368
5369static void cnic_stop_bnx2x_hw(struct cnic_dev *dev)
5370{
5371 struct cnic_local *cp = dev->cnic_priv;
68c64d20 5372 struct bnx2x *bp = netdev_priv(dev->netdev);
caa9e931
MC		 5373 u32 hc_index = HC_INDEX_ISCSI_EQ_CONS;
5374 u32 sb_id = cp->status_blk_num;
5375 u32 idx_off, syn_off;
71034ba8
MC		 5376
5377 cnic_free_irq(dev);
caa9e931 5378
104a43ed 5379 if (BNX2X_CHIP_IS_E2_PLUS(bp)) {
caa9e931
MC		 5380 idx_off = offsetof(struct hc_status_block_e2, index_values) +
5381 (hc_index * sizeof(u16));
5382
5383 syn_off = CSTORM_HC_SYNC_LINE_INDEX_E2_OFFSET(hc_index, sb_id);
5384 } else {
5385 idx_off = offsetof(struct hc_status_block_e1x, index_values) +
5386 (hc_index * sizeof(u16));
5387
5388 syn_off = CSTORM_HC_SYNC_LINE_INDEX_E1X_OFFSET(hc_index, sb_id);
5389 }
5390 CNIC_WR16(dev, BAR_CSTRORM_INTMEM + syn_off, 0);
5391 CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_STATUS_BLOCK_OFFSET(sb_id) +
5392 idx_off, 0);
5393
523224a3 5394 *cp->kcq1.hw_prod_idx_ptr = 0;
4e9c4fd3 5395 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
1420398d 5396 CSTORM_ISCSI_EQ_CONS_OFFSET(cp->pfid, 0), 0);
e6c28894 5397 CNIC_WR16(dev, cp->kcq1.io_addr, 0);
71034ba8
MC		 5398 cnic_free_resc(dev);
5399}
5400
a4636960
MC		 5401static void cnic_stop_hw(struct cnic_dev *dev)
5402{
5403 if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
5404 struct cnic_local *cp = dev->cnic_priv;
48f753d2 5405 int i = 0;
a4636960 5406
48f753d2
MC		 5407 /* Need to wait for the ring shutdown event to complete
5408 * before clearing the CNIC_UP flag.
5409 */
82346a7b 5410 while (cp->udev && cp->udev->uio_dev != -1 && i < 15) {
48f753d2
MC		 5411 msleep(100);
5412 i++;
5413 }
a3ceeeb8 5414 cnic_shutdown_rings(dev);
a2028b23 5415 cp->stop_cm(dev);
ad9b4359 5416 cp->ethdev->drv_state &= ~CNIC_DRV_STATE_HANDLES_IRQ;
a4636960 5417 clear_bit(CNIC_F_CNIC_UP, &dev->flags);
2cfa5a04 5418 RCU_INIT_POINTER(cp->ulp_ops[CNIC_ULP_L4], NULL);
a4636960
MC		 5419 synchronize_rcu();
5420 cnic_cm_shutdown(dev);
5421 cp->stop_hw(dev);
5422 pci_dev_put(dev->pcidev);
5423 }
5424}
5425
5426static void cnic_free_dev(struct cnic_dev *dev)
5427{
5428 int i = 0;
5429
5430 while ((atomic_read(&dev->ref_count) != 0) && i < 10) {
5431 msleep(100);
5432 i++;
5433 }
5434 if (atomic_read(&dev->ref_count) != 0)
ddf79b20 5435 netdev_err(dev->netdev, "Failed waiting for ref count to go to zero\n");
a4636960 5436
ddf79b20 5437 netdev_info(dev->netdev, "Removed CNIC device\n");
a4636960
MC		 5438 dev_put(dev->netdev);
5439 kfree(dev);
5440}
5441
5442static struct cnic_dev *cnic_alloc_dev(struct net_device *dev,
5443 struct pci_dev *pdev)
5444{
5445 struct cnic_dev *cdev;
5446 struct cnic_local *cp;
5447 int alloc_size;
5448
5449 alloc_size = sizeof(struct cnic_dev) + sizeof(struct cnic_local);
5450
b2adaca9
JP		 5451 cdev = kzalloc(alloc_size, GFP_KERNEL);
5452 if (cdev == NULL)
a4636960 5453 return NULL;
a4636960
MC		 5454
5455 cdev->netdev = dev;
5456 cdev->cnic_priv = (char *)cdev + sizeof(struct cnic_dev);
5457 cdev->register_device = cnic_register_device;
5458 cdev->unregister_device = cnic_unregister_device;
5459 cdev->iscsi_nl_msg_recv = cnic_iscsi_nl_msg_recv;
5460
5461 cp = cdev->cnic_priv;
5462 cp->dev = cdev;
a4636960
MC		 5463 cp->l2_single_buf_size = 0x400;
5464 cp->l2_rx_ring_size = 3;
5465
5466 spin_lock_init(&cp->cnic_ulp_lock);
5467
ddf79b20 5468 netdev_info(dev, "Added CNIC device\n");
a4636960
MC		 5469
5470 return cdev;
5471}
5472
5473static struct cnic_dev *init_bnx2_cnic(struct net_device *dev)
5474{
5475 struct pci_dev *pdev;
5476 struct cnic_dev *cdev;
5477 struct cnic_local *cp;
4bd9b0ff 5478 struct bnx2 *bp = netdev_priv(dev);
a4636960 5479 struct cnic_eth_dev *ethdev = NULL;
a4636960 5480
4bd9b0ff
MC		 5481 if (bp->cnic_probe)
5482 ethdev = (bp->cnic_probe)(dev);
5483
a4636960
MC		 5484 if (!ethdev)
5485 return NULL;
5486
5487 pdev = ethdev->pdev;
5488 if (!pdev)
5489 return NULL;
5490
5491 dev_hold(dev);
5492 pci_dev_get(pdev);
ff938e43
SS		 5493 if ((pdev->device == PCI_DEVICE_ID_NX2_5709 ||
5494 pdev->device == PCI_DEVICE_ID_NX2_5709S) &&
5495 (pdev->revision < 0x10)) {
5496 pci_dev_put(pdev);
5497 goto cnic_err;
a4636960
MC		 5498 }
5499 pci_dev_put(pdev);
5500
5501 cdev = cnic_alloc_dev(dev, pdev);
5502 if (cdev == NULL)
5503 goto cnic_err;
5504
5505 set_bit(CNIC_F_BNX2_CLASS, &cdev->flags);
5506 cdev->submit_kwqes = cnic_submit_bnx2_kwqes;
5507
5508 cp = cdev->cnic_priv;
5509 cp->ethdev = ethdev;
5510 cdev->pcidev = pdev;
ee87a82a 5511 cp->chip_id = ethdev->chip_id;
a4636960 5512
7625eb2f
MC		 5513 cdev->max_iscsi_conn = ethdev->max_iscsi_conn;
5514
a4636960
MC		 5515 cp->cnic_ops = &cnic_bnx2_ops;
5516 cp->start_hw = cnic_start_bnx2_hw;
5517 cp->stop_hw = cnic_stop_bnx2_hw;
5518 cp->setup_pgtbl = cnic_setup_page_tbl;
5519 cp->alloc_resc = cnic_alloc_bnx2_resc;
5520 cp->free_resc = cnic_free_resc;
5521 cp->start_cm = cnic_cm_init_bnx2_hw;
5522 cp->stop_cm = cnic_cm_stop_bnx2_hw;
5523 cp->enable_int = cnic_enable_bnx2_int;
5524 cp->disable_int_sync = cnic_disable_bnx2_int_sync;
5525 cp->close_conn = cnic_close_bnx2_conn;
a4636960
MC		 5526 return cdev;
5527
5528cnic_err:
5529 dev_put(dev);
5530 return NULL;
5531}
5532
71034ba8
MC		 5533static struct cnic_dev *init_bnx2x_cnic(struct net_device *dev)
5534{
5535 struct pci_dev *pdev;
5536 struct cnic_dev *cdev;
5537 struct cnic_local *cp;
4bd9b0ff 5538 struct bnx2x *bp = netdev_priv(dev);
71034ba8 5539 struct cnic_eth_dev *ethdev = NULL;
71034ba8 5540
4bd9b0ff
MC		 5541 if (bp->cnic_probe)
5542 ethdev = bp->cnic_probe(dev);
5543
71034ba8
MC		 5544 if (!ethdev)
5545 return NULL;
5546
5547 pdev = ethdev->pdev;
5548 if (!pdev)
5549 return NULL;
5550
5551 dev_hold(dev);
5552 cdev = cnic_alloc_dev(dev, pdev);
5553 if (cdev == NULL) {
5554 dev_put(dev);
5555 return NULL;
5556 }
5557
5558 set_bit(CNIC_F_BNX2X_CLASS, &cdev->flags);
5559 cdev->submit_kwqes = cnic_submit_bnx2x_kwqes;
5560
5561 cp = cdev->cnic_priv;
5562 cp->ethdev = ethdev;
5563 cdev->pcidev = pdev;
ee87a82a 5564 cp->chip_id = ethdev->chip_id;
71034ba8 5565
1d187b34
BW		 5566 cdev->stats_addr = ethdev->addr_drv_info_to_mcp;
5567
2ba45142
VZ		 5568 if (!(ethdev->drv_state & CNIC_DRV_STATE_NO_ISCSI))
5569 cdev->max_iscsi_conn = ethdev->max_iscsi_conn;
104a43ed 5570 if (CNIC_SUPPORTS_FCOE(bp)) {
2ba45142 5571 cdev->max_fcoe_conn = ethdev->max_fcoe_conn;
0eb43b4b
BPG		 5572 cdev->max_fcoe_exchanges = ethdev->max_fcoe_exchanges;
5573 }
2ba45142 5574
dc219a2e
MC		 5575 if (cdev->max_fcoe_conn > BNX2X_FCOE_NUM_CONNECTIONS)
5576 cdev->max_fcoe_conn = BNX2X_FCOE_NUM_CONNECTIONS;
5577
2ba45142
VZ		 5578 memcpy(cdev->mac_addr, ethdev->iscsi_mac, 6);
5579
71034ba8
MC		 5580 cp->cnic_ops = &cnic_bnx2x_ops;
5581 cp->start_hw = cnic_start_bnx2x_hw;
5582 cp->stop_hw = cnic_stop_bnx2x_hw;
5583 cp->setup_pgtbl = cnic_setup_page_tbl_le;
5584 cp->alloc_resc = cnic_alloc_bnx2x_resc;
5585 cp->free_resc = cnic_free_resc;
5586 cp->start_cm = cnic_cm_init_bnx2x_hw;
5587 cp->stop_cm = cnic_cm_stop_bnx2x_hw;
5588 cp->enable_int = cnic_enable_bnx2x_int;
5589 cp->disable_int_sync = cnic_disable_bnx2x_int_sync;
104a43ed 5590 if (BNX2X_CHIP_IS_E2_PLUS(bp)) {
ee87a82a 5591 cp->ack_int = cnic_ack_bnx2x_e2_msix;
8cc0e028
MC		 5592 cp->arm_int = cnic_arm_bnx2x_e2_msix;
5593 } else {
ee87a82a 5594 cp->ack_int = cnic_ack_bnx2x_msix;
8cc0e028
MC		 5595 cp->arm_int = cnic_arm_bnx2x_msix;
5596 }
71034ba8 5597 cp->close_conn = cnic_close_bnx2x_conn;
71034ba8
MC		 5598 return cdev;
5599}
5600
a4636960
MC		 5601static struct cnic_dev *is_cnic_dev(struct net_device *dev)
5602{
5603 struct ethtool_drvinfo drvinfo;
5604 struct cnic_dev *cdev = NULL;
5605
5606 if (dev->ethtool_ops && dev->ethtool_ops->get_drvinfo) {
5607 memset(&drvinfo, 0, sizeof(drvinfo));
5608 dev->ethtool_ops->get_drvinfo(dev, &drvinfo);
5609
5610 if (!strcmp(drvinfo.driver, "bnx2"))
5611 cdev = init_bnx2_cnic(dev);
71034ba8
MC		 5612 if (!strcmp(drvinfo.driver, "bnx2x"))
5613 cdev = init_bnx2x_cnic(dev);
a4636960
MC		 5614 if (cdev) {
5615 write_lock(&cnic_dev_lock);
5616 list_add(&cdev->list, &cnic_dev_list);
5617 write_unlock(&cnic_dev_lock);
5618 }
5619 }
5620 return cdev;
5621}
5622
415199f2
MC		 5623static void cnic_rcv_netevent(struct cnic_local *cp, unsigned long event,
5624 u16 vlan_id)
5625{
5626 int if_type;
5627
5628 rcu_read_lock();
5629 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
5630 struct cnic_ulp_ops *ulp_ops;
5631 void *ctx;
5632
5633 ulp_ops = rcu_dereference(cp->ulp_ops[if_type]);
5634 if (!ulp_ops || !ulp_ops->indicate_netevent)
5635 continue;
5636
5637 ctx = cp->ulp_handle[if_type];
5638
5639 ulp_ops->indicate_netevent(ctx, event, vlan_id);
5640 }
5641 rcu_read_unlock();
5642}
5643
1aa8b471 5644/* netdev event handler */
a4636960
MC		 5645static int cnic_netdev_event(struct notifier_block *this, unsigned long event,
5646 void *ptr)
5647{
351638e7 5648 struct net_device *netdev = netdev_notifier_info_to_dev(ptr);
a4636960 5649 struct cnic_dev *dev;
a4636960
MC		 5650 int new_dev = 0;
5651
5652 dev = cnic_from_netdev(netdev);
5653
415fb87d 5654 if (!dev && event == NETDEV_REGISTER) {
a4636960
MC		 5655 /* Check for the hot-plug device */
5656 dev = is_cnic_dev(netdev);
5657 if (dev) {
5658 new_dev = 1;
5659 cnic_hold(dev);
5660 }
5661 }
5662 if (dev) {
5663 struct cnic_local *cp = dev->cnic_priv;
5664
5665 if (new_dev)
5666 cnic_ulp_init(dev);
5667 else if (event == NETDEV_UNREGISTER)
5668 cnic_ulp_exit(dev);
6053bbf7 5669
415fb87d 5670 if (event == NETDEV_UP) {
a3059b12
MC		 5671 if (cnic_register_netdev(dev) != 0) {
5672 cnic_put(dev);
5673 goto done;
5674 }
a4636960
MC		 5675 if (!cnic_start_hw(dev))
5676 cnic_ulp_start(dev);
a4636960
MC		 5677 }
5678
415199f2 5679 cnic_rcv_netevent(cp, event, 0);
a4636960
MC		 5680
5681 if (event == NETDEV_GOING_DOWN) {
a4636960
MC		 5682 cnic_ulp_stop(dev);
5683 cnic_stop_hw(dev);
a3059b12 5684 cnic_unregister_netdev(dev);
a4636960
MC		 5685 } else if (event == NETDEV_UNREGISTER) {
5686 write_lock(&cnic_dev_lock);
5687 list_del_init(&dev->list);
5688 write_unlock(&cnic_dev_lock);
5689
5690 cnic_put(dev);
5691 cnic_free_dev(dev);
5692 goto done;
5693 }
5694 cnic_put(dev);
415199f2
MC		 5695 } else {
5696 struct net_device *realdev;
5697 u16 vid;
5698
5699 vid = cnic_get_vlan(netdev, &realdev);
5700 if (realdev) {
5701 dev = cnic_from_netdev(realdev);
5702 if (dev) {
5703 vid |= VLAN_TAG_PRESENT;
5704 cnic_rcv_netevent(dev->cnic_priv, event, vid);
5705 cnic_put(dev);
5706 }
5707 }
a4636960
MC		 5708 }
5709done:
5710 return NOTIFY_DONE;
5711}
5712
5713static struct notifier_block cnic_netdev_notifier = {
5714 .notifier_call = cnic_netdev_event
5715};
5716
5717static void cnic_release(void)
5718{
a3ceeeb8 5719 struct cnic_uio_dev *udev;
a4636960 5720
a3ceeeb8
MC		 5721 while (!list_empty(&cnic_udev_list)) {
5722 udev = list_entry(cnic_udev_list.next, struct cnic_uio_dev,
5723 list);
5724 cnic_free_uio(udev);
5725 }
a4636960
MC		 5726}
5727
5728static int __init cnic_init(void)
5729{
5730 int rc = 0;
5731
ddf79b20 5732 pr_info("%s", version);
a4636960
MC		 5733
5734 rc = register_netdevice_notifier(&cnic_netdev_notifier);
5735 if (rc) {
5736 cnic_release();
5737 return rc;
5738 }
5739
fdf24086
MC		 5740 cnic_wq = create_singlethread_workqueue("cnic_wq");
5741 if (!cnic_wq) {
5742 cnic_release();
5743 unregister_netdevice_notifier(&cnic_netdev_notifier);
5744 return -ENOMEM;
5745 }
5746
a4636960
MC		 5747 return 0;
5748}
5749
5750static void __exit cnic_exit(void)
5751{
5752 unregister_netdevice_notifier(&cnic_netdev_notifier);
5753 cnic_release();
fdf24086 5754 destroy_workqueue(cnic_wq);
a4636960
MC		 5755}
5756
5757module_init(cnic_init);
5758module_exit(cnic_exit);
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