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111fc64a RV |
1 | /********************************************************************** |
2 | * Author: Cavium, Inc. | |
3 | * | |
4 | * Contact: support@cavium.com | |
5 | * Please include "LiquidIO" in the subject. | |
6 | * | |
7 | * Copyright (c) 2003-2016 Cavium, Inc. | |
8 | * | |
9 | * This file is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License, Version 2, as | |
11 | * published by the Free Software Foundation. | |
12 | * | |
13 | * This file is distributed in the hope that it will be useful, but | |
14 | * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty | |
15 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or | |
16 | * NONINFRINGEMENT. See the GNU General Public License for more details. | |
17 | ***********************************************************************/ | |
e3bfc6e7 | 18 | #include <linux/module.h> |
111fc64a RV |
19 | #include <linux/pci.h> |
20 | #include <net/vxlan.h> | |
21 | #include "liquidio_common.h" | |
22 | #include "octeon_droq.h" | |
23 | #include "octeon_iq.h" | |
24 | #include "response_manager.h" | |
25 | #include "octeon_device.h" | |
846b4687 | 26 | #include "octeon_nic.h" |
69c69da3 | 27 | #include "octeon_main.h" |
846b4687 | 28 | #include "octeon_network.h" |
69c69da3 | 29 | #include "cn23xx_vf_device.h" |
111fc64a RV |
30 | |
31 | MODULE_AUTHOR("Cavium Networks, <support@cavium.com>"); | |
32 | MODULE_DESCRIPTION("Cavium LiquidIO Intelligent Server Adapter Virtual Function Driver"); | |
33 | MODULE_LICENSE("GPL"); | |
34 | MODULE_VERSION(LIQUIDIO_VERSION); | |
35 | ||
846b4687 RV |
36 | static int debug = -1; |
37 | module_param(debug, int, 0644); | |
38 | MODULE_PARM_DESC(debug, "NETIF_MSG debug bits"); | |
39 | ||
40 | #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK) | |
41 | ||
9217c3cf RV |
42 | /* Bit mask values for lio->ifstate */ |
43 | #define LIO_IFSTATE_DROQ_OPS 0x01 | |
846b4687 RV |
44 | #define LIO_IFSTATE_REGISTERED 0x02 |
45 | #define LIO_IFSTATE_RUNNING 0x04 | |
f625fe62 | 46 | #define LIO_IFSTATE_RX_TIMESTAMP_ENABLED 0x08 |
846b4687 RV |
47 | |
48 | struct liquidio_if_cfg_context { | |
49 | int octeon_id; | |
50 | ||
51 | wait_queue_head_t wc; | |
52 | ||
53 | int cond; | |
54 | }; | |
55 | ||
56 | struct liquidio_if_cfg_resp { | |
57 | u64 rh; | |
58 | struct liquidio_if_cfg_info cfg_info; | |
59 | u64 status; | |
60 | }; | |
61 | ||
9217c3cf RV |
62 | struct liquidio_rx_ctl_context { |
63 | int octeon_id; | |
64 | ||
65 | wait_queue_head_t wc; | |
66 | ||
67 | int cond; | |
68 | }; | |
69 | ||
f625fe62 RV |
70 | struct oct_timestamp_resp { |
71 | u64 rh; | |
72 | u64 timestamp; | |
73 | u64 status; | |
74 | }; | |
75 | ||
9981328a RV |
76 | union tx_info { |
77 | u64 u64; | |
78 | struct { | |
79 | #ifdef __BIG_ENDIAN_BITFIELD | |
80 | u16 gso_size; | |
81 | u16 gso_segs; | |
82 | u32 reserved; | |
83 | #else | |
84 | u32 reserved; | |
85 | u16 gso_segs; | |
86 | u16 gso_size; | |
87 | #endif | |
88 | } s; | |
89 | }; | |
90 | ||
beea50a5 RV |
91 | #define OCTNIC_MAX_SG (MAX_SKB_FRAGS) |
92 | ||
846b4687 RV |
93 | #define OCTNIC_GSO_MAX_HEADER_SIZE 128 |
94 | #define OCTNIC_GSO_MAX_SIZE \ | |
95 | (CN23XX_DEFAULT_INPUT_JABBER - OCTNIC_GSO_MAX_HEADER_SIZE) | |
96 | ||
beea50a5 RV |
97 | struct octnic_gather { |
98 | /* List manipulation. Next and prev pointers. */ | |
99 | struct list_head list; | |
100 | ||
101 | /* Size of the gather component at sg in bytes. */ | |
102 | int sg_size; | |
103 | ||
104 | /* Number of bytes that sg was adjusted to make it 8B-aligned. */ | |
105 | int adjust; | |
106 | ||
107 | /* Gather component that can accommodate max sized fragment list | |
108 | * received from the IP layer. | |
109 | */ | |
110 | struct octeon_sg_entry *sg; | |
67e303e0 VB |
111 | |
112 | dma_addr_t sg_dma_ptr; | |
beea50a5 RV |
113 | }; |
114 | ||
111fc64a RV |
115 | struct octeon_device_priv { |
116 | /* Tasklet structures for this device. */ | |
117 | struct tasklet_struct droq_tasklet; | |
118 | unsigned long napi_mask; | |
119 | }; | |
120 | ||
121 | static int | |
122 | liquidio_vf_probe(struct pci_dev *pdev, const struct pci_device_id *ent); | |
123 | static void liquidio_vf_remove(struct pci_dev *pdev); | |
69c69da3 | 124 | static int octeon_device_init(struct octeon_device *oct); |
846b4687 | 125 | static int liquidio_stop(struct net_device *netdev); |
111fc64a | 126 | |
b3c35973 RV |
127 | static int lio_wait_for_oq_pkts(struct octeon_device *oct) |
128 | { | |
129 | struct octeon_device_priv *oct_priv = | |
130 | (struct octeon_device_priv *)oct->priv; | |
131 | int retry = MAX_VF_IP_OP_PENDING_PKT_COUNT; | |
132 | int pkt_cnt = 0, pending_pkts; | |
133 | int i; | |
134 | ||
135 | do { | |
136 | pending_pkts = 0; | |
137 | ||
138 | for (i = 0; i < MAX_OCTEON_OUTPUT_QUEUES(oct); i++) { | |
139 | if (!(oct->io_qmask.oq & BIT_ULL(i))) | |
140 | continue; | |
141 | pkt_cnt += octeon_droq_check_hw_for_pkts(oct->droq[i]); | |
142 | } | |
143 | if (pkt_cnt > 0) { | |
144 | pending_pkts += pkt_cnt; | |
145 | tasklet_schedule(&oct_priv->droq_tasklet); | |
146 | } | |
147 | pkt_cnt = 0; | |
148 | schedule_timeout_uninterruptible(1); | |
149 | ||
150 | } while (retry-- && pending_pkts); | |
151 | ||
152 | return pkt_cnt; | |
153 | } | |
154 | ||
155 | /** | |
156 | * \brief wait for all pending requests to complete | |
157 | * @param oct Pointer to Octeon device | |
158 | * | |
159 | * Called during shutdown sequence | |
160 | */ | |
161 | static int wait_for_pending_requests(struct octeon_device *oct) | |
162 | { | |
163 | int i, pcount = 0; | |
164 | ||
165 | for (i = 0; i < MAX_VF_IP_OP_PENDING_PKT_COUNT; i++) { | |
166 | pcount = atomic_read( | |
167 | &oct->response_list[OCTEON_ORDERED_SC_LIST] | |
168 | .pending_req_count); | |
169 | if (pcount) | |
170 | schedule_timeout_uninterruptible(HZ / 10); | |
171 | else | |
172 | break; | |
173 | } | |
174 | ||
175 | if (pcount) | |
176 | return 1; | |
177 | ||
178 | return 0; | |
179 | } | |
180 | ||
b0d66369 RV |
181 | /** |
182 | * \brief Cause device to go quiet so it can be safely removed/reset/etc | |
183 | * @param oct Pointer to Octeon device | |
184 | */ | |
185 | static void pcierror_quiesce_device(struct octeon_device *oct) | |
186 | { | |
187 | int i; | |
188 | ||
189 | /* Disable the input and output queues now. No more packets will | |
190 | * arrive from Octeon, but we should wait for all packet processing | |
191 | * to finish. | |
192 | */ | |
193 | ||
194 | /* To allow for in-flight requests */ | |
195 | schedule_timeout_uninterruptible(100); | |
196 | ||
197 | if (wait_for_pending_requests(oct)) | |
198 | dev_err(&oct->pci_dev->dev, "There were pending requests\n"); | |
199 | ||
200 | /* Force all requests waiting to be fetched by OCTEON to complete. */ | |
201 | for (i = 0; i < MAX_OCTEON_INSTR_QUEUES(oct); i++) { | |
202 | struct octeon_instr_queue *iq; | |
203 | ||
204 | if (!(oct->io_qmask.iq & BIT_ULL(i))) | |
205 | continue; | |
206 | iq = oct->instr_queue[i]; | |
207 | ||
208 | if (atomic_read(&iq->instr_pending)) { | |
209 | spin_lock_bh(&iq->lock); | |
210 | iq->fill_cnt = 0; | |
211 | iq->octeon_read_index = iq->host_write_index; | |
212 | iq->stats.instr_processed += | |
213 | atomic_read(&iq->instr_pending); | |
214 | lio_process_iq_request_list(oct, iq, 0); | |
215 | spin_unlock_bh(&iq->lock); | |
216 | } | |
217 | } | |
218 | ||
219 | /* Force all pending ordered list requests to time out. */ | |
220 | lio_process_ordered_list(oct, 1); | |
221 | ||
222 | /* We do not need to wait for output queue packets to be processed. */ | |
223 | } | |
224 | ||
225 | /** | |
226 | * \brief Cleanup PCI AER uncorrectable error status | |
227 | * @param dev Pointer to PCI device | |
228 | */ | |
229 | static void cleanup_aer_uncorrect_error_status(struct pci_dev *dev) | |
230 | { | |
231 | u32 status, mask; | |
232 | int pos = 0x100; | |
233 | ||
234 | pr_info("%s :\n", __func__); | |
235 | ||
236 | pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, &status); | |
237 | pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_SEVER, &mask); | |
238 | if (dev->error_state == pci_channel_io_normal) | |
239 | status &= ~mask; /* Clear corresponding nonfatal bits */ | |
240 | else | |
241 | status &= mask; /* Clear corresponding fatal bits */ | |
242 | pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, status); | |
243 | } | |
244 | ||
245 | /** | |
246 | * \brief Stop all PCI IO to a given device | |
247 | * @param dev Pointer to Octeon device | |
248 | */ | |
249 | static void stop_pci_io(struct octeon_device *oct) | |
250 | { | |
251 | struct msix_entry *msix_entries; | |
252 | int i; | |
253 | ||
254 | /* No more instructions will be forwarded. */ | |
255 | atomic_set(&oct->status, OCT_DEV_IN_RESET); | |
256 | ||
257 | for (i = 0; i < oct->ifcount; i++) | |
258 | netif_device_detach(oct->props[i].netdev); | |
259 | ||
260 | /* Disable interrupts */ | |
261 | oct->fn_list.disable_interrupt(oct, OCTEON_ALL_INTR); | |
262 | ||
263 | pcierror_quiesce_device(oct); | |
264 | if (oct->msix_on) { | |
265 | msix_entries = (struct msix_entry *)oct->msix_entries; | |
266 | for (i = 0; i < oct->num_msix_irqs; i++) { | |
267 | /* clear the affinity_cpumask */ | |
268 | irq_set_affinity_hint(msix_entries[i].vector, | |
269 | NULL); | |
270 | free_irq(msix_entries[i].vector, | |
271 | &oct->ioq_vector[i]); | |
272 | } | |
273 | pci_disable_msix(oct->pci_dev); | |
274 | kfree(oct->msix_entries); | |
275 | oct->msix_entries = NULL; | |
276 | octeon_free_ioq_vector(oct); | |
277 | } | |
278 | dev_dbg(&oct->pci_dev->dev, "Device state is now %s\n", | |
279 | lio_get_state_string(&oct->status)); | |
280 | ||
281 | /* making it a common function for all OCTEON models */ | |
282 | cleanup_aer_uncorrect_error_status(oct->pci_dev); | |
283 | ||
284 | pci_disable_device(oct->pci_dev); | |
285 | } | |
286 | ||
287 | /** | |
288 | * \brief called when PCI error is detected | |
289 | * @param pdev Pointer to PCI device | |
290 | * @param state The current pci connection state | |
291 | * | |
292 | * This function is called after a PCI bus error affecting | |
293 | * this device has been detected. | |
294 | */ | |
295 | static pci_ers_result_t liquidio_pcie_error_detected(struct pci_dev *pdev, | |
296 | pci_channel_state_t state) | |
297 | { | |
298 | struct octeon_device *oct = pci_get_drvdata(pdev); | |
299 | ||
300 | /* Non-correctable Non-fatal errors */ | |
301 | if (state == pci_channel_io_normal) { | |
302 | dev_err(&oct->pci_dev->dev, "Non-correctable non-fatal error reported:\n"); | |
303 | cleanup_aer_uncorrect_error_status(oct->pci_dev); | |
304 | return PCI_ERS_RESULT_CAN_RECOVER; | |
305 | } | |
306 | ||
307 | /* Non-correctable Fatal errors */ | |
308 | dev_err(&oct->pci_dev->dev, "Non-correctable FATAL reported by PCI AER driver\n"); | |
309 | stop_pci_io(oct); | |
310 | ||
311 | return PCI_ERS_RESULT_DISCONNECT; | |
312 | } | |
313 | ||
314 | /* For PCI-E Advanced Error Recovery (AER) Interface */ | |
315 | static const struct pci_error_handlers liquidio_vf_err_handler = { | |
316 | .error_detected = liquidio_pcie_error_detected, | |
317 | }; | |
318 | ||
111fc64a RV |
319 | static const struct pci_device_id liquidio_vf_pci_tbl[] = { |
320 | { | |
321 | PCI_VENDOR_ID_CAVIUM, OCTEON_CN23XX_VF_VID, | |
322 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 | |
323 | }, | |
324 | { | |
325 | 0, 0, 0, 0, 0, 0, 0 | |
326 | } | |
327 | }; | |
328 | MODULE_DEVICE_TABLE(pci, liquidio_vf_pci_tbl); | |
329 | ||
330 | static struct pci_driver liquidio_vf_pci_driver = { | |
331 | .name = "LiquidIO_VF", | |
332 | .id_table = liquidio_vf_pci_tbl, | |
333 | .probe = liquidio_vf_probe, | |
334 | .remove = liquidio_vf_remove, | |
b0d66369 | 335 | .err_handler = &liquidio_vf_err_handler, /* For AER */ |
111fc64a RV |
336 | }; |
337 | ||
9217c3cf RV |
338 | /** |
339 | * \brief check interface state | |
340 | * @param lio per-network private data | |
341 | * @param state_flag flag state to check | |
342 | */ | |
343 | static int ifstate_check(struct lio *lio, int state_flag) | |
344 | { | |
345 | return atomic_read(&lio->ifstate) & state_flag; | |
346 | } | |
347 | ||
846b4687 RV |
348 | /** |
349 | * \brief set interface state | |
350 | * @param lio per-network private data | |
351 | * @param state_flag flag state to set | |
352 | */ | |
353 | static void ifstate_set(struct lio *lio, int state_flag) | |
354 | { | |
355 | atomic_set(&lio->ifstate, (atomic_read(&lio->ifstate) | state_flag)); | |
356 | } | |
357 | ||
358 | /** | |
359 | * \brief clear interface state | |
360 | * @param lio per-network private data | |
361 | * @param state_flag flag state to clear | |
362 | */ | |
363 | static void ifstate_reset(struct lio *lio, int state_flag) | |
364 | { | |
365 | atomic_set(&lio->ifstate, (atomic_read(&lio->ifstate) & ~(state_flag))); | |
366 | } | |
367 | ||
3cd25e48 RV |
368 | /** |
369 | * \brief Stop Tx queues | |
370 | * @param netdev network device | |
371 | */ | |
372 | static void txqs_stop(struct net_device *netdev) | |
373 | { | |
374 | if (netif_is_multiqueue(netdev)) { | |
375 | int i; | |
376 | ||
377 | for (i = 0; i < netdev->num_tx_queues; i++) | |
378 | netif_stop_subqueue(netdev, i); | |
379 | } else { | |
380 | netif_stop_queue(netdev); | |
381 | } | |
382 | } | |
383 | ||
384 | /** | |
385 | * \brief Start Tx queues | |
386 | * @param netdev network device | |
387 | */ | |
388 | static void txqs_start(struct net_device *netdev) | |
389 | { | |
390 | if (netif_is_multiqueue(netdev)) { | |
391 | int i; | |
392 | ||
393 | for (i = 0; i < netdev->num_tx_queues; i++) | |
394 | netif_start_subqueue(netdev, i); | |
395 | } else { | |
396 | netif_start_queue(netdev); | |
397 | } | |
398 | } | |
399 | ||
400 | /** | |
401 | * \brief Wake Tx queues | |
402 | * @param netdev network device | |
403 | */ | |
404 | static void txqs_wake(struct net_device *netdev) | |
405 | { | |
406 | struct lio *lio = GET_LIO(netdev); | |
407 | ||
408 | if (netif_is_multiqueue(netdev)) { | |
409 | int i; | |
410 | ||
411 | for (i = 0; i < netdev->num_tx_queues; i++) { | |
412 | int qno = lio->linfo.txpciq[i % (lio->linfo.num_txpciq)] | |
413 | .s.q_no; | |
414 | if (__netif_subqueue_stopped(netdev, i)) { | |
415 | INCR_INSTRQUEUE_PKT_COUNT(lio->oct_dev, qno, | |
416 | tx_restart, 1); | |
417 | netif_wake_subqueue(netdev, i); | |
418 | } | |
419 | } | |
420 | } else { | |
421 | INCR_INSTRQUEUE_PKT_COUNT(lio->oct_dev, lio->txq, | |
422 | tx_restart, 1); | |
423 | netif_wake_queue(netdev); | |
424 | } | |
425 | } | |
426 | ||
427 | /** | |
428 | * \brief Start Tx queue | |
429 | * @param netdev network device | |
430 | */ | |
431 | static void start_txq(struct net_device *netdev) | |
432 | { | |
433 | struct lio *lio = GET_LIO(netdev); | |
434 | ||
435 | if (lio->linfo.link.s.link_up) { | |
436 | txqs_start(netdev); | |
437 | return; | |
438 | } | |
439 | } | |
440 | ||
9bdca5c6 RV |
441 | /** |
442 | * \brief Wake a queue | |
443 | * @param netdev network device | |
444 | * @param q which queue to wake | |
445 | */ | |
446 | static void wake_q(struct net_device *netdev, int q) | |
447 | { | |
448 | if (netif_is_multiqueue(netdev)) | |
449 | netif_wake_subqueue(netdev, q); | |
450 | else | |
451 | netif_wake_queue(netdev); | |
452 | } | |
453 | ||
9981328a RV |
454 | /** |
455 | * \brief Stop a queue | |
456 | * @param netdev network device | |
457 | * @param q which queue to stop | |
458 | */ | |
459 | static void stop_q(struct net_device *netdev, int q) | |
460 | { | |
461 | if (netif_is_multiqueue(netdev)) | |
462 | netif_stop_subqueue(netdev, q); | |
463 | else | |
464 | netif_stop_queue(netdev); | |
465 | } | |
466 | ||
beea50a5 RV |
467 | /** |
468 | * Remove the node at the head of the list. The list would be empty at | |
469 | * the end of this call if there are no more nodes in the list. | |
470 | */ | |
471 | static struct list_head *list_delete_head(struct list_head *root) | |
472 | { | |
473 | struct list_head *node; | |
474 | ||
475 | if ((root->prev == root) && (root->next == root)) | |
476 | node = NULL; | |
477 | else | |
478 | node = root->next; | |
479 | ||
480 | if (node) | |
481 | list_del(node); | |
482 | ||
483 | return node; | |
484 | } | |
485 | ||
486 | /** | |
487 | * \brief Delete gather lists | |
488 | * @param lio per-network private data | |
489 | */ | |
490 | static void delete_glists(struct lio *lio) | |
491 | { | |
492 | struct octnic_gather *g; | |
493 | int i; | |
494 | ||
67e303e0 VB |
495 | kfree(lio->glist_lock); |
496 | lio->glist_lock = NULL; | |
497 | ||
beea50a5 RV |
498 | if (!lio->glist) |
499 | return; | |
500 | ||
501 | for (i = 0; i < lio->linfo.num_txpciq; i++) { | |
502 | do { | |
503 | g = (struct octnic_gather *) | |
504 | list_delete_head(&lio->glist[i]); | |
67e303e0 | 505 | if (g) |
beea50a5 | 506 | kfree(g); |
beea50a5 | 507 | } while (g); |
67e303e0 VB |
508 | |
509 | if (lio->glists_virt_base && lio->glists_virt_base[i]) { | |
510 | lio_dma_free(lio->oct_dev, | |
511 | lio->glist_entry_size * lio->tx_qsize, | |
512 | lio->glists_virt_base[i], | |
513 | lio->glists_dma_base[i]); | |
514 | } | |
beea50a5 RV |
515 | } |
516 | ||
67e303e0 VB |
517 | kfree(lio->glists_virt_base); |
518 | lio->glists_virt_base = NULL; | |
519 | ||
520 | kfree(lio->glists_dma_base); | |
521 | lio->glists_dma_base = NULL; | |
522 | ||
beea50a5 | 523 | kfree(lio->glist); |
67e303e0 | 524 | lio->glist = NULL; |
beea50a5 RV |
525 | } |
526 | ||
527 | /** | |
528 | * \brief Setup gather lists | |
529 | * @param lio per-network private data | |
530 | */ | |
531 | static int setup_glists(struct lio *lio, int num_iqs) | |
532 | { | |
533 | struct octnic_gather *g; | |
534 | int i, j; | |
535 | ||
536 | lio->glist_lock = | |
537 | kzalloc(sizeof(*lio->glist_lock) * num_iqs, GFP_KERNEL); | |
538 | if (!lio->glist_lock) | |
67e303e0 | 539 | return -ENOMEM; |
beea50a5 RV |
540 | |
541 | lio->glist = | |
542 | kzalloc(sizeof(*lio->glist) * num_iqs, GFP_KERNEL); | |
543 | if (!lio->glist) { | |
544 | kfree(lio->glist_lock); | |
67e303e0 VB |
545 | lio->glist_lock = NULL; |
546 | return -ENOMEM; | |
547 | } | |
548 | ||
549 | lio->glist_entry_size = | |
550 | ROUNDUP8((ROUNDUP4(OCTNIC_MAX_SG) >> 2) * OCT_SG_ENTRY_SIZE); | |
551 | ||
552 | /* allocate memory to store virtual and dma base address of | |
553 | * per glist consistent memory | |
554 | */ | |
555 | lio->glists_virt_base = kcalloc(num_iqs, sizeof(*lio->glists_virt_base), | |
556 | GFP_KERNEL); | |
557 | lio->glists_dma_base = kcalloc(num_iqs, sizeof(*lio->glists_dma_base), | |
558 | GFP_KERNEL); | |
559 | ||
560 | if (!lio->glists_virt_base || !lio->glists_dma_base) { | |
561 | delete_glists(lio); | |
562 | return -ENOMEM; | |
beea50a5 RV |
563 | } |
564 | ||
565 | for (i = 0; i < num_iqs; i++) { | |
566 | spin_lock_init(&lio->glist_lock[i]); | |
567 | ||
568 | INIT_LIST_HEAD(&lio->glist[i]); | |
569 | ||
67e303e0 VB |
570 | lio->glists_virt_base[i] = |
571 | lio_dma_alloc(lio->oct_dev, | |
572 | lio->glist_entry_size * lio->tx_qsize, | |
573 | &lio->glists_dma_base[i]); | |
574 | ||
575 | if (!lio->glists_virt_base[i]) { | |
576 | delete_glists(lio); | |
577 | return -ENOMEM; | |
578 | } | |
579 | ||
beea50a5 RV |
580 | for (j = 0; j < lio->tx_qsize; j++) { |
581 | g = kzalloc(sizeof(*g), GFP_KERNEL); | |
582 | if (!g) | |
583 | break; | |
584 | ||
67e303e0 VB |
585 | g->sg = lio->glists_virt_base[i] + |
586 | (j * lio->glist_entry_size); | |
beea50a5 | 587 | |
67e303e0 VB |
588 | g->sg_dma_ptr = lio->glists_dma_base[i] + |
589 | (j * lio->glist_entry_size); | |
beea50a5 | 590 | |
beea50a5 RV |
591 | list_add_tail(&g->list, &lio->glist[i]); |
592 | } | |
593 | ||
594 | if (j != lio->tx_qsize) { | |
595 | delete_glists(lio); | |
67e303e0 | 596 | return -ENOMEM; |
beea50a5 RV |
597 | } |
598 | } | |
599 | ||
600 | return 0; | |
601 | } | |
602 | ||
3cd25e48 RV |
603 | /** |
604 | * \brief Print link information | |
605 | * @param netdev network device | |
606 | */ | |
607 | static void print_link_info(struct net_device *netdev) | |
608 | { | |
609 | struct lio *lio = GET_LIO(netdev); | |
610 | ||
611 | if (atomic_read(&lio->ifstate) & LIO_IFSTATE_REGISTERED) { | |
612 | struct oct_link_info *linfo = &lio->linfo; | |
613 | ||
614 | if (linfo->link.s.link_up) { | |
615 | netif_info(lio, link, lio->netdev, "%d Mbps %s Duplex UP\n", | |
616 | linfo->link.s.speed, | |
617 | (linfo->link.s.duplex) ? "Full" : "Half"); | |
618 | } else { | |
619 | netif_info(lio, link, lio->netdev, "Link Down\n"); | |
620 | } | |
621 | } | |
622 | } | |
623 | ||
624 | /** | |
625 | * \brief Routine to notify MTU change | |
626 | * @param work work_struct data structure | |
627 | */ | |
628 | static void octnet_link_status_change(struct work_struct *work) | |
629 | { | |
630 | struct cavium_wk *wk = (struct cavium_wk *)work; | |
631 | struct lio *lio = (struct lio *)wk->ctxptr; | |
632 | ||
633 | rtnl_lock(); | |
634 | call_netdevice_notifiers(NETDEV_CHANGEMTU, lio->netdev); | |
635 | rtnl_unlock(); | |
636 | } | |
637 | ||
638 | /** | |
639 | * \brief Sets up the mtu status change work | |
640 | * @param netdev network device | |
641 | */ | |
642 | static int setup_link_status_change_wq(struct net_device *netdev) | |
643 | { | |
644 | struct lio *lio = GET_LIO(netdev); | |
645 | struct octeon_device *oct = lio->oct_dev; | |
646 | ||
647 | lio->link_status_wq.wq = alloc_workqueue("link-status", | |
648 | WQ_MEM_RECLAIM, 0); | |
649 | if (!lio->link_status_wq.wq) { | |
650 | dev_err(&oct->pci_dev->dev, "unable to create cavium link status wq\n"); | |
651 | return -1; | |
652 | } | |
653 | INIT_DELAYED_WORK(&lio->link_status_wq.wk.work, | |
654 | octnet_link_status_change); | |
655 | lio->link_status_wq.wk.ctxptr = lio; | |
656 | ||
657 | return 0; | |
658 | } | |
659 | ||
660 | static void cleanup_link_status_change_wq(struct net_device *netdev) | |
661 | { | |
662 | struct lio *lio = GET_LIO(netdev); | |
663 | ||
664 | if (lio->link_status_wq.wq) { | |
665 | cancel_delayed_work_sync(&lio->link_status_wq.wk.work); | |
666 | destroy_workqueue(lio->link_status_wq.wq); | |
667 | } | |
668 | } | |
669 | ||
670 | /** | |
671 | * \brief Update link status | |
672 | * @param netdev network device | |
673 | * @param ls link status structure | |
674 | * | |
675 | * Called on receipt of a link status response from the core application to | |
676 | * update each interface's link status. | |
677 | */ | |
678 | static void update_link_status(struct net_device *netdev, | |
679 | union oct_link_status *ls) | |
680 | { | |
681 | struct lio *lio = GET_LIO(netdev); | |
682 | struct octeon_device *oct = lio->oct_dev; | |
683 | ||
684 | if ((lio->intf_open) && (lio->linfo.link.u64 != ls->u64)) { | |
685 | lio->linfo.link.u64 = ls->u64; | |
686 | ||
687 | print_link_info(netdev); | |
688 | lio->link_changes++; | |
689 | ||
690 | if (lio->linfo.link.s.link_up) { | |
691 | netif_carrier_on(netdev); | |
692 | txqs_wake(netdev); | |
693 | } else { | |
694 | netif_carrier_off(netdev); | |
695 | txqs_stop(netdev); | |
696 | } | |
697 | ||
698 | if (lio->linfo.link.s.mtu < netdev->mtu) { | |
699 | dev_warn(&oct->pci_dev->dev, | |
700 | "PF has changed the MTU for gmx port. Reducing the mtu from %d to %d\n", | |
701 | netdev->mtu, lio->linfo.link.s.mtu); | |
702 | lio->mtu = lio->linfo.link.s.mtu; | |
703 | netdev->mtu = lio->linfo.link.s.mtu; | |
704 | queue_delayed_work(lio->link_status_wq.wq, | |
705 | &lio->link_status_wq.wk.work, 0); | |
706 | } | |
707 | } | |
708 | } | |
709 | ||
9217c3cf RV |
710 | static void update_txq_status(struct octeon_device *oct, int iq_num) |
711 | { | |
712 | struct octeon_instr_queue *iq = oct->instr_queue[iq_num]; | |
713 | struct net_device *netdev; | |
714 | struct lio *lio; | |
715 | ||
716 | netdev = oct->props[iq->ifidx].netdev; | |
717 | lio = GET_LIO(netdev); | |
718 | if (netif_is_multiqueue(netdev)) { | |
719 | if (__netif_subqueue_stopped(netdev, iq->q_index) && | |
720 | lio->linfo.link.s.link_up && | |
721 | (!octnet_iq_is_full(oct, iq_num))) { | |
722 | netif_wake_subqueue(netdev, iq->q_index); | |
723 | INCR_INSTRQUEUE_PKT_COUNT(lio->oct_dev, iq_num, | |
724 | tx_restart, 1); | |
725 | } else { | |
726 | if (!octnet_iq_is_full(oct, lio->txq)) { | |
727 | INCR_INSTRQUEUE_PKT_COUNT( | |
728 | lio->oct_dev, lio->txq, tx_restart, 1); | |
729 | wake_q(netdev, lio->txq); | |
730 | } | |
731 | } | |
732 | } | |
733 | } | |
734 | ||
cf39faf5 RV |
735 | static |
736 | int liquidio_schedule_msix_droq_pkt_handler(struct octeon_droq *droq, u64 ret) | |
737 | { | |
738 | struct octeon_device *oct = droq->oct_dev; | |
739 | struct octeon_device_priv *oct_priv = | |
740 | (struct octeon_device_priv *)oct->priv; | |
741 | ||
742 | if (droq->ops.poll_mode) { | |
743 | droq->ops.napi_fn(droq); | |
744 | } else { | |
745 | if (ret & MSIX_PO_INT) { | |
746 | dev_err(&oct->pci_dev->dev, | |
747 | "should not come here should not get rx when poll mode = 0 for vf\n"); | |
748 | tasklet_schedule(&oct_priv->droq_tasklet); | |
749 | return 1; | |
750 | } | |
751 | /* this will be flushed periodically by check iq db */ | |
752 | if (ret & MSIX_PI_INT) | |
753 | return 0; | |
754 | } | |
755 | return 0; | |
756 | } | |
757 | ||
758 | static irqreturn_t | |
759 | liquidio_msix_intr_handler(int irq __attribute__((unused)), void *dev) | |
760 | { | |
761 | struct octeon_ioq_vector *ioq_vector = (struct octeon_ioq_vector *)dev; | |
762 | struct octeon_device *oct = ioq_vector->oct_dev; | |
763 | struct octeon_droq *droq = oct->droq[ioq_vector->droq_index]; | |
764 | u64 ret; | |
765 | ||
766 | ret = oct->fn_list.msix_interrupt_handler(ioq_vector); | |
767 | ||
768 | if ((ret & MSIX_PO_INT) || (ret & MSIX_PI_INT)) | |
769 | liquidio_schedule_msix_droq_pkt_handler(droq, ret); | |
770 | ||
771 | return IRQ_HANDLED; | |
772 | } | |
773 | ||
774 | /** | |
775 | * \brief Setup interrupt for octeon device | |
776 | * @param oct octeon device | |
777 | * | |
778 | * Enable interrupt in Octeon device as given in the PCI interrupt mask. | |
779 | */ | |
780 | static int octeon_setup_interrupt(struct octeon_device *oct) | |
781 | { | |
782 | struct msix_entry *msix_entries; | |
783 | int num_alloc_ioq_vectors; | |
784 | int num_ioq_vectors; | |
785 | int irqret; | |
786 | int i; | |
787 | ||
788 | if (oct->msix_on) { | |
789 | oct->num_msix_irqs = oct->sriov_info.rings_per_vf; | |
790 | ||
791 | oct->msix_entries = kcalloc( | |
792 | oct->num_msix_irqs, sizeof(struct msix_entry), GFP_KERNEL); | |
793 | if (!oct->msix_entries) | |
794 | return 1; | |
795 | ||
796 | msix_entries = (struct msix_entry *)oct->msix_entries; | |
797 | ||
798 | for (i = 0; i < oct->num_msix_irqs; i++) | |
799 | msix_entries[i].entry = i; | |
800 | num_alloc_ioq_vectors = pci_enable_msix_range( | |
801 | oct->pci_dev, msix_entries, | |
802 | oct->num_msix_irqs, | |
803 | oct->num_msix_irqs); | |
804 | if (num_alloc_ioq_vectors < 0) { | |
805 | dev_err(&oct->pci_dev->dev, "unable to Allocate MSI-X interrupts\n"); | |
806 | kfree(oct->msix_entries); | |
807 | oct->msix_entries = NULL; | |
808 | return 1; | |
809 | } | |
810 | dev_dbg(&oct->pci_dev->dev, "OCTEON: Enough MSI-X interrupts are allocated...\n"); | |
811 | ||
812 | num_ioq_vectors = oct->num_msix_irqs; | |
813 | ||
814 | for (i = 0; i < num_ioq_vectors; i++) { | |
815 | irqret = request_irq(msix_entries[i].vector, | |
816 | liquidio_msix_intr_handler, 0, | |
817 | "octeon", &oct->ioq_vector[i]); | |
818 | if (irqret) { | |
819 | dev_err(&oct->pci_dev->dev, | |
820 | "OCTEON: Request_irq failed for MSIX interrupt Error: %d\n", | |
821 | irqret); | |
822 | ||
823 | while (i) { | |
824 | i--; | |
825 | irq_set_affinity_hint( | |
826 | msix_entries[i].vector, NULL); | |
827 | free_irq(msix_entries[i].vector, | |
828 | &oct->ioq_vector[i]); | |
829 | } | |
830 | pci_disable_msix(oct->pci_dev); | |
831 | kfree(oct->msix_entries); | |
832 | oct->msix_entries = NULL; | |
833 | return 1; | |
834 | } | |
835 | oct->ioq_vector[i].vector = msix_entries[i].vector; | |
836 | /* assign the cpu mask for this msix interrupt vector */ | |
837 | irq_set_affinity_hint( | |
838 | msix_entries[i].vector, | |
839 | (&oct->ioq_vector[i].affinity_mask)); | |
840 | } | |
841 | dev_dbg(&oct->pci_dev->dev, | |
842 | "OCTEON[%d]: MSI-X enabled\n", oct->octeon_id); | |
843 | } | |
844 | return 0; | |
845 | } | |
846 | ||
111fc64a RV |
847 | /** |
848 | * \brief PCI probe handler | |
849 | * @param pdev PCI device structure | |
850 | * @param ent unused | |
851 | */ | |
852 | static int | |
853 | liquidio_vf_probe(struct pci_dev *pdev, | |
854 | const struct pci_device_id *ent __attribute__((unused))) | |
855 | { | |
856 | struct octeon_device *oct_dev = NULL; | |
857 | ||
858 | oct_dev = octeon_allocate_device(pdev->device, | |
859 | sizeof(struct octeon_device_priv)); | |
860 | ||
861 | if (!oct_dev) { | |
862 | dev_err(&pdev->dev, "Unable to allocate device\n"); | |
863 | return -ENOMEM; | |
864 | } | |
cf39faf5 | 865 | oct_dev->msix_on = LIO_FLAG_MSIX_ENABLED; |
111fc64a RV |
866 | |
867 | dev_info(&pdev->dev, "Initializing device %x:%x.\n", | |
868 | (u32)pdev->vendor, (u32)pdev->device); | |
869 | ||
870 | /* Assign octeon_device for this device to the private data area. */ | |
871 | pci_set_drvdata(pdev, oct_dev); | |
872 | ||
873 | /* set linux specific device pointer */ | |
874 | oct_dev->pci_dev = pdev; | |
875 | ||
69c69da3 RV |
876 | if (octeon_device_init(oct_dev)) { |
877 | liquidio_vf_remove(pdev); | |
878 | return -ENOMEM; | |
879 | } | |
880 | ||
881 | dev_dbg(&oct_dev->pci_dev->dev, "Device is ready\n"); | |
882 | ||
111fc64a RV |
883 | return 0; |
884 | } | |
885 | ||
69c69da3 RV |
886 | /** |
887 | * \brief PCI FLR for each Octeon device. | |
888 | * @param oct octeon device | |
889 | */ | |
890 | static void octeon_pci_flr(struct octeon_device *oct) | |
891 | { | |
892 | u16 status; | |
893 | ||
894 | pci_save_state(oct->pci_dev); | |
895 | ||
896 | pci_cfg_access_lock(oct->pci_dev); | |
897 | ||
898 | /* Quiesce the device completely */ | |
899 | pci_write_config_word(oct->pci_dev, PCI_COMMAND, | |
900 | PCI_COMMAND_INTX_DISABLE); | |
901 | ||
902 | /* Wait for Transaction Pending bit clean */ | |
903 | msleep(100); | |
904 | pcie_capability_read_word(oct->pci_dev, PCI_EXP_DEVSTA, &status); | |
905 | if (status & PCI_EXP_DEVSTA_TRPND) { | |
906 | dev_info(&oct->pci_dev->dev, "Function reset incomplete after 100ms, sleeping for 5 seconds\n"); | |
907 | ssleep(5); | |
908 | pcie_capability_read_word(oct->pci_dev, PCI_EXP_DEVSTA, | |
909 | &status); | |
910 | if (status & PCI_EXP_DEVSTA_TRPND) | |
911 | dev_info(&oct->pci_dev->dev, "Function reset still incomplete after 5s, reset anyway\n"); | |
912 | } | |
913 | pcie_capability_set_word(oct->pci_dev, PCI_EXP_DEVCTL, | |
914 | PCI_EXP_DEVCTL_BCR_FLR); | |
915 | mdelay(100); | |
916 | ||
917 | pci_cfg_access_unlock(oct->pci_dev); | |
918 | ||
919 | pci_restore_state(oct->pci_dev); | |
920 | } | |
921 | ||
922 | /** | |
923 | *\brief Destroy resources associated with octeon device | |
924 | * @param pdev PCI device structure | |
925 | * @param ent unused | |
926 | */ | |
927 | static void octeon_destroy_resources(struct octeon_device *oct) | |
928 | { | |
cf39faf5 | 929 | struct msix_entry *msix_entries; |
9003baf0 RV |
930 | int i; |
931 | ||
69c69da3 | 932 | switch (atomic_read(&oct->status)) { |
b3c35973 RV |
933 | case OCT_DEV_RUNNING: |
934 | case OCT_DEV_CORE_OK: | |
935 | /* No more instructions will be forwarded. */ | |
936 | atomic_set(&oct->status, OCT_DEV_IN_RESET); | |
937 | ||
846b4687 | 938 | oct->app_mode = CVM_DRV_INVALID_APP; |
b3c35973 RV |
939 | dev_dbg(&oct->pci_dev->dev, "Device state is now %s\n", |
940 | lio_get_state_string(&oct->status)); | |
941 | ||
942 | schedule_timeout_uninterruptible(HZ / 10); | |
943 | ||
944 | /* fallthrough */ | |
945 | case OCT_DEV_HOST_OK: | |
946 | /* fallthrough */ | |
947 | case OCT_DEV_IO_QUEUES_DONE: | |
948 | if (wait_for_pending_requests(oct)) | |
949 | dev_err(&oct->pci_dev->dev, "There were pending requests\n"); | |
950 | ||
951 | if (lio_wait_for_instr_fetch(oct)) | |
952 | dev_err(&oct->pci_dev->dev, "IQ had pending instructions\n"); | |
953 | ||
954 | /* Disable the input and output queues now. No more packets will | |
955 | * arrive from Octeon, but we should wait for all packet | |
956 | * processing to finish. | |
957 | */ | |
958 | oct->fn_list.disable_io_queues(oct); | |
959 | ||
960 | if (lio_wait_for_oq_pkts(oct)) | |
961 | dev_err(&oct->pci_dev->dev, "OQ had pending packets\n"); | |
962 | ||
cf39faf5 RV |
963 | case OCT_DEV_INTR_SET_DONE: |
964 | /* Disable interrupts */ | |
965 | oct->fn_list.disable_interrupt(oct, OCTEON_ALL_INTR); | |
966 | ||
967 | if (oct->msix_on) { | |
968 | msix_entries = (struct msix_entry *)oct->msix_entries; | |
969 | for (i = 0; i < oct->num_msix_irqs; i++) { | |
970 | irq_set_affinity_hint(msix_entries[i].vector, | |
971 | NULL); | |
972 | free_irq(msix_entries[i].vector, | |
973 | &oct->ioq_vector[i]); | |
974 | } | |
975 | pci_disable_msix(oct->pci_dev); | |
976 | kfree(oct->msix_entries); | |
977 | oct->msix_entries = NULL; | |
978 | } | |
979 | /* Soft reset the octeon device before exiting */ | |
980 | if (oct->pci_dev->reset_fn) | |
981 | octeon_pci_flr(oct); | |
982 | else | |
983 | cn23xx_vf_ask_pf_to_do_flr(oct); | |
984 | ||
985 | /* fallthrough */ | |
986 | case OCT_DEV_MSIX_ALLOC_VECTOR_DONE: | |
987 | octeon_free_ioq_vector(oct); | |
988 | ||
989 | /* fallthrough */ | |
f7cdd64b RV |
990 | case OCT_DEV_MBOX_SETUP_DONE: |
991 | oct->fn_list.free_mbox(oct); | |
992 | ||
993 | /* fallthrough */ | |
9003baf0 RV |
994 | case OCT_DEV_IN_RESET: |
995 | case OCT_DEV_DROQ_INIT_DONE: | |
996 | mdelay(100); | |
997 | for (i = 0; i < MAX_OCTEON_OUTPUT_QUEUES(oct); i++) { | |
998 | if (!(oct->io_qmask.oq & BIT_ULL(i))) | |
999 | continue; | |
1000 | octeon_delete_droq(oct, i); | |
1001 | } | |
1002 | ||
1003 | /* fallthrough */ | |
1004 | case OCT_DEV_RESP_LIST_INIT_DONE: | |
1005 | octeon_delete_response_list(oct); | |
1006 | ||
1007 | /* fallthrough */ | |
1008 | case OCT_DEV_INSTR_QUEUE_INIT_DONE: | |
1009 | for (i = 0; i < MAX_OCTEON_INSTR_QUEUES(oct); i++) { | |
1010 | if (!(oct->io_qmask.iq & BIT_ULL(i))) | |
1011 | continue; | |
1012 | octeon_delete_instr_queue(oct, i); | |
1013 | } | |
1014 | ||
1015 | /* fallthrough */ | |
1016 | case OCT_DEV_SC_BUFF_POOL_INIT_DONE: | |
1017 | octeon_free_sc_buffer_pool(oct); | |
1018 | ||
1019 | /* fallthrough */ | |
1020 | case OCT_DEV_DISPATCH_INIT_DONE: | |
1021 | octeon_delete_dispatch_list(oct); | |
1022 | cancel_delayed_work_sync(&oct->nic_poll_work.work); | |
1023 | ||
1024 | /* fallthrough */ | |
69c69da3 RV |
1025 | case OCT_DEV_PCI_MAP_DONE: |
1026 | octeon_unmap_pci_barx(oct, 0); | |
1027 | octeon_unmap_pci_barx(oct, 1); | |
1028 | ||
9003baf0 | 1029 | /* fallthrough */ |
69c69da3 RV |
1030 | case OCT_DEV_PCI_ENABLE_DONE: |
1031 | pci_clear_master(oct->pci_dev); | |
1032 | /* Disable the device, releasing the PCI INT */ | |
1033 | pci_disable_device(oct->pci_dev); | |
1034 | ||
9003baf0 | 1035 | /* fallthrough */ |
69c69da3 RV |
1036 | case OCT_DEV_BEGIN_STATE: |
1037 | /* Nothing to be done here either */ | |
1038 | break; | |
1039 | } | |
1040 | } | |
1041 | ||
9217c3cf RV |
1042 | /** |
1043 | * \brief Callback for rx ctrl | |
1044 | * @param status status of request | |
1045 | * @param buf pointer to resp structure | |
1046 | */ | |
1047 | static void rx_ctl_callback(struct octeon_device *oct, | |
1048 | u32 status, void *buf) | |
1049 | { | |
1050 | struct octeon_soft_command *sc = (struct octeon_soft_command *)buf; | |
1051 | struct liquidio_rx_ctl_context *ctx; | |
1052 | ||
1053 | ctx = (struct liquidio_rx_ctl_context *)sc->ctxptr; | |
1054 | ||
1055 | oct = lio_get_device(ctx->octeon_id); | |
1056 | if (status) | |
1057 | dev_err(&oct->pci_dev->dev, "rx ctl instruction failed. Status: %llx\n", | |
1058 | CVM_CAST64(status)); | |
1059 | WRITE_ONCE(ctx->cond, 1); | |
1060 | ||
1061 | /* This barrier is required to be sure that the response has been | |
1062 | * written fully before waking up the handler | |
1063 | */ | |
1064 | wmb(); | |
1065 | ||
1066 | wake_up_interruptible(&ctx->wc); | |
1067 | } | |
1068 | ||
1069 | /** | |
1070 | * \brief Send Rx control command | |
1071 | * @param lio per-network private data | |
1072 | * @param start_stop whether to start or stop | |
1073 | */ | |
1074 | static void send_rx_ctrl_cmd(struct lio *lio, int start_stop) | |
1075 | { | |
1076 | struct octeon_device *oct = (struct octeon_device *)lio->oct_dev; | |
1077 | int ctx_size = sizeof(struct liquidio_rx_ctl_context); | |
1078 | struct liquidio_rx_ctl_context *ctx; | |
1079 | struct octeon_soft_command *sc; | |
1080 | union octnet_cmd *ncmd; | |
1081 | int retval; | |
1082 | ||
1083 | if (oct->props[lio->ifidx].rx_on == start_stop) | |
1084 | return; | |
1085 | ||
1086 | sc = (struct octeon_soft_command *) | |
1087 | octeon_alloc_soft_command(oct, OCTNET_CMD_SIZE, | |
1088 | 16, ctx_size); | |
1089 | ||
1090 | ncmd = (union octnet_cmd *)sc->virtdptr; | |
1091 | ctx = (struct liquidio_rx_ctl_context *)sc->ctxptr; | |
1092 | ||
1093 | WRITE_ONCE(ctx->cond, 0); | |
1094 | ctx->octeon_id = lio_get_device_id(oct); | |
1095 | init_waitqueue_head(&ctx->wc); | |
1096 | ||
1097 | ncmd->u64 = 0; | |
1098 | ncmd->s.cmd = OCTNET_CMD_RX_CTL; | |
1099 | ncmd->s.param1 = start_stop; | |
1100 | ||
1101 | octeon_swap_8B_data((u64 *)ncmd, (OCTNET_CMD_SIZE >> 3)); | |
1102 | ||
1103 | sc->iq_no = lio->linfo.txpciq[0].s.q_no; | |
1104 | ||
1105 | octeon_prepare_soft_command(oct, sc, OPCODE_NIC, | |
1106 | OPCODE_NIC_CMD, 0, 0, 0); | |
1107 | ||
1108 | sc->callback = rx_ctl_callback; | |
1109 | sc->callback_arg = sc; | |
1110 | sc->wait_time = 5000; | |
1111 | ||
1112 | retval = octeon_send_soft_command(oct, sc); | |
1113 | if (retval == IQ_SEND_FAILED) { | |
1114 | netif_info(lio, rx_err, lio->netdev, "Failed to send RX Control message\n"); | |
1115 | } else { | |
1116 | /* Sleep on a wait queue till the cond flag indicates that the | |
1117 | * response arrived or timed-out. | |
1118 | */ | |
1119 | if (sleep_cond(&ctx->wc, &ctx->cond) == -EINTR) | |
1120 | return; | |
1121 | oct->props[lio->ifidx].rx_on = start_stop; | |
1122 | } | |
1123 | ||
1124 | octeon_free_soft_command(oct, sc); | |
1125 | } | |
1126 | ||
846b4687 RV |
1127 | /** |
1128 | * \brief Destroy NIC device interface | |
1129 | * @param oct octeon device | |
1130 | * @param ifidx which interface to destroy | |
1131 | * | |
1132 | * Cleanup associated with each interface for an Octeon device when NIC | |
1133 | * module is being unloaded or if initialization fails during load. | |
1134 | */ | |
1135 | static void liquidio_destroy_nic_device(struct octeon_device *oct, int ifidx) | |
1136 | { | |
1137 | struct net_device *netdev = oct->props[ifidx].netdev; | |
9217c3cf | 1138 | struct napi_struct *napi, *n; |
846b4687 RV |
1139 | struct lio *lio; |
1140 | ||
1141 | if (!netdev) { | |
1142 | dev_err(&oct->pci_dev->dev, "%s No netdevice ptr for index %d\n", | |
1143 | __func__, ifidx); | |
1144 | return; | |
1145 | } | |
1146 | ||
1147 | lio = GET_LIO(netdev); | |
1148 | ||
1149 | dev_dbg(&oct->pci_dev->dev, "NIC device cleanup\n"); | |
1150 | ||
1151 | if (atomic_read(&lio->ifstate) & LIO_IFSTATE_RUNNING) | |
1152 | liquidio_stop(netdev); | |
1153 | ||
9217c3cf RV |
1154 | if (oct->props[lio->ifidx].napi_enabled == 1) { |
1155 | list_for_each_entry_safe(napi, n, &netdev->napi_list, dev_list) | |
1156 | napi_disable(napi); | |
1157 | ||
1158 | oct->props[lio->ifidx].napi_enabled = 0; | |
1159 | ||
1160 | oct->droq[0]->ops.poll_mode = 0; | |
1161 | } | |
1162 | ||
846b4687 RV |
1163 | if (atomic_read(&lio->ifstate) & LIO_IFSTATE_REGISTERED) |
1164 | unregister_netdev(netdev); | |
1165 | ||
3cd25e48 RV |
1166 | cleanup_link_status_change_wq(netdev); |
1167 | ||
beea50a5 RV |
1168 | delete_glists(lio); |
1169 | ||
846b4687 RV |
1170 | free_netdev(netdev); |
1171 | ||
1172 | oct->props[ifidx].gmxport = -1; | |
1173 | ||
1174 | oct->props[ifidx].netdev = NULL; | |
1175 | } | |
1176 | ||
1177 | /** | |
1178 | * \brief Stop complete NIC functionality | |
1179 | * @param oct octeon device | |
1180 | */ | |
1181 | static int liquidio_stop_nic_module(struct octeon_device *oct) | |
1182 | { | |
9217c3cf RV |
1183 | struct lio *lio; |
1184 | int i, j; | |
846b4687 RV |
1185 | |
1186 | dev_dbg(&oct->pci_dev->dev, "Stopping network interfaces\n"); | |
1187 | if (!oct->ifcount) { | |
1188 | dev_err(&oct->pci_dev->dev, "Init for Octeon was not completed\n"); | |
1189 | return 1; | |
1190 | } | |
1191 | ||
9217c3cf RV |
1192 | spin_lock_bh(&oct->cmd_resp_wqlock); |
1193 | oct->cmd_resp_state = OCT_DRV_OFFLINE; | |
1194 | spin_unlock_bh(&oct->cmd_resp_wqlock); | |
1195 | ||
1196 | for (i = 0; i < oct->ifcount; i++) { | |
1197 | lio = GET_LIO(oct->props[i].netdev); | |
1198 | for (j = 0; j < lio->linfo.num_rxpciq; j++) | |
1199 | octeon_unregister_droq_ops(oct, | |
1200 | lio->linfo.rxpciq[j].s.q_no); | |
1201 | } | |
1202 | ||
846b4687 RV |
1203 | for (i = 0; i < oct->ifcount; i++) |
1204 | liquidio_destroy_nic_device(oct, i); | |
1205 | ||
1206 | dev_dbg(&oct->pci_dev->dev, "Network interfaces stopped\n"); | |
1207 | return 0; | |
1208 | } | |
1209 | ||
111fc64a RV |
1210 | /** |
1211 | * \brief Cleans up resources at unload time | |
1212 | * @param pdev PCI device structure | |
1213 | */ | |
1214 | static void liquidio_vf_remove(struct pci_dev *pdev) | |
1215 | { | |
1216 | struct octeon_device *oct_dev = pci_get_drvdata(pdev); | |
1217 | ||
1218 | dev_dbg(&oct_dev->pci_dev->dev, "Stopping device\n"); | |
1219 | ||
846b4687 RV |
1220 | if (oct_dev->app_mode == CVM_DRV_NIC_APP) |
1221 | liquidio_stop_nic_module(oct_dev); | |
1222 | ||
69c69da3 RV |
1223 | /* Reset the octeon device and cleanup all memory allocated for |
1224 | * the octeon device by driver. | |
1225 | */ | |
1226 | octeon_destroy_resources(oct_dev); | |
1227 | ||
1228 | dev_info(&oct_dev->pci_dev->dev, "Device removed\n"); | |
1229 | ||
111fc64a RV |
1230 | /* This octeon device has been removed. Update the global |
1231 | * data structure to reflect this. Free the device structure. | |
1232 | */ | |
1233 | octeon_free_device_mem(oct_dev); | |
1234 | } | |
1235 | ||
69c69da3 RV |
1236 | /** |
1237 | * \brief PCI initialization for each Octeon device. | |
1238 | * @param oct octeon device | |
1239 | */ | |
1240 | static int octeon_pci_os_setup(struct octeon_device *oct) | |
1241 | { | |
1242 | #ifdef CONFIG_PCI_IOV | |
1243 | /* setup PCI stuff first */ | |
1244 | if (!oct->pci_dev->physfn) | |
1245 | octeon_pci_flr(oct); | |
1246 | #endif | |
1247 | ||
1248 | if (pci_enable_device(oct->pci_dev)) { | |
1249 | dev_err(&oct->pci_dev->dev, "pci_enable_device failed\n"); | |
1250 | return 1; | |
1251 | } | |
1252 | ||
1253 | if (dma_set_mask_and_coherent(&oct->pci_dev->dev, DMA_BIT_MASK(64))) { | |
1254 | dev_err(&oct->pci_dev->dev, "Unexpected DMA device capability\n"); | |
1255 | pci_disable_device(oct->pci_dev); | |
1256 | return 1; | |
1257 | } | |
1258 | ||
1259 | /* Enable PCI DMA Master. */ | |
1260 | pci_set_master(oct->pci_dev); | |
1261 | ||
1262 | return 0; | |
1263 | } | |
1264 | ||
9bdca5c6 RV |
1265 | static int skb_iq(struct lio *lio, struct sk_buff *skb) |
1266 | { | |
1267 | int q = 0; | |
1268 | ||
1269 | if (netif_is_multiqueue(lio->netdev)) | |
1270 | q = skb->queue_mapping % lio->linfo.num_txpciq; | |
1271 | ||
1272 | return q; | |
1273 | } | |
1274 | ||
1275 | /** | |
1276 | * \brief Check Tx queue state for a given network buffer | |
1277 | * @param lio per-network private data | |
1278 | * @param skb network buffer | |
1279 | */ | |
1280 | static int check_txq_state(struct lio *lio, struct sk_buff *skb) | |
1281 | { | |
1282 | int q = 0, iq = 0; | |
1283 | ||
1284 | if (netif_is_multiqueue(lio->netdev)) { | |
1285 | q = skb->queue_mapping; | |
1286 | iq = lio->linfo.txpciq[(q % (lio->linfo.num_txpciq))].s.q_no; | |
1287 | } else { | |
1288 | iq = lio->txq; | |
1289 | q = iq; | |
1290 | } | |
1291 | ||
1292 | if (octnet_iq_is_full(lio->oct_dev, iq)) | |
1293 | return 0; | |
1294 | ||
1295 | if (__netif_subqueue_stopped(lio->netdev, q)) { | |
1296 | INCR_INSTRQUEUE_PKT_COUNT(lio->oct_dev, iq, tx_restart, 1); | |
1297 | wake_q(lio->netdev, q); | |
1298 | } | |
1299 | ||
1300 | return 1; | |
1301 | } | |
1302 | ||
1303 | /** | |
1304 | * \brief Unmap and free network buffer | |
1305 | * @param buf buffer | |
1306 | */ | |
1307 | static void free_netbuf(void *buf) | |
1308 | { | |
1309 | struct octnet_buf_free_info *finfo; | |
1310 | struct sk_buff *skb; | |
1311 | struct lio *lio; | |
1312 | ||
1313 | finfo = (struct octnet_buf_free_info *)buf; | |
1314 | skb = finfo->skb; | |
1315 | lio = finfo->lio; | |
1316 | ||
1317 | dma_unmap_single(&lio->oct_dev->pci_dev->dev, finfo->dptr, skb->len, | |
1318 | DMA_TO_DEVICE); | |
1319 | ||
1320 | check_txq_state(lio, skb); | |
1321 | ||
1322 | tx_buffer_free(skb); | |
1323 | } | |
1324 | ||
1325 | /** | |
1326 | * \brief Unmap and free gather buffer | |
1327 | * @param buf buffer | |
1328 | */ | |
1329 | static void free_netsgbuf(void *buf) | |
1330 | { | |
1331 | struct octnet_buf_free_info *finfo; | |
1332 | struct octnic_gather *g; | |
1333 | struct sk_buff *skb; | |
1334 | int i, frags, iq; | |
1335 | struct lio *lio; | |
1336 | ||
1337 | finfo = (struct octnet_buf_free_info *)buf; | |
1338 | skb = finfo->skb; | |
1339 | lio = finfo->lio; | |
1340 | g = finfo->g; | |
1341 | frags = skb_shinfo(skb)->nr_frags; | |
1342 | ||
1343 | dma_unmap_single(&lio->oct_dev->pci_dev->dev, | |
1344 | g->sg[0].ptr[0], (skb->len - skb->data_len), | |
1345 | DMA_TO_DEVICE); | |
1346 | ||
1347 | i = 1; | |
1348 | while (frags--) { | |
1349 | struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i - 1]; | |
1350 | ||
1351 | pci_unmap_page((lio->oct_dev)->pci_dev, | |
1352 | g->sg[(i >> 2)].ptr[(i & 3)], | |
1353 | frag->size, DMA_TO_DEVICE); | |
1354 | i++; | |
1355 | } | |
1356 | ||
9bdca5c6 RV |
1357 | iq = skb_iq(lio, skb); |
1358 | ||
1359 | spin_lock(&lio->glist_lock[iq]); | |
1360 | list_add_tail(&g->list, &lio->glist[iq]); | |
1361 | spin_unlock(&lio->glist_lock[iq]); | |
1362 | ||
1363 | check_txq_state(lio, skb); /* mq support: sub-queue state check */ | |
1364 | ||
1365 | tx_buffer_free(skb); | |
1366 | } | |
1367 | ||
1368 | /** | |
1369 | * \brief Unmap and free gather buffer with response | |
1370 | * @param buf buffer | |
1371 | */ | |
1372 | static void free_netsgbuf_with_resp(void *buf) | |
1373 | { | |
1374 | struct octnet_buf_free_info *finfo; | |
1375 | struct octeon_soft_command *sc; | |
1376 | struct octnic_gather *g; | |
1377 | struct sk_buff *skb; | |
1378 | int i, frags, iq; | |
1379 | struct lio *lio; | |
1380 | ||
1381 | sc = (struct octeon_soft_command *)buf; | |
1382 | skb = (struct sk_buff *)sc->callback_arg; | |
1383 | finfo = (struct octnet_buf_free_info *)&skb->cb; | |
1384 | ||
1385 | lio = finfo->lio; | |
1386 | g = finfo->g; | |
1387 | frags = skb_shinfo(skb)->nr_frags; | |
1388 | ||
1389 | dma_unmap_single(&lio->oct_dev->pci_dev->dev, | |
1390 | g->sg[0].ptr[0], (skb->len - skb->data_len), | |
1391 | DMA_TO_DEVICE); | |
1392 | ||
1393 | i = 1; | |
1394 | while (frags--) { | |
1395 | struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i - 1]; | |
1396 | ||
1397 | pci_unmap_page((lio->oct_dev)->pci_dev, | |
1398 | g->sg[(i >> 2)].ptr[(i & 3)], | |
1399 | frag->size, DMA_TO_DEVICE); | |
1400 | i++; | |
1401 | } | |
1402 | ||
9bdca5c6 RV |
1403 | iq = skb_iq(lio, skb); |
1404 | ||
1405 | spin_lock(&lio->glist_lock[iq]); | |
1406 | list_add_tail(&g->list, &lio->glist[iq]); | |
1407 | spin_unlock(&lio->glist_lock[iq]); | |
1408 | ||
1409 | /* Don't free the skb yet */ | |
1410 | ||
1411 | check_txq_state(lio, skb); | |
1412 | } | |
1413 | ||
9217c3cf RV |
1414 | /** |
1415 | * \brief Setup output queue | |
1416 | * @param oct octeon device | |
1417 | * @param q_no which queue | |
1418 | * @param num_descs how many descriptors | |
1419 | * @param desc_size size of each descriptor | |
1420 | * @param app_ctx application context | |
1421 | */ | |
1422 | static int octeon_setup_droq(struct octeon_device *oct, int q_no, int num_descs, | |
1423 | int desc_size, void *app_ctx) | |
1424 | { | |
1425 | int ret_val; | |
1426 | ||
1427 | dev_dbg(&oct->pci_dev->dev, "Creating Droq: %d\n", q_no); | |
1428 | /* droq creation and local register settings. */ | |
1429 | ret_val = octeon_create_droq(oct, q_no, num_descs, desc_size, app_ctx); | |
1430 | if (ret_val < 0) | |
1431 | return ret_val; | |
1432 | ||
1433 | if (ret_val == 1) { | |
1434 | dev_dbg(&oct->pci_dev->dev, "Using default droq %d\n", q_no); | |
1435 | return 0; | |
1436 | } | |
1437 | ||
1438 | /* Enable the droq queues */ | |
1439 | octeon_set_droq_pkt_op(oct, q_no, 1); | |
1440 | ||
1441 | /* Send Credit for Octeon Output queues. Credits are always | |
1442 | * sent after the output queue is enabled. | |
1443 | */ | |
1444 | writel(oct->droq[q_no]->max_count, oct->droq[q_no]->pkts_credit_reg); | |
1445 | ||
1446 | return ret_val; | |
1447 | } | |
1448 | ||
846b4687 RV |
1449 | /** |
1450 | * \brief Callback for getting interface configuration | |
1451 | * @param status status of request | |
1452 | * @param buf pointer to resp structure | |
1453 | */ | |
1454 | static void if_cfg_callback(struct octeon_device *oct, | |
1455 | u32 status __attribute__((unused)), void *buf) | |
1456 | { | |
1457 | struct octeon_soft_command *sc = (struct octeon_soft_command *)buf; | |
1458 | struct liquidio_if_cfg_context *ctx; | |
1459 | struct liquidio_if_cfg_resp *resp; | |
1460 | ||
1461 | resp = (struct liquidio_if_cfg_resp *)sc->virtrptr; | |
1462 | ctx = (struct liquidio_if_cfg_context *)sc->ctxptr; | |
1463 | ||
1464 | oct = lio_get_device(ctx->octeon_id); | |
1465 | if (resp->status) | |
1466 | dev_err(&oct->pci_dev->dev, "nic if cfg instruction failed. Status: %llx\n", | |
1467 | CVM_CAST64(resp->status)); | |
1468 | WRITE_ONCE(ctx->cond, 1); | |
1469 | ||
1470 | snprintf(oct->fw_info.liquidio_firmware_version, 32, "%s", | |
1471 | resp->cfg_info.liquidio_firmware_version); | |
1472 | ||
1473 | /* This barrier is required to be sure that the response has been | |
1474 | * written fully before waking up the handler | |
1475 | */ | |
1476 | wmb(); | |
1477 | ||
1478 | wake_up_interruptible(&ctx->wc); | |
1479 | } | |
1480 | ||
9217c3cf RV |
1481 | /** Routine to push packets arriving on Octeon interface upto network layer. |
1482 | * @param oct_id - octeon device id. | |
1483 | * @param skbuff - skbuff struct to be passed to network layer. | |
1484 | * @param len - size of total data received. | |
1485 | * @param rh - Control header associated with the packet | |
1486 | * @param param - additional control data with the packet | |
1487 | * @param arg - farg registered in droq_ops | |
1488 | */ | |
1489 | static void | |
1490 | liquidio_push_packet(u32 octeon_id __attribute__((unused)), | |
1491 | void *skbuff, | |
1492 | u32 len, | |
1493 | union octeon_rh *rh, | |
1494 | void *param, | |
1495 | void *arg) | |
1496 | { | |
1497 | struct napi_struct *napi = param; | |
1498 | struct octeon_droq *droq = | |
1499 | container_of(param, struct octeon_droq, napi); | |
1500 | struct net_device *netdev = (struct net_device *)arg; | |
1501 | struct sk_buff *skb = (struct sk_buff *)skbuff; | |
2135f9b1 | 1502 | u16 vtag = 0; |
de28c99d | 1503 | u32 r_dh_off; |
9217c3cf RV |
1504 | |
1505 | if (netdev) { | |
1506 | struct lio *lio = GET_LIO(netdev); | |
1507 | int packet_was_received; | |
1508 | ||
1509 | /* Do not proceed if the interface is not in RUNNING state. */ | |
1510 | if (!ifstate_check(lio, LIO_IFSTATE_RUNNING)) { | |
1511 | recv_buffer_free(skb); | |
1512 | droq->stats.rx_dropped++; | |
1513 | return; | |
1514 | } | |
1515 | ||
1516 | skb->dev = netdev; | |
1517 | ||
1518 | skb_record_rx_queue(skb, droq->q_no); | |
1519 | if (likely(len > MIN_SKB_SIZE)) { | |
1520 | struct octeon_skb_page_info *pg_info; | |
1521 | unsigned char *va; | |
1522 | ||
1523 | pg_info = ((struct octeon_skb_page_info *)(skb->cb)); | |
1524 | if (pg_info->page) { | |
1525 | /* For Paged allocation use the frags */ | |
1526 | va = page_address(pg_info->page) + | |
1527 | pg_info->page_offset; | |
1528 | memcpy(skb->data, va, MIN_SKB_SIZE); | |
1529 | skb_put(skb, MIN_SKB_SIZE); | |
1530 | skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, | |
1531 | pg_info->page, | |
1532 | pg_info->page_offset + | |
1533 | MIN_SKB_SIZE, | |
1534 | len - MIN_SKB_SIZE, | |
1535 | LIO_RXBUFFER_SZ); | |
1536 | } | |
1537 | } else { | |
1538 | struct octeon_skb_page_info *pg_info = | |
1539 | ((struct octeon_skb_page_info *)(skb->cb)); | |
1540 | skb_copy_to_linear_data(skb, | |
1541 | page_address(pg_info->page) + | |
1542 | pg_info->page_offset, len); | |
1543 | skb_put(skb, len); | |
1544 | put_page(pg_info->page); | |
1545 | } | |
1546 | ||
de28c99d PK |
1547 | r_dh_off = (rh->r_dh.len - 1) * BYTES_PER_DHLEN_UNIT; |
1548 | ||
1549 | if (rh->r_dh.has_hwtstamp) | |
1550 | r_dh_off -= BYTES_PER_DHLEN_UNIT; | |
1551 | ||
1552 | if (rh->r_dh.has_hash) { | |
1553 | __be32 *hash_be = (__be32 *)(skb->data + r_dh_off); | |
1554 | u32 hash = be32_to_cpu(*hash_be); | |
1555 | ||
1556 | skb_set_hash(skb, hash, PKT_HASH_TYPE_L4); | |
1557 | r_dh_off -= BYTES_PER_DHLEN_UNIT; | |
1558 | } | |
1559 | ||
1560 | skb_pull(skb, rh->r_dh.len * BYTES_PER_DHLEN_UNIT); | |
9217c3cf RV |
1561 | skb->protocol = eth_type_trans(skb, skb->dev); |
1562 | ||
1563 | if ((netdev->features & NETIF_F_RXCSUM) && | |
c05ebcc8 RV |
1564 | (((rh->r_dh.encap_on) && |
1565 | (rh->r_dh.csum_verified & CNNIC_TUN_CSUM_VERIFIED)) || | |
1566 | (!(rh->r_dh.encap_on) && | |
1567 | (rh->r_dh.csum_verified & CNNIC_CSUM_VERIFIED)))) | |
9217c3cf RV |
1568 | /* checksum has already been verified */ |
1569 | skb->ip_summed = CHECKSUM_UNNECESSARY; | |
1570 | else | |
1571 | skb->ip_summed = CHECKSUM_NONE; | |
1572 | ||
c05ebcc8 RV |
1573 | /* Setting Encapsulation field on basis of status received |
1574 | * from the firmware | |
1575 | */ | |
1576 | if (rh->r_dh.encap_on) { | |
1577 | skb->encapsulation = 1; | |
1578 | skb->csum_level = 1; | |
1579 | droq->stats.rx_vxlan++; | |
1580 | } | |
1581 | ||
2135f9b1 RV |
1582 | /* inbound VLAN tag */ |
1583 | if ((netdev->features & NETIF_F_HW_VLAN_CTAG_RX) && | |
1584 | rh->r_dh.vlan) { | |
1585 | u16 priority = rh->r_dh.priority; | |
1586 | u16 vid = rh->r_dh.vlan; | |
1587 | ||
1588 | vtag = (priority << VLAN_PRIO_SHIFT) | vid; | |
1589 | __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vtag); | |
1590 | } | |
1591 | ||
9217c3cf RV |
1592 | packet_was_received = (napi_gro_receive(napi, skb) != GRO_DROP); |
1593 | ||
1594 | if (packet_was_received) { | |
1595 | droq->stats.rx_bytes_received += len; | |
1596 | droq->stats.rx_pkts_received++; | |
9217c3cf RV |
1597 | } else { |
1598 | droq->stats.rx_dropped++; | |
1599 | netif_info(lio, rx_err, lio->netdev, | |
1600 | "droq:%d error rx_dropped:%llu\n", | |
1601 | droq->q_no, droq->stats.rx_dropped); | |
1602 | } | |
1603 | ||
1604 | } else { | |
1605 | recv_buffer_free(skb); | |
1606 | } | |
1607 | } | |
1608 | ||
1609 | /** | |
1610 | * \brief callback when receive interrupt occurs and we are in NAPI mode | |
1611 | * @param arg pointer to octeon output queue | |
1612 | */ | |
1613 | static void liquidio_vf_napi_drv_callback(void *arg) | |
1614 | { | |
1615 | struct octeon_droq *droq = arg; | |
1616 | ||
1617 | napi_schedule_irqoff(&droq->napi); | |
1618 | } | |
1619 | ||
1620 | /** | |
1621 | * \brief Entry point for NAPI polling | |
1622 | * @param napi NAPI structure | |
1623 | * @param budget maximum number of items to process | |
1624 | */ | |
1625 | static int liquidio_napi_poll(struct napi_struct *napi, int budget) | |
1626 | { | |
1627 | struct octeon_instr_queue *iq; | |
1628 | struct octeon_device *oct; | |
1629 | struct octeon_droq *droq; | |
1630 | int tx_done = 0, iq_no; | |
1631 | int work_done; | |
1632 | ||
1633 | droq = container_of(napi, struct octeon_droq, napi); | |
1634 | oct = droq->oct_dev; | |
1635 | iq_no = droq->q_no; | |
1636 | ||
1637 | /* Handle Droq descriptors */ | |
1638 | work_done = octeon_process_droq_poll_cmd(oct, droq->q_no, | |
1639 | POLL_EVENT_PROCESS_PKTS, | |
1640 | budget); | |
1641 | ||
1642 | /* Flush the instruction queue */ | |
1643 | iq = oct->instr_queue[iq_no]; | |
1644 | if (iq) { | |
1645 | /* Process iq buffers with in the budget limits */ | |
60889869 | 1646 | tx_done = octeon_flush_iq(oct, iq, budget); |
9217c3cf RV |
1647 | /* Update iq read-index rather than waiting for next interrupt. |
1648 | * Return back if tx_done is false. | |
1649 | */ | |
1650 | update_txq_status(oct, iq_no); | |
1651 | } else { | |
1652 | dev_err(&oct->pci_dev->dev, "%s: iq (%d) num invalid\n", | |
1653 | __func__, iq_no); | |
1654 | } | |
1655 | ||
cdb478e5 SB |
1656 | /* force enable interrupt if reg cnts are high to avoid wraparound */ |
1657 | if ((work_done < budget && tx_done) || | |
76e0e70e | 1658 | (iq && iq->pkt_in_done >= MAX_REG_CNT) || |
cdb478e5 SB |
1659 | (droq->pkt_count >= MAX_REG_CNT)) { |
1660 | tx_done = 1; | |
6ad20165 | 1661 | napi_complete_done(napi, work_done); |
9217c3cf RV |
1662 | octeon_process_droq_poll_cmd(droq->oct_dev, droq->q_no, |
1663 | POLL_EVENT_ENABLE_INTR, 0); | |
1664 | return 0; | |
1665 | } | |
1666 | ||
1667 | return (!tx_done) ? (budget) : (work_done); | |
1668 | } | |
1669 | ||
9981328a RV |
1670 | /** |
1671 | * \brief Setup input and output queues | |
1672 | * @param octeon_dev octeon device | |
1673 | * @param ifidx Interface index | |
1674 | * | |
1675 | * Note: Queues are with respect to the octeon device. Thus | |
1676 | * an input queue is for egress packets, and output queues | |
1677 | * are for ingress packets. | |
1678 | */ | |
1679 | static int setup_io_queues(struct octeon_device *octeon_dev, int ifidx) | |
1680 | { | |
9217c3cf | 1681 | struct octeon_droq_ops droq_ops; |
9981328a | 1682 | struct net_device *netdev; |
9217c3cf RV |
1683 | static int cpu_id_modulus; |
1684 | struct octeon_droq *droq; | |
1685 | struct napi_struct *napi; | |
1686 | static int cpu_id; | |
9981328a RV |
1687 | int num_tx_descs; |
1688 | struct lio *lio; | |
1689 | int retval = 0; | |
9217c3cf | 1690 | int q, q_no; |
9981328a RV |
1691 | |
1692 | netdev = octeon_dev->props[ifidx].netdev; | |
1693 | ||
1694 | lio = GET_LIO(netdev); | |
1695 | ||
9217c3cf RV |
1696 | memset(&droq_ops, 0, sizeof(struct octeon_droq_ops)); |
1697 | ||
1698 | droq_ops.fptr = liquidio_push_packet; | |
1699 | droq_ops.farg = netdev; | |
1700 | ||
1701 | droq_ops.poll_mode = 1; | |
1702 | droq_ops.napi_fn = liquidio_vf_napi_drv_callback; | |
1703 | cpu_id = 0; | |
1704 | cpu_id_modulus = num_present_cpus(); | |
1705 | ||
1706 | /* set up DROQs. */ | |
1707 | for (q = 0; q < lio->linfo.num_rxpciq; q++) { | |
1708 | q_no = lio->linfo.rxpciq[q].s.q_no; | |
1709 | ||
1710 | retval = octeon_setup_droq( | |
1711 | octeon_dev, q_no, | |
1712 | CFG_GET_NUM_RX_DESCS_NIC_IF(octeon_get_conf(octeon_dev), | |
1713 | lio->ifidx), | |
1714 | CFG_GET_NUM_RX_BUF_SIZE_NIC_IF(octeon_get_conf(octeon_dev), | |
1715 | lio->ifidx), | |
1716 | NULL); | |
1717 | if (retval) { | |
1718 | dev_err(&octeon_dev->pci_dev->dev, | |
1719 | "%s : Runtime DROQ(RxQ) creation failed.\n", | |
1720 | __func__); | |
1721 | return 1; | |
1722 | } | |
1723 | ||
1724 | droq = octeon_dev->droq[q_no]; | |
1725 | napi = &droq->napi; | |
1726 | netif_napi_add(netdev, napi, liquidio_napi_poll, 64); | |
1727 | ||
1728 | /* designate a CPU for this droq */ | |
1729 | droq->cpu_id = cpu_id; | |
1730 | cpu_id++; | |
1731 | if (cpu_id >= cpu_id_modulus) | |
1732 | cpu_id = 0; | |
1733 | ||
1734 | octeon_register_droq_ops(octeon_dev, q_no, &droq_ops); | |
1735 | } | |
1736 | ||
1737 | /* 23XX VF can send/recv control messages (via the first VF-owned | |
1738 | * droq) from the firmware even if the ethX interface is down, | |
1739 | * so that's why poll_mode must be off for the first droq. | |
1740 | */ | |
1741 | octeon_dev->droq[0]->ops.poll_mode = 0; | |
1742 | ||
9981328a RV |
1743 | /* set up IQs. */ |
1744 | for (q = 0; q < lio->linfo.num_txpciq; q++) { | |
1745 | num_tx_descs = CFG_GET_NUM_TX_DESCS_NIC_IF( | |
1746 | octeon_get_conf(octeon_dev), lio->ifidx); | |
1747 | retval = octeon_setup_iq(octeon_dev, ifidx, q, | |
1748 | lio->linfo.txpciq[q], num_tx_descs, | |
1749 | netdev_get_tx_queue(netdev, q)); | |
1750 | if (retval) { | |
1751 | dev_err(&octeon_dev->pci_dev->dev, | |
1752 | " %s : Runtime IQ(TxQ) creation failed.\n", | |
1753 | __func__); | |
1754 | return 1; | |
1755 | } | |
1756 | } | |
1757 | ||
1758 | return 0; | |
1759 | } | |
1760 | ||
3cd25e48 RV |
1761 | /** |
1762 | * \brief Net device open for LiquidIO | |
1763 | * @param netdev network device | |
1764 | */ | |
1765 | static int liquidio_open(struct net_device *netdev) | |
1766 | { | |
1767 | struct lio *lio = GET_LIO(netdev); | |
1768 | struct octeon_device *oct = lio->oct_dev; | |
9217c3cf RV |
1769 | struct napi_struct *napi, *n; |
1770 | ||
1771 | if (!oct->props[lio->ifidx].napi_enabled) { | |
1772 | list_for_each_entry_safe(napi, n, &netdev->napi_list, dev_list) | |
1773 | napi_enable(napi); | |
1774 | ||
1775 | oct->props[lio->ifidx].napi_enabled = 1; | |
1776 | ||
1777 | oct->droq[0]->ops.poll_mode = 1; | |
1778 | } | |
3cd25e48 RV |
1779 | |
1780 | ifstate_set(lio, LIO_IFSTATE_RUNNING); | |
1781 | ||
1782 | /* Ready for link status updates */ | |
1783 | lio->intf_open = 1; | |
1784 | ||
1785 | netif_info(lio, ifup, lio->netdev, "Interface Open, ready for traffic\n"); | |
1786 | start_txq(netdev); | |
1787 | ||
9217c3cf RV |
1788 | /* tell Octeon to start forwarding packets to host */ |
1789 | send_rx_ctrl_cmd(lio, 1); | |
1790 | ||
3cd25e48 RV |
1791 | dev_info(&oct->pci_dev->dev, "%s interface is opened\n", netdev->name); |
1792 | ||
1793 | return 0; | |
1794 | } | |
1795 | ||
846b4687 RV |
1796 | /** |
1797 | * \brief Net device stop for LiquidIO | |
1798 | * @param netdev network device | |
1799 | */ | |
1800 | static int liquidio_stop(struct net_device *netdev) | |
1801 | { | |
1802 | struct lio *lio = GET_LIO(netdev); | |
1803 | struct octeon_device *oct = lio->oct_dev; | |
1804 | ||
1805 | netif_info(lio, ifdown, lio->netdev, "Stopping interface!\n"); | |
1806 | /* Inform that netif carrier is down */ | |
1807 | lio->intf_open = 0; | |
1808 | lio->linfo.link.s.link_up = 0; | |
1809 | ||
1810 | netif_carrier_off(netdev); | |
1811 | lio->link_changes++; | |
1812 | ||
9217c3cf RV |
1813 | /* tell Octeon to stop forwarding packets to host */ |
1814 | send_rx_ctrl_cmd(lio, 0); | |
1815 | ||
846b4687 RV |
1816 | ifstate_reset(lio, LIO_IFSTATE_RUNNING); |
1817 | ||
3cd25e48 RV |
1818 | txqs_stop(netdev); |
1819 | ||
846b4687 RV |
1820 | dev_info(&oct->pci_dev->dev, "%s interface is stopped\n", netdev->name); |
1821 | ||
1822 | return 0; | |
1823 | } | |
1824 | ||
50f7f94b RV |
1825 | /** |
1826 | * \brief Converts a mask based on net device flags | |
1827 | * @param netdev network device | |
1828 | * | |
1829 | * This routine generates a octnet_ifflags mask from the net device flags | |
1830 | * received from the OS. | |
1831 | */ | |
1832 | static enum octnet_ifflags get_new_flags(struct net_device *netdev) | |
1833 | { | |
1834 | enum octnet_ifflags f = OCTNET_IFFLAG_UNICAST; | |
1835 | ||
1836 | if (netdev->flags & IFF_PROMISC) | |
1837 | f |= OCTNET_IFFLAG_PROMISC; | |
1838 | ||
1839 | if (netdev->flags & IFF_ALLMULTI) | |
1840 | f |= OCTNET_IFFLAG_ALLMULTI; | |
1841 | ||
1842 | if (netdev->flags & IFF_MULTICAST) { | |
1843 | f |= OCTNET_IFFLAG_MULTICAST; | |
1844 | ||
1845 | /* Accept all multicast addresses if there are more than we | |
1846 | * can handle | |
1847 | */ | |
1848 | if (netdev_mc_count(netdev) > MAX_OCTEON_MULTICAST_ADDR) | |
1849 | f |= OCTNET_IFFLAG_ALLMULTI; | |
1850 | } | |
1851 | ||
1852 | if (netdev->flags & IFF_BROADCAST) | |
1853 | f |= OCTNET_IFFLAG_BROADCAST; | |
1854 | ||
1855 | return f; | |
1856 | } | |
1857 | ||
1858 | static void liquidio_set_uc_list(struct net_device *netdev) | |
1859 | { | |
1860 | struct lio *lio = GET_LIO(netdev); | |
1861 | struct octeon_device *oct = lio->oct_dev; | |
1862 | struct octnic_ctrl_pkt nctrl; | |
1863 | struct netdev_hw_addr *ha; | |
1864 | u64 *mac; | |
1865 | ||
1866 | if (lio->netdev_uc_count == netdev_uc_count(netdev)) | |
1867 | return; | |
1868 | ||
1869 | if (netdev_uc_count(netdev) > MAX_NCTRL_UDD) { | |
1870 | dev_err(&oct->pci_dev->dev, "too many MAC addresses in netdev uc list\n"); | |
1871 | return; | |
1872 | } | |
1873 | ||
1874 | lio->netdev_uc_count = netdev_uc_count(netdev); | |
1875 | ||
1876 | memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); | |
1877 | nctrl.ncmd.s.cmd = OCTNET_CMD_SET_UC_LIST; | |
1878 | nctrl.ncmd.s.more = lio->netdev_uc_count; | |
1879 | nctrl.ncmd.s.param1 = oct->vf_num; | |
1880 | nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; | |
1881 | nctrl.netpndev = (u64)netdev; | |
1882 | nctrl.cb_fn = liquidio_link_ctrl_cmd_completion; | |
1883 | ||
1884 | /* copy all the addresses into the udd */ | |
1885 | mac = &nctrl.udd[0]; | |
1886 | netdev_for_each_uc_addr(ha, netdev) { | |
1887 | ether_addr_copy(((u8 *)mac) + 2, ha->addr); | |
1888 | mac++; | |
1889 | } | |
1890 | ||
1891 | octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl); | |
1892 | } | |
1893 | ||
1894 | /** | |
1895 | * \brief Net device set_multicast_list | |
1896 | * @param netdev network device | |
1897 | */ | |
1898 | static void liquidio_set_mcast_list(struct net_device *netdev) | |
1899 | { | |
1900 | int mc_count = min(netdev_mc_count(netdev), MAX_OCTEON_MULTICAST_ADDR); | |
1901 | struct lio *lio = GET_LIO(netdev); | |
1902 | struct octeon_device *oct = lio->oct_dev; | |
1903 | struct octnic_ctrl_pkt nctrl; | |
1904 | struct netdev_hw_addr *ha; | |
1905 | u64 *mc; | |
1906 | int ret; | |
1907 | ||
1908 | memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); | |
1909 | ||
1910 | /* Create a ctrl pkt command to be sent to core app. */ | |
1911 | nctrl.ncmd.u64 = 0; | |
1912 | nctrl.ncmd.s.cmd = OCTNET_CMD_SET_MULTI_LIST; | |
1913 | nctrl.ncmd.s.param1 = get_new_flags(netdev); | |
1914 | nctrl.ncmd.s.param2 = mc_count; | |
1915 | nctrl.ncmd.s.more = mc_count; | |
1916 | nctrl.netpndev = (u64)netdev; | |
1917 | nctrl.cb_fn = liquidio_link_ctrl_cmd_completion; | |
1918 | ||
1919 | /* copy all the addresses into the udd */ | |
1920 | mc = &nctrl.udd[0]; | |
1921 | netdev_for_each_mc_addr(ha, netdev) { | |
1922 | *mc = 0; | |
1923 | ether_addr_copy(((u8 *)mc) + 2, ha->addr); | |
1924 | /* no need to swap bytes */ | |
1925 | if (++mc > &nctrl.udd[mc_count]) | |
1926 | break; | |
1927 | } | |
1928 | ||
1929 | nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; | |
1930 | ||
1931 | /* Apparently, any activity in this call from the kernel has to | |
1932 | * be atomic. So we won't wait for response. | |
1933 | */ | |
1934 | nctrl.wait_time = 0; | |
1935 | ||
1936 | ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl); | |
1937 | if (ret < 0) { | |
1938 | dev_err(&oct->pci_dev->dev, "DEVFLAGS change failed in core (ret: 0x%x)\n", | |
1939 | ret); | |
1940 | } | |
1941 | ||
1942 | liquidio_set_uc_list(netdev); | |
1943 | } | |
1944 | ||
1945 | /** | |
1946 | * \brief Net device set_mac_address | |
1947 | * @param netdev network device | |
1948 | */ | |
1949 | static int liquidio_set_mac(struct net_device *netdev, void *p) | |
1950 | { | |
1951 | struct sockaddr *addr = (struct sockaddr *)p; | |
1952 | struct lio *lio = GET_LIO(netdev); | |
1953 | struct octeon_device *oct = lio->oct_dev; | |
1954 | struct octnic_ctrl_pkt nctrl; | |
1955 | int ret = 0; | |
1956 | ||
1957 | if (!is_valid_ether_addr(addr->sa_data)) | |
1958 | return -EADDRNOTAVAIL; | |
1959 | ||
1960 | if (ether_addr_equal(addr->sa_data, netdev->dev_addr)) | |
1961 | return 0; | |
1962 | ||
1963 | if (lio->linfo.macaddr_is_admin_asgnd) | |
1964 | return -EPERM; | |
1965 | ||
1966 | memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); | |
1967 | ||
1968 | nctrl.ncmd.u64 = 0; | |
1969 | nctrl.ncmd.s.cmd = OCTNET_CMD_CHANGE_MACADDR; | |
1970 | nctrl.ncmd.s.param1 = 0; | |
1971 | nctrl.ncmd.s.more = 1; | |
1972 | nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; | |
1973 | nctrl.netpndev = (u64)netdev; | |
1974 | nctrl.cb_fn = liquidio_link_ctrl_cmd_completion; | |
1975 | nctrl.wait_time = 100; | |
1976 | ||
1977 | nctrl.udd[0] = 0; | |
1978 | /* The MAC Address is presented in network byte order. */ | |
1979 | ether_addr_copy((u8 *)&nctrl.udd[0] + 2, addr->sa_data); | |
1980 | ||
1981 | ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl); | |
1982 | if (ret < 0) { | |
1983 | dev_err(&oct->pci_dev->dev, "MAC Address change failed\n"); | |
1984 | return -ENOMEM; | |
1985 | } | |
1986 | memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); | |
1987 | ether_addr_copy(((u8 *)&lio->linfo.hw_addr) + 2, addr->sa_data); | |
1988 | ||
1989 | return 0; | |
1990 | } | |
1991 | ||
d8ab848c RV |
1992 | /** |
1993 | * \brief Net device get_stats | |
1994 | * @param netdev network device | |
1995 | */ | |
1996 | static struct net_device_stats *liquidio_get_stats(struct net_device *netdev) | |
1997 | { | |
1998 | struct lio *lio = GET_LIO(netdev); | |
1999 | struct net_device_stats *stats = &netdev->stats; | |
2000 | u64 pkts = 0, drop = 0, bytes = 0; | |
2001 | struct oct_droq_stats *oq_stats; | |
2002 | struct oct_iq_stats *iq_stats; | |
2003 | struct octeon_device *oct; | |
2004 | int i, iq_no, oq_no; | |
2005 | ||
2006 | oct = lio->oct_dev; | |
2007 | ||
2008 | for (i = 0; i < lio->linfo.num_txpciq; i++) { | |
2009 | iq_no = lio->linfo.txpciq[i].s.q_no; | |
2010 | iq_stats = &oct->instr_queue[iq_no]->stats; | |
2011 | pkts += iq_stats->tx_done; | |
2012 | drop += iq_stats->tx_dropped; | |
2013 | bytes += iq_stats->tx_tot_bytes; | |
2014 | } | |
2015 | ||
2016 | stats->tx_packets = pkts; | |
2017 | stats->tx_bytes = bytes; | |
2018 | stats->tx_dropped = drop; | |
2019 | ||
2020 | pkts = 0; | |
2021 | drop = 0; | |
2022 | bytes = 0; | |
2023 | ||
2024 | for (i = 0; i < lio->linfo.num_rxpciq; i++) { | |
2025 | oq_no = lio->linfo.rxpciq[i].s.q_no; | |
2026 | oq_stats = &oct->droq[oq_no]->stats; | |
2027 | pkts += oq_stats->rx_pkts_received; | |
2028 | drop += (oq_stats->rx_dropped + | |
2029 | oq_stats->dropped_nodispatch + | |
2030 | oq_stats->dropped_toomany + | |
2031 | oq_stats->dropped_nomem); | |
2032 | bytes += oq_stats->rx_bytes_received; | |
2033 | } | |
2034 | ||
2035 | stats->rx_bytes = bytes; | |
2036 | stats->rx_packets = pkts; | |
2037 | stats->rx_dropped = drop; | |
2038 | ||
2039 | return stats; | |
2040 | } | |
2041 | ||
50f7f94b RV |
2042 | /** |
2043 | * \brief Net device change_mtu | |
2044 | * @param netdev network device | |
2045 | */ | |
2046 | static int liquidio_change_mtu(struct net_device *netdev, int new_mtu) | |
2047 | { | |
2048 | struct lio *lio = GET_LIO(netdev); | |
2049 | struct octeon_device *oct = lio->oct_dev; | |
2050 | ||
2051 | lio->mtu = new_mtu; | |
2052 | ||
2053 | netif_info(lio, probe, lio->netdev, "MTU Changed from %d to %d\n", | |
2054 | netdev->mtu, new_mtu); | |
2055 | dev_info(&oct->pci_dev->dev, "%s MTU Changed from %d to %d\n", | |
2056 | netdev->name, netdev->mtu, new_mtu); | |
2057 | ||
2058 | netdev->mtu = new_mtu; | |
2059 | ||
2060 | return 0; | |
2061 | } | |
2062 | ||
f625fe62 RV |
2063 | /** |
2064 | * \brief Handler for SIOCSHWTSTAMP ioctl | |
2065 | * @param netdev network device | |
2066 | * @param ifr interface request | |
2067 | * @param cmd command | |
2068 | */ | |
2069 | static int hwtstamp_ioctl(struct net_device *netdev, struct ifreq *ifr) | |
2070 | { | |
2071 | struct lio *lio = GET_LIO(netdev); | |
2072 | struct hwtstamp_config conf; | |
2073 | ||
2074 | if (copy_from_user(&conf, ifr->ifr_data, sizeof(conf))) | |
2075 | return -EFAULT; | |
2076 | ||
2077 | if (conf.flags) | |
2078 | return -EINVAL; | |
2079 | ||
2080 | switch (conf.tx_type) { | |
2081 | case HWTSTAMP_TX_ON: | |
2082 | case HWTSTAMP_TX_OFF: | |
2083 | break; | |
2084 | default: | |
2085 | return -ERANGE; | |
2086 | } | |
2087 | ||
2088 | switch (conf.rx_filter) { | |
2089 | case HWTSTAMP_FILTER_NONE: | |
2090 | break; | |
2091 | case HWTSTAMP_FILTER_ALL: | |
2092 | case HWTSTAMP_FILTER_SOME: | |
2093 | case HWTSTAMP_FILTER_PTP_V1_L4_EVENT: | |
2094 | case HWTSTAMP_FILTER_PTP_V1_L4_SYNC: | |
2095 | case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ: | |
2096 | case HWTSTAMP_FILTER_PTP_V2_L4_EVENT: | |
2097 | case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: | |
2098 | case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: | |
2099 | case HWTSTAMP_FILTER_PTP_V2_L2_EVENT: | |
2100 | case HWTSTAMP_FILTER_PTP_V2_L2_SYNC: | |
2101 | case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ: | |
2102 | case HWTSTAMP_FILTER_PTP_V2_EVENT: | |
2103 | case HWTSTAMP_FILTER_PTP_V2_SYNC: | |
2104 | case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: | |
2105 | conf.rx_filter = HWTSTAMP_FILTER_ALL; | |
2106 | break; | |
2107 | default: | |
2108 | return -ERANGE; | |
2109 | } | |
2110 | ||
2111 | if (conf.rx_filter == HWTSTAMP_FILTER_ALL) | |
2112 | ifstate_set(lio, LIO_IFSTATE_RX_TIMESTAMP_ENABLED); | |
2113 | ||
2114 | else | |
2115 | ifstate_reset(lio, LIO_IFSTATE_RX_TIMESTAMP_ENABLED); | |
2116 | ||
2117 | return copy_to_user(ifr->ifr_data, &conf, sizeof(conf)) ? -EFAULT : 0; | |
2118 | } | |
2119 | ||
2120 | /** | |
2121 | * \brief ioctl handler | |
2122 | * @param netdev network device | |
2123 | * @param ifr interface request | |
2124 | * @param cmd command | |
2125 | */ | |
2126 | static int liquidio_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) | |
2127 | { | |
2128 | switch (cmd) { | |
2129 | case SIOCSHWTSTAMP: | |
2130 | return hwtstamp_ioctl(netdev, ifr); | |
2131 | default: | |
2132 | return -EOPNOTSUPP; | |
2133 | } | |
2134 | } | |
2135 | ||
2136 | static void handle_timestamp(struct octeon_device *oct, u32 status, void *buf) | |
2137 | { | |
2138 | struct sk_buff *skb = (struct sk_buff *)buf; | |
2139 | struct octnet_buf_free_info *finfo; | |
2140 | struct oct_timestamp_resp *resp; | |
2141 | struct octeon_soft_command *sc; | |
2142 | struct lio *lio; | |
2143 | ||
2144 | finfo = (struct octnet_buf_free_info *)skb->cb; | |
2145 | lio = finfo->lio; | |
2146 | sc = finfo->sc; | |
2147 | oct = lio->oct_dev; | |
2148 | resp = (struct oct_timestamp_resp *)sc->virtrptr; | |
2149 | ||
2150 | if (status != OCTEON_REQUEST_DONE) { | |
2151 | dev_err(&oct->pci_dev->dev, "Tx timestamp instruction failed. Status: %llx\n", | |
2152 | CVM_CAST64(status)); | |
2153 | resp->timestamp = 0; | |
2154 | } | |
2155 | ||
2156 | octeon_swap_8B_data(&resp->timestamp, 1); | |
2157 | ||
2158 | if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_IN_PROGRESS)) { | |
2159 | struct skb_shared_hwtstamps ts; | |
2160 | u64 ns = resp->timestamp; | |
2161 | ||
2162 | netif_info(lio, tx_done, lio->netdev, | |
2163 | "Got resulting SKBTX_HW_TSTAMP skb=%p ns=%016llu\n", | |
2164 | skb, (unsigned long long)ns); | |
2165 | ts.hwtstamp = ns_to_ktime(ns + lio->ptp_adjust); | |
2166 | skb_tstamp_tx(skb, &ts); | |
2167 | } | |
2168 | ||
2169 | octeon_free_soft_command(oct, sc); | |
2170 | tx_buffer_free(skb); | |
2171 | } | |
2172 | ||
2173 | /* \brief Send a data packet that will be timestamped | |
2174 | * @param oct octeon device | |
2175 | * @param ndata pointer to network data | |
2176 | * @param finfo pointer to private network data | |
2177 | */ | |
2178 | static int send_nic_timestamp_pkt(struct octeon_device *oct, | |
2179 | struct octnic_data_pkt *ndata, | |
2180 | struct octnet_buf_free_info *finfo) | |
2181 | { | |
2182 | struct octeon_soft_command *sc; | |
2183 | int ring_doorbell; | |
2184 | struct lio *lio; | |
2185 | int retval; | |
2186 | u32 len; | |
2187 | ||
2188 | lio = finfo->lio; | |
2189 | ||
2190 | sc = octeon_alloc_soft_command_resp(oct, &ndata->cmd, | |
2191 | sizeof(struct oct_timestamp_resp)); | |
2192 | finfo->sc = sc; | |
2193 | ||
2194 | if (!sc) { | |
2195 | dev_err(&oct->pci_dev->dev, "No memory for timestamped data packet\n"); | |
2196 | return IQ_SEND_FAILED; | |
2197 | } | |
2198 | ||
2199 | if (ndata->reqtype == REQTYPE_NORESP_NET) | |
2200 | ndata->reqtype = REQTYPE_RESP_NET; | |
2201 | else if (ndata->reqtype == REQTYPE_NORESP_NET_SG) | |
2202 | ndata->reqtype = REQTYPE_RESP_NET_SG; | |
2203 | ||
2204 | sc->callback = handle_timestamp; | |
2205 | sc->callback_arg = finfo->skb; | |
2206 | sc->iq_no = ndata->q_no; | |
2207 | ||
2208 | len = (u32)((struct octeon_instr_ih3 *)(&sc->cmd.cmd3.ih3))->dlengsz; | |
2209 | ||
2210 | ring_doorbell = 1; | |
2211 | ||
2212 | retval = octeon_send_command(oct, sc->iq_no, ring_doorbell, &sc->cmd, | |
2213 | sc, len, ndata->reqtype); | |
2214 | ||
2215 | if (retval == IQ_SEND_FAILED) { | |
2216 | dev_err(&oct->pci_dev->dev, "timestamp data packet failed status: %x\n", | |
2217 | retval); | |
2218 | octeon_free_soft_command(oct, sc); | |
2219 | } else { | |
2220 | netif_info(lio, tx_queued, lio->netdev, "Queued timestamp packet\n"); | |
2221 | } | |
2222 | ||
2223 | return retval; | |
2224 | } | |
2225 | ||
9981328a RV |
2226 | /** \brief Transmit networks packets to the Octeon interface |
2227 | * @param skbuff skbuff struct to be passed to network layer. | |
2228 | * @param netdev pointer to network device | |
2229 | * @returns whether the packet was transmitted to the device okay or not | |
2230 | * (NETDEV_TX_OK or NETDEV_TX_BUSY) | |
2231 | */ | |
2232 | static int liquidio_xmit(struct sk_buff *skb, struct net_device *netdev) | |
2233 | { | |
2234 | struct octnet_buf_free_info *finfo; | |
2235 | union octnic_cmd_setup cmdsetup; | |
2236 | struct octnic_data_pkt ndata; | |
2237 | struct octeon_instr_irh *irh; | |
2238 | struct oct_iq_stats *stats; | |
2239 | struct octeon_device *oct; | |
2240 | int q_idx = 0, iq_no = 0; | |
2241 | union tx_info *tx_info; | |
2242 | struct lio *lio; | |
2243 | int status = 0; | |
2244 | u64 dptr = 0; | |
2245 | u32 tag = 0; | |
2246 | int j; | |
2247 | ||
2248 | lio = GET_LIO(netdev); | |
2249 | oct = lio->oct_dev; | |
2250 | ||
2251 | if (netif_is_multiqueue(netdev)) { | |
2252 | q_idx = skb->queue_mapping; | |
2253 | q_idx = (q_idx % (lio->linfo.num_txpciq)); | |
2254 | tag = q_idx; | |
2255 | iq_no = lio->linfo.txpciq[q_idx].s.q_no; | |
2256 | } else { | |
2257 | iq_no = lio->txq; | |
2258 | } | |
2259 | ||
2260 | stats = &oct->instr_queue[iq_no]->stats; | |
2261 | ||
2262 | /* Check for all conditions in which the current packet cannot be | |
2263 | * transmitted. | |
2264 | */ | |
2265 | if (!(atomic_read(&lio->ifstate) & LIO_IFSTATE_RUNNING) || | |
2266 | (!lio->linfo.link.s.link_up) || (skb->len <= 0)) { | |
2267 | netif_info(lio, tx_err, lio->netdev, "Transmit failed link_status : %d\n", | |
2268 | lio->linfo.link.s.link_up); | |
2269 | goto lio_xmit_failed; | |
2270 | } | |
2271 | ||
2272 | /* Use space in skb->cb to store info used to unmap and | |
2273 | * free the buffers. | |
2274 | */ | |
2275 | finfo = (struct octnet_buf_free_info *)skb->cb; | |
2276 | finfo->lio = lio; | |
2277 | finfo->skb = skb; | |
2278 | finfo->sc = NULL; | |
2279 | ||
2280 | /* Prepare the attributes for the data to be passed to OSI. */ | |
2281 | memset(&ndata, 0, sizeof(struct octnic_data_pkt)); | |
2282 | ||
2283 | ndata.buf = finfo; | |
2284 | ||
2285 | ndata.q_no = iq_no; | |
2286 | ||
2287 | if (netif_is_multiqueue(netdev)) { | |
2288 | if (octnet_iq_is_full(oct, ndata.q_no)) { | |
2289 | /* defer sending if queue is full */ | |
2290 | netif_info(lio, tx_err, lio->netdev, "Transmit failed iq:%d full\n", | |
2291 | ndata.q_no); | |
2292 | stats->tx_iq_busy++; | |
2293 | return NETDEV_TX_BUSY; | |
2294 | } | |
2295 | } else { | |
2296 | if (octnet_iq_is_full(oct, lio->txq)) { | |
2297 | /* defer sending if queue is full */ | |
2298 | stats->tx_iq_busy++; | |
2299 | netif_info(lio, tx_err, lio->netdev, "Transmit failed iq:%d full\n", | |
2300 | ndata.q_no); | |
2301 | return NETDEV_TX_BUSY; | |
2302 | } | |
2303 | } | |
2304 | ||
2305 | ndata.datasize = skb->len; | |
2306 | ||
2307 | cmdsetup.u64 = 0; | |
2308 | cmdsetup.s.iq_no = iq_no; | |
2309 | ||
c05ebcc8 RV |
2310 | if (skb->ip_summed == CHECKSUM_PARTIAL) { |
2311 | if (skb->encapsulation) { | |
2312 | cmdsetup.s.tnl_csum = 1; | |
2313 | stats->tx_vxlan++; | |
2314 | } else { | |
2315 | cmdsetup.s.transport_csum = 1; | |
2316 | } | |
2317 | } | |
f625fe62 RV |
2318 | if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) { |
2319 | skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; | |
2320 | cmdsetup.s.timestamp = 1; | |
2321 | } | |
9981328a RV |
2322 | |
2323 | if (!skb_shinfo(skb)->nr_frags) { | |
2324 | cmdsetup.s.u.datasize = skb->len; | |
2325 | octnet_prepare_pci_cmd(oct, &ndata.cmd, &cmdsetup, tag); | |
2326 | /* Offload checksum calculation for TCP/UDP packets */ | |
2327 | dptr = dma_map_single(&oct->pci_dev->dev, | |
2328 | skb->data, | |
2329 | skb->len, | |
2330 | DMA_TO_DEVICE); | |
2331 | if (dma_mapping_error(&oct->pci_dev->dev, dptr)) { | |
2332 | dev_err(&oct->pci_dev->dev, "%s DMA mapping error 1\n", | |
2333 | __func__); | |
2334 | return NETDEV_TX_BUSY; | |
2335 | } | |
2336 | ||
2337 | ndata.cmd.cmd3.dptr = dptr; | |
2338 | finfo->dptr = dptr; | |
2339 | ndata.reqtype = REQTYPE_NORESP_NET; | |
2340 | ||
2341 | } else { | |
2342 | struct skb_frag_struct *frag; | |
2343 | struct octnic_gather *g; | |
2344 | int i, frags; | |
2345 | ||
2346 | spin_lock(&lio->glist_lock[q_idx]); | |
2347 | g = (struct octnic_gather *)list_delete_head( | |
2348 | &lio->glist[q_idx]); | |
2349 | spin_unlock(&lio->glist_lock[q_idx]); | |
2350 | ||
2351 | if (!g) { | |
2352 | netif_info(lio, tx_err, lio->netdev, | |
2353 | "Transmit scatter gather: glist null!\n"); | |
2354 | goto lio_xmit_failed; | |
2355 | } | |
2356 | ||
2357 | cmdsetup.s.gather = 1; | |
2358 | cmdsetup.s.u.gatherptrs = (skb_shinfo(skb)->nr_frags + 1); | |
2359 | octnet_prepare_pci_cmd(oct, &ndata.cmd, &cmdsetup, tag); | |
2360 | ||
2361 | memset(g->sg, 0, g->sg_size); | |
2362 | ||
2363 | g->sg[0].ptr[0] = dma_map_single(&oct->pci_dev->dev, | |
2364 | skb->data, | |
2365 | (skb->len - skb->data_len), | |
2366 | DMA_TO_DEVICE); | |
2367 | if (dma_mapping_error(&oct->pci_dev->dev, g->sg[0].ptr[0])) { | |
2368 | dev_err(&oct->pci_dev->dev, "%s DMA mapping error 2\n", | |
2369 | __func__); | |
2370 | return NETDEV_TX_BUSY; | |
2371 | } | |
2372 | add_sg_size(&g->sg[0], (skb->len - skb->data_len), 0); | |
2373 | ||
2374 | frags = skb_shinfo(skb)->nr_frags; | |
2375 | i = 1; | |
2376 | while (frags--) { | |
2377 | frag = &skb_shinfo(skb)->frags[i - 1]; | |
2378 | ||
2379 | g->sg[(i >> 2)].ptr[(i & 3)] = | |
2380 | dma_map_page(&oct->pci_dev->dev, | |
2381 | frag->page.p, | |
2382 | frag->page_offset, | |
2383 | frag->size, | |
2384 | DMA_TO_DEVICE); | |
2385 | if (dma_mapping_error(&oct->pci_dev->dev, | |
2386 | g->sg[i >> 2].ptr[i & 3])) { | |
2387 | dma_unmap_single(&oct->pci_dev->dev, | |
2388 | g->sg[0].ptr[0], | |
2389 | skb->len - skb->data_len, | |
2390 | DMA_TO_DEVICE); | |
2391 | for (j = 1; j < i; j++) { | |
2392 | frag = &skb_shinfo(skb)->frags[j - 1]; | |
2393 | dma_unmap_page(&oct->pci_dev->dev, | |
2394 | g->sg[j >> 2].ptr[j & 3], | |
2395 | frag->size, | |
2396 | DMA_TO_DEVICE); | |
2397 | } | |
2398 | dev_err(&oct->pci_dev->dev, "%s DMA mapping error 3\n", | |
2399 | __func__); | |
2400 | return NETDEV_TX_BUSY; | |
2401 | } | |
2402 | ||
2403 | add_sg_size(&g->sg[(i >> 2)], frag->size, (i & 3)); | |
2404 | i++; | |
2405 | } | |
2406 | ||
67e303e0 | 2407 | dptr = g->sg_dma_ptr; |
9981328a RV |
2408 | |
2409 | ndata.cmd.cmd3.dptr = dptr; | |
2410 | finfo->dptr = dptr; | |
2411 | finfo->g = g; | |
2412 | ||
2413 | ndata.reqtype = REQTYPE_NORESP_NET_SG; | |
2414 | } | |
2415 | ||
2416 | irh = (struct octeon_instr_irh *)&ndata.cmd.cmd3.irh; | |
2417 | tx_info = (union tx_info *)&ndata.cmd.cmd3.ossp[0]; | |
2418 | ||
2419 | if (skb_shinfo(skb)->gso_size) { | |
2420 | tx_info->s.gso_size = skb_shinfo(skb)->gso_size; | |
2421 | tx_info->s.gso_segs = skb_shinfo(skb)->gso_segs; | |
2422 | } | |
2423 | ||
2135f9b1 RV |
2424 | /* HW insert VLAN tag */ |
2425 | if (skb_vlan_tag_present(skb)) { | |
2426 | irh->priority = skb_vlan_tag_get(skb) >> VLAN_PRIO_SHIFT; | |
2427 | irh->vlan = skb_vlan_tag_get(skb) & VLAN_VID_MASK; | |
2428 | } | |
2429 | ||
f625fe62 RV |
2430 | if (unlikely(cmdsetup.s.timestamp)) |
2431 | status = send_nic_timestamp_pkt(oct, &ndata, finfo); | |
2432 | else | |
2433 | status = octnet_send_nic_data_pkt(oct, &ndata); | |
9981328a RV |
2434 | if (status == IQ_SEND_FAILED) |
2435 | goto lio_xmit_failed; | |
2436 | ||
2437 | netif_info(lio, tx_queued, lio->netdev, "Transmit queued successfully\n"); | |
2438 | ||
2439 | if (status == IQ_SEND_STOP) { | |
2440 | dev_err(&oct->pci_dev->dev, "Rcvd IQ_SEND_STOP signal; stopping IQ-%d\n", | |
2441 | iq_no); | |
2442 | stop_q(lio->netdev, q_idx); | |
2443 | } | |
2444 | ||
2445 | netif_trans_update(netdev); | |
2446 | ||
80c8eae6 SB |
2447 | if (tx_info->s.gso_segs) |
2448 | stats->tx_done += tx_info->s.gso_segs; | |
9981328a RV |
2449 | else |
2450 | stats->tx_done++; | |
80c8eae6 | 2451 | stats->tx_tot_bytes += ndata.datasize; |
9981328a RV |
2452 | |
2453 | return NETDEV_TX_OK; | |
2454 | ||
2455 | lio_xmit_failed: | |
2456 | stats->tx_dropped++; | |
2457 | netif_info(lio, tx_err, lio->netdev, "IQ%d Transmit dropped:%llu\n", | |
2458 | iq_no, stats->tx_dropped); | |
2459 | if (dptr) | |
2460 | dma_unmap_single(&oct->pci_dev->dev, dptr, | |
2461 | ndata.datasize, DMA_TO_DEVICE); | |
2462 | tx_buffer_free(skb); | |
2463 | return NETDEV_TX_OK; | |
2464 | } | |
2465 | ||
2466 | /** \brief Network device Tx timeout | |
2467 | * @param netdev pointer to network device | |
2468 | */ | |
2469 | static void liquidio_tx_timeout(struct net_device *netdev) | |
2470 | { | |
2471 | struct lio *lio; | |
2472 | ||
2473 | lio = GET_LIO(netdev); | |
2474 | ||
2475 | netif_info(lio, tx_err, lio->netdev, | |
2476 | "Transmit timeout tx_dropped:%ld, waking up queues now!!\n", | |
2477 | netdev->stats.tx_dropped); | |
2478 | netif_trans_update(netdev); | |
2479 | txqs_wake(netdev); | |
2480 | } | |
2481 | ||
2135f9b1 RV |
2482 | static int |
2483 | liquidio_vlan_rx_add_vid(struct net_device *netdev, | |
2484 | __be16 proto __attribute__((unused)), u16 vid) | |
2485 | { | |
2486 | struct lio *lio = GET_LIO(netdev); | |
2487 | struct octeon_device *oct = lio->oct_dev; | |
2488 | struct octnic_ctrl_pkt nctrl; | |
2489 | int ret = 0; | |
2490 | ||
2491 | memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); | |
2492 | ||
2493 | nctrl.ncmd.u64 = 0; | |
2494 | nctrl.ncmd.s.cmd = OCTNET_CMD_ADD_VLAN_FILTER; | |
2495 | nctrl.ncmd.s.param1 = vid; | |
2496 | nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; | |
2497 | nctrl.wait_time = 100; | |
2498 | nctrl.netpndev = (u64)netdev; | |
2499 | nctrl.cb_fn = liquidio_link_ctrl_cmd_completion; | |
2500 | ||
2501 | ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl); | |
2502 | if (ret < 0) { | |
2503 | dev_err(&oct->pci_dev->dev, "Add VLAN filter failed in core (ret: 0x%x)\n", | |
2504 | ret); | |
2505 | } | |
2506 | ||
2507 | return ret; | |
2508 | } | |
2509 | ||
2510 | static int | |
2511 | liquidio_vlan_rx_kill_vid(struct net_device *netdev, | |
2512 | __be16 proto __attribute__((unused)), u16 vid) | |
2513 | { | |
2514 | struct lio *lio = GET_LIO(netdev); | |
2515 | struct octeon_device *oct = lio->oct_dev; | |
2516 | struct octnic_ctrl_pkt nctrl; | |
2517 | int ret = 0; | |
2518 | ||
2519 | memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); | |
2520 | ||
2521 | nctrl.ncmd.u64 = 0; | |
2522 | nctrl.ncmd.s.cmd = OCTNET_CMD_DEL_VLAN_FILTER; | |
2523 | nctrl.ncmd.s.param1 = vid; | |
2524 | nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; | |
2525 | nctrl.wait_time = 100; | |
2526 | nctrl.netpndev = (u64)netdev; | |
2527 | nctrl.cb_fn = liquidio_link_ctrl_cmd_completion; | |
2528 | ||
2529 | ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl); | |
2530 | if (ret < 0) { | |
2531 | dev_err(&oct->pci_dev->dev, "Add VLAN filter failed in core (ret: 0x%x)\n", | |
2532 | ret); | |
2533 | } | |
2534 | return ret; | |
2535 | } | |
2536 | ||
846b4687 RV |
2537 | /** Sending command to enable/disable RX checksum offload |
2538 | * @param netdev pointer to network device | |
2539 | * @param command OCTNET_CMD_TNL_RX_CSUM_CTL | |
2540 | * @param rx_cmd_bit OCTNET_CMD_RXCSUM_ENABLE/ | |
2541 | * OCTNET_CMD_RXCSUM_DISABLE | |
2542 | * @returns SUCCESS or FAILURE | |
2543 | */ | |
2544 | static int liquidio_set_rxcsum_command(struct net_device *netdev, int command, | |
2545 | u8 rx_cmd) | |
2546 | { | |
2547 | struct lio *lio = GET_LIO(netdev); | |
2548 | struct octeon_device *oct = lio->oct_dev; | |
2549 | struct octnic_ctrl_pkt nctrl; | |
2550 | int ret = 0; | |
2551 | ||
2552 | nctrl.ncmd.u64 = 0; | |
2553 | nctrl.ncmd.s.cmd = command; | |
2554 | nctrl.ncmd.s.param1 = rx_cmd; | |
2555 | nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; | |
2556 | nctrl.wait_time = 100; | |
2557 | nctrl.netpndev = (u64)netdev; | |
2558 | nctrl.cb_fn = liquidio_link_ctrl_cmd_completion; | |
2559 | ||
2560 | ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl); | |
2561 | if (ret < 0) { | |
2562 | dev_err(&oct->pci_dev->dev, "DEVFLAGS RXCSUM change failed in core (ret:0x%x)\n", | |
2563 | ret); | |
2564 | } | |
2565 | return ret; | |
2566 | } | |
2567 | ||
c05ebcc8 RV |
2568 | /** Sending command to add/delete VxLAN UDP port to firmware |
2569 | * @param netdev pointer to network device | |
2570 | * @param command OCTNET_CMD_VXLAN_PORT_CONFIG | |
2571 | * @param vxlan_port VxLAN port to be added or deleted | |
2572 | * @param vxlan_cmd_bit OCTNET_CMD_VXLAN_PORT_ADD, | |
2573 | * OCTNET_CMD_VXLAN_PORT_DEL | |
2574 | * @returns SUCCESS or FAILURE | |
2575 | */ | |
2576 | static int liquidio_vxlan_port_command(struct net_device *netdev, int command, | |
2577 | u16 vxlan_port, u8 vxlan_cmd_bit) | |
2578 | { | |
2579 | struct lio *lio = GET_LIO(netdev); | |
2580 | struct octeon_device *oct = lio->oct_dev; | |
2581 | struct octnic_ctrl_pkt nctrl; | |
2582 | int ret = 0; | |
2583 | ||
2584 | nctrl.ncmd.u64 = 0; | |
2585 | nctrl.ncmd.s.cmd = command; | |
2586 | nctrl.ncmd.s.more = vxlan_cmd_bit; | |
2587 | nctrl.ncmd.s.param1 = vxlan_port; | |
2588 | nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; | |
2589 | nctrl.wait_time = 100; | |
2590 | nctrl.netpndev = (u64)netdev; | |
2591 | nctrl.cb_fn = liquidio_link_ctrl_cmd_completion; | |
2592 | ||
2593 | ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl); | |
2594 | if (ret < 0) { | |
2595 | dev_err(&oct->pci_dev->dev, | |
2596 | "DEVFLAGS VxLAN port add/delete failed in core (ret : 0x%x)\n", | |
2597 | ret); | |
2598 | } | |
2599 | return ret; | |
2600 | } | |
2601 | ||
846b4687 RV |
2602 | /** \brief Net device fix features |
2603 | * @param netdev pointer to network device | |
2604 | * @param request features requested | |
2605 | * @returns updated features list | |
2606 | */ | |
2607 | static netdev_features_t liquidio_fix_features(struct net_device *netdev, | |
2608 | netdev_features_t request) | |
2609 | { | |
2610 | struct lio *lio = netdev_priv(netdev); | |
2611 | ||
2612 | if ((request & NETIF_F_RXCSUM) && | |
2613 | !(lio->dev_capability & NETIF_F_RXCSUM)) | |
2614 | request &= ~NETIF_F_RXCSUM; | |
2615 | ||
2616 | if ((request & NETIF_F_HW_CSUM) && | |
2617 | !(lio->dev_capability & NETIF_F_HW_CSUM)) | |
2618 | request &= ~NETIF_F_HW_CSUM; | |
2619 | ||
2620 | if ((request & NETIF_F_TSO) && !(lio->dev_capability & NETIF_F_TSO)) | |
2621 | request &= ~NETIF_F_TSO; | |
2622 | ||
2623 | if ((request & NETIF_F_TSO6) && !(lio->dev_capability & NETIF_F_TSO6)) | |
2624 | request &= ~NETIF_F_TSO6; | |
2625 | ||
2626 | if ((request & NETIF_F_LRO) && !(lio->dev_capability & NETIF_F_LRO)) | |
2627 | request &= ~NETIF_F_LRO; | |
2628 | ||
2629 | /* Disable LRO if RXCSUM is off */ | |
2630 | if (!(request & NETIF_F_RXCSUM) && (netdev->features & NETIF_F_LRO) && | |
2631 | (lio->dev_capability & NETIF_F_LRO)) | |
2632 | request &= ~NETIF_F_LRO; | |
2633 | ||
2634 | return request; | |
2635 | } | |
2636 | ||
2637 | /** \brief Net device set features | |
2638 | * @param netdev pointer to network device | |
2639 | * @param features features to enable/disable | |
2640 | */ | |
2641 | static int liquidio_set_features(struct net_device *netdev, | |
2642 | netdev_features_t features) | |
2643 | { | |
2644 | struct lio *lio = netdev_priv(netdev); | |
2645 | ||
2646 | if (!((netdev->features ^ features) & NETIF_F_LRO)) | |
2647 | return 0; | |
2648 | ||
2649 | if ((features & NETIF_F_LRO) && (lio->dev_capability & NETIF_F_LRO)) | |
2650 | liquidio_set_feature(netdev, OCTNET_CMD_LRO_ENABLE, | |
2651 | OCTNIC_LROIPV4 | OCTNIC_LROIPV6); | |
2652 | else if (!(features & NETIF_F_LRO) && | |
2653 | (lio->dev_capability & NETIF_F_LRO)) | |
2654 | liquidio_set_feature(netdev, OCTNET_CMD_LRO_DISABLE, | |
2655 | OCTNIC_LROIPV4 | OCTNIC_LROIPV6); | |
2656 | if (!(netdev->features & NETIF_F_RXCSUM) && | |
2657 | (lio->enc_dev_capability & NETIF_F_RXCSUM) && | |
2658 | (features & NETIF_F_RXCSUM)) | |
2659 | liquidio_set_rxcsum_command(netdev, OCTNET_CMD_TNL_RX_CSUM_CTL, | |
2660 | OCTNET_CMD_RXCSUM_ENABLE); | |
2661 | else if ((netdev->features & NETIF_F_RXCSUM) && | |
2662 | (lio->enc_dev_capability & NETIF_F_RXCSUM) && | |
2663 | !(features & NETIF_F_RXCSUM)) | |
2664 | liquidio_set_rxcsum_command(netdev, OCTNET_CMD_TNL_RX_CSUM_CTL, | |
2665 | OCTNET_CMD_RXCSUM_DISABLE); | |
2666 | ||
2667 | return 0; | |
2668 | } | |
2669 | ||
c05ebcc8 RV |
2670 | static void liquidio_add_vxlan_port(struct net_device *netdev, |
2671 | struct udp_tunnel_info *ti) | |
2672 | { | |
2673 | if (ti->type != UDP_TUNNEL_TYPE_VXLAN) | |
2674 | return; | |
2675 | ||
2676 | liquidio_vxlan_port_command(netdev, | |
2677 | OCTNET_CMD_VXLAN_PORT_CONFIG, | |
2678 | htons(ti->port), | |
2679 | OCTNET_CMD_VXLAN_PORT_ADD); | |
2680 | } | |
2681 | ||
2682 | static void liquidio_del_vxlan_port(struct net_device *netdev, | |
2683 | struct udp_tunnel_info *ti) | |
2684 | { | |
2685 | if (ti->type != UDP_TUNNEL_TYPE_VXLAN) | |
2686 | return; | |
2687 | ||
2688 | liquidio_vxlan_port_command(netdev, | |
2689 | OCTNET_CMD_VXLAN_PORT_CONFIG, | |
2690 | htons(ti->port), | |
2691 | OCTNET_CMD_VXLAN_PORT_DEL); | |
2692 | } | |
2693 | ||
846b4687 | 2694 | static const struct net_device_ops lionetdevops = { |
3cd25e48 RV |
2695 | .ndo_open = liquidio_open, |
2696 | .ndo_stop = liquidio_stop, | |
9981328a | 2697 | .ndo_start_xmit = liquidio_xmit, |
d8ab848c | 2698 | .ndo_get_stats = liquidio_get_stats, |
50f7f94b RV |
2699 | .ndo_set_mac_address = liquidio_set_mac, |
2700 | .ndo_set_rx_mode = liquidio_set_mcast_list, | |
9981328a | 2701 | .ndo_tx_timeout = liquidio_tx_timeout, |
2135f9b1 RV |
2702 | .ndo_vlan_rx_add_vid = liquidio_vlan_rx_add_vid, |
2703 | .ndo_vlan_rx_kill_vid = liquidio_vlan_rx_kill_vid, | |
50f7f94b | 2704 | .ndo_change_mtu = liquidio_change_mtu, |
f625fe62 | 2705 | .ndo_do_ioctl = liquidio_ioctl, |
846b4687 RV |
2706 | .ndo_fix_features = liquidio_fix_features, |
2707 | .ndo_set_features = liquidio_set_features, | |
c05ebcc8 RV |
2708 | .ndo_udp_tunnel_add = liquidio_add_vxlan_port, |
2709 | .ndo_udp_tunnel_del = liquidio_del_vxlan_port, | |
846b4687 RV |
2710 | }; |
2711 | ||
3cd25e48 RV |
2712 | static int lio_nic_info(struct octeon_recv_info *recv_info, void *buf) |
2713 | { | |
2714 | struct octeon_device *oct = (struct octeon_device *)buf; | |
2715 | struct octeon_recv_pkt *recv_pkt = recv_info->recv_pkt; | |
2716 | union oct_link_status *ls; | |
2717 | int gmxport = 0; | |
2718 | int i; | |
2719 | ||
2720 | if (recv_pkt->buffer_size[0] != sizeof(*ls)) { | |
2721 | dev_err(&oct->pci_dev->dev, "Malformed NIC_INFO, len=%d, ifidx=%d\n", | |
2722 | recv_pkt->buffer_size[0], | |
2723 | recv_pkt->rh.r_nic_info.gmxport); | |
2724 | goto nic_info_err; | |
2725 | } | |
2726 | ||
2727 | gmxport = recv_pkt->rh.r_nic_info.gmxport; | |
2728 | ls = (union oct_link_status *)get_rbd(recv_pkt->buffer_ptr[0]); | |
2729 | ||
2730 | octeon_swap_8B_data((u64 *)ls, (sizeof(union oct_link_status)) >> 3); | |
2731 | ||
2732 | for (i = 0; i < oct->ifcount; i++) { | |
2733 | if (oct->props[i].gmxport == gmxport) { | |
2734 | update_link_status(oct->props[i].netdev, ls); | |
2735 | break; | |
2736 | } | |
2737 | } | |
2738 | ||
2739 | nic_info_err: | |
2740 | for (i = 0; i < recv_pkt->buffer_count; i++) | |
2741 | recv_buffer_free(recv_pkt->buffer_ptr[i]); | |
2742 | octeon_free_recv_info(recv_info); | |
2743 | return 0; | |
2744 | } | |
2745 | ||
846b4687 RV |
2746 | /** |
2747 | * \brief Setup network interfaces | |
2748 | * @param octeon_dev octeon device | |
2749 | * | |
2750 | * Called during init time for each device. It assumes the NIC | |
2751 | * is already up and running. The link information for each | |
2752 | * interface is passed in link_info. | |
2753 | */ | |
2754 | static int setup_nic_devices(struct octeon_device *octeon_dev) | |
2755 | { | |
2756 | int retval, num_iqueues, num_oqueues; | |
2757 | struct liquidio_if_cfg_context *ctx; | |
2758 | u32 resp_size, ctx_size, data_size; | |
2759 | struct liquidio_if_cfg_resp *resp; | |
2760 | struct octeon_soft_command *sc; | |
2761 | union oct_nic_if_cfg if_cfg; | |
2762 | struct octdev_props *props; | |
2763 | struct net_device *netdev; | |
2764 | struct lio_version *vdata; | |
2765 | struct lio *lio = NULL; | |
2766 | u8 mac[ETH_ALEN], i, j; | |
2767 | u32 ifidx_or_pfnum; | |
2768 | ||
2769 | ifidx_or_pfnum = octeon_dev->pf_num; | |
2770 | ||
3cd25e48 RV |
2771 | /* This is to handle link status changes */ |
2772 | octeon_register_dispatch_fn(octeon_dev, OPCODE_NIC, OPCODE_NIC_INFO, | |
2773 | lio_nic_info, octeon_dev); | |
2774 | ||
9bdca5c6 RV |
2775 | /* REQTYPE_RESP_NET and REQTYPE_SOFT_COMMAND do not have free functions. |
2776 | * They are handled directly. | |
2777 | */ | |
2778 | octeon_register_reqtype_free_fn(octeon_dev, REQTYPE_NORESP_NET, | |
2779 | free_netbuf); | |
2780 | ||
2781 | octeon_register_reqtype_free_fn(octeon_dev, REQTYPE_NORESP_NET_SG, | |
2782 | free_netsgbuf); | |
2783 | ||
2784 | octeon_register_reqtype_free_fn(octeon_dev, REQTYPE_RESP_NET_SG, | |
2785 | free_netsgbuf_with_resp); | |
2786 | ||
846b4687 RV |
2787 | for (i = 0; i < octeon_dev->ifcount; i++) { |
2788 | resp_size = sizeof(struct liquidio_if_cfg_resp); | |
2789 | ctx_size = sizeof(struct liquidio_if_cfg_context); | |
2790 | data_size = sizeof(struct lio_version); | |
2791 | sc = (struct octeon_soft_command *) | |
2792 | octeon_alloc_soft_command(octeon_dev, data_size, | |
2793 | resp_size, ctx_size); | |
2794 | resp = (struct liquidio_if_cfg_resp *)sc->virtrptr; | |
2795 | ctx = (struct liquidio_if_cfg_context *)sc->ctxptr; | |
2796 | vdata = (struct lio_version *)sc->virtdptr; | |
2797 | ||
2798 | *((u64 *)vdata) = 0; | |
2799 | vdata->major = cpu_to_be16(LIQUIDIO_BASE_MAJOR_VERSION); | |
2800 | vdata->minor = cpu_to_be16(LIQUIDIO_BASE_MINOR_VERSION); | |
2801 | vdata->micro = cpu_to_be16(LIQUIDIO_BASE_MICRO_VERSION); | |
2802 | ||
2803 | WRITE_ONCE(ctx->cond, 0); | |
2804 | ctx->octeon_id = lio_get_device_id(octeon_dev); | |
2805 | init_waitqueue_head(&ctx->wc); | |
2806 | ||
2807 | if_cfg.u64 = 0; | |
2808 | ||
2809 | if_cfg.s.num_iqueues = octeon_dev->sriov_info.rings_per_vf; | |
2810 | if_cfg.s.num_oqueues = octeon_dev->sriov_info.rings_per_vf; | |
2811 | if_cfg.s.base_queue = 0; | |
2812 | ||
2813 | sc->iq_no = 0; | |
2814 | ||
2815 | octeon_prepare_soft_command(octeon_dev, sc, OPCODE_NIC, | |
2816 | OPCODE_NIC_IF_CFG, 0, if_cfg.u64, | |
2817 | 0); | |
2818 | ||
2819 | sc->callback = if_cfg_callback; | |
2820 | sc->callback_arg = sc; | |
2821 | sc->wait_time = 5000; | |
2822 | ||
2823 | retval = octeon_send_soft_command(octeon_dev, sc); | |
2824 | if (retval == IQ_SEND_FAILED) { | |
2825 | dev_err(&octeon_dev->pci_dev->dev, | |
2826 | "iq/oq config failed status: %x\n", retval); | |
2827 | /* Soft instr is freed by driver in case of failure. */ | |
2828 | goto setup_nic_dev_fail; | |
2829 | } | |
2830 | ||
2831 | /* Sleep on a wait queue till the cond flag indicates that the | |
2832 | * response arrived or timed-out. | |
2833 | */ | |
2834 | if (sleep_cond(&ctx->wc, &ctx->cond) == -EINTR) { | |
2835 | dev_err(&octeon_dev->pci_dev->dev, "Wait interrupted\n"); | |
2836 | goto setup_nic_wait_intr; | |
2837 | } | |
2838 | ||
2839 | retval = resp->status; | |
2840 | if (retval) { | |
2841 | dev_err(&octeon_dev->pci_dev->dev, "iq/oq config failed\n"); | |
2842 | goto setup_nic_dev_fail; | |
2843 | } | |
2844 | ||
2845 | octeon_swap_8B_data((u64 *)(&resp->cfg_info), | |
2846 | (sizeof(struct liquidio_if_cfg_info)) >> 3); | |
2847 | ||
2848 | num_iqueues = hweight64(resp->cfg_info.iqmask); | |
2849 | num_oqueues = hweight64(resp->cfg_info.oqmask); | |
2850 | ||
2851 | if (!(num_iqueues) || !(num_oqueues)) { | |
2852 | dev_err(&octeon_dev->pci_dev->dev, | |
2853 | "Got bad iqueues (%016llx) or oqueues (%016llx) from firmware.\n", | |
2854 | resp->cfg_info.iqmask, resp->cfg_info.oqmask); | |
2855 | goto setup_nic_dev_fail; | |
2856 | } | |
2857 | dev_dbg(&octeon_dev->pci_dev->dev, | |
2858 | "interface %d, iqmask %016llx, oqmask %016llx, numiqueues %d, numoqueues %d\n", | |
2859 | i, resp->cfg_info.iqmask, resp->cfg_info.oqmask, | |
2860 | num_iqueues, num_oqueues); | |
2861 | ||
2862 | netdev = alloc_etherdev_mq(LIO_SIZE, num_iqueues); | |
2863 | ||
2864 | if (!netdev) { | |
2865 | dev_err(&octeon_dev->pci_dev->dev, "Device allocation failed\n"); | |
2866 | goto setup_nic_dev_fail; | |
2867 | } | |
2868 | ||
2869 | SET_NETDEV_DEV(netdev, &octeon_dev->pci_dev->dev); | |
2870 | ||
2871 | /* Associate the routines that will handle different | |
2872 | * netdev tasks. | |
2873 | */ | |
2874 | netdev->netdev_ops = &lionetdevops; | |
2875 | ||
2876 | lio = GET_LIO(netdev); | |
2877 | ||
2878 | memset(lio, 0, sizeof(struct lio)); | |
2879 | ||
2880 | lio->ifidx = ifidx_or_pfnum; | |
2881 | ||
2882 | props = &octeon_dev->props[i]; | |
2883 | props->gmxport = resp->cfg_info.linfo.gmxport; | |
2884 | props->netdev = netdev; | |
2885 | ||
2886 | lio->linfo.num_rxpciq = num_oqueues; | |
2887 | lio->linfo.num_txpciq = num_iqueues; | |
2888 | ||
2889 | for (j = 0; j < num_oqueues; j++) { | |
2890 | lio->linfo.rxpciq[j].u64 = | |
2891 | resp->cfg_info.linfo.rxpciq[j].u64; | |
2892 | } | |
2893 | for (j = 0; j < num_iqueues; j++) { | |
2894 | lio->linfo.txpciq[j].u64 = | |
2895 | resp->cfg_info.linfo.txpciq[j].u64; | |
2896 | } | |
2897 | ||
2898 | lio->linfo.hw_addr = resp->cfg_info.linfo.hw_addr; | |
2899 | lio->linfo.gmxport = resp->cfg_info.linfo.gmxport; | |
2900 | lio->linfo.link.u64 = resp->cfg_info.linfo.link.u64; | |
2901 | lio->linfo.macaddr_is_admin_asgnd = | |
2902 | resp->cfg_info.linfo.macaddr_is_admin_asgnd; | |
2903 | ||
2904 | lio->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE); | |
2905 | ||
2906 | lio->dev_capability = NETIF_F_HIGHDMA | |
2907 | | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | |
2908 | | NETIF_F_SG | NETIF_F_RXCSUM | |
2909 | | NETIF_F_TSO | NETIF_F_TSO6 | |
2910 | | NETIF_F_GRO | |
2911 | | NETIF_F_LRO; | |
2912 | netif_set_gso_max_size(netdev, OCTNIC_GSO_MAX_SIZE); | |
2913 | ||
c05ebcc8 RV |
2914 | /* Copy of transmit encapsulation capabilities: |
2915 | * TSO, TSO6, Checksums for this device | |
2916 | */ | |
2917 | lio->enc_dev_capability = NETIF_F_IP_CSUM | |
2918 | | NETIF_F_IPV6_CSUM | |
2919 | | NETIF_F_GSO_UDP_TUNNEL | |
2920 | | NETIF_F_HW_CSUM | NETIF_F_SG | |
2921 | | NETIF_F_RXCSUM | |
2922 | | NETIF_F_TSO | NETIF_F_TSO6 | |
2923 | | NETIF_F_LRO; | |
2924 | ||
2925 | netdev->hw_enc_features = | |
2926 | (lio->enc_dev_capability & ~NETIF_F_LRO); | |
2135f9b1 RV |
2927 | netdev->vlan_features = lio->dev_capability; |
2928 | /* Add any unchangeable hw features */ | |
2929 | lio->dev_capability |= NETIF_F_HW_VLAN_CTAG_FILTER | | |
2930 | NETIF_F_HW_VLAN_CTAG_RX | | |
2931 | NETIF_F_HW_VLAN_CTAG_TX; | |
2932 | ||
846b4687 RV |
2933 | netdev->features = (lio->dev_capability & ~NETIF_F_LRO); |
2934 | ||
2935 | netdev->hw_features = lio->dev_capability; | |
2936 | ||
50f7f94b RV |
2937 | /* MTU range: 68 - 16000 */ |
2938 | netdev->min_mtu = LIO_MIN_MTU_SIZE; | |
2939 | netdev->max_mtu = LIO_MAX_MTU_SIZE; | |
2940 | ||
846b4687 RV |
2941 | /* Point to the properties for octeon device to which this |
2942 | * interface belongs. | |
2943 | */ | |
2944 | lio->oct_dev = octeon_dev; | |
2945 | lio->octprops = props; | |
2946 | lio->netdev = netdev; | |
2947 | ||
2948 | dev_dbg(&octeon_dev->pci_dev->dev, | |
2949 | "if%d gmx: %d hw_addr: 0x%llx\n", i, | |
2950 | lio->linfo.gmxport, CVM_CAST64(lio->linfo.hw_addr)); | |
2951 | ||
2952 | /* 64-bit swap required on LE machines */ | |
2953 | octeon_swap_8B_data(&lio->linfo.hw_addr, 1); | |
2954 | for (j = 0; j < ETH_ALEN; j++) | |
2955 | mac[j] = *((u8 *)(((u8 *)&lio->linfo.hw_addr) + 2 + j)); | |
2956 | ||
2957 | /* Copy MAC Address to OS network device structure */ | |
2958 | ether_addr_copy(netdev->dev_addr, mac); | |
2959 | ||
9981328a RV |
2960 | if (setup_io_queues(octeon_dev, i)) { |
2961 | dev_err(&octeon_dev->pci_dev->dev, "I/O queues creation failed\n"); | |
2962 | goto setup_nic_dev_fail; | |
2963 | } | |
2964 | ||
9217c3cf RV |
2965 | ifstate_set(lio, LIO_IFSTATE_DROQ_OPS); |
2966 | ||
9981328a RV |
2967 | /* For VFs, enable Octeon device interrupts here, |
2968 | * as this is contingent upon IO queue setup | |
2969 | */ | |
2970 | octeon_dev->fn_list.enable_interrupt(octeon_dev, | |
2971 | OCTEON_ALL_INTR); | |
2972 | ||
2973 | /* By default all interfaces on a single Octeon uses the same | |
2974 | * tx and rx queues | |
2975 | */ | |
2976 | lio->txq = lio->linfo.txpciq[0].s.q_no; | |
9217c3cf | 2977 | lio->rxq = lio->linfo.rxpciq[0].s.q_no; |
9981328a RV |
2978 | |
2979 | lio->tx_qsize = octeon_get_tx_qsize(octeon_dev, lio->txq); | |
9217c3cf | 2980 | lio->rx_qsize = octeon_get_rx_qsize(octeon_dev, lio->rxq); |
9981328a | 2981 | |
beea50a5 RV |
2982 | if (setup_glists(lio, num_iqueues)) { |
2983 | dev_err(&octeon_dev->pci_dev->dev, | |
2984 | "Gather list allocation failed\n"); | |
2985 | goto setup_nic_dev_fail; | |
2986 | } | |
2987 | ||
d8ab848c RV |
2988 | /* Register ethtool support */ |
2989 | liquidio_set_ethtool_ops(netdev); | |
2990 | if (lio->oct_dev->chip_id == OCTEON_CN23XX_VF_VID) | |
2991 | octeon_dev->priv_flags = OCT_PRIV_FLAG_DEFAULT; | |
2992 | else | |
2993 | octeon_dev->priv_flags = 0x0; | |
2994 | ||
846b4687 RV |
2995 | if (netdev->features & NETIF_F_LRO) |
2996 | liquidio_set_feature(netdev, OCTNET_CMD_LRO_ENABLE, | |
2997 | OCTNIC_LROIPV4 | OCTNIC_LROIPV6); | |
2998 | ||
2999 | if ((debug != -1) && (debug & NETIF_MSG_HW)) | |
3000 | liquidio_set_feature(netdev, OCTNET_CMD_VERBOSE_ENABLE, | |
3001 | 0); | |
3002 | ||
3cd25e48 RV |
3003 | if (setup_link_status_change_wq(netdev)) |
3004 | goto setup_nic_dev_fail; | |
3005 | ||
846b4687 RV |
3006 | /* Register the network device with the OS */ |
3007 | if (register_netdev(netdev)) { | |
3008 | dev_err(&octeon_dev->pci_dev->dev, "Device registration failed\n"); | |
3009 | goto setup_nic_dev_fail; | |
3010 | } | |
3011 | ||
3012 | dev_dbg(&octeon_dev->pci_dev->dev, | |
3013 | "Setup NIC ifidx:%d mac:%02x%02x%02x%02x%02x%02x\n", | |
3014 | i, mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); | |
3015 | netif_carrier_off(netdev); | |
3016 | lio->link_changes++; | |
3017 | ||
3018 | ifstate_set(lio, LIO_IFSTATE_REGISTERED); | |
3019 | ||
3020 | /* Sending command to firmware to enable Rx checksum offload | |
3021 | * by default at the time of setup of Liquidio driver for | |
3022 | * this device | |
3023 | */ | |
3024 | liquidio_set_rxcsum_command(netdev, OCTNET_CMD_TNL_RX_CSUM_CTL, | |
3025 | OCTNET_CMD_RXCSUM_ENABLE); | |
3026 | liquidio_set_feature(netdev, OCTNET_CMD_TNL_TX_CSUM_CTL, | |
3027 | OCTNET_CMD_TXCSUM_ENABLE); | |
3028 | ||
3029 | dev_dbg(&octeon_dev->pci_dev->dev, | |
3030 | "NIC ifidx:%d Setup successful\n", i); | |
3031 | ||
3032 | octeon_free_soft_command(octeon_dev, sc); | |
3033 | } | |
3034 | ||
3035 | return 0; | |
3036 | ||
3037 | setup_nic_dev_fail: | |
3038 | ||
3039 | octeon_free_soft_command(octeon_dev, sc); | |
3040 | ||
3041 | setup_nic_wait_intr: | |
3042 | ||
3043 | while (i--) { | |
3044 | dev_err(&octeon_dev->pci_dev->dev, | |
3045 | "NIC ifidx:%d Setup failed\n", i); | |
3046 | liquidio_destroy_nic_device(octeon_dev, i); | |
3047 | } | |
3048 | return -ENODEV; | |
3049 | } | |
3050 | ||
3051 | /** | |
3052 | * \brief initialize the NIC | |
3053 | * @param oct octeon device | |
3054 | * | |
3055 | * This initialization routine is called once the Octeon device application is | |
3056 | * up and running | |
3057 | */ | |
3058 | static int liquidio_init_nic_module(struct octeon_device *oct) | |
3059 | { | |
d8ab848c | 3060 | struct oct_intrmod_cfg *intrmod_cfg; |
846b4687 RV |
3061 | int num_nic_ports = 1; |
3062 | int i, retval = 0; | |
3063 | ||
3064 | dev_dbg(&oct->pci_dev->dev, "Initializing network interfaces\n"); | |
3065 | ||
3066 | /* only default iq and oq were initialized | |
3067 | * initialize the rest as well run port_config command for each port | |
3068 | */ | |
3069 | oct->ifcount = num_nic_ports; | |
3070 | memset(oct->props, 0, | |
3071 | sizeof(struct octdev_props) * num_nic_ports); | |
3072 | ||
3073 | for (i = 0; i < MAX_OCTEON_LINKS; i++) | |
3074 | oct->props[i].gmxport = -1; | |
3075 | ||
3076 | retval = setup_nic_devices(oct); | |
3077 | if (retval) { | |
3078 | dev_err(&oct->pci_dev->dev, "Setup NIC devices failed\n"); | |
3079 | goto octnet_init_failure; | |
3080 | } | |
3081 | ||
d8ab848c RV |
3082 | /* Initialize interrupt moderation params */ |
3083 | intrmod_cfg = &((struct octeon_device *)oct)->intrmod; | |
3084 | intrmod_cfg->rx_enable = 1; | |
3085 | intrmod_cfg->check_intrvl = LIO_INTRMOD_CHECK_INTERVAL; | |
3086 | intrmod_cfg->maxpkt_ratethr = LIO_INTRMOD_MAXPKT_RATETHR; | |
3087 | intrmod_cfg->minpkt_ratethr = LIO_INTRMOD_MINPKT_RATETHR; | |
3088 | intrmod_cfg->rx_maxcnt_trigger = LIO_INTRMOD_RXMAXCNT_TRIGGER; | |
3089 | intrmod_cfg->rx_maxtmr_trigger = LIO_INTRMOD_RXMAXTMR_TRIGGER; | |
3090 | intrmod_cfg->rx_mintmr_trigger = LIO_INTRMOD_RXMINTMR_TRIGGER; | |
3091 | intrmod_cfg->rx_mincnt_trigger = LIO_INTRMOD_RXMINCNT_TRIGGER; | |
3092 | intrmod_cfg->tx_enable = 1; | |
3093 | intrmod_cfg->tx_maxcnt_trigger = LIO_INTRMOD_TXMAXCNT_TRIGGER; | |
3094 | intrmod_cfg->tx_mincnt_trigger = LIO_INTRMOD_TXMINCNT_TRIGGER; | |
3095 | intrmod_cfg->rx_frames = CFG_GET_OQ_INTR_PKT(octeon_get_conf(oct)); | |
3096 | intrmod_cfg->rx_usecs = CFG_GET_OQ_INTR_TIME(octeon_get_conf(oct)); | |
3097 | intrmod_cfg->tx_frames = CFG_GET_IQ_INTR_PKT(octeon_get_conf(oct)); | |
3098 | dev_dbg(&oct->pci_dev->dev, "Network interfaces ready\n"); | |
3099 | ||
3100 | return retval; | |
3101 | ||
846b4687 RV |
3102 | octnet_init_failure: |
3103 | ||
3104 | oct->ifcount = 0; | |
3105 | ||
3106 | return retval; | |
3107 | } | |
3108 | ||
69c69da3 RV |
3109 | /** |
3110 | * \brief Device initialization for each Octeon device that is probed | |
3111 | * @param octeon_dev octeon device | |
3112 | */ | |
3113 | static int octeon_device_init(struct octeon_device *oct) | |
3114 | { | |
3115 | u32 rev_id; | |
b3c35973 | 3116 | int j; |
69c69da3 RV |
3117 | |
3118 | atomic_set(&oct->status, OCT_DEV_BEGIN_STATE); | |
3119 | ||
3120 | /* Enable access to the octeon device and make its DMA capability | |
3121 | * known to the OS. | |
3122 | */ | |
3123 | if (octeon_pci_os_setup(oct)) | |
3124 | return 1; | |
3125 | atomic_set(&oct->status, OCT_DEV_PCI_ENABLE_DONE); | |
3126 | ||
3127 | oct->chip_id = OCTEON_CN23XX_VF_VID; | |
3128 | pci_read_config_dword(oct->pci_dev, 8, &rev_id); | |
3129 | oct->rev_id = rev_id & 0xff; | |
3130 | ||
3131 | if (cn23xx_setup_octeon_vf_device(oct)) | |
3132 | return 1; | |
3133 | ||
3134 | atomic_set(&oct->status, OCT_DEV_PCI_MAP_DONE); | |
3135 | ||
846b4687 RV |
3136 | oct->app_mode = CVM_DRV_NIC_APP; |
3137 | ||
9003baf0 RV |
3138 | /* Initialize the dispatch mechanism used to push packets arriving on |
3139 | * Octeon Output queues. | |
3140 | */ | |
3141 | if (octeon_init_dispatch_list(oct)) | |
3142 | return 1; | |
3143 | ||
3144 | atomic_set(&oct->status, OCT_DEV_DISPATCH_INIT_DONE); | |
3145 | ||
c865cdf1 RV |
3146 | if (octeon_set_io_queues_off(oct)) { |
3147 | dev_err(&oct->pci_dev->dev, "setting io queues off failed\n"); | |
3148 | return 1; | |
3149 | } | |
3150 | ||
da15c78b RV |
3151 | if (oct->fn_list.setup_device_regs(oct)) { |
3152 | dev_err(&oct->pci_dev->dev, "device registers configuration failed\n"); | |
3153 | return 1; | |
3154 | } | |
3155 | ||
9003baf0 RV |
3156 | /* Initialize soft command buffer pool */ |
3157 | if (octeon_setup_sc_buffer_pool(oct)) { | |
3158 | dev_err(&oct->pci_dev->dev, "sc buffer pool allocation failed\n"); | |
3159 | return 1; | |
3160 | } | |
3161 | atomic_set(&oct->status, OCT_DEV_SC_BUFF_POOL_INIT_DONE); | |
3162 | ||
3163 | /* Setup the data structures that manage this Octeon's Input queues. */ | |
3164 | if (octeon_setup_instr_queues(oct)) { | |
3165 | dev_err(&oct->pci_dev->dev, "instruction queue initialization failed\n"); | |
3166 | return 1; | |
3167 | } | |
3168 | atomic_set(&oct->status, OCT_DEV_INSTR_QUEUE_INIT_DONE); | |
3169 | ||
3170 | /* Initialize lists to manage the requests of different types that | |
3171 | * arrive from user & kernel applications for this octeon device. | |
3172 | */ | |
3173 | if (octeon_setup_response_list(oct)) { | |
3174 | dev_err(&oct->pci_dev->dev, "Response list allocation failed\n"); | |
3175 | return 1; | |
3176 | } | |
3177 | atomic_set(&oct->status, OCT_DEV_RESP_LIST_INIT_DONE); | |
3178 | ||
3179 | if (octeon_setup_output_queues(oct)) { | |
3180 | dev_err(&oct->pci_dev->dev, "Output queue initialization failed\n"); | |
3181 | return 1; | |
3182 | } | |
3183 | atomic_set(&oct->status, OCT_DEV_DROQ_INIT_DONE); | |
3184 | ||
f7cdd64b RV |
3185 | if (oct->fn_list.setup_mbox(oct)) { |
3186 | dev_err(&oct->pci_dev->dev, "Mailbox setup failed\n"); | |
3187 | return 1; | |
3188 | } | |
3189 | atomic_set(&oct->status, OCT_DEV_MBOX_SETUP_DONE); | |
3190 | ||
cf39faf5 RV |
3191 | if (octeon_allocate_ioq_vector(oct)) { |
3192 | dev_err(&oct->pci_dev->dev, "ioq vector allocation failed\n"); | |
3193 | return 1; | |
3194 | } | |
3195 | atomic_set(&oct->status, OCT_DEV_MSIX_ALLOC_VECTOR_DONE); | |
3196 | ||
3197 | dev_info(&oct->pci_dev->dev, "OCTEON_CN23XX VF Version: %s, %d ioqs\n", | |
3198 | LIQUIDIO_VERSION, oct->sriov_info.rings_per_vf); | |
3199 | ||
3200 | /* Setup the interrupt handler and record the INT SUM register address*/ | |
3201 | if (octeon_setup_interrupt(oct)) | |
3202 | return 1; | |
3203 | ||
3204 | if (cn23xx_octeon_pfvf_handshake(oct)) | |
3205 | return 1; | |
3206 | ||
3207 | /* Enable Octeon device interrupts */ | |
3208 | oct->fn_list.enable_interrupt(oct, OCTEON_ALL_INTR); | |
3209 | ||
3210 | atomic_set(&oct->status, OCT_DEV_INTR_SET_DONE); | |
3211 | ||
b3c35973 RV |
3212 | /* Enable the input and output queues for this Octeon device */ |
3213 | if (oct->fn_list.enable_io_queues(oct)) { | |
3214 | dev_err(&oct->pci_dev->dev, "enabling io queues failed\n"); | |
3215 | return 1; | |
3216 | } | |
3217 | ||
3218 | atomic_set(&oct->status, OCT_DEV_IO_QUEUES_DONE); | |
3219 | ||
3220 | atomic_set(&oct->status, OCT_DEV_HOST_OK); | |
3221 | ||
3222 | /* Send Credit for Octeon Output queues. Credits are always sent after | |
3223 | * the output queue is enabled. | |
3224 | */ | |
3225 | for (j = 0; j < oct->num_oqs; j++) | |
3226 | writel(oct->droq[j]->max_count, oct->droq[j]->pkts_credit_reg); | |
3227 | ||
3228 | /* Packets can start arriving on the output queues from this point. */ | |
3229 | ||
3230 | atomic_set(&oct->status, OCT_DEV_CORE_OK); | |
3231 | ||
3232 | atomic_set(&oct->status, OCT_DEV_RUNNING); | |
3233 | ||
846b4687 RV |
3234 | if (liquidio_init_nic_module(oct)) |
3235 | return 1; | |
3236 | ||
69c69da3 RV |
3237 | return 0; |
3238 | } | |
3239 | ||
111fc64a RV |
3240 | static int __init liquidio_vf_init(void) |
3241 | { | |
3242 | octeon_init_device_list(0); | |
3243 | return pci_register_driver(&liquidio_vf_pci_driver); | |
3244 | } | |
3245 | ||
3246 | static void __exit liquidio_vf_exit(void) | |
3247 | { | |
3248 | pci_unregister_driver(&liquidio_vf_pci_driver); | |
3249 | ||
3250 | pr_info("LiquidIO_VF network module is now unloaded\n"); | |
3251 | } | |
3252 | ||
3253 | module_init(liquidio_vf_init); | |
3254 | module_exit(liquidio_vf_exit); |