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[mirror_ubuntu-focal-kernel.git] / drivers / net / ethernet / cisco / enic / enic_main.c
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01f2e4ea 1/*
29046f9b 2 * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
01f2e4ea
SF		 3 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
4 *
5 * This program is free software; you may redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
10 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
11 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
12 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
13 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
14 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
15 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
16 * SOFTWARE.
17 *
18 */
19
20#include <linux/module.h>
21#include <linux/kernel.h>
22#include <linux/string.h>
23#include <linux/errno.h>
24#include <linux/types.h>
25#include <linux/init.h>
a6b7a407 26#include <linux/interrupt.h>
01f2e4ea
SF		 27#include <linux/workqueue.h>
28#include <linux/pci.h>
29#include <linux/netdevice.h>
30#include <linux/etherdevice.h>
01789349 31#include <linux/if.h>
01f2e4ea
SF		 32#include <linux/if_ether.h>
33#include <linux/if_vlan.h>
34#include <linux/ethtool.h>
35#include <linux/in.h>
36#include <linux/ip.h>
37#include <linux/ipv6.h>
38#include <linux/tcp.h>
29046f9b 39#include <linux/rtnetlink.h>
70c71606 40#include <linux/prefetch.h>
b7c6bfb7 41#include <net/ip6_checksum.h>
01f2e4ea
SF		 42
43#include "cq_enet_desc.h"
44#include "vnic_dev.h"
45#include "vnic_intr.h"
46#include "vnic_stats.h"
f8bd9091 47#include "vnic_vic.h"
01f2e4ea
SF		 48#include "enic_res.h"
49#include "enic.h"
51987461 50#include "enic_dev.h"
b3abfbd2 51#include "enic_pp.h"
01f2e4ea
SF		 52
53#define ENIC_NOTIFY_TIMER_PERIOD (2 * HZ)
ea0d7d91
SF		 54#define WQ_ENET_MAX_DESC_LEN (1 << WQ_ENET_LEN_BITS)
55#define MAX_TSO (1 << 16)
56#define ENIC_DESC_MAX_SPLITS (MAX_TSO / WQ_ENET_MAX_DESC_LEN + 1)
57
58#define PCI_DEVICE_ID_CISCO_VIC_ENET 0x0043 /* ethernet vnic */
f8bd9091 59#define PCI_DEVICE_ID_CISCO_VIC_ENET_DYN 0x0044 /* enet dynamic vnic */
01f2e4ea
SF		 60
61/* Supported devices */
a3aa1884 62static DEFINE_PCI_DEVICE_TABLE(enic_id_table) = {
ea0d7d91 63 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET) },
f8bd9091 64 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_DYN) },
01f2e4ea
SF		 65 { 0, } /* end of table */
66};
67
68MODULE_DESCRIPTION(DRV_DESCRIPTION);
69MODULE_AUTHOR("Scott Feldman <scofeldm@cisco.com>");
70MODULE_LICENSE("GPL");
71MODULE_VERSION(DRV_VERSION);
72MODULE_DEVICE_TABLE(pci, enic_id_table);
73
74struct enic_stat {
75 char name[ETH_GSTRING_LEN];
76 unsigned int offset;
77};
78
79#define ENIC_TX_STAT(stat) \
80 { .name = #stat, .offset = offsetof(struct vnic_tx_stats, stat) / 8 }
81#define ENIC_RX_STAT(stat) \
82 { .name = #stat, .offset = offsetof(struct vnic_rx_stats, stat) / 8 }
83
84static const struct enic_stat enic_tx_stats[] = {
85 ENIC_TX_STAT(tx_frames_ok),
86 ENIC_TX_STAT(tx_unicast_frames_ok),
87 ENIC_TX_STAT(tx_multicast_frames_ok),
88 ENIC_TX_STAT(tx_broadcast_frames_ok),
89 ENIC_TX_STAT(tx_bytes_ok),
90 ENIC_TX_STAT(tx_unicast_bytes_ok),
91 ENIC_TX_STAT(tx_multicast_bytes_ok),
92 ENIC_TX_STAT(tx_broadcast_bytes_ok),
93 ENIC_TX_STAT(tx_drops),
94 ENIC_TX_STAT(tx_errors),
95 ENIC_TX_STAT(tx_tso),
96};
97
98static const struct enic_stat enic_rx_stats[] = {
99 ENIC_RX_STAT(rx_frames_ok),
100 ENIC_RX_STAT(rx_frames_total),
101 ENIC_RX_STAT(rx_unicast_frames_ok),
102 ENIC_RX_STAT(rx_multicast_frames_ok),
103 ENIC_RX_STAT(rx_broadcast_frames_ok),
104 ENIC_RX_STAT(rx_bytes_ok),
105 ENIC_RX_STAT(rx_unicast_bytes_ok),
106 ENIC_RX_STAT(rx_multicast_bytes_ok),
107 ENIC_RX_STAT(rx_broadcast_bytes_ok),
108 ENIC_RX_STAT(rx_drop),
109 ENIC_RX_STAT(rx_no_bufs),
110 ENIC_RX_STAT(rx_errors),
111 ENIC_RX_STAT(rx_rss),
112 ENIC_RX_STAT(rx_crc_errors),
113 ENIC_RX_STAT(rx_frames_64),
114 ENIC_RX_STAT(rx_frames_127),
115 ENIC_RX_STAT(rx_frames_255),
116 ENIC_RX_STAT(rx_frames_511),
117 ENIC_RX_STAT(rx_frames_1023),
118 ENIC_RX_STAT(rx_frames_1518),
119 ENIC_RX_STAT(rx_frames_to_max),
120};
121
122static const unsigned int enic_n_tx_stats = ARRAY_SIZE(enic_tx_stats);
123static const unsigned int enic_n_rx_stats = ARRAY_SIZE(enic_rx_stats);
124
3f192795 125int enic_is_dynamic(struct enic *enic)
f8bd9091
SF		 126{
127 return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_DYN;
128}
129
8749b427
RP		 130int enic_sriov_enabled(struct enic *enic)
131{
132 return (enic->priv_flags & ENIC_SRIOV_ENABLED) ? 1 : 0;
133}
134
889d13f5
RP		 135int enic_is_valid_vf(struct enic *enic, int vf)
136{
137#ifdef CONFIG_PCI_IOV
138 return vf >= 0 && vf < enic->num_vfs;
139#else
140 return 0;
141#endif
142}
143
717258ba
VK		 144static inline unsigned int enic_cq_rq(struct enic *enic, unsigned int rq)
145{
146 return rq;
147}
148
149static inline unsigned int enic_cq_wq(struct enic *enic, unsigned int wq)
150{
151 return enic->rq_count + wq;
152}
153
154static inline unsigned int enic_legacy_io_intr(void)
155{
156 return 0;
157}
158
159static inline unsigned int enic_legacy_err_intr(void)
160{
161 return 1;
162}
163
164static inline unsigned int enic_legacy_notify_intr(void)
165{
166 return 2;
167}
168
169static inline unsigned int enic_msix_rq_intr(struct enic *enic, unsigned int rq)
170{
7d260ec2 171 return enic->cq[enic_cq_rq(enic, rq)].interrupt_offset;
717258ba
VK		 172}
173
174static inline unsigned int enic_msix_wq_intr(struct enic *enic, unsigned int wq)
175{
7d260ec2 176 return enic->cq[enic_cq_wq(enic, wq)].interrupt_offset;
717258ba
VK		 177}
178
179static inline unsigned int enic_msix_err_intr(struct enic *enic)
180{
181 return enic->rq_count + enic->wq_count;
182}
183
184static inline unsigned int enic_msix_notify_intr(struct enic *enic)
185{
186 return enic->rq_count + enic->wq_count + 1;
187}
188
01f2e4ea
SF		 189static int enic_get_settings(struct net_device *netdev,
190 struct ethtool_cmd *ecmd)
191{
192 struct enic *enic = netdev_priv(netdev);
193
194 ecmd->supported = (SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE);
195 ecmd->advertising = (ADVERTISED_10000baseT_Full | ADVERTISED_FIBRE);
196 ecmd->port = PORT_FIBRE;
197 ecmd->transceiver = XCVR_EXTERNAL;
198
199 if (netif_carrier_ok(netdev)) {
70739497 200 ethtool_cmd_speed_set(ecmd, vnic_dev_port_speed(enic->vdev));
01f2e4ea
SF		 201 ecmd->duplex = DUPLEX_FULL;
202 } else {
70739497 203 ethtool_cmd_speed_set(ecmd, -1);
01f2e4ea
SF		 204 ecmd->duplex = -1;
205 }
206
207 ecmd->autoneg = AUTONEG_DISABLE;
208
209 return 0;
210}
211
212static void enic_get_drvinfo(struct net_device *netdev,
213 struct ethtool_drvinfo *drvinfo)
214{
215 struct enic *enic = netdev_priv(netdev);
216 struct vnic_devcmd_fw_info *fw_info;
217
383ab92f 218 enic_dev_fw_info(enic, &fw_info);
01f2e4ea 219
612a94d6
RJ		 220 strlcpy(drvinfo->driver, DRV_NAME, sizeof(drvinfo->driver));
221 strlcpy(drvinfo->version, DRV_VERSION, sizeof(drvinfo->version));
222 strlcpy(drvinfo->fw_version, fw_info->fw_version,
01f2e4ea 223 sizeof(drvinfo->fw_version));
612a94d6 224 strlcpy(drvinfo->bus_info, pci_name(enic->pdev),
01f2e4ea
SF		 225 sizeof(drvinfo->bus_info));
226}
227
228static void enic_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
229{
230 unsigned int i;
231
232 switch (stringset) {
233 case ETH_SS_STATS:
234 for (i = 0; i < enic_n_tx_stats; i++) {
235 memcpy(data, enic_tx_stats[i].name, ETH_GSTRING_LEN);
236 data += ETH_GSTRING_LEN;
237 }
238 for (i = 0; i < enic_n_rx_stats; i++) {
239 memcpy(data, enic_rx_stats[i].name, ETH_GSTRING_LEN);
240 data += ETH_GSTRING_LEN;
241 }
242 break;
243 }
244}
245
25f0a061 246static int enic_get_sset_count(struct net_device *netdev, int sset)
01f2e4ea 247{
25f0a061
SF		 248 switch (sset) {
249 case ETH_SS_STATS:
250 return enic_n_tx_stats + enic_n_rx_stats;
251 default:
252 return -EOPNOTSUPP;
253 }
01f2e4ea
SF		 254}
255
256static void enic_get_ethtool_stats(struct net_device *netdev,
257 struct ethtool_stats *stats, u64 *data)
258{
259 struct enic *enic = netdev_priv(netdev);
260 struct vnic_stats *vstats;
261 unsigned int i;
262
383ab92f 263 enic_dev_stats_dump(enic, &vstats);
01f2e4ea
SF		 264
265 for (i = 0; i < enic_n_tx_stats; i++)
266 *(data++) = ((u64 *)&vstats->tx)[enic_tx_stats[i].offset];
267 for (i = 0; i < enic_n_rx_stats; i++)
268 *(data++) = ((u64 *)&vstats->rx)[enic_rx_stats[i].offset];
269}
270
01f2e4ea
SF		 271static u32 enic_get_msglevel(struct net_device *netdev)
272{
273 struct enic *enic = netdev_priv(netdev);
274 return enic->msg_enable;
275}
276
277static void enic_set_msglevel(struct net_device *netdev, u32 value)
278{
279 struct enic *enic = netdev_priv(netdev);
280 enic->msg_enable = value;
281}
282
7c844599
SF		 283static int enic_get_coalesce(struct net_device *netdev,
284 struct ethtool_coalesce *ecmd)
285{
286 struct enic *enic = netdev_priv(netdev);
287
288 ecmd->tx_coalesce_usecs = enic->tx_coalesce_usecs;
289 ecmd->rx_coalesce_usecs = enic->rx_coalesce_usecs;
290
291 return 0;
292}
293
294static int enic_set_coalesce(struct net_device *netdev,
295 struct ethtool_coalesce *ecmd)
296{
297 struct enic *enic = netdev_priv(netdev);
298 u32 tx_coalesce_usecs;
299 u32 rx_coalesce_usecs;
717258ba 300 unsigned int i, intr;
7c844599 301
ea7ea65a
VK		 302 tx_coalesce_usecs = min_t(u32, ecmd->tx_coalesce_usecs,
303 vnic_dev_get_intr_coal_timer_max(enic->vdev));
304 rx_coalesce_usecs = min_t(u32, ecmd->rx_coalesce_usecs,
305 vnic_dev_get_intr_coal_timer_max(enic->vdev));
7c844599
SF		 306
307 switch (vnic_dev_get_intr_mode(enic->vdev)) {
308 case VNIC_DEV_INTR_MODE_INTX:
309 if (tx_coalesce_usecs != rx_coalesce_usecs)
310 return -EINVAL;
311
717258ba
VK		 312 intr = enic_legacy_io_intr();
313 vnic_intr_coalescing_timer_set(&enic->intr[intr],
ea7ea65a 314 tx_coalesce_usecs);
7c844599
SF		 315 break;
316 case VNIC_DEV_INTR_MODE_MSI:
317 if (tx_coalesce_usecs != rx_coalesce_usecs)
318 return -EINVAL;
319
320 vnic_intr_coalescing_timer_set(&enic->intr[0],
ea7ea65a 321 tx_coalesce_usecs);
7c844599
SF		 322 break;
323 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK		 324 for (i = 0; i < enic->wq_count; i++) {
325 intr = enic_msix_wq_intr(enic, i);
326 vnic_intr_coalescing_timer_set(&enic->intr[intr],
ea7ea65a 327 tx_coalesce_usecs);
717258ba
VK		 328 }
329
330 for (i = 0; i < enic->rq_count; i++) {
331 intr = enic_msix_rq_intr(enic, i);
332 vnic_intr_coalescing_timer_set(&enic->intr[intr],
ea7ea65a 333 rx_coalesce_usecs);
717258ba
VK		 334 }
335
7c844599
SF		 336 break;
337 default:
338 break;
339 }
340
341 enic->tx_coalesce_usecs = tx_coalesce_usecs;
342 enic->rx_coalesce_usecs = rx_coalesce_usecs;
343
344 return 0;
345}
346
0fc0b732 347static const struct ethtool_ops enic_ethtool_ops = {
01f2e4ea
SF		 348 .get_settings = enic_get_settings,
349 .get_drvinfo = enic_get_drvinfo,
350 .get_msglevel = enic_get_msglevel,
351 .set_msglevel = enic_set_msglevel,
352 .get_link = ethtool_op_get_link,
353 .get_strings = enic_get_strings,
25f0a061 354 .get_sset_count = enic_get_sset_count,
01f2e4ea 355 .get_ethtool_stats = enic_get_ethtool_stats,
7c844599
SF		 356 .get_coalesce = enic_get_coalesce,
357 .set_coalesce = enic_set_coalesce,
01f2e4ea
SF		 358};
359
360static void enic_free_wq_buf(struct vnic_wq *wq, struct vnic_wq_buf *buf)
361{
362 struct enic *enic = vnic_dev_priv(wq->vdev);
363
364 if (buf->sop)
365 pci_unmap_single(enic->pdev, buf->dma_addr,
366 buf->len, PCI_DMA_TODEVICE);
367 else
368 pci_unmap_page(enic->pdev, buf->dma_addr,
369 buf->len, PCI_DMA_TODEVICE);
370
371 if (buf->os_buf)
372 dev_kfree_skb_any(buf->os_buf);
373}
374
375static void enic_wq_free_buf(struct vnic_wq *wq,
376 struct cq_desc *cq_desc, struct vnic_wq_buf *buf, void *opaque)
377{
378 enic_free_wq_buf(wq, buf);
379}
380
381static int enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
382 u8 type, u16 q_number, u16 completed_index, void *opaque)
383{
384 struct enic *enic = vnic_dev_priv(vdev);
385
386 spin_lock(&enic->wq_lock[q_number]);
387
388 vnic_wq_service(&enic->wq[q_number], cq_desc,
389 completed_index, enic_wq_free_buf,
390 opaque);
391
392 if (netif_queue_stopped(enic->netdev) &&
ea0d7d91
SF		 393 vnic_wq_desc_avail(&enic->wq[q_number]) >=
394 (MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS))
01f2e4ea
SF		 395 netif_wake_queue(enic->netdev);
396
397 spin_unlock(&enic->wq_lock[q_number]);
398
399 return 0;
400}
401
402static void enic_log_q_error(struct enic *enic)
403{
404 unsigned int i;
405 u32 error_status;
406
407 for (i = 0; i < enic->wq_count; i++) {
408 error_status = vnic_wq_error_status(&enic->wq[i]);
409 if (error_status)
a7a79deb
VK		 410 netdev_err(enic->netdev, "WQ[%d] error_status %d\n",
411 i, error_status);
01f2e4ea
SF		 412 }
413
414 for (i = 0; i < enic->rq_count; i++) {
415 error_status = vnic_rq_error_status(&enic->rq[i]);
416 if (error_status)
a7a79deb
VK		 417 netdev_err(enic->netdev, "RQ[%d] error_status %d\n",
418 i, error_status);
01f2e4ea
SF		 419 }
420}
421
383ab92f 422static void enic_msglvl_check(struct enic *enic)
01f2e4ea 423{
383ab92f 424 u32 msg_enable = vnic_dev_msg_lvl(enic->vdev);
01f2e4ea 425
383ab92f 426 if (msg_enable != enic->msg_enable) {
a7a79deb
VK		 427 netdev_info(enic->netdev, "msg lvl changed from 0x%x to 0x%x\n",
428 enic->msg_enable, msg_enable);
383ab92f 429 enic->msg_enable = msg_enable;
01f2e4ea
SF		 430 }
431}
432
433static void enic_mtu_check(struct enic *enic)
434{
435 u32 mtu = vnic_dev_mtu(enic->vdev);
a7a79deb 436 struct net_device *netdev = enic->netdev;
01f2e4ea 437
491598a4 438 if (mtu && mtu != enic->port_mtu) {
7c844599 439 enic->port_mtu = mtu;
c97c894d
RP		 440 if (enic_is_dynamic(enic)) {
441 mtu = max_t(int, ENIC_MIN_MTU,
442 min_t(int, ENIC_MAX_MTU, mtu));
443 if (mtu != netdev->mtu)
444 schedule_work(&enic->change_mtu_work);
445 } else {
446 if (mtu < netdev->mtu)
447 netdev_warn(netdev,
448 "interface MTU (%d) set higher "
449 "than switch port MTU (%d)\n",
450 netdev->mtu, mtu);
451 }
01f2e4ea
SF		 452 }
453}
454
383ab92f 455static void enic_link_check(struct enic *enic)
01f2e4ea 456{
383ab92f
VK		 457 int link_status = vnic_dev_link_status(enic->vdev);
458 int carrier_ok = netif_carrier_ok(enic->netdev);
01f2e4ea 459
383ab92f 460 if (link_status && !carrier_ok) {
a7a79deb 461 netdev_info(enic->netdev, "Link UP\n");
383ab92f
VK		 462 netif_carrier_on(enic->netdev);
463 } else if (!link_status && carrier_ok) {
a7a79deb 464 netdev_info(enic->netdev, "Link DOWN\n");
383ab92f 465 netif_carrier_off(enic->netdev);
01f2e4ea
SF		 466 }
467}
468
469static void enic_notify_check(struct enic *enic)
470{
471 enic_msglvl_check(enic);
472 enic_mtu_check(enic);
473 enic_link_check(enic);
474}
475
476#define ENIC_TEST_INTR(pba, i) (pba & (1 << i))
477
478static irqreturn_t enic_isr_legacy(int irq, void *data)
479{
480 struct net_device *netdev = data;
481 struct enic *enic = netdev_priv(netdev);
717258ba
VK		 482 unsigned int io_intr = enic_legacy_io_intr();
483 unsigned int err_intr = enic_legacy_err_intr();
484 unsigned int notify_intr = enic_legacy_notify_intr();
01f2e4ea
SF		 485 u32 pba;
486
717258ba 487 vnic_intr_mask(&enic->intr[io_intr]);
01f2e4ea
SF		 488
489 pba = vnic_intr_legacy_pba(enic->legacy_pba);
490 if (!pba) {
717258ba 491 vnic_intr_unmask(&enic->intr[io_intr]);
01f2e4ea
SF		 492 return IRQ_NONE; /* not our interrupt */
493 }
494
717258ba
VK		 495 if (ENIC_TEST_INTR(pba, notify_intr)) {
496 vnic_intr_return_all_credits(&enic->intr[notify_intr]);
01f2e4ea 497 enic_notify_check(enic);
ed8af6b2 498 }
01f2e4ea 499
717258ba
VK		 500 if (ENIC_TEST_INTR(pba, err_intr)) {
501 vnic_intr_return_all_credits(&enic->intr[err_intr]);
01f2e4ea
SF		 502 enic_log_q_error(enic);
503 /* schedule recovery from WQ/RQ error */
504 schedule_work(&enic->reset);
505 return IRQ_HANDLED;
506 }
507
717258ba
VK		 508 if (ENIC_TEST_INTR(pba, io_intr)) {
509 if (napi_schedule_prep(&enic->napi[0]))
510 __napi_schedule(&enic->napi[0]);
01f2e4ea 511 } else {
717258ba 512 vnic_intr_unmask(&enic->intr[io_intr]);
01f2e4ea
SF		 513 }
514
515 return IRQ_HANDLED;
516}
517
518static irqreturn_t enic_isr_msi(int irq, void *data)
519{
520 struct enic *enic = data;
521
522 /* With MSI, there is no sharing of interrupts, so this is
523 * our interrupt and there is no need to ack it. The device
524 * is not providing per-vector masking, so the OS will not
525 * write to PCI config space to mask/unmask the interrupt.
526 * We're using mask_on_assertion for MSI, so the device
527 * automatically masks the interrupt when the interrupt is
528 * generated. Later, when exiting polling, the interrupt
529 * will be unmasked (see enic_poll).
530 *
531 * Also, the device uses the same PCIe Traffic Class (TC)
532 * for Memory Write data and MSI, so there are no ordering
533 * issues; the MSI will always arrive at the Root Complex
534 * _after_ corresponding Memory Writes (i.e. descriptor
535 * writes).
536 */
537
717258ba 538 napi_schedule(&enic->napi[0]);
01f2e4ea
SF		 539
540 return IRQ_HANDLED;
541}
542
543static irqreturn_t enic_isr_msix_rq(int irq, void *data)
544{
717258ba 545 struct napi_struct *napi = data;
01f2e4ea
SF		 546
547 /* schedule NAPI polling for RQ cleanup */
717258ba 548 napi_schedule(napi);
01f2e4ea
SF		 549
550 return IRQ_HANDLED;
551}
552
553static irqreturn_t enic_isr_msix_wq(int irq, void *data)
554{
555 struct enic *enic = data;
717258ba
VK		 556 unsigned int cq = enic_cq_wq(enic, 0);
557 unsigned int intr = enic_msix_wq_intr(enic, 0);
01f2e4ea
SF		 558 unsigned int wq_work_to_do = -1; /* no limit */
559 unsigned int wq_work_done;
560
717258ba 561 wq_work_done = vnic_cq_service(&enic->cq[cq],
01f2e4ea
SF		 562 wq_work_to_do, enic_wq_service, NULL);
563
717258ba 564 vnic_intr_return_credits(&enic->intr[intr],
01f2e4ea
SF		 565 wq_work_done,
566 1 /* unmask intr */,
567 1 /* reset intr timer */);
568
569 return IRQ_HANDLED;
570}
571
572static irqreturn_t enic_isr_msix_err(int irq, void *data)
573{
574 struct enic *enic = data;
717258ba 575 unsigned int intr = enic_msix_err_intr(enic);
01f2e4ea 576
717258ba 577 vnic_intr_return_all_credits(&enic->intr[intr]);
ed8af6b2 578
01f2e4ea
SF		 579 enic_log_q_error(enic);
580
581 /* schedule recovery from WQ/RQ error */
582 schedule_work(&enic->reset);
583
584 return IRQ_HANDLED;
585}
586
587static irqreturn_t enic_isr_msix_notify(int irq, void *data)
588{
589 struct enic *enic = data;
717258ba 590 unsigned int intr = enic_msix_notify_intr(enic);
01f2e4ea 591
717258ba 592 vnic_intr_return_all_credits(&enic->intr[intr]);
01f2e4ea 593 enic_notify_check(enic);
01f2e4ea
SF		 594
595 return IRQ_HANDLED;
596}
597
598static inline void enic_queue_wq_skb_cont(struct enic *enic,
599 struct vnic_wq *wq, struct sk_buff *skb,
1825aca6 600 unsigned int len_left, int loopback)
01f2e4ea 601{
9e903e08 602 const skb_frag_t *frag;
01f2e4ea
SF		 603
604 /* Queue additional data fragments */
605 for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
9e903e08 606 len_left -= skb_frag_size(frag);
01f2e4ea 607 enic_queue_wq_desc_cont(wq, skb,
4bf5adbf 608 skb_frag_dma_map(&enic->pdev->dev,
9e903e08 609 frag, 0, skb_frag_size(frag),
5d6bcdfe 610 DMA_TO_DEVICE),
9e903e08 611 skb_frag_size(frag),
1825aca6
VK		 612 (len_left == 0), /* EOP? */
613 loopback);
01f2e4ea
SF		 614 }
615}
616
617static inline void enic_queue_wq_skb_vlan(struct enic *enic,
618 struct vnic_wq *wq, struct sk_buff *skb,
1825aca6 619 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
01f2e4ea
SF		 620{
621 unsigned int head_len = skb_headlen(skb);
622 unsigned int len_left = skb->len - head_len;
623 int eop = (len_left == 0);
624
ea0d7d91
SF		 625 /* Queue the main skb fragment. The fragments are no larger
626 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
627 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
628 * per fragment is queued.
629 */
01f2e4ea
SF		 630 enic_queue_wq_desc(wq, skb,
631 pci_map_single(enic->pdev, skb->data,
632 head_len, PCI_DMA_TODEVICE),
633 head_len,
634 vlan_tag_insert, vlan_tag,
1825aca6 635 eop, loopback);
01f2e4ea
SF		 636
637 if (!eop)
1825aca6 638 enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
01f2e4ea
SF		 639}
640
641static inline void enic_queue_wq_skb_csum_l4(struct enic *enic,
642 struct vnic_wq *wq, struct sk_buff *skb,
1825aca6 643 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
01f2e4ea
SF		 644{
645 unsigned int head_len = skb_headlen(skb);
646 unsigned int len_left = skb->len - head_len;
0d0b1672 647 unsigned int hdr_len = skb_checksum_start_offset(skb);
01f2e4ea
SF		 648 unsigned int csum_offset = hdr_len + skb->csum_offset;
649 int eop = (len_left == 0);
650
ea0d7d91
SF		 651 /* Queue the main skb fragment. The fragments are no larger
652 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
653 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
654 * per fragment is queued.
655 */
01f2e4ea
SF		 656 enic_queue_wq_desc_csum_l4(wq, skb,
657 pci_map_single(enic->pdev, skb->data,
658 head_len, PCI_DMA_TODEVICE),
659 head_len,
660 csum_offset,
661 hdr_len,
662 vlan_tag_insert, vlan_tag,
1825aca6 663 eop, loopback);
01f2e4ea
SF		 664
665 if (!eop)
1825aca6 666 enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
01f2e4ea
SF		 667}
668
669static inline void enic_queue_wq_skb_tso(struct enic *enic,
670 struct vnic_wq *wq, struct sk_buff *skb, unsigned int mss,
1825aca6 671 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
01f2e4ea 672{
ea0d7d91
SF		 673 unsigned int frag_len_left = skb_headlen(skb);
674 unsigned int len_left = skb->len - frag_len_left;
01f2e4ea
SF		 675 unsigned int hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
676 int eop = (len_left == 0);
ea0d7d91
SF		 677 unsigned int len;
678 dma_addr_t dma_addr;
679 unsigned int offset = 0;
680 skb_frag_t *frag;
01f2e4ea
SF		 681
682 /* Preload TCP csum field with IP pseudo hdr calculated
683 * with IP length set to zero. HW will later add in length
684 * to each TCP segment resulting from the TSO.
685 */
686
09640e63 687 if (skb->protocol == cpu_to_be16(ETH_P_IP)) {
01f2e4ea
SF		 688 ip_hdr(skb)->check = 0;
689 tcp_hdr(skb)->check = ~csum_tcpudp_magic(ip_hdr(skb)->saddr,
690 ip_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
09640e63 691 } else if (skb->protocol == cpu_to_be16(ETH_P_IPV6)) {
01f2e4ea
SF		 692 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
693 &ipv6_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
694 }
695
ea0d7d91
SF		 696 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
697 * for the main skb fragment
698 */
699 while (frag_len_left) {
700 len = min(frag_len_left, (unsigned int)WQ_ENET_MAX_DESC_LEN);
701 dma_addr = pci_map_single(enic->pdev, skb->data + offset,
702 len, PCI_DMA_TODEVICE);
703 enic_queue_wq_desc_tso(wq, skb,
704 dma_addr,
705 len,
706 mss, hdr_len,
707 vlan_tag_insert, vlan_tag,
1825aca6 708 eop && (len == frag_len_left), loopback);
ea0d7d91
SF		 709 frag_len_left -= len;
710 offset += len;
711 }
01f2e4ea 712
ea0d7d91
SF		 713 if (eop)
714 return;
715
716 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
717 * for additional data fragments
718 */
719 for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
9e903e08
ED		 720 len_left -= skb_frag_size(frag);
721 frag_len_left = skb_frag_size(frag);
4bf5adbf 722 offset = 0;
ea0d7d91
SF		 723
724 while (frag_len_left) {
725 len = min(frag_len_left,
726 (unsigned int)WQ_ENET_MAX_DESC_LEN);
4bf5adbf
IC		 727 dma_addr = skb_frag_dma_map(&enic->pdev->dev, frag,
728 offset, len,
5d6bcdfe 729 DMA_TO_DEVICE);
ea0d7d91
SF		 730 enic_queue_wq_desc_cont(wq, skb,
731 dma_addr,
732 len,
733 (len_left == 0) &&
1825aca6
VK		 734 (len == frag_len_left), /* EOP? */
735 loopback);
ea0d7d91
SF		 736 frag_len_left -= len;
737 offset += len;
738 }
739 }
01f2e4ea
SF		 740}
741
742static inline void enic_queue_wq_skb(struct enic *enic,
743 struct vnic_wq *wq, struct sk_buff *skb)
744{
745 unsigned int mss = skb_shinfo(skb)->gso_size;
746 unsigned int vlan_tag = 0;
747 int vlan_tag_insert = 0;
1825aca6 748 int loopback = 0;
01f2e4ea 749
eab6d18d 750 if (vlan_tx_tag_present(skb)) {
01f2e4ea
SF		 751 /* VLAN tag from trunking driver */
752 vlan_tag_insert = 1;
753 vlan_tag = vlan_tx_tag_get(skb);
1825aca6
VK		 754 } else if (enic->loop_enable) {
755 vlan_tag = enic->loop_tag;
756 loopback = 1;
01f2e4ea
SF		 757 }
758
759 if (mss)
760 enic_queue_wq_skb_tso(enic, wq, skb, mss,
1825aca6 761 vlan_tag_insert, vlan_tag, loopback);
01f2e4ea
SF		 762 else if (skb->ip_summed == CHECKSUM_PARTIAL)
763 enic_queue_wq_skb_csum_l4(enic, wq, skb,
1825aca6 764 vlan_tag_insert, vlan_tag, loopback);
01f2e4ea
SF		 765 else
766 enic_queue_wq_skb_vlan(enic, wq, skb,
1825aca6 767 vlan_tag_insert, vlan_tag, loopback);
01f2e4ea
SF		 768}
769
ed8af6b2 770/* netif_tx_lock held, process context with BHs disabled, or BH */
61357325 771static netdev_tx_t enic_hard_start_xmit(struct sk_buff *skb,
d87fd25d 772 struct net_device *netdev)
01f2e4ea
SF		 773{
774 struct enic *enic = netdev_priv(netdev);
775 struct vnic_wq *wq = &enic->wq[0];
776 unsigned long flags;
777
778 if (skb->len <= 0) {
779 dev_kfree_skb(skb);
780 return NETDEV_TX_OK;
781 }
782
783 /* Non-TSO sends must fit within ENIC_NON_TSO_MAX_DESC descs,
784 * which is very likely. In the off chance it's going to take
785 * more than * ENIC_NON_TSO_MAX_DESC, linearize the skb.
786 */
787
788 if (skb_shinfo(skb)->gso_size == 0 &&
789 skb_shinfo(skb)->nr_frags + 1 > ENIC_NON_TSO_MAX_DESC &&
790 skb_linearize(skb)) {
791 dev_kfree_skb(skb);
792 return NETDEV_TX_OK;
793 }
794
795 spin_lock_irqsave(&enic->wq_lock[0], flags);
796
ea0d7d91
SF		 797 if (vnic_wq_desc_avail(wq) <
798 skb_shinfo(skb)->nr_frags + ENIC_DESC_MAX_SPLITS) {
01f2e4ea
SF		 799 netif_stop_queue(netdev);
800 /* This is a hard error, log it */
a7a79deb 801 netdev_err(netdev, "BUG! Tx ring full when queue awake!\n");
01f2e4ea
SF		 802 spin_unlock_irqrestore(&enic->wq_lock[0], flags);
803 return NETDEV_TX_BUSY;
804 }
805
806 enic_queue_wq_skb(enic, wq, skb);
807
ea0d7d91 808 if (vnic_wq_desc_avail(wq) < MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS)
01f2e4ea
SF		 809 netif_stop_queue(netdev);
810
01f2e4ea
SF		 811 spin_unlock_irqrestore(&enic->wq_lock[0], flags);
812
813 return NETDEV_TX_OK;
814}
815
816/* dev_base_lock rwlock held, nominally process context */
f20530bc 817static struct rtnl_link_stats64 *enic_get_stats(struct net_device *netdev,
818 struct rtnl_link_stats64 *net_stats)
01f2e4ea
SF		 819{
820 struct enic *enic = netdev_priv(netdev);
821 struct vnic_stats *stats;
822
383ab92f 823 enic_dev_stats_dump(enic, &stats);
01f2e4ea 824
25f0a061
SF		 825 net_stats->tx_packets = stats->tx.tx_frames_ok;
826 net_stats->tx_bytes = stats->tx.tx_bytes_ok;
827 net_stats->tx_errors = stats->tx.tx_errors;
828 net_stats->tx_dropped = stats->tx.tx_drops;
01f2e4ea 829
25f0a061
SF		 830 net_stats->rx_packets = stats->rx.rx_frames_ok;
831 net_stats->rx_bytes = stats->rx.rx_bytes_ok;
832 net_stats->rx_errors = stats->rx.rx_errors;
833 net_stats->multicast = stats->rx.rx_multicast_frames_ok;
350991e1 834 net_stats->rx_over_errors = enic->rq_truncated_pkts;
bd9fb1a4 835 net_stats->rx_crc_errors = enic->rq_bad_fcs;
350991e1 836 net_stats->rx_dropped = stats->rx.rx_no_bufs + stats->rx.rx_drop;
01f2e4ea 837
25f0a061 838 return net_stats;
01f2e4ea
SF		 839}
840
b3abfbd2 841void enic_reset_addr_lists(struct enic *enic)
01f2e4ea
SF		 842{
843 enic->mc_count = 0;
e0afe53f 844 enic->uc_count = 0;
99ef5639 845 enic->flags = 0;
01f2e4ea
SF		 846}
847
848static int enic_set_mac_addr(struct net_device *netdev, char *addr)
849{
f8bd9091
SF		 850 struct enic *enic = netdev_priv(netdev);
851
852 if (enic_is_dynamic(enic)) {
853 if (!is_valid_ether_addr(addr) && !is_zero_ether_addr(addr))
854 return -EADDRNOTAVAIL;
855 } else {
856 if (!is_valid_ether_addr(addr))
857 return -EADDRNOTAVAIL;
858 }
01f2e4ea
SF		 859
860 memcpy(netdev->dev_addr, addr, netdev->addr_len);
861
862 return 0;
863}
864
f8bd9091
SF		 865static int enic_set_mac_address_dynamic(struct net_device *netdev, void *p)
866{
867 struct enic *enic = netdev_priv(netdev);
868 struct sockaddr *saddr = p;
869 char *addr = saddr->sa_data;
870 int err;
871
872 if (netif_running(enic->netdev)) {
873 err = enic_dev_del_station_addr(enic);
874 if (err)
875 return err;
876 }
877
878 err = enic_set_mac_addr(netdev, addr);
879 if (err)
880 return err;
881
882 if (netif_running(enic->netdev)) {
883 err = enic_dev_add_station_addr(enic);
884 if (err)
885 return err;
886 }
887
888 return err;
889}
890
891static int enic_set_mac_address(struct net_device *netdev, void *p)
892{
294dab25 893 struct sockaddr *saddr = p;
c76fd32d
VK		 894 char *addr = saddr->sa_data;
895 struct enic *enic = netdev_priv(netdev);
896 int err;
897
898 err = enic_dev_del_station_addr(enic);
899 if (err)
900 return err;
901
902 err = enic_set_mac_addr(netdev, addr);
903 if (err)
904 return err;
294dab25 905
c76fd32d 906 return enic_dev_add_station_addr(enic);
f8bd9091
SF		 907}
908
e0afe53f 909static void enic_update_multicast_addr_list(struct enic *enic)
01f2e4ea 910{
319d7e84 911 struct net_device *netdev = enic->netdev;
22bedad3 912 struct netdev_hw_addr *ha;
4cd24eaf 913 unsigned int mc_count = netdev_mc_count(netdev);
01f2e4ea 914 u8 mc_addr[ENIC_MULTICAST_PERFECT_FILTERS][ETH_ALEN];
01f2e4ea
SF		 915 unsigned int i, j;
916
319d7e84
RP		 917 if (mc_count > ENIC_MULTICAST_PERFECT_FILTERS) {
918 netdev_warn(netdev, "Registering only %d out of %d "
919 "multicast addresses\n",
920 ENIC_MULTICAST_PERFECT_FILTERS, mc_count);
01f2e4ea 921 mc_count = ENIC_MULTICAST_PERFECT_FILTERS;
9959a185 922 }
01f2e4ea
SF		 923
924 /* Is there an easier way? Trying to minimize to
925 * calls to add/del multicast addrs. We keep the
926 * addrs from the last call in enic->mc_addr and
927 * look for changes to add/del.
928 */
929
48e2f183 930 i = 0;
22bedad3 931 netdev_for_each_mc_addr(ha, netdev) {
48e2f183
JP		 932 if (i == mc_count)
933 break;
22bedad3 934 memcpy(mc_addr[i++], ha->addr, ETH_ALEN);
01f2e4ea
SF		 935 }
936
937 for (i = 0; i < enic->mc_count; i++) {
938 for (j = 0; j < mc_count; j++)
939 if (compare_ether_addr(enic->mc_addr[i],
940 mc_addr[j]) == 0)
941 break;
942 if (j == mc_count)
319d7e84 943 enic_dev_del_addr(enic, enic->mc_addr[i]);
01f2e4ea
SF		 944 }
945
946 for (i = 0; i < mc_count; i++) {
947 for (j = 0; j < enic->mc_count; j++)
948 if (compare_ether_addr(mc_addr[i],
949 enic->mc_addr[j]) == 0)
950 break;
951 if (j == enic->mc_count)
319d7e84 952 enic_dev_add_addr(enic, mc_addr[i]);
01f2e4ea
SF		 953 }
954
955 /* Save the list to compare against next time
956 */
957
958 for (i = 0; i < mc_count; i++)
959 memcpy(enic->mc_addr[i], mc_addr[i], ETH_ALEN);
960
961 enic->mc_count = mc_count;
01f2e4ea
SF		 962}
963
e0afe53f 964static void enic_update_unicast_addr_list(struct enic *enic)
319d7e84
RP		 965{
966 struct net_device *netdev = enic->netdev;
967 struct netdev_hw_addr *ha;
968 unsigned int uc_count = netdev_uc_count(netdev);
969 u8 uc_addr[ENIC_UNICAST_PERFECT_FILTERS][ETH_ALEN];
970 unsigned int i, j;
971
972 if (uc_count > ENIC_UNICAST_PERFECT_FILTERS) {
973 netdev_warn(netdev, "Registering only %d out of %d "
974 "unicast addresses\n",
975 ENIC_UNICAST_PERFECT_FILTERS, uc_count);
976 uc_count = ENIC_UNICAST_PERFECT_FILTERS;
977 }
978
979 /* Is there an easier way? Trying to minimize to
980 * calls to add/del unicast addrs. We keep the
981 * addrs from the last call in enic->uc_addr and
982 * look for changes to add/del.
983 */
984
985 i = 0;
986 netdev_for_each_uc_addr(ha, netdev) {
987 if (i == uc_count)
988 break;
989 memcpy(uc_addr[i++], ha->addr, ETH_ALEN);
990 }
991
992 for (i = 0; i < enic->uc_count; i++) {
993 for (j = 0; j < uc_count; j++)
994 if (compare_ether_addr(enic->uc_addr[i],
995 uc_addr[j]) == 0)
996 break;
997 if (j == uc_count)
998 enic_dev_del_addr(enic, enic->uc_addr[i]);
999 }
1000
1001 for (i = 0; i < uc_count; i++) {
1002 for (j = 0; j < enic->uc_count; j++)
1003 if (compare_ether_addr(uc_addr[i],
1004 enic->uc_addr[j]) == 0)
1005 break;
1006 if (j == enic->uc_count)
1007 enic_dev_add_addr(enic, uc_addr[i]);
1008 }
1009
1010 /* Save the list to compare against next time
1011 */
1012
1013 for (i = 0; i < uc_count; i++)
1014 memcpy(enic->uc_addr[i], uc_addr[i], ETH_ALEN);
1015
1016 enic->uc_count = uc_count;
1017}
1018
1019/* netif_tx_lock held, BHs disabled */
1020static void enic_set_rx_mode(struct net_device *netdev)
1021{
1022 struct enic *enic = netdev_priv(netdev);
1023 int directed = 1;
1024 int multicast = (netdev->flags & IFF_MULTICAST) ? 1 : 0;
1025 int broadcast = (netdev->flags & IFF_BROADCAST) ? 1 : 0;
1026 int promisc = (netdev->flags & IFF_PROMISC) ||
1027 netdev_uc_count(netdev) > ENIC_UNICAST_PERFECT_FILTERS;
1028 int allmulti = (netdev->flags & IFF_ALLMULTI) ||
1029 netdev_mc_count(netdev) > ENIC_MULTICAST_PERFECT_FILTERS;
1030 unsigned int flags = netdev->flags |
1031 (allmulti ? IFF_ALLMULTI : 0) |
1032 (promisc ? IFF_PROMISC : 0);
1033
1034 if (enic->flags != flags) {
1035 enic->flags = flags;
1036 enic_dev_packet_filter(enic, directed,
1037 multicast, broadcast, promisc, allmulti);
1038 }
1039
1040 if (!promisc) {
e0afe53f 1041 enic_update_unicast_addr_list(enic);
319d7e84 1042 if (!allmulti)
e0afe53f 1043 enic_update_multicast_addr_list(enic);
319d7e84
RP		 1044 }
1045}
1046
01f2e4ea
SF		 1047/* netif_tx_lock held, BHs disabled */
1048static void enic_tx_timeout(struct net_device *netdev)
1049{
1050 struct enic *enic = netdev_priv(netdev);
1051 schedule_work(&enic->reset);
1052}
1053
0b1c00fc
RP		 1054static int enic_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
1055{
1056 struct enic *enic = netdev_priv(netdev);
3f192795
RP		 1057 struct enic_port_profile *pp;
1058 int err;
0b1c00fc 1059
3f192795
RP		 1060 ENIC_PP_BY_INDEX(enic, vf, pp, &err);
1061 if (err)
1062 return err;
0b1c00fc 1063
0b1c00fc 1064 if (is_valid_ether_addr(mac)) {
3f192795 1065 memcpy(pp->vf_mac, mac, ETH_ALEN);
0b1c00fc
RP		 1066 return 0;
1067 } else
1068 return -EINVAL;
1069}
1070
f8bd9091
SF		 1071static int enic_set_vf_port(struct net_device *netdev, int vf,
1072 struct nlattr *port[])
1073{
1074 struct enic *enic = netdev_priv(netdev);
b3abfbd2 1075 struct enic_port_profile prev_pp;
3f192795 1076 struct enic_port_profile *pp;
b3abfbd2 1077 int err = 0, restore_pp = 1;
08f382eb 1078
3f192795
RP		 1079 ENIC_PP_BY_INDEX(enic, vf, pp, &err);
1080 if (err)
1081 return err;
08f382eb 1082
b3abfbd2
RP		 1083 if (!port[IFLA_PORT_REQUEST])
1084 return -EOPNOTSUPP;
1085
3f192795
RP		 1086 memcpy(&prev_pp, pp, sizeof(*enic->pp));
1087 memset(pp, 0, sizeof(*enic->pp));
b3abfbd2 1088
3f192795
RP		 1089 pp->set |= ENIC_SET_REQUEST;
1090 pp->request = nla_get_u8(port[IFLA_PORT_REQUEST]);
08f382eb
SF		 1091
1092 if (port[IFLA_PORT_PROFILE]) {
3f192795
RP		 1093 pp->set |= ENIC_SET_NAME;
1094 memcpy(pp->name, nla_data(port[IFLA_PORT_PROFILE]),
08f382eb
SF		 1095 PORT_PROFILE_MAX);
1096 }
1097
1098 if (port[IFLA_PORT_INSTANCE_UUID]) {
3f192795
RP		 1099 pp->set |= ENIC_SET_INSTANCE;
1100 memcpy(pp->instance_uuid,
08f382eb
SF		 1101 nla_data(port[IFLA_PORT_INSTANCE_UUID]), PORT_UUID_MAX);
1102 }
1103
1104 if (port[IFLA_PORT_HOST_UUID]) {
3f192795
RP		 1105 pp->set |= ENIC_SET_HOST;
1106 memcpy(pp->host_uuid,
08f382eb
SF		 1107 nla_data(port[IFLA_PORT_HOST_UUID]), PORT_UUID_MAX);
1108 }
f8bd9091 1109
b3abfbd2
RP		 1110 /* Special case handling: mac came from IFLA_VF_MAC */
1111 if (!is_zero_ether_addr(prev_pp.vf_mac))
3f192795 1112 memcpy(pp->mac_addr, prev_pp.vf_mac, ETH_ALEN);
418c437d 1113
3f192795
RP		 1114 if (vf == PORT_SELF_VF && is_zero_ether_addr(netdev->dev_addr))
1115 random_ether_addr(netdev->dev_addr);
f8bd9091 1116
3f192795 1117 err = enic_process_set_pp_request(enic, vf, &prev_pp, &restore_pp);
b3abfbd2
RP		 1118 if (err) {
1119 if (restore_pp) {
1120 /* Things are still the way they were: Implicit
1121 * DISASSOCIATE failed
1122 */
3f192795 1123 memcpy(pp, &prev_pp, sizeof(*pp));
b3abfbd2 1124 } else {
3f192795
RP		 1125 memset(pp, 0, sizeof(*pp));
1126 if (vf == PORT_SELF_VF)
1127 memset(netdev->dev_addr, 0, ETH_ALEN);
b3abfbd2
RP		 1128 }
1129 } else {
1130 /* Set flag to indicate that the port assoc/disassoc
1131 * request has been sent out to fw
1132 */
3f192795 1133 pp->set |= ENIC_PORT_REQUEST_APPLIED;
b3abfbd2
RP		 1134
1135 /* If DISASSOCIATE, clean up all assigned/saved macaddresses */
3f192795
RP		 1136 if (pp->request == PORT_REQUEST_DISASSOCIATE) {
1137 memset(pp->mac_addr, 0, ETH_ALEN);
1138 if (vf == PORT_SELF_VF)
1139 memset(netdev->dev_addr, 0, ETH_ALEN);
b3abfbd2
RP		 1140 }
1141 }
29639059 1142
3f192795 1143 memset(pp->vf_mac, 0, ETH_ALEN);
29639059 1144
29639059 1145 return err;
f8bd9091
SF		 1146}
1147
1148static int enic_get_vf_port(struct net_device *netdev, int vf,
1149 struct sk_buff *skb)
1150{
1151 struct enic *enic = netdev_priv(netdev);
f8bd9091 1152 u16 response = PORT_PROFILE_RESPONSE_SUCCESS;
3f192795 1153 struct enic_port_profile *pp;
b3abfbd2 1154 int err;
f8bd9091 1155
3f192795
RP		 1156 ENIC_PP_BY_INDEX(enic, vf, pp, &err);
1157 if (err)
1158 return err;
1159
1160 if (!(pp->set & ENIC_PORT_REQUEST_APPLIED))
08f382eb 1161 return -ENODATA;
f8bd9091 1162
3f192795 1163 err = enic_process_get_pp_request(enic, vf, pp->request, &response);
f8bd9091 1164 if (err)
b3abfbd2 1165 return err;
f8bd9091 1166
3f192795 1167 NLA_PUT_U16(skb, IFLA_PORT_REQUEST, pp->request);
f8bd9091 1168 NLA_PUT_U16(skb, IFLA_PORT_RESPONSE, response);
3f192795 1169 if (pp->set & ENIC_SET_NAME)
08f382eb 1170 NLA_PUT(skb, IFLA_PORT_PROFILE, PORT_PROFILE_MAX,
3f192795
RP		 1171 pp->name);
1172 if (pp->set & ENIC_SET_INSTANCE)
08f382eb 1173 NLA_PUT(skb, IFLA_PORT_INSTANCE_UUID, PORT_UUID_MAX,
3f192795
RP		 1174 pp->instance_uuid);
1175 if (pp->set & ENIC_SET_HOST)
08f382eb 1176 NLA_PUT(skb, IFLA_PORT_HOST_UUID, PORT_UUID_MAX,
3f192795 1177 pp->host_uuid);
f8bd9091
SF		 1178
1179 return 0;
1180
1181nla_put_failure:
1182 return -EMSGSIZE;
1183}
1184
01f2e4ea
SF		 1185static void enic_free_rq_buf(struct vnic_rq *rq, struct vnic_rq_buf *buf)
1186{
1187 struct enic *enic = vnic_dev_priv(rq->vdev);
1188
1189 if (!buf->os_buf)
1190 return;
1191
1192 pci_unmap_single(enic->pdev, buf->dma_addr,
1193 buf->len, PCI_DMA_FROMDEVICE);
1194 dev_kfree_skb_any(buf->os_buf);
1195}
1196
01f2e4ea
SF		 1197static int enic_rq_alloc_buf(struct vnic_rq *rq)
1198{
1199 struct enic *enic = vnic_dev_priv(rq->vdev);
d19e22dc 1200 struct net_device *netdev = enic->netdev;
01f2e4ea 1201 struct sk_buff *skb;
1825aca6 1202 unsigned int len = netdev->mtu + VLAN_ETH_HLEN;
01f2e4ea
SF		 1203 unsigned int os_buf_index = 0;
1204 dma_addr_t dma_addr;
1205
89d71a66 1206 skb = netdev_alloc_skb_ip_align(netdev, len);
01f2e4ea
SF		 1207 if (!skb)
1208 return -ENOMEM;
1209
1210 dma_addr = pci_map_single(enic->pdev, skb->data,
1211 len, PCI_DMA_FROMDEVICE);
1212
1213 enic_queue_rq_desc(rq, skb, os_buf_index,
1214 dma_addr, len);
1215
1216 return 0;
1217}
1218
01f2e4ea
SF		 1219static void enic_rq_indicate_buf(struct vnic_rq *rq,
1220 struct cq_desc *cq_desc, struct vnic_rq_buf *buf,
1221 int skipped, void *opaque)
1222{
1223 struct enic *enic = vnic_dev_priv(rq->vdev);
86ca9db7 1224 struct net_device *netdev = enic->netdev;
01f2e4ea
SF		 1225 struct sk_buff *skb;
1226
1227 u8 type, color, eop, sop, ingress_port, vlan_stripped;
1228 u8 fcoe, fcoe_sof, fcoe_fc_crc_ok, fcoe_enc_error, fcoe_eof;
1229 u8 tcp_udp_csum_ok, udp, tcp, ipv4_csum_ok;
1230 u8 ipv6, ipv4, ipv4_fragment, fcs_ok, rss_type, csum_not_calc;
1231 u8 packet_error;
f8cac14a 1232 u16 q_number, completed_index, bytes_written, vlan_tci, checksum;
01f2e4ea
SF		 1233 u32 rss_hash;
1234
1235 if (skipped)
1236 return;
1237
1238 skb = buf->os_buf;
1239 prefetch(skb->data - NET_IP_ALIGN);
1240 pci_unmap_single(enic->pdev, buf->dma_addr,
1241 buf->len, PCI_DMA_FROMDEVICE);
1242
1243 cq_enet_rq_desc_dec((struct cq_enet_rq_desc *)cq_desc,
1244 &type, &color, &q_number, &completed_index,
1245 &ingress_port, &fcoe, &eop, &sop, &rss_type,
1246 &csum_not_calc, &rss_hash, &bytes_written,
f8cac14a 1247 &packet_error, &vlan_stripped, &vlan_tci, &checksum,
01f2e4ea
SF		 1248 &fcoe_sof, &fcoe_fc_crc_ok, &fcoe_enc_error,
1249 &fcoe_eof, &tcp_udp_csum_ok, &udp, &tcp,
1250 &ipv4_csum_ok, &ipv6, &ipv4, &ipv4_fragment,
1251 &fcs_ok);
1252
1253 if (packet_error) {
1254
350991e1
SF		 1255 if (!fcs_ok) {
1256 if (bytes_written > 0)
1257 enic->rq_bad_fcs++;
1258 else if (bytes_written == 0)
1259 enic->rq_truncated_pkts++;
1260 }
01f2e4ea
SF		 1261
1262 dev_kfree_skb_any(skb);
1263
1264 return;
1265 }
1266
1267 if (eop && bytes_written > 0) {
1268
1269 /* Good receive
1270 */
1271
1272 skb_put(skb, bytes_written);
86ca9db7 1273 skb->protocol = eth_type_trans(skb, netdev);
01f2e4ea 1274
5ec8f9b8 1275 if ((netdev->features & NETIF_F_RXCSUM) && !csum_not_calc) {
01f2e4ea
SF		 1276 skb->csum = htons(checksum);
1277 skb->ip_summed = CHECKSUM_COMPLETE;
1278 }
1279
86ca9db7 1280 skb->dev = netdev;
01f2e4ea 1281
6ede746b
JP		 1282 if (vlan_stripped)
1283 __vlan_hwaccel_put_tag(skb, vlan_tci);
01f2e4ea 1284
6ede746b
JP		 1285 if (netdev->features & NETIF_F_GRO)
1286 napi_gro_receive(&enic->napi[q_number], skb);
1287 else
1288 netif_receive_skb(skb);
01f2e4ea
SF		 1289 } else {
1290
1291 /* Buffer overflow
1292 */
1293
1294 dev_kfree_skb_any(skb);
1295 }
1296}
1297
1298static int enic_rq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
1299 u8 type, u16 q_number, u16 completed_index, void *opaque)
1300{
1301 struct enic *enic = vnic_dev_priv(vdev);
1302
1303 vnic_rq_service(&enic->rq[q_number], cq_desc,
1304 completed_index, VNIC_RQ_RETURN_DESC,
1305 enic_rq_indicate_buf, opaque);
1306
1307 return 0;
1308}
1309
01f2e4ea
SF		 1310static int enic_poll(struct napi_struct *napi, int budget)
1311{
717258ba
VK		 1312 struct net_device *netdev = napi->dev;
1313 struct enic *enic = netdev_priv(netdev);
1314 unsigned int cq_rq = enic_cq_rq(enic, 0);
1315 unsigned int cq_wq = enic_cq_wq(enic, 0);
1316 unsigned int intr = enic_legacy_io_intr();
01f2e4ea
SF		 1317 unsigned int rq_work_to_do = budget;
1318 unsigned int wq_work_to_do = -1; /* no limit */
1319 unsigned int work_done, rq_work_done, wq_work_done;
2d6ddced 1320 int err;
01f2e4ea
SF		 1321
1322 /* Service RQ (first) and WQ
1323 */
1324
717258ba 1325 rq_work_done = vnic_cq_service(&enic->cq[cq_rq],
01f2e4ea
SF		 1326 rq_work_to_do, enic_rq_service, NULL);
1327
717258ba 1328 wq_work_done = vnic_cq_service(&enic->cq[cq_wq],
01f2e4ea
SF		 1329 wq_work_to_do, enic_wq_service, NULL);
1330
1331 /* Accumulate intr event credits for this polling
1332 * cycle. An intr event is the completion of a
1333 * a WQ or RQ packet.
1334 */
1335
1336 work_done = rq_work_done + wq_work_done;
1337
1338 if (work_done > 0)
717258ba 1339 vnic_intr_return_credits(&enic->intr[intr],
01f2e4ea
SF		 1340 work_done,
1341 0 /* don't unmask intr */,
1342 0 /* don't reset intr timer */);
1343
0eb26022 1344 err = vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf);
01f2e4ea 1345
2d6ddced
SF		 1346 /* Buffer allocation failed. Stay in polling
1347 * mode so we can try to fill the ring again.
1348 */
01f2e4ea 1349
2d6ddced
SF		 1350 if (err)
1351 rq_work_done = rq_work_to_do;
01f2e4ea 1352
2d6ddced 1353 if (rq_work_done < rq_work_to_do) {
01f2e4ea 1354
2d6ddced 1355 /* Some work done, but not enough to stay in polling,
88132f55 1356 * exit polling
01f2e4ea
SF		 1357 */
1358
288379f0 1359 napi_complete(napi);
717258ba 1360 vnic_intr_unmask(&enic->intr[intr]);
01f2e4ea
SF		 1361 }
1362
1363 return rq_work_done;
1364}
1365
1366static int enic_poll_msix(struct napi_struct *napi, int budget)
1367{
717258ba
VK		 1368 struct net_device *netdev = napi->dev;
1369 struct enic *enic = netdev_priv(netdev);
1370 unsigned int rq = (napi - &enic->napi[0]);
1371 unsigned int cq = enic_cq_rq(enic, rq);
1372 unsigned int intr = enic_msix_rq_intr(enic, rq);
01f2e4ea
SF		 1373 unsigned int work_to_do = budget;
1374 unsigned int work_done;
2d6ddced 1375 int err;
01f2e4ea
SF		 1376
1377 /* Service RQ
1378 */
1379
717258ba 1380 work_done = vnic_cq_service(&enic->cq[cq],
01f2e4ea
SF		 1381 work_to_do, enic_rq_service, NULL);
1382
2d6ddced
SF		 1383 /* Return intr event credits for this polling
1384 * cycle. An intr event is the completion of a
1385 * RQ packet.
1386 */
01f2e4ea 1387
2d6ddced 1388 if (work_done > 0)
717258ba 1389 vnic_intr_return_credits(&enic->intr[intr],
01f2e4ea
SF		 1390 work_done,
1391 0 /* don't unmask intr */,
1392 0 /* don't reset intr timer */);
01f2e4ea 1393
0eb26022 1394 err = vnic_rq_fill(&enic->rq[rq], enic_rq_alloc_buf);
2d6ddced
SF		 1395
1396 /* Buffer allocation failed. Stay in polling mode
1397 * so we can try to fill the ring again.
1398 */
1399
1400 if (err)
1401 work_done = work_to_do;
1402
1403 if (work_done < work_to_do) {
1404
1405 /* Some work done, but not enough to stay in polling,
88132f55 1406 * exit polling
01f2e4ea
SF		 1407 */
1408
288379f0 1409 napi_complete(napi);
717258ba 1410 vnic_intr_unmask(&enic->intr[intr]);
01f2e4ea
SF		 1411 }
1412
1413 return work_done;
1414}
1415
1416static void enic_notify_timer(unsigned long data)
1417{
1418 struct enic *enic = (struct enic *)data;
1419
1420 enic_notify_check(enic);
1421
25f0a061
SF		 1422 mod_timer(&enic->notify_timer,
1423 round_jiffies(jiffies + ENIC_NOTIFY_TIMER_PERIOD));
01f2e4ea
SF		 1424}
1425
1426static void enic_free_intr(struct enic *enic)
1427{
1428 struct net_device *netdev = enic->netdev;
1429 unsigned int i;
1430
1431 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1432 case VNIC_DEV_INTR_MODE_INTX:
01f2e4ea
SF		 1433 free_irq(enic->pdev->irq, netdev);
1434 break;
8f4d248c
SF		 1435 case VNIC_DEV_INTR_MODE_MSI:
1436 free_irq(enic->pdev->irq, enic);
1437 break;
01f2e4ea
SF		 1438 case VNIC_DEV_INTR_MODE_MSIX:
1439 for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
1440 if (enic->msix[i].requested)
1441 free_irq(enic->msix_entry[i].vector,
1442 enic->msix[i].devid);
1443 break;
1444 default:
1445 break;
1446 }
1447}
1448
1449static int enic_request_intr(struct enic *enic)
1450{
1451 struct net_device *netdev = enic->netdev;
717258ba 1452 unsigned int i, intr;
01f2e4ea
SF		 1453 int err = 0;
1454
1455 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1456
1457 case VNIC_DEV_INTR_MODE_INTX:
1458
1459 err = request_irq(enic->pdev->irq, enic_isr_legacy,
1460 IRQF_SHARED, netdev->name, netdev);
1461 break;
1462
1463 case VNIC_DEV_INTR_MODE_MSI:
1464
1465 err = request_irq(enic->pdev->irq, enic_isr_msi,
1466 0, netdev->name, enic);
1467 break;
1468
1469 case VNIC_DEV_INTR_MODE_MSIX:
1470
717258ba
VK		 1471 for (i = 0; i < enic->rq_count; i++) {
1472 intr = enic_msix_rq_intr(enic, i);
1473 sprintf(enic->msix[intr].devname,
1474 "%.11s-rx-%d", netdev->name, i);
1475 enic->msix[intr].isr = enic_isr_msix_rq;
1476 enic->msix[intr].devid = &enic->napi[i];
1477 }
01f2e4ea 1478
717258ba
VK		 1479 for (i = 0; i < enic->wq_count; i++) {
1480 intr = enic_msix_wq_intr(enic, i);
1481 sprintf(enic->msix[intr].devname,
1482 "%.11s-tx-%d", netdev->name, i);
1483 enic->msix[intr].isr = enic_isr_msix_wq;
1484 enic->msix[intr].devid = enic;
1485 }
01f2e4ea 1486
717258ba
VK		 1487 intr = enic_msix_err_intr(enic);
1488 sprintf(enic->msix[intr].devname,
01f2e4ea 1489 "%.11s-err", netdev->name);
717258ba
VK		 1490 enic->msix[intr].isr = enic_isr_msix_err;
1491 enic->msix[intr].devid = enic;
01f2e4ea 1492
717258ba
VK		 1493 intr = enic_msix_notify_intr(enic);
1494 sprintf(enic->msix[intr].devname,
01f2e4ea 1495 "%.11s-notify", netdev->name);
717258ba
VK		 1496 enic->msix[intr].isr = enic_isr_msix_notify;
1497 enic->msix[intr].devid = enic;
1498
1499 for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
1500 enic->msix[i].requested = 0;
01f2e4ea 1501
717258ba 1502 for (i = 0; i < enic->intr_count; i++) {
01f2e4ea
SF		 1503 err = request_irq(enic->msix_entry[i].vector,
1504 enic->msix[i].isr, 0,
1505 enic->msix[i].devname,
1506 enic->msix[i].devid);
1507 if (err) {
1508 enic_free_intr(enic);
1509 break;
1510 }
1511 enic->msix[i].requested = 1;
1512 }
1513
1514 break;
1515
1516 default:
1517 break;
1518 }
1519
1520 return err;
1521}
1522
b3d18d19
SF		 1523static void enic_synchronize_irqs(struct enic *enic)
1524{
1525 unsigned int i;
1526
1527 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1528 case VNIC_DEV_INTR_MODE_INTX:
1529 case VNIC_DEV_INTR_MODE_MSI:
1530 synchronize_irq(enic->pdev->irq);
1531 break;
1532 case VNIC_DEV_INTR_MODE_MSIX:
1533 for (i = 0; i < enic->intr_count; i++)
1534 synchronize_irq(enic->msix_entry[i].vector);
1535 break;
1536 default:
1537 break;
1538 }
1539}
1540
383ab92f 1541static int enic_dev_notify_set(struct enic *enic)
01f2e4ea
SF		 1542{
1543 int err;
1544
56ac88b3 1545 spin_lock(&enic->devcmd_lock);
01f2e4ea
SF		 1546 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1547 case VNIC_DEV_INTR_MODE_INTX:
717258ba
VK		 1548 err = vnic_dev_notify_set(enic->vdev,
1549 enic_legacy_notify_intr());
01f2e4ea
SF		 1550 break;
1551 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK		 1552 err = vnic_dev_notify_set(enic->vdev,
1553 enic_msix_notify_intr(enic));
01f2e4ea
SF		 1554 break;
1555 default:
1556 err = vnic_dev_notify_set(enic->vdev, -1 /* no intr */);
1557 break;
1558 }
56ac88b3 1559 spin_unlock(&enic->devcmd_lock);
01f2e4ea
SF		 1560
1561 return err;
1562}
1563
1564static void enic_notify_timer_start(struct enic *enic)
1565{
1566 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1567 case VNIC_DEV_INTR_MODE_MSI:
1568 mod_timer(&enic->notify_timer, jiffies);
1569 break;
1570 default:
1571 /* Using intr for notification for INTx/MSI-X */
1572 break;
6403eab1 1573 }
01f2e4ea
SF		 1574}
1575
1576/* rtnl lock is held, process context */
1577static int enic_open(struct net_device *netdev)
1578{
1579 struct enic *enic = netdev_priv(netdev);
1580 unsigned int i;
1581 int err;
1582
4b75a442
SF		 1583 err = enic_request_intr(enic);
1584 if (err) {
a7a79deb 1585 netdev_err(netdev, "Unable to request irq.\n");
4b75a442
SF		 1586 return err;
1587 }
1588
383ab92f 1589 err = enic_dev_notify_set(enic);
4b75a442 1590 if (err) {
a7a79deb
VK		 1591 netdev_err(netdev,
1592 "Failed to alloc notify buffer, aborting.\n");
4b75a442
SF		 1593 goto err_out_free_intr;
1594 }
1595
01f2e4ea 1596 for (i = 0; i < enic->rq_count; i++) {
0eb26022 1597 vnic_rq_fill(&enic->rq[i], enic_rq_alloc_buf);
2d6ddced
SF		 1598 /* Need at least one buffer on ring to get going */
1599 if (vnic_rq_desc_used(&enic->rq[i]) == 0) {
a7a79deb 1600 netdev_err(netdev, "Unable to alloc receive buffers\n");
2d6ddced 1601 err = -ENOMEM;
4b75a442 1602 goto err_out_notify_unset;
01f2e4ea
SF		 1603 }
1604 }
1605
1606 for (i = 0; i < enic->wq_count; i++)
1607 vnic_wq_enable(&enic->wq[i]);
1608 for (i = 0; i < enic->rq_count; i++)
1609 vnic_rq_enable(&enic->rq[i]);
1610
3f192795 1611 if (!enic_is_dynamic(enic))
29639059 1612 enic_dev_add_station_addr(enic);
3f192795 1613
319d7e84 1614 enic_set_rx_mode(netdev);
01f2e4ea
SF		 1615
1616 netif_wake_queue(netdev);
717258ba
VK		 1617
1618 for (i = 0; i < enic->rq_count; i++)
1619 napi_enable(&enic->napi[i]);
1620
383ab92f 1621 enic_dev_enable(enic);
01f2e4ea
SF		 1622
1623 for (i = 0; i < enic->intr_count; i++)
1624 vnic_intr_unmask(&enic->intr[i]);
1625
1626 enic_notify_timer_start(enic);
1627
1628 return 0;
4b75a442
SF		 1629
1630err_out_notify_unset:
383ab92f 1631 enic_dev_notify_unset(enic);
4b75a442
SF		 1632err_out_free_intr:
1633 enic_free_intr(enic);
1634
1635 return err;
01f2e4ea
SF		 1636}
1637
1638/* rtnl lock is held, process context */
1639static int enic_stop(struct net_device *netdev)
1640{
1641 struct enic *enic = netdev_priv(netdev);
1642 unsigned int i;
1643 int err;
1644
29046f9b 1645 for (i = 0; i < enic->intr_count; i++) {
b3d18d19 1646 vnic_intr_mask(&enic->intr[i]);
29046f9b
VK		 1647 (void)vnic_intr_masked(&enic->intr[i]); /* flush write */
1648 }
b3d18d19
SF		 1649
1650 enic_synchronize_irqs(enic);
1651
01f2e4ea
SF		 1652 del_timer_sync(&enic->notify_timer);
1653
383ab92f 1654 enic_dev_disable(enic);
717258ba
VK		 1655
1656 for (i = 0; i < enic->rq_count; i++)
1657 napi_disable(&enic->napi[i]);
1658
b3d18d19
SF		 1659 netif_carrier_off(netdev);
1660 netif_tx_disable(netdev);
3f192795
RP		 1661
1662 if (!enic_is_dynamic(enic))
29639059 1663 enic_dev_del_station_addr(enic);
f8bd9091 1664
01f2e4ea
SF		 1665 for (i = 0; i < enic->wq_count; i++) {
1666 err = vnic_wq_disable(&enic->wq[i]);
1667 if (err)
1668 return err;
1669 }
1670 for (i = 0; i < enic->rq_count; i++) {
1671 err = vnic_rq_disable(&enic->rq[i]);
1672 if (err)
1673 return err;
1674 }
1675
383ab92f 1676 enic_dev_notify_unset(enic);
4b75a442
SF		 1677 enic_free_intr(enic);
1678
01f2e4ea
SF		 1679 for (i = 0; i < enic->wq_count; i++)
1680 vnic_wq_clean(&enic->wq[i], enic_free_wq_buf);
1681 for (i = 0; i < enic->rq_count; i++)
1682 vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
1683 for (i = 0; i < enic->cq_count; i++)
1684 vnic_cq_clean(&enic->cq[i]);
1685 for (i = 0; i < enic->intr_count; i++)
1686 vnic_intr_clean(&enic->intr[i]);
1687
1688 return 0;
1689}
1690
1691static int enic_change_mtu(struct net_device *netdev, int new_mtu)
1692{
1693 struct enic *enic = netdev_priv(netdev);
1694 int running = netif_running(netdev);
1695
25f0a061
SF		 1696 if (new_mtu < ENIC_MIN_MTU || new_mtu > ENIC_MAX_MTU)
1697 return -EINVAL;
1698
c97c894d
RP		 1699 if (enic_is_dynamic(enic))
1700 return -EOPNOTSUPP;
1701
01f2e4ea
SF		 1702 if (running)
1703 enic_stop(netdev);
1704
01f2e4ea
SF		 1705 netdev->mtu = new_mtu;
1706
1707 if (netdev->mtu > enic->port_mtu)
a7a79deb
VK		 1708 netdev_warn(netdev,
1709 "interface MTU (%d) set higher than port MTU (%d)\n",
1710 netdev->mtu, enic->port_mtu);
01f2e4ea
SF		 1711
1712 if (running)
1713 enic_open(netdev);
1714
1715 return 0;
1716}
1717
c97c894d
RP		 1718static void enic_change_mtu_work(struct work_struct *work)
1719{
1720 struct enic *enic = container_of(work, struct enic, change_mtu_work);
1721 struct net_device *netdev = enic->netdev;
1722 int new_mtu = vnic_dev_mtu(enic->vdev);
1723 int err;
1724 unsigned int i;
1725
1726 new_mtu = max_t(int, ENIC_MIN_MTU, min_t(int, ENIC_MAX_MTU, new_mtu));
1727
1728 rtnl_lock();
1729
1730 /* Stop RQ */
1731 del_timer_sync(&enic->notify_timer);
1732
1733 for (i = 0; i < enic->rq_count; i++)
1734 napi_disable(&enic->napi[i]);
1735
1736 vnic_intr_mask(&enic->intr[0]);
1737 enic_synchronize_irqs(enic);
1738 err = vnic_rq_disable(&enic->rq[0]);
1739 if (err) {
1740 netdev_err(netdev, "Unable to disable RQ.\n");
1741 return;
1742 }
1743 vnic_rq_clean(&enic->rq[0], enic_free_rq_buf);
1744 vnic_cq_clean(&enic->cq[0]);
1745 vnic_intr_clean(&enic->intr[0]);
1746
1747 /* Fill RQ with new_mtu-sized buffers */
1748 netdev->mtu = new_mtu;
1749 vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf);
1750 /* Need at least one buffer on ring to get going */
1751 if (vnic_rq_desc_used(&enic->rq[0]) == 0) {
1752 netdev_err(netdev, "Unable to alloc receive buffers.\n");
1753 return;
1754 }
1755
1756 /* Start RQ */
1757 vnic_rq_enable(&enic->rq[0]);
1758 napi_enable(&enic->napi[0]);
1759 vnic_intr_unmask(&enic->intr[0]);
1760 enic_notify_timer_start(enic);
1761
1762 rtnl_unlock();
1763
1764 netdev_info(netdev, "interface MTU set as %d\n", netdev->mtu);
1765}
1766
01f2e4ea
SF		 1767#ifdef CONFIG_NET_POLL_CONTROLLER
1768static void enic_poll_controller(struct net_device *netdev)
1769{
1770 struct enic *enic = netdev_priv(netdev);
1771 struct vnic_dev *vdev = enic->vdev;
717258ba 1772 unsigned int i, intr;
01f2e4ea
SF		 1773
1774 switch (vnic_dev_get_intr_mode(vdev)) {
1775 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK		 1776 for (i = 0; i < enic->rq_count; i++) {
1777 intr = enic_msix_rq_intr(enic, i);
79aeec58
VK		 1778 enic_isr_msix_rq(enic->msix_entry[intr].vector,
1779 &enic->napi[i]);
717258ba 1780 }
b880a954
VK		 1781
1782 for (i = 0; i < enic->wq_count; i++) {
1783 intr = enic_msix_wq_intr(enic, i);
1784 enic_isr_msix_wq(enic->msix_entry[intr].vector, enic);
1785 }
1786
01f2e4ea
SF		 1787 break;
1788 case VNIC_DEV_INTR_MODE_MSI:
1789 enic_isr_msi(enic->pdev->irq, enic);
1790 break;
1791 case VNIC_DEV_INTR_MODE_INTX:
1792 enic_isr_legacy(enic->pdev->irq, netdev);
1793 break;
1794 default:
1795 break;
1796 }
1797}
1798#endif
1799
1800static int enic_dev_wait(struct vnic_dev *vdev,
1801 int (*start)(struct vnic_dev *, int),
1802 int (*finished)(struct vnic_dev *, int *),
1803 int arg)
1804{
1805 unsigned long time;
1806 int done;
1807 int err;
1808
1809 BUG_ON(in_interrupt());
1810
1811 err = start(vdev, arg);
1812 if (err)
1813 return err;
1814
1815 /* Wait for func to complete...2 seconds max
1816 */
1817
1818 time = jiffies + (HZ * 2);
1819 do {
1820
1821 err = finished(vdev, &done);
1822 if (err)
1823 return err;
1824
1825 if (done)
1826 return 0;
1827
1828 schedule_timeout_uninterruptible(HZ / 10);
1829
1830 } while (time_after(time, jiffies));
1831
1832 return -ETIMEDOUT;
1833}
1834
1835static int enic_dev_open(struct enic *enic)
1836{
1837 int err;
1838
1839 err = enic_dev_wait(enic->vdev, vnic_dev_open,
1840 vnic_dev_open_done, 0);
1841 if (err)
a7a79deb
VK		 1842 dev_err(enic_get_dev(enic), "vNIC device open failed, err %d\n",
1843 err);
01f2e4ea
SF		 1844
1845 return err;
1846}
1847
99ef5639 1848static int enic_dev_hang_reset(struct enic *enic)
01f2e4ea
SF		 1849{
1850 int err;
1851
99ef5639
VK		 1852 err = enic_dev_wait(enic->vdev, vnic_dev_hang_reset,
1853 vnic_dev_hang_reset_done, 0);
01f2e4ea 1854 if (err)
a7a79deb
VK		 1855 netdev_err(enic->netdev, "vNIC hang reset failed, err %d\n",
1856 err);
01f2e4ea
SF		 1857
1858 return err;
1859}
1860
717258ba
VK		 1861static int enic_set_rsskey(struct enic *enic)
1862{
1f4f067f 1863 dma_addr_t rss_key_buf_pa;
717258ba
VK		 1864 union vnic_rss_key *rss_key_buf_va = NULL;
1865 union vnic_rss_key rss_key = {
1866 .key[0].b = {85, 67, 83, 97, 119, 101, 115, 111, 109, 101},
1867 .key[1].b = {80, 65, 76, 79, 117, 110, 105, 113, 117, 101},
1868 .key[2].b = {76, 73, 78, 85, 88, 114, 111, 99, 107, 115},
1869 .key[3].b = {69, 78, 73, 67, 105, 115, 99, 111, 111, 108},
1870 };
1871 int err;
1872
1873 rss_key_buf_va = pci_alloc_consistent(enic->pdev,
1874 sizeof(union vnic_rss_key), &rss_key_buf_pa);
1875 if (!rss_key_buf_va)
1876 return -ENOMEM;
1877
1878 memcpy(rss_key_buf_va, &rss_key, sizeof(union vnic_rss_key));
1879
1880 spin_lock(&enic->devcmd_lock);
1881 err = enic_set_rss_key(enic,
1882 rss_key_buf_pa,
1883 sizeof(union vnic_rss_key));
1884 spin_unlock(&enic->devcmd_lock);
1885
1886 pci_free_consistent(enic->pdev, sizeof(union vnic_rss_key),
1887 rss_key_buf_va, rss_key_buf_pa);
1888
1889 return err;
1890}
1891
1892static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits)
1893{
1f4f067f 1894 dma_addr_t rss_cpu_buf_pa;
717258ba
VK		 1895 union vnic_rss_cpu *rss_cpu_buf_va = NULL;
1896 unsigned int i;
1897 int err;
1898
1899 rss_cpu_buf_va = pci_alloc_consistent(enic->pdev,
1900 sizeof(union vnic_rss_cpu), &rss_cpu_buf_pa);
1901 if (!rss_cpu_buf_va)
1902 return -ENOMEM;
1903
1904 for (i = 0; i < (1 << rss_hash_bits); i++)
1905 (*rss_cpu_buf_va).cpu[i/4].b[i%4] = i % enic->rq_count;
1906
1907 spin_lock(&enic->devcmd_lock);
1908 err = enic_set_rss_cpu(enic,
1909 rss_cpu_buf_pa,
1910 sizeof(union vnic_rss_cpu));
1911 spin_unlock(&enic->devcmd_lock);
1912
1913 pci_free_consistent(enic->pdev, sizeof(union vnic_rss_cpu),
1914 rss_cpu_buf_va, rss_cpu_buf_pa);
1915
1916 return err;
1917}
1918
1919static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu,
1920 u8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable)
68f71708 1921{
68f71708
SF		 1922 const u8 tso_ipid_split_en = 0;
1923 const u8 ig_vlan_strip_en = 1;
383ab92f 1924 int err;
68f71708 1925
717258ba
VK		 1926 /* Enable VLAN tag stripping.
1927 */
68f71708 1928
383ab92f
VK		 1929 spin_lock(&enic->devcmd_lock);
1930 err = enic_set_nic_cfg(enic,
68f71708
SF		 1931 rss_default_cpu, rss_hash_type,
1932 rss_hash_bits, rss_base_cpu,
1933 rss_enable, tso_ipid_split_en,
1934 ig_vlan_strip_en);
383ab92f
VK		 1935 spin_unlock(&enic->devcmd_lock);
1936
1937 return err;
1938}
1939
717258ba
VK		 1940static int enic_set_rss_nic_cfg(struct enic *enic)
1941{
1942 struct device *dev = enic_get_dev(enic);
1943 const u8 rss_default_cpu = 0;
1944 const u8 rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4 |
1945 NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 |
1946 NIC_CFG_RSS_HASH_TYPE_IPV6 |
1947 NIC_CFG_RSS_HASH_TYPE_TCP_IPV6;
1948 const u8 rss_hash_bits = 7;
1949 const u8 rss_base_cpu = 0;
1950 u8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1);
1951
1952 if (rss_enable) {
1953 if (!enic_set_rsskey(enic)) {
1954 if (enic_set_rsscpu(enic, rss_hash_bits)) {
1955 rss_enable = 0;
1956 dev_warn(dev, "RSS disabled, "
1957 "Failed to set RSS cpu indirection table.");
1958 }
1959 } else {
1960 rss_enable = 0;
1961 dev_warn(dev, "RSS disabled, Failed to set RSS key.\n");
1962 }
1963 }
1964
1965 return enic_set_niccfg(enic, rss_default_cpu, rss_hash_type,
1966 rss_hash_bits, rss_base_cpu, rss_enable);
f8cac14a
VK		 1967}
1968
01f2e4ea
SF		 1969static void enic_reset(struct work_struct *work)
1970{
1971 struct enic *enic = container_of(work, struct enic, reset);
1972
1973 if (!netif_running(enic->netdev))
1974 return;
1975
1976 rtnl_lock();
1977
383ab92f 1978 enic_dev_hang_notify(enic);
01f2e4ea 1979 enic_stop(enic->netdev);
99ef5639 1980 enic_dev_hang_reset(enic);
e0afe53f 1981 enic_reset_addr_lists(enic);
01f2e4ea 1982 enic_init_vnic_resources(enic);
717258ba 1983 enic_set_rss_nic_cfg(enic);
f8cac14a 1984 enic_dev_set_ig_vlan_rewrite_mode(enic);
01f2e4ea
SF		 1985 enic_open(enic->netdev);
1986
1987 rtnl_unlock();
1988}
1989
1990static int enic_set_intr_mode(struct enic *enic)
1991{
717258ba 1992 unsigned int n = min_t(unsigned int, enic->rq_count, ENIC_RQ_MAX);
1cbb1a61 1993 unsigned int m = min_t(unsigned int, enic->wq_count, ENIC_WQ_MAX);
01f2e4ea
SF		 1994 unsigned int i;
1995
1996 /* Set interrupt mode (INTx, MSI, MSI-X) depending
717258ba 1997 * on system capabilities.
01f2e4ea
SF		 1998 *
1999 * Try MSI-X first
2000 *
2001 * We need n RQs, m WQs, n+m CQs, and n+m+2 INTRs
2002 * (the second to last INTR is used for WQ/RQ errors)
2003 * (the last INTR is used for notifications)
2004 */
2005
2006 BUG_ON(ARRAY_SIZE(enic->msix_entry) < n + m + 2);
2007 for (i = 0; i < n + m + 2; i++)
2008 enic->msix_entry[i].entry = i;
2009
717258ba
VK		 2010 /* Use multiple RQs if RSS is enabled
2011 */
2012
2013 if (ENIC_SETTING(enic, RSS) &&
2014 enic->config.intr_mode < 1 &&
01f2e4ea
SF		 2015 enic->rq_count >= n &&
2016 enic->wq_count >= m &&
2017 enic->cq_count >= n + m &&
717258ba 2018 enic->intr_count >= n + m + 2) {
01f2e4ea 2019
717258ba 2020 if (!pci_enable_msix(enic->pdev, enic->msix_entry, n + m + 2)) {
01f2e4ea 2021
717258ba
VK		 2022 enic->rq_count = n;
2023 enic->wq_count = m;
2024 enic->cq_count = n + m;
2025 enic->intr_count = n + m + 2;
01f2e4ea 2026
717258ba
VK		 2027 vnic_dev_set_intr_mode(enic->vdev,
2028 VNIC_DEV_INTR_MODE_MSIX);
2029
2030 return 0;
2031 }
2032 }
2033
2034 if (enic->config.intr_mode < 1 &&
2035 enic->rq_count >= 1 &&
2036 enic->wq_count >= m &&
2037 enic->cq_count >= 1 + m &&
2038 enic->intr_count >= 1 + m + 2) {
2039 if (!pci_enable_msix(enic->pdev, enic->msix_entry, 1 + m + 2)) {
2040
2041 enic->rq_count = 1;
2042 enic->wq_count = m;
2043 enic->cq_count = 1 + m;
2044 enic->intr_count = 1 + m + 2;
2045
2046 vnic_dev_set_intr_mode(enic->vdev,
2047 VNIC_DEV_INTR_MODE_MSIX);
2048
2049 return 0;
2050 }
01f2e4ea
SF		 2051 }
2052
2053 /* Next try MSI
2054 *
2055 * We need 1 RQ, 1 WQ, 2 CQs, and 1 INTR
2056 */
2057
2058 if (enic->config.intr_mode < 2 &&
2059 enic->rq_count >= 1 &&
2060 enic->wq_count >= 1 &&
2061 enic->cq_count >= 2 &&
2062 enic->intr_count >= 1 &&
2063 !pci_enable_msi(enic->pdev)) {
2064
2065 enic->rq_count = 1;
2066 enic->wq_count = 1;
2067 enic->cq_count = 2;
2068 enic->intr_count = 1;
2069
2070 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_MSI);
2071
2072 return 0;
2073 }
2074
2075 /* Next try INTx
2076 *
2077 * We need 1 RQ, 1 WQ, 2 CQs, and 3 INTRs
2078 * (the first INTR is used for WQ/RQ)
2079 * (the second INTR is used for WQ/RQ errors)
2080 * (the last INTR is used for notifications)
2081 */
2082
2083 if (enic->config.intr_mode < 3 &&
2084 enic->rq_count >= 1 &&
2085 enic->wq_count >= 1 &&
2086 enic->cq_count >= 2 &&
2087 enic->intr_count >= 3) {
2088
2089 enic->rq_count = 1;
2090 enic->wq_count = 1;
2091 enic->cq_count = 2;
2092 enic->intr_count = 3;
2093
2094 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_INTX);
2095
2096 return 0;
2097 }
2098
2099 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
2100
2101 return -EINVAL;
2102}
2103
2104static void enic_clear_intr_mode(struct enic *enic)
2105{
2106 switch (vnic_dev_get_intr_mode(enic->vdev)) {
2107 case VNIC_DEV_INTR_MODE_MSIX:
2108 pci_disable_msix(enic->pdev);
2109 break;
2110 case VNIC_DEV_INTR_MODE_MSI:
2111 pci_disable_msi(enic->pdev);
2112 break;
2113 default:
2114 break;
2115 }
2116
2117 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
2118}
2119
f8bd9091
SF		 2120static const struct net_device_ops enic_netdev_dynamic_ops = {
2121 .ndo_open = enic_open,
2122 .ndo_stop = enic_stop,
2123 .ndo_start_xmit = enic_hard_start_xmit,
f20530bc 2124 .ndo_get_stats64 = enic_get_stats,
f8bd9091 2125 .ndo_validate_addr = eth_validate_addr,
319d7e84 2126 .ndo_set_rx_mode = enic_set_rx_mode,
f8bd9091
SF		 2127 .ndo_set_mac_address = enic_set_mac_address_dynamic,
2128 .ndo_change_mtu = enic_change_mtu,
f8bd9091
SF		 2129 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
2130 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
2131 .ndo_tx_timeout = enic_tx_timeout,
2132 .ndo_set_vf_port = enic_set_vf_port,
2133 .ndo_get_vf_port = enic_get_vf_port,
0b1c00fc 2134 .ndo_set_vf_mac = enic_set_vf_mac,
f8bd9091
SF		 2135#ifdef CONFIG_NET_POLL_CONTROLLER
2136 .ndo_poll_controller = enic_poll_controller,
2137#endif
2138};
2139
afe29f7a
SH		 2140static const struct net_device_ops enic_netdev_ops = {
2141 .ndo_open = enic_open,
2142 .ndo_stop = enic_stop,
00829823 2143 .ndo_start_xmit = enic_hard_start_xmit,
f20530bc 2144 .ndo_get_stats64 = enic_get_stats,
afe29f7a 2145 .ndo_validate_addr = eth_validate_addr,
f8bd9091 2146 .ndo_set_mac_address = enic_set_mac_address,
319d7e84 2147 .ndo_set_rx_mode = enic_set_rx_mode,
afe29f7a 2148 .ndo_change_mtu = enic_change_mtu,
afe29f7a
SH		 2149 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
2150 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
2151 .ndo_tx_timeout = enic_tx_timeout,
3f192795
RP		 2152 .ndo_set_vf_port = enic_set_vf_port,
2153 .ndo_get_vf_port = enic_get_vf_port,
2154 .ndo_set_vf_mac = enic_set_vf_mac,
afe29f7a
SH		 2155#ifdef CONFIG_NET_POLL_CONTROLLER
2156 .ndo_poll_controller = enic_poll_controller,
2157#endif
2158};
2159
2fdba388 2160static void enic_dev_deinit(struct enic *enic)
6fdfa970 2161{
717258ba
VK		 2162 unsigned int i;
2163
2164 for (i = 0; i < enic->rq_count; i++)
2165 netif_napi_del(&enic->napi[i]);
2166
6fdfa970
SF		 2167 enic_free_vnic_resources(enic);
2168 enic_clear_intr_mode(enic);
2169}
2170
2fdba388 2171static int enic_dev_init(struct enic *enic)
6fdfa970 2172{
a7a79deb 2173 struct device *dev = enic_get_dev(enic);
6fdfa970 2174 struct net_device *netdev = enic->netdev;
717258ba 2175 unsigned int i;
6fdfa970
SF		 2176 int err;
2177
ea7ea65a
VK		 2178 /* Get interrupt coalesce timer info */
2179 err = enic_dev_intr_coal_timer_info(enic);
2180 if (err) {
2181 dev_warn(dev, "Using default conversion factor for "
2182 "interrupt coalesce timer\n");
2183 vnic_dev_intr_coal_timer_info_default(enic->vdev);
2184 }
2185
6fdfa970
SF		 2186 /* Get vNIC configuration
2187 */
2188
2189 err = enic_get_vnic_config(enic);
2190 if (err) {
a7a79deb 2191 dev_err(dev, "Get vNIC configuration failed, aborting\n");
6fdfa970
SF		 2192 return err;
2193 }
2194
2195 /* Get available resource counts
2196 */
2197
2198 enic_get_res_counts(enic);
2199
2200 /* Set interrupt mode based on resource counts and system
2201 * capabilities
2202 */
2203
2204 err = enic_set_intr_mode(enic);
2205 if (err) {
a7a79deb
VK		 2206 dev_err(dev, "Failed to set intr mode based on resource "
2207 "counts and system capabilities, aborting\n");
6fdfa970
SF		 2208 return err;
2209 }
2210
2211 /* Allocate and configure vNIC resources
2212 */
2213
2214 err = enic_alloc_vnic_resources(enic);
2215 if (err) {
a7a79deb 2216 dev_err(dev, "Failed to alloc vNIC resources, aborting\n");
6fdfa970
SF		 2217 goto err_out_free_vnic_resources;
2218 }
2219
2220 enic_init_vnic_resources(enic);
2221
717258ba 2222 err = enic_set_rss_nic_cfg(enic);
6fdfa970 2223 if (err) {
a7a79deb 2224 dev_err(dev, "Failed to config nic, aborting\n");
6fdfa970
SF		 2225 goto err_out_free_vnic_resources;
2226 }
2227
2228 switch (vnic_dev_get_intr_mode(enic->vdev)) {
2229 default:
717258ba 2230 netif_napi_add(netdev, &enic->napi[0], enic_poll, 64);
6fdfa970
SF		 2231 break;
2232 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK		 2233 for (i = 0; i < enic->rq_count; i++)
2234 netif_napi_add(netdev, &enic->napi[i],
2235 enic_poll_msix, 64);
6fdfa970
SF		 2236 break;
2237 }
2238
2239 return 0;
2240
2241err_out_free_vnic_resources:
2242 enic_clear_intr_mode(enic);
2243 enic_free_vnic_resources(enic);
2244
2245 return err;
2246}
2247
27e6c7d3
SF		 2248static void enic_iounmap(struct enic *enic)
2249{
2250 unsigned int i;
2251
2252 for (i = 0; i < ARRAY_SIZE(enic->bar); i++)
2253 if (enic->bar[i].vaddr)
2254 iounmap(enic->bar[i].vaddr);
2255}
2256
01f2e4ea
SF		 2257static int __devinit enic_probe(struct pci_dev *pdev,
2258 const struct pci_device_id *ent)
2259{
a7a79deb 2260 struct device *dev = &pdev->dev;
01f2e4ea
SF		 2261 struct net_device *netdev;
2262 struct enic *enic;
2263 int using_dac = 0;
2264 unsigned int i;
2265 int err;
3f192795 2266 int num_pps = 1;
8749b427
RP		 2267#ifdef CONFIG_PCI_IOV
2268 int pos = 0;
2269#endif
01f2e4ea 2270
01f2e4ea
SF		 2271 /* Allocate net device structure and initialize. Private
2272 * instance data is initialized to zero.
2273 */
2274
2275 netdev = alloc_etherdev(sizeof(struct enic));
2276 if (!netdev) {
a7a79deb 2277 pr_err("Etherdev alloc failed, aborting\n");
01f2e4ea
SF		 2278 return -ENOMEM;
2279 }
2280
01f2e4ea
SF		 2281 pci_set_drvdata(pdev, netdev);
2282
2283 SET_NETDEV_DEV(netdev, &pdev->dev);
2284
2285 enic = netdev_priv(netdev);
2286 enic->netdev = netdev;
2287 enic->pdev = pdev;
2288
2289 /* Setup PCI resources
2290 */
2291
29046f9b 2292 err = pci_enable_device_mem(pdev);
01f2e4ea 2293 if (err) {
a7a79deb 2294 dev_err(dev, "Cannot enable PCI device, aborting\n");
01f2e4ea
SF		 2295 goto err_out_free_netdev;
2296 }
2297
2298 err = pci_request_regions(pdev, DRV_NAME);
2299 if (err) {
a7a79deb 2300 dev_err(dev, "Cannot request PCI regions, aborting\n");
01f2e4ea
SF		 2301 goto err_out_disable_device;
2302 }
2303
2304 pci_set_master(pdev);
2305
2306 /* Query PCI controller on system for DMA addressing
2307 * limitation for the device. Try 40-bit first, and
2308 * fail to 32-bit.
2309 */
2310
50cf156a 2311 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(40));
01f2e4ea 2312 if (err) {
284901a9 2313 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
01f2e4ea 2314 if (err) {
a7a79deb 2315 dev_err(dev, "No usable DMA configuration, aborting\n");
01f2e4ea
SF		 2316 goto err_out_release_regions;
2317 }
284901a9 2318 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
01f2e4ea 2319 if (err) {
a7a79deb
VK		 2320 dev_err(dev, "Unable to obtain %u-bit DMA "
2321 "for consistent allocations, aborting\n", 32);
01f2e4ea
SF		 2322 goto err_out_release_regions;
2323 }
2324 } else {
50cf156a 2325 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40));
01f2e4ea 2326 if (err) {
a7a79deb
VK		 2327 dev_err(dev, "Unable to obtain %u-bit DMA "
2328 "for consistent allocations, aborting\n", 40);
01f2e4ea
SF		 2329 goto err_out_release_regions;
2330 }
2331 using_dac = 1;
2332 }
2333
27e6c7d3 2334 /* Map vNIC resources from BAR0-5
01f2e4ea
SF		 2335 */
2336
27e6c7d3
SF		 2337 for (i = 0; i < ARRAY_SIZE(enic->bar); i++) {
2338 if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM))
2339 continue;
2340 enic->bar[i].len = pci_resource_len(pdev, i);
2341 enic->bar[i].vaddr = pci_iomap(pdev, i, enic->bar[i].len);
2342 if (!enic->bar[i].vaddr) {
a7a79deb 2343 dev_err(dev, "Cannot memory-map BAR %d, aborting\n", i);
27e6c7d3
SF		 2344 err = -ENODEV;
2345 goto err_out_iounmap;
2346 }
2347 enic->bar[i].bus_addr = pci_resource_start(pdev, i);
01f2e4ea
SF		 2348 }
2349
2350 /* Register vNIC device
2351 */
2352
27e6c7d3
SF		 2353 enic->vdev = vnic_dev_register(NULL, enic, pdev, enic->bar,
2354 ARRAY_SIZE(enic->bar));
01f2e4ea 2355 if (!enic->vdev) {
a7a79deb 2356 dev_err(dev, "vNIC registration failed, aborting\n");
01f2e4ea
SF		 2357 err = -ENODEV;
2358 goto err_out_iounmap;
2359 }
2360
8749b427
RP		 2361#ifdef CONFIG_PCI_IOV
2362 /* Get number of subvnics */
2363 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
2364 if (pos) {
2365 pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF,
2366 (u16 *)&enic->num_vfs);
2367 if (enic->num_vfs) {
2368 err = pci_enable_sriov(pdev, enic->num_vfs);
2369 if (err) {
2370 dev_err(dev, "SRIOV enable failed, aborting."
2371 " pci_enable_sriov() returned %d\n",
2372 err);
2373 goto err_out_vnic_unregister;
2374 }
2375 enic->priv_flags |= ENIC_SRIOV_ENABLED;
3f192795 2376 num_pps = enic->num_vfs;
8749b427
RP		 2377 }
2378 }
2379
2380#endif
3f192795
RP		 2381 /* Allocate structure for port profiles */
2382 enic->pp = kzalloc(num_pps * sizeof(*enic->pp), GFP_KERNEL);
2383 if (!enic->pp) {
2384 pr_err("port profile alloc failed, aborting\n");
2385 err = -ENOMEM;
2386 goto err_out_disable_sriov;
2387 }
2388
01f2e4ea
SF		 2389 /* Issue device open to get device in known state
2390 */
2391
2392 err = enic_dev_open(enic);
2393 if (err) {
a7a79deb 2394 dev_err(dev, "vNIC dev open failed, aborting\n");
3f192795 2395 goto err_out_free_pp;
01f2e4ea
SF		 2396 }
2397
69161425
VK		 2398 /* Setup devcmd lock
2399 */
2400
2401 spin_lock_init(&enic->devcmd_lock);
2402
2403 /*
2404 * Set ingress vlan rewrite mode before vnic initialization
2405 */
2406
2407 err = enic_dev_set_ig_vlan_rewrite_mode(enic);
2408 if (err) {
2409 dev_err(dev,
2410 "Failed to set ingress vlan rewrite mode, aborting.\n");
2411 goto err_out_dev_close;
2412 }
2413
01f2e4ea
SF		 2414 /* Issue device init to initialize the vnic-to-switch link.
2415 * We'll start with carrier off and wait for link UP
2416 * notification later to turn on carrier. We don't need
2417 * to wait here for the vnic-to-switch link initialization
2418 * to complete; link UP notification is the indication that
2419 * the process is complete.
2420 */
2421
2422 netif_carrier_off(netdev);
2423
a7a79deb
VK		 2424 /* Do not call dev_init for a dynamic vnic.
2425 * For a dynamic vnic, init_prov_info will be
2426 * called later by an upper layer.
2427 */
2428
f8bd9091
SF		 2429 if (!enic_is_dynamic(enic)) {
2430 err = vnic_dev_init(enic->vdev, 0);
2431 if (err) {
a7a79deb 2432 dev_err(dev, "vNIC dev init failed, aborting\n");
f8bd9091
SF		 2433 goto err_out_dev_close;
2434 }
01f2e4ea
SF		 2435 }
2436
6fdfa970 2437 err = enic_dev_init(enic);
01f2e4ea 2438 if (err) {
a7a79deb 2439 dev_err(dev, "Device initialization failed, aborting\n");
01f2e4ea
SF		 2440 goto err_out_dev_close;
2441 }
2442
383ab92f 2443 /* Setup notification timer, HW reset task, and wq locks
01f2e4ea
SF		 2444 */
2445
2446 init_timer(&enic->notify_timer);
2447 enic->notify_timer.function = enic_notify_timer;
2448 enic->notify_timer.data = (unsigned long)enic;
2449
2450 INIT_WORK(&enic->reset, enic_reset);
c97c894d 2451 INIT_WORK(&enic->change_mtu_work, enic_change_mtu_work);
01f2e4ea
SF		 2452
2453 for (i = 0; i < enic->wq_count; i++)
2454 spin_lock_init(&enic->wq_lock[i]);
2455
01f2e4ea
SF		 2456 /* Register net device
2457 */
2458
2459 enic->port_mtu = enic->config.mtu;
2460 (void)enic_change_mtu(netdev, enic->port_mtu);
2461
8749b427
RP		 2462#ifdef CONFIG_PCI_IOV
2463 if (enic_is_dynamic(enic) && pdev->is_virtfn &&
2464 is_zero_ether_addr(enic->mac_addr))
2465 random_ether_addr(enic->mac_addr);
2466#endif
2467
01f2e4ea
SF		 2468 err = enic_set_mac_addr(netdev, enic->mac_addr);
2469 if (err) {
a7a79deb 2470 dev_err(dev, "Invalid MAC address, aborting\n");
6fdfa970 2471 goto err_out_dev_deinit;
01f2e4ea
SF		 2472 }
2473
7c844599
SF		 2474 enic->tx_coalesce_usecs = enic->config.intr_timer_usec;
2475 enic->rx_coalesce_usecs = enic->tx_coalesce_usecs;
2476
f8bd9091
SF		 2477 if (enic_is_dynamic(enic))
2478 netdev->netdev_ops = &enic_netdev_dynamic_ops;
2479 else
2480 netdev->netdev_ops = &enic_netdev_ops;
2481
01f2e4ea
SF		 2482 netdev->watchdog_timeo = 2 * HZ;
2483 netdev->ethtool_ops = &enic_ethtool_ops;
01f2e4ea 2484
73c1ea9b 2485 netdev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
1825aca6
VK		 2486 if (ENIC_SETTING(enic, LOOP)) {
2487 netdev->features &= ~NETIF_F_HW_VLAN_TX;
2488 enic->loop_enable = 1;
2489 enic->loop_tag = enic->config.loop_tag;
2490 dev_info(dev, "loopback tag=0x%04x\n", enic->loop_tag);
2491 }
01f2e4ea 2492 if (ENIC_SETTING(enic, TXCSUM))
5ec8f9b8 2493 netdev->hw_features |= NETIF_F_SG | NETIF_F_HW_CSUM;
01f2e4ea 2494 if (ENIC_SETTING(enic, TSO))
5ec8f9b8 2495 netdev->hw_features |= NETIF_F_TSO |
01f2e4ea 2496 NETIF_F_TSO6 | NETIF_F_TSO_ECN;
5ec8f9b8
MM		 2497 if (ENIC_SETTING(enic, RXCSUM))
2498 netdev->hw_features |= NETIF_F_RXCSUM;
2499
2500 netdev->features |= netdev->hw_features;
2501
01f2e4ea
SF		 2502 if (using_dac)
2503 netdev->features |= NETIF_F_HIGHDMA;
2504
01789349
JP		 2505 netdev->priv_flags |= IFF_UNICAST_FLT;
2506
01f2e4ea
SF		 2507 err = register_netdev(netdev);
2508 if (err) {
a7a79deb 2509 dev_err(dev, "Cannot register net device, aborting\n");
6fdfa970 2510 goto err_out_dev_deinit;
01f2e4ea
SF		 2511 }
2512
2513 return 0;
2514
6fdfa970
SF		 2515err_out_dev_deinit:
2516 enic_dev_deinit(enic);
01f2e4ea
SF		 2517err_out_dev_close:
2518 vnic_dev_close(enic->vdev);
3f192795
RP		 2519err_out_free_pp:
2520 kfree(enic->pp);
8749b427
RP		 2521err_out_disable_sriov:
2522#ifdef CONFIG_PCI_IOV
2523 if (enic_sriov_enabled(enic)) {
2524 pci_disable_sriov(pdev);
2525 enic->priv_flags &= ~ENIC_SRIOV_ENABLED;
2526 }
01f2e4ea 2527err_out_vnic_unregister:
01f2e4ea 2528 vnic_dev_unregister(enic->vdev);
8749b427 2529#endif
01f2e4ea
SF		 2530err_out_iounmap:
2531 enic_iounmap(enic);
2532err_out_release_regions:
2533 pci_release_regions(pdev);
2534err_out_disable_device:
2535 pci_disable_device(pdev);
2536err_out_free_netdev:
2537 pci_set_drvdata(pdev, NULL);
2538 free_netdev(netdev);
2539
2540 return err;
2541}
2542
2543static void __devexit enic_remove(struct pci_dev *pdev)
2544{
2545 struct net_device *netdev = pci_get_drvdata(pdev);
2546
2547 if (netdev) {
2548 struct enic *enic = netdev_priv(netdev);
2549
23f333a2 2550 cancel_work_sync(&enic->reset);
c97c894d 2551 cancel_work_sync(&enic->change_mtu_work);
01f2e4ea 2552 unregister_netdev(netdev);
6fdfa970 2553 enic_dev_deinit(enic);
01f2e4ea 2554 vnic_dev_close(enic->vdev);
8749b427
RP		 2555#ifdef CONFIG_PCI_IOV
2556 if (enic_sriov_enabled(enic)) {
2557 pci_disable_sriov(pdev);
2558 enic->priv_flags &= ~ENIC_SRIOV_ENABLED;
2559 }
2560#endif
3f192795 2561 kfree(enic->pp);
01f2e4ea
SF		 2562 vnic_dev_unregister(enic->vdev);
2563 enic_iounmap(enic);
2564 pci_release_regions(pdev);
2565 pci_disable_device(pdev);
2566 pci_set_drvdata(pdev, NULL);
2567 free_netdev(netdev);
2568 }
2569}
2570
2571static struct pci_driver enic_driver = {
2572 .name = DRV_NAME,
2573 .id_table = enic_id_table,
2574 .probe = enic_probe,
2575 .remove = __devexit_p(enic_remove),
2576};
2577
2578static int __init enic_init_module(void)
2579{
a7a79deb 2580 pr_info("%s, ver %s\n", DRV_DESCRIPTION, DRV_VERSION);
01f2e4ea
SF		 2581
2582 return pci_register_driver(&enic_driver);
2583}
2584
2585static void __exit enic_cleanup_module(void)
2586{
2587 pci_unregister_driver(&enic_driver);
2588}
2589
2590module_init(enic_init_module);
2591module_exit(enic_cleanup_module);
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