]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - drivers/net/ethernet/cisco/enic/vnic_dev.c
Merge tag 'scsi-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi
[mirror_ubuntu-artful-kernel.git] / drivers / net / ethernet / cisco / enic / vnic_dev.c
CommitLineData
01f2e4ea 1/*
29046f9b 2 * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
01f2e4ea
SF
3 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
4 *
5 * This program is free software; you may redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
10 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
11 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
12 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
13 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
14 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
15 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
16 * SOFTWARE.
17 *
18 */
19
20#include <linux/kernel.h>
21#include <linux/errno.h>
22#include <linux/types.h>
23#include <linux/pci.h>
24#include <linux/delay.h>
25#include <linux/if_ether.h>
26
27#include "vnic_resource.h"
28#include "vnic_devcmd.h"
29#include "vnic_dev.h"
373fb087 30#include "vnic_wq.h"
01f2e4ea 31#include "vnic_stats.h"
6a3c2f83 32#include "enic.h"
01f2e4ea 33
01f2e4ea
SF
34#define VNIC_MAX_RES_HDR_SIZE \
35 (sizeof(struct vnic_resource_header) + \
36 sizeof(struct vnic_resource) * RES_TYPE_MAX)
37#define VNIC_RES_STRIDE 128
38
39void *vnic_dev_priv(struct vnic_dev *vdev)
40{
41 return vdev->priv;
42}
43
44static int vnic_dev_discover_res(struct vnic_dev *vdev,
27e6c7d3 45 struct vnic_dev_bar *bar, unsigned int num_bars)
01f2e4ea
SF
46{
47 struct vnic_resource_header __iomem *rh;
90cf0b53 48 struct mgmt_barmap_hdr __iomem *mrh;
01f2e4ea
SF
49 struct vnic_resource __iomem *r;
50 u8 type;
51
27e6c7d3
SF
52 if (num_bars == 0)
53 return -EINVAL;
54
01f2e4ea 55 if (bar->len < VNIC_MAX_RES_HDR_SIZE) {
e327f4e1 56 vdev_err(vdev, "vNIC BAR0 res hdr length error\n");
01f2e4ea
SF
57 return -EINVAL;
58 }
59
90cf0b53
RP
60 rh = bar->vaddr;
61 mrh = bar->vaddr;
01f2e4ea 62 if (!rh) {
e327f4e1 63 vdev_err(vdev, "vNIC BAR0 res hdr not mem-mapped\n");
01f2e4ea
SF
64 return -EINVAL;
65 }
66
90cf0b53
RP
67 /* Check for mgmt vnic in addition to normal vnic */
68 if ((ioread32(&rh->magic) != VNIC_RES_MAGIC) ||
69 (ioread32(&rh->version) != VNIC_RES_VERSION)) {
70 if ((ioread32(&mrh->magic) != MGMTVNIC_MAGIC) ||
71 (ioread32(&mrh->version) != MGMTVNIC_VERSION)) {
e327f4e1 72 vdev_err(vdev, "vNIC BAR0 res magic/version error exp (%lx/%lx) or (%lx/%lx), curr (%x/%x)\n",
6a3c2f83
GV
73 VNIC_RES_MAGIC, VNIC_RES_VERSION,
74 MGMTVNIC_MAGIC, MGMTVNIC_VERSION,
75 ioread32(&rh->magic), ioread32(&rh->version));
90cf0b53
RP
76 return -EINVAL;
77 }
01f2e4ea
SF
78 }
79
90cf0b53
RP
80 if (ioread32(&mrh->magic) == MGMTVNIC_MAGIC)
81 r = (struct vnic_resource __iomem *)(mrh + 1);
82 else
83 r = (struct vnic_resource __iomem *)(rh + 1);
84
01f2e4ea
SF
85
86 while ((type = ioread8(&r->type)) != RES_TYPE_EOL) {
87
88 u8 bar_num = ioread8(&r->bar);
89 u32 bar_offset = ioread32(&r->bar_offset);
90 u32 count = ioread32(&r->count);
91 u32 len;
92
93 r++;
94
27e6c7d3
SF
95 if (bar_num >= num_bars)
96 continue;
97
98 if (!bar[bar_num].len || !bar[bar_num].vaddr)
01f2e4ea
SF
99 continue;
100
101 switch (type) {
102 case RES_TYPE_WQ:
103 case RES_TYPE_RQ:
104 case RES_TYPE_CQ:
105 case RES_TYPE_INTR_CTRL:
106 /* each count is stride bytes long */
107 len = count * VNIC_RES_STRIDE;
27e6c7d3 108 if (len + bar_offset > bar[bar_num].len) {
e327f4e1 109 vdev_err(vdev, "vNIC BAR0 resource %d out-of-bounds, offset 0x%x + size 0x%x > bar len 0x%lx\n",
6a3c2f83
GV
110 type, bar_offset, len,
111 bar[bar_num].len);
01f2e4ea
SF
112 return -EINVAL;
113 }
114 break;
115 case RES_TYPE_INTR_PBA_LEGACY:
116 case RES_TYPE_DEVCMD:
373fb087 117 case RES_TYPE_DEVCMD2:
01f2e4ea
SF
118 len = count;
119 break;
120 default:
121 continue;
122 }
123
124 vdev->res[type].count = count;
27e6c7d3
SF
125 vdev->res[type].vaddr = (char __iomem *)bar[bar_num].vaddr +
126 bar_offset;
127 vdev->res[type].bus_addr = bar[bar_num].bus_addr + bar_offset;
01f2e4ea
SF
128 }
129
130 return 0;
131}
132
133unsigned int vnic_dev_get_res_count(struct vnic_dev *vdev,
134 enum vnic_res_type type)
135{
136 return vdev->res[type].count;
137}
4a50ddfd 138EXPORT_SYMBOL(vnic_dev_get_res_count);
01f2e4ea
SF
139
140void __iomem *vnic_dev_get_res(struct vnic_dev *vdev, enum vnic_res_type type,
141 unsigned int index)
142{
143 if (!vdev->res[type].vaddr)
144 return NULL;
145
146 switch (type) {
147 case RES_TYPE_WQ:
148 case RES_TYPE_RQ:
149 case RES_TYPE_CQ:
150 case RES_TYPE_INTR_CTRL:
151 return (char __iomem *)vdev->res[type].vaddr +
152 index * VNIC_RES_STRIDE;
153 default:
154 return (char __iomem *)vdev->res[type].vaddr;
155 }
156}
4a50ddfd 157EXPORT_SYMBOL(vnic_dev_get_res);
01f2e4ea 158
2fdba388 159static unsigned int vnic_dev_desc_ring_size(struct vnic_dev_ring *ring,
01f2e4ea
SF
160 unsigned int desc_count, unsigned int desc_size)
161{
162 /* The base address of the desc rings must be 512 byte aligned.
163 * Descriptor count is aligned to groups of 32 descriptors. A
164 * count of 0 means the maximum 4096 descriptors. Descriptor
165 * size is aligned to 16 bytes.
166 */
167
168 unsigned int count_align = 32;
169 unsigned int desc_align = 16;
170
171 ring->base_align = 512;
172
173 if (desc_count == 0)
174 desc_count = 4096;
175
176 ring->desc_count = ALIGN(desc_count, count_align);
177
178 ring->desc_size = ALIGN(desc_size, desc_align);
179
180 ring->size = ring->desc_count * ring->desc_size;
181 ring->size_unaligned = ring->size + ring->base_align;
182
183 return ring->size_unaligned;
184}
185
186void vnic_dev_clear_desc_ring(struct vnic_dev_ring *ring)
187{
188 memset(ring->descs, 0, ring->size);
189}
190
191int vnic_dev_alloc_desc_ring(struct vnic_dev *vdev, struct vnic_dev_ring *ring,
192 unsigned int desc_count, unsigned int desc_size)
193{
194 vnic_dev_desc_ring_size(ring, desc_count, desc_size);
195
196 ring->descs_unaligned = pci_alloc_consistent(vdev->pdev,
197 ring->size_unaligned,
198 &ring->base_addr_unaligned);
199
200 if (!ring->descs_unaligned) {
e327f4e1 201 vdev_err(vdev, "Failed to allocate ring (size=%d), aborting\n",
6a3c2f83 202 (int)ring->size);
01f2e4ea
SF
203 return -ENOMEM;
204 }
205
206 ring->base_addr = ALIGN(ring->base_addr_unaligned,
207 ring->base_align);
208 ring->descs = (u8 *)ring->descs_unaligned +
209 (ring->base_addr - ring->base_addr_unaligned);
210
211 vnic_dev_clear_desc_ring(ring);
212
213 ring->desc_avail = ring->desc_count - 1;
214
215 return 0;
216}
217
218void vnic_dev_free_desc_ring(struct vnic_dev *vdev, struct vnic_dev_ring *ring)
219{
220 if (ring->descs) {
221 pci_free_consistent(vdev->pdev,
222 ring->size_unaligned,
223 ring->descs_unaligned,
224 ring->base_addr_unaligned);
225 ring->descs = NULL;
226 }
227}
228
70feadf3
VK
229static int _vnic_dev_cmd(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
230 int wait)
01f2e4ea
SF
231{
232 struct vnic_devcmd __iomem *devcmd = vdev->devcmd;
70feadf3 233 unsigned int i;
01f2e4ea
SF
234 int delay;
235 u32 status;
01f2e4ea
SF
236 int err;
237
238 status = ioread32(&devcmd->status);
506e1198
VK
239 if (status == 0xFFFFFFFF) {
240 /* PCI-e target device is gone */
241 return -ENODEV;
242 }
01f2e4ea 243 if (status & STAT_BUSY) {
e327f4e1 244 vdev_neterr(vdev, "Busy devcmd %d\n", _CMD_N(cmd));
01f2e4ea
SF
245 return -EBUSY;
246 }
247
248 if (_CMD_DIR(cmd) & _CMD_DIR_WRITE) {
70feadf3
VK
249 for (i = 0; i < VNIC_DEVCMD_NARGS; i++)
250 writeq(vdev->args[i], &devcmd->args[i]);
01f2e4ea
SF
251 wmb();
252 }
253
254 iowrite32(cmd, &devcmd->cmd);
255
256 if ((_CMD_FLAGS(cmd) & _CMD_FLAGS_NOWAIT))
27e6c7d3 257 return 0;
01f2e4ea
SF
258
259 for (delay = 0; delay < wait; delay++) {
260
261 udelay(100);
262
263 status = ioread32(&devcmd->status);
506e1198
VK
264 if (status == 0xFFFFFFFF) {
265 /* PCI-e target device is gone */
266 return -ENODEV;
267 }
70feadf3 268
01f2e4ea
SF
269 if (!(status & STAT_BUSY)) {
270
271 if (status & STAT_ERROR) {
27372bf5 272 err = (int)readq(&devcmd->args[0]);
07783f39
SA
273 if (err == ERR_EINVAL &&
274 cmd == CMD_CAPABILITY)
10cc8844 275 return -err;
27372bf5
SF
276 if (err != ERR_ECMDUNKNOWN ||
277 cmd != CMD_CAPABILITY)
e327f4e1 278 vdev_neterr(vdev, "Error %d devcmd %d\n",
6a3c2f83 279 err, _CMD_N(cmd));
10cc8844 280 return -err;
01f2e4ea
SF
281 }
282
283 if (_CMD_DIR(cmd) & _CMD_DIR_READ) {
284 rmb();
70feadf3
VK
285 for (i = 0; i < VNIC_DEVCMD_NARGS; i++)
286 vdev->args[i] = readq(&devcmd->args[i]);
01f2e4ea
SF
287 }
288
289 return 0;
290 }
291 }
292
e327f4e1 293 vdev_neterr(vdev, "Timedout devcmd %d\n", _CMD_N(cmd));
01f2e4ea
SF
294 return -ETIMEDOUT;
295}
296
373fb087
GV
297static int _vnic_dev_cmd2(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
298 int wait)
299{
300 struct devcmd2_controller *dc2c = vdev->devcmd2;
ca7f41a4
SP
301 struct devcmd2_result *result;
302 u8 color;
373fb087
GV
303 unsigned int i;
304 int delay, err;
dafc2199
GV
305 u32 fetch_index, new_posted;
306 u32 posted = dc2c->posted;
373fb087 307
373fb087
GV
308 fetch_index = ioread32(&dc2c->wq_ctrl->fetch_index);
309
dafc2199 310 if (fetch_index == 0xFFFFFFFF)
373fb087
GV
311 return -ENODEV;
312
313 new_posted = (posted + 1) % DEVCMD2_RING_SIZE;
314
315 if (new_posted == fetch_index) {
e327f4e1 316 vdev_neterr(vdev, "devcmd2 %d: wq is full. fetch index: %u, posted index: %u\n",
373fb087
GV
317 _CMD_N(cmd), fetch_index, posted);
318 return -EBUSY;
319 }
320 dc2c->cmd_ring[posted].cmd = cmd;
321 dc2c->cmd_ring[posted].flags = 0;
322
323 if ((_CMD_FLAGS(cmd) & _CMD_FLAGS_NOWAIT))
324 dc2c->cmd_ring[posted].flags |= DEVCMD2_FNORESULT;
325 if (_CMD_DIR(cmd) & _CMD_DIR_WRITE)
326 for (i = 0; i < VNIC_DEVCMD_NARGS; i++)
327 dc2c->cmd_ring[posted].args[i] = vdev->args[i];
328
329 /* Adding write memory barrier prevents compiler and/or CPU reordering,
330 * thus avoiding descriptor posting before descriptor is initialized.
331 * Otherwise, hardware can read stale descriptor fields.
332 */
333 wmb();
334 iowrite32(new_posted, &dc2c->wq_ctrl->posted_index);
dafc2199 335 dc2c->posted = new_posted;
373fb087
GV
336
337 if (dc2c->cmd_ring[posted].flags & DEVCMD2_FNORESULT)
338 return 0;
339
ca7f41a4
SP
340 result = dc2c->result + dc2c->next_result;
341 color = dc2c->color;
342
343 dc2c->next_result++;
344 if (dc2c->next_result == dc2c->result_size) {
345 dc2c->next_result = 0;
346 dc2c->color = dc2c->color ? 0 : 1;
347 }
348
373fb087 349 for (delay = 0; delay < wait; delay++) {
ca7f41a4 350 if (result->color == color) {
373fb087
GV
351 if (result->error) {
352 err = result->error;
353 if (err != ERR_ECMDUNKNOWN ||
354 cmd != CMD_CAPABILITY)
e327f4e1 355 vdev_neterr(vdev, "Error %d devcmd %d\n",
373fb087
GV
356 err, _CMD_N(cmd));
357 return -err;
358 }
359 if (_CMD_DIR(cmd) & _CMD_DIR_READ)
360 for (i = 0; i < VNIC_DEVCMD2_NARGS; i++)
361 vdev->args[i] = result->results[i];
362
363 return 0;
364 }
365 udelay(100);
366 }
367
e327f4e1 368 vdev_neterr(vdev, "devcmd %d timed out\n", _CMD_N(cmd));
373fb087
GV
369
370 return -ETIMEDOUT;
371}
372
373static int vnic_dev_init_devcmd1(struct vnic_dev *vdev)
374{
375 vdev->devcmd = vnic_dev_get_res(vdev, RES_TYPE_DEVCMD, 0);
376 if (!vdev->devcmd)
377 return -ENODEV;
378 vdev->devcmd_rtn = _vnic_dev_cmd;
379
380 return 0;
381}
382
383static int vnic_dev_init_devcmd2(struct vnic_dev *vdev)
384{
385 int err;
386 unsigned int fetch_index;
387
388 if (vdev->devcmd2)
389 return 0;
390
391 vdev->devcmd2 = kzalloc(sizeof(*vdev->devcmd2), GFP_KERNEL);
392 if (!vdev->devcmd2)
393 return -ENOMEM;
394
395 vdev->devcmd2->color = 1;
396 vdev->devcmd2->result_size = DEVCMD2_RING_SIZE;
3dc33e23 397 err = enic_wq_devcmd2_alloc(vdev, &vdev->devcmd2->wq, DEVCMD2_RING_SIZE,
373fb087
GV
398 DEVCMD2_DESC_SIZE);
399 if (err)
400 goto err_free_devcmd2;
401
402 fetch_index = ioread32(&vdev->devcmd2->wq.ctrl->fetch_index);
403 if (fetch_index == 0xFFFFFFFF) { /* check for hardware gone */
e327f4e1 404 vdev_err(vdev, "Fatal error in devcmd2 init - hardware surprise removal\n");
fdf99b3f
CJ
405 err = -ENODEV;
406 goto err_free_wq;
373fb087
GV
407 }
408
3dc33e23 409 enic_wq_init_start(&vdev->devcmd2->wq, 0, fetch_index, fetch_index, 0,
373fb087 410 0);
dafc2199 411 vdev->devcmd2->posted = fetch_index;
373fb087
GV
412 vnic_wq_enable(&vdev->devcmd2->wq);
413
414 err = vnic_dev_alloc_desc_ring(vdev, &vdev->devcmd2->results_ring,
415 DEVCMD2_RING_SIZE, DEVCMD2_DESC_SIZE);
416 if (err)
fdf99b3f 417 goto err_disable_wq;
373fb087
GV
418
419 vdev->devcmd2->result = vdev->devcmd2->results_ring.descs;
420 vdev->devcmd2->cmd_ring = vdev->devcmd2->wq.ring.descs;
421 vdev->devcmd2->wq_ctrl = vdev->devcmd2->wq.ctrl;
422 vdev->args[0] = (u64)vdev->devcmd2->results_ring.base_addr |
423 VNIC_PADDR_TARGET;
424 vdev->args[1] = DEVCMD2_RING_SIZE;
425
426 err = _vnic_dev_cmd2(vdev, CMD_INITIALIZE_DEVCMD2, 1000);
427 if (err)
428 goto err_free_desc_ring;
429
430 vdev->devcmd_rtn = _vnic_dev_cmd2;
431
432 return 0;
433
434err_free_desc_ring:
435 vnic_dev_free_desc_ring(vdev, &vdev->devcmd2->results_ring);
fdf99b3f 436err_disable_wq:
373fb087 437 vnic_wq_disable(&vdev->devcmd2->wq);
fdf99b3f 438err_free_wq:
373fb087
GV
439 vnic_wq_free(&vdev->devcmd2->wq);
440err_free_devcmd2:
441 kfree(vdev->devcmd2);
442 vdev->devcmd2 = NULL;
443
444 return err;
445}
446
447static void vnic_dev_deinit_devcmd2(struct vnic_dev *vdev)
448{
449 vnic_dev_free_desc_ring(vdev, &vdev->devcmd2->results_ring);
450 vnic_wq_disable(&vdev->devcmd2->wq);
451 vnic_wq_free(&vdev->devcmd2->wq);
452 kfree(vdev->devcmd2);
453}
454
889d13f5
RP
455static int vnic_dev_cmd_proxy(struct vnic_dev *vdev,
456 enum vnic_devcmd_cmd proxy_cmd, enum vnic_devcmd_cmd cmd,
457 u64 *a0, u64 *a1, int wait)
70feadf3
VK
458{
459 u32 status;
460 int err;
461
462 memset(vdev->args, 0, sizeof(vdev->args));
463
889d13f5 464 vdev->args[0] = vdev->proxy_index;
70feadf3
VK
465 vdev->args[1] = cmd;
466 vdev->args[2] = *a0;
467 vdev->args[3] = *a1;
468
373fb087 469 err = vdev->devcmd_rtn(vdev, proxy_cmd, wait);
70feadf3
VK
470 if (err)
471 return err;
472
473 status = (u32)vdev->args[0];
474 if (status & STAT_ERROR) {
475 err = (int)vdev->args[1];
476 if (err != ERR_ECMDUNKNOWN ||
477 cmd != CMD_CAPABILITY)
e327f4e1
JP
478 vdev_neterr(vdev, "Error %d proxy devcmd %d\n",
479 err, _CMD_N(cmd));
70feadf3
VK
480 return err;
481 }
482
483 *a0 = vdev->args[1];
484 *a1 = vdev->args[2];
485
486 return 0;
487}
488
489static int vnic_dev_cmd_no_proxy(struct vnic_dev *vdev,
490 enum vnic_devcmd_cmd cmd, u64 *a0, u64 *a1, int wait)
491{
492 int err;
493
494 vdev->args[0] = *a0;
495 vdev->args[1] = *a1;
496
373fb087 497 err = vdev->devcmd_rtn(vdev, cmd, wait);
70feadf3
VK
498
499 *a0 = vdev->args[0];
500 *a1 = vdev->args[1];
501
502 return err;
503}
504
889d13f5
RP
505void vnic_dev_cmd_proxy_by_index_start(struct vnic_dev *vdev, u16 index)
506{
507 vdev->proxy = PROXY_BY_INDEX;
508 vdev->proxy_index = index;
509}
510
511void vnic_dev_cmd_proxy_end(struct vnic_dev *vdev)
512{
513 vdev->proxy = PROXY_NONE;
514 vdev->proxy_index = 0;
515}
516
70feadf3
VK
517int vnic_dev_cmd(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
518 u64 *a0, u64 *a1, int wait)
519{
520 memset(vdev->args, 0, sizeof(vdev->args));
521
522 switch (vdev->proxy) {
889d13f5
RP
523 case PROXY_BY_INDEX:
524 return vnic_dev_cmd_proxy(vdev, CMD_PROXY_BY_INDEX, cmd,
525 a0, a1, wait);
70feadf3 526 case PROXY_BY_BDF:
889d13f5
RP
527 return vnic_dev_cmd_proxy(vdev, CMD_PROXY_BY_BDF, cmd,
528 a0, a1, wait);
70feadf3
VK
529 case PROXY_NONE:
530 default:
531 return vnic_dev_cmd_no_proxy(vdev, cmd, a0, a1, wait);
532 }
533}
534
5e4232ee 535static int vnic_dev_capable(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd)
27372bf5
SF
536{
537 u64 a0 = (u32)cmd, a1 = 0;
538 int wait = 1000;
539 int err;
540
541 err = vnic_dev_cmd(vdev, CMD_CAPABILITY, &a0, &a1, wait);
542
543 return !(err || a0);
544}
545
01f2e4ea
SF
546int vnic_dev_fw_info(struct vnic_dev *vdev,
547 struct vnic_devcmd_fw_info **fw_info)
548{
549 u64 a0, a1 = 0;
550 int wait = 1000;
551 int err = 0;
552
553 if (!vdev->fw_info) {
87f44b4e
JP
554 vdev->fw_info = pci_zalloc_consistent(vdev->pdev,
555 sizeof(struct vnic_devcmd_fw_info),
556 &vdev->fw_info_pa);
01f2e4ea
SF
557 if (!vdev->fw_info)
558 return -ENOMEM;
559
560 a0 = vdev->fw_info_pa;
ea0f0d8b 561 a1 = sizeof(struct vnic_devcmd_fw_info);
01f2e4ea
SF
562
563 /* only get fw_info once and cache it */
f8a6dd59
NP
564 if (vnic_dev_capable(vdev, CMD_MCPU_FW_INFO))
565 err = vnic_dev_cmd(vdev, CMD_MCPU_FW_INFO,
566 &a0, &a1, wait);
567 else
ea0f0d8b
VK
568 err = vnic_dev_cmd(vdev, CMD_MCPU_FW_INFO_OLD,
569 &a0, &a1, wait);
01f2e4ea
SF
570 }
571
572 *fw_info = vdev->fw_info;
573
574 return err;
575}
576
577int vnic_dev_spec(struct vnic_dev *vdev, unsigned int offset, unsigned int size,
578 void *value)
579{
580 u64 a0, a1;
581 int wait = 1000;
582 int err;
583
584 a0 = offset;
585 a1 = size;
586
587 err = vnic_dev_cmd(vdev, CMD_DEV_SPEC, &a0, &a1, wait);
588
589 switch (size) {
590 case 1: *(u8 *)value = (u8)a0; break;
591 case 2: *(u16 *)value = (u16)a0; break;
592 case 4: *(u32 *)value = (u32)a0; break;
593 case 8: *(u64 *)value = a0; break;
594 default: BUG(); break;
595 }
596
597 return err;
598}
599
01f2e4ea
SF
600int vnic_dev_stats_dump(struct vnic_dev *vdev, struct vnic_stats **stats)
601{
602 u64 a0, a1;
603 int wait = 1000;
604
605 if (!vdev->stats) {
606 vdev->stats = pci_alloc_consistent(vdev->pdev,
607 sizeof(struct vnic_stats), &vdev->stats_pa);
608 if (!vdev->stats)
609 return -ENOMEM;
610 }
611
612 *stats = vdev->stats;
613 a0 = vdev->stats_pa;
614 a1 = sizeof(struct vnic_stats);
615
616 return vnic_dev_cmd(vdev, CMD_STATS_DUMP, &a0, &a1, wait);
617}
618
619int vnic_dev_close(struct vnic_dev *vdev)
620{
621 u64 a0 = 0, a1 = 0;
622 int wait = 1000;
623 return vnic_dev_cmd(vdev, CMD_CLOSE, &a0, &a1, wait);
624}
625
2db77e0f 626int vnic_dev_enable_wait(struct vnic_dev *vdev)
01f2e4ea
SF
627{
628 u64 a0 = 0, a1 = 0;
629 int wait = 1000;
2db77e0f 630
f8a6dd59
NP
631 if (vnic_dev_capable(vdev, CMD_ENABLE_WAIT))
632 return vnic_dev_cmd(vdev, CMD_ENABLE_WAIT, &a0, &a1, wait);
633 else
2db77e0f 634 return vnic_dev_cmd(vdev, CMD_ENABLE, &a0, &a1, wait);
01f2e4ea
SF
635}
636
637int vnic_dev_disable(struct vnic_dev *vdev)
638{
639 u64 a0 = 0, a1 = 0;
640 int wait = 1000;
641 return vnic_dev_cmd(vdev, CMD_DISABLE, &a0, &a1, wait);
642}
643
644int vnic_dev_open(struct vnic_dev *vdev, int arg)
645{
646 u64 a0 = (u32)arg, a1 = 0;
647 int wait = 1000;
648 return vnic_dev_cmd(vdev, CMD_OPEN, &a0, &a1, wait);
649}
650
651int vnic_dev_open_done(struct vnic_dev *vdev, int *done)
652{
653 u64 a0 = 0, a1 = 0;
654 int wait = 1000;
655 int err;
656
657 *done = 0;
658
659 err = vnic_dev_cmd(vdev, CMD_OPEN_STATUS, &a0, &a1, wait);
660 if (err)
661 return err;
662
663 *done = (a0 == 0);
664
665 return 0;
666}
667
937317c7 668int vnic_dev_soft_reset(struct vnic_dev *vdev, int arg)
01f2e4ea
SF
669{
670 u64 a0 = (u32)arg, a1 = 0;
671 int wait = 1000;
672 return vnic_dev_cmd(vdev, CMD_SOFT_RESET, &a0, &a1, wait);
673}
674
937317c7 675int vnic_dev_soft_reset_done(struct vnic_dev *vdev, int *done)
01f2e4ea
SF
676{
677 u64 a0 = 0, a1 = 0;
678 int wait = 1000;
679 int err;
680
681 *done = 0;
682
683 err = vnic_dev_cmd(vdev, CMD_SOFT_RESET_STATUS, &a0, &a1, wait);
684 if (err)
685 return err;
686
687 *done = (a0 == 0);
688
689 return 0;
690}
691
99ef5639
VK
692int vnic_dev_hang_reset(struct vnic_dev *vdev, int arg)
693{
694 u64 a0 = (u32)arg, a1 = 0;
695 int wait = 1000;
696 int err;
697
f8a6dd59
NP
698 if (vnic_dev_capable(vdev, CMD_HANG_RESET)) {
699 return vnic_dev_cmd(vdev, CMD_HANG_RESET,
700 &a0, &a1, wait);
701 } else {
99ef5639
VK
702 err = vnic_dev_soft_reset(vdev, arg);
703 if (err)
704 return err;
99ef5639
VK
705 return vnic_dev_init(vdev, 0);
706 }
99ef5639
VK
707}
708
709int vnic_dev_hang_reset_done(struct vnic_dev *vdev, int *done)
710{
711 u64 a0 = 0, a1 = 0;
712 int wait = 1000;
713 int err;
714
715 *done = 0;
716
f8a6dd59
NP
717 if (vnic_dev_capable(vdev, CMD_HANG_RESET_STATUS)) {
718 err = vnic_dev_cmd(vdev, CMD_HANG_RESET_STATUS,
719 &a0, &a1, wait);
720 if (err)
721 return err;
722 } else {
723 return vnic_dev_soft_reset_done(vdev, done);
99ef5639
VK
724 }
725
726 *done = (a0 == 0);
727
728 return 0;
729}
730
01f2e4ea
SF
731int vnic_dev_hang_notify(struct vnic_dev *vdev)
732{
733 u64 a0, a1;
734 int wait = 1000;
735 return vnic_dev_cmd(vdev, CMD_HANG_NOTIFY, &a0, &a1, wait);
736}
737
b13423ee 738int vnic_dev_get_mac_addr(struct vnic_dev *vdev, u8 *mac_addr)
01f2e4ea
SF
739{
740 u64 a0, a1;
741 int wait = 1000;
742 int err, i;
743
744 for (i = 0; i < ETH_ALEN; i++)
745 mac_addr[i] = 0;
746
b13423ee 747 err = vnic_dev_cmd(vdev, CMD_GET_MAC_ADDR, &a0, &a1, wait);
01f2e4ea
SF
748 if (err)
749 return err;
750
751 for (i = 0; i < ETH_ALEN; i++)
752 mac_addr[i] = ((u8 *)&a0)[i];
753
754 return 0;
755}
756
383ab92f 757int vnic_dev_packet_filter(struct vnic_dev *vdev, int directed, int multicast,
01f2e4ea
SF
758 int broadcast, int promisc, int allmulti)
759{
760 u64 a0, a1 = 0;
761 int wait = 1000;
762 int err;
763
764 a0 = (directed ? CMD_PFILTER_DIRECTED : 0) |
765 (multicast ? CMD_PFILTER_MULTICAST : 0) |
766 (broadcast ? CMD_PFILTER_BROADCAST : 0) |
767 (promisc ? CMD_PFILTER_PROMISCUOUS : 0) |
768 (allmulti ? CMD_PFILTER_ALL_MULTICAST : 0);
769
770 err = vnic_dev_cmd(vdev, CMD_PACKET_FILTER, &a0, &a1, wait);
771 if (err)
e327f4e1 772 vdev_neterr(vdev, "Can't set packet filter\n");
383ab92f
VK
773
774 return err;
01f2e4ea
SF
775}
776
f009618a 777int vnic_dev_add_addr(struct vnic_dev *vdev, const u8 *addr)
01f2e4ea
SF
778{
779 u64 a0 = 0, a1 = 0;
780 int wait = 1000;
781 int err;
782 int i;
783
784 for (i = 0; i < ETH_ALEN; i++)
785 ((u8 *)&a0)[i] = addr[i];
786
787 err = vnic_dev_cmd(vdev, CMD_ADDR_ADD, &a0, &a1, wait);
788 if (err)
e327f4e1 789 vdev_neterr(vdev, "Can't add addr [%pM], %d\n", addr, err);
f8bd9091
SF
790
791 return err;
01f2e4ea
SF
792}
793
f009618a 794int vnic_dev_del_addr(struct vnic_dev *vdev, const u8 *addr)
01f2e4ea
SF
795{
796 u64 a0 = 0, a1 = 0;
797 int wait = 1000;
798 int err;
799 int i;
800
801 for (i = 0; i < ETH_ALEN; i++)
802 ((u8 *)&a0)[i] = addr[i];
803
804 err = vnic_dev_cmd(vdev, CMD_ADDR_DEL, &a0, &a1, wait);
805 if (err)
e327f4e1 806 vdev_neterr(vdev, "Can't del addr [%pM], %d\n", addr, err);
f8bd9091
SF
807
808 return err;
01f2e4ea
SF
809}
810
f8cac14a
VK
811int vnic_dev_set_ig_vlan_rewrite_mode(struct vnic_dev *vdev,
812 u8 ig_vlan_rewrite_mode)
813{
814 u64 a0 = ig_vlan_rewrite_mode, a1 = 0;
815 int wait = 1000;
f8cac14a 816
f8a6dd59
NP
817 if (vnic_dev_capable(vdev, CMD_IG_VLAN_REWRITE_MODE))
818 return vnic_dev_cmd(vdev, CMD_IG_VLAN_REWRITE_MODE,
819 &a0, &a1, wait);
820 else
f8cac14a 821 return 0;
f8cac14a
VK
822}
823
2fdba388 824static int vnic_dev_notify_setcmd(struct vnic_dev *vdev,
d883aa76 825 void *notify_addr, dma_addr_t notify_pa, u16 intr)
01f2e4ea
SF
826{
827 u64 a0, a1;
828 int wait = 1000;
27372bf5 829 int r;
01f2e4ea 830
d883aa76
VK
831 memset(notify_addr, 0, sizeof(struct vnic_devcmd_notify));
832 vdev->notify = notify_addr;
833 vdev->notify_pa = notify_pa;
01f2e4ea 834
d883aa76 835 a0 = (u64)notify_pa;
01f2e4ea
SF
836 a1 = ((u64)intr << 32) & 0x0000ffff00000000ULL;
837 a1 += sizeof(struct vnic_devcmd_notify);
838
27372bf5
SF
839 r = vnic_dev_cmd(vdev, CMD_NOTIFY, &a0, &a1, wait);
840 vdev->notify_sz = (r == 0) ? (u32)a1 : 0;
841 return r;
01f2e4ea
SF
842}
843
d883aa76
VK
844int vnic_dev_notify_set(struct vnic_dev *vdev, u16 intr)
845{
846 void *notify_addr;
847 dma_addr_t notify_pa;
848
849 if (vdev->notify || vdev->notify_pa) {
e327f4e1
JP
850 vdev_neterr(vdev, "notify block %p still allocated\n",
851 vdev->notify);
d883aa76
VK
852 return -EINVAL;
853 }
854
855 notify_addr = pci_alloc_consistent(vdev->pdev,
856 sizeof(struct vnic_devcmd_notify),
857 &notify_pa);
858 if (!notify_addr)
859 return -ENOMEM;
860
861 return vnic_dev_notify_setcmd(vdev, notify_addr, notify_pa, intr);
862}
863
2fdba388 864static int vnic_dev_notify_unsetcmd(struct vnic_dev *vdev)
01f2e4ea
SF
865{
866 u64 a0, a1;
867 int wait = 1000;
383ab92f 868 int err;
01f2e4ea
SF
869
870 a0 = 0; /* paddr = 0 to unset notify buffer */
871 a1 = 0x0000ffff00000000ULL; /* intr num = -1 to unreg for intr */
872 a1 += sizeof(struct vnic_devcmd_notify);
873
383ab92f 874 err = vnic_dev_cmd(vdev, CMD_NOTIFY, &a0, &a1, wait);
d883aa76
VK
875 vdev->notify = NULL;
876 vdev->notify_pa = 0;
27372bf5 877 vdev->notify_sz = 0;
383ab92f
VK
878
879 return err;
01f2e4ea
SF
880}
881
383ab92f 882int vnic_dev_notify_unset(struct vnic_dev *vdev)
d883aa76
VK
883{
884 if (vdev->notify) {
885 pci_free_consistent(vdev->pdev,
886 sizeof(struct vnic_devcmd_notify),
887 vdev->notify,
888 vdev->notify_pa);
889 }
890
383ab92f 891 return vnic_dev_notify_unsetcmd(vdev);
d883aa76
VK
892}
893
01f2e4ea
SF
894static int vnic_dev_notify_ready(struct vnic_dev *vdev)
895{
896 u32 *words;
27372bf5 897 unsigned int nwords = vdev->notify_sz / 4;
01f2e4ea
SF
898 unsigned int i;
899 u32 csum;
900
27372bf5 901 if (!vdev->notify || !vdev->notify_sz)
01f2e4ea
SF
902 return 0;
903
904 do {
905 csum = 0;
27372bf5 906 memcpy(&vdev->notify_copy, vdev->notify, vdev->notify_sz);
01f2e4ea
SF
907 words = (u32 *)&vdev->notify_copy;
908 for (i = 1; i < nwords; i++)
909 csum += words[i];
910 } while (csum != words[0]);
911
912 return 1;
913}
914
915int vnic_dev_init(struct vnic_dev *vdev, int arg)
916{
917 u64 a0 = (u32)arg, a1 = 0;
918 int wait = 1000;
4cdc44a2 919 int r = 0;
27372bf5 920
29046f9b 921 if (vnic_dev_capable(vdev, CMD_INIT))
27372bf5
SF
922 r = vnic_dev_cmd(vdev, CMD_INIT, &a0, &a1, wait);
923 else {
924 vnic_dev_cmd(vdev, CMD_INIT_v1, &a0, &a1, wait);
925 if (a0 & CMD_INITF_DEFAULT_MAC) {
70feadf3
VK
926 /* Emulate these for old CMD_INIT_v1 which
927 * didn't pass a0 so no CMD_INITF_*.
928 */
b13423ee 929 vnic_dev_cmd(vdev, CMD_GET_MAC_ADDR, &a0, &a1, wait);
27372bf5
SF
930 vnic_dev_cmd(vdev, CMD_ADDR_ADD, &a0, &a1, wait);
931 }
4cdc44a2
SF
932 }
933 return r;
01f2e4ea
SF
934}
935
f8bd9091
SF
936int vnic_dev_deinit(struct vnic_dev *vdev)
937{
938 u64 a0 = 0, a1 = 0;
939 int wait = 1000;
940
941 return vnic_dev_cmd(vdev, CMD_DEINIT, &a0, &a1, wait);
942}
943
ea7ea65a
VK
944void vnic_dev_intr_coal_timer_info_default(struct vnic_dev *vdev)
945{
946 /* Default: hardware intr coal timer is in units of 1.5 usecs */
947 vdev->intr_coal_timer_info.mul = 2;
948 vdev->intr_coal_timer_info.div = 3;
949 vdev->intr_coal_timer_info.max_usec =
950 vnic_dev_intr_coal_timer_hw_to_usec(vdev, 0xffff);
951}
952
953int vnic_dev_intr_coal_timer_info(struct vnic_dev *vdev)
954{
955 int wait = 1000;
956 int err;
957
958 memset(vdev->args, 0, sizeof(vdev->args));
959
f8a6dd59 960 if (vnic_dev_capable(vdev, CMD_INTR_COAL_CONVERT))
373fb087 961 err = vdev->devcmd_rtn(vdev, CMD_INTR_COAL_CONVERT, wait);
f8a6dd59
NP
962 else
963 err = ERR_ECMDUNKNOWN;
ea7ea65a
VK
964
965 /* Use defaults when firmware doesn't support the devcmd at all or
966 * supports it for only specific hardware
967 */
968 if ((err == ERR_ECMDUNKNOWN) ||
969 (!err && !(vdev->args[0] && vdev->args[1] && vdev->args[2]))) {
e327f4e1 970 vdev_netwarn(vdev, "Using default conversion factor for interrupt coalesce timer\n");
ea7ea65a
VK
971 vnic_dev_intr_coal_timer_info_default(vdev);
972 return 0;
973 }
974
f8a6dd59
NP
975 if (!err) {
976 vdev->intr_coal_timer_info.mul = (u32) vdev->args[0];
977 vdev->intr_coal_timer_info.div = (u32) vdev->args[1];
978 vdev->intr_coal_timer_info.max_usec = (u32) vdev->args[2];
979 }
ea7ea65a
VK
980
981 return err;
982}
983
01f2e4ea
SF
984int vnic_dev_link_status(struct vnic_dev *vdev)
985{
01f2e4ea
SF
986 if (!vnic_dev_notify_ready(vdev))
987 return 0;
988
989 return vdev->notify_copy.link_state;
990}
991
992u32 vnic_dev_port_speed(struct vnic_dev *vdev)
993{
994 if (!vnic_dev_notify_ready(vdev))
995 return 0;
996
997 return vdev->notify_copy.port_speed;
998}
999
1000u32 vnic_dev_msg_lvl(struct vnic_dev *vdev)
1001{
1002 if (!vnic_dev_notify_ready(vdev))
1003 return 0;
1004
1005 return vdev->notify_copy.msglvl;
1006}
1007
1008u32 vnic_dev_mtu(struct vnic_dev *vdev)
1009{
1010 if (!vnic_dev_notify_ready(vdev))
1011 return 0;
1012
1013 return vdev->notify_copy.mtu;
1014}
1015
1016void vnic_dev_set_intr_mode(struct vnic_dev *vdev,
1017 enum vnic_dev_intr_mode intr_mode)
1018{
1019 vdev->intr_mode = intr_mode;
1020}
1021
1022enum vnic_dev_intr_mode vnic_dev_get_intr_mode(
1023 struct vnic_dev *vdev)
1024{
1025 return vdev->intr_mode;
1026}
1027
ea7ea65a
VK
1028u32 vnic_dev_intr_coal_timer_usec_to_hw(struct vnic_dev *vdev, u32 usec)
1029{
1030 return (usec * vdev->intr_coal_timer_info.mul) /
1031 vdev->intr_coal_timer_info.div;
1032}
1033
1034u32 vnic_dev_intr_coal_timer_hw_to_usec(struct vnic_dev *vdev, u32 hw_cycles)
1035{
1036 return (hw_cycles * vdev->intr_coal_timer_info.div) /
1037 vdev->intr_coal_timer_info.mul;
1038}
1039
1040u32 vnic_dev_get_intr_coal_timer_max(struct vnic_dev *vdev)
1041{
1042 return vdev->intr_coal_timer_info.max_usec;
1043}
1044
01f2e4ea
SF
1045void vnic_dev_unregister(struct vnic_dev *vdev)
1046{
1047 if (vdev) {
1048 if (vdev->notify)
1049 pci_free_consistent(vdev->pdev,
1050 sizeof(struct vnic_devcmd_notify),
1051 vdev->notify,
1052 vdev->notify_pa);
01f2e4ea
SF
1053 if (vdev->stats)
1054 pci_free_consistent(vdev->pdev,
29046f9b 1055 sizeof(struct vnic_stats),
01f2e4ea
SF
1056 vdev->stats, vdev->stats_pa);
1057 if (vdev->fw_info)
1058 pci_free_consistent(vdev->pdev,
1059 sizeof(struct vnic_devcmd_fw_info),
1060 vdev->fw_info, vdev->fw_info_pa);
373fb087
GV
1061 if (vdev->devcmd2)
1062 vnic_dev_deinit_devcmd2(vdev);
1063
01f2e4ea
SF
1064 kfree(vdev);
1065 }
1066}
4a50ddfd 1067EXPORT_SYMBOL(vnic_dev_unregister);
01f2e4ea
SF
1068
1069struct vnic_dev *vnic_dev_register(struct vnic_dev *vdev,
27e6c7d3
SF
1070 void *priv, struct pci_dev *pdev, struct vnic_dev_bar *bar,
1071 unsigned int num_bars)
01f2e4ea
SF
1072{
1073 if (!vdev) {
1074 vdev = kzalloc(sizeof(struct vnic_dev), GFP_ATOMIC);
1075 if (!vdev)
1076 return NULL;
1077 }
1078
1079 vdev->priv = priv;
1080 vdev->pdev = pdev;
1081
27e6c7d3 1082 if (vnic_dev_discover_res(vdev, bar, num_bars))
01f2e4ea
SF
1083 goto err_out;
1084
01f2e4ea
SF
1085 return vdev;
1086
1087err_out:
1088 vnic_dev_unregister(vdev);
1089 return NULL;
1090}
4a50ddfd 1091EXPORT_SYMBOL(vnic_dev_register);
1092
1093struct pci_dev *vnic_dev_get_pdev(struct vnic_dev *vdev)
1094{
1095 return vdev->pdev;
1096}
1097EXPORT_SYMBOL(vnic_dev_get_pdev);
01f2e4ea 1098
373fb087
GV
1099int vnic_devcmd_init(struct vnic_dev *vdev)
1100{
f376d4ad 1101 void __iomem *res;
373fb087 1102 int err;
373fb087
GV
1103
1104 res = vnic_dev_get_res(vdev, RES_TYPE_DEVCMD2, 0);
1105 if (res) {
1106 err = vnic_dev_init_devcmd2(vdev);
1107 if (err)
e327f4e1 1108 vdev_warn(vdev, "DEVCMD2 init failed: %d, Using DEVCMD1\n",
373fb087
GV
1109 err);
1110 else
1111 return 0;
1112 } else {
e327f4e1 1113 vdev_warn(vdev, "DEVCMD2 resource not found (old firmware?) Using DEVCMD1\n");
373fb087
GV
1114 }
1115 err = vnic_dev_init_devcmd1(vdev);
1116 if (err)
e327f4e1 1117 vdev_err(vdev, "DEVCMD1 initialization failed: %d\n", err);
373fb087
GV
1118
1119 return err;
1120}
1121
9085fd09
RP
1122int vnic_dev_init_prov2(struct vnic_dev *vdev, u8 *buf, u32 len)
1123{
1124 u64 a0, a1 = len;
1125 int wait = 1000;
1126 dma_addr_t prov_pa;
1127 void *prov_buf;
1128 int ret;
1129
1130 prov_buf = pci_alloc_consistent(vdev->pdev, len, &prov_pa);
1131 if (!prov_buf)
1132 return -ENOMEM;
27372bf5 1133
9085fd09
RP
1134 memcpy(prov_buf, buf, len);
1135
1136 a0 = prov_pa;
1137
1138 ret = vnic_dev_cmd(vdev, CMD_INIT_PROV_INFO2, &a0, &a1, wait);
1139
1140 pci_free_consistent(vdev->pdev, len, prov_buf, prov_pa);
1141
1142 return ret;
1143}
1144
1145int vnic_dev_enable2(struct vnic_dev *vdev, int active)
1146{
1147 u64 a0, a1 = 0;
1148 int wait = 1000;
1149
1150 a0 = (active ? CMD_ENABLE2_ACTIVE : 0);
1151
1152 return vnic_dev_cmd(vdev, CMD_ENABLE2, &a0, &a1, wait);
1153}
1154
1155static int vnic_dev_cmd_status(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
1156 int *status)
1157{
1158 u64 a0 = cmd, a1 = 0;
1159 int wait = 1000;
1160 int ret;
1161
1162 ret = vnic_dev_cmd(vdev, CMD_STATUS, &a0, &a1, wait);
1163 if (!ret)
1164 *status = (int)a0;
1165
1166 return ret;
1167}
1168
1169int vnic_dev_enable2_done(struct vnic_dev *vdev, int *status)
1170{
1171 return vnic_dev_cmd_status(vdev, CMD_ENABLE2, status);
1172}
1173
1174int vnic_dev_deinit_done(struct vnic_dev *vdev, int *status)
1175{
1176 return vnic_dev_cmd_status(vdev, CMD_DEINIT, status);
1177}
d6c81bc6
RP
1178
1179int vnic_dev_set_mac_addr(struct vnic_dev *vdev, u8 *mac_addr)
1180{
1181 u64 a0, a1;
1182 int wait = 1000;
1183 int i;
1184
1185 for (i = 0; i < ETH_ALEN; i++)
1186 ((u8 *)&a0)[i] = mac_addr[i];
1187
1188 return vnic_dev_cmd(vdev, CMD_SET_MAC_ADDR, &a0, &a1, wait);
1189}
63118527
GV
1190
1191/* vnic_dev_classifier: Add/Delete classifier entries
1192 * @vdev: vdev of the device
1193 * @cmd: CLSF_ADD for Add filter
1194 * CLSF_DEL for Delete filter
1195 * @entry: In case of ADD filter, the caller passes the RQ number in this
1196 * variable.
1197 *
1198 * This function stores the filter_id returned by the firmware in the
1199 * same variable before return;
1200 *
1201 * In case of DEL filter, the caller passes the RQ number. Return
1202 * value is irrelevant.
1203 * @data: filter data
1204 */
1205int vnic_dev_classifier(struct vnic_dev *vdev, u8 cmd, u16 *entry,
1206 struct filter *data)
1207{
1208 u64 a0, a1;
1209 int wait = 1000;
1210 dma_addr_t tlv_pa;
1211 int ret = -EINVAL;
1212 struct filter_tlv *tlv, *tlv_va;
1213 struct filter_action *action;
1214 u64 tlv_size;
1215
1216 if (cmd == CLSF_ADD) {
1217 tlv_size = sizeof(struct filter) +
1218 sizeof(struct filter_action) +
1219 2 * sizeof(struct filter_tlv);
1220 tlv_va = pci_alloc_consistent(vdev->pdev, tlv_size, &tlv_pa);
1221 if (!tlv_va)
1222 return -ENOMEM;
1223 tlv = tlv_va;
1224 a0 = tlv_pa;
1225 a1 = tlv_size;
1226 memset(tlv, 0, tlv_size);
1227 tlv->type = CLSF_TLV_FILTER;
1228 tlv->length = sizeof(struct filter);
1229 *(struct filter *)&tlv->val = *data;
1230
1231 tlv = (struct filter_tlv *)((char *)tlv +
1232 sizeof(struct filter_tlv) +
1233 sizeof(struct filter));
1234
1235 tlv->type = CLSF_TLV_ACTION;
1236 tlv->length = sizeof(struct filter_action);
1237 action = (struct filter_action *)&tlv->val;
1238 action->type = FILTER_ACTION_RQ_STEERING;
1239 action->u.rq_idx = *entry;
1240
1241 ret = vnic_dev_cmd(vdev, CMD_ADD_FILTER, &a0, &a1, wait);
1242 *entry = (u16)a0;
1243 pci_free_consistent(vdev->pdev, tlv_size, tlv_va, tlv_pa);
1244 } else if (cmd == CLSF_DEL) {
1245 a0 = *entry;
1246 ret = vnic_dev_cmd(vdev, CMD_DEL_FILTER, &a0, &a1, wait);
1247 }
1248
1249 return ret;
1250}
ca029179
GV
1251
1252int vnic_dev_overlay_offload_ctrl(struct vnic_dev *vdev, u8 overlay, u8 config)
1253{
1254 u64 a0 = overlay;
1255 u64 a1 = config;
1256 int wait = 1000;
1257
1258 return vnic_dev_cmd(vdev, CMD_OVERLAY_OFFLOAD_CTRL, &a0, &a1, wait);
1259}
1260
1261int vnic_dev_overlay_offload_cfg(struct vnic_dev *vdev, u8 overlay,
1262 u16 vxlan_udp_port_number)
1263{
1264 u64 a1 = vxlan_udp_port_number;
1265 u64 a0 = overlay;
1266 int wait = 1000;
1267
1268 return vnic_dev_cmd(vdev, CMD_OVERLAY_OFFLOAD_CFG, &a0, &a1, wait);
1269}
1270
1271int vnic_dev_get_supported_feature_ver(struct vnic_dev *vdev, u8 feature,
1272 u64 *supported_versions)
1273{
1274 u64 a0 = feature;
1275 int wait = 1000;
1276 u64 a1 = 0;
1277 int ret;
1278
1279 ret = vnic_dev_cmd(vdev, CMD_GET_SUPP_FEATURE_VER, &a0, &a1, wait);
1280 if (!ret)
1281 *supported_versions = a0;
1282
1283 return ret;
1284}