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01f2e4ea | 1 | /* |
29046f9b | 2 | * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved. |
01f2e4ea SF |
3 | * Copyright 2007 Nuova Systems, Inc. All rights reserved. |
4 | * | |
5 | * This program is free software; you may redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License as published by | |
7 | * the Free Software Foundation; version 2 of the License. | |
8 | * | |
9 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
10 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
11 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
12 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
13 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
14 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
15 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
16 | * SOFTWARE. | |
17 | * | |
18 | */ | |
19 | ||
20 | #include <linux/kernel.h> | |
21 | #include <linux/errno.h> | |
22 | #include <linux/types.h> | |
23 | #include <linux/pci.h> | |
24 | #include <linux/delay.h> | |
5a0e3ad6 | 25 | #include <linux/slab.h> |
01f2e4ea SF |
26 | |
27 | #include "vnic_dev.h" | |
28 | #include "vnic_rq.h" | |
29 | ||
30 | static int vnic_rq_alloc_bufs(struct vnic_rq *rq) | |
31 | { | |
32 | struct vnic_rq_buf *buf; | |
01f2e4ea SF |
33 | unsigned int i, j, count = rq->ring.desc_count; |
34 | unsigned int blks = VNIC_RQ_BUF_BLKS_NEEDED(count); | |
35 | ||
01f2e4ea | 36 | for (i = 0; i < blks; i++) { |
b5bab85c | 37 | rq->bufs[i] = kzalloc(VNIC_RQ_BUF_BLK_SZ(count), GFP_ATOMIC); |
e404decb | 38 | if (!rq->bufs[i]) |
01f2e4ea | 39 | return -ENOMEM; |
01f2e4ea SF |
40 | } |
41 | ||
42 | for (i = 0; i < blks; i++) { | |
43 | buf = rq->bufs[i]; | |
b5bab85c VK |
44 | for (j = 0; j < VNIC_RQ_BUF_BLK_ENTRIES(count); j++) { |
45 | buf->index = i * VNIC_RQ_BUF_BLK_ENTRIES(count) + j; | |
01f2e4ea SF |
46 | buf->desc = (u8 *)rq->ring.descs + |
47 | rq->ring.desc_size * buf->index; | |
48 | if (buf->index + 1 == count) { | |
49 | buf->next = rq->bufs[0]; | |
50 | break; | |
b5bab85c | 51 | } else if (j + 1 == VNIC_RQ_BUF_BLK_ENTRIES(count)) { |
01f2e4ea SF |
52 | buf->next = rq->bufs[i + 1]; |
53 | } else { | |
54 | buf->next = buf + 1; | |
55 | buf++; | |
56 | } | |
57 | } | |
58 | } | |
59 | ||
60 | rq->to_use = rq->to_clean = rq->bufs[0]; | |
01f2e4ea SF |
61 | |
62 | return 0; | |
63 | } | |
64 | ||
65 | void vnic_rq_free(struct vnic_rq *rq) | |
66 | { | |
67 | struct vnic_dev *vdev; | |
68 | unsigned int i; | |
69 | ||
70 | vdev = rq->vdev; | |
71 | ||
72 | vnic_dev_free_desc_ring(vdev, &rq->ring); | |
73 | ||
74 | for (i = 0; i < VNIC_RQ_BUF_BLKS_MAX; i++) { | |
83217790 RP |
75 | if (rq->bufs[i]) { |
76 | kfree(rq->bufs[i]); | |
77 | rq->bufs[i] = NULL; | |
78 | } | |
01f2e4ea SF |
79 | } |
80 | ||
81 | rq->ctrl = NULL; | |
82 | } | |
83 | ||
84 | int vnic_rq_alloc(struct vnic_dev *vdev, struct vnic_rq *rq, unsigned int index, | |
85 | unsigned int desc_count, unsigned int desc_size) | |
86 | { | |
87 | int err; | |
88 | ||
89 | rq->index = index; | |
90 | rq->vdev = vdev; | |
91 | ||
92 | rq->ctrl = vnic_dev_get_res(vdev, RES_TYPE_RQ, index); | |
93 | if (!rq->ctrl) { | |
a7a79deb | 94 | pr_err("Failed to hook RQ[%d] resource\n", index); |
01f2e4ea SF |
95 | return -EINVAL; |
96 | } | |
97 | ||
98 | vnic_rq_disable(rq); | |
99 | ||
100 | err = vnic_dev_alloc_desc_ring(vdev, &rq->ring, desc_count, desc_size); | |
101 | if (err) | |
102 | return err; | |
103 | ||
104 | err = vnic_rq_alloc_bufs(rq); | |
105 | if (err) { | |
106 | vnic_rq_free(rq); | |
107 | return err; | |
108 | } | |
109 | ||
110 | return 0; | |
111 | } | |
112 | ||
2fdba388 | 113 | static void vnic_rq_init_start(struct vnic_rq *rq, unsigned int cq_index, |
6fdfa970 | 114 | unsigned int fetch_index, unsigned int posted_index, |
01f2e4ea SF |
115 | unsigned int error_interrupt_enable, |
116 | unsigned int error_interrupt_offset) | |
117 | { | |
118 | u64 paddr; | |
b5bab85c | 119 | unsigned int count = rq->ring.desc_count; |
01f2e4ea SF |
120 | |
121 | paddr = (u64)rq->ring.base_addr | VNIC_PADDR_TARGET; | |
122 | writeq(paddr, &rq->ctrl->ring_base); | |
b5bab85c | 123 | iowrite32(count, &rq->ctrl->ring_size); |
01f2e4ea SF |
124 | iowrite32(cq_index, &rq->ctrl->cq_index); |
125 | iowrite32(error_interrupt_enable, &rq->ctrl->error_interrupt_enable); | |
126 | iowrite32(error_interrupt_offset, &rq->ctrl->error_interrupt_offset); | |
127 | iowrite32(0, &rq->ctrl->dropped_packet_count); | |
128 | iowrite32(0, &rq->ctrl->error_status); | |
6fdfa970 SF |
129 | iowrite32(fetch_index, &rq->ctrl->fetch_index); |
130 | iowrite32(posted_index, &rq->ctrl->posted_index); | |
01f2e4ea | 131 | |
01f2e4ea | 132 | rq->to_use = rq->to_clean = |
b5bab85c VK |
133 | &rq->bufs[fetch_index / VNIC_RQ_BUF_BLK_ENTRIES(count)] |
134 | [fetch_index % VNIC_RQ_BUF_BLK_ENTRIES(count)]; | |
6fdfa970 SF |
135 | } |
136 | ||
137 | void vnic_rq_init(struct vnic_rq *rq, unsigned int cq_index, | |
138 | unsigned int error_interrupt_enable, | |
139 | unsigned int error_interrupt_offset) | |
140 | { | |
92e2b469 | 141 | u32 fetch_index = 0; |
01f2e4ea | 142 | |
6fdfa970 SF |
143 | /* Use current fetch_index as the ring starting point */ |
144 | fetch_index = ioread32(&rq->ctrl->fetch_index); | |
145 | ||
506e1198 VK |
146 | if (fetch_index == 0xFFFFFFFF) { /* check for hardware gone */ |
147 | /* Hardware surprise removal: reset fetch_index */ | |
148 | fetch_index = 0; | |
149 | } | |
150 | ||
6fdfa970 SF |
151 | vnic_rq_init_start(rq, cq_index, |
152 | fetch_index, fetch_index, | |
153 | error_interrupt_enable, | |
154 | error_interrupt_offset); | |
01f2e4ea SF |
155 | } |
156 | ||
157 | unsigned int vnic_rq_error_status(struct vnic_rq *rq) | |
158 | { | |
159 | return ioread32(&rq->ctrl->error_status); | |
160 | } | |
161 | ||
162 | void vnic_rq_enable(struct vnic_rq *rq) | |
163 | { | |
164 | iowrite32(1, &rq->ctrl->enable); | |
165 | } | |
166 | ||
167 | int vnic_rq_disable(struct vnic_rq *rq) | |
168 | { | |
169 | unsigned int wait; | |
170 | ||
171 | iowrite32(0, &rq->ctrl->enable); | |
172 | ||
173 | /* Wait for HW to ACK disable request */ | |
b6d24eb6 | 174 | for (wait = 0; wait < 1000; wait++) { |
01f2e4ea SF |
175 | if (!(ioread32(&rq->ctrl->running))) |
176 | return 0; | |
b6d24eb6 | 177 | udelay(10); |
01f2e4ea SF |
178 | } |
179 | ||
a7a79deb | 180 | pr_err("Failed to disable RQ[%d]\n", rq->index); |
01f2e4ea SF |
181 | |
182 | return -ETIMEDOUT; | |
183 | } | |
184 | ||
185 | void vnic_rq_clean(struct vnic_rq *rq, | |
186 | void (*buf_clean)(struct vnic_rq *rq, struct vnic_rq_buf *buf)) | |
187 | { | |
188 | struct vnic_rq_buf *buf; | |
189 | u32 fetch_index; | |
b5bab85c | 190 | unsigned int count = rq->ring.desc_count; |
8b13b4e0 | 191 | int i; |
01f2e4ea | 192 | |
01f2e4ea SF |
193 | buf = rq->to_clean; |
194 | ||
8b13b4e0 | 195 | for (i = 0; i < rq->ring.desc_count; i++) { |
01f2e4ea | 196 | (*buf_clean)(rq, buf); |
8b13b4e0 | 197 | buf = buf->next; |
01f2e4ea | 198 | } |
8b13b4e0 | 199 | rq->ring.desc_avail = rq->ring.desc_count - 1; |
01f2e4ea SF |
200 | |
201 | /* Use current fetch_index as the ring starting point */ | |
202 | fetch_index = ioread32(&rq->ctrl->fetch_index); | |
506e1198 VK |
203 | |
204 | if (fetch_index == 0xFFFFFFFF) { /* check for hardware gone */ | |
205 | /* Hardware surprise removal: reset fetch_index */ | |
206 | fetch_index = 0; | |
207 | } | |
01f2e4ea | 208 | rq->to_use = rq->to_clean = |
b5bab85c VK |
209 | &rq->bufs[fetch_index / VNIC_RQ_BUF_BLK_ENTRIES(count)] |
210 | [fetch_index % VNIC_RQ_BUF_BLK_ENTRIES(count)]; | |
01f2e4ea SF |
211 | iowrite32(fetch_index, &rq->ctrl->posted_index); |
212 | ||
01f2e4ea SF |
213 | vnic_dev_clear_desc_ring(&rq->ring); |
214 | } | |
215 |