[mirror_ubuntu-bionic-kernel.git] / drivers / net / ethernet / cisco / enic / vnic_wq.h

/*
 * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.
 * Copyright 2007 Nuova Systems, Inc.  All rights reserved.
 *
 * This program is free software; you may redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; version 2 of the License.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 *
 */

#ifndef _VNIC_WQ_H_
#define _VNIC_WQ_H_

#include <linux/pci.h>

#include "vnic_dev.h"
#include "vnic_cq.h"

/* Work queue control */
struct vnic_wq_ctrl {
	u64 ring_base;			/* 0x00 */
	u32 ring_size;			/* 0x08 */
	u32 pad0;
	u32 posted_index;		/* 0x10 */
	u32 pad1;
	u32 cq_index;			/* 0x18 */
	u32 pad2;
	u32 enable;			/* 0x20 */
	u32 pad3;
	u32 running;			/* 0x28 */
	u32 pad4;
	u32 fetch_index;		/* 0x30 */
	u32 pad5;
	u32 dca_value;			/* 0x38 */
	u32 pad6;
	u32 error_interrupt_enable;	/* 0x40 */
	u32 pad7;
	u32 error_interrupt_offset;	/* 0x48 */
	u32 pad8;
	u32 error_status;		/* 0x50 */
	u32 pad9;
};

struct vnic_wq_buf {
	struct vnic_wq_buf *next;
	dma_addr_t dma_addr;
	void *os_buf;
	unsigned int len;
	unsigned int index;
	int sop;
	void *desc;
	uint64_t wr_id; /* Cookie */
	uint8_t cq_entry; /* Gets completion event from hw */
	uint8_t desc_skip_cnt; /* Num descs to occupy */
	uint8_t compressed_send; /* Both hdr and payload in one desc */
	struct vnic_wq_buf *prev;
};

/* Break the vnic_wq_buf allocations into blocks of 32/64 entries */
#define VNIC_WQ_BUF_MIN_BLK_ENTRIES 32
#define VNIC_WQ_BUF_DFLT_BLK_ENTRIES 64
#define VNIC_WQ_BUF_BLK_ENTRIES(entries) \
	((unsigned int)((entries < VNIC_WQ_BUF_DFLT_BLK_ENTRIES) ? \
	VNIC_WQ_BUF_MIN_BLK_ENTRIES : VNIC_WQ_BUF_DFLT_BLK_ENTRIES))
#define VNIC_WQ_BUF_BLK_SZ(entries) \
	(VNIC_WQ_BUF_BLK_ENTRIES(entries) * sizeof(struct vnic_wq_buf))
#define VNIC_WQ_BUF_BLKS_NEEDED(entries) \
	DIV_ROUND_UP(entries, VNIC_WQ_BUF_BLK_ENTRIES(entries))
#define VNIC_WQ_BUF_BLKS_MAX VNIC_WQ_BUF_BLKS_NEEDED(4096)

struct vnic_wq {
	unsigned int index;
	struct vnic_dev *vdev;
	struct vnic_wq_ctrl __iomem *ctrl;              /* memory-mapped */
	struct vnic_dev_ring ring;
	struct vnic_wq_buf *bufs[VNIC_WQ_BUF_BLKS_MAX];
	struct vnic_wq_buf *to_use;
	struct vnic_wq_buf *to_clean;
	unsigned int pkts_outstanding;
};

static inline unsigned int vnic_wq_desc_avail(struct vnic_wq *wq)
{
	/* how many does SW own? */
	return wq->ring.desc_avail;
}

static inline unsigned int vnic_wq_desc_used(struct vnic_wq *wq)
{
	/* how many does HW own? */
	return wq->ring.desc_count - wq->ring.desc_avail - 1;
}

static inline void *vnic_wq_next_desc(struct vnic_wq *wq)
{
	return wq->to_use->desc;
}

static inline void vnic_wq_doorbell(struct vnic_wq *wq)
{
	/* Adding write memory barrier prevents compiler and/or CPU
	 * reordering, thus avoiding descriptor posting before
	 * descriptor is initialized. Otherwise, hardware can read
	 * stale descriptor fields.
	 */
	wmb();
	iowrite32(wq->to_use->index, &wq->ctrl->posted_index);
}

static inline void vnic_wq_post(struct vnic_wq *wq,
	void *os_buf, dma_addr_t dma_addr,
	unsigned int len, int sop, int eop,
	uint8_t desc_skip_cnt, uint8_t cq_entry,
	uint8_t compressed_send, uint64_t wrid)
{
	struct vnic_wq_buf *buf = wq->to_use;

	buf->sop = sop;
	buf->cq_entry = cq_entry;
	buf->compressed_send = compressed_send;
	buf->desc_skip_cnt = desc_skip_cnt;
	buf->os_buf = eop ? os_buf : NULL;
	buf->dma_addr = dma_addr;
	buf->len = len;
	buf->wr_id = wrid;

	buf = buf->next;
	wq->to_use = buf;

	wq->ring.desc_avail -= desc_skip_cnt;
}

static inline void vnic_wq_service(struct vnic_wq *wq,
	struct cq_desc *cq_desc, u16 completed_index,
	void (*buf_service)(struct vnic_wq *wq,
	struct cq_desc *cq_desc, struct vnic_wq_buf *buf, void *opaque),
	void *opaque)
{
	struct vnic_wq_buf *buf;

	buf = wq->to_clean;
	while (1) {

		(*buf_service)(wq, cq_desc, buf, opaque);

		wq->ring.desc_avail++;

		wq->to_clean = buf->next;

		if (buf->index == completed_index)
			break;

		buf = wq->to_clean;
	}
}

void vnic_wq_free(struct vnic_wq *wq);
int vnic_wq_alloc(struct vnic_dev *vdev, struct vnic_wq *wq, unsigned int index,
	unsigned int desc_count, unsigned int desc_size);
void vnic_wq_init(struct vnic_wq *wq, unsigned int cq_index,
	unsigned int error_interrupt_enable,
	unsigned int error_interrupt_offset);
unsigned int vnic_wq_error_status(struct vnic_wq *wq);
void vnic_wq_enable(struct vnic_wq *wq);
int vnic_wq_disable(struct vnic_wq *wq);
void vnic_wq_clean(struct vnic_wq *wq,
	void (*buf_clean)(struct vnic_wq *wq, struct vnic_wq_buf *buf));

#endif /* _VNIC_WQ_H_ */
Commit	Line	Data
01f2e4ea	1	/*
29046f9b	2	* Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
01f2e4ea SF	3	* Copyright 2007 Nuova Systems, Inc. All rights reserved.
	4	*
	5	* This program is free software; you may redistribute it and/or modify
	6	* it under the terms of the GNU General Public License as published by
	7	* the Free Software Foundation; version 2 of the License.
	8	*
	9	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	10	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
	11	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	12	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
	13	* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
	14	* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
	15	* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
	16	* SOFTWARE.
	17	*
	18	*/
	19
	20	#ifndef _VNIC_WQ_H_
	21	#define _VNIC_WQ_H_
	22
	23	#include <linux/pci.h>
	24
	25	#include "vnic_dev.h"
	26	#include "vnic_cq.h"
	27
	28	/* Work queue control */
	29	struct vnic_wq_ctrl {
	30	u64 ring_base; /* 0x00 */
	31	u32 ring_size; /* 0x08 */
	32	u32 pad0;
	33	u32 posted_index; /* 0x10 */
	34	u32 pad1;
	35	u32 cq_index; /* 0x18 */
	36	u32 pad2;
	37	u32 enable; /* 0x20 */
	38	u32 pad3;
	39	u32 running; /* 0x28 */
	40	u32 pad4;
	41	u32 fetch_index; /* 0x30 */
	42	u32 pad5;
	43	u32 dca_value; /* 0x38 */
	44	u32 pad6;
	45	u32 error_interrupt_enable; /* 0x40 */
	46	u32 pad7;
	47	u32 error_interrupt_offset; /* 0x48 */
	48	u32 pad8;
	49	u32 error_status; /* 0x50 */
	50	u32 pad9;
	51	};
	52
	53	struct vnic_wq_buf {
	54	struct vnic_wq_buf *next;
	55	dma_addr_t dma_addr;
	56	void *os_buf;
	57	unsigned int len;
	58	unsigned int index;
	59	int sop;
	60	void *desc;
92e2b469 NP	61	uint64_t wr_id; /* Cookie */
	62	uint8_t cq_entry; /* Gets completion event from hw */
	63	uint8_t desc_skip_cnt; /* Num descs to occupy */
	64	uint8_t compressed_send; /* Both hdr and payload in one desc */
5e32066d	65	struct vnic_wq_buf *prev;
01f2e4ea SF	66	};
01f2e4ea SF	67
b5bab85c VK	68	/* Break the vnic_wq_buf allocations into blocks of 32/64 entries */
	69	#define VNIC_WQ_BUF_MIN_BLK_ENTRIES 32
	70	#define VNIC_WQ_BUF_DFLT_BLK_ENTRIES 64
	71	#define VNIC_WQ_BUF_BLK_ENTRIES(entries) \
	72	((unsigned int)((entries < VNIC_WQ_BUF_DFLT_BLK_ENTRIES) ? \
	73	VNIC_WQ_BUF_MIN_BLK_ENTRIES : VNIC_WQ_BUF_DFLT_BLK_ENTRIES))
	74	#define VNIC_WQ_BUF_BLK_SZ(entries) \
	75	(VNIC_WQ_BUF_BLK_ENTRIES(entries) * sizeof(struct vnic_wq_buf))
01f2e4ea	76	#define VNIC_WQ_BUF_BLKS_NEEDED(entries) \
b5bab85c	77	DIV_ROUND_UP(entries, VNIC_WQ_BUF_BLK_ENTRIES(entries))
01f2e4ea SF	78	#define VNIC_WQ_BUF_BLKS_MAX VNIC_WQ_BUF_BLKS_NEEDED(4096)
	79
	80	struct vnic_wq {
	81	unsigned int index;
	82	struct vnic_dev *vdev;
	83	struct vnic_wq_ctrl __iomem ctrl; / memory-mapped */
	84	struct vnic_dev_ring ring;
	85	struct vnic_wq_buf *bufs[VNIC_WQ_BUF_BLKS_MAX];
	86	struct vnic_wq_buf *to_use;
	87	struct vnic_wq_buf *to_clean;
	88	unsigned int pkts_outstanding;
	89	};
	90
	91	static inline unsigned int vnic_wq_desc_avail(struct vnic_wq *wq)
	92	{
	93	/* how many does SW own? */
	94	return wq->ring.desc_avail;
	95	}
	96
	97	static inline unsigned int vnic_wq_desc_used(struct vnic_wq *wq)
	98	{
	99	/* how many does HW own? */
	100	return wq->ring.desc_count - wq->ring.desc_avail - 1;
	101	}
	102
	103	static inline void vnic_wq_next_desc(struct vnic_wq wq)
	104	{
	105	return wq->to_use->desc;
	106	}
	107
f8e34d24 GV	108	static inline void vnic_wq_doorbell(struct vnic_wq *wq)
	109	{
	110	/* Adding write memory barrier prevents compiler and/or CPU
	111	* reordering, thus avoiding descriptor posting before
	112	* descriptor is initialized. Otherwise, hardware can read
	113	* stale descriptor fields.
	114	*/
	115	wmb();
	116	iowrite32(wq->to_use->index, &wq->ctrl->posted_index);
	117	}
	118
01f2e4ea SF	119	static inline void vnic_wq_post(struct vnic_wq *wq,
01f2e4ea SF	120	void *os_buf, dma_addr_t dma_addr,
92e2b469 NP	121	unsigned int len, int sop, int eop,
	122	uint8_t desc_skip_cnt, uint8_t cq_entry,
	123	uint8_t compressed_send, uint64_t wrid)
01f2e4ea SF	124	{
	125	struct vnic_wq_buf *buf = wq->to_use;
	126
	127	buf->sop = sop;
92e2b469 NP	128	buf->cq_entry = cq_entry;
	129	buf->compressed_send = compressed_send;
	130	buf->desc_skip_cnt = desc_skip_cnt;
01f2e4ea SF	131	buf->os_buf = eop ? os_buf : NULL;
	132	buf->dma_addr = dma_addr;
	133	buf->len = len;
92e2b469	134	buf->wr_id = wrid;
01f2e4ea SF	135
01f2e4ea SF	136	buf = buf->next;
01f2e4ea SF	137	wq->to_use = buf;
01f2e4ea SF	138
92e2b469	139	wq->ring.desc_avail -= desc_skip_cnt;
01f2e4ea SF	140	}
	141
	142	static inline void vnic_wq_service(struct vnic_wq *wq,
	143	struct cq_desc *cq_desc, u16 completed_index,
	144	void (buf_service)(struct vnic_wq wq,
	145	struct cq_desc cq_desc, struct vnic_wq_buf buf, void *opaque),
	146	void *opaque)
	147	{
	148	struct vnic_wq_buf *buf;
	149
	150	buf = wq->to_clean;
	151	while (1) {
	152
	153	(*buf_service)(wq, cq_desc, buf, opaque);
	154
	155	wq->ring.desc_avail++;
	156
	157	wq->to_clean = buf->next;
	158
	159	if (buf->index == completed_index)
	160	break;
	161
	162	buf = wq->to_clean;
	163	}
	164	}
	165
	166	void vnic_wq_free(struct vnic_wq *wq);
	167	int vnic_wq_alloc(struct vnic_dev vdev, struct vnic_wq wq, unsigned int index,
	168	unsigned int desc_count, unsigned int desc_size);
	169	void vnic_wq_init(struct vnic_wq *wq, unsigned int cq_index,
	170	unsigned int error_interrupt_enable,
	171	unsigned int error_interrupt_offset);
	172	unsigned int vnic_wq_error_status(struct vnic_wq *wq);
	173	void vnic_wq_enable(struct vnic_wq *wq);
	174	int vnic_wq_disable(struct vnic_wq *wq);
	175	void vnic_wq_clean(struct vnic_wq *wq,
	176	void (buf_clean)(struct vnic_wq wq, struct vnic_wq_buf *buf));
	177
	178	#endif /* _VNIC_WQ_H_ */