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6b7c5b94 | 1 | /* |
7dfbe7d7 | 2 | * Copyright (C) 2005 - 2016 Broadcom |
6b7c5b94 SP |
3 | * All rights reserved. |
4 | * | |
5 | * This program is free software; you can redistribute it and/or | |
6 | * modify it under the terms of the GNU General Public License version 2 | |
7 | * as published by the Free Software Foundation. The full GNU General | |
8 | * Public License is included in this distribution in the file called COPYING. | |
9 | * | |
10 | * Contact Information: | |
d2145cde | 11 | * linux-drivers@emulex.com |
6b7c5b94 | 12 | * |
d2145cde AK |
13 | * Emulex |
14 | * 3333 Susan Street | |
15 | * Costa Mesa, CA 92626 | |
6b7c5b94 SP |
16 | */ |
17 | ||
18 | #ifndef BE_H | |
19 | #define BE_H | |
20 | ||
21 | #include <linux/pci.h> | |
22 | #include <linux/etherdevice.h> | |
6b7c5b94 SP |
23 | #include <linux/delay.h> |
24 | #include <net/tcp.h> | |
25 | #include <net/ip.h> | |
26 | #include <net/ipv6.h> | |
27 | #include <linux/if_vlan.h> | |
28 | #include <linux/workqueue.h> | |
29 | #include <linux/interrupt.h> | |
84517482 | 30 | #include <linux/firmware.h> |
5a0e3ad6 | 31 | #include <linux/slab.h> |
ab1594e9 | 32 | #include <linux/u64_stats_sync.h> |
d658d98a | 33 | #include <linux/cpumask.h> |
29e9122b VD |
34 | #include <linux/hwmon.h> |
35 | #include <linux/hwmon-sysfs.h> | |
6b7c5b94 SP |
36 | |
37 | #include "be_hw.h" | |
045508a8 | 38 | #include "be_roce.h" |
6b7c5b94 | 39 | |
aab0830a | 40 | #define DRV_VER "11.4.0.0" |
6b7c5b94 | 41 | #define DRV_NAME "be2net" |
00d3d51e SB |
42 | #define BE_NAME "Emulex BladeEngine2" |
43 | #define BE3_NAME "Emulex BladeEngine3" | |
44 | #define OC_NAME "Emulex OneConnect" | |
fe6d2a38 SP |
45 | #define OC_NAME_BE OC_NAME "(be3)" |
46 | #define OC_NAME_LANCER OC_NAME "(Lancer)" | |
ecedb6ae | 47 | #define OC_NAME_SH OC_NAME "(Skyhawk)" |
f3effb45 | 48 | #define DRV_DESC "Emulex OneConnect NIC Driver" |
6b7c5b94 | 49 | |
c4ca2374 | 50 | #define BE_VENDOR_ID 0x19a2 |
fe6d2a38 | 51 | #define EMULEX_VENDOR_ID 0x10df |
c4ca2374 | 52 | #define BE_DEVICE_ID1 0x211 |
12d7ea2c | 53 | #define BE_DEVICE_ID2 0x221 |
fe6d2a38 SP |
54 | #define OC_DEVICE_ID1 0x700 /* Device Id for BE2 cards */ |
55 | #define OC_DEVICE_ID2 0x710 /* Device Id for BE3 cards */ | |
56 | #define OC_DEVICE_ID3 0xe220 /* Device id for Lancer cards */ | |
12f4d0a8 | 57 | #define OC_DEVICE_ID4 0xe228 /* Device id for VF in Lancer */ |
ecedb6ae | 58 | #define OC_DEVICE_ID5 0x720 /* Device Id for Skyhawk cards */ |
76b73530 | 59 | #define OC_DEVICE_ID6 0x728 /* Device id for VF in SkyHawk */ |
4762f6ce AK |
60 | #define OC_SUBSYS_DEVICE_ID1 0xE602 |
61 | #define OC_SUBSYS_DEVICE_ID2 0xE642 | |
62 | #define OC_SUBSYS_DEVICE_ID3 0xE612 | |
63 | #define OC_SUBSYS_DEVICE_ID4 0xE652 | |
c4ca2374 | 64 | |
6b7c5b94 | 65 | /* Number of bytes of an RX frame that are copied to skb->data */ |
2e588f84 | 66 | #define BE_HDR_LEN ((u16) 64) |
bb349bb4 | 67 | /* allocate extra space to allow tunneling decapsulation without head reallocation */ |
76b15923 | 68 | #define BE_RX_SKB_ALLOC_SIZE 256 |
bb349bb4 | 69 | |
6b7c5b94 SP |
70 | #define BE_MAX_JUMBO_FRAME_SIZE 9018 |
71 | #define BE_MIN_MTU 256 | |
0d3f5cce KA |
72 | #define BE_MAX_MTU (BE_MAX_JUMBO_FRAME_SIZE - \ |
73 | (ETH_HLEN + ETH_FCS_LEN)) | |
6b7c5b94 | 74 | |
127bfce5 | 75 | /* Accommodate for QnQ configurations where VLAN insertion is enabled in HW */ |
76 | #define BE_MAX_GSO_SIZE (65535 - 2 * VLAN_HLEN) | |
77 | ||
6b7c5b94 | 78 | #define BE_NUM_VLANS_SUPPORTED 64 |
2632bafd | 79 | #define BE_MAX_EQD 128u |
6b7c5b94 SP |
80 | #define BE_MAX_TX_FRAG_COUNT 30 |
81 | ||
82 | #define EVNT_Q_LEN 1024 | |
83 | #define TX_Q_LEN 2048 | |
84 | #define TX_CQ_LEN 1024 | |
85 | #define RX_Q_LEN 1024 /* Does not support any other value */ | |
86 | #define RX_CQ_LEN 1024 | |
5fb379ee | 87 | #define MCC_Q_LEN 128 /* total size not to exceed 8 pages */ |
6b7c5b94 SP |
88 | #define MCC_CQ_LEN 256 |
89 | ||
10ef9ab4 | 90 | #define BE2_MAX_RSS_QS 4 |
68d7bdcb SP |
91 | #define BE3_MAX_RSS_QS 16 |
92 | #define BE3_MAX_TX_QS 16 | |
93 | #define BE3_MAX_EVT_QS 16 | |
e3dc867c | 94 | #define BE3_SRIOV_MAX_EVT_QS 8 |
ee9ad280 SB |
95 | #define SH_VF_MAX_NIC_EQS 3 /* Skyhawk VFs can have a max of 4 EQs |
96 | * and at least 1 is granted to either | |
97 | * SURF/DPDK | |
98 | */ | |
68d7bdcb | 99 | |
de2b1e03 SK |
100 | #define MAX_PORT_RSS_TABLES 15 |
101 | #define MAX_NIC_FUNCS 16 | |
68d7bdcb SP |
102 | #define MAX_RX_QS 32 |
103 | #define MAX_EVT_QS 32 | |
104 | #define MAX_TX_QS 32 | |
10ef9ab4 | 105 | |
045508a8 | 106 | #define MAX_ROCE_EQS 5 |
68d7bdcb | 107 | #define MAX_MSIX_VECTORS 32 |
92bf14ab | 108 | #define MIN_MSIX_VECTORS 1 |
6b7c5b94 | 109 | #define BE_NAPI_WEIGHT 64 |
10ef9ab4 | 110 | #define MAX_RX_POST BE_NAPI_WEIGHT /* Frags posted at a time */ |
6b7c5b94 | 111 | #define RX_FRAGS_REFILL_WM (RX_Q_LEN - MAX_RX_POST) |
69304cc9 | 112 | #define MAX_NUM_POST_ERX_DB 255u |
6b7c5b94 | 113 | |
7c5a5242 | 114 | #define MAX_VFS 30 /* Max VFs supported by BE3 FW */ |
8788fdc2 | 115 | #define FW_VER_LEN 32 |
a155a5db SB |
116 | #define CNTL_SERIAL_NUM_WORDS 8 /* Controller serial number words */ |
117 | #define CNTL_SERIAL_NUM_WORD_SZ (sizeof(u16)) /* Byte-sz of serial num word */ | |
8788fdc2 | 118 | |
e2557877 VD |
119 | #define RSS_INDIR_TABLE_LEN 128 |
120 | #define RSS_HASH_KEY_LEN 40 | |
121 | ||
51d1f98a AK |
122 | #define BE_UNKNOWN_PHY_STATE 0xFF |
123 | ||
6b7c5b94 SP |
124 | struct be_dma_mem { |
125 | void *va; | |
126 | dma_addr_t dma; | |
127 | u32 size; | |
128 | }; | |
129 | ||
130 | struct be_queue_info { | |
b0fd2eb2 | 131 | u32 len; |
132 | u32 entry_size; /* Size of an element in the queue */ | |
133 | u32 tail, head; | |
134 | atomic_t used; /* Number of valid elements in the queue */ | |
135 | u32 id; | |
6b7c5b94 | 136 | struct be_dma_mem dma_mem; |
6b7c5b94 | 137 | bool created; |
6b7c5b94 SP |
138 | }; |
139 | ||
b0fd2eb2 | 140 | static inline u32 MODULO(u32 val, u32 limit) |
5fb379ee SP |
141 | { |
142 | BUG_ON(limit & (limit - 1)); | |
143 | return val & (limit - 1); | |
144 | } | |
145 | ||
b0fd2eb2 | 146 | static inline void index_adv(u32 *index, u32 val, u32 limit) |
5fb379ee SP |
147 | { |
148 | *index = MODULO((*index + val), limit); | |
149 | } | |
150 | ||
b0fd2eb2 | 151 | static inline void index_inc(u32 *index, u32 limit) |
5fb379ee SP |
152 | { |
153 | *index = MODULO((*index + 1), limit); | |
154 | } | |
155 | ||
156 | static inline void *queue_head_node(struct be_queue_info *q) | |
157 | { | |
158 | return q->dma_mem.va + q->head * q->entry_size; | |
159 | } | |
160 | ||
161 | static inline void *queue_tail_node(struct be_queue_info *q) | |
162 | { | |
163 | return q->dma_mem.va + q->tail * q->entry_size; | |
164 | } | |
165 | ||
3de09455 SK |
166 | static inline void *queue_index_node(struct be_queue_info *q, u16 index) |
167 | { | |
168 | return q->dma_mem.va + index * q->entry_size; | |
169 | } | |
170 | ||
5fb379ee SP |
171 | static inline void queue_head_inc(struct be_queue_info *q) |
172 | { | |
173 | index_inc(&q->head, q->len); | |
174 | } | |
175 | ||
b0fd2eb2 | 176 | static inline void index_dec(u32 *index, u32 limit) |
652bf646 PR |
177 | { |
178 | *index = MODULO((*index - 1), limit); | |
179 | } | |
180 | ||
5fb379ee SP |
181 | static inline void queue_tail_inc(struct be_queue_info *q) |
182 | { | |
183 | index_inc(&q->tail, q->len); | |
184 | } | |
185 | ||
5fb379ee SP |
186 | struct be_eq_obj { |
187 | struct be_queue_info q; | |
5fb379ee | 188 | |
10ef9ab4 | 189 | u8 idx; /* array index */ |
f2f781a7 | 190 | u8 msix_idx; |
d0b9cec3 | 191 | u16 spurious_intr; |
5fb379ee | 192 | struct napi_struct napi; |
10ef9ab4 | 193 | struct be_adapter *adapter; |
d658d98a | 194 | cpumask_var_t affinity_mask; |
10ef9ab4 | 195 | } ____cacheline_aligned_in_smp; |
5fb379ee | 196 | |
2632bafd SP |
197 | struct be_aic_obj { /* Adaptive interrupt coalescing (AIC) info */ |
198 | bool enable; | |
199 | u32 min_eqd; /* in usecs */ | |
200 | u32 max_eqd; /* in usecs */ | |
201 | u32 prev_eqd; /* in usecs */ | |
202 | u32 et_eqd; /* configured val when aic is off */ | |
203 | ulong jiffies; | |
204 | u64 rx_pkts_prev; /* Used to calculate RX pps */ | |
205 | u64 tx_reqs_prev; /* Used to calculate TX pps */ | |
206 | }; | |
207 | ||
5fb379ee SP |
208 | struct be_mcc_obj { |
209 | struct be_queue_info q; | |
210 | struct be_queue_info cq; | |
7a1e9b20 | 211 | bool rearm_cq; |
5fb379ee SP |
212 | }; |
213 | ||
3abcdeda | 214 | struct be_tx_stats { |
ac124ff9 SP |
215 | u64 tx_bytes; |
216 | u64 tx_pkts; | |
8670f2a5 | 217 | u64 tx_vxlan_offload_pkts; |
ac124ff9 | 218 | u64 tx_reqs; |
ac124ff9 SP |
219 | u64 tx_compl; |
220 | ulong tx_jiffies; | |
221 | u32 tx_stops; | |
bc617526 | 222 | u32 tx_drv_drops; /* pkts dropped by driver */ |
512bb8a2 KA |
223 | /* the error counters are described in be_ethtool.c */ |
224 | u32 tx_hdr_parse_err; | |
225 | u32 tx_dma_err; | |
226 | u32 tx_tso_err; | |
227 | u32 tx_spoof_check_err; | |
228 | u32 tx_qinq_err; | |
229 | u32 tx_internal_parity_err; | |
ffc39620 | 230 | u32 tx_sge_err; |
ab1594e9 SP |
231 | struct u64_stats_sync sync; |
232 | struct u64_stats_sync sync_compl; | |
6b7c5b94 SP |
233 | }; |
234 | ||
152ffe5b SB |
235 | /* Structure to hold some data of interest obtained from a TX CQE */ |
236 | struct be_tx_compl_info { | |
237 | u8 status; /* Completion status */ | |
238 | u16 end_index; /* Completed TXQ Index */ | |
239 | }; | |
240 | ||
6b7c5b94 | 241 | struct be_tx_obj { |
94d73aaa | 242 | u32 db_offset; |
6b7c5b94 SP |
243 | struct be_queue_info q; |
244 | struct be_queue_info cq; | |
152ffe5b | 245 | struct be_tx_compl_info txcp; |
6b7c5b94 SP |
246 | /* Remember the skbs that were transmitted */ |
247 | struct sk_buff *sent_skb_list[TX_Q_LEN]; | |
3c8def97 | 248 | struct be_tx_stats stats; |
5f07b3c5 SP |
249 | u16 pend_wrb_cnt; /* Number of WRBs yet to be given to HW */ |
250 | u16 last_req_wrb_cnt; /* wrb cnt of the last req in the Q */ | |
251 | u16 last_req_hdr; /* index of the last req's hdr-wrb */ | |
10ef9ab4 | 252 | } ____cacheline_aligned_in_smp; |
6b7c5b94 SP |
253 | |
254 | /* Struct to remember the pages posted for rx frags */ | |
255 | struct be_rx_page_info { | |
256 | struct page *page; | |
e50287be | 257 | /* set to page-addr for last frag of the page & frag-addr otherwise */ |
fac6da5b | 258 | DEFINE_DMA_UNMAP_ADDR(bus); |
6b7c5b94 | 259 | u16 page_offset; |
e50287be | 260 | bool last_frag; /* last frag of the page */ |
6b7c5b94 SP |
261 | }; |
262 | ||
3abcdeda | 263 | struct be_rx_stats { |
3abcdeda | 264 | u64 rx_bytes; |
3abcdeda | 265 | u64 rx_pkts; |
8670f2a5 | 266 | u64 rx_vxlan_offload_pkts; |
ac124ff9 SP |
267 | u32 rx_drops_no_skbs; /* skb allocation errors */ |
268 | u32 rx_drops_no_frags; /* HW has no fetched frags */ | |
269 | u32 rx_post_fail; /* page post alloc failures */ | |
ac124ff9 | 270 | u32 rx_compl; |
3abcdeda | 271 | u32 rx_mcast_pkts; |
ac124ff9 | 272 | u32 rx_compl_err; /* completions with err set */ |
ab1594e9 | 273 | struct u64_stats_sync sync; |
3abcdeda SP |
274 | }; |
275 | ||
2e588f84 SP |
276 | struct be_rx_compl_info { |
277 | u32 rss_hash; | |
6709d952 | 278 | u16 vlan_tag; |
2e588f84 | 279 | u16 pkt_size; |
12004ae9 | 280 | u16 port; |
2e588f84 SP |
281 | u8 vlanf; |
282 | u8 num_rcvd; | |
283 | u8 err; | |
284 | u8 ipf; | |
285 | u8 tcpf; | |
286 | u8 udpf; | |
287 | u8 ip_csum; | |
288 | u8 l4_csum; | |
289 | u8 ipv6; | |
f93f160b | 290 | u8 qnq; |
2e588f84 | 291 | u8 pkt_type; |
e38b1706 | 292 | u8 ip_frag; |
c9c47142 | 293 | u8 tunneled; |
2e588f84 SP |
294 | }; |
295 | ||
6b7c5b94 | 296 | struct be_rx_obj { |
3abcdeda | 297 | struct be_adapter *adapter; |
6b7c5b94 SP |
298 | struct be_queue_info q; |
299 | struct be_queue_info cq; | |
2e588f84 | 300 | struct be_rx_compl_info rxcp; |
6b7c5b94 | 301 | struct be_rx_page_info page_info_tbl[RX_Q_LEN]; |
3abcdeda SP |
302 | struct be_rx_stats stats; |
303 | u8 rss_id; | |
304 | bool rx_post_starved; /* Zero rx frags have been posted to BE */ | |
10ef9ab4 | 305 | } ____cacheline_aligned_in_smp; |
6b7c5b94 | 306 | |
609ff3bb | 307 | struct be_drv_stats { |
ac124ff9 | 308 | u32 eth_red_drops; |
d3de1540 | 309 | u32 dma_map_errors; |
ac124ff9 SP |
310 | u32 rx_drops_no_pbuf; |
311 | u32 rx_drops_no_txpb; | |
312 | u32 rx_drops_no_erx_descr; | |
313 | u32 rx_drops_no_tpre_descr; | |
314 | u32 rx_drops_too_many_frags; | |
ac124ff9 SP |
315 | u32 forwarded_packets; |
316 | u32 rx_drops_mtu; | |
317 | u32 rx_crc_errors; | |
318 | u32 rx_alignment_symbol_errors; | |
319 | u32 rx_pause_frames; | |
320 | u32 rx_priority_pause_frames; | |
321 | u32 rx_control_frames; | |
322 | u32 rx_in_range_errors; | |
323 | u32 rx_out_range_errors; | |
324 | u32 rx_frame_too_long; | |
18fb06a1 | 325 | u32 rx_address_filtered; |
ac124ff9 SP |
326 | u32 rx_dropped_too_small; |
327 | u32 rx_dropped_too_short; | |
328 | u32 rx_dropped_header_too_small; | |
329 | u32 rx_dropped_tcp_length; | |
330 | u32 rx_dropped_runt; | |
331 | u32 rx_ip_checksum_errs; | |
332 | u32 rx_tcp_checksum_errs; | |
333 | u32 rx_udp_checksum_errs; | |
334 | u32 tx_pauseframes; | |
335 | u32 tx_priority_pauseframes; | |
336 | u32 tx_controlframes; | |
337 | u32 rxpp_fifo_overflow_drop; | |
338 | u32 rx_input_fifo_overflow_drop; | |
339 | u32 pmem_fifo_overflow_drop; | |
340 | u32 jabber_events; | |
461ae379 AK |
341 | u32 rx_roce_bytes_lsd; |
342 | u32 rx_roce_bytes_msd; | |
343 | u32 rx_roce_frames; | |
344 | u32 roce_drops_payload_len; | |
345 | u32 roce_drops_crc; | |
609ff3bb AK |
346 | }; |
347 | ||
c502224e SK |
348 | /* A vlan-id of 0xFFFF must be used to clear transparent vlan-tagging */ |
349 | #define BE_RESET_VLAN_TAG_ID 0xFFFF | |
350 | ||
64600ea5 | 351 | struct be_vf_cfg { |
11ac75ed SP |
352 | unsigned char mac_addr[ETH_ALEN]; |
353 | int if_handle; | |
354 | int pmac_id; | |
355 | u16 vlan_tag; | |
356 | u32 tx_rate; | |
bdce2ad7 | 357 | u32 plink_tracking; |
435452aa | 358 | u32 privileges; |
e7bcbd7b | 359 | bool spoofchk; |
64600ea5 AK |
360 | }; |
361 | ||
39f1d94d SP |
362 | enum vf_state { |
363 | ENABLED = 0, | |
364 | ASSIGNED = 1 | |
365 | }; | |
366 | ||
83b06116 VV |
367 | #define BE_FLAGS_LINK_STATUS_INIT BIT(1) |
368 | #define BE_FLAGS_SRIOV_ENABLED BIT(2) | |
369 | #define BE_FLAGS_WORKER_SCHEDULED BIT(3) | |
83b06116 VV |
370 | #define BE_FLAGS_NAPI_ENABLED BIT(6) |
371 | #define BE_FLAGS_QNQ_ASYNC_EVT_RCVD BIT(7) | |
372 | #define BE_FLAGS_VXLAN_OFFLOADS BIT(8) | |
373 | #define BE_FLAGS_SETUP_DONE BIT(9) | |
51d1f98a | 374 | #define BE_FLAGS_PHY_MISCONFIGURED BIT(10) |
eb7dd46c | 375 | #define BE_FLAGS_ERR_DETECTION_SCHEDULED BIT(11) |
760c295e | 376 | #define BE_FLAGS_OS2BMC BIT(12) |
710f3e59 | 377 | #define BE_FLAGS_TRY_RECOVERY BIT(13) |
b236916a | 378 | |
c9c47142 SP |
379 | #define BE_UC_PMAC_COUNT 30 |
380 | #define BE_VF_UC_PMAC_COUNT 2 | |
f0613380 | 381 | |
972f37b4 PR |
382 | #define MAX_ERR_RECOVERY_RETRY_COUNT 3 |
383 | #define ERR_DETECTION_DELAY 1000 | |
972f37b4 | 384 | |
5c510811 SK |
385 | /* Ethtool set_dump flags */ |
386 | #define LANCER_INITIATE_FW_DUMP 0x1 | |
f0613380 | 387 | #define LANCER_DELETE_FW_DUMP 0x2 |
5c510811 | 388 | |
42f11cf2 | 389 | struct phy_info { |
21252377 VV |
390 | /* From SFF-8472 spec */ |
391 | #define SFP_VENDOR_NAME_LEN 17 | |
42f11cf2 AK |
392 | u8 transceiver; |
393 | u8 autoneg; | |
394 | u8 fc_autoneg; | |
395 | u8 port_type; | |
396 | u16 phy_type; | |
397 | u16 interface_type; | |
398 | u32 misc_params; | |
399 | u16 auto_speeds_supported; | |
400 | u16 fixed_speeds_supported; | |
401 | int link_speed; | |
42f11cf2 AK |
402 | u32 advertising; |
403 | u32 supported; | |
6809cee0 | 404 | u8 cable_type; |
21252377 VV |
405 | u8 vendor_name[SFP_VENDOR_NAME_LEN]; |
406 | u8 vendor_pn[SFP_VENDOR_NAME_LEN]; | |
42f11cf2 AK |
407 | }; |
408 | ||
92bf14ab SP |
409 | struct be_resources { |
410 | u16 max_vfs; /* Total VFs "really" supported by FW/HW */ | |
411 | u16 max_mcast_mac; | |
412 | u16 max_tx_qs; | |
413 | u16 max_rss_qs; | |
414 | u16 max_rx_qs; | |
f2858738 | 415 | u16 max_cq_count; |
92bf14ab SP |
416 | u16 max_uc_mac; /* Max UC MACs programmable */ |
417 | u16 max_vlans; /* Number of vlans supported */ | |
f2858738 VV |
418 | u16 max_iface_count; |
419 | u16 max_mcc_count; | |
92bf14ab | 420 | u16 max_evt_qs; |
ce7faf0a | 421 | u16 max_nic_evt_qs; /* NIC's share of evt qs */ |
92bf14ab | 422 | u32 if_cap_flags; |
10cccf60 | 423 | u32 vf_if_cap_flags; /* VF if capability flags */ |
b9263cbf | 424 | u32 flags; |
de2b1e03 SK |
425 | /* Calculated PF Pool's share of RSS Tables. This is not enforced by |
426 | * the FW, but is a self-imposed driver limitation. | |
427 | */ | |
428 | u16 max_rss_tables; | |
429 | }; | |
430 | ||
431 | /* These are port-wide values */ | |
432 | struct be_port_resources { | |
433 | u16 max_vfs; | |
434 | u16 nic_pfs; | |
92bf14ab SP |
435 | }; |
436 | ||
760c295e VD |
437 | #define be_is_os2bmc_enabled(adapter) (adapter->flags & BE_FLAGS_OS2BMC) |
438 | ||
e2557877 VD |
439 | struct rss_info { |
440 | u64 rss_flags; | |
441 | u8 rsstable[RSS_INDIR_TABLE_LEN]; | |
442 | u8 rss_queue[RSS_INDIR_TABLE_LEN]; | |
443 | u8 rss_hkey[RSS_HASH_KEY_LEN]; | |
444 | }; | |
445 | ||
29e9122b VD |
446 | #define BE_INVALID_DIE_TEMP 0xFF |
447 | struct be_hwmon { | |
448 | struct device *hwmon_dev; | |
449 | u8 be_on_die_temp; /* Unit: millidegree Celsius */ | |
450 | }; | |
451 | ||
804abcdb SB |
452 | /* Macros to read/write the 'features' word of be_wrb_params structure. |
453 | */ | |
454 | #define BE_WRB_F_BIT(name) BE_WRB_F_##name##_BIT | |
455 | #define BE_WRB_F_MASK(name) BIT_MASK(BE_WRB_F_##name##_BIT) | |
456 | ||
457 | #define BE_WRB_F_GET(word, name) \ | |
458 | (((word) & (BE_WRB_F_MASK(name))) >> BE_WRB_F_BIT(name)) | |
459 | ||
460 | #define BE_WRB_F_SET(word, name, val) \ | |
461 | ((word) |= (((val) << BE_WRB_F_BIT(name)) & BE_WRB_F_MASK(name))) | |
462 | ||
463 | /* Feature/offload bits */ | |
464 | enum { | |
465 | BE_WRB_F_CRC_BIT, /* Ethernet CRC */ | |
466 | BE_WRB_F_IPCS_BIT, /* IP csum */ | |
467 | BE_WRB_F_TCPCS_BIT, /* TCP csum */ | |
468 | BE_WRB_F_UDPCS_BIT, /* UDP csum */ | |
469 | BE_WRB_F_LSO_BIT, /* LSO */ | |
470 | BE_WRB_F_LSO6_BIT, /* LSO6 */ | |
471 | BE_WRB_F_VLAN_BIT, /* VLAN */ | |
760c295e VD |
472 | BE_WRB_F_VLAN_SKIP_HW_BIT, /* Skip VLAN tag (workaround) */ |
473 | BE_WRB_F_OS2BMC_BIT /* Send packet to the management ring */ | |
804abcdb SB |
474 | }; |
475 | ||
476 | /* The structure below provides a HW-agnostic abstraction of WRB params | |
477 | * retrieved from a TX skb. This is in turn passed to chip specific routines | |
478 | * during transmit, to set the corresponding params in the WRB. | |
479 | */ | |
480 | struct be_wrb_params { | |
481 | u32 features; /* Feature bits */ | |
482 | u16 vlan_tag; /* VLAN tag */ | |
483 | u16 lso_mss; /* MSS for LSO */ | |
484 | }; | |
485 | ||
b7172414 SP |
486 | struct be_eth_addr { |
487 | unsigned char mac[ETH_ALEN]; | |
488 | }; | |
489 | ||
710f3e59 SB |
490 | #define BE_SEC 1000 /* in msec */ |
491 | #define BE_MIN (60 * BE_SEC) /* in msec */ | |
492 | #define BE_HOUR (60 * BE_MIN) /* in msec */ | |
493 | ||
494 | #define ERR_RECOVERY_MAX_RETRY_COUNT 3 | |
495 | #define ERR_RECOVERY_DETECTION_DELAY BE_SEC | |
496 | #define ERR_RECOVERY_RETRY_DELAY (30 * BE_SEC) | |
497 | ||
498 | /* UE-detection-duration in BEx/Skyhawk: | |
499 | * All PFs must wait for this duration after they detect UE before reading | |
500 | * SLIPORT_SEMAPHORE register. At the end of this duration, the Firmware | |
501 | * guarantees that the SLIPORT_SEMAPHORE register is updated to indicate | |
502 | * if the UE is recoverable. | |
503 | */ | |
504 | #define ERR_RECOVERY_UE_DETECT_DURATION BE_SEC | |
505 | ||
506 | /* Initial idle time (in msec) to elapse after driver load, | |
507 | * before UE recovery is allowed. | |
508 | */ | |
509 | #define ERR_IDLE_HR 24 | |
510 | #define ERR_RECOVERY_IDLE_TIME (ERR_IDLE_HR * BE_HOUR) | |
511 | ||
512 | /* Time interval (in msec) after which UE recovery can be repeated */ | |
513 | #define ERR_INTERVAL_HR 72 | |
514 | #define ERR_RECOVERY_INTERVAL (ERR_INTERVAL_HR * BE_HOUR) | |
515 | ||
516 | /* BEx/SH UE recovery state machine */ | |
517 | enum { | |
518 | ERR_RECOVERY_ST_NONE = 0, /* No Recovery */ | |
519 | ERR_RECOVERY_ST_DETECT = 1, /* UE detection duration */ | |
520 | ERR_RECOVERY_ST_RESET = 2, /* Reset Phase (PF0 only) */ | |
521 | ERR_RECOVERY_ST_PRE_POLL = 3, /* Pre-Poll Phase (all PFs) */ | |
522 | ERR_RECOVERY_ST_REINIT = 4 /* Re-initialize Phase */ | |
523 | }; | |
524 | ||
525 | struct be_error_recovery { | |
526 | /* Lancer error recovery variables */ | |
527 | u8 recovery_retries; | |
528 | ||
529 | /* BEx/Skyhawk error recovery variables */ | |
530 | u8 recovery_state; | |
531 | u16 ue_to_reset_time; /* Time after UE, to soft reset | |
532 | * the chip - PF0 only | |
533 | */ | |
534 | u16 ue_to_poll_time; /* Time after UE, to Restart Polling | |
535 | * of SLIPORT_SEMAPHORE reg | |
536 | */ | |
537 | u16 last_err_code; | |
538 | bool recovery_supported; | |
539 | unsigned long probe_time; | |
540 | unsigned long last_recovery_time; | |
541 | ||
542 | /* Common to both Lancer & BEx/SH error recovery */ | |
543 | u32 resched_delay; | |
544 | struct delayed_work err_detection_work; | |
545 | }; | |
546 | ||
547 | /* Ethtool priv_flags */ | |
548 | #define BE_DISABLE_TPE_RECOVERY 0x1 | |
549 | ||
bf8d9dfb SB |
550 | struct be_vxlan_port { |
551 | struct list_head list; | |
552 | __be16 port; /* VxLAN UDP dst port */ | |
553 | int port_aliases; /* alias count */ | |
554 | }; | |
555 | ||
6b7c5b94 SP |
556 | struct be_adapter { |
557 | struct pci_dev *pdev; | |
558 | struct net_device *netdev; | |
559 | ||
c5b3ad4c | 560 | u8 __iomem *csr; /* CSR BAR used only for BE2/3 */ |
8788fdc2 | 561 | u8 __iomem *db; /* Door Bell */ |
25848c90 | 562 | u8 __iomem *pcicfg; /* On SH,BEx only. Shadow of PCI config space */ |
8788fdc2 | 563 | |
2984961c | 564 | struct mutex mbox_lock; /* For serializing mbox cmds to BE card */ |
8788fdc2 SP |
565 | struct be_dma_mem mbox_mem; |
566 | /* Mbox mem is adjusted to align to 16 bytes. The allocated addr | |
567 | * is stored for freeing purpose */ | |
568 | struct be_dma_mem mbox_mem_alloced; | |
569 | ||
570 | struct be_mcc_obj mcc_obj; | |
b7172414 | 571 | struct mutex mcc_lock; /* For serializing mcc cmds to BE card */ |
8788fdc2 | 572 | spinlock_t mcc_cq_lock; |
6b7c5b94 | 573 | |
e261768e SP |
574 | u16 cfg_num_rx_irqs; /* configured via set-channels */ |
575 | u16 cfg_num_tx_irqs; /* configured via set-channels */ | |
92bf14ab SP |
576 | u16 num_evt_qs; |
577 | u16 num_msix_vec; | |
578 | struct be_eq_obj eq_obj[MAX_EVT_QS]; | |
10ef9ab4 | 579 | struct msix_entry msix_entries[MAX_MSIX_VECTORS]; |
6b7c5b94 SP |
580 | bool isr_registered; |
581 | ||
582 | /* TX Rings */ | |
92bf14ab | 583 | u16 num_tx_qs; |
3c8def97 | 584 | struct be_tx_obj tx_obj[MAX_TX_QS]; |
6b7c5b94 SP |
585 | |
586 | /* Rx rings */ | |
92bf14ab | 587 | u16 num_rx_qs; |
71bb8bd0 VV |
588 | u16 num_rss_qs; |
589 | u16 need_def_rxq; | |
10ef9ab4 | 590 | struct be_rx_obj rx_obj[MAX_RX_QS]; |
6b7c5b94 SP |
591 | u32 big_page_size; /* Compounded page size shared by rx wrbs */ |
592 | ||
609ff3bb | 593 | struct be_drv_stats drv_stats; |
2632bafd | 594 | struct be_aic_obj aic_obj[MAX_EVT_QS]; |
cc4ce020 | 595 | u8 vlan_prio_bmap; /* Available Priority BitMap */ |
fdf81bfb | 596 | u16 recommended_prio_bits;/* Recommended Priority bits in vlan tag */ |
5b8821b7 | 597 | struct be_dma_mem rx_filter; /* Cmd DMA mem for rx-filter */ |
6b7c5b94 | 598 | |
3abcdeda | 599 | struct be_dma_mem stats_cmd; |
6b7c5b94 SP |
600 | /* Work queue used to perform periodic tasks like getting statistics */ |
601 | struct delayed_work work; | |
609ff3bb | 602 | u16 work_counter; |
6b7c5b94 | 603 | |
972f37b4 | 604 | u8 recovery_retries; |
954f6825 | 605 | u8 err_flags; |
a69bf3c5 | 606 | bool pcicfg_mapped; /* pcicfg obtained via pci_iomap() */ |
b236916a | 607 | u32 flags; |
f25b119c | 608 | u32 cmd_privileges; |
6b7c5b94 | 609 | /* Ethtool knobs and info */ |
6b7c5b94 | 610 | char fw_ver[FW_VER_LEN]; |
eeb65ced | 611 | char fw_on_flash[FW_VER_LEN]; |
f66b7cfd SP |
612 | |
613 | /* IFACE filtering fields */ | |
30128031 | 614 | int if_handle; /* Used to configure filtering */ |
f66b7cfd | 615 | u32 if_flags; /* Interface filtering flags */ |
fbc13f01 | 616 | u32 *pmac_id; /* MAC addr handle used by BE card */ |
b7172414 | 617 | struct be_eth_addr *uc_list;/* list of uc-addrs programmed (not perm) */ |
f66b7cfd | 618 | u32 uc_macs; /* Count of secondary UC MAC programmed */ |
b7172414 SP |
619 | struct be_eth_addr *mc_list;/* list of mcast addrs programmed */ |
620 | u32 mc_count; | |
f66b7cfd SP |
621 | unsigned long vids[BITS_TO_LONGS(VLAN_N_VID)]; |
622 | u16 vlans_added; | |
92fbb1df SB |
623 | bool update_uc_list; |
624 | bool update_mc_list; | |
b7172414 | 625 | struct mutex rx_filter_lock;/* For protecting vids[] & mc/uc_list[] */ |
f66b7cfd | 626 | |
1a642469 | 627 | u32 beacon_state; /* for set_phys_id */ |
6b7c5b94 | 628 | |
6b7c5b94 | 629 | u32 port_num; |
21252377 | 630 | char port_name; |
f93f160b | 631 | u8 mc_type; |
3486be29 | 632 | u32 function_mode; |
3abcdeda | 633 | u32 function_caps; |
9e90c961 AK |
634 | u32 rx_fc; /* Rx flow control */ |
635 | u32 tx_fc; /* Tx flow control */ | |
b2aebe6d | 636 | bool stats_cmd_sent; |
045508a8 | 637 | struct { |
045508a8 PP |
638 | u32 size; |
639 | u32 total_size; | |
640 | u64 io_addr; | |
641 | } roce_db; | |
642 | u32 num_msix_roce_vec; | |
643 | struct ocrdma_dev *ocrdma_dev; | |
644 | struct list_head entry; | |
645 | ||
dd131e76 | 646 | u32 flash_status; |
5eeff635 | 647 | struct completion et_cmd_compl; |
ba343c77 | 648 | |
bec84e6b | 649 | struct be_resources pool_res; /* resources available for the port */ |
92bf14ab SP |
650 | struct be_resources res; /* resources available for the func */ |
651 | u16 num_vfs; /* Number of VFs provisioned by PF */ | |
980df249 SR |
652 | u8 pf_num; /* Numbering used by FW, starts at 0 */ |
653 | u8 vf_num; /* Numbering used by FW, starts at 1 */ | |
39f1d94d | 654 | u8 virtfn; |
11ac75ed SP |
655 | struct be_vf_cfg *vf_cfg; |
656 | bool be3_native; | |
fe6d2a38 | 657 | u32 sli_family; |
9e1453c5 | 658 | u8 hba_port_num; |
3968fa1e | 659 | u16 pvid; |
bf8d9dfb SB |
660 | __be16 vxlan_port; /* offloaded vxlan port num */ |
661 | int vxlan_port_count; /* active vxlan port count */ | |
662 | struct list_head vxlan_port_list; /* vxlan port list */ | |
42f11cf2 | 663 | struct phy_info phy; |
4762f6ce | 664 | u8 wol_cap; |
76a9e08e | 665 | bool wol_en; |
0ad3157e | 666 | u16 asic_rev; |
bc0c3405 | 667 | u16 qnq_vid; |
941a77d5 | 668 | u32 msg_enable; |
7aeb2156 | 669 | int be_get_temp_freq; |
29e9122b | 670 | struct be_hwmon hwmon_info; |
e2557877 | 671 | struct rss_info rss_info; |
760c295e VD |
672 | /* Filters for packets that need to be sent to BMC */ |
673 | u32 bmc_filt_mask; | |
fd7ff6f0 | 674 | u32 fat_dump_len; |
a155a5db | 675 | u16 serial_num[CNTL_SERIAL_NUM_WORDS]; |
51d1f98a | 676 | u8 phy_state; /* state of sfp optics (functional, faulted, etc.,) */ |
c27ebf58 | 677 | u8 dev_mac[ETH_ALEN]; |
710f3e59 SB |
678 | u32 priv_flags; /* ethtool get/set_priv_flags() */ |
679 | struct be_error_recovery error_recovery; | |
6b7c5b94 SP |
680 | }; |
681 | ||
b7172414 SP |
682 | /* Used for defered FW config cmds. Add fields to this struct as reqd */ |
683 | struct be_cmd_work { | |
684 | struct work_struct work; | |
685 | struct be_adapter *adapter; | |
686 | union { | |
687 | __be16 vxlan_port; | |
688 | } info; | |
689 | }; | |
690 | ||
39f1d94d | 691 | #define be_physfn(adapter) (!adapter->virtfn) |
2c7a9dc1 | 692 | #define be_virtfn(adapter) (adapter->virtfn) |
f174c7ec VV |
693 | #define sriov_enabled(adapter) (adapter->flags & \ |
694 | BE_FLAGS_SRIOV_ENABLED) | |
bec84e6b | 695 | |
11ac75ed SP |
696 | #define for_all_vfs(adapter, vf_cfg, i) \ |
697 | for (i = 0, vf_cfg = &adapter->vf_cfg[i]; i < adapter->num_vfs; \ | |
698 | i++, vf_cfg++) | |
ba343c77 | 699 | |
5b8821b7 SP |
700 | #define ON 1 |
701 | #define OFF 0 | |
ca34fe38 | 702 | |
92bf14ab SP |
703 | #define be_max_vlans(adapter) (adapter->res.max_vlans) |
704 | #define be_max_uc(adapter) (adapter->res.max_uc_mac) | |
705 | #define be_max_mc(adapter) (adapter->res.max_mcast_mac) | |
bec84e6b | 706 | #define be_max_vfs(adapter) (adapter->pool_res.max_vfs) |
92bf14ab SP |
707 | #define be_max_rss(adapter) (adapter->res.max_rss_qs) |
708 | #define be_max_txqs(adapter) (adapter->res.max_tx_qs) | |
709 | #define be_max_prio_txqs(adapter) (adapter->res.max_prio_tx_qs) | |
710 | #define be_max_rxqs(adapter) (adapter->res.max_rx_qs) | |
ce7faf0a SP |
711 | /* Max number of EQs available for the function (NIC + RoCE (if enabled)) */ |
712 | #define be_max_func_eqs(adapter) (adapter->res.max_evt_qs) | |
713 | /* Max number of EQs available avaialble only for NIC */ | |
714 | #define be_max_nic_eqs(adapter) (adapter->res.max_nic_evt_qs) | |
92bf14ab | 715 | #define be_if_cap_flags(adapter) (adapter->res.if_cap_flags) |
de2b1e03 SK |
716 | #define be_max_pf_pool_rss_tables(adapter) \ |
717 | (adapter->pool_res.max_rss_tables) | |
e261768e SP |
718 | /* Max irqs avaialble for NIC */ |
719 | #define be_max_irqs(adapter) \ | |
720 | (min_t(u16, be_max_nic_eqs(adapter), num_online_cpus())) | |
92bf14ab | 721 | |
e261768e SP |
722 | /* Max irqs *needed* for RX queues */ |
723 | static inline u16 be_max_rx_irqs(struct be_adapter *adapter) | |
92bf14ab | 724 | { |
e261768e | 725 | /* If no RSS, need atleast one irq for def-RXQ */ |
92bf14ab SP |
726 | u16 num = max_t(u16, be_max_rss(adapter), 1); |
727 | ||
e261768e SP |
728 | return min_t(u16, num, be_max_irqs(adapter)); |
729 | } | |
730 | ||
731 | /* Max irqs *needed* for TX queues */ | |
732 | static inline u16 be_max_tx_irqs(struct be_adapter *adapter) | |
733 | { | |
734 | return min_t(u16, be_max_txqs(adapter), be_max_irqs(adapter)); | |
735 | } | |
736 | ||
737 | /* Max irqs *needed* for combined queues */ | |
738 | static inline u16 be_max_qp_irqs(struct be_adapter *adapter) | |
739 | { | |
740 | return min(be_max_tx_irqs(adapter), be_max_rx_irqs(adapter)); | |
741 | } | |
742 | ||
743 | /* Max irqs *needed* for RX and TX queues together */ | |
744 | static inline u16 be_max_any_irqs(struct be_adapter *adapter) | |
745 | { | |
746 | return max(be_max_tx_irqs(adapter), be_max_rx_irqs(adapter)); | |
92bf14ab SP |
747 | } |
748 | ||
f93f160b VV |
749 | /* Is BE in pvid_tagging mode */ |
750 | #define be_pvid_tagging_enabled(adapter) (adapter->pvid) | |
751 | ||
752 | /* Is BE in QNQ multi-channel mode */ | |
66064dbc | 753 | #define be_is_qnq_mode(adapter) (adapter->function_mode & QNQ_MODE) |
f93f160b | 754 | |
ca34fe38 SP |
755 | #define lancer_chip(adapter) (adapter->pdev->device == OC_DEVICE_ID3 || \ |
756 | adapter->pdev->device == OC_DEVICE_ID4) | |
fe6d2a38 | 757 | |
76b73530 PR |
758 | #define skyhawk_chip(adapter) (adapter->pdev->device == OC_DEVICE_ID5 || \ |
759 | adapter->pdev->device == OC_DEVICE_ID6) | |
d3bd3a5e | 760 | |
ca34fe38 SP |
761 | #define BE3_chip(adapter) (adapter->pdev->device == BE_DEVICE_ID2 || \ |
762 | adapter->pdev->device == OC_DEVICE_ID2) | |
763 | ||
764 | #define BE2_chip(adapter) (adapter->pdev->device == BE_DEVICE_ID1 || \ | |
765 | adapter->pdev->device == OC_DEVICE_ID1) | |
766 | ||
767 | #define BEx_chip(adapter) (BE3_chip(adapter) || BE2_chip(adapter)) | |
d3bd3a5e | 768 | |
dbf0f2a7 SP |
769 | #define be_roce_supported(adapter) (skyhawk_chip(adapter) && \ |
770 | (adapter->function_mode & RDMA_ENABLED)) | |
045508a8 | 771 | |
0fc0b732 | 772 | extern const struct ethtool_ops be_ethtool_ops; |
6b7c5b94 | 773 | |
ac6a0c4a | 774 | #define msix_enabled(adapter) (adapter->num_msix_vec > 0) |
10ef9ab4 SP |
775 | #define num_irqs(adapter) (msix_enabled(adapter) ? \ |
776 | adapter->num_msix_vec : 1) | |
777 | #define tx_stats(txo) (&(txo)->stats) | |
778 | #define rx_stats(rxo) (&(rxo)->stats) | |
6b7c5b94 | 779 | |
10ef9ab4 SP |
780 | /* The default RXQ is the last RXQ */ |
781 | #define default_rxo(adpt) (&adpt->rx_obj[adpt->num_rx_qs - 1]) | |
6b7c5b94 | 782 | |
3abcdeda SP |
783 | #define for_all_rx_queues(adapter, rxo, i) \ |
784 | for (i = 0, rxo = &adapter->rx_obj[i]; i < adapter->num_rx_qs; \ | |
785 | i++, rxo++) | |
786 | ||
3abcdeda | 787 | #define for_all_rss_queues(adapter, rxo, i) \ |
71bb8bd0 | 788 | for (i = 0, rxo = &adapter->rx_obj[i]; i < adapter->num_rss_qs; \ |
3abcdeda SP |
789 | i++, rxo++) |
790 | ||
3c8def97 SP |
791 | #define for_all_tx_queues(adapter, txo, i) \ |
792 | for (i = 0, txo = &adapter->tx_obj[i]; i < adapter->num_tx_qs; \ | |
793 | i++, txo++) | |
794 | ||
10ef9ab4 SP |
795 | #define for_all_evt_queues(adapter, eqo, i) \ |
796 | for (i = 0, eqo = &adapter->eq_obj[i]; i < adapter->num_evt_qs; \ | |
797 | i++, eqo++) | |
798 | ||
6384a4d0 SP |
799 | #define for_all_rx_queues_on_eq(adapter, eqo, rxo, i) \ |
800 | for (i = eqo->idx, rxo = &adapter->rx_obj[i]; i < adapter->num_rx_qs;\ | |
801 | i += adapter->num_evt_qs, rxo += adapter->num_evt_qs) | |
802 | ||
a4906ea0 SP |
803 | #define for_all_tx_queues_on_eq(adapter, eqo, txo, i) \ |
804 | for (i = eqo->idx, txo = &adapter->tx_obj[i]; i < adapter->num_tx_qs;\ | |
805 | i += adapter->num_evt_qs, txo += adapter->num_evt_qs) | |
806 | ||
10ef9ab4 SP |
807 | #define is_mcc_eqo(eqo) (eqo->idx == 0) |
808 | #define mcc_eqo(adapter) (&adapter->eq_obj[0]) | |
809 | ||
6b7c5b94 SP |
810 | #define PAGE_SHIFT_4K 12 |
811 | #define PAGE_SIZE_4K (1 << PAGE_SHIFT_4K) | |
812 | ||
813 | /* Returns number of pages spanned by the data starting at the given addr */ | |
814 | #define PAGES_4K_SPANNED(_address, size) \ | |
815 | ((u32)((((size_t)(_address) & (PAGE_SIZE_4K - 1)) + \ | |
816 | (size) + (PAGE_SIZE_4K - 1)) >> PAGE_SHIFT_4K)) | |
817 | ||
6b7c5b94 SP |
818 | /* Returns bit offset within a DWORD of a bitfield */ |
819 | #define AMAP_BIT_OFFSET(_struct, field) \ | |
820 | (((size_t)&(((_struct *)0)->field))%32) | |
821 | ||
822 | /* Returns the bit mask of the field that is NOT shifted into location. */ | |
823 | static inline u32 amap_mask(u32 bitsize) | |
824 | { | |
825 | return (bitsize == 32 ? 0xFFFFFFFF : (1 << bitsize) - 1); | |
826 | } | |
827 | ||
828 | static inline void | |
829 | amap_set(void *ptr, u32 dw_offset, u32 mask, u32 offset, u32 value) | |
830 | { | |
831 | u32 *dw = (u32 *) ptr + dw_offset; | |
832 | *dw &= ~(mask << offset); | |
833 | *dw |= (mask & value) << offset; | |
834 | } | |
835 | ||
836 | #define AMAP_SET_BITS(_struct, field, ptr, val) \ | |
837 | amap_set(ptr, \ | |
838 | offsetof(_struct, field)/32, \ | |
839 | amap_mask(sizeof(((_struct *)0)->field)), \ | |
840 | AMAP_BIT_OFFSET(_struct, field), \ | |
841 | val) | |
842 | ||
843 | static inline u32 amap_get(void *ptr, u32 dw_offset, u32 mask, u32 offset) | |
844 | { | |
845 | u32 *dw = (u32 *) ptr; | |
846 | return mask & (*(dw + dw_offset) >> offset); | |
847 | } | |
848 | ||
849 | #define AMAP_GET_BITS(_struct, field, ptr) \ | |
850 | amap_get(ptr, \ | |
851 | offsetof(_struct, field)/32, \ | |
852 | amap_mask(sizeof(((_struct *)0)->field)), \ | |
853 | AMAP_BIT_OFFSET(_struct, field)) | |
854 | ||
c3c18bc1 SP |
855 | #define GET_RX_COMPL_V0_BITS(field, ptr) \ |
856 | AMAP_GET_BITS(struct amap_eth_rx_compl_v0, field, ptr) | |
857 | ||
858 | #define GET_RX_COMPL_V1_BITS(field, ptr) \ | |
859 | AMAP_GET_BITS(struct amap_eth_rx_compl_v1, field, ptr) | |
860 | ||
861 | #define GET_TX_COMPL_BITS(field, ptr) \ | |
862 | AMAP_GET_BITS(struct amap_eth_tx_compl, field, ptr) | |
863 | ||
864 | #define SET_TX_WRB_HDR_BITS(field, ptr, val) \ | |
865 | AMAP_SET_BITS(struct amap_eth_hdr_wrb, field, ptr, val) | |
866 | ||
6b7c5b94 SP |
867 | #define be_dws_cpu_to_le(wrb, len) swap_dws(wrb, len) |
868 | #define be_dws_le_to_cpu(wrb, len) swap_dws(wrb, len) | |
869 | static inline void swap_dws(void *wrb, int len) | |
870 | { | |
871 | #ifdef __BIG_ENDIAN | |
872 | u32 *dw = wrb; | |
873 | BUG_ON(len % 4); | |
874 | do { | |
875 | *dw = cpu_to_le32(*dw); | |
876 | dw++; | |
877 | len -= 4; | |
878 | } while (len); | |
879 | #endif /* __BIG_ENDIAN */ | |
880 | } | |
881 | ||
0532d4e3 KA |
882 | #define be_cmd_status(status) (status > 0 ? -EIO : status) |
883 | ||
6b7c5b94 SP |
884 | static inline u8 is_tcp_pkt(struct sk_buff *skb) |
885 | { | |
886 | u8 val = 0; | |
887 | ||
888 | if (ip_hdr(skb)->version == 4) | |
889 | val = (ip_hdr(skb)->protocol == IPPROTO_TCP); | |
890 | else if (ip_hdr(skb)->version == 6) | |
891 | val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_TCP); | |
892 | ||
893 | return val; | |
894 | } | |
895 | ||
896 | static inline u8 is_udp_pkt(struct sk_buff *skb) | |
897 | { | |
898 | u8 val = 0; | |
899 | ||
900 | if (ip_hdr(skb)->version == 4) | |
901 | val = (ip_hdr(skb)->protocol == IPPROTO_UDP); | |
902 | else if (ip_hdr(skb)->version == 6) | |
903 | val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_UDP); | |
904 | ||
905 | return val; | |
906 | } | |
907 | ||
93040ae5 SK |
908 | static inline bool is_ipv4_pkt(struct sk_buff *skb) |
909 | { | |
e8efcec5 | 910 | return skb->protocol == htons(ETH_P_IP) && ip_hdr(skb)->version == 4; |
93040ae5 SK |
911 | } |
912 | ||
822f8565 SR |
913 | static inline bool is_ipv6_ext_hdr(struct sk_buff *skb) |
914 | { | |
915 | if (ip_hdr(skb)->version == 6) | |
916 | return ipv6_ext_hdr(ipv6_hdr(skb)->nexthdr); | |
917 | else | |
918 | return false; | |
919 | } | |
920 | ||
710f3e59 SB |
921 | #define be_error_recovering(adapter) \ |
922 | (adapter->flags & BE_FLAGS_TRY_RECOVERY) | |
923 | ||
954f6825 VD |
924 | #define BE_ERROR_EEH 1 |
925 | #define BE_ERROR_UE BIT(1) | |
926 | #define BE_ERROR_FW BIT(2) | |
ffc39620 SR |
927 | #define BE_ERROR_TX BIT(3) |
928 | #define BE_ERROR_HW (BE_ERROR_EEH | BE_ERROR_UE | BE_ERROR_TX) | |
929 | #define BE_ERROR_ANY (BE_ERROR_EEH | BE_ERROR_UE | BE_ERROR_FW | \ | |
930 | BE_ERROR_TX) | |
954f6825 VD |
931 | #define BE_CLEAR_ALL 0xFF |
932 | ||
933 | static inline u8 be_check_error(struct be_adapter *adapter, u32 err_type) | |
4b972914 | 934 | { |
954f6825 | 935 | return (adapter->err_flags & err_type); |
4b972914 AK |
936 | } |
937 | ||
954f6825 | 938 | static inline void be_set_error(struct be_adapter *adapter, int err_type) |
6589ade0 | 939 | { |
954f6825 VD |
940 | struct net_device *netdev = adapter->netdev; |
941 | ||
942 | adapter->err_flags |= err_type; | |
943 | netif_carrier_off(netdev); | |
944 | ||
945 | dev_info(&adapter->pdev->dev, "%s: Link down\n", netdev->name); | |
f67ef7ba PR |
946 | } |
947 | ||
954f6825 | 948 | static inline void be_clear_error(struct be_adapter *adapter, int err_type) |
f67ef7ba | 949 | { |
954f6825 | 950 | adapter->err_flags &= ~err_type; |
f67ef7ba PR |
951 | } |
952 | ||
954f6825 | 953 | static inline bool be_multi_rxq(const struct be_adapter *adapter) |
f67ef7ba | 954 | { |
954f6825 | 955 | return adapter->num_rx_qs > 1; |
6589ade0 SP |
956 | } |
957 | ||
31886e87 JP |
958 | void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, |
959 | u16 num_popped); | |
960 | void be_link_status_update(struct be_adapter *adapter, u8 link_status); | |
961 | void be_parse_stats(struct be_adapter *adapter); | |
962 | int be_load_fw(struct be_adapter *adapter, u8 *func); | |
963 | bool be_is_wol_supported(struct be_adapter *adapter); | |
964 | bool be_pause_supported(struct be_adapter *adapter); | |
965 | u32 be_get_fw_log_level(struct be_adapter *adapter); | |
68d7bdcb SP |
966 | int be_update_queues(struct be_adapter *adapter); |
967 | int be_poll(struct napi_struct *napi, int budget); | |
20947770 | 968 | void be_eqd_update(struct be_adapter *adapter, bool force_update); |
941a77d5 | 969 | |
045508a8 PP |
970 | /* |
971 | * internal function to initialize-cleanup roce device. | |
972 | */ | |
31886e87 JP |
973 | void be_roce_dev_add(struct be_adapter *); |
974 | void be_roce_dev_remove(struct be_adapter *); | |
045508a8 PP |
975 | |
976 | /* | |
977 | * internal function to open-close roce device during ifup-ifdown. | |
978 | */ | |
d114f99a | 979 | void be_roce_dev_shutdown(struct be_adapter *); |
045508a8 | 980 | |
6b7c5b94 | 981 | #endif /* BE_H */ |