]> git.proxmox.com Git - mirror_ubuntu-jammy-kernel.git/blame - drivers/net/ethernet/emulex/benet/be_main.c
projects / mirror_ubuntu-jammy-kernel.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
be2net: refactor function initalization sequence into be_func_init()
[mirror_ubuntu-jammy-kernel.git] / drivers / net / ethernet / emulex / benet / be_main.c
CommitLineData
6b7c5b94 1/*
40263820 2 * Copyright (C) 2005 - 2014 Emulex
6b7c5b94
SP		 3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
9 *
10 * Contact Information:
d2145cde 11 * linux-drivers@emulex.com
6b7c5b94 12 *
d2145cde
AK		 13 * Emulex
14 * 3333 Susan Street
15 * Costa Mesa, CA 92626
6b7c5b94
SP		 16 */
17
70c71606 18#include <linux/prefetch.h>
9d9779e7 19#include <linux/module.h>
6b7c5b94 20#include "be.h"
8788fdc2 21#include "be_cmds.h"
65f71b8b 22#include <asm/div64.h>
d6b6d987 23#include <linux/aer.h>
a77dcb8c 24#include <linux/if_bridge.h>
6384a4d0 25#include <net/busy_poll.h>
c9c47142 26#include <net/vxlan.h>
6b7c5b94
SP		 27
28MODULE_VERSION(DRV_VER);
6b7c5b94 29MODULE_DESCRIPTION(DRV_DESC " " DRV_VER);
00d3d51e 30MODULE_AUTHOR("Emulex Corporation");
6b7c5b94
SP		 31MODULE_LICENSE("GPL");
32
ba343c77 33static unsigned int num_vfs;
ba343c77 34module_param(num_vfs, uint, S_IRUGO);
ba343c77 35MODULE_PARM_DESC(num_vfs, "Number of PCI VFs to initialize");
6b7c5b94 36
11ac75ed
SP		 37static ushort rx_frag_size = 2048;
38module_param(rx_frag_size, ushort, S_IRUGO);
39MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data.");
40
9baa3c34 41static const struct pci_device_id be_dev_ids[] = {
c4ca2374 42 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
59fd5d87 43 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
c4ca2374
AK		 44 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
45 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
fe6d2a38 46 { PCI_DEVICE(EMULEX_VENDOR_ID, OC_DEVICE_ID3)},
12f4d0a8 47 { PCI_DEVICE(EMULEX_VENDOR_ID, OC_DEVICE_ID4)},
ecedb6ae 48 { PCI_DEVICE(EMULEX_VENDOR_ID, OC_DEVICE_ID5)},
76b73530 49 { PCI_DEVICE(EMULEX_VENDOR_ID, OC_DEVICE_ID6)},
6b7c5b94
SP		 50 { 0 }
51};
52MODULE_DEVICE_TABLE(pci, be_dev_ids);
7c185276 53/* UE Status Low CSR */
42c8b11e 54static const char * const ue_status_low_desc[] = {
7c185276
AK		 55 "CEV",
56 "CTX",
57 "DBUF",
58 "ERX",
59 "Host",
60 "MPU",
61 "NDMA",
62 "PTC ",
63 "RDMA ",
64 "RXF ",
65 "RXIPS ",
66 "RXULP0 ",
67 "RXULP1 ",
68 "RXULP2 ",
69 "TIM ",
70 "TPOST ",
71 "TPRE ",
72 "TXIPS ",
73 "TXULP0 ",
74 "TXULP1 ",
75 "UC ",
76 "WDMA ",
77 "TXULP2 ",
78 "HOST1 ",
79 "P0_OB_LINK ",
80 "P1_OB_LINK ",
81 "HOST_GPIO ",
82 "MBOX ",
6bdf8f55
VV		 83 "ERX2 ",
84 "SPARE ",
85 "JTAG ",
86 "MPU_INTPEND "
7c185276 87};
e2fb1afa 88
7c185276 89/* UE Status High CSR */
42c8b11e 90static const char * const ue_status_hi_desc[] = {
7c185276
AK		 91 "LPCMEMHOST",
92 "MGMT_MAC",
93 "PCS0ONLINE",
94 "MPU_IRAM",
95 "PCS1ONLINE",
96 "PCTL0",
97 "PCTL1",
98 "PMEM",
99 "RR",
100 "TXPB",
101 "RXPP",
102 "XAUI",
103 "TXP",
104 "ARM",
105 "IPC",
106 "HOST2",
107 "HOST3",
108 "HOST4",
109 "HOST5",
110 "HOST6",
111 "HOST7",
6bdf8f55
VV		 112 "ECRC",
113 "Poison TLP",
42c8b11e 114 "NETC",
6bdf8f55
VV		 115 "PERIPH",
116 "LLTXULP",
117 "D2P",
118 "RCON",
119 "LDMA",
120 "LLTXP",
121 "LLTXPB",
7c185276
AK		 122 "Unknown"
123};
6b7c5b94
SP		 124
125static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q)
126{
127 struct be_dma_mem *mem = &q->dma_mem;
03d28ffe 128
1cfafab9 129 if (mem->va) {
2b7bcebf
IV		 130 dma_free_coherent(&adapter->pdev->dev, mem->size, mem->va,
131 mem->dma);
1cfafab9
SP		 132 mem->va = NULL;
133 }
6b7c5b94
SP		 134}
135
136static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q,
748b539a 137 u16 len, u16 entry_size)
6b7c5b94
SP		 138{
139 struct be_dma_mem *mem = &q->dma_mem;
140
141 memset(q, 0, sizeof(*q));
142 q->len = len;
143 q->entry_size = entry_size;
144 mem->size = len * entry_size;
ede23fa8
JP		 145 mem->va = dma_zalloc_coherent(&adapter->pdev->dev, mem->size, &mem->dma,
146 GFP_KERNEL);
6b7c5b94 147 if (!mem->va)
10ef9ab4 148 return -ENOMEM;
6b7c5b94
SP		 149 return 0;
150}
151
68c45a2d 152static void be_reg_intr_set(struct be_adapter *adapter, bool enable)
6b7c5b94 153{
db3ea781 154 u32 reg, enabled;
5f0b849e 155
db3ea781 156 pci_read_config_dword(adapter->pdev, PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET,
748b539a 157 &reg);
db3ea781
SP		 158 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
159
5f0b849e 160 if (!enabled && enable)
6b7c5b94 161 reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
5f0b849e 162 else if (enabled && !enable)
6b7c5b94 163 reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
5f0b849e 164 else
6b7c5b94 165 return;
5f0b849e 166
db3ea781 167 pci_write_config_dword(adapter->pdev,
748b539a 168 PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET, reg);
6b7c5b94
SP		 169}
170
68c45a2d
SK		 171static void be_intr_set(struct be_adapter *adapter, bool enable)
172{
173 int status = 0;
174
175 /* On lancer interrupts can't be controlled via this register */
176 if (lancer_chip(adapter))
177 return;
178
179 if (adapter->eeh_error)
180 return;
181
182 status = be_cmd_intr_set(adapter, enable);
183 if (status)
184 be_reg_intr_set(adapter, enable);
185}
186
8788fdc2 187static void be_rxq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
6b7c5b94
SP		 188{
189 u32 val = 0;
03d28ffe 190
6b7c5b94
SP		 191 val |= qid & DB_RQ_RING_ID_MASK;
192 val |= posted << DB_RQ_NUM_POSTED_SHIFT;
f3eb62d2
SP		 193
194 wmb();
8788fdc2 195 iowrite32(val, adapter->db + DB_RQ_OFFSET);
6b7c5b94
SP		 196}
197
94d73aaa
VV		 198static void be_txq_notify(struct be_adapter *adapter, struct be_tx_obj *txo,
199 u16 posted)
6b7c5b94
SP		 200{
201 u32 val = 0;
03d28ffe 202
94d73aaa 203 val |= txo->q.id & DB_TXULP_RING_ID_MASK;
6b7c5b94 204 val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT;
f3eb62d2
SP		 205
206 wmb();
94d73aaa 207 iowrite32(val, adapter->db + txo->db_offset);
6b7c5b94
SP		 208}
209
8788fdc2 210static void be_eq_notify(struct be_adapter *adapter, u16 qid,
748b539a 211 bool arm, bool clear_int, u16 num_popped)
6b7c5b94
SP		 212{
213 u32 val = 0;
03d28ffe 214
6b7c5b94 215 val |= qid & DB_EQ_RING_ID_MASK;
748b539a 216 val |= ((qid & DB_EQ_RING_ID_EXT_MASK) << DB_EQ_RING_ID_EXT_MASK_SHIFT);
cf588477 217
f67ef7ba 218 if (adapter->eeh_error)
cf588477
SP		 219 return;
220
6b7c5b94
SP		 221 if (arm)
222 val |= 1 << DB_EQ_REARM_SHIFT;
223 if (clear_int)
224 val |= 1 << DB_EQ_CLR_SHIFT;
225 val |= 1 << DB_EQ_EVNT_SHIFT;
226 val |= num_popped << DB_EQ_NUM_POPPED_SHIFT;
8788fdc2 227 iowrite32(val, adapter->db + DB_EQ_OFFSET);
6b7c5b94
SP		 228}
229
8788fdc2 230void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, u16 num_popped)
6b7c5b94
SP		 231{
232 u32 val = 0;
03d28ffe 233
6b7c5b94 234 val |= qid & DB_CQ_RING_ID_MASK;
fe6d2a38
SP		 235 val |= ((qid & DB_CQ_RING_ID_EXT_MASK) <<
236 DB_CQ_RING_ID_EXT_MASK_SHIFT);
cf588477 237
f67ef7ba 238 if (adapter->eeh_error)
cf588477
SP		 239 return;
240
6b7c5b94
SP		 241 if (arm)
242 val |= 1 << DB_CQ_REARM_SHIFT;
243 val |= num_popped << DB_CQ_NUM_POPPED_SHIFT;
8788fdc2 244 iowrite32(val, adapter->db + DB_CQ_OFFSET);
6b7c5b94
SP		 245}
246
6b7c5b94
SP		 247static int be_mac_addr_set(struct net_device *netdev, void *p)
248{
249 struct be_adapter *adapter = netdev_priv(netdev);
5a712c13 250 struct device *dev = &adapter->pdev->dev;
6b7c5b94 251 struct sockaddr *addr = p;
5a712c13
SP		 252 int status;
253 u8 mac[ETH_ALEN];
254 u32 old_pmac_id = adapter->pmac_id[0], curr_pmac_id = 0;
6b7c5b94 255
ca9e4988
AK		 256 if (!is_valid_ether_addr(addr->sa_data))
257 return -EADDRNOTAVAIL;
258
ff32f8ab
VV		 259 /* Proceed further only if, User provided MAC is different
260 * from active MAC
261 */
262 if (ether_addr_equal(addr->sa_data, netdev->dev_addr))
263 return 0;
264
5a712c13
SP		 265 /* The PMAC_ADD cmd may fail if the VF doesn't have FILTMGMT
266 * privilege or if PF did not provision the new MAC address.
267 * On BE3, this cmd will always fail if the VF doesn't have the
268 * FILTMGMT privilege. This failure is OK, only if the PF programmed
269 * the MAC for the VF.
704e4c88 270 */
5a712c13
SP		 271 status = be_cmd_pmac_add(adapter, (u8 *)addr->sa_data,
272 adapter->if_handle, &adapter->pmac_id[0], 0);
273 if (!status) {
274 curr_pmac_id = adapter->pmac_id[0];
275
276 /* Delete the old programmed MAC. This call may fail if the
277 * old MAC was already deleted by the PF driver.
278 */
279 if (adapter->pmac_id[0] != old_pmac_id)
280 be_cmd_pmac_del(adapter, adapter->if_handle,
281 old_pmac_id, 0);
704e4c88
PR		 282 }
283
5a712c13
SP		 284 /* Decide if the new MAC is successfully activated only after
285 * querying the FW
704e4c88 286 */
b188f090
SR		 287 status = be_cmd_get_active_mac(adapter, curr_pmac_id, mac,
288 adapter->if_handle, true, 0);
a65027e4 289 if (status)
e3a7ae2c 290 goto err;
6b7c5b94 291
5a712c13
SP		 292 /* The MAC change did not happen, either due to lack of privilege
293 * or PF didn't pre-provision.
294 */
61d23e9f 295 if (!ether_addr_equal(addr->sa_data, mac)) {
5a712c13
SP		 296 status = -EPERM;
297 goto err;
298 }
299
e3a7ae2c 300 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
5a712c13 301 dev_info(dev, "MAC address changed to %pM\n", mac);
e3a7ae2c
SK		 302 return 0;
303err:
5a712c13 304 dev_warn(dev, "MAC address change to %pM failed\n", addr->sa_data);
6b7c5b94
SP		 305 return status;
306}
307
ca34fe38
SP		 308/* BE2 supports only v0 cmd */
309static void *hw_stats_from_cmd(struct be_adapter *adapter)
310{
311 if (BE2_chip(adapter)) {
312 struct be_cmd_resp_get_stats_v0 *cmd = adapter->stats_cmd.va;
313
314 return &cmd->hw_stats;
61000861 315 } else if (BE3_chip(adapter)) {
ca34fe38
SP		 316 struct be_cmd_resp_get_stats_v1 *cmd = adapter->stats_cmd.va;
317
61000861
AK		 318 return &cmd->hw_stats;
319 } else {
320 struct be_cmd_resp_get_stats_v2 *cmd = adapter->stats_cmd.va;
321
ca34fe38
SP		 322 return &cmd->hw_stats;
323 }
324}
325
326/* BE2 supports only v0 cmd */
327static void *be_erx_stats_from_cmd(struct be_adapter *adapter)
328{
329 if (BE2_chip(adapter)) {
330 struct be_hw_stats_v0 *hw_stats = hw_stats_from_cmd(adapter);
331
332 return &hw_stats->erx;
61000861 333 } else if (BE3_chip(adapter)) {
ca34fe38
SP		 334 struct be_hw_stats_v1 *hw_stats = hw_stats_from_cmd(adapter);
335
61000861
AK		 336 return &hw_stats->erx;
337 } else {
338 struct be_hw_stats_v2 *hw_stats = hw_stats_from_cmd(adapter);
339
ca34fe38
SP		 340 return &hw_stats->erx;
341 }
342}
343
344static void populate_be_v0_stats(struct be_adapter *adapter)
89a88ab8 345{
ac124ff9
SP		 346 struct be_hw_stats_v0 *hw_stats = hw_stats_from_cmd(adapter);
347 struct be_pmem_stats *pmem_sts = &hw_stats->pmem;
348 struct be_rxf_stats_v0 *rxf_stats = &hw_stats->rxf;
89a88ab8 349 struct be_port_rxf_stats_v0 *port_stats =
ac124ff9
SP		 350 &rxf_stats->port[adapter->port_num];
351 struct be_drv_stats *drvs = &adapter->drv_stats;
89a88ab8 352
ac124ff9 353 be_dws_le_to_cpu(hw_stats, sizeof(*hw_stats));
89a88ab8
AK		 354 drvs->rx_pause_frames = port_stats->rx_pause_frames;
355 drvs->rx_crc_errors = port_stats->rx_crc_errors;
356 drvs->rx_control_frames = port_stats->rx_control_frames;
357 drvs->rx_in_range_errors = port_stats->rx_in_range_errors;
358 drvs->rx_frame_too_long = port_stats->rx_frame_too_long;
359 drvs->rx_dropped_runt = port_stats->rx_dropped_runt;
360 drvs->rx_ip_checksum_errs = port_stats->rx_ip_checksum_errs;
361 drvs->rx_tcp_checksum_errs = port_stats->rx_tcp_checksum_errs;
362 drvs->rx_udp_checksum_errs = port_stats->rx_udp_checksum_errs;
363 drvs->rxpp_fifo_overflow_drop = port_stats->rx_fifo_overflow;
364 drvs->rx_dropped_tcp_length = port_stats->rx_dropped_tcp_length;
365 drvs->rx_dropped_too_small = port_stats->rx_dropped_too_small;
366 drvs->rx_dropped_too_short = port_stats->rx_dropped_too_short;
367 drvs->rx_out_range_errors = port_stats->rx_out_range_errors;
ac124ff9 368 drvs->rx_input_fifo_overflow_drop = port_stats->rx_input_fifo_overflow;
89a88ab8
AK		 369 drvs->rx_dropped_header_too_small =
370 port_stats->rx_dropped_header_too_small;
18fb06a1
SR		 371 drvs->rx_address_filtered =
372 port_stats->rx_address_filtered +
373 port_stats->rx_vlan_filtered;
89a88ab8
AK		 374 drvs->rx_alignment_symbol_errors =
375 port_stats->rx_alignment_symbol_errors;
376
377 drvs->tx_pauseframes = port_stats->tx_pauseframes;
378 drvs->tx_controlframes = port_stats->tx_controlframes;
379
380 if (adapter->port_num)
ac124ff9 381 drvs->jabber_events = rxf_stats->port1_jabber_events;
89a88ab8 382 else
ac124ff9 383 drvs->jabber_events = rxf_stats->port0_jabber_events;
89a88ab8 384 drvs->rx_drops_no_pbuf = rxf_stats->rx_drops_no_pbuf;
89a88ab8 385 drvs->rx_drops_no_erx_descr = rxf_stats->rx_drops_no_erx_descr;
89a88ab8
AK		 386 drvs->forwarded_packets = rxf_stats->forwarded_packets;
387 drvs->rx_drops_mtu = rxf_stats->rx_drops_mtu;
ac124ff9
SP		 388 drvs->rx_drops_no_tpre_descr = rxf_stats->rx_drops_no_tpre_descr;
389 drvs->rx_drops_too_many_frags = rxf_stats->rx_drops_too_many_frags;
89a88ab8
AK		 390 adapter->drv_stats.eth_red_drops = pmem_sts->eth_red_drops;
391}
392
ca34fe38 393static void populate_be_v1_stats(struct be_adapter *adapter)
89a88ab8 394{
ac124ff9
SP		 395 struct be_hw_stats_v1 *hw_stats = hw_stats_from_cmd(adapter);
396 struct be_pmem_stats *pmem_sts = &hw_stats->pmem;
397 struct be_rxf_stats_v1 *rxf_stats = &hw_stats->rxf;
89a88ab8 398 struct be_port_rxf_stats_v1 *port_stats =
ac124ff9
SP		 399 &rxf_stats->port[adapter->port_num];
400 struct be_drv_stats *drvs = &adapter->drv_stats;
89a88ab8 401
ac124ff9 402 be_dws_le_to_cpu(hw_stats, sizeof(*hw_stats));
02fe7027
AK		 403 drvs->pmem_fifo_overflow_drop = port_stats->pmem_fifo_overflow_drop;
404 drvs->rx_priority_pause_frames = port_stats->rx_priority_pause_frames;
89a88ab8
AK		 405 drvs->rx_pause_frames = port_stats->rx_pause_frames;
406 drvs->rx_crc_errors = port_stats->rx_crc_errors;
407 drvs->rx_control_frames = port_stats->rx_control_frames;
408 drvs->rx_in_range_errors = port_stats->rx_in_range_errors;
409 drvs->rx_frame_too_long = port_stats->rx_frame_too_long;
410 drvs->rx_dropped_runt = port_stats->rx_dropped_runt;
411 drvs->rx_ip_checksum_errs = port_stats->rx_ip_checksum_errs;
412 drvs->rx_tcp_checksum_errs = port_stats->rx_tcp_checksum_errs;
413 drvs->rx_udp_checksum_errs = port_stats->rx_udp_checksum_errs;
414 drvs->rx_dropped_tcp_length = port_stats->rx_dropped_tcp_length;
415 drvs->rx_dropped_too_small = port_stats->rx_dropped_too_small;
416 drvs->rx_dropped_too_short = port_stats->rx_dropped_too_short;
417 drvs->rx_out_range_errors = port_stats->rx_out_range_errors;
418 drvs->rx_dropped_header_too_small =
419 port_stats->rx_dropped_header_too_small;
420 drvs->rx_input_fifo_overflow_drop =
421 port_stats->rx_input_fifo_overflow_drop;
18fb06a1 422 drvs->rx_address_filtered = port_stats->rx_address_filtered;
89a88ab8
AK		 423 drvs->rx_alignment_symbol_errors =
424 port_stats->rx_alignment_symbol_errors;
ac124ff9 425 drvs->rxpp_fifo_overflow_drop = port_stats->rxpp_fifo_overflow_drop;
89a88ab8
AK		 426 drvs->tx_pauseframes = port_stats->tx_pauseframes;
427 drvs->tx_controlframes = port_stats->tx_controlframes;
b5adffc4 428 drvs->tx_priority_pauseframes = port_stats->tx_priority_pauseframes;
89a88ab8
AK		 429 drvs->jabber_events = port_stats->jabber_events;
430 drvs->rx_drops_no_pbuf = rxf_stats->rx_drops_no_pbuf;
89a88ab8 431 drvs->rx_drops_no_erx_descr = rxf_stats->rx_drops_no_erx_descr;
89a88ab8
AK		 432 drvs->forwarded_packets = rxf_stats->forwarded_packets;
433 drvs->rx_drops_mtu = rxf_stats->rx_drops_mtu;
ac124ff9
SP		 434 drvs->rx_drops_no_tpre_descr = rxf_stats->rx_drops_no_tpre_descr;
435 drvs->rx_drops_too_many_frags = rxf_stats->rx_drops_too_many_frags;
89a88ab8
AK		 436 adapter->drv_stats.eth_red_drops = pmem_sts->eth_red_drops;
437}
438
61000861
AK		 439static void populate_be_v2_stats(struct be_adapter *adapter)
440{
441 struct be_hw_stats_v2 *hw_stats = hw_stats_from_cmd(adapter);
442 struct be_pmem_stats *pmem_sts = &hw_stats->pmem;
443 struct be_rxf_stats_v2 *rxf_stats = &hw_stats->rxf;
444 struct be_port_rxf_stats_v2 *port_stats =
445 &rxf_stats->port[adapter->port_num];
446 struct be_drv_stats *drvs = &adapter->drv_stats;
447
448 be_dws_le_to_cpu(hw_stats, sizeof(*hw_stats));
449 drvs->pmem_fifo_overflow_drop = port_stats->pmem_fifo_overflow_drop;
450 drvs->rx_priority_pause_frames = port_stats->rx_priority_pause_frames;
451 drvs->rx_pause_frames = port_stats->rx_pause_frames;
452 drvs->rx_crc_errors = port_stats->rx_crc_errors;
453 drvs->rx_control_frames = port_stats->rx_control_frames;
454 drvs->rx_in_range_errors = port_stats->rx_in_range_errors;
455 drvs->rx_frame_too_long = port_stats->rx_frame_too_long;
456 drvs->rx_dropped_runt = port_stats->rx_dropped_runt;
457 drvs->rx_ip_checksum_errs = port_stats->rx_ip_checksum_errs;
458 drvs->rx_tcp_checksum_errs = port_stats->rx_tcp_checksum_errs;
459 drvs->rx_udp_checksum_errs = port_stats->rx_udp_checksum_errs;
460 drvs->rx_dropped_tcp_length = port_stats->rx_dropped_tcp_length;
461 drvs->rx_dropped_too_small = port_stats->rx_dropped_too_small;
462 drvs->rx_dropped_too_short = port_stats->rx_dropped_too_short;
463 drvs->rx_out_range_errors = port_stats->rx_out_range_errors;
464 drvs->rx_dropped_header_too_small =
465 port_stats->rx_dropped_header_too_small;
466 drvs->rx_input_fifo_overflow_drop =
467 port_stats->rx_input_fifo_overflow_drop;
468 drvs->rx_address_filtered = port_stats->rx_address_filtered;
469 drvs->rx_alignment_symbol_errors =
470 port_stats->rx_alignment_symbol_errors;
471 drvs->rxpp_fifo_overflow_drop = port_stats->rxpp_fifo_overflow_drop;
472 drvs->tx_pauseframes = port_stats->tx_pauseframes;
473 drvs->tx_controlframes = port_stats->tx_controlframes;
474 drvs->tx_priority_pauseframes = port_stats->tx_priority_pauseframes;
475 drvs->jabber_events = port_stats->jabber_events;
476 drvs->rx_drops_no_pbuf = rxf_stats->rx_drops_no_pbuf;
477 drvs->rx_drops_no_erx_descr = rxf_stats->rx_drops_no_erx_descr;
478 drvs->forwarded_packets = rxf_stats->forwarded_packets;
479 drvs->rx_drops_mtu = rxf_stats->rx_drops_mtu;
480 drvs->rx_drops_no_tpre_descr = rxf_stats->rx_drops_no_tpre_descr;
481 drvs->rx_drops_too_many_frags = rxf_stats->rx_drops_too_many_frags;
482 adapter->drv_stats.eth_red_drops = pmem_sts->eth_red_drops;
748b539a 483 if (be_roce_supported(adapter)) {
461ae379
AK		 484 drvs->rx_roce_bytes_lsd = port_stats->roce_bytes_received_lsd;
485 drvs->rx_roce_bytes_msd = port_stats->roce_bytes_received_msd;
486 drvs->rx_roce_frames = port_stats->roce_frames_received;
487 drvs->roce_drops_crc = port_stats->roce_drops_crc;
488 drvs->roce_drops_payload_len =
489 port_stats->roce_drops_payload_len;
490 }
61000861
AK		 491}
492
005d5696
SX		 493static void populate_lancer_stats(struct be_adapter *adapter)
494{
005d5696 495 struct be_drv_stats *drvs = &adapter->drv_stats;
748b539a 496 struct lancer_pport_stats *pport_stats = pport_stats_from_cmd(adapter);
ac124ff9
SP		 497
498 be_dws_le_to_cpu(pport_stats, sizeof(*pport_stats));
499 drvs->rx_pause_frames = pport_stats->rx_pause_frames_lo;
500 drvs->rx_crc_errors = pport_stats->rx_crc_errors_lo;
501 drvs->rx_control_frames = pport_stats->rx_control_frames_lo;
005d5696 502 drvs->rx_in_range_errors = pport_stats->rx_in_range_errors;
ac124ff9 503 drvs->rx_frame_too_long = pport_stats->rx_frames_too_long_lo;
005d5696
SX		 504 drvs->rx_dropped_runt = pport_stats->rx_dropped_runt;
505 drvs->rx_ip_checksum_errs = pport_stats->rx_ip_checksum_errors;
506 drvs->rx_tcp_checksum_errs = pport_stats->rx_tcp_checksum_errors;
507 drvs->rx_udp_checksum_errs = pport_stats->rx_udp_checksum_errors;
508 drvs->rx_dropped_tcp_length =
509 pport_stats->rx_dropped_invalid_tcp_length;
510 drvs->rx_dropped_too_small = pport_stats->rx_dropped_too_small;
511 drvs->rx_dropped_too_short = pport_stats->rx_dropped_too_short;
512 drvs->rx_out_range_errors = pport_stats->rx_out_of_range_errors;
513 drvs->rx_dropped_header_too_small =
514 pport_stats->rx_dropped_header_too_small;
515 drvs->rx_input_fifo_overflow_drop = pport_stats->rx_fifo_overflow;
18fb06a1
SR		 516 drvs->rx_address_filtered =
517 pport_stats->rx_address_filtered +
518 pport_stats->rx_vlan_filtered;
ac124ff9 519 drvs->rx_alignment_symbol_errors = pport_stats->rx_symbol_errors_lo;
005d5696 520 drvs->rxpp_fifo_overflow_drop = pport_stats->rx_fifo_overflow;
ac124ff9
SP		 521 drvs->tx_pauseframes = pport_stats->tx_pause_frames_lo;
522 drvs->tx_controlframes = pport_stats->tx_control_frames_lo;
005d5696 523 drvs->jabber_events = pport_stats->rx_jabbers;
ac124ff9
SP		 524 drvs->forwarded_packets = pport_stats->num_forwards_lo;
525 drvs->rx_drops_mtu = pport_stats->rx_drops_mtu_lo;
005d5696 526 drvs->rx_drops_too_many_frags =
ac124ff9 527 pport_stats->rx_drops_too_many_frags_lo;
005d5696 528}
89a88ab8 529
09c1c68f
SP		 530static void accumulate_16bit_val(u32 *acc, u16 val)
531{
532#define lo(x) (x & 0xFFFF)
533#define hi(x) (x & 0xFFFF0000)
534 bool wrapped = val < lo(*acc);
535 u32 newacc = hi(*acc) + val;
536
537 if (wrapped)
538 newacc += 65536;
539 ACCESS_ONCE(*acc) = newacc;
540}
541
4188e7df 542static void populate_erx_stats(struct be_adapter *adapter,
748b539a 543 struct be_rx_obj *rxo, u32 erx_stat)
a6c578ef
AK		 544{
545 if (!BEx_chip(adapter))
546 rx_stats(rxo)->rx_drops_no_frags = erx_stat;
547 else
548 /* below erx HW counter can actually wrap around after
549 * 65535. Driver accumulates a 32-bit value
550 */
551 accumulate_16bit_val(&rx_stats(rxo)->rx_drops_no_frags,
552 (u16)erx_stat);
553}
554
89a88ab8
AK		 555void be_parse_stats(struct be_adapter *adapter)
556{
61000861 557 struct be_erx_stats_v2 *erx = be_erx_stats_from_cmd(adapter);
ac124ff9
SP		 558 struct be_rx_obj *rxo;
559 int i;
a6c578ef 560 u32 erx_stat;
ac124ff9 561
ca34fe38
SP		 562 if (lancer_chip(adapter)) {
563 populate_lancer_stats(adapter);
005d5696 564 } else {
ca34fe38
SP		 565 if (BE2_chip(adapter))
566 populate_be_v0_stats(adapter);
61000861
AK		 567 else if (BE3_chip(adapter))
568 /* for BE3 */
ca34fe38 569 populate_be_v1_stats(adapter);
61000861
AK		 570 else
571 populate_be_v2_stats(adapter);
d51ebd33 572
61000861 573 /* erx_v2 is longer than v0, v1. use v2 for v0, v1 access */
ca34fe38 574 for_all_rx_queues(adapter, rxo, i) {
a6c578ef
AK		 575 erx_stat = erx->rx_drops_no_fragments[rxo->q.id];
576 populate_erx_stats(adapter, rxo, erx_stat);
ca34fe38 577 }
09c1c68f 578 }
89a88ab8
AK		 579}
580
ab1594e9 581static struct rtnl_link_stats64 *be_get_stats64(struct net_device *netdev,
748b539a 582 struct rtnl_link_stats64 *stats)
6b7c5b94 583{
ab1594e9 584 struct be_adapter *adapter = netdev_priv(netdev);
89a88ab8 585 struct be_drv_stats *drvs = &adapter->drv_stats;
3abcdeda 586 struct be_rx_obj *rxo;
3c8def97 587 struct be_tx_obj *txo;
ab1594e9
SP		 588 u64 pkts, bytes;
589 unsigned int start;
3abcdeda 590 int i;
6b7c5b94 591
3abcdeda 592 for_all_rx_queues(adapter, rxo, i) {
ab1594e9 593 const struct be_rx_stats *rx_stats = rx_stats(rxo);
03d28ffe 594
ab1594e9 595 do {
57a7744e 596 start = u64_stats_fetch_begin_irq(&rx_stats->sync);
ab1594e9
SP		 597 pkts = rx_stats(rxo)->rx_pkts;
598 bytes = rx_stats(rxo)->rx_bytes;
57a7744e 599 } while (u64_stats_fetch_retry_irq(&rx_stats->sync, start));
ab1594e9
SP		 600 stats->rx_packets += pkts;
601 stats->rx_bytes += bytes;
602 stats->multicast += rx_stats(rxo)->rx_mcast_pkts;
603 stats->rx_dropped += rx_stats(rxo)->rx_drops_no_skbs +
604 rx_stats(rxo)->rx_drops_no_frags;
3abcdeda
SP		 605 }
606
3c8def97 607 for_all_tx_queues(adapter, txo, i) {
ab1594e9 608 const struct be_tx_stats *tx_stats = tx_stats(txo);
03d28ffe 609
ab1594e9 610 do {
57a7744e 611 start = u64_stats_fetch_begin_irq(&tx_stats->sync);
ab1594e9
SP		 612 pkts = tx_stats(txo)->tx_pkts;
613 bytes = tx_stats(txo)->tx_bytes;
57a7744e 614 } while (u64_stats_fetch_retry_irq(&tx_stats->sync, start));
ab1594e9
SP		 615 stats->tx_packets += pkts;
616 stats->tx_bytes += bytes;
3c8def97 617 }
6b7c5b94
SP		 618
619 /* bad pkts received */
ab1594e9 620 stats->rx_errors = drvs->rx_crc_errors +
89a88ab8
AK		 621 drvs->rx_alignment_symbol_errors +
622 drvs->rx_in_range_errors +
623 drvs->rx_out_range_errors +
624 drvs->rx_frame_too_long +
625 drvs->rx_dropped_too_small +
626 drvs->rx_dropped_too_short +
627 drvs->rx_dropped_header_too_small +
628 drvs->rx_dropped_tcp_length +
ab1594e9 629 drvs->rx_dropped_runt;
68110868 630
6b7c5b94 631 /* detailed rx errors */
ab1594e9 632 stats->rx_length_errors = drvs->rx_in_range_errors +
89a88ab8
AK		 633 drvs->rx_out_range_errors +
634 drvs->rx_frame_too_long;
68110868 635
ab1594e9 636 stats->rx_crc_errors = drvs->rx_crc_errors;
6b7c5b94
SP		 637
638 /* frame alignment errors */
ab1594e9 639 stats->rx_frame_errors = drvs->rx_alignment_symbol_errors;
68110868 640
6b7c5b94
SP		 641 /* receiver fifo overrun */
642 /* drops_no_pbuf is no per i/f, it's per BE card */
ab1594e9 643 stats->rx_fifo_errors = drvs->rxpp_fifo_overflow_drop +
89a88ab8
AK		 644 drvs->rx_input_fifo_overflow_drop +
645 drvs->rx_drops_no_pbuf;
ab1594e9 646 return stats;
6b7c5b94
SP		 647}
648
b236916a 649void be_link_status_update(struct be_adapter *adapter, u8 link_status)
6b7c5b94 650{
6b7c5b94
SP		 651 struct net_device *netdev = adapter->netdev;
652
b236916a 653 if (!(adapter->flags & BE_FLAGS_LINK_STATUS_INIT)) {
ea172a01 654 netif_carrier_off(netdev);
b236916a 655 adapter->flags |= BE_FLAGS_LINK_STATUS_INIT;
6b7c5b94 656 }
b236916a 657
bdce2ad7 658 if (link_status)
b236916a
AK		 659 netif_carrier_on(netdev);
660 else
661 netif_carrier_off(netdev);
6b7c5b94
SP		 662}
663
5f07b3c5 664static void be_tx_stats_update(struct be_tx_obj *txo, struct sk_buff *skb)
6b7c5b94 665{
3c8def97
SP		 666 struct be_tx_stats *stats = tx_stats(txo);
667
ab1594e9 668 u64_stats_update_begin(&stats->sync);
ac124ff9 669 stats->tx_reqs++;
5f07b3c5
SP		 670 stats->tx_bytes += skb->len;
671 stats->tx_pkts += (skb_shinfo(skb)->gso_segs ? : 1);
ab1594e9 672 u64_stats_update_end(&stats->sync);
6b7c5b94
SP		 673}
674
5f07b3c5
SP		 675/* Returns number of WRBs needed for the skb */
676static u32 skb_wrb_cnt(struct sk_buff *skb)
6b7c5b94 677{
5f07b3c5
SP		 678 /* +1 for the header wrb */
679 return 1 + (skb_headlen(skb) ? 1 : 0) + skb_shinfo(skb)->nr_frags;
6b7c5b94
SP		 680}
681
682static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len)
683{
f986afcb
SP		 684 wrb->frag_pa_hi = cpu_to_le32(upper_32_bits(addr));
685 wrb->frag_pa_lo = cpu_to_le32(lower_32_bits(addr));
686 wrb->frag_len = cpu_to_le32(len & ETH_WRB_FRAG_LEN_MASK);
687 wrb->rsvd0 = 0;
688}
689
690/* A dummy wrb is just all zeros. Using a separate routine for dummy-wrb
691 * to avoid the swap and shift/mask operations in wrb_fill().
692 */
693static inline void wrb_fill_dummy(struct be_eth_wrb *wrb)
694{
695 wrb->frag_pa_hi = 0;
696 wrb->frag_pa_lo = 0;
697 wrb->frag_len = 0;
89b1f496 698 wrb->rsvd0 = 0;
6b7c5b94
SP		 699}
700
1ded132d 701static inline u16 be_get_tx_vlan_tag(struct be_adapter *adapter,
748b539a 702 struct sk_buff *skb)
1ded132d
AK		 703{
704 u8 vlan_prio;
705 u16 vlan_tag;
706
df8a39de 707 vlan_tag = skb_vlan_tag_get(skb);
1ded132d
AK		 708 vlan_prio = (vlan_tag & VLAN_PRIO_MASK) >> VLAN_PRIO_SHIFT;
709 /* If vlan priority provided by OS is NOT in available bmap */
710 if (!(adapter->vlan_prio_bmap & (1 << vlan_prio)))
711 vlan_tag = (vlan_tag & ~VLAN_PRIO_MASK) |
712 adapter->recommended_prio;
713
714 return vlan_tag;
715}
716
c9c47142
SP		 717/* Used only for IP tunnel packets */
718static u16 skb_inner_ip_proto(struct sk_buff *skb)
719{
720 return (inner_ip_hdr(skb)->version == 4) ?
721 inner_ip_hdr(skb)->protocol : inner_ipv6_hdr(skb)->nexthdr;
722}
723
724static u16 skb_ip_proto(struct sk_buff *skb)
725{
726 return (ip_hdr(skb)->version == 4) ?
727 ip_hdr(skb)->protocol : ipv6_hdr(skb)->nexthdr;
728}
729
cf5671e6
SB		 730static inline bool be_is_txq_full(struct be_tx_obj *txo)
731{
732 return atomic_read(&txo->q.used) + BE_MAX_TX_FRAG_COUNT >= txo->q.len;
733}
734
735static inline bool be_can_txq_wake(struct be_tx_obj *txo)
736{
737 return atomic_read(&txo->q.used) < txo->q.len / 2;
738}
739
740static inline bool be_is_tx_compl_pending(struct be_tx_obj *txo)
741{
742 return atomic_read(&txo->q.used) > txo->pend_wrb_cnt;
743}
744
804abcdb
SB		 745static void be_get_wrb_params_from_skb(struct be_adapter *adapter,
746 struct sk_buff *skb,
747 struct be_wrb_params *wrb_params)
6b7c5b94 748{
804abcdb 749 u16 proto;
6b7c5b94 750
49e4b847 751 if (skb_is_gso(skb)) {
804abcdb
SB		 752 BE_WRB_F_SET(wrb_params->features, LSO, 1);
753 wrb_params->lso_mss = skb_shinfo(skb)->gso_size;
fe6d2a38 754 if (skb_is_gso_v6(skb) && !lancer_chip(adapter))
804abcdb 755 BE_WRB_F_SET(wrb_params->features, LSO6, 1);
6b7c5b94 756 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
c9c47142 757 if (skb->encapsulation) {
804abcdb 758 BE_WRB_F_SET(wrb_params->features, IPCS, 1);
c9c47142
SP		 759 proto = skb_inner_ip_proto(skb);
760 } else {
761 proto = skb_ip_proto(skb);
762 }
763 if (proto == IPPROTO_TCP)
804abcdb 764 BE_WRB_F_SET(wrb_params->features, TCPCS, 1);
c9c47142 765 else if (proto == IPPROTO_UDP)
804abcdb 766 BE_WRB_F_SET(wrb_params->features, UDPCS, 1);
6b7c5b94
SP		 767 }
768
df8a39de 769 if (skb_vlan_tag_present(skb)) {
804abcdb
SB		 770 BE_WRB_F_SET(wrb_params->features, VLAN, 1);
771 wrb_params->vlan_tag = be_get_tx_vlan_tag(adapter, skb);
6b7c5b94
SP		 772 }
773
804abcdb
SB		 774 BE_WRB_F_SET(wrb_params->features, CRC, 1);
775}
5f07b3c5 776
804abcdb
SB		 777static void wrb_fill_hdr(struct be_adapter *adapter,
778 struct be_eth_hdr_wrb *hdr,
779 struct be_wrb_params *wrb_params,
780 struct sk_buff *skb)
781{
782 memset(hdr, 0, sizeof(*hdr));
783
784 SET_TX_WRB_HDR_BITS(crc, hdr,
785 BE_WRB_F_GET(wrb_params->features, CRC));
786 SET_TX_WRB_HDR_BITS(ipcs, hdr,
787 BE_WRB_F_GET(wrb_params->features, IPCS));
788 SET_TX_WRB_HDR_BITS(tcpcs, hdr,
789 BE_WRB_F_GET(wrb_params->features, TCPCS));
790 SET_TX_WRB_HDR_BITS(udpcs, hdr,
791 BE_WRB_F_GET(wrb_params->features, UDPCS));
792
793 SET_TX_WRB_HDR_BITS(lso, hdr,
794 BE_WRB_F_GET(wrb_params->features, LSO));
795 SET_TX_WRB_HDR_BITS(lso6, hdr,
796 BE_WRB_F_GET(wrb_params->features, LSO6));
797 SET_TX_WRB_HDR_BITS(lso_mss, hdr, wrb_params->lso_mss);
798
799 /* Hack to skip HW VLAN tagging needs evt = 1, compl = 0. When this
800 * hack is not needed, the evt bit is set while ringing DB.
5f07b3c5 801 */
804abcdb
SB		 802 SET_TX_WRB_HDR_BITS(event, hdr,
803 BE_WRB_F_GET(wrb_params->features, VLAN_SKIP_HW));
804 SET_TX_WRB_HDR_BITS(vlan, hdr,
805 BE_WRB_F_GET(wrb_params->features, VLAN));
806 SET_TX_WRB_HDR_BITS(vlan_tag, hdr, wrb_params->vlan_tag);
807
808 SET_TX_WRB_HDR_BITS(num_wrb, hdr, skb_wrb_cnt(skb));
809 SET_TX_WRB_HDR_BITS(len, hdr, skb->len);
6b7c5b94
SP		 810}
811
2b7bcebf 812static void unmap_tx_frag(struct device *dev, struct be_eth_wrb *wrb,
748b539a 813 bool unmap_single)
7101e111
SP		 814{
815 dma_addr_t dma;
f986afcb 816 u32 frag_len = le32_to_cpu(wrb->frag_len);
7101e111 817
7101e111 818
f986afcb
SP		 819 dma = (u64)le32_to_cpu(wrb->frag_pa_hi) << 32 |
820 (u64)le32_to_cpu(wrb->frag_pa_lo);
821 if (frag_len) {
7101e111 822 if (unmap_single)
f986afcb 823 dma_unmap_single(dev, dma, frag_len, DMA_TO_DEVICE);
7101e111 824 else
f986afcb 825 dma_unmap_page(dev, dma, frag_len, DMA_TO_DEVICE);
7101e111
SP		 826 }
827}
6b7c5b94 828
79a0d7d8
SB		 829/* Grab a WRB header for xmit */
830static u16 be_tx_get_wrb_hdr(struct be_tx_obj *txo)
831{
832 u16 head = txo->q.head;
833
834 queue_head_inc(&txo->q);
835 return head;
836}
837
838/* Set up the WRB header for xmit */
839static void be_tx_setup_wrb_hdr(struct be_adapter *adapter,
840 struct be_tx_obj *txo,
841 struct be_wrb_params *wrb_params,
842 struct sk_buff *skb, u16 head)
843{
844 u32 num_frags = skb_wrb_cnt(skb);
845 struct be_queue_info *txq = &txo->q;
846 struct be_eth_hdr_wrb *hdr = queue_index_node(txq, head);
847
848 wrb_fill_hdr(adapter, hdr, wrb_params, skb);
849 be_dws_cpu_to_le(hdr, sizeof(*hdr));
850
851 BUG_ON(txo->sent_skb_list[head]);
852 txo->sent_skb_list[head] = skb;
853 txo->last_req_hdr = head;
854 atomic_add(num_frags, &txq->used);
855 txo->last_req_wrb_cnt = num_frags;
856 txo->pend_wrb_cnt += num_frags;
857}
858
859/* Setup a WRB fragment (buffer descriptor) for xmit */
860static void be_tx_setup_wrb_frag(struct be_tx_obj *txo, dma_addr_t busaddr,
861 int len)
862{
863 struct be_eth_wrb *wrb;
864 struct be_queue_info *txq = &txo->q;
865
866 wrb = queue_head_node(txq);
867 wrb_fill(wrb, busaddr, len);
868 queue_head_inc(txq);
869}
870
871/* Bring the queue back to the state it was in before be_xmit_enqueue() routine
872 * was invoked. The producer index is restored to the previous packet and the
873 * WRBs of the current packet are unmapped. Invoked to handle tx setup errors.
874 */
875static void be_xmit_restore(struct be_adapter *adapter,
876 struct be_tx_obj *txo, u16 head, bool map_single,
877 u32 copied)
878{
879 struct device *dev;
880 struct be_eth_wrb *wrb;
881 struct be_queue_info *txq = &txo->q;
882
883 dev = &adapter->pdev->dev;
884 txq->head = head;
885
886 /* skip the first wrb (hdr); it's not mapped */
887 queue_head_inc(txq);
888 while (copied) {
889 wrb = queue_head_node(txq);
890 unmap_tx_frag(dev, wrb, map_single);
891 map_single = false;
892 copied -= le32_to_cpu(wrb->frag_len);
893 queue_head_inc(txq);
894 }
895
896 txq->head = head;
897}
898
899/* Enqueue the given packet for transmit. This routine allocates WRBs for the
900 * packet, dma maps the packet buffers and sets up the WRBs. Returns the number
901 * of WRBs used up by the packet.
902 */
5f07b3c5 903static u32 be_xmit_enqueue(struct be_adapter *adapter, struct be_tx_obj *txo,
804abcdb
SB		 904 struct sk_buff *skb,
905 struct be_wrb_params *wrb_params)
6b7c5b94 906{
5f07b3c5 907 u32 i, copied = 0, wrb_cnt = skb_wrb_cnt(skb);
2b7bcebf 908 struct device *dev = &adapter->pdev->dev;
5f07b3c5 909 struct be_queue_info *txq = &txo->q;
7101e111 910 bool map_single = false;
5f07b3c5 911 u16 head = txq->head;
79a0d7d8
SB		 912 dma_addr_t busaddr;
913 int len;
6b7c5b94 914
79a0d7d8 915 head = be_tx_get_wrb_hdr(txo);
6b7c5b94 916
ebc8d2ab 917 if (skb->len > skb->data_len) {
79a0d7d8 918 len = skb_headlen(skb);
03d28ffe 919
2b7bcebf
IV		 920 busaddr = dma_map_single(dev, skb->data, len, DMA_TO_DEVICE);
921 if (dma_mapping_error(dev, busaddr))
7101e111
SP		 922 goto dma_err;
923 map_single = true;
79a0d7d8 924 be_tx_setup_wrb_frag(txo, busaddr, len);
ebc8d2ab
DM		 925 copied += len;
926 }
6b7c5b94 927
ebc8d2ab 928 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
748b539a 929 const struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i];
79a0d7d8 930 len = skb_frag_size(frag);
03d28ffe 931
79a0d7d8 932 busaddr = skb_frag_dma_map(dev, frag, 0, len, DMA_TO_DEVICE);
2b7bcebf 933 if (dma_mapping_error(dev, busaddr))
7101e111 934 goto dma_err;
79a0d7d8
SB		 935 be_tx_setup_wrb_frag(txo, busaddr, len);
936 copied += len;
6b7c5b94
SP		 937 }
938
79a0d7d8 939 be_tx_setup_wrb_hdr(adapter, txo, wrb_params, skb, head);
6b7c5b94 940
5f07b3c5
SP		 941 be_tx_stats_update(txo, skb);
942 return wrb_cnt;
6b7c5b94 943
7101e111 944dma_err:
79a0d7d8
SB		 945 adapter->drv_stats.dma_map_errors++;
946 be_xmit_restore(adapter, txo, head, map_single, copied);
7101e111 947 return 0;
6b7c5b94
SP		 948}
949
f7062ee5
SP		 950static inline int qnq_async_evt_rcvd(struct be_adapter *adapter)
951{
952 return adapter->flags & BE_FLAGS_QNQ_ASYNC_EVT_RCVD;
953}
954
93040ae5 955static struct sk_buff *be_insert_vlan_in_pkt(struct be_adapter *adapter,
bc0c3405 956 struct sk_buff *skb,
804abcdb
SB		 957 struct be_wrb_params
958 *wrb_params)
93040ae5
SK		 959{
960 u16 vlan_tag = 0;
961
962 skb = skb_share_check(skb, GFP_ATOMIC);
963 if (unlikely(!skb))
964 return skb;
965
df8a39de 966 if (skb_vlan_tag_present(skb))
93040ae5 967 vlan_tag = be_get_tx_vlan_tag(adapter, skb);
52fe29e4
SB		 968
969 if (qnq_async_evt_rcvd(adapter) && adapter->pvid) {
970 if (!vlan_tag)
971 vlan_tag = adapter->pvid;
972 /* f/w workaround to set skip_hw_vlan = 1, informs the F/W to
973 * skip VLAN insertion
974 */
804abcdb 975 BE_WRB_F_SET(wrb_params->features, VLAN_SKIP_HW, 1);
52fe29e4 976 }
bc0c3405
AK		 977
978 if (vlan_tag) {
62749e2c
JP		 979 skb = vlan_insert_tag_set_proto(skb, htons(ETH_P_8021Q),
980 vlan_tag);
bc0c3405
AK		 981 if (unlikely(!skb))
982 return skb;
bc0c3405
AK		 983 skb->vlan_tci = 0;
984 }
985
986 /* Insert the outer VLAN, if any */
987 if (adapter->qnq_vid) {
988 vlan_tag = adapter->qnq_vid;
62749e2c
JP		 989 skb = vlan_insert_tag_set_proto(skb, htons(ETH_P_8021Q),
990 vlan_tag);
bc0c3405
AK		 991 if (unlikely(!skb))
992 return skb;
804abcdb 993 BE_WRB_F_SET(wrb_params->features, VLAN_SKIP_HW, 1);
bc0c3405
AK		 994 }
995
93040ae5
SK		 996 return skb;
997}
998
bc0c3405
AK		 999static bool be_ipv6_exthdr_check(struct sk_buff *skb)
1000{
1001 struct ethhdr *eh = (struct ethhdr *)skb->data;
1002 u16 offset = ETH_HLEN;
1003
1004 if (eh->h_proto == htons(ETH_P_IPV6)) {
1005 struct ipv6hdr *ip6h = (struct ipv6hdr *)(skb->data + offset);
1006
1007 offset += sizeof(struct ipv6hdr);
1008 if (ip6h->nexthdr != NEXTHDR_TCP &&
1009 ip6h->nexthdr != NEXTHDR_UDP) {
1010 struct ipv6_opt_hdr *ehdr =
504fbf1e 1011 (struct ipv6_opt_hdr *)(skb->data + offset);
bc0c3405
AK		 1012
1013 /* offending pkt: 2nd byte following IPv6 hdr is 0xff */
1014 if (ehdr->hdrlen == 0xff)
1015 return true;
1016 }
1017 }
1018 return false;
1019}
1020
1021static int be_vlan_tag_tx_chk(struct be_adapter *adapter, struct sk_buff *skb)
1022{
df8a39de 1023 return skb_vlan_tag_present(skb) || adapter->pvid || adapter->qnq_vid;
bc0c3405
AK		 1024}
1025
748b539a 1026static int be_ipv6_tx_stall_chk(struct be_adapter *adapter, struct sk_buff *skb)
bc0c3405 1027{
ee9c799c 1028 return BE3_chip(adapter) && be_ipv6_exthdr_check(skb);
bc0c3405
AK		 1029}
1030
ec495fac
VV		 1031static struct sk_buff *be_lancer_xmit_workarounds(struct be_adapter *adapter,
1032 struct sk_buff *skb,
804abcdb
SB		 1033 struct be_wrb_params
1034 *wrb_params)
6b7c5b94 1035{
d2cb6ce7 1036 struct vlan_ethhdr *veh = (struct vlan_ethhdr *)skb->data;
ee9c799c
SP		 1037 unsigned int eth_hdr_len;
1038 struct iphdr *ip;
93040ae5 1039
1297f9db
AK		 1040 /* For padded packets, BE HW modifies tot_len field in IP header
1041 * incorrecly when VLAN tag is inserted by HW.
3904dcc4 1042 * For padded packets, Lancer computes incorrect checksum.
1ded132d 1043 */
ee9c799c
SP		 1044 eth_hdr_len = ntohs(skb->protocol) == ETH_P_8021Q ?
1045 VLAN_ETH_HLEN : ETH_HLEN;
3904dcc4 1046 if (skb->len <= 60 &&
df8a39de 1047 (lancer_chip(adapter) || skb_vlan_tag_present(skb)) &&
ee9c799c 1048 is_ipv4_pkt(skb)) {
93040ae5
SK		 1049 ip = (struct iphdr *)ip_hdr(skb);
1050 pskb_trim(skb, eth_hdr_len + ntohs(ip->tot_len));
1051 }
1ded132d 1052
d2cb6ce7 1053 /* If vlan tag is already inlined in the packet, skip HW VLAN
f93f160b 1054 * tagging in pvid-tagging mode
d2cb6ce7 1055 */
f93f160b 1056 if (be_pvid_tagging_enabled(adapter) &&
d2cb6ce7 1057 veh->h_vlan_proto == htons(ETH_P_8021Q))
804abcdb 1058 BE_WRB_F_SET(wrb_params->features, VLAN_SKIP_HW, 1);
d2cb6ce7 1059
93040ae5
SK		 1060 /* HW has a bug wherein it will calculate CSUM for VLAN
1061 * pkts even though it is disabled.
1062 * Manually insert VLAN in pkt.
1063 */
1064 if (skb->ip_summed != CHECKSUM_PARTIAL &&
df8a39de 1065 skb_vlan_tag_present(skb)) {
804abcdb 1066 skb = be_insert_vlan_in_pkt(adapter, skb, wrb_params);
bc0c3405 1067 if (unlikely(!skb))
c9128951 1068 goto err;
bc0c3405
AK		 1069 }
1070
1071 /* HW may lockup when VLAN HW tagging is requested on
1072 * certain ipv6 packets. Drop such pkts if the HW workaround to
1073 * skip HW tagging is not enabled by FW.
1074 */
1075 if (unlikely(be_ipv6_tx_stall_chk(adapter, skb) &&
cd3307aa
KA		 1076 (adapter->pvid || adapter->qnq_vid) &&
1077 !qnq_async_evt_rcvd(adapter)))
bc0c3405
AK		 1078 goto tx_drop;
1079
1080 /* Manual VLAN tag insertion to prevent:
1081 * ASIC lockup when the ASIC inserts VLAN tag into
1082 * certain ipv6 packets. Insert VLAN tags in driver,
1083 * and set event, completion, vlan bits accordingly
1084 * in the Tx WRB.
1085 */
1086 if (be_ipv6_tx_stall_chk(adapter, skb) &&
1087 be_vlan_tag_tx_chk(adapter, skb)) {
804abcdb 1088 skb = be_insert_vlan_in_pkt(adapter, skb, wrb_params);
1ded132d 1089 if (unlikely(!skb))
c9128951 1090 goto err;
1ded132d
AK		 1091 }
1092
ee9c799c
SP		 1093 return skb;
1094tx_drop:
1095 dev_kfree_skb_any(skb);
c9128951 1096err:
ee9c799c
SP		 1097 return NULL;
1098}
1099
ec495fac
VV		 1100static struct sk_buff *be_xmit_workarounds(struct be_adapter *adapter,
1101 struct sk_buff *skb,
804abcdb 1102 struct be_wrb_params *wrb_params)
ec495fac
VV		 1103{
1104 /* Lancer, SH-R ASICs have a bug wherein Packets that are 32 bytes or
1105 * less may cause a transmit stall on that port. So the work-around is
1106 * to pad short packets (<= 32 bytes) to a 36-byte length.
1107 */
1108 if (unlikely(!BEx_chip(adapter) && skb->len <= 32)) {
74b6939d 1109 if (skb_put_padto(skb, 36))
ec495fac 1110 return NULL;
ec495fac
VV		 1111 }
1112
1113 if (BEx_chip(adapter) || lancer_chip(adapter)) {
804abcdb 1114 skb = be_lancer_xmit_workarounds(adapter, skb, wrb_params);
ec495fac
VV		 1115 if (!skb)
1116 return NULL;
1117 }
1118
1119 return skb;
1120}
1121
5f07b3c5
SP		 1122static void be_xmit_flush(struct be_adapter *adapter, struct be_tx_obj *txo)
1123{
1124 struct be_queue_info *txq = &txo->q;
1125 struct be_eth_hdr_wrb *hdr = queue_index_node(txq, txo->last_req_hdr);
1126
1127 /* Mark the last request eventable if it hasn't been marked already */
1128 if (!(hdr->dw[2] & cpu_to_le32(TX_HDR_WRB_EVT)))
1129 hdr->dw[2] |= cpu_to_le32(TX_HDR_WRB_EVT | TX_HDR_WRB_COMPL);
1130
1131 /* compose a dummy wrb if there are odd set of wrbs to notify */
1132 if (!lancer_chip(adapter) && (txo->pend_wrb_cnt & 1)) {
f986afcb 1133 wrb_fill_dummy(queue_head_node(txq));
5f07b3c5
SP		 1134 queue_head_inc(txq);
1135 atomic_inc(&txq->used);
1136 txo->pend_wrb_cnt++;
1137 hdr->dw[2] &= ~cpu_to_le32(TX_HDR_WRB_NUM_MASK <<
1138 TX_HDR_WRB_NUM_SHIFT);
1139 hdr->dw[2] |= cpu_to_le32((txo->last_req_wrb_cnt + 1) <<
1140 TX_HDR_WRB_NUM_SHIFT);
1141 }
1142 be_txq_notify(adapter, txo, txo->pend_wrb_cnt);
1143 txo->pend_wrb_cnt = 0;
1144}
1145
ee9c799c
SP		 1146static netdev_tx_t be_xmit(struct sk_buff *skb, struct net_device *netdev)
1147{
1148 struct be_adapter *adapter = netdev_priv(netdev);
5f07b3c5
SP		 1149 u16 q_idx = skb_get_queue_mapping(skb);
1150 struct be_tx_obj *txo = &adapter->tx_obj[q_idx];
804abcdb 1151 struct be_wrb_params wrb_params = { 0 };
804abcdb 1152 bool flush = !skb->xmit_more;
5f07b3c5 1153 u16 wrb_cnt;
ee9c799c 1154
804abcdb 1155 skb = be_xmit_workarounds(adapter, skb, &wrb_params);
5f07b3c5
SP		 1156 if (unlikely(!skb))
1157 goto drop;
6b7c5b94 1158
804abcdb
SB		 1159 be_get_wrb_params_from_skb(adapter, skb, &wrb_params);
1160
1161 wrb_cnt = be_xmit_enqueue(adapter, txo, skb, &wrb_params);
5f07b3c5
SP		 1162 if (unlikely(!wrb_cnt)) {
1163 dev_kfree_skb_any(skb);
1164 goto drop;
1165 }
cd8f76c0 1166
cf5671e6 1167 if (be_is_txq_full(txo)) {
5f07b3c5
SP		 1168 netif_stop_subqueue(netdev, q_idx);
1169 tx_stats(txo)->tx_stops++;
1170 }
c190e3c8 1171
5f07b3c5
SP		 1172 if (flush || __netif_subqueue_stopped(netdev, q_idx))
1173 be_xmit_flush(adapter, txo);
6b7c5b94 1174
5f07b3c5
SP		 1175 return NETDEV_TX_OK;
1176drop:
1177 tx_stats(txo)->tx_drv_drops++;
1178 /* Flush the already enqueued tx requests */
1179 if (flush && txo->pend_wrb_cnt)
1180 be_xmit_flush(adapter, txo);
6b7c5b94 1181
6b7c5b94
SP		 1182 return NETDEV_TX_OK;
1183}
1184
1185static int be_change_mtu(struct net_device *netdev, int new_mtu)
1186{
1187 struct be_adapter *adapter = netdev_priv(netdev);
0d3f5cce
KA		 1188 struct device *dev = &adapter->pdev->dev;
1189
1190 if (new_mtu < BE_MIN_MTU || new_mtu > BE_MAX_MTU) {
1191 dev_info(dev, "MTU must be between %d and %d bytes\n",
1192 BE_MIN_MTU, BE_MAX_MTU);
6b7c5b94
SP		 1193 return -EINVAL;
1194 }
0d3f5cce
KA		 1195
1196 dev_info(dev, "MTU changed from %d to %d bytes\n",
748b539a 1197 netdev->mtu, new_mtu);
6b7c5b94
SP		 1198 netdev->mtu = new_mtu;
1199 return 0;
1200}
1201
f66b7cfd
SP		 1202static inline bool be_in_all_promisc(struct be_adapter *adapter)
1203{
1204 return (adapter->if_flags & BE_IF_FLAGS_ALL_PROMISCUOUS) ==
1205 BE_IF_FLAGS_ALL_PROMISCUOUS;
1206}
1207
1208static int be_set_vlan_promisc(struct be_adapter *adapter)
1209{
1210 struct device *dev = &adapter->pdev->dev;
1211 int status;
1212
1213 if (adapter->if_flags & BE_IF_FLAGS_VLAN_PROMISCUOUS)
1214 return 0;
1215
1216 status = be_cmd_rx_filter(adapter, BE_IF_FLAGS_VLAN_PROMISCUOUS, ON);
1217 if (!status) {
1218 dev_info(dev, "Enabled VLAN promiscuous mode\n");
1219 adapter->if_flags |= BE_IF_FLAGS_VLAN_PROMISCUOUS;
1220 } else {
1221 dev_err(dev, "Failed to enable VLAN promiscuous mode\n");
1222 }
1223 return status;
1224}
1225
1226static int be_clear_vlan_promisc(struct be_adapter *adapter)
1227{
1228 struct device *dev = &adapter->pdev->dev;
1229 int status;
1230
1231 status = be_cmd_rx_filter(adapter, BE_IF_FLAGS_VLAN_PROMISCUOUS, OFF);
1232 if (!status) {
1233 dev_info(dev, "Disabling VLAN promiscuous mode\n");
1234 adapter->if_flags &= ~BE_IF_FLAGS_VLAN_PROMISCUOUS;
1235 }
1236 return status;
1237}
1238
6b7c5b94 1239/*
82903e4b
AK		 1240 * A max of 64 (BE_NUM_VLANS_SUPPORTED) vlans can be configured in BE.
1241 * If the user configures more, place BE in vlan promiscuous mode.
6b7c5b94 1242 */
10329df8 1243static int be_vid_config(struct be_adapter *adapter)
6b7c5b94 1244{
50762667 1245 struct device *dev = &adapter->pdev->dev;
10329df8 1246 u16 vids[BE_NUM_VLANS_SUPPORTED];
f6cbd364 1247 u16 num = 0, i = 0;
82903e4b 1248 int status = 0;
1da87b7f 1249
c0e64ef4 1250 /* No need to further configure vids if in promiscuous mode */
f66b7cfd 1251 if (be_in_all_promisc(adapter))
c0e64ef4
SP		 1252 return 0;
1253
92bf14ab 1254 if (adapter->vlans_added > be_max_vlans(adapter))
f66b7cfd 1255 return be_set_vlan_promisc(adapter);
0fc16ebf
PR		 1256
1257 /* Construct VLAN Table to give to HW */
f6cbd364
RN		 1258 for_each_set_bit(i, adapter->vids, VLAN_N_VID)
1259 vids[num++] = cpu_to_le16(i);
0fc16ebf 1260
4d567d97 1261 status = be_cmd_vlan_config(adapter, adapter->if_handle, vids, num);
0fc16ebf 1262 if (status) {
f66b7cfd 1263 dev_err(dev, "Setting HW VLAN filtering failed\n");
d9d604f8 1264 /* Set to VLAN promisc mode as setting VLAN filter failed */
4c60005f
KA		 1265 if (addl_status(status) ==
1266 MCC_ADDL_STATUS_INSUFFICIENT_RESOURCES)
f66b7cfd
SP		 1267 return be_set_vlan_promisc(adapter);
1268 } else if (adapter->if_flags & BE_IF_FLAGS_VLAN_PROMISCUOUS) {
1269 status = be_clear_vlan_promisc(adapter);
6b7c5b94 1270 }
0fc16ebf 1271 return status;
6b7c5b94
SP		 1272}
1273
80d5c368 1274static int be_vlan_add_vid(struct net_device *netdev, __be16 proto, u16 vid)
6b7c5b94
SP		 1275{
1276 struct be_adapter *adapter = netdev_priv(netdev);
80817cbf 1277 int status = 0;
6b7c5b94 1278
a85e9986
PR		 1279 /* Packets with VID 0 are always received by Lancer by default */
1280 if (lancer_chip(adapter) && vid == 0)
48291c22
VV		 1281 return status;
1282
f6cbd364 1283 if (test_bit(vid, adapter->vids))
48291c22 1284 return status;
a85e9986 1285
f6cbd364 1286 set_bit(vid, adapter->vids);
a6b74e01 1287 adapter->vlans_added++;
8e586137 1288
a6b74e01
SK		 1289 status = be_vid_config(adapter);
1290 if (status) {
1291 adapter->vlans_added--;
f6cbd364 1292 clear_bit(vid, adapter->vids);
a6b74e01 1293 }
48291c22 1294
80817cbf 1295 return status;
6b7c5b94
SP		 1296}
1297
80d5c368 1298static int be_vlan_rem_vid(struct net_device *netdev, __be16 proto, u16 vid)
6b7c5b94
SP		 1299{
1300 struct be_adapter *adapter = netdev_priv(netdev);
1301
a85e9986
PR		 1302 /* Packets with VID 0 are always received by Lancer by default */
1303 if (lancer_chip(adapter) && vid == 0)
9d4dfe4a 1304 return 0;
a85e9986 1305
f6cbd364 1306 clear_bit(vid, adapter->vids);
9d4dfe4a
KA		 1307 adapter->vlans_added--;
1308
1309 return be_vid_config(adapter);
6b7c5b94
SP		 1310}
1311
f66b7cfd 1312static void be_clear_all_promisc(struct be_adapter *adapter)
7ad09458 1313{
ac34b743 1314 be_cmd_rx_filter(adapter, BE_IF_FLAGS_ALL_PROMISCUOUS, OFF);
f66b7cfd 1315 adapter->if_flags &= ~BE_IF_FLAGS_ALL_PROMISCUOUS;
7ad09458
S		 1316}
1317
f66b7cfd
SP		 1318static void be_set_all_promisc(struct be_adapter *adapter)
1319{
1320 be_cmd_rx_filter(adapter, BE_IF_FLAGS_ALL_PROMISCUOUS, ON);
1321 adapter->if_flags |= BE_IF_FLAGS_ALL_PROMISCUOUS;
1322}
1323
1324static void be_set_mc_promisc(struct be_adapter *adapter)
6b7c5b94 1325{
0fc16ebf 1326 int status;
6b7c5b94 1327
f66b7cfd
SP		 1328 if (adapter->if_flags & BE_IF_FLAGS_MCAST_PROMISCUOUS)
1329 return;
6b7c5b94 1330
f66b7cfd
SP		 1331 status = be_cmd_rx_filter(adapter, BE_IF_FLAGS_MCAST_PROMISCUOUS, ON);
1332 if (!status)
1333 adapter->if_flags |= BE_IF_FLAGS_MCAST_PROMISCUOUS;
1334}
1335
1336static void be_set_mc_list(struct be_adapter *adapter)
1337{
1338 int status;
1339
1340 status = be_cmd_rx_filter(adapter, BE_IF_FLAGS_MULTICAST, ON);
1341 if (!status)
1342 adapter->if_flags &= ~BE_IF_FLAGS_MCAST_PROMISCUOUS;
1343 else
1344 be_set_mc_promisc(adapter);
1345}
1346
1347static void be_set_uc_list(struct be_adapter *adapter)
1348{
1349 struct netdev_hw_addr *ha;
1350 int i = 1; /* First slot is claimed by the Primary MAC */
1351
1352 for (; adapter->uc_macs > 0; adapter->uc_macs--, i++)
1353 be_cmd_pmac_del(adapter, adapter->if_handle,
1354 adapter->pmac_id[i], 0);
1355
1356 if (netdev_uc_count(adapter->netdev) > be_max_uc(adapter)) {
1357 be_set_all_promisc(adapter);
1358 return;
6b7c5b94
SP		 1359 }
1360
f66b7cfd
SP		 1361 netdev_for_each_uc_addr(ha, adapter->netdev) {
1362 adapter->uc_macs++; /* First slot is for Primary MAC */
1363 be_cmd_pmac_add(adapter, (u8 *)ha->addr, adapter->if_handle,
1364 &adapter->pmac_id[adapter->uc_macs], 0);
1365 }
1366}
6b7c5b94 1367
f66b7cfd
SP		 1368static void be_clear_uc_list(struct be_adapter *adapter)
1369{
1370 int i;
fbc13f01 1371
f66b7cfd
SP		 1372 for (i = 1; i < (adapter->uc_macs + 1); i++)
1373 be_cmd_pmac_del(adapter, adapter->if_handle,
1374 adapter->pmac_id[i], 0);
1375 adapter->uc_macs = 0;
1376}
fbc13f01 1377
f66b7cfd
SP		 1378static void be_set_rx_mode(struct net_device *netdev)
1379{
1380 struct be_adapter *adapter = netdev_priv(netdev);
fbc13f01 1381
f66b7cfd
SP		 1382 if (netdev->flags & IFF_PROMISC) {
1383 be_set_all_promisc(adapter);
1384 return;
fbc13f01
AK		 1385 }
1386
f66b7cfd
SP		 1387 /* Interface was previously in promiscuous mode; disable it */
1388 if (be_in_all_promisc(adapter)) {
1389 be_clear_all_promisc(adapter);
1390 if (adapter->vlans_added)
1391 be_vid_config(adapter);
0fc16ebf 1392 }
a0794885 1393
f66b7cfd
SP		 1394 /* Enable multicast promisc if num configured exceeds what we support */
1395 if (netdev->flags & IFF_ALLMULTI ||
1396 netdev_mc_count(netdev) > be_max_mc(adapter)) {
1397 be_set_mc_promisc(adapter);
a0794885 1398 return;
f66b7cfd 1399 }
a0794885 1400
f66b7cfd
SP		 1401 if (netdev_uc_count(netdev) != adapter->uc_macs)
1402 be_set_uc_list(adapter);
1403
1404 be_set_mc_list(adapter);
6b7c5b94
SP		 1405}
1406
ba343c77
SB		 1407static int be_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
1408{
1409 struct be_adapter *adapter = netdev_priv(netdev);
11ac75ed 1410 struct be_vf_cfg *vf_cfg = &adapter->vf_cfg[vf];
ba343c77
SB		 1411 int status;
1412
11ac75ed 1413 if (!sriov_enabled(adapter))
ba343c77
SB		 1414 return -EPERM;
1415
11ac75ed 1416 if (!is_valid_ether_addr(mac) || vf >= adapter->num_vfs)
ba343c77
SB		 1417 return -EINVAL;
1418
3c31aaf3
VV		 1419 /* Proceed further only if user provided MAC is different
1420 * from active MAC
1421 */
1422 if (ether_addr_equal(mac, vf_cfg->mac_addr))
1423 return 0;
1424
3175d8c2
SP		 1425 if (BEx_chip(adapter)) {
1426 be_cmd_pmac_del(adapter, vf_cfg->if_handle, vf_cfg->pmac_id,
1427 vf + 1);
ba343c77 1428
11ac75ed
SP		 1429 status = be_cmd_pmac_add(adapter, mac, vf_cfg->if_handle,
1430 &vf_cfg->pmac_id, vf + 1);
3175d8c2
SP		 1431 } else {
1432 status = be_cmd_set_mac(adapter, mac, vf_cfg->if_handle,
1433 vf + 1);
590c391d
PR		 1434 }
1435
abccf23e
KA		 1436 if (status) {
1437 dev_err(&adapter->pdev->dev, "MAC %pM set on VF %d Failed: %#x",
1438 mac, vf, status);
1439 return be_cmd_status(status);
1440 }
64600ea5 1441
abccf23e
KA		 1442 ether_addr_copy(vf_cfg->mac_addr, mac);
1443
1444 return 0;
ba343c77
SB		 1445}
1446
64600ea5 1447static int be_get_vf_config(struct net_device *netdev, int vf,
748b539a 1448 struct ifla_vf_info *vi)
64600ea5
AK		 1449{
1450 struct be_adapter *adapter = netdev_priv(netdev);
11ac75ed 1451 struct be_vf_cfg *vf_cfg = &adapter->vf_cfg[vf];
64600ea5 1452
11ac75ed 1453 if (!sriov_enabled(adapter))
64600ea5
AK		 1454 return -EPERM;
1455
11ac75ed 1456 if (vf >= adapter->num_vfs)
64600ea5
AK		 1457 return -EINVAL;
1458
1459 vi->vf = vf;
ed616689
SC		 1460 vi->max_tx_rate = vf_cfg->tx_rate;
1461 vi->min_tx_rate = 0;
a60b3a13
AK		 1462 vi->vlan = vf_cfg->vlan_tag & VLAN_VID_MASK;
1463 vi->qos = vf_cfg->vlan_tag >> VLAN_PRIO_SHIFT;
11ac75ed 1464 memcpy(&vi->mac, vf_cfg->mac_addr, ETH_ALEN);
bdce2ad7 1465 vi->linkstate = adapter->vf_cfg[vf].plink_tracking;
64600ea5
AK		 1466
1467 return 0;
1468}
1469
748b539a 1470static int be_set_vf_vlan(struct net_device *netdev, int vf, u16 vlan, u8 qos)
1da87b7f
AK		 1471{
1472 struct be_adapter *adapter = netdev_priv(netdev);
b9fc0e53 1473 struct be_vf_cfg *vf_cfg = &adapter->vf_cfg[vf];
1da87b7f
AK		 1474 int status = 0;
1475
11ac75ed 1476 if (!sriov_enabled(adapter))
1da87b7f
AK		 1477 return -EPERM;
1478
b9fc0e53 1479 if (vf >= adapter->num_vfs || vlan > 4095 || qos > 7)
1da87b7f
AK		 1480 return -EINVAL;
1481
b9fc0e53
AK		 1482 if (vlan || qos) {
1483 vlan |= qos << VLAN_PRIO_SHIFT;
c502224e 1484 if (vf_cfg->vlan_tag != vlan)
b9fc0e53
AK		 1485 status = be_cmd_set_hsw_config(adapter, vlan, vf + 1,
1486 vf_cfg->if_handle, 0);
1da87b7f 1487 } else {
f1f3ee1b 1488 /* Reset Transparent Vlan Tagging. */
c502224e
SK		 1489 status = be_cmd_set_hsw_config(adapter, BE_RESET_VLAN_TAG_ID,
1490 vf + 1, vf_cfg->if_handle, 0);
1da87b7f
AK		 1491 }
1492
abccf23e
KA		 1493 if (status) {
1494 dev_err(&adapter->pdev->dev,
1495 "VLAN %d config on VF %d failed : %#x\n", vlan,
1496 vf, status);
1497 return be_cmd_status(status);
1498 }
1499
1500 vf_cfg->vlan_tag = vlan;
1501
1502 return 0;
1da87b7f
AK		 1503}
1504
ed616689
SC		 1505static int be_set_vf_tx_rate(struct net_device *netdev, int vf,
1506 int min_tx_rate, int max_tx_rate)
e1d18735
AK		 1507{
1508 struct be_adapter *adapter = netdev_priv(netdev);
0f77ba73
RN		 1509 struct device *dev = &adapter->pdev->dev;
1510 int percent_rate, status = 0;
1511 u16 link_speed = 0;
1512 u8 link_status;
e1d18735 1513
11ac75ed 1514 if (!sriov_enabled(adapter))
e1d18735
AK		 1515 return -EPERM;
1516
94f434c2 1517 if (vf >= adapter->num_vfs)
e1d18735
AK		 1518 return -EINVAL;
1519
ed616689
SC		 1520 if (min_tx_rate)
1521 return -EINVAL;
1522
0f77ba73
RN		 1523 if (!max_tx_rate)
1524 goto config_qos;
1525
1526 status = be_cmd_link_status_query(adapter, &link_speed,
1527 &link_status, 0);
1528 if (status)
1529 goto err;
1530
1531 if (!link_status) {
1532 dev_err(dev, "TX-rate setting not allowed when link is down\n");
940a3fcd 1533 status = -ENETDOWN;
0f77ba73
RN		 1534 goto err;
1535 }
1536
1537 if (max_tx_rate < 100 || max_tx_rate > link_speed) {
1538 dev_err(dev, "TX-rate must be between 100 and %d Mbps\n",
1539 link_speed);
1540 status = -EINVAL;
1541 goto err;
1542 }
1543
1544 /* On Skyhawk the QOS setting must be done only as a % value */
1545 percent_rate = link_speed / 100;
1546 if (skyhawk_chip(adapter) && (max_tx_rate % percent_rate)) {
1547 dev_err(dev, "TX-rate must be a multiple of %d Mbps\n",
1548 percent_rate);
1549 status = -EINVAL;
1550 goto err;
94f434c2 1551 }
e1d18735 1552
0f77ba73
RN		 1553config_qos:
1554 status = be_cmd_config_qos(adapter, max_tx_rate, link_speed, vf + 1);
e1d18735 1555 if (status)
0f77ba73
RN		 1556 goto err;
1557
1558 adapter->vf_cfg[vf].tx_rate = max_tx_rate;
1559 return 0;
1560
1561err:
1562 dev_err(dev, "TX-rate setting of %dMbps on VF%d failed\n",
1563 max_tx_rate, vf);
abccf23e 1564 return be_cmd_status(status);
e1d18735 1565}
e2fb1afa 1566
bdce2ad7
SR		 1567static int be_set_vf_link_state(struct net_device *netdev, int vf,
1568 int link_state)
1569{
1570 struct be_adapter *adapter = netdev_priv(netdev);
1571 int status;
1572
1573 if (!sriov_enabled(adapter))
1574 return -EPERM;
1575
1576 if (vf >= adapter->num_vfs)
1577 return -EINVAL;
1578
1579 status = be_cmd_set_logical_link_config(adapter, link_state, vf+1);
abccf23e
KA		 1580 if (status) {
1581 dev_err(&adapter->pdev->dev,
1582 "Link state change on VF %d failed: %#x\n", vf, status);
1583 return be_cmd_status(status);
1584 }
bdce2ad7 1585
abccf23e
KA		 1586 adapter->vf_cfg[vf].plink_tracking = link_state;
1587
1588 return 0;
bdce2ad7 1589}
e1d18735 1590
2632bafd
SP		 1591static void be_aic_update(struct be_aic_obj *aic, u64 rx_pkts, u64 tx_pkts,
1592 ulong now)
6b7c5b94 1593{
2632bafd
SP		 1594 aic->rx_pkts_prev = rx_pkts;
1595 aic->tx_reqs_prev = tx_pkts;
1596 aic->jiffies = now;
1597}
ac124ff9 1598
2632bafd
SP		 1599static void be_eqd_update(struct be_adapter *adapter)
1600{
1601 struct be_set_eqd set_eqd[MAX_EVT_QS];
1602 int eqd, i, num = 0, start;
1603 struct be_aic_obj *aic;
1604 struct be_eq_obj *eqo;
1605 struct be_rx_obj *rxo;
1606 struct be_tx_obj *txo;
1607 u64 rx_pkts, tx_pkts;
1608 ulong now;
1609 u32 pps, delta;
10ef9ab4 1610
2632bafd
SP		 1611 for_all_evt_queues(adapter, eqo, i) {
1612 aic = &adapter->aic_obj[eqo->idx];
1613 if (!aic->enable) {
1614 if (aic->jiffies)
1615 aic->jiffies = 0;
1616 eqd = aic->et_eqd;
1617 goto modify_eqd;
1618 }
6b7c5b94 1619
2632bafd
SP		 1620 rxo = &adapter->rx_obj[eqo->idx];
1621 do {
57a7744e 1622 start = u64_stats_fetch_begin_irq(&rxo->stats.sync);
2632bafd 1623 rx_pkts = rxo->stats.rx_pkts;
57a7744e 1624 } while (u64_stats_fetch_retry_irq(&rxo->stats.sync, start));
10ef9ab4 1625
2632bafd
SP		 1626 txo = &adapter->tx_obj[eqo->idx];
1627 do {
57a7744e 1628 start = u64_stats_fetch_begin_irq(&txo->stats.sync);
2632bafd 1629 tx_pkts = txo->stats.tx_reqs;
57a7744e 1630 } while (u64_stats_fetch_retry_irq(&txo->stats.sync, start));
6b7c5b94 1631
2632bafd
SP		 1632 /* Skip, if wrapped around or first calculation */
1633 now = jiffies;
1634 if (!aic->jiffies || time_before(now, aic->jiffies) ||
1635 rx_pkts < aic->rx_pkts_prev ||
1636 tx_pkts < aic->tx_reqs_prev) {
1637 be_aic_update(aic, rx_pkts, tx_pkts, now);
1638 continue;
1639 }
1640
1641 delta = jiffies_to_msecs(now - aic->jiffies);
1642 pps = (((u32)(rx_pkts - aic->rx_pkts_prev) * 1000) / delta) +
1643 (((u32)(tx_pkts - aic->tx_reqs_prev) * 1000) / delta);
1644 eqd = (pps / 15000) << 2;
10ef9ab4 1645
2632bafd
SP		 1646 if (eqd < 8)
1647 eqd = 0;
1648 eqd = min_t(u32, eqd, aic->max_eqd);
1649 eqd = max_t(u32, eqd, aic->min_eqd);
1650
1651 be_aic_update(aic, rx_pkts, tx_pkts, now);
10ef9ab4 1652modify_eqd:
2632bafd
SP		 1653 if (eqd != aic->prev_eqd) {
1654 set_eqd[num].delay_multiplier = (eqd * 65)/100;
1655 set_eqd[num].eq_id = eqo->q.id;
1656 aic->prev_eqd = eqd;
1657 num++;
1658 }
ac124ff9 1659 }
2632bafd
SP		 1660
1661 if (num)
1662 be_cmd_modify_eqd(adapter, set_eqd, num);
6b7c5b94
SP		 1663}
1664
3abcdeda 1665static void be_rx_stats_update(struct be_rx_obj *rxo,
748b539a 1666 struct be_rx_compl_info *rxcp)
4097f663 1667{
ac124ff9 1668 struct be_rx_stats *stats = rx_stats(rxo);
1ef78abe 1669
ab1594e9 1670 u64_stats_update_begin(&stats->sync);
3abcdeda 1671 stats->rx_compl++;
2e588f84 1672 stats->rx_bytes += rxcp->pkt_size;
3abcdeda 1673 stats->rx_pkts++;
2e588f84 1674 if (rxcp->pkt_type == BE_MULTICAST_PACKET)
3abcdeda 1675 stats->rx_mcast_pkts++;
2e588f84 1676 if (rxcp->err)
ac124ff9 1677 stats->rx_compl_err++;
ab1594e9 1678 u64_stats_update_end(&stats->sync);
4097f663
SP		 1679}
1680
2e588f84 1681static inline bool csum_passed(struct be_rx_compl_info *rxcp)
728a9972 1682{
19fad86f 1683 /* L4 checksum is not reliable for non TCP/UDP packets.
c9c47142
SP		 1684 * Also ignore ipcksm for ipv6 pkts
1685 */
2e588f84 1686 return (rxcp->tcpf || rxcp->udpf) && rxcp->l4_csum &&
c9c47142 1687 (rxcp->ip_csum || rxcp->ipv6) && !rxcp->err;
728a9972
AK		 1688}
1689
0b0ef1d0 1690static struct be_rx_page_info *get_rx_page_info(struct be_rx_obj *rxo)
6b7c5b94 1691{
10ef9ab4 1692 struct be_adapter *adapter = rxo->adapter;
6b7c5b94 1693 struct be_rx_page_info *rx_page_info;
3abcdeda 1694 struct be_queue_info *rxq = &rxo->q;
0b0ef1d0 1695 u16 frag_idx = rxq->tail;
6b7c5b94 1696
3abcdeda 1697 rx_page_info = &rxo->page_info_tbl[frag_idx];
6b7c5b94
SP		 1698 BUG_ON(!rx_page_info->page);
1699
e50287be 1700 if (rx_page_info->last_frag) {
2b7bcebf
IV		 1701 dma_unmap_page(&adapter->pdev->dev,
1702 dma_unmap_addr(rx_page_info, bus),
1703 adapter->big_page_size, DMA_FROM_DEVICE);
e50287be
SP		 1704 rx_page_info->last_frag = false;
1705 } else {
1706 dma_sync_single_for_cpu(&adapter->pdev->dev,
1707 dma_unmap_addr(rx_page_info, bus),
1708 rx_frag_size, DMA_FROM_DEVICE);
205859a2 1709 }
6b7c5b94 1710
0b0ef1d0 1711 queue_tail_inc(rxq);
6b7c5b94
SP		 1712 atomic_dec(&rxq->used);
1713 return rx_page_info;
1714}
1715
1716/* Throwaway the data in the Rx completion */
10ef9ab4
SP		 1717static void be_rx_compl_discard(struct be_rx_obj *rxo,
1718 struct be_rx_compl_info *rxcp)
6b7c5b94 1719{
6b7c5b94 1720 struct be_rx_page_info *page_info;
2e588f84 1721 u16 i, num_rcvd = rxcp->num_rcvd;
6b7c5b94 1722
e80d9da6 1723 for (i = 0; i < num_rcvd; i++) {
0b0ef1d0 1724 page_info = get_rx_page_info(rxo);
e80d9da6
PR		 1725 put_page(page_info->page);
1726 memset(page_info, 0, sizeof(*page_info));
6b7c5b94
SP		 1727 }
1728}
1729
1730/*
1731 * skb_fill_rx_data forms a complete skb for an ether frame
1732 * indicated by rxcp.
1733 */
10ef9ab4
SP		 1734static void skb_fill_rx_data(struct be_rx_obj *rxo, struct sk_buff *skb,
1735 struct be_rx_compl_info *rxcp)
6b7c5b94 1736{
6b7c5b94 1737 struct be_rx_page_info *page_info;
2e588f84
SP		 1738 u16 i, j;
1739 u16 hdr_len, curr_frag_len, remaining;
6b7c5b94 1740 u8 *start;
6b7c5b94 1741
0b0ef1d0 1742 page_info = get_rx_page_info(rxo);
6b7c5b94
SP		 1743 start = page_address(page_info->page) + page_info->page_offset;
1744 prefetch(start);
1745
1746 /* Copy data in the first descriptor of this completion */
2e588f84 1747 curr_frag_len = min(rxcp->pkt_size, rx_frag_size);
6b7c5b94 1748
6b7c5b94
SP		 1749 skb->len = curr_frag_len;
1750 if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */
ac1ae5f3 1751 memcpy(skb->data, start, curr_frag_len);
6b7c5b94
SP		 1752 /* Complete packet has now been moved to data */
1753 put_page(page_info->page);
1754 skb->data_len = 0;
1755 skb->tail += curr_frag_len;
1756 } else {
ac1ae5f3
ED		 1757 hdr_len = ETH_HLEN;
1758 memcpy(skb->data, start, hdr_len);
6b7c5b94 1759 skb_shinfo(skb)->nr_frags = 1;
b061b39e 1760 skb_frag_set_page(skb, 0, page_info->page);
6b7c5b94
SP		 1761 skb_shinfo(skb)->frags[0].page_offset =
1762 page_info->page_offset + hdr_len;
748b539a
SP		 1763 skb_frag_size_set(&skb_shinfo(skb)->frags[0],
1764 curr_frag_len - hdr_len);
6b7c5b94 1765 skb->data_len = curr_frag_len - hdr_len;
bdb28a97 1766 skb->truesize += rx_frag_size;
6b7c5b94
SP		 1767 skb->tail += hdr_len;
1768 }
205859a2 1769 page_info->page = NULL;
6b7c5b94 1770
2e588f84
SP		 1771 if (rxcp->pkt_size <= rx_frag_size) {
1772 BUG_ON(rxcp->num_rcvd != 1);
1773 return;
6b7c5b94
SP		 1774 }
1775
1776 /* More frags present for this completion */
2e588f84
SP		 1777 remaining = rxcp->pkt_size - curr_frag_len;
1778 for (i = 1, j = 0; i < rxcp->num_rcvd; i++) {
0b0ef1d0 1779 page_info = get_rx_page_info(rxo);
2e588f84 1780 curr_frag_len = min(remaining, rx_frag_size);
6b7c5b94 1781
bd46cb6c
AK		 1782 /* Coalesce all frags from the same physical page in one slot */
1783 if (page_info->page_offset == 0) {
1784 /* Fresh page */
1785 j++;
b061b39e 1786 skb_frag_set_page(skb, j, page_info->page);
bd46cb6c
AK		 1787 skb_shinfo(skb)->frags[j].page_offset =
1788 page_info->page_offset;
9e903e08 1789 skb_frag_size_set(&skb_shinfo(skb)->frags[j], 0);
bd46cb6c
AK		 1790 skb_shinfo(skb)->nr_frags++;
1791 } else {
1792 put_page(page_info->page);
1793 }
1794
9e903e08 1795 skb_frag_size_add(&skb_shinfo(skb)->frags[j], curr_frag_len);
6b7c5b94
SP		 1796 skb->len += curr_frag_len;
1797 skb->data_len += curr_frag_len;
bdb28a97 1798 skb->truesize += rx_frag_size;
2e588f84 1799 remaining -= curr_frag_len;
205859a2 1800 page_info->page = NULL;
6b7c5b94 1801 }
bd46cb6c 1802 BUG_ON(j > MAX_SKB_FRAGS);
6b7c5b94
SP		 1803}
1804
5be93b9a 1805/* Process the RX completion indicated by rxcp when GRO is disabled */
6384a4d0 1806static void be_rx_compl_process(struct be_rx_obj *rxo, struct napi_struct *napi,
10ef9ab4 1807 struct be_rx_compl_info *rxcp)
6b7c5b94 1808{
10ef9ab4 1809 struct be_adapter *adapter = rxo->adapter;
6332c8d3 1810 struct net_device *netdev = adapter->netdev;
6b7c5b94 1811 struct sk_buff *skb;
89420424 1812
bb349bb4 1813 skb = netdev_alloc_skb_ip_align(netdev, BE_RX_SKB_ALLOC_SIZE);
a058a632 1814 if (unlikely(!skb)) {
ac124ff9 1815 rx_stats(rxo)->rx_drops_no_skbs++;
10ef9ab4 1816 be_rx_compl_discard(rxo, rxcp);
6b7c5b94
SP		 1817 return;
1818 }
1819
10ef9ab4 1820 skb_fill_rx_data(rxo, skb, rxcp);
6b7c5b94 1821
6332c8d3 1822 if (likely((netdev->features & NETIF_F_RXCSUM) && csum_passed(rxcp)))
728a9972 1823 skb->ip_summed = CHECKSUM_UNNECESSARY;
c6ce2f4b
SK		 1824 else
1825 skb_checksum_none_assert(skb);
6b7c5b94 1826
6332c8d3 1827 skb->protocol = eth_type_trans(skb, netdev);
aaa6daec 1828 skb_record_rx_queue(skb, rxo - &adapter->rx_obj[0]);
10ef9ab4 1829 if (netdev->features & NETIF_F_RXHASH)
d2464c8c 1830 skb_set_hash(skb, rxcp->rss_hash, PKT_HASH_TYPE_L3);
c9c47142 1831
b6c0e89d 1832 skb->csum_level = rxcp->tunneled;
6384a4d0 1833 skb_mark_napi_id(skb, napi);
6b7c5b94 1834
343e43c0 1835 if (rxcp->vlanf)
86a9bad3 1836 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), rxcp->vlan_tag);
4c5102f9
AK		 1837
1838 netif_receive_skb(skb);
6b7c5b94
SP		 1839}
1840
5be93b9a 1841/* Process the RX completion indicated by rxcp when GRO is enabled */
4188e7df
JH		 1842static void be_rx_compl_process_gro(struct be_rx_obj *rxo,
1843 struct napi_struct *napi,
1844 struct be_rx_compl_info *rxcp)
6b7c5b94 1845{
10ef9ab4 1846 struct be_adapter *adapter = rxo->adapter;
6b7c5b94 1847 struct be_rx_page_info *page_info;
5be93b9a 1848 struct sk_buff *skb = NULL;
2e588f84
SP		 1849 u16 remaining, curr_frag_len;
1850 u16 i, j;
3968fa1e 1851
10ef9ab4 1852 skb = napi_get_frags(napi);
5be93b9a 1853 if (!skb) {
10ef9ab4 1854 be_rx_compl_discard(rxo, rxcp);
5be93b9a
AK		 1855 return;
1856 }
1857
2e588f84
SP		 1858 remaining = rxcp->pkt_size;
1859 for (i = 0, j = -1; i < rxcp->num_rcvd; i++) {
0b0ef1d0 1860 page_info = get_rx_page_info(rxo);
6b7c5b94
SP		 1861
1862 curr_frag_len = min(remaining, rx_frag_size);
1863
bd46cb6c
AK		 1864 /* Coalesce all frags from the same physical page in one slot */
1865 if (i == 0 || page_info->page_offset == 0) {
1866 /* First frag or Fresh page */
1867 j++;
b061b39e 1868 skb_frag_set_page(skb, j, page_info->page);
5be93b9a
AK		 1869 skb_shinfo(skb)->frags[j].page_offset =
1870 page_info->page_offset;
9e903e08 1871 skb_frag_size_set(&skb_shinfo(skb)->frags[j], 0);
bd46cb6c
AK		 1872 } else {
1873 put_page(page_info->page);
1874 }
9e903e08 1875 skb_frag_size_add(&skb_shinfo(skb)->frags[j], curr_frag_len);
bdb28a97 1876 skb->truesize += rx_frag_size;
bd46cb6c 1877 remaining -= curr_frag_len;
6b7c5b94
SP		 1878 memset(page_info, 0, sizeof(*page_info));
1879 }
bd46cb6c 1880 BUG_ON(j > MAX_SKB_FRAGS);
6b7c5b94 1881
5be93b9a 1882 skb_shinfo(skb)->nr_frags = j + 1;
2e588f84
SP		 1883 skb->len = rxcp->pkt_size;
1884 skb->data_len = rxcp->pkt_size;
5be93b9a 1885 skb->ip_summed = CHECKSUM_UNNECESSARY;
aaa6daec 1886 skb_record_rx_queue(skb, rxo - &adapter->rx_obj[0]);
4b972914 1887 if (adapter->netdev->features & NETIF_F_RXHASH)
d2464c8c 1888 skb_set_hash(skb, rxcp->rss_hash, PKT_HASH_TYPE_L3);
c9c47142 1889
b6c0e89d 1890 skb->csum_level = rxcp->tunneled;
6384a4d0 1891 skb_mark_napi_id(skb, napi);
5be93b9a 1892
343e43c0 1893 if (rxcp->vlanf)
86a9bad3 1894 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), rxcp->vlan_tag);
4c5102f9 1895
10ef9ab4 1896 napi_gro_frags(napi);
2e588f84
SP		 1897}
1898
10ef9ab4
SP		 1899static void be_parse_rx_compl_v1(struct be_eth_rx_compl *compl,
1900 struct be_rx_compl_info *rxcp)
2e588f84 1901{
c3c18bc1
SP		 1902 rxcp->pkt_size = GET_RX_COMPL_V1_BITS(pktsize, compl);
1903 rxcp->vlanf = GET_RX_COMPL_V1_BITS(vtp, compl);
1904 rxcp->err = GET_RX_COMPL_V1_BITS(err, compl);
1905 rxcp->tcpf = GET_RX_COMPL_V1_BITS(tcpf, compl);
1906 rxcp->udpf = GET_RX_COMPL_V1_BITS(udpf, compl);
1907 rxcp->ip_csum = GET_RX_COMPL_V1_BITS(ipcksm, compl);
1908 rxcp->l4_csum = GET_RX_COMPL_V1_BITS(l4_cksm, compl);
1909 rxcp->ipv6 = GET_RX_COMPL_V1_BITS(ip_version, compl);
1910 rxcp->num_rcvd = GET_RX_COMPL_V1_BITS(numfrags, compl);
1911 rxcp->pkt_type = GET_RX_COMPL_V1_BITS(cast_enc, compl);
1912 rxcp->rss_hash = GET_RX_COMPL_V1_BITS(rsshash, compl);
15d72184 1913 if (rxcp->vlanf) {
c3c18bc1
SP		 1914 rxcp->qnq = GET_RX_COMPL_V1_BITS(qnq, compl);
1915 rxcp->vlan_tag = GET_RX_COMPL_V1_BITS(vlan_tag, compl);
15d72184 1916 }
c3c18bc1 1917 rxcp->port = GET_RX_COMPL_V1_BITS(port, compl);
c9c47142 1918 rxcp->tunneled =
c3c18bc1 1919 GET_RX_COMPL_V1_BITS(tunneled, compl);
2e588f84
SP		 1920}
1921
10ef9ab4
SP		 1922static void be_parse_rx_compl_v0(struct be_eth_rx_compl *compl,
1923 struct be_rx_compl_info *rxcp)
2e588f84 1924{
c3c18bc1
SP		 1925 rxcp->pkt_size = GET_RX_COMPL_V0_BITS(pktsize, compl);
1926 rxcp->vlanf = GET_RX_COMPL_V0_BITS(vtp, compl);
1927 rxcp->err = GET_RX_COMPL_V0_BITS(err, compl);
1928 rxcp->tcpf = GET_RX_COMPL_V0_BITS(tcpf, compl);
1929 rxcp->udpf = GET_RX_COMPL_V0_BITS(udpf, compl);
1930 rxcp->ip_csum = GET_RX_COMPL_V0_BITS(ipcksm, compl);
1931 rxcp->l4_csum = GET_RX_COMPL_V0_BITS(l4_cksm, compl);
1932 rxcp->ipv6 = GET_RX_COMPL_V0_BITS(ip_version, compl);
1933 rxcp->num_rcvd = GET_RX_COMPL_V0_BITS(numfrags, compl);
1934 rxcp->pkt_type = GET_RX_COMPL_V0_BITS(cast_enc, compl);
1935 rxcp->rss_hash = GET_RX_COMPL_V0_BITS(rsshash, compl);
15d72184 1936 if (rxcp->vlanf) {
c3c18bc1
SP		 1937 rxcp->qnq = GET_RX_COMPL_V0_BITS(qnq, compl);
1938 rxcp->vlan_tag = GET_RX_COMPL_V0_BITS(vlan_tag, compl);
15d72184 1939 }
c3c18bc1
SP		 1940 rxcp->port = GET_RX_COMPL_V0_BITS(port, compl);
1941 rxcp->ip_frag = GET_RX_COMPL_V0_BITS(ip_frag, compl);
2e588f84
SP		 1942}
1943
1944static struct be_rx_compl_info *be_rx_compl_get(struct be_rx_obj *rxo)
1945{
1946 struct be_eth_rx_compl *compl = queue_tail_node(&rxo->cq);
1947 struct be_rx_compl_info *rxcp = &rxo->rxcp;
1948 struct be_adapter *adapter = rxo->adapter;
6b7c5b94 1949
2e588f84
SP		 1950 /* For checking the valid bit it is Ok to use either definition as the
1951 * valid bit is at the same position in both v0 and v1 Rx compl */
1952 if (compl->dw[offsetof(struct amap_eth_rx_compl_v1, valid) / 32] == 0)
1953 return NULL;
6b7c5b94 1954
2e588f84
SP		 1955 rmb();
1956 be_dws_le_to_cpu(compl, sizeof(*compl));
6b7c5b94 1957
2e588f84 1958 if (adapter->be3_native)
10ef9ab4 1959 be_parse_rx_compl_v1(compl, rxcp);
2e588f84 1960 else
10ef9ab4 1961 be_parse_rx_compl_v0(compl, rxcp);
6b7c5b94 1962
e38b1706
SK		 1963 if (rxcp->ip_frag)
1964 rxcp->l4_csum = 0;
1965
15d72184 1966 if (rxcp->vlanf) {
f93f160b
VV		 1967 /* In QNQ modes, if qnq bit is not set, then the packet was
1968 * tagged only with the transparent outer vlan-tag and must
1969 * not be treated as a vlan packet by host
1970 */
1971 if (be_is_qnq_mode(adapter) && !rxcp->qnq)
15d72184 1972 rxcp->vlanf = 0;
6b7c5b94 1973
15d72184 1974 if (!lancer_chip(adapter))
3c709f8f 1975 rxcp->vlan_tag = swab16(rxcp->vlan_tag);
6b7c5b94 1976
939cf306 1977 if (adapter->pvid == (rxcp->vlan_tag & VLAN_VID_MASK) &&
f6cbd364 1978 !test_bit(rxcp->vlan_tag, adapter->vids))
15d72184
SP		 1979 rxcp->vlanf = 0;
1980 }
2e588f84
SP		 1981
1982 /* As the compl has been parsed, reset it; we wont touch it again */
1983 compl->dw[offsetof(struct amap_eth_rx_compl_v1, valid) / 32] = 0;
6b7c5b94 1984
3abcdeda 1985 queue_tail_inc(&rxo->cq);
6b7c5b94
SP		 1986 return rxcp;
1987}
1988
1829b086 1989static inline struct page *be_alloc_pages(u32 size, gfp_t gfp)
6b7c5b94 1990{
6b7c5b94 1991 u32 order = get_order(size);
1829b086 1992
6b7c5b94 1993 if (order > 0)
1829b086
ED		 1994 gfp |= __GFP_COMP;
1995 return alloc_pages(gfp, order);
6b7c5b94
SP		 1996}
1997
1998/*
1999 * Allocate a page, split it to fragments of size rx_frag_size and post as
2000 * receive buffers to BE
2001 */
c30d7266 2002static void be_post_rx_frags(struct be_rx_obj *rxo, gfp_t gfp, u32 frags_needed)
6b7c5b94 2003{
3abcdeda 2004 struct be_adapter *adapter = rxo->adapter;
26d92f92 2005 struct be_rx_page_info *page_info = NULL, *prev_page_info = NULL;
3abcdeda 2006 struct be_queue_info *rxq = &rxo->q;
6b7c5b94 2007 struct page *pagep = NULL;
ba42fad0 2008 struct device *dev = &adapter->pdev->dev;
6b7c5b94
SP		 2009 struct be_eth_rx_d *rxd;
2010 u64 page_dmaaddr = 0, frag_dmaaddr;
c30d7266 2011 u32 posted, page_offset = 0, notify = 0;
6b7c5b94 2012
3abcdeda 2013 page_info = &rxo->page_info_tbl[rxq->head];
c30d7266 2014 for (posted = 0; posted < frags_needed && !page_info->page; posted++) {
6b7c5b94 2015 if (!pagep) {
1829b086 2016 pagep = be_alloc_pages(adapter->big_page_size, gfp);
6b7c5b94 2017 if (unlikely(!pagep)) {
ac124ff9 2018 rx_stats(rxo)->rx_post_fail++;
6b7c5b94
SP		 2019 break;
2020 }
ba42fad0
IV		 2021 page_dmaaddr = dma_map_page(dev, pagep, 0,
2022 adapter->big_page_size,
2b7bcebf 2023 DMA_FROM_DEVICE);
ba42fad0
IV		 2024 if (dma_mapping_error(dev, page_dmaaddr)) {
2025 put_page(pagep);
2026 pagep = NULL;
d3de1540 2027 adapter->drv_stats.dma_map_errors++;
ba42fad0
IV		 2028 break;
2029 }
e50287be 2030 page_offset = 0;
6b7c5b94
SP		 2031 } else {
2032 get_page(pagep);
e50287be 2033 page_offset += rx_frag_size;
6b7c5b94 2034 }
e50287be 2035 page_info->page_offset = page_offset;
6b7c5b94 2036 page_info->page = pagep;
6b7c5b94
SP		 2037
2038 rxd = queue_head_node(rxq);
e50287be 2039 frag_dmaaddr = page_dmaaddr + page_info->page_offset;
6b7c5b94
SP		 2040 rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF);
2041 rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr));
6b7c5b94
SP		 2042
2043 /* Any space left in the current big page for another frag? */
2044 if ((page_offset + rx_frag_size + rx_frag_size) >
2045 adapter->big_page_size) {
2046 pagep = NULL;
e50287be
SP		 2047 page_info->last_frag = true;
2048 dma_unmap_addr_set(page_info, bus, page_dmaaddr);
2049 } else {
2050 dma_unmap_addr_set(page_info, bus, frag_dmaaddr);
6b7c5b94 2051 }
26d92f92
SP		 2052
2053 prev_page_info = page_info;
2054 queue_head_inc(rxq);
10ef9ab4 2055 page_info = &rxo->page_info_tbl[rxq->head];
6b7c5b94 2056 }
e50287be
SP		 2057
2058 /* Mark the last frag of a page when we break out of the above loop
2059 * with no more slots available in the RXQ
2060 */
2061 if (pagep) {
2062 prev_page_info->last_frag = true;
2063 dma_unmap_addr_set(prev_page_info, bus, page_dmaaddr);
2064 }
6b7c5b94
SP		 2065
2066 if (posted) {
6b7c5b94 2067 atomic_add(posted, &rxq->used);
6384a4d0
SP		 2068 if (rxo->rx_post_starved)
2069 rxo->rx_post_starved = false;
c30d7266
AK		 2070 do {
2071 notify = min(256u, posted);
2072 be_rxq_notify(adapter, rxq->id, notify);
2073 posted -= notify;
2074 } while (posted);
ea1dae11
SP		 2075 } else if (atomic_read(&rxq->used) == 0) {
2076 /* Let be_worker replenish when memory is available */
3abcdeda 2077 rxo->rx_post_starved = true;
6b7c5b94 2078 }
6b7c5b94
SP		 2079}
2080
152ffe5b 2081static struct be_tx_compl_info *be_tx_compl_get(struct be_tx_obj *txo)
6b7c5b94 2082{
152ffe5b
SB		 2083 struct be_queue_info *tx_cq = &txo->cq;
2084 struct be_tx_compl_info *txcp = &txo->txcp;
2085 struct be_eth_tx_compl *compl = queue_tail_node(tx_cq);
6b7c5b94 2086
152ffe5b 2087 if (compl->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0)
6b7c5b94
SP		 2088 return NULL;
2089
152ffe5b 2090 /* Ensure load ordering of valid bit dword and other dwords below */
f3eb62d2 2091 rmb();
152ffe5b 2092 be_dws_le_to_cpu(compl, sizeof(*compl));
6b7c5b94 2093
152ffe5b
SB		 2094 txcp->status = GET_TX_COMPL_BITS(status, compl);
2095 txcp->end_index = GET_TX_COMPL_BITS(wrb_index, compl);
6b7c5b94 2096
152ffe5b 2097 compl->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0;
6b7c5b94
SP		 2098 queue_tail_inc(tx_cq);
2099 return txcp;
2100}
2101
3c8def97 2102static u16 be_tx_compl_process(struct be_adapter *adapter,
748b539a 2103 struct be_tx_obj *txo, u16 last_index)
6b7c5b94 2104{
5f07b3c5 2105 struct sk_buff **sent_skbs = txo->sent_skb_list;
3c8def97 2106 struct be_queue_info *txq = &txo->q;
5f07b3c5
SP		 2107 u16 frag_index, num_wrbs = 0;
2108 struct sk_buff *skb = NULL;
2109 bool unmap_skb_hdr = false;
a73b796e 2110 struct be_eth_wrb *wrb;
6b7c5b94 2111
ec43b1a6 2112 do {
5f07b3c5
SP		 2113 if (sent_skbs[txq->tail]) {
2114 /* Free skb from prev req */
2115 if (skb)
2116 dev_consume_skb_any(skb);
2117 skb = sent_skbs[txq->tail];
2118 sent_skbs[txq->tail] = NULL;
2119 queue_tail_inc(txq); /* skip hdr wrb */
2120 num_wrbs++;
2121 unmap_skb_hdr = true;
2122 }
a73b796e 2123 wrb = queue_tail_node(txq);
5f07b3c5 2124 frag_index = txq->tail;
2b7bcebf 2125 unmap_tx_frag(&adapter->pdev->dev, wrb,
5f07b3c5 2126 (unmap_skb_hdr && skb_headlen(skb)));
ec43b1a6 2127 unmap_skb_hdr = false;
6b7c5b94 2128 queue_tail_inc(txq);
5f07b3c5
SP		 2129 num_wrbs++;
2130 } while (frag_index != last_index);
2131 dev_consume_skb_any(skb);
6b7c5b94 2132
4d586b82 2133 return num_wrbs;
6b7c5b94
SP		 2134}
2135
10ef9ab4
SP		 2136/* Return the number of events in the event queue */
2137static inline int events_get(struct be_eq_obj *eqo)
859b1e4e 2138{
10ef9ab4
SP		 2139 struct be_eq_entry *eqe;
2140 int num = 0;
859b1e4e 2141
10ef9ab4
SP		 2142 do {
2143 eqe = queue_tail_node(&eqo->q);
2144 if (eqe->evt == 0)
2145 break;
859b1e4e 2146
10ef9ab4
SP		 2147 rmb();
2148 eqe->evt = 0;
2149 num++;
2150 queue_tail_inc(&eqo->q);
2151 } while (true);
2152
2153 return num;
859b1e4e
SP		 2154}
2155
10ef9ab4
SP		 2156/* Leaves the EQ is disarmed state */
2157static void be_eq_clean(struct be_eq_obj *eqo)
859b1e4e 2158{
10ef9ab4 2159 int num = events_get(eqo);
859b1e4e 2160
10ef9ab4 2161 be_eq_notify(eqo->adapter, eqo->q.id, false, true, num);
859b1e4e
SP		 2162}
2163
10ef9ab4 2164static void be_rx_cq_clean(struct be_rx_obj *rxo)
6b7c5b94
SP		 2165{
2166 struct be_rx_page_info *page_info;
3abcdeda
SP		 2167 struct be_queue_info *rxq = &rxo->q;
2168 struct be_queue_info *rx_cq = &rxo->cq;
2e588f84 2169 struct be_rx_compl_info *rxcp;
d23e946c
SP		 2170 struct be_adapter *adapter = rxo->adapter;
2171 int flush_wait = 0;
6b7c5b94 2172
d23e946c
SP		 2173 /* Consume pending rx completions.
2174 * Wait for the flush completion (identified by zero num_rcvd)
2175 * to arrive. Notify CQ even when there are no more CQ entries
2176 * for HW to flush partially coalesced CQ entries.
2177 * In Lancer, there is no need to wait for flush compl.
2178 */
2179 for (;;) {
2180 rxcp = be_rx_compl_get(rxo);
ddf1169f 2181 if (!rxcp) {
d23e946c
SP		 2182 if (lancer_chip(adapter))
2183 break;
2184
2185 if (flush_wait++ > 10 || be_hw_error(adapter)) {
2186 dev_warn(&adapter->pdev->dev,
2187 "did not receive flush compl\n");
2188 break;
2189 }
2190 be_cq_notify(adapter, rx_cq->id, true, 0);
2191 mdelay(1);
2192 } else {
2193 be_rx_compl_discard(rxo, rxcp);
3f5dffe6 2194 be_cq_notify(adapter, rx_cq->id, false, 1);
d23e946c
SP		 2195 if (rxcp->num_rcvd == 0)
2196 break;
2197 }
6b7c5b94
SP		 2198 }
2199
d23e946c
SP		 2200 /* After cleanup, leave the CQ in unarmed state */
2201 be_cq_notify(adapter, rx_cq->id, false, 0);
2202
2203 /* Then free posted rx buffers that were not used */
0b0ef1d0
SR		 2204 while (atomic_read(&rxq->used) > 0) {
2205 page_info = get_rx_page_info(rxo);
6b7c5b94
SP		 2206 put_page(page_info->page);
2207 memset(page_info, 0, sizeof(*page_info));
2208 }
2209 BUG_ON(atomic_read(&rxq->used));
5f820b6c
KA		 2210 rxq->tail = 0;
2211 rxq->head = 0;
6b7c5b94
SP		 2212}
2213
0ae57bb3 2214static void be_tx_compl_clean(struct be_adapter *adapter)
6b7c5b94 2215{
5f07b3c5
SP		 2216 u16 end_idx, notified_idx, cmpl = 0, timeo = 0, num_wrbs = 0;
2217 struct device *dev = &adapter->pdev->dev;
152ffe5b 2218 struct be_tx_compl_info *txcp;
0ae57bb3 2219 struct be_queue_info *txq;
152ffe5b 2220 struct be_tx_obj *txo;
0ae57bb3 2221 int i, pending_txqs;
a8e9179a 2222
1a3d0717 2223 /* Stop polling for compls when HW has been silent for 10ms */
a8e9179a 2224 do {
0ae57bb3
SP		 2225 pending_txqs = adapter->num_tx_qs;
2226
2227 for_all_tx_queues(adapter, txo, i) {
1a3d0717
VV		 2228 cmpl = 0;
2229 num_wrbs = 0;
0ae57bb3 2230 txq = &txo->q;
152ffe5b
SB		 2231 while ((txcp = be_tx_compl_get(txo))) {
2232 num_wrbs +=
2233 be_tx_compl_process(adapter, txo,
2234 txcp->end_index);
0ae57bb3
SP		 2235 cmpl++;
2236 }
2237 if (cmpl) {
2238 be_cq_notify(adapter, txo->cq.id, false, cmpl);
2239 atomic_sub(num_wrbs, &txq->used);
1a3d0717 2240 timeo = 0;
0ae57bb3 2241 }
cf5671e6 2242 if (!be_is_tx_compl_pending(txo))
0ae57bb3 2243 pending_txqs--;
a8e9179a
SP		 2244 }
2245
1a3d0717 2246 if (pending_txqs == 0 || ++timeo > 10 || be_hw_error(adapter))
a8e9179a
SP		 2247 break;
2248
2249 mdelay(1);
2250 } while (true);
2251
5f07b3c5 2252 /* Free enqueued TX that was never notified to HW */
0ae57bb3
SP		 2253 for_all_tx_queues(adapter, txo, i) {
2254 txq = &txo->q;
0ae57bb3 2255
5f07b3c5
SP		 2256 if (atomic_read(&txq->used)) {
2257 dev_info(dev, "txq%d: cleaning %d pending tx-wrbs\n",
2258 i, atomic_read(&txq->used));
2259 notified_idx = txq->tail;
0ae57bb3 2260 end_idx = txq->tail;
5f07b3c5
SP		 2261 index_adv(&end_idx, atomic_read(&txq->used) - 1,
2262 txq->len);
2263 /* Use the tx-compl process logic to handle requests
2264 * that were not sent to the HW.
2265 */
0ae57bb3
SP		 2266 num_wrbs = be_tx_compl_process(adapter, txo, end_idx);
2267 atomic_sub(num_wrbs, &txq->used);
5f07b3c5
SP		 2268 BUG_ON(atomic_read(&txq->used));
2269 txo->pend_wrb_cnt = 0;
2270 /* Since hw was never notified of these requests,
2271 * reset TXQ indices
2272 */
2273 txq->head = notified_idx;
2274 txq->tail = notified_idx;
0ae57bb3 2275 }
b03388d6 2276 }
6b7c5b94
SP		 2277}
2278
10ef9ab4
SP		 2279static void be_evt_queues_destroy(struct be_adapter *adapter)
2280{
2281 struct be_eq_obj *eqo;
2282 int i;
2283
2284 for_all_evt_queues(adapter, eqo, i) {
19d59aa7
PR		 2285 if (eqo->q.created) {
2286 be_eq_clean(eqo);
10ef9ab4 2287 be_cmd_q_destroy(adapter, &eqo->q, QTYPE_EQ);
6384a4d0 2288 napi_hash_del(&eqo->napi);
68d7bdcb 2289 netif_napi_del(&eqo->napi);
19d59aa7 2290 }
10ef9ab4
SP		 2291 be_queue_free(adapter, &eqo->q);
2292 }
2293}
2294
2295static int be_evt_queues_create(struct be_adapter *adapter)
2296{
2297 struct be_queue_info *eq;
2298 struct be_eq_obj *eqo;
2632bafd 2299 struct be_aic_obj *aic;
10ef9ab4
SP		 2300 int i, rc;
2301
92bf14ab
SP		 2302 adapter->num_evt_qs = min_t(u16, num_irqs(adapter),
2303 adapter->cfg_num_qs);
10ef9ab4
SP		 2304
2305 for_all_evt_queues(adapter, eqo, i) {
68d7bdcb
SP		 2306 netif_napi_add(adapter->netdev, &eqo->napi, be_poll,
2307 BE_NAPI_WEIGHT);
6384a4d0 2308 napi_hash_add(&eqo->napi);
2632bafd 2309 aic = &adapter->aic_obj[i];
10ef9ab4 2310 eqo->adapter = adapter;
10ef9ab4 2311 eqo->idx = i;
2632bafd
SP		 2312 aic->max_eqd = BE_MAX_EQD;
2313 aic->enable = true;
10ef9ab4
SP		 2314
2315 eq = &eqo->q;
2316 rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN,
748b539a 2317 sizeof(struct be_eq_entry));
10ef9ab4
SP		 2318 if (rc)
2319 return rc;
2320
f2f781a7 2321 rc = be_cmd_eq_create(adapter, eqo);
10ef9ab4
SP		 2322 if (rc)
2323 return rc;
2324 }
1cfafab9 2325 return 0;
10ef9ab4
SP		 2326}
2327
5fb379ee
SP		 2328static void be_mcc_queues_destroy(struct be_adapter *adapter)
2329{
2330 struct be_queue_info *q;
5fb379ee 2331
8788fdc2 2332 q = &adapter->mcc_obj.q;
5fb379ee 2333 if (q->created)
8788fdc2 2334 be_cmd_q_destroy(adapter, q, QTYPE_MCCQ);
5fb379ee
SP		 2335 be_queue_free(adapter, q);
2336
8788fdc2 2337 q = &adapter->mcc_obj.cq;
5fb379ee 2338 if (q->created)
8788fdc2 2339 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
5fb379ee
SP		 2340 be_queue_free(adapter, q);
2341}
2342
2343/* Must be called only after TX qs are created as MCC shares TX EQ */
2344static int be_mcc_queues_create(struct be_adapter *adapter)
2345{
2346 struct be_queue_info *q, *cq;
5fb379ee 2347
8788fdc2 2348 cq = &adapter->mcc_obj.cq;
5fb379ee 2349 if (be_queue_alloc(adapter, cq, MCC_CQ_LEN,
748b539a 2350 sizeof(struct be_mcc_compl)))
5fb379ee
SP		 2351 goto err;
2352
10ef9ab4
SP		 2353 /* Use the default EQ for MCC completions */
2354 if (be_cmd_cq_create(adapter, cq, &mcc_eqo(adapter)->q, true, 0))
5fb379ee
SP		 2355 goto mcc_cq_free;
2356
8788fdc2 2357 q = &adapter->mcc_obj.q;
5fb379ee
SP		 2358 if (be_queue_alloc(adapter, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
2359 goto mcc_cq_destroy;
2360
8788fdc2 2361 if (be_cmd_mccq_create(adapter, q, cq))
5fb379ee
SP		 2362 goto mcc_q_free;
2363
2364 return 0;
2365
2366mcc_q_free:
2367 be_queue_free(adapter, q);
2368mcc_cq_destroy:
8788fdc2 2369 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
5fb379ee
SP		 2370mcc_cq_free:
2371 be_queue_free(adapter, cq);
2372err:
2373 return -1;
2374}
2375
6b7c5b94
SP		 2376static void be_tx_queues_destroy(struct be_adapter *adapter)
2377{
2378 struct be_queue_info *q;
3c8def97
SP		 2379 struct be_tx_obj *txo;
2380 u8 i;
6b7c5b94 2381
3c8def97
SP		 2382 for_all_tx_queues(adapter, txo, i) {
2383 q = &txo->q;
2384 if (q->created)
2385 be_cmd_q_destroy(adapter, q, QTYPE_TXQ);
2386 be_queue_free(adapter, q);
6b7c5b94 2387
3c8def97
SP		 2388 q = &txo->cq;
2389 if (q->created)
2390 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
2391 be_queue_free(adapter, q);
2392 }
6b7c5b94
SP		 2393}
2394
7707133c 2395static int be_tx_qs_create(struct be_adapter *adapter)
6b7c5b94 2396{
10ef9ab4 2397 struct be_queue_info *cq, *eq;
3c8def97 2398 struct be_tx_obj *txo;
92bf14ab 2399 int status, i;
6b7c5b94 2400
92bf14ab 2401 adapter->num_tx_qs = min(adapter->num_evt_qs, be_max_txqs(adapter));
dafc0fe3 2402
10ef9ab4
SP		 2403 for_all_tx_queues(adapter, txo, i) {
2404 cq = &txo->cq;
2405 status = be_queue_alloc(adapter, cq, TX_CQ_LEN,
2406 sizeof(struct be_eth_tx_compl));
2407 if (status)
2408 return status;
3c8def97 2409
827da44c
JS		 2410 u64_stats_init(&txo->stats.sync);
2411 u64_stats_init(&txo->stats.sync_compl);
2412
10ef9ab4
SP		 2413 /* If num_evt_qs is less than num_tx_qs, then more than
2414 * one txq share an eq
2415 */
2416 eq = &adapter->eq_obj[i % adapter->num_evt_qs].q;
2417 status = be_cmd_cq_create(adapter, cq, eq, false, 3);
2418 if (status)
2419 return status;
6b7c5b94 2420
10ef9ab4
SP		 2421 status = be_queue_alloc(adapter, &txo->q, TX_Q_LEN,
2422 sizeof(struct be_eth_wrb));
2423 if (status)
2424 return status;
6b7c5b94 2425
94d73aaa 2426 status = be_cmd_txq_create(adapter, txo);
10ef9ab4
SP		 2427 if (status)
2428 return status;
3c8def97 2429 }
6b7c5b94 2430
d379142b
SP		 2431 dev_info(&adapter->pdev->dev, "created %d TX queue(s)\n",
2432 adapter->num_tx_qs);
10ef9ab4 2433 return 0;
6b7c5b94
SP		 2434}
2435
10ef9ab4 2436static void be_rx_cqs_destroy(struct be_adapter *adapter)
6b7c5b94
SP		 2437{
2438 struct be_queue_info *q;
3abcdeda
SP		 2439 struct be_rx_obj *rxo;
2440 int i;
2441
2442 for_all_rx_queues(adapter, rxo, i) {
3abcdeda
SP		 2443 q = &rxo->cq;
2444 if (q->created)
2445 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
2446 be_queue_free(adapter, q);
ac6a0c4a
SP		 2447 }
2448}
2449
10ef9ab4 2450static int be_rx_cqs_create(struct be_adapter *adapter)
6b7c5b94 2451{
10ef9ab4 2452 struct be_queue_info *eq, *cq;
3abcdeda
SP		 2453 struct be_rx_obj *rxo;
2454 int rc, i;
6b7c5b94 2455
92bf14ab
SP		 2456 /* We can create as many RSS rings as there are EQs. */
2457 adapter->num_rx_qs = adapter->num_evt_qs;
2458
2459 /* We'll use RSS only if atleast 2 RSS rings are supported.
2460 * When RSS is used, we'll need a default RXQ for non-IP traffic.
10ef9ab4 2461 */
92bf14ab
SP		 2462 if (adapter->num_rx_qs > 1)
2463 adapter->num_rx_qs++;
2464
6b7c5b94 2465 adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE;
3abcdeda
SP		 2466 for_all_rx_queues(adapter, rxo, i) {
2467 rxo->adapter = adapter;
3abcdeda
SP		 2468 cq = &rxo->cq;
2469 rc = be_queue_alloc(adapter, cq, RX_CQ_LEN,
748b539a 2470 sizeof(struct be_eth_rx_compl));
3abcdeda 2471 if (rc)
10ef9ab4 2472 return rc;
3abcdeda 2473
827da44c 2474 u64_stats_init(&rxo->stats.sync);
10ef9ab4
SP		 2475 eq = &adapter->eq_obj[i % adapter->num_evt_qs].q;
2476 rc = be_cmd_cq_create(adapter, cq, eq, false, 3);
3abcdeda 2477 if (rc)
10ef9ab4 2478 return rc;
3abcdeda 2479 }
6b7c5b94 2480
d379142b
SP		 2481 dev_info(&adapter->pdev->dev,
2482 "created %d RSS queue(s) and 1 default RX queue\n",
2483 adapter->num_rx_qs - 1);
10ef9ab4 2484 return 0;
b628bde2
SP		 2485}
2486
6b7c5b94
SP		 2487static irqreturn_t be_intx(int irq, void *dev)
2488{
e49cc34f
SP		 2489 struct be_eq_obj *eqo = dev;
2490 struct be_adapter *adapter = eqo->adapter;
2491 int num_evts = 0;
6b7c5b94 2492
d0b9cec3
SP		 2493 /* IRQ is not expected when NAPI is scheduled as the EQ
2494 * will not be armed.
2495 * But, this can happen on Lancer INTx where it takes
2496 * a while to de-assert INTx or in BE2 where occasionaly
2497 * an interrupt may be raised even when EQ is unarmed.
2498 * If NAPI is already scheduled, then counting & notifying
2499 * events will orphan them.
e49cc34f 2500 */
d0b9cec3 2501 if (napi_schedule_prep(&eqo->napi)) {
e49cc34f 2502 num_evts = events_get(eqo);
d0b9cec3
SP		 2503 __napi_schedule(&eqo->napi);
2504 if (num_evts)
2505 eqo->spurious_intr = 0;
2506 }
2507 be_eq_notify(adapter, eqo->q.id, false, true, num_evts);
e49cc34f 2508
d0b9cec3
SP		 2509 /* Return IRQ_HANDLED only for the the first spurious intr
2510 * after a valid intr to stop the kernel from branding
2511 * this irq as a bad one!
e49cc34f 2512 */
d0b9cec3
SP		 2513 if (num_evts || eqo->spurious_intr++ == 0)
2514 return IRQ_HANDLED;
2515 else
2516 return IRQ_NONE;
6b7c5b94
SP		 2517}
2518
10ef9ab4 2519static irqreturn_t be_msix(int irq, void *dev)
6b7c5b94 2520{
10ef9ab4 2521 struct be_eq_obj *eqo = dev;
6b7c5b94 2522
0b545a62
SP		 2523 be_eq_notify(eqo->adapter, eqo->q.id, false, true, 0);
2524 napi_schedule(&eqo->napi);
6b7c5b94
SP		 2525 return IRQ_HANDLED;
2526}
2527
2e588f84 2528static inline bool do_gro(struct be_rx_compl_info *rxcp)
6b7c5b94 2529{
e38b1706 2530 return (rxcp->tcpf && !rxcp->err && rxcp->l4_csum) ? true : false;
6b7c5b94
SP		 2531}
2532
10ef9ab4 2533static int be_process_rx(struct be_rx_obj *rxo, struct napi_struct *napi,
748b539a 2534 int budget, int polling)
6b7c5b94 2535{
3abcdeda
SP		 2536 struct be_adapter *adapter = rxo->adapter;
2537 struct be_queue_info *rx_cq = &rxo->cq;
2e588f84 2538 struct be_rx_compl_info *rxcp;
6b7c5b94 2539 u32 work_done;
c30d7266 2540 u32 frags_consumed = 0;
6b7c5b94
SP		 2541
2542 for (work_done = 0; work_done < budget; work_done++) {
3abcdeda 2543 rxcp = be_rx_compl_get(rxo);
6b7c5b94
SP		 2544 if (!rxcp)
2545 break;
2546
12004ae9
SP		 2547 /* Is it a flush compl that has no data */
2548 if (unlikely(rxcp->num_rcvd == 0))
2549 goto loop_continue;
2550
2551 /* Discard compl with partial DMA Lancer B0 */
2552 if (unlikely(!rxcp->pkt_size)) {
10ef9ab4 2553 be_rx_compl_discard(rxo, rxcp);
12004ae9
SP		 2554 goto loop_continue;
2555 }
2556
2557 /* On BE drop pkts that arrive due to imperfect filtering in
2558 * promiscuous mode on some skews
2559 */
2560 if (unlikely(rxcp->port != adapter->port_num &&
748b539a 2561 !lancer_chip(adapter))) {
10ef9ab4 2562 be_rx_compl_discard(rxo, rxcp);
12004ae9 2563 goto loop_continue;
64642811 2564 }
009dd872 2565
6384a4d0
SP		 2566 /* Don't do gro when we're busy_polling */
2567 if (do_gro(rxcp) && polling != BUSY_POLLING)
10ef9ab4 2568 be_rx_compl_process_gro(rxo, napi, rxcp);
12004ae9 2569 else
6384a4d0
SP		 2570 be_rx_compl_process(rxo, napi, rxcp);
2571
12004ae9 2572loop_continue:
c30d7266 2573 frags_consumed += rxcp->num_rcvd;
2e588f84 2574 be_rx_stats_update(rxo, rxcp);
6b7c5b94
SP		 2575 }
2576
10ef9ab4
SP		 2577 if (work_done) {
2578 be_cq_notify(adapter, rx_cq->id, true, work_done);
9372cacb 2579
6384a4d0
SP		 2580 /* When an rx-obj gets into post_starved state, just
2581 * let be_worker do the posting.
2582 */
2583 if (atomic_read(&rxo->q.used) < RX_FRAGS_REFILL_WM &&
2584 !rxo->rx_post_starved)
c30d7266
AK		 2585 be_post_rx_frags(rxo, GFP_ATOMIC,
2586 max_t(u32, MAX_RX_POST,
2587 frags_consumed));
6b7c5b94 2588 }
10ef9ab4 2589
6b7c5b94
SP		 2590 return work_done;
2591}
2592
152ffe5b 2593static inline void be_update_tx_err(struct be_tx_obj *txo, u8 status)
512bb8a2
KA		 2594{
2595 switch (status) {
2596 case BE_TX_COMP_HDR_PARSE_ERR:
2597 tx_stats(txo)->tx_hdr_parse_err++;
2598 break;
2599 case BE_TX_COMP_NDMA_ERR:
2600 tx_stats(txo)->tx_dma_err++;
2601 break;
2602 case BE_TX_COMP_ACL_ERR:
2603 tx_stats(txo)->tx_spoof_check_err++;
2604 break;
2605 }
2606}
2607
152ffe5b 2608static inline void lancer_update_tx_err(struct be_tx_obj *txo, u8 status)
512bb8a2
KA		 2609{
2610 switch (status) {
2611 case LANCER_TX_COMP_LSO_ERR:
2612 tx_stats(txo)->tx_tso_err++;
2613 break;
2614 case LANCER_TX_COMP_HSW_DROP_MAC_ERR:
2615 case LANCER_TX_COMP_HSW_DROP_VLAN_ERR:
2616 tx_stats(txo)->tx_spoof_check_err++;
2617 break;
2618 case LANCER_TX_COMP_QINQ_ERR:
2619 tx_stats(txo)->tx_qinq_err++;
2620 break;
2621 case LANCER_TX_COMP_PARITY_ERR:
2622 tx_stats(txo)->tx_internal_parity_err++;
2623 break;
2624 case LANCER_TX_COMP_DMA_ERR:
2625 tx_stats(txo)->tx_dma_err++;
2626 break;
2627 }
2628}
2629
c8f64615
SP		 2630static void be_process_tx(struct be_adapter *adapter, struct be_tx_obj *txo,
2631 int idx)
6b7c5b94 2632{
c8f64615 2633 int num_wrbs = 0, work_done = 0;
152ffe5b 2634 struct be_tx_compl_info *txcp;
c8f64615 2635
152ffe5b
SB		 2636 while ((txcp = be_tx_compl_get(txo))) {
2637 num_wrbs += be_tx_compl_process(adapter, txo, txcp->end_index);
c8f64615 2638 work_done++;
3c8def97 2639
152ffe5b 2640 if (txcp->status) {
512bb8a2 2641 if (lancer_chip(adapter))
152ffe5b 2642 lancer_update_tx_err(txo, txcp->status);
512bb8a2 2643 else
152ffe5b 2644 be_update_tx_err(txo, txcp->status);
512bb8a2 2645 }
10ef9ab4 2646 }
6b7c5b94 2647
10ef9ab4
SP		 2648 if (work_done) {
2649 be_cq_notify(adapter, txo->cq.id, true, work_done);
2650 atomic_sub(num_wrbs, &txo->q.used);
3c8def97 2651
10ef9ab4
SP		 2652 /* As Tx wrbs have been freed up, wake up netdev queue
2653 * if it was stopped due to lack of tx wrbs. */
2654 if (__netif_subqueue_stopped(adapter->netdev, idx) &&
cf5671e6 2655 be_can_txq_wake(txo)) {
10ef9ab4 2656 netif_wake_subqueue(adapter->netdev, idx);
3c8def97 2657 }
10ef9ab4
SP		 2658
2659 u64_stats_update_begin(&tx_stats(txo)->sync_compl);
2660 tx_stats(txo)->tx_compl += work_done;
2661 u64_stats_update_end(&tx_stats(txo)->sync_compl);
6b7c5b94 2662 }
10ef9ab4 2663}
6b7c5b94 2664
f7062ee5
SP		 2665#ifdef CONFIG_NET_RX_BUSY_POLL
2666static inline bool be_lock_napi(struct be_eq_obj *eqo)
2667{
2668 bool status = true;
2669
2670 spin_lock(&eqo->lock); /* BH is already disabled */
2671 if (eqo->state & BE_EQ_LOCKED) {
2672 WARN_ON(eqo->state & BE_EQ_NAPI);
2673 eqo->state |= BE_EQ_NAPI_YIELD;
2674 status = false;
2675 } else {
2676 eqo->state = BE_EQ_NAPI;
2677 }
2678 spin_unlock(&eqo->lock);
2679 return status;
2680}
2681
2682static inline void be_unlock_napi(struct be_eq_obj *eqo)
2683{
2684 spin_lock(&eqo->lock); /* BH is already disabled */
2685
2686 WARN_ON(eqo->state & (BE_EQ_POLL | BE_EQ_NAPI_YIELD));
2687 eqo->state = BE_EQ_IDLE;
2688
2689 spin_unlock(&eqo->lock);
2690}
2691
2692static inline bool be_lock_busy_poll(struct be_eq_obj *eqo)
2693{
2694 bool status = true;
2695
2696 spin_lock_bh(&eqo->lock);
2697 if (eqo->state & BE_EQ_LOCKED) {
2698 eqo->state |= BE_EQ_POLL_YIELD;
2699 status = false;
2700 } else {
2701 eqo->state |= BE_EQ_POLL;
2702 }
2703 spin_unlock_bh(&eqo->lock);
2704 return status;
2705}
2706
2707static inline void be_unlock_busy_poll(struct be_eq_obj *eqo)
2708{
2709 spin_lock_bh(&eqo->lock);
2710
2711 WARN_ON(eqo->state & (BE_EQ_NAPI));
2712 eqo->state = BE_EQ_IDLE;
2713
2714 spin_unlock_bh(&eqo->lock);
2715}
2716
2717static inline void be_enable_busy_poll(struct be_eq_obj *eqo)
2718{
2719 spin_lock_init(&eqo->lock);
2720 eqo->state = BE_EQ_IDLE;
2721}
2722
2723static inline void be_disable_busy_poll(struct be_eq_obj *eqo)
2724{
2725 local_bh_disable();
2726
2727 /* It's enough to just acquire napi lock on the eqo to stop
2728 * be_busy_poll() from processing any queueus.
2729 */
2730 while (!be_lock_napi(eqo))
2731 mdelay(1);
2732
2733 local_bh_enable();
2734}
2735
2736#else /* CONFIG_NET_RX_BUSY_POLL */
2737
2738static inline bool be_lock_napi(struct be_eq_obj *eqo)
2739{
2740 return true;
2741}
2742
2743static inline void be_unlock_napi(struct be_eq_obj *eqo)
2744{
2745}
2746
2747static inline bool be_lock_busy_poll(struct be_eq_obj *eqo)
2748{
2749 return false;
2750}
2751
2752static inline void be_unlock_busy_poll(struct be_eq_obj *eqo)
2753{
2754}
2755
2756static inline void be_enable_busy_poll(struct be_eq_obj *eqo)
2757{
2758}
2759
2760static inline void be_disable_busy_poll(struct be_eq_obj *eqo)
2761{
2762}
2763#endif /* CONFIG_NET_RX_BUSY_POLL */
2764
68d7bdcb 2765int be_poll(struct napi_struct *napi, int budget)
10ef9ab4
SP		 2766{
2767 struct be_eq_obj *eqo = container_of(napi, struct be_eq_obj, napi);
2768 struct be_adapter *adapter = eqo->adapter;
0b545a62 2769 int max_work = 0, work, i, num_evts;
6384a4d0 2770 struct be_rx_obj *rxo;
a4906ea0 2771 struct be_tx_obj *txo;
f31e50a8 2772
0b545a62
SP		 2773 num_evts = events_get(eqo);
2774
a4906ea0
SP		 2775 for_all_tx_queues_on_eq(adapter, eqo, txo, i)
2776 be_process_tx(adapter, txo, i);
f31e50a8 2777
6384a4d0
SP		 2778 if (be_lock_napi(eqo)) {
2779 /* This loop will iterate twice for EQ0 in which
2780 * completions of the last RXQ (default one) are also processed
2781 * For other EQs the loop iterates only once
2782 */
2783 for_all_rx_queues_on_eq(adapter, eqo, rxo, i) {
2784 work = be_process_rx(rxo, napi, budget, NAPI_POLLING);
2785 max_work = max(work, max_work);
2786 }
2787 be_unlock_napi(eqo);
2788 } else {
2789 max_work = budget;
10ef9ab4 2790 }
6b7c5b94 2791
10ef9ab4
SP		 2792 if (is_mcc_eqo(eqo))
2793 be_process_mcc(adapter);
93c86700 2794
10ef9ab4
SP		 2795 if (max_work < budget) {
2796 napi_complete(napi);
0b545a62 2797 be_eq_notify(adapter, eqo->q.id, true, false, num_evts);
10ef9ab4
SP		 2798 } else {
2799 /* As we'll continue in polling mode, count and clear events */
0b545a62 2800 be_eq_notify(adapter, eqo->q.id, false, false, num_evts);
93c86700 2801 }
10ef9ab4 2802 return max_work;
6b7c5b94
SP		 2803}
2804
6384a4d0
SP		 2805#ifdef CONFIG_NET_RX_BUSY_POLL
2806static int be_busy_poll(struct napi_struct *napi)
2807{
2808 struct be_eq_obj *eqo = container_of(napi, struct be_eq_obj, napi);
2809 struct be_adapter *adapter = eqo->adapter;
2810 struct be_rx_obj *rxo;
2811 int i, work = 0;
2812
2813 if (!be_lock_busy_poll(eqo))
2814 return LL_FLUSH_BUSY;
2815
2816 for_all_rx_queues_on_eq(adapter, eqo, rxo, i) {
2817 work = be_process_rx(rxo, napi, 4, BUSY_POLLING);
2818 if (work)
2819 break;
2820 }
2821
2822 be_unlock_busy_poll(eqo);
2823 return work;
2824}
2825#endif
2826
f67ef7ba 2827void be_detect_error(struct be_adapter *adapter)
7c185276 2828{
e1cfb67a
PR		 2829 u32 ue_lo = 0, ue_hi = 0, ue_lo_mask = 0, ue_hi_mask = 0;
2830 u32 sliport_status = 0, sliport_err1 = 0, sliport_err2 = 0;
7c185276 2831 u32 i;
eb0eecc1
SK		 2832 bool error_detected = false;
2833 struct device *dev = &adapter->pdev->dev;
2834 struct net_device *netdev = adapter->netdev;
7c185276 2835
d23e946c 2836 if (be_hw_error(adapter))
72f02485
SP		 2837 return;
2838
e1cfb67a
PR		 2839 if (lancer_chip(adapter)) {
2840 sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET);
2841 if (sliport_status & SLIPORT_STATUS_ERR_MASK) {
2842 sliport_err1 = ioread32(adapter->db +
748b539a 2843 SLIPORT_ERROR1_OFFSET);
e1cfb67a 2844 sliport_err2 = ioread32(adapter->db +
748b539a 2845 SLIPORT_ERROR2_OFFSET);
eb0eecc1
SK		 2846 adapter->hw_error = true;
2847 /* Do not log error messages if its a FW reset */
2848 if (sliport_err1 == SLIPORT_ERROR_FW_RESET1 &&
2849 sliport_err2 == SLIPORT_ERROR_FW_RESET2) {
2850 dev_info(dev, "Firmware update in progress\n");
2851 } else {
2852 error_detected = true;
2853 dev_err(dev, "Error detected in the card\n");
2854 dev_err(dev, "ERR: sliport status 0x%x\n",
2855 sliport_status);
2856 dev_err(dev, "ERR: sliport error1 0x%x\n",
2857 sliport_err1);
2858 dev_err(dev, "ERR: sliport error2 0x%x\n",
2859 sliport_err2);
2860 }
e1cfb67a
PR		 2861 }
2862 } else {
2863 pci_read_config_dword(adapter->pdev,
748b539a 2864 PCICFG_UE_STATUS_LOW, &ue_lo);
e1cfb67a 2865 pci_read_config_dword(adapter->pdev,
748b539a 2866 PCICFG_UE_STATUS_HIGH, &ue_hi);
e1cfb67a 2867 pci_read_config_dword(adapter->pdev,
748b539a 2868 PCICFG_UE_STATUS_LOW_MASK, &ue_lo_mask);
e1cfb67a 2869 pci_read_config_dword(adapter->pdev,
748b539a 2870 PCICFG_UE_STATUS_HI_MASK, &ue_hi_mask);
e1cfb67a 2871
f67ef7ba
PR		 2872 ue_lo = (ue_lo & ~ue_lo_mask);
2873 ue_hi = (ue_hi & ~ue_hi_mask);
7c185276 2874
eb0eecc1
SK		 2875 /* On certain platforms BE hardware can indicate spurious UEs.
2876 * Allow HW to stop working completely in case of a real UE.
2877 * Hence not setting the hw_error for UE detection.
2878 */
f67ef7ba 2879
eb0eecc1
SK		 2880 if (ue_lo || ue_hi) {
2881 error_detected = true;
2882 dev_err(dev,
2883 "Unrecoverable Error detected in the adapter");
2884 dev_err(dev, "Please reboot server to recover");
2885 if (skyhawk_chip(adapter))
2886 adapter->hw_error = true;
2887 for (i = 0; ue_lo; ue_lo >>= 1, i++) {
2888 if (ue_lo & 1)
2889 dev_err(dev, "UE: %s bit set\n",
2890 ue_status_low_desc[i]);
2891 }
2892 for (i = 0; ue_hi; ue_hi >>= 1, i++) {
2893 if (ue_hi & 1)
2894 dev_err(dev, "UE: %s bit set\n",
2895 ue_status_hi_desc[i]);
2896 }
7c185276
AK		 2897 }
2898 }
eb0eecc1
SK		 2899 if (error_detected)
2900 netif_carrier_off(netdev);
7c185276
AK		 2901}
2902
8d56ff11
SP		 2903static void be_msix_disable(struct be_adapter *adapter)
2904{
ac6a0c4a 2905 if (msix_enabled(adapter)) {
8d56ff11 2906 pci_disable_msix(adapter->pdev);
ac6a0c4a 2907 adapter->num_msix_vec = 0;
68d7bdcb 2908 adapter->num_msix_roce_vec = 0;
3abcdeda
SP		 2909 }
2910}
2911
c2bba3df 2912static int be_msix_enable(struct be_adapter *adapter)
6b7c5b94 2913{
7dc4c064 2914 int i, num_vec;
d379142b 2915 struct device *dev = &adapter->pdev->dev;
6b7c5b94 2916
92bf14ab
SP		 2917 /* If RoCE is supported, program the max number of NIC vectors that
2918 * may be configured via set-channels, along with vectors needed for
2919 * RoCe. Else, just program the number we'll use initially.
2920 */
2921 if (be_roce_supported(adapter))
2922 num_vec = min_t(int, 2 * be_max_eqs(adapter),
2923 2 * num_online_cpus());
2924 else
2925 num_vec = adapter->cfg_num_qs;
3abcdeda 2926
ac6a0c4a 2927 for (i = 0; i < num_vec; i++)
6b7c5b94
SP		 2928 adapter->msix_entries[i].entry = i;
2929
7dc4c064
AG		 2930 num_vec = pci_enable_msix_range(adapter->pdev, adapter->msix_entries,
2931 MIN_MSIX_VECTORS, num_vec);
2932 if (num_vec < 0)
2933 goto fail;
92bf14ab 2934
92bf14ab
SP		 2935 if (be_roce_supported(adapter) && num_vec > MIN_MSIX_VECTORS) {
2936 adapter->num_msix_roce_vec = num_vec / 2;
2937 dev_info(dev, "enabled %d MSI-x vector(s) for RoCE\n",
2938 adapter->num_msix_roce_vec);
2939 }
2940
2941 adapter->num_msix_vec = num_vec - adapter->num_msix_roce_vec;
2942
2943 dev_info(dev, "enabled %d MSI-x vector(s) for NIC\n",
2944 adapter->num_msix_vec);
c2bba3df 2945 return 0;
7dc4c064
AG		 2946
2947fail:
2948 dev_warn(dev, "MSIx enable failed\n");
2949
2950 /* INTx is not supported in VFs, so fail probe if enable_msix fails */
2951 if (!be_physfn(adapter))
2952 return num_vec;
2953 return 0;
6b7c5b94
SP		 2954}
2955
fe6d2a38 2956static inline int be_msix_vec_get(struct be_adapter *adapter,
748b539a 2957 struct be_eq_obj *eqo)
b628bde2 2958{
f2f781a7 2959 return adapter->msix_entries[eqo->msix_idx].vector;
b628bde2 2960}
6b7c5b94 2961
b628bde2
SP		 2962static int be_msix_register(struct be_adapter *adapter)
2963{
10ef9ab4
SP		 2964 struct net_device *netdev = adapter->netdev;
2965 struct be_eq_obj *eqo;
2966 int status, i, vec;
6b7c5b94 2967
10ef9ab4
SP		 2968 for_all_evt_queues(adapter, eqo, i) {
2969 sprintf(eqo->desc, "%s-q%d", netdev->name, i);
2970 vec = be_msix_vec_get(adapter, eqo);
2971 status = request_irq(vec, be_msix, 0, eqo->desc, eqo);
3abcdeda
SP		 2972 if (status)
2973 goto err_msix;
2974 }
b628bde2 2975
6b7c5b94 2976 return 0;
3abcdeda 2977err_msix:
10ef9ab4
SP		 2978 for (i--, eqo = &adapter->eq_obj[i]; i >= 0; i--, eqo--)
2979 free_irq(be_msix_vec_get(adapter, eqo), eqo);
2980 dev_warn(&adapter->pdev->dev, "MSIX Request IRQ failed - err %d\n",
748b539a 2981 status);
ac6a0c4a 2982 be_msix_disable(adapter);
6b7c5b94
SP		 2983 return status;
2984}
2985
2986static int be_irq_register(struct be_adapter *adapter)
2987{
2988 struct net_device *netdev = adapter->netdev;
2989 int status;
2990
ac6a0c4a 2991 if (msix_enabled(adapter)) {
6b7c5b94
SP		 2992 status = be_msix_register(adapter);
2993 if (status == 0)
2994 goto done;
ba343c77
SB		 2995 /* INTx is not supported for VF */
2996 if (!be_physfn(adapter))
2997 return status;
6b7c5b94
SP		 2998 }
2999
e49cc34f 3000 /* INTx: only the first EQ is used */
6b7c5b94
SP		 3001 netdev->irq = adapter->pdev->irq;
3002 status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name,
e49cc34f 3003 &adapter->eq_obj[0]);
6b7c5b94
SP		 3004 if (status) {
3005 dev_err(&adapter->pdev->dev,
3006 "INTx request IRQ failed - err %d\n", status);
3007 return status;
3008 }
3009done:
3010 adapter->isr_registered = true;
3011 return 0;
3012}
3013
3014static void be_irq_unregister(struct be_adapter *adapter)
3015{
3016 struct net_device *netdev = adapter->netdev;
10ef9ab4 3017 struct be_eq_obj *eqo;
3abcdeda 3018 int i;
6b7c5b94
SP		 3019
3020 if (!adapter->isr_registered)
3021 return;
3022
3023 /* INTx */
ac6a0c4a 3024 if (!msix_enabled(adapter)) {
e49cc34f 3025 free_irq(netdev->irq, &adapter->eq_obj[0]);
6b7c5b94
SP		 3026 goto done;
3027 }
3028
3029 /* MSIx */
10ef9ab4
SP		 3030 for_all_evt_queues(adapter, eqo, i)
3031 free_irq(be_msix_vec_get(adapter, eqo), eqo);
3abcdeda 3032
6b7c5b94
SP		 3033done:
3034 adapter->isr_registered = false;
6b7c5b94
SP		 3035}
3036
10ef9ab4 3037static void be_rx_qs_destroy(struct be_adapter *adapter)
482c9e79
SP		 3038{
3039 struct be_queue_info *q;
3040 struct be_rx_obj *rxo;
3041 int i;
3042
3043 for_all_rx_queues(adapter, rxo, i) {
3044 q = &rxo->q;
3045 if (q->created) {
3046 be_cmd_rxq_destroy(adapter, q);
10ef9ab4 3047 be_rx_cq_clean(rxo);
482c9e79 3048 }
10ef9ab4 3049 be_queue_free(adapter, q);
482c9e79
SP		 3050 }
3051}
3052
889cd4b2
SP		 3053static int be_close(struct net_device *netdev)
3054{
3055 struct be_adapter *adapter = netdev_priv(netdev);
10ef9ab4
SP		 3056 struct be_eq_obj *eqo;
3057 int i;
889cd4b2 3058
e1ad8e33
KA		 3059 /* This protection is needed as be_close() may be called even when the
3060 * adapter is in cleared state (after eeh perm failure)
3061 */
3062 if (!(adapter->flags & BE_FLAGS_SETUP_DONE))
3063 return 0;
3064
045508a8
PP		 3065 be_roce_dev_close(adapter);
3066
dff345c5
IV		 3067 if (adapter->flags & BE_FLAGS_NAPI_ENABLED) {
3068 for_all_evt_queues(adapter, eqo, i) {
04d3d624 3069 napi_disable(&eqo->napi);
6384a4d0
SP		 3070 be_disable_busy_poll(eqo);
3071 }
71237b6f 3072 adapter->flags &= ~BE_FLAGS_NAPI_ENABLED;
04d3d624 3073 }
a323d9bf
SP		 3074
3075 be_async_mcc_disable(adapter);
3076
3077 /* Wait for all pending tx completions to arrive so that
3078 * all tx skbs are freed.
3079 */
fba87559 3080 netif_tx_disable(netdev);
6e1f9975 3081 be_tx_compl_clean(adapter);
a323d9bf
SP		 3082
3083 be_rx_qs_destroy(adapter);
f66b7cfd 3084 be_clear_uc_list(adapter);
d11a347d 3085
a323d9bf 3086 for_all_evt_queues(adapter, eqo, i) {
10ef9ab4
SP		 3087 if (msix_enabled(adapter))
3088 synchronize_irq(be_msix_vec_get(adapter, eqo));
3089 else
3090 synchronize_irq(netdev->irq);
3091 be_eq_clean(eqo);
63fcb27f
PR		 3092 }
3093
889cd4b2
SP		 3094 be_irq_unregister(adapter);
3095
482c9e79
SP		 3096 return 0;
3097}
3098
10ef9ab4 3099static int be_rx_qs_create(struct be_adapter *adapter)
482c9e79 3100{
1dcf7b1c
ED		 3101 struct rss_info *rss = &adapter->rss_info;
3102 u8 rss_key[RSS_HASH_KEY_LEN];
482c9e79 3103 struct be_rx_obj *rxo;
e9008ee9 3104 int rc, i, j;
482c9e79
SP		 3105
3106 for_all_rx_queues(adapter, rxo, i) {
10ef9ab4
SP		 3107 rc = be_queue_alloc(adapter, &rxo->q, RX_Q_LEN,
3108 sizeof(struct be_eth_rx_d));
3109 if (rc)
3110 return rc;
3111 }
3112
3113 /* The FW would like the default RXQ to be created first */
3114 rxo = default_rxo(adapter);
3115 rc = be_cmd_rxq_create(adapter, &rxo->q, rxo->cq.id, rx_frag_size,
3116 adapter->if_handle, false, &rxo->rss_id);
3117 if (rc)
3118 return rc;
3119
3120 for_all_rss_queues(adapter, rxo, i) {
482c9e79 3121 rc = be_cmd_rxq_create(adapter, &rxo->q, rxo->cq.id,
10ef9ab4
SP		 3122 rx_frag_size, adapter->if_handle,
3123 true, &rxo->rss_id);
482c9e79
SP		 3124 if (rc)
3125 return rc;
3126 }
3127
3128 if (be_multi_rxq(adapter)) {
e2557877
VD		 3129 for (j = 0; j < RSS_INDIR_TABLE_LEN;
3130 j += adapter->num_rx_qs - 1) {
e9008ee9 3131 for_all_rss_queues(adapter, rxo, i) {
e2557877 3132 if ((j + i) >= RSS_INDIR_TABLE_LEN)
e9008ee9 3133 break;
e2557877
VD		 3134 rss->rsstable[j + i] = rxo->rss_id;
3135 rss->rss_queue[j + i] = i;
e9008ee9
PR		 3136 }
3137 }
e2557877
VD		 3138 rss->rss_flags = RSS_ENABLE_TCP_IPV4 | RSS_ENABLE_IPV4 |
3139 RSS_ENABLE_TCP_IPV6 | RSS_ENABLE_IPV6;
594ad54a
SR		 3140
3141 if (!BEx_chip(adapter))
e2557877
VD		 3142 rss->rss_flags |= RSS_ENABLE_UDP_IPV4 |
3143 RSS_ENABLE_UDP_IPV6;
da1388d6
VV		 3144 } else {
3145 /* Disable RSS, if only default RX Q is created */
e2557877 3146 rss->rss_flags = RSS_ENABLE_NONE;
da1388d6 3147 }
594ad54a 3148
1dcf7b1c 3149 netdev_rss_key_fill(rss_key, RSS_HASH_KEY_LEN);
748b539a 3150 rc = be_cmd_rss_config(adapter, rss->rsstable, rss->rss_flags,
1dcf7b1c 3151 128, rss_key);
da1388d6 3152 if (rc) {
e2557877 3153 rss->rss_flags = RSS_ENABLE_NONE;
da1388d6 3154 return rc;
482c9e79
SP		 3155 }
3156
1dcf7b1c 3157 memcpy(rss->rss_hkey, rss_key, RSS_HASH_KEY_LEN);
e2557877 3158
482c9e79 3159 /* First time posting */
10ef9ab4 3160 for_all_rx_queues(adapter, rxo, i)
c30d7266 3161 be_post_rx_frags(rxo, GFP_KERNEL, MAX_RX_POST);
889cd4b2
SP		 3162 return 0;
3163}
3164
6b7c5b94
SP		 3165static int be_open(struct net_device *netdev)
3166{
3167 struct be_adapter *adapter = netdev_priv(netdev);
10ef9ab4 3168 struct be_eq_obj *eqo;
3abcdeda 3169 struct be_rx_obj *rxo;
10ef9ab4 3170 struct be_tx_obj *txo;
b236916a 3171 u8 link_status;
3abcdeda 3172 int status, i;
5fb379ee 3173
10ef9ab4 3174 status = be_rx_qs_create(adapter);
482c9e79
SP		 3175 if (status)
3176 goto err;
3177
c2bba3df
SK		 3178 status = be_irq_register(adapter);
3179 if (status)
3180 goto err;
5fb379ee 3181
10ef9ab4 3182 for_all_rx_queues(adapter, rxo, i)
3abcdeda 3183 be_cq_notify(adapter, rxo->cq.id, true, 0);
5fb379ee 3184
10ef9ab4
SP		 3185 for_all_tx_queues(adapter, txo, i)
3186 be_cq_notify(adapter, txo->cq.id, true, 0);
3187
7a1e9b20
SP		 3188 be_async_mcc_enable(adapter);
3189
10ef9ab4
SP		 3190 for_all_evt_queues(adapter, eqo, i) {
3191 napi_enable(&eqo->napi);
6384a4d0 3192 be_enable_busy_poll(eqo);
4cad9f3b 3193 be_eq_notify(adapter, eqo->q.id, true, true, 0);
10ef9ab4 3194 }
04d3d624 3195 adapter->flags |= BE_FLAGS_NAPI_ENABLED;
10ef9ab4 3196
323ff71e 3197 status = be_cmd_link_status_query(adapter, NULL, &link_status, 0);
b236916a
AK		 3198 if (!status)
3199 be_link_status_update(adapter, link_status);
3200
fba87559 3201 netif_tx_start_all_queues(netdev);
045508a8 3202 be_roce_dev_open(adapter);
c9c47142 3203
c5abe7c0 3204#ifdef CONFIG_BE2NET_VXLAN
c9c47142
SP		 3205 if (skyhawk_chip(adapter))
3206 vxlan_get_rx_port(netdev);
c5abe7c0
SP		 3207#endif
3208
889cd4b2
SP		 3209 return 0;
3210err:
3211 be_close(adapter->netdev);
3212 return -EIO;
5fb379ee
SP		 3213}
3214
71d8d1b5
AK		 3215static int be_setup_wol(struct be_adapter *adapter, bool enable)
3216{
3217 struct be_dma_mem cmd;
3218 int status = 0;
3219 u8 mac[ETH_ALEN];
3220
3221 memset(mac, 0, ETH_ALEN);
3222
3223 cmd.size = sizeof(struct be_cmd_req_acpi_wol_magic_config);
ede23fa8
JP		 3224 cmd.va = dma_zalloc_coherent(&adapter->pdev->dev, cmd.size, &cmd.dma,
3225 GFP_KERNEL);
ddf1169f 3226 if (!cmd.va)
6b568689 3227 return -ENOMEM;
71d8d1b5
AK		 3228
3229 if (enable) {
3230 status = pci_write_config_dword(adapter->pdev,
748b539a
SP		 3231 PCICFG_PM_CONTROL_OFFSET,
3232 PCICFG_PM_CONTROL_MASK);
71d8d1b5
AK		 3233 if (status) {
3234 dev_err(&adapter->pdev->dev,
2381a55c 3235 "Could not enable Wake-on-lan\n");
2b7bcebf
IV		 3236 dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va,
3237 cmd.dma);
71d8d1b5
AK		 3238 return status;
3239 }
3240 status = be_cmd_enable_magic_wol(adapter,
748b539a
SP		 3241 adapter->netdev->dev_addr,
3242 &cmd);
71d8d1b5
AK		 3243 pci_enable_wake(adapter->pdev, PCI_D3hot, 1);
3244 pci_enable_wake(adapter->pdev, PCI_D3cold, 1);
3245 } else {
3246 status = be_cmd_enable_magic_wol(adapter, mac, &cmd);
3247 pci_enable_wake(adapter->pdev, PCI_D3hot, 0);
3248 pci_enable_wake(adapter->pdev, PCI_D3cold, 0);
3249 }
3250
2b7bcebf 3251 dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, cmd.dma);
71d8d1b5
AK		 3252 return status;
3253}
3254
f7062ee5
SP		 3255static void be_vf_eth_addr_generate(struct be_adapter *adapter, u8 *mac)
3256{
3257 u32 addr;
3258
3259 addr = jhash(adapter->netdev->dev_addr, ETH_ALEN, 0);
3260
3261 mac[5] = (u8)(addr & 0xFF);
3262 mac[4] = (u8)((addr >> 8) & 0xFF);
3263 mac[3] = (u8)((addr >> 16) & 0xFF);
3264 /* Use the OUI from the current MAC address */
3265 memcpy(mac, adapter->netdev->dev_addr, 3);
3266}
3267
6d87f5c3
AK		 3268/*
3269 * Generate a seed MAC address from the PF MAC Address using jhash.
3270 * MAC Address for VFs are assigned incrementally starting from the seed.
3271 * These addresses are programmed in the ASIC by the PF and the VF driver
3272 * queries for the MAC address during its probe.
3273 */
4c876616 3274static int be_vf_eth_addr_config(struct be_adapter *adapter)
6d87f5c3 3275{
f9449ab7 3276 u32 vf;
3abcdeda 3277 int status = 0;
6d87f5c3 3278 u8 mac[ETH_ALEN];
11ac75ed 3279 struct be_vf_cfg *vf_cfg;
6d87f5c3
AK		 3280
3281 be_vf_eth_addr_generate(adapter, mac);
3282
11ac75ed 3283 for_all_vfs(adapter, vf_cfg, vf) {
3175d8c2 3284 if (BEx_chip(adapter))
590c391d 3285 status = be_cmd_pmac_add(adapter, mac,
11ac75ed
SP		 3286 vf_cfg->if_handle,
3287 &vf_cfg->pmac_id, vf + 1);
3175d8c2
SP		 3288 else
3289 status = be_cmd_set_mac(adapter, mac, vf_cfg->if_handle,
3290 vf + 1);
590c391d 3291
6d87f5c3
AK		 3292 if (status)
3293 dev_err(&adapter->pdev->dev,
748b539a
SP		 3294 "Mac address assignment failed for VF %d\n",
3295 vf);
6d87f5c3 3296 else
11ac75ed 3297 memcpy(vf_cfg->mac_addr, mac, ETH_ALEN);
6d87f5c3
AK		 3298
3299 mac[5] += 1;
3300 }
3301 return status;
3302}
3303
4c876616
SP		 3304static int be_vfs_mac_query(struct be_adapter *adapter)
3305{
3306 int status, vf;
3307 u8 mac[ETH_ALEN];
3308 struct be_vf_cfg *vf_cfg;
4c876616
SP		 3309
3310 for_all_vfs(adapter, vf_cfg, vf) {
b188f090
SR		 3311 status = be_cmd_get_active_mac(adapter, vf_cfg->pmac_id,
3312 mac, vf_cfg->if_handle,
3313 false, vf+1);
4c876616
SP		 3314 if (status)
3315 return status;
3316 memcpy(vf_cfg->mac_addr, mac, ETH_ALEN);
3317 }
3318 return 0;
3319}
3320
f9449ab7 3321static void be_vf_clear(struct be_adapter *adapter)
6d87f5c3 3322{
11ac75ed 3323 struct be_vf_cfg *vf_cfg;
6d87f5c3
AK		 3324 u32 vf;
3325
257a3feb 3326 if (pci_vfs_assigned(adapter->pdev)) {
4c876616
SP		 3327 dev_warn(&adapter->pdev->dev,
3328 "VFs are assigned to VMs: not disabling VFs\n");
39f1d94d
SP		 3329 goto done;
3330 }
3331
b4c1df93
SP		 3332 pci_disable_sriov(adapter->pdev);
3333
11ac75ed 3334 for_all_vfs(adapter, vf_cfg, vf) {
3175d8c2 3335 if (BEx_chip(adapter))
11ac75ed
SP		 3336 be_cmd_pmac_del(adapter, vf_cfg->if_handle,
3337 vf_cfg->pmac_id, vf + 1);
3175d8c2
SP		 3338 else
3339 be_cmd_set_mac(adapter, NULL, vf_cfg->if_handle,
3340 vf + 1);
f9449ab7 3341
11ac75ed
SP		 3342 be_cmd_if_destroy(adapter, vf_cfg->if_handle, vf + 1);
3343 }
39f1d94d
SP		 3344done:
3345 kfree(adapter->vf_cfg);
3346 adapter->num_vfs = 0;
f174c7ec 3347 adapter->flags &= ~BE_FLAGS_SRIOV_ENABLED;
6d87f5c3
AK		 3348}
3349
7707133c
SP		 3350static void be_clear_queues(struct be_adapter *adapter)
3351{
3352 be_mcc_queues_destroy(adapter);
3353 be_rx_cqs_destroy(adapter);
3354 be_tx_queues_destroy(adapter);
3355 be_evt_queues_destroy(adapter);
3356}
3357
68d7bdcb 3358static void be_cancel_worker(struct be_adapter *adapter)
a54769f5 3359{
191eb756
SP		 3360 if (adapter->flags & BE_FLAGS_WORKER_SCHEDULED) {
3361 cancel_delayed_work_sync(&adapter->work);
3362 adapter->flags &= ~BE_FLAGS_WORKER_SCHEDULED;
3363 }
68d7bdcb
SP		 3364}
3365
b05004ad 3366static void be_mac_clear(struct be_adapter *adapter)
68d7bdcb 3367{
b05004ad 3368 if (adapter->pmac_id) {
f66b7cfd
SP		 3369 be_cmd_pmac_del(adapter, adapter->if_handle,
3370 adapter->pmac_id[0], 0);
b05004ad
SK		 3371 kfree(adapter->pmac_id);
3372 adapter->pmac_id = NULL;
3373 }
3374}
3375
c5abe7c0 3376#ifdef CONFIG_BE2NET_VXLAN
c9c47142
SP		 3377static void be_disable_vxlan_offloads(struct be_adapter *adapter)
3378{
630f4b70
SB		 3379 struct net_device *netdev = adapter->netdev;
3380
c9c47142
SP		 3381 if (adapter->flags & BE_FLAGS_VXLAN_OFFLOADS)
3382 be_cmd_manage_iface(adapter, adapter->if_handle,
3383 OP_CONVERT_TUNNEL_TO_NORMAL);
3384
3385 if (adapter->vxlan_port)
3386 be_cmd_set_vxlan_port(adapter, 0);
3387
3388 adapter->flags &= ~BE_FLAGS_VXLAN_OFFLOADS;
3389 adapter->vxlan_port = 0;
630f4b70
SB		 3390
3391 netdev->hw_enc_features = 0;
3392 netdev->hw_features &= ~(NETIF_F_GSO_UDP_TUNNEL);
ac9a3d84 3393 netdev->features &= ~(NETIF_F_GSO_UDP_TUNNEL);
c9c47142 3394}
c5abe7c0 3395#endif
c9c47142 3396
b05004ad
SK		 3397static int be_clear(struct be_adapter *adapter)
3398{
68d7bdcb 3399 be_cancel_worker(adapter);
191eb756 3400
11ac75ed 3401 if (sriov_enabled(adapter))
f9449ab7
SP		 3402 be_vf_clear(adapter);
3403
bec84e6b
VV		 3404 /* Re-configure FW to distribute resources evenly across max-supported
3405 * number of VFs, only when VFs are not already enabled.
3406 */
3407 if (be_physfn(adapter) && !pci_vfs_assigned(adapter->pdev))
3408 be_cmd_set_sriov_config(adapter, adapter->pool_res,
3409 pci_sriov_get_totalvfs(adapter->pdev));
3410
c5abe7c0 3411#ifdef CONFIG_BE2NET_VXLAN
c9c47142 3412 be_disable_vxlan_offloads(adapter);
c5abe7c0 3413#endif
2d17f403 3414 /* delete the primary mac along with the uc-mac list */
b05004ad 3415 be_mac_clear(adapter);
fbc13f01 3416
f9449ab7 3417 be_cmd_if_destroy(adapter, adapter->if_handle, 0);
a54769f5 3418
7707133c 3419 be_clear_queues(adapter);
a54769f5 3420
10ef9ab4 3421 be_msix_disable(adapter);
e1ad8e33 3422 adapter->flags &= ~BE_FLAGS_SETUP_DONE;
a54769f5
SP		 3423 return 0;
3424}
3425
0700d816
KA		 3426static int be_if_create(struct be_adapter *adapter, u32 *if_handle,
3427 u32 cap_flags, u32 vf)
3428{
3429 u32 en_flags;
3430 int status;
3431
3432 en_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
3433 BE_IF_FLAGS_MULTICAST | BE_IF_FLAGS_PASS_L3L4_ERRORS |
3434 BE_IF_FLAGS_RSS;
3435
3436 en_flags &= cap_flags;
3437
3438 status = be_cmd_if_create(adapter, cap_flags, en_flags,
3439 if_handle, vf);
3440
3441 return status;
3442}
3443
4c876616 3444static int be_vfs_if_create(struct be_adapter *adapter)
abb93951 3445{
92bf14ab 3446 struct be_resources res = {0};
4c876616 3447 struct be_vf_cfg *vf_cfg;
0700d816
KA		 3448 u32 cap_flags, vf;
3449 int status;
abb93951 3450
0700d816 3451 /* If a FW profile exists, then cap_flags are updated */
4c876616
SP		 3452 cap_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
3453 BE_IF_FLAGS_MULTICAST;
abb93951 3454
4c876616 3455 for_all_vfs(adapter, vf_cfg, vf) {
92bf14ab
SP		 3456 if (!BE3_chip(adapter)) {
3457 status = be_cmd_get_profile_config(adapter, &res,
3458 vf + 1);
3459 if (!status)
3460 cap_flags = res.if_cap_flags;
3461 }
4c876616 3462
0700d816
KA		 3463 status = be_if_create(adapter, &vf_cfg->if_handle,
3464 cap_flags, vf + 1);
4c876616 3465 if (status)
0700d816 3466 return status;
4c876616 3467 }
0700d816
KA		 3468
3469 return 0;
abb93951
PR		 3470}
3471
39f1d94d 3472static int be_vf_setup_init(struct be_adapter *adapter)
30128031 3473{
11ac75ed 3474 struct be_vf_cfg *vf_cfg;
30128031
SP		 3475 int vf;
3476
39f1d94d
SP		 3477 adapter->vf_cfg = kcalloc(adapter->num_vfs, sizeof(*vf_cfg),
3478 GFP_KERNEL);
3479 if (!adapter->vf_cfg)
3480 return -ENOMEM;
3481
11ac75ed
SP		 3482 for_all_vfs(adapter, vf_cfg, vf) {
3483 vf_cfg->if_handle = -1;
3484 vf_cfg->pmac_id = -1;
30128031 3485 }
39f1d94d 3486 return 0;
30128031
SP		 3487}
3488
f9449ab7
SP		 3489static int be_vf_setup(struct be_adapter *adapter)
3490{
c502224e 3491 struct device *dev = &adapter->pdev->dev;
11ac75ed 3492 struct be_vf_cfg *vf_cfg;
4c876616 3493 int status, old_vfs, vf;
04a06028 3494 u32 privileges;
39f1d94d 3495
257a3feb 3496 old_vfs = pci_num_vf(adapter->pdev);
39f1d94d
SP		 3497
3498 status = be_vf_setup_init(adapter);
3499 if (status)
3500 goto err;
30128031 3501
4c876616
SP		 3502 if (old_vfs) {
3503 for_all_vfs(adapter, vf_cfg, vf) {
3504 status = be_cmd_get_if_id(adapter, vf_cfg, vf);
3505 if (status)
3506 goto err;
3507 }
f9449ab7 3508
4c876616
SP		 3509 status = be_vfs_mac_query(adapter);
3510 if (status)
3511 goto err;
3512 } else {
bec84e6b
VV		 3513 status = be_vfs_if_create(adapter);
3514 if (status)
3515 goto err;
3516
39f1d94d
SP		 3517 status = be_vf_eth_addr_config(adapter);
3518 if (status)
3519 goto err;
3520 }
f9449ab7 3521
11ac75ed 3522 for_all_vfs(adapter, vf_cfg, vf) {
04a06028
SP		 3523 /* Allow VFs to programs MAC/VLAN filters */
3524 status = be_cmd_get_fn_privileges(adapter, &privileges, vf + 1);
3525 if (!status && !(privileges & BE_PRIV_FILTMGMT)) {
3526 status = be_cmd_set_fn_privileges(adapter,
3527 privileges |
3528 BE_PRIV_FILTMGMT,
3529 vf + 1);
3530 if (!status)
3531 dev_info(dev, "VF%d has FILTMGMT privilege\n",
3532 vf);
3533 }
3534
0f77ba73
RN		 3535 /* Allow full available bandwidth */
3536 if (!old_vfs)
3537 be_cmd_config_qos(adapter, 0, 0, vf + 1);
f1f3ee1b 3538
bdce2ad7 3539 if (!old_vfs) {
0599863d 3540 be_cmd_enable_vf(adapter, vf + 1);
bdce2ad7
SR		 3541 be_cmd_set_logical_link_config(adapter,
3542 IFLA_VF_LINK_STATE_AUTO,
3543 vf+1);
3544 }
f9449ab7 3545 }
b4c1df93
SP		 3546
3547 if (!old_vfs) {
3548 status = pci_enable_sriov(adapter->pdev, adapter->num_vfs);
3549 if (status) {
3550 dev_err(dev, "SRIOV enable failed\n");
3551 adapter->num_vfs = 0;
3552 goto err;
3553 }
3554 }
f174c7ec
VV		 3555
3556 adapter->flags |= BE_FLAGS_SRIOV_ENABLED;
f9449ab7
SP		 3557 return 0;
3558err:
4c876616
SP		 3559 dev_err(dev, "VF setup failed\n");
3560 be_vf_clear(adapter);
f9449ab7
SP		 3561 return status;
3562}
3563
f93f160b
VV		 3564/* Converting function_mode bits on BE3 to SH mc_type enums */
3565
3566static u8 be_convert_mc_type(u32 function_mode)
3567{
66064dbc 3568 if (function_mode & VNIC_MODE && function_mode & QNQ_MODE)
f93f160b 3569 return vNIC1;
66064dbc 3570 else if (function_mode & QNQ_MODE)
f93f160b
VV		 3571 return FLEX10;
3572 else if (function_mode & VNIC_MODE)
3573 return vNIC2;
3574 else if (function_mode & UMC_ENABLED)
3575 return UMC;
3576 else
3577 return MC_NONE;
3578}
3579
92bf14ab
SP		 3580/* On BE2/BE3 FW does not suggest the supported limits */
3581static void BEx_get_resources(struct be_adapter *adapter,
3582 struct be_resources *res)
3583{
bec84e6b 3584 bool use_sriov = adapter->num_vfs ? 1 : 0;
92bf14ab
SP		 3585
3586 if (be_physfn(adapter))
3587 res->max_uc_mac = BE_UC_PMAC_COUNT;
3588 else
3589 res->max_uc_mac = BE_VF_UC_PMAC_COUNT;
3590
f93f160b
VV		 3591 adapter->mc_type = be_convert_mc_type(adapter->function_mode);
3592
3593 if (be_is_mc(adapter)) {
3594 /* Assuming that there are 4 channels per port,
3595 * when multi-channel is enabled
3596 */
3597 if (be_is_qnq_mode(adapter))
3598 res->max_vlans = BE_NUM_VLANS_SUPPORTED/8;
3599 else
3600 /* In a non-qnq multichannel mode, the pvid
3601 * takes up one vlan entry
3602 */
3603 res->max_vlans = (BE_NUM_VLANS_SUPPORTED / 4) - 1;
3604 } else {
92bf14ab 3605 res->max_vlans = BE_NUM_VLANS_SUPPORTED;
f93f160b
VV		 3606 }
3607
92bf14ab
SP		 3608 res->max_mcast_mac = BE_MAX_MC;
3609
a5243dab
VV		 3610 /* 1) For BE3 1Gb ports, FW does not support multiple TXQs
3611 * 2) Create multiple TX rings on a BE3-R multi-channel interface
3612 * *only* if it is RSS-capable.
3613 */
3614 if (BE2_chip(adapter) || use_sriov || (adapter->port_num > 1) ||
3615 !be_physfn(adapter) || (be_is_mc(adapter) &&
a28277dc 3616 !(adapter->function_caps & BE_FUNCTION_CAPS_RSS))) {
92bf14ab 3617 res->max_tx_qs = 1;
a28277dc
SR		 3618 } else if (adapter->function_caps & BE_FUNCTION_CAPS_SUPER_NIC) {
3619 struct be_resources super_nic_res = {0};
3620
3621 /* On a SuperNIC profile, the driver needs to use the
3622 * GET_PROFILE_CONFIG cmd to query the per-function TXQ limits
3623 */
3624 be_cmd_get_profile_config(adapter, &super_nic_res, 0);
3625 /* Some old versions of BE3 FW don't report max_tx_qs value */
3626 res->max_tx_qs = super_nic_res.max_tx_qs ? : BE3_MAX_TX_QS;
3627 } else {
92bf14ab 3628 res->max_tx_qs = BE3_MAX_TX_QS;
a28277dc 3629 }
92bf14ab
SP		 3630
3631 if ((adapter->function_caps & BE_FUNCTION_CAPS_RSS) &&
3632 !use_sriov && be_physfn(adapter))
3633 res->max_rss_qs = (adapter->be3_native) ?
3634 BE3_MAX_RSS_QS : BE2_MAX_RSS_QS;
3635 res->max_rx_qs = res->max_rss_qs + 1;
3636
e3dc867c 3637 if (be_physfn(adapter))
d3518e21 3638 res->max_evt_qs = (be_max_vfs(adapter) > 0) ?
e3dc867c
SR		 3639 BE3_SRIOV_MAX_EVT_QS : BE3_MAX_EVT_QS;
3640 else
3641 res->max_evt_qs = 1;
92bf14ab
SP		 3642
3643 res->if_cap_flags = BE_IF_CAP_FLAGS_WANT;
3644 if (!(adapter->function_caps & BE_FUNCTION_CAPS_RSS))
3645 res->if_cap_flags &= ~BE_IF_FLAGS_RSS;
3646}
3647
30128031
SP		 3648static void be_setup_init(struct be_adapter *adapter)
3649{
3650 adapter->vlan_prio_bmap = 0xff;
42f11cf2 3651 adapter->phy.link_speed = -1;
30128031
SP		 3652 adapter->if_handle = -1;
3653 adapter->be3_native = false;
f66b7cfd 3654 adapter->if_flags = 0;
f25b119c
PR		 3655 if (be_physfn(adapter))
3656 adapter->cmd_privileges = MAX_PRIVILEGES;
3657 else
3658 adapter->cmd_privileges = MIN_PRIVILEGES;
30128031
SP		 3659}
3660
bec84e6b
VV		 3661static int be_get_sriov_config(struct be_adapter *adapter)
3662{
3663 struct device *dev = &adapter->pdev->dev;
3664 struct be_resources res = {0};
d3d18312 3665 int max_vfs, old_vfs;
bec84e6b
VV		 3666
3667 /* Some old versions of BE3 FW don't report max_vfs value */
d3d18312
SP		 3668 be_cmd_get_profile_config(adapter, &res, 0);
3669
bec84e6b
VV		 3670 if (BE3_chip(adapter) && !res.max_vfs) {
3671 max_vfs = pci_sriov_get_totalvfs(adapter->pdev);
3672 res.max_vfs = max_vfs > 0 ? min(MAX_VFS, max_vfs) : 0;
3673 }
3674
d3d18312 3675 adapter->pool_res = res;
bec84e6b
VV		 3676
3677 if (!be_max_vfs(adapter)) {
3678 if (num_vfs)
50762667 3679 dev_warn(dev, "SRIOV is disabled. Ignoring num_vfs\n");
bec84e6b
VV		 3680 adapter->num_vfs = 0;
3681 return 0;
3682 }
3683
d3d18312
SP		 3684 pci_sriov_set_totalvfs(adapter->pdev, be_max_vfs(adapter));
3685
bec84e6b
VV		 3686 /* validate num_vfs module param */
3687 old_vfs = pci_num_vf(adapter->pdev);
3688 if (old_vfs) {
3689 dev_info(dev, "%d VFs are already enabled\n", old_vfs);
3690 if (old_vfs != num_vfs)
3691 dev_warn(dev, "Ignoring num_vfs=%d setting\n", num_vfs);
3692 adapter->num_vfs = old_vfs;
3693 } else {
3694 if (num_vfs > be_max_vfs(adapter)) {
3695 dev_info(dev, "Resources unavailable to init %d VFs\n",
3696 num_vfs);
3697 dev_info(dev, "Limiting to %d VFs\n",
3698 be_max_vfs(adapter));
3699 }
3700 adapter->num_vfs = min_t(u16, num_vfs, be_max_vfs(adapter));
3701 }
3702
3703 return 0;
3704}
3705
92bf14ab 3706static int be_get_resources(struct be_adapter *adapter)
abb93951 3707{
92bf14ab
SP		 3708 struct device *dev = &adapter->pdev->dev;
3709 struct be_resources res = {0};
3710 int status;
abb93951 3711
92bf14ab
SP		 3712 if (BEx_chip(adapter)) {
3713 BEx_get_resources(adapter, &res);
3714 adapter->res = res;
abb93951
PR		 3715 }
3716
92bf14ab
SP		 3717 /* For Lancer, SH etc read per-function resource limits from FW.
3718 * GET_FUNC_CONFIG returns per function guaranteed limits.
3719 * GET_PROFILE_CONFIG returns PCI-E related limits PF-pool limits
3720 */
3721 if (!BEx_chip(adapter)) {
3722 status = be_cmd_get_func_config(adapter, &res);
3723 if (status)
3724 return status;
abb93951 3725
92bf14ab
SP		 3726 /* If RoCE may be enabled stash away half the EQs for RoCE */
3727 if (be_roce_supported(adapter))
3728 res.max_evt_qs /= 2;
3729 adapter->res = res;
abb93951 3730 }
4c876616 3731
acbafeb1
SP		 3732 dev_info(dev, "Max: txqs %d, rxqs %d, rss %d, eqs %d, vfs %d\n",
3733 be_max_txqs(adapter), be_max_rxqs(adapter),
3734 be_max_rss(adapter), be_max_eqs(adapter),
3735 be_max_vfs(adapter));
3736 dev_info(dev, "Max: uc-macs %d, mc-macs %d, vlans %d\n",
3737 be_max_uc(adapter), be_max_mc(adapter),
3738 be_max_vlans(adapter));
3739
92bf14ab 3740 return 0;
abb93951
PR		 3741}
3742
d3d18312
SP		 3743static void be_sriov_config(struct be_adapter *adapter)
3744{
3745 struct device *dev = &adapter->pdev->dev;
3746 int status;
3747
3748 status = be_get_sriov_config(adapter);
3749 if (status) {
3750 dev_err(dev, "Failed to query SR-IOV configuration\n");
3751 dev_err(dev, "SR-IOV cannot be enabled\n");
3752 return;
3753 }
3754
3755 /* When the HW is in SRIOV capable configuration, the PF-pool
3756 * resources are equally distributed across the max-number of
3757 * VFs. The user may request only a subset of the max-vfs to be
3758 * enabled. Based on num_vfs, redistribute the resources across
3759 * num_vfs so that each VF will have access to more number of
3760 * resources. This facility is not available in BE3 FW.
3761 * Also, this is done by FW in Lancer chip.
3762 */
3763 if (be_max_vfs(adapter) && !pci_num_vf(adapter->pdev)) {
3764 status = be_cmd_set_sriov_config(adapter,
3765 adapter->pool_res,
3766 adapter->num_vfs);
3767 if (status)
3768 dev_err(dev, "Failed to optimize SR-IOV resources\n");
3769 }
3770}
3771
39f1d94d
SP		 3772static int be_get_config(struct be_adapter *adapter)
3773{
6b085ba9 3774 int status, level;
542963b7 3775 u16 profile_id;
6b085ba9
SP		 3776
3777 status = be_cmd_get_cntl_attributes(adapter);
3778 if (status)
3779 return status;
39f1d94d 3780
e97e3cda 3781 status = be_cmd_query_fw_cfg(adapter);
abb93951 3782 if (status)
92bf14ab 3783 return status;
abb93951 3784
6b085ba9
SP		 3785 if (BEx_chip(adapter)) {
3786 level = be_cmd_get_fw_log_level(adapter);
3787 adapter->msg_enable =
3788 level <= FW_LOG_LEVEL_DEFAULT ? NETIF_MSG_HW : 0;
3789 }
3790
3791 be_cmd_get_acpi_wol_cap(adapter);
3792
21252377
VV		 3793 be_cmd_query_port_name(adapter);
3794
3795 if (be_physfn(adapter)) {
542963b7
VV		 3796 status = be_cmd_get_active_profile(adapter, &profile_id);
3797 if (!status)
3798 dev_info(&adapter->pdev->dev,
3799 "Using profile 0x%x\n", profile_id);
962bcb75 3800 }
bec84e6b 3801
d3d18312
SP		 3802 if (!BE2_chip(adapter) && be_physfn(adapter))
3803 be_sriov_config(adapter);
542963b7 3804
92bf14ab
SP		 3805 status = be_get_resources(adapter);
3806 if (status)
3807 return status;
abb93951 3808
46ee9c14
RN		 3809 adapter->pmac_id = kcalloc(be_max_uc(adapter),
3810 sizeof(*adapter->pmac_id), GFP_KERNEL);
92bf14ab
SP		 3811 if (!adapter->pmac_id)
3812 return -ENOMEM;
abb93951 3813
92bf14ab
SP		 3814 /* Sanitize cfg_num_qs based on HW and platform limits */
3815 adapter->cfg_num_qs = min(adapter->cfg_num_qs, be_max_qs(adapter));
3816
3817 return 0;
39f1d94d
SP		 3818}
3819
95046b92
SP		 3820static int be_mac_setup(struct be_adapter *adapter)
3821{
3822 u8 mac[ETH_ALEN];
3823 int status;
3824
3825 if (is_zero_ether_addr(adapter->netdev->dev_addr)) {
3826 status = be_cmd_get_perm_mac(adapter, mac);
3827 if (status)
3828 return status;
3829
3830 memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN);
3831 memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN);
3832 } else {
3833 /* Maybe the HW was reset; dev_addr must be re-programmed */
3834 memcpy(mac, adapter->netdev->dev_addr, ETH_ALEN);
3835 }
3836
2c7a9dc1
AK		 3837 /* For BE3-R VFs, the PF programs the initial MAC address */
3838 if (!(BEx_chip(adapter) && be_virtfn(adapter)))
3839 be_cmd_pmac_add(adapter, mac, adapter->if_handle,
3840 &adapter->pmac_id[0], 0);
95046b92
SP		 3841 return 0;
3842}
3843
68d7bdcb
SP		 3844static void be_schedule_worker(struct be_adapter *adapter)
3845{
3846 schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
3847 adapter->flags |= BE_FLAGS_WORKER_SCHEDULED;
3848}
3849
7707133c 3850static int be_setup_queues(struct be_adapter *adapter)
5fb379ee 3851{
68d7bdcb 3852 struct net_device *netdev = adapter->netdev;
10ef9ab4 3853 int status;
ba343c77 3854
7707133c 3855 status = be_evt_queues_create(adapter);
abb93951
PR		 3856 if (status)
3857 goto err;
73d540f2 3858
7707133c 3859 status = be_tx_qs_create(adapter);
c2bba3df
SK		 3860 if (status)
3861 goto err;
10ef9ab4 3862
7707133c 3863 status = be_rx_cqs_create(adapter);
10ef9ab4 3864 if (status)
a54769f5 3865 goto err;
6b7c5b94 3866
7707133c 3867 status = be_mcc_queues_create(adapter);
10ef9ab4
SP		 3868 if (status)
3869 goto err;
3870
68d7bdcb
SP		 3871 status = netif_set_real_num_rx_queues(netdev, adapter->num_rx_qs);
3872 if (status)
3873 goto err;
3874
3875 status = netif_set_real_num_tx_queues(netdev, adapter->num_tx_qs);
3876 if (status)
3877 goto err;
3878
7707133c
SP		 3879 return 0;
3880err:
3881 dev_err(&adapter->pdev->dev, "queue_setup failed\n");
3882 return status;
3883}
3884
68d7bdcb
SP		 3885int be_update_queues(struct be_adapter *adapter)
3886{
3887 struct net_device *netdev = adapter->netdev;
3888 int status;
3889
3890 if (netif_running(netdev))
3891 be_close(netdev);
3892
3893 be_cancel_worker(adapter);
3894
3895 /* If any vectors have been shared with RoCE we cannot re-program
3896 * the MSIx table.
3897 */
3898 if (!adapter->num_msix_roce_vec)
3899 be_msix_disable(adapter);
3900
3901 be_clear_queues(adapter);
3902
3903 if (!msix_enabled(adapter)) {
3904 status = be_msix_enable(adapter);
3905 if (status)
3906 return status;
3907 }
3908
3909 status = be_setup_queues(adapter);
3910 if (status)
3911 return status;
3912
3913 be_schedule_worker(adapter);
3914
3915 if (netif_running(netdev))
3916 status = be_open(netdev);
3917
3918 return status;
3919}
3920
f7062ee5
SP		 3921static inline int fw_major_num(const char *fw_ver)
3922{
3923 int fw_major = 0, i;
3924
3925 i = sscanf(fw_ver, "%d.", &fw_major);
3926 if (i != 1)
3927 return 0;
3928
3929 return fw_major;
3930}
3931
7707133c
SP		 3932static int be_setup(struct be_adapter *adapter)
3933{
3934 struct device *dev = &adapter->pdev->dev;
7707133c
SP		 3935 int status;
3936
3937 be_setup_init(adapter);
3938
3939 if (!lancer_chip(adapter))
3940 be_cmd_req_native_mode(adapter);
3941
3942 status = be_get_config(adapter);
10ef9ab4 3943 if (status)
a54769f5 3944 goto err;
6b7c5b94 3945
7707133c 3946 status = be_msix_enable(adapter);
10ef9ab4 3947 if (status)
a54769f5 3948 goto err;
6b7c5b94 3949
0700d816
KA		 3950 status = be_if_create(adapter, &adapter->if_handle,
3951 be_if_cap_flags(adapter), 0);
7707133c 3952 if (status)
a54769f5 3953 goto err;
6b7c5b94 3954
68d7bdcb
SP		 3955 /* Updating real_num_tx/rx_queues() requires rtnl_lock() */
3956 rtnl_lock();
7707133c 3957 status = be_setup_queues(adapter);
68d7bdcb 3958 rtnl_unlock();
95046b92 3959 if (status)
1578e777
PR		 3960 goto err;
3961
7707133c 3962 be_cmd_get_fn_privileges(adapter, &adapter->cmd_privileges, 0);
7707133c
SP		 3963
3964 status = be_mac_setup(adapter);
10ef9ab4
SP		 3965 if (status)
3966 goto err;
3967
e97e3cda 3968 be_cmd_get_fw_ver(adapter);
acbafeb1 3969 dev_info(dev, "FW version is %s\n", adapter->fw_ver);
5a56eb10 3970
e9e2a904 3971 if (BE2_chip(adapter) && fw_major_num(adapter->fw_ver) < 4) {
50762667 3972 dev_err(dev, "Firmware on card is old(%s), IRQs may not work",
e9e2a904
SK		 3973 adapter->fw_ver);
3974 dev_err(dev, "Please upgrade firmware to version >= 4.0\n");
3975 }
3976
1d1e9a46 3977 if (adapter->vlans_added)
10329df8 3978 be_vid_config(adapter);
7ab8b0b4 3979
a54769f5 3980 be_set_rx_mode(adapter->netdev);
5fb379ee 3981
00d594c3
KA		 3982 status = be_cmd_set_flow_control(adapter, adapter->tx_fc,
3983 adapter->rx_fc);
3984 if (status)
3985 be_cmd_get_flow_control(adapter, &adapter->tx_fc,
3986 &adapter->rx_fc);
590c391d 3987
00d594c3
KA		 3988 dev_info(&adapter->pdev->dev, "HW Flow control - TX:%d RX:%d\n",
3989 adapter->tx_fc, adapter->rx_fc);
2dc1deb6 3990
bdce2ad7
SR		 3991 if (be_physfn(adapter))
3992 be_cmd_set_logical_link_config(adapter,
3993 IFLA_VF_LINK_STATE_AUTO, 0);
3994
bec84e6b
VV		 3995 if (adapter->num_vfs)
3996 be_vf_setup(adapter);
f9449ab7 3997
f25b119c
PR		 3998 status = be_cmd_get_phy_info(adapter);
3999 if (!status && be_pause_supported(adapter))
42f11cf2
AK		 4000 adapter->phy.fc_autoneg = 1;
4001
68d7bdcb 4002 be_schedule_worker(adapter);
e1ad8e33 4003 adapter->flags |= BE_FLAGS_SETUP_DONE;
f9449ab7 4004 return 0;
a54769f5
SP		 4005err:
4006 be_clear(adapter);
4007 return status;
4008}
6b7c5b94 4009
66268739
IV		 4010#ifdef CONFIG_NET_POLL_CONTROLLER
4011static void be_netpoll(struct net_device *netdev)
4012{
4013 struct be_adapter *adapter = netdev_priv(netdev);
10ef9ab4 4014 struct be_eq_obj *eqo;
66268739
IV		 4015 int i;
4016
e49cc34f
SP		 4017 for_all_evt_queues(adapter, eqo, i) {
4018 be_eq_notify(eqo->adapter, eqo->q.id, false, true, 0);
4019 napi_schedule(&eqo->napi);
4020 }
66268739
IV		 4021}
4022#endif
4023
96c9b2e4 4024static char flash_cookie[2][16] = {"*** SE FLAS", "H DIRECTORY *** "};
fa9a6fed 4025
306f1348
SP		 4026static bool phy_flashing_required(struct be_adapter *adapter)
4027{
e02cfd96 4028 return (adapter->phy.phy_type == PHY_TYPE_TN_8022 &&
42f11cf2 4029 adapter->phy.interface_type == PHY_TYPE_BASET_10GB);
306f1348
SP		 4030}
4031
c165541e
PR		 4032static bool is_comp_in_ufi(struct be_adapter *adapter,
4033 struct flash_section_info *fsec, int type)
4034{
4035 int i = 0, img_type = 0;
4036 struct flash_section_info_g2 *fsec_g2 = NULL;
4037
ca34fe38 4038 if (BE2_chip(adapter))
c165541e
PR		 4039 fsec_g2 = (struct flash_section_info_g2 *)fsec;
4040
4041 for (i = 0; i < MAX_FLASH_COMP; i++) {
4042 if (fsec_g2)
4043 img_type = le32_to_cpu(fsec_g2->fsec_entry[i].type);
4044 else
4045 img_type = le32_to_cpu(fsec->fsec_entry[i].type);
4046
4047 if (img_type == type)
4048 return true;
4049 }
4050 return false;
4051
4052}
4053
4188e7df 4054static struct flash_section_info *get_fsec_info(struct be_adapter *adapter,
748b539a
SP		 4055 int header_size,
4056 const struct firmware *fw)
c165541e
PR		 4057{
4058 struct flash_section_info *fsec = NULL;
4059 const u8 *p = fw->data;
4060
4061 p += header_size;
4062 while (p < (fw->data + fw->size)) {
4063 fsec = (struct flash_section_info *)p;
4064 if (!memcmp(flash_cookie, fsec->cookie, sizeof(flash_cookie)))
4065 return fsec;
4066 p += 32;
4067 }
4068 return NULL;
4069}
4070
96c9b2e4
VV		 4071static int be_check_flash_crc(struct be_adapter *adapter, const u8 *p,
4072 u32 img_offset, u32 img_size, int hdr_size,
4073 u16 img_optype, bool *crc_match)
4074{
4075 u32 crc_offset;
4076 int status;
4077 u8 crc[4];
4078
70a7b525
VV		 4079 status = be_cmd_get_flash_crc(adapter, crc, img_optype, img_offset,
4080 img_size - 4);
96c9b2e4
VV		 4081 if (status)
4082 return status;
4083
4084 crc_offset = hdr_size + img_offset + img_size - 4;
4085
4086 /* Skip flashing, if crc of flashed region matches */
4087 if (!memcmp(crc, p + crc_offset, 4))
4088 *crc_match = true;
4089 else
4090 *crc_match = false;
4091
4092 return status;
4093}
4094
773a2d7c 4095static int be_flash(struct be_adapter *adapter, const u8 *img,
70a7b525
VV		 4096 struct be_dma_mem *flash_cmd, int optype, int img_size,
4097 u32 img_offset)
773a2d7c 4098{
70a7b525 4099 u32 flash_op, num_bytes, total_bytes = img_size, bytes_sent = 0;
773a2d7c 4100 struct be_cmd_write_flashrom *req = flash_cmd->va;
96c9b2e4 4101 int status;
773a2d7c 4102
773a2d7c
PR		 4103 while (total_bytes) {
4104 num_bytes = min_t(u32, 32*1024, total_bytes);
4105
4106 total_bytes -= num_bytes;
4107
4108 if (!total_bytes) {
4109 if (optype == OPTYPE_PHY_FW)
4110 flash_op = FLASHROM_OPER_PHY_FLASH;
4111 else
4112 flash_op = FLASHROM_OPER_FLASH;
4113 } else {
4114 if (optype == OPTYPE_PHY_FW)
4115 flash_op = FLASHROM_OPER_PHY_SAVE;
4116 else
4117 flash_op = FLASHROM_OPER_SAVE;
4118 }
4119
be716446 4120 memcpy(req->data_buf, img, num_bytes);
773a2d7c
PR		 4121 img += num_bytes;
4122 status = be_cmd_write_flashrom(adapter, flash_cmd, optype,
70a7b525
VV		 4123 flash_op, img_offset +
4124 bytes_sent, num_bytes);
4c60005f 4125 if (base_status(status) == MCC_STATUS_ILLEGAL_REQUEST &&
96c9b2e4
VV		 4126 optype == OPTYPE_PHY_FW)
4127 break;
4128 else if (status)
773a2d7c 4129 return status;
70a7b525
VV		 4130
4131 bytes_sent += num_bytes;
773a2d7c
PR		 4132 }
4133 return 0;
4134}
4135
0ad3157e 4136/* For BE2, BE3 and BE3-R */
ca34fe38 4137static int be_flash_BEx(struct be_adapter *adapter,
748b539a
SP		 4138 const struct firmware *fw,
4139 struct be_dma_mem *flash_cmd, int num_of_images)
84517482 4140{
c165541e 4141 int img_hdrs_size = (num_of_images * sizeof(struct image_hdr));
96c9b2e4 4142 struct device *dev = &adapter->pdev->dev;
c165541e 4143 struct flash_section_info *fsec = NULL;
96c9b2e4
VV		 4144 int status, i, filehdr_size, num_comp;
4145 const struct flash_comp *pflashcomp;
4146 bool crc_match;
4147 const u8 *p;
c165541e
PR		 4148
4149 struct flash_comp gen3_flash_types[] = {
4150 { FLASH_iSCSI_PRIMARY_IMAGE_START_g3, OPTYPE_ISCSI_ACTIVE,
4151 FLASH_IMAGE_MAX_SIZE_g3, IMAGE_FIRMWARE_iSCSI},
4152 { FLASH_REDBOOT_START_g3, OPTYPE_REDBOOT,
4153 FLASH_REDBOOT_IMAGE_MAX_SIZE_g3, IMAGE_BOOT_CODE},
4154 { FLASH_iSCSI_BIOS_START_g3, OPTYPE_BIOS,
4155 FLASH_BIOS_IMAGE_MAX_SIZE_g3, IMAGE_OPTION_ROM_ISCSI},
4156 { FLASH_PXE_BIOS_START_g3, OPTYPE_PXE_BIOS,
4157 FLASH_BIOS_IMAGE_MAX_SIZE_g3, IMAGE_OPTION_ROM_PXE},
4158 { FLASH_FCoE_BIOS_START_g3, OPTYPE_FCOE_BIOS,
4159 FLASH_BIOS_IMAGE_MAX_SIZE_g3, IMAGE_OPTION_ROM_FCoE},
4160 { FLASH_iSCSI_BACKUP_IMAGE_START_g3, OPTYPE_ISCSI_BACKUP,
4161 FLASH_IMAGE_MAX_SIZE_g3, IMAGE_FIRMWARE_BACKUP_iSCSI},
4162 { FLASH_FCoE_PRIMARY_IMAGE_START_g3, OPTYPE_FCOE_FW_ACTIVE,
4163 FLASH_IMAGE_MAX_SIZE_g3, IMAGE_FIRMWARE_FCoE},
4164 { FLASH_FCoE_BACKUP_IMAGE_START_g3, OPTYPE_FCOE_FW_BACKUP,
4165 FLASH_IMAGE_MAX_SIZE_g3, IMAGE_FIRMWARE_BACKUP_FCoE},
4166 { FLASH_NCSI_START_g3, OPTYPE_NCSI_FW,
4167 FLASH_NCSI_IMAGE_MAX_SIZE_g3, IMAGE_NCSI},
4168 { FLASH_PHY_FW_START_g3, OPTYPE_PHY_FW,
4169 FLASH_PHY_FW_IMAGE_MAX_SIZE_g3, IMAGE_FIRMWARE_PHY}
3f0d4560 4170 };
c165541e
PR		 4171
4172 struct flash_comp gen2_flash_types[] = {
4173 { FLASH_iSCSI_PRIMARY_IMAGE_START_g2, OPTYPE_ISCSI_ACTIVE,
4174 FLASH_IMAGE_MAX_SIZE_g2, IMAGE_FIRMWARE_iSCSI},
4175 { FLASH_REDBOOT_START_g2, OPTYPE_REDBOOT,
4176 FLASH_REDBOOT_IMAGE_MAX_SIZE_g2, IMAGE_BOOT_CODE},
4177 { FLASH_iSCSI_BIOS_START_g2, OPTYPE_BIOS,
4178 FLASH_BIOS_IMAGE_MAX_SIZE_g2, IMAGE_OPTION_ROM_ISCSI},
4179 { FLASH_PXE_BIOS_START_g2, OPTYPE_PXE_BIOS,
4180 FLASH_BIOS_IMAGE_MAX_SIZE_g2, IMAGE_OPTION_ROM_PXE},
4181 { FLASH_FCoE_BIOS_START_g2, OPTYPE_FCOE_BIOS,
4182 FLASH_BIOS_IMAGE_MAX_SIZE_g2, IMAGE_OPTION_ROM_FCoE},
4183 { FLASH_iSCSI_BACKUP_IMAGE_START_g2, OPTYPE_ISCSI_BACKUP,
4184 FLASH_IMAGE_MAX_SIZE_g2, IMAGE_FIRMWARE_BACKUP_iSCSI},
4185 { FLASH_FCoE_PRIMARY_IMAGE_START_g2, OPTYPE_FCOE_FW_ACTIVE,
4186 FLASH_IMAGE_MAX_SIZE_g2, IMAGE_FIRMWARE_FCoE},
4187 { FLASH_FCoE_BACKUP_IMAGE_START_g2, OPTYPE_FCOE_FW_BACKUP,
4188 FLASH_IMAGE_MAX_SIZE_g2, IMAGE_FIRMWARE_BACKUP_FCoE}
3f0d4560
AK		 4189 };
4190
ca34fe38 4191 if (BE3_chip(adapter)) {
3f0d4560
AK		 4192 pflashcomp = gen3_flash_types;
4193 filehdr_size = sizeof(struct flash_file_hdr_g3);
215faf9c 4194 num_comp = ARRAY_SIZE(gen3_flash_types);
3f0d4560
AK		 4195 } else {
4196 pflashcomp = gen2_flash_types;
4197 filehdr_size = sizeof(struct flash_file_hdr_g2);
215faf9c 4198 num_comp = ARRAY_SIZE(gen2_flash_types);
5d3acd0d 4199 img_hdrs_size = 0;
84517482 4200 }
ca34fe38 4201
c165541e
PR		 4202 /* Get flash section info*/
4203 fsec = get_fsec_info(adapter, filehdr_size + img_hdrs_size, fw);
4204 if (!fsec) {
96c9b2e4 4205 dev_err(dev, "Invalid Cookie. FW image may be corrupted\n");
c165541e
PR		 4206 return -1;
4207 }
9fe96934 4208 for (i = 0; i < num_comp; i++) {
c165541e 4209 if (!is_comp_in_ufi(adapter, fsec, pflashcomp[i].img_type))
9fe96934 4210 continue;
c165541e
PR		 4211
4212 if ((pflashcomp[i].optype == OPTYPE_NCSI_FW) &&
4213 memcmp(adapter->fw_ver, "3.102.148.0", 11) < 0)
4214 continue;
4215
773a2d7c
PR		 4216 if (pflashcomp[i].optype == OPTYPE_PHY_FW &&
4217 !phy_flashing_required(adapter))
306f1348 4218 continue;
c165541e 4219
773a2d7c 4220 if (pflashcomp[i].optype == OPTYPE_REDBOOT) {
96c9b2e4
VV		 4221 status = be_check_flash_crc(adapter, fw->data,
4222 pflashcomp[i].offset,
4223 pflashcomp[i].size,
4224 filehdr_size +
4225 img_hdrs_size,
4226 OPTYPE_REDBOOT, &crc_match);
4227 if (status) {
4228 dev_err(dev,
4229 "Could not get CRC for 0x%x region\n",
4230 pflashcomp[i].optype);
4231 continue;
4232 }
4233
4234 if (crc_match)
773a2d7c
PR		 4235 continue;
4236 }
c165541e 4237
96c9b2e4
VV		 4238 p = fw->data + filehdr_size + pflashcomp[i].offset +
4239 img_hdrs_size;
306f1348
SP		 4240 if (p + pflashcomp[i].size > fw->data + fw->size)
4241 return -1;
773a2d7c
PR		 4242
4243 status = be_flash(adapter, p, flash_cmd, pflashcomp[i].optype,
70a7b525 4244 pflashcomp[i].size, 0);
773a2d7c 4245 if (status) {
96c9b2e4 4246 dev_err(dev, "Flashing section type 0x%x failed\n",
773a2d7c
PR		 4247 pflashcomp[i].img_type);
4248 return status;
84517482 4249 }
84517482 4250 }
84517482
AK		 4251 return 0;
4252}
4253
96c9b2e4
VV		 4254static u16 be_get_img_optype(struct flash_section_entry fsec_entry)
4255{
4256 u32 img_type = le32_to_cpu(fsec_entry.type);
4257 u16 img_optype = le16_to_cpu(fsec_entry.optype);
4258
4259 if (img_optype != 0xFFFF)
4260 return img_optype;
4261
4262 switch (img_type) {
4263 case IMAGE_FIRMWARE_iSCSI:
4264 img_optype = OPTYPE_ISCSI_ACTIVE;
4265 break;
4266 case IMAGE_BOOT_CODE:
4267 img_optype = OPTYPE_REDBOOT;
4268 break;
4269 case IMAGE_OPTION_ROM_ISCSI:
4270 img_optype = OPTYPE_BIOS;
4271 break;
4272 case IMAGE_OPTION_ROM_PXE:
4273 img_optype = OPTYPE_PXE_BIOS;
4274 break;
4275 case IMAGE_OPTION_ROM_FCoE:
4276 img_optype = OPTYPE_FCOE_BIOS;
4277 break;
4278 case IMAGE_FIRMWARE_BACKUP_iSCSI:
4279 img_optype = OPTYPE_ISCSI_BACKUP;
4280 break;
4281 case IMAGE_NCSI:
4282 img_optype = OPTYPE_NCSI_FW;
4283 break;
4284 case IMAGE_FLASHISM_JUMPVECTOR:
4285 img_optype = OPTYPE_FLASHISM_JUMPVECTOR;
4286 break;
4287 case IMAGE_FIRMWARE_PHY:
4288 img_optype = OPTYPE_SH_PHY_FW;
4289 break;
4290 case IMAGE_REDBOOT_DIR:
4291 img_optype = OPTYPE_REDBOOT_DIR;
4292 break;
4293 case IMAGE_REDBOOT_CONFIG:
4294 img_optype = OPTYPE_REDBOOT_CONFIG;
4295 break;
4296 case IMAGE_UFI_DIR:
4297 img_optype = OPTYPE_UFI_DIR;
4298 break;
4299 default:
4300 break;
4301 }
4302
4303 return img_optype;
4304}
4305
773a2d7c 4306static int be_flash_skyhawk(struct be_adapter *adapter,
748b539a
SP		 4307 const struct firmware *fw,
4308 struct be_dma_mem *flash_cmd, int num_of_images)
3f0d4560 4309{
773a2d7c 4310 int img_hdrs_size = num_of_images * sizeof(struct image_hdr);
70a7b525 4311 bool crc_match, old_fw_img, flash_offset_support = true;
96c9b2e4 4312 struct device *dev = &adapter->pdev->dev;
773a2d7c 4313 struct flash_section_info *fsec = NULL;
96c9b2e4 4314 u32 img_offset, img_size, img_type;
70a7b525 4315 u16 img_optype, flash_optype;
96c9b2e4 4316 int status, i, filehdr_size;
96c9b2e4 4317 const u8 *p;
773a2d7c
PR		 4318
4319 filehdr_size = sizeof(struct flash_file_hdr_g3);
4320 fsec = get_fsec_info(adapter, filehdr_size + img_hdrs_size, fw);
4321 if (!fsec) {
96c9b2e4 4322 dev_err(dev, "Invalid Cookie. FW image may be corrupted\n");
56ace3a0 4323 return -EINVAL;
773a2d7c
PR		 4324 }
4325
70a7b525 4326retry_flash:
773a2d7c
PR		 4327 for (i = 0; i < le32_to_cpu(fsec->fsec_hdr.num_images); i++) {
4328 img_offset = le32_to_cpu(fsec->fsec_entry[i].offset);
4329 img_size = le32_to_cpu(fsec->fsec_entry[i].pad_size);
96c9b2e4
VV		 4330 img_type = le32_to_cpu(fsec->fsec_entry[i].type);
4331 img_optype = be_get_img_optype(fsec->fsec_entry[i]);
4332 old_fw_img = fsec->fsec_entry[i].optype == 0xFFFF;
773a2d7c 4333
96c9b2e4 4334 if (img_optype == 0xFFFF)
773a2d7c 4335 continue;
70a7b525
VV		 4336
4337 if (flash_offset_support)
4338 flash_optype = OPTYPE_OFFSET_SPECIFIED;
4339 else
4340 flash_optype = img_optype;
4341
96c9b2e4
VV		 4342 /* Don't bother verifying CRC if an old FW image is being
4343 * flashed
4344 */
4345 if (old_fw_img)
4346 goto flash;
4347
4348 status = be_check_flash_crc(adapter, fw->data, img_offset,
4349 img_size, filehdr_size +
70a7b525 4350 img_hdrs_size, flash_optype,
96c9b2e4 4351 &crc_match);
4c60005f
KA		 4352 if (base_status(status) == MCC_STATUS_ILLEGAL_REQUEST ||
4353 base_status(status) == MCC_STATUS_ILLEGAL_FIELD) {
70a7b525
VV		 4354 /* The current FW image on the card does not support
4355 * OFFSET based flashing. Retry using older mechanism
4356 * of OPTYPE based flashing
4357 */
4358 if (flash_optype == OPTYPE_OFFSET_SPECIFIED) {
4359 flash_offset_support = false;
4360 goto retry_flash;
4361 }
4362
4363 /* The current FW image on the card does not recognize
4364 * the new FLASH op_type. The FW download is partially
4365 * complete. Reboot the server now to enable FW image
4366 * to recognize the new FLASH op_type. To complete the
4367 * remaining process, download the same FW again after
4368 * the reboot.
4369 */
96c9b2e4
VV		 4370 dev_err(dev, "Flash incomplete. Reset the server\n");
4371 dev_err(dev, "Download FW image again after reset\n");
4372 return -EAGAIN;
4373 } else if (status) {
4374 dev_err(dev, "Could not get CRC for 0x%x region\n",
4375 img_optype);
4376 return -EFAULT;
773a2d7c
PR		 4377 }
4378
96c9b2e4
VV		 4379 if (crc_match)
4380 continue;
773a2d7c 4381
96c9b2e4
VV		 4382flash:
4383 p = fw->data + filehdr_size + img_offset + img_hdrs_size;
773a2d7c
PR		 4384 if (p + img_size > fw->data + fw->size)
4385 return -1;
4386
70a7b525
VV		 4387 status = be_flash(adapter, p, flash_cmd, flash_optype, img_size,
4388 img_offset);
4389
4390 /* The current FW image on the card does not support OFFSET
4391 * based flashing. Retry using older mechanism of OPTYPE based
4392 * flashing
4393 */
4394 if (base_status(status) == MCC_STATUS_ILLEGAL_FIELD &&
4395 flash_optype == OPTYPE_OFFSET_SPECIFIED) {
4396 flash_offset_support = false;
4397 goto retry_flash;
4398 }
4399
96c9b2e4
VV		 4400 /* For old FW images ignore ILLEGAL_FIELD error or errors on
4401 * UFI_DIR region
4402 */
4c60005f
KA		 4403 if (old_fw_img &&
4404 (base_status(status) == MCC_STATUS_ILLEGAL_FIELD ||
4405 (img_optype == OPTYPE_UFI_DIR &&
4406 base_status(status) == MCC_STATUS_FAILED))) {
96c9b2e4
VV		 4407 continue;
4408 } else if (status) {
4409 dev_err(dev, "Flashing section type 0x%x failed\n",
4410 img_type);
4411 return -EFAULT;
773a2d7c
PR		 4412 }
4413 }
4414 return 0;
3f0d4560
AK		 4415}
4416
485bf569 4417static int lancer_fw_download(struct be_adapter *adapter,
748b539a 4418 const struct firmware *fw)
84517482 4419{
485bf569
SN		 4420#define LANCER_FW_DOWNLOAD_CHUNK (32 * 1024)
4421#define LANCER_FW_DOWNLOAD_LOCATION "/prg"
bb864e07 4422 struct device *dev = &adapter->pdev->dev;
84517482 4423 struct be_dma_mem flash_cmd;
485bf569
SN		 4424 const u8 *data_ptr = NULL;
4425 u8 *dest_image_ptr = NULL;
4426 size_t image_size = 0;
4427 u32 chunk_size = 0;
4428 u32 data_written = 0;
4429 u32 offset = 0;
4430 int status = 0;
4431 u8 add_status = 0;
f67ef7ba 4432 u8 change_status;
84517482 4433
485bf569 4434 if (!IS_ALIGNED(fw->size, sizeof(u32))) {
bb864e07 4435 dev_err(dev, "FW image size should be multiple of 4\n");
3fb8cb80 4436 return -EINVAL;
d9efd2af
SB		 4437 }
4438
485bf569
SN		 4439 flash_cmd.size = sizeof(struct lancer_cmd_req_write_object)
4440 + LANCER_FW_DOWNLOAD_CHUNK;
bb864e07 4441 flash_cmd.va = dma_alloc_coherent(dev, flash_cmd.size,
d0320f75 4442 &flash_cmd.dma, GFP_KERNEL);
3fb8cb80
KA		 4443 if (!flash_cmd.va)
4444 return -ENOMEM;
84517482 4445
485bf569
SN		 4446 dest_image_ptr = flash_cmd.va +
4447 sizeof(struct lancer_cmd_req_write_object);
4448 image_size = fw->size;
4449 data_ptr = fw->data;
4450
4451 while (image_size) {
4452 chunk_size = min_t(u32, image_size, LANCER_FW_DOWNLOAD_CHUNK);
4453
4454 /* Copy the image chunk content. */
4455 memcpy(dest_image_ptr, data_ptr, chunk_size);
4456
4457 status = lancer_cmd_write_object(adapter, &flash_cmd,
f67ef7ba
PR		 4458 chunk_size, offset,
4459 LANCER_FW_DOWNLOAD_LOCATION,
4460 &data_written, &change_status,
4461 &add_status);
485bf569
SN		 4462 if (status)
4463 break;
4464
4465 offset += data_written;
4466 data_ptr += data_written;
4467 image_size -= data_written;
4468 }
4469
4470 if (!status) {
4471 /* Commit the FW written */
4472 status = lancer_cmd_write_object(adapter, &flash_cmd,
f67ef7ba
PR		 4473 0, offset,
4474 LANCER_FW_DOWNLOAD_LOCATION,
4475 &data_written, &change_status,
4476 &add_status);
485bf569
SN		 4477 }
4478
bb864e07 4479 dma_free_coherent(dev, flash_cmd.size, flash_cmd.va, flash_cmd.dma);
485bf569 4480 if (status) {
bb864e07 4481 dev_err(dev, "Firmware load error\n");
3fb8cb80 4482 return be_cmd_status(status);
485bf569
SN		 4483 }
4484
bb864e07
KA		 4485 dev_info(dev, "Firmware flashed successfully\n");
4486
f67ef7ba 4487 if (change_status == LANCER_FW_RESET_NEEDED) {
bb864e07 4488 dev_info(dev, "Resetting adapter to activate new FW\n");
5c510811
SK		 4489 status = lancer_physdev_ctrl(adapter,
4490 PHYSDEV_CONTROL_FW_RESET_MASK);
f67ef7ba 4491 if (status) {
bb864e07
KA		 4492 dev_err(dev, "Adapter busy, could not reset FW\n");
4493 dev_err(dev, "Reboot server to activate new FW\n");
f67ef7ba
PR		 4494 }
4495 } else if (change_status != LANCER_NO_RESET_NEEDED) {
bb864e07 4496 dev_info(dev, "Reboot server to activate new FW\n");
f67ef7ba 4497 }
3fb8cb80
KA		 4498
4499 return 0;
485bf569
SN		 4500}
4501
5d3acd0d
VV		 4502#define BE2_UFI 2
4503#define BE3_UFI 3
4504#define BE3R_UFI 10
4505#define SH_UFI 4
81a9e226 4506#define SH_P2_UFI 11
5d3acd0d 4507
ca34fe38 4508static int be_get_ufi_type(struct be_adapter *adapter,
0ad3157e 4509 struct flash_file_hdr_g3 *fhdr)
773a2d7c 4510{
5d3acd0d
VV		 4511 if (!fhdr) {
4512 dev_err(&adapter->pdev->dev, "Invalid FW UFI file");
4513 return -1;
4514 }
773a2d7c 4515
5d3acd0d
VV		 4516 /* First letter of the build version is used to identify
4517 * which chip this image file is meant for.
4518 */
4519 switch (fhdr->build[0]) {
4520 case BLD_STR_UFI_TYPE_SH:
81a9e226
VV		 4521 return (fhdr->asic_type_rev == ASIC_REV_P2) ? SH_P2_UFI :
4522 SH_UFI;
5d3acd0d
VV		 4523 case BLD_STR_UFI_TYPE_BE3:
4524 return (fhdr->asic_type_rev == ASIC_REV_B0) ? BE3R_UFI :
4525 BE3_UFI;
4526 case BLD_STR_UFI_TYPE_BE2:
4527 return BE2_UFI;
4528 default:
4529 return -1;
4530 }
4531}
773a2d7c 4532
5d3acd0d
VV		 4533/* Check if the flash image file is compatible with the adapter that
4534 * is being flashed.
4535 * BE3 chips with asic-rev B0 must be flashed only with BE3R_UFI type.
81a9e226 4536 * Skyhawk chips with asic-rev P2 must be flashed only with SH_P2_UFI type.
5d3acd0d
VV		 4537 */
4538static bool be_check_ufi_compatibility(struct be_adapter *adapter,
4539 struct flash_file_hdr_g3 *fhdr)
4540{
4541 int ufi_type = be_get_ufi_type(adapter, fhdr);
4542
4543 switch (ufi_type) {
81a9e226 4544 case SH_P2_UFI:
5d3acd0d 4545 return skyhawk_chip(adapter);
81a9e226
VV		 4546 case SH_UFI:
4547 return (skyhawk_chip(adapter) &&
4548 adapter->asic_rev < ASIC_REV_P2);
5d3acd0d
VV		 4549 case BE3R_UFI:
4550 return BE3_chip(adapter);
4551 case BE3_UFI:
4552 return (BE3_chip(adapter) && adapter->asic_rev < ASIC_REV_B0);
4553 case BE2_UFI:
4554 return BE2_chip(adapter);
4555 default:
4556 return false;
4557 }
773a2d7c
PR		 4558}
4559
485bf569
SN		 4560static int be_fw_download(struct be_adapter *adapter, const struct firmware* fw)
4561{
5d3acd0d 4562 struct device *dev = &adapter->pdev->dev;
485bf569 4563 struct flash_file_hdr_g3 *fhdr3;
5d3acd0d
VV		 4564 struct image_hdr *img_hdr_ptr;
4565 int status = 0, i, num_imgs;
485bf569 4566 struct be_dma_mem flash_cmd;
84517482 4567
5d3acd0d
VV		 4568 fhdr3 = (struct flash_file_hdr_g3 *)fw->data;
4569 if (!be_check_ufi_compatibility(adapter, fhdr3)) {
4570 dev_err(dev, "Flash image is not compatible with adapter\n");
4571 return -EINVAL;
84517482
AK		 4572 }
4573
5d3acd0d
VV		 4574 flash_cmd.size = sizeof(struct be_cmd_write_flashrom);
4575 flash_cmd.va = dma_alloc_coherent(dev, flash_cmd.size, &flash_cmd.dma,
4576 GFP_KERNEL);
4577 if (!flash_cmd.va)
4578 return -ENOMEM;
773a2d7c 4579
773a2d7c
PR		 4580 num_imgs = le32_to_cpu(fhdr3->num_imgs);
4581 for (i = 0; i < num_imgs; i++) {
4582 img_hdr_ptr = (struct image_hdr *)(fw->data +
4583 (sizeof(struct flash_file_hdr_g3) +
4584 i * sizeof(struct image_hdr)));
5d3acd0d
VV		 4585 if (!BE2_chip(adapter) &&
4586 le32_to_cpu(img_hdr_ptr->imageid) != 1)
4587 continue;
84517482 4588
5d3acd0d
VV		 4589 if (skyhawk_chip(adapter))
4590 status = be_flash_skyhawk(adapter, fw, &flash_cmd,
4591 num_imgs);
4592 else
4593 status = be_flash_BEx(adapter, fw, &flash_cmd,
4594 num_imgs);
84517482
AK		 4595 }
4596
5d3acd0d
VV		 4597 dma_free_coherent(dev, flash_cmd.size, flash_cmd.va, flash_cmd.dma);
4598 if (!status)
4599 dev_info(dev, "Firmware flashed successfully\n");
84517482 4600
485bf569
SN		 4601 return status;
4602}
4603
4604int be_load_fw(struct be_adapter *adapter, u8 *fw_file)
4605{
4606 const struct firmware *fw;
4607 int status;
4608
4609 if (!netif_running(adapter->netdev)) {
4610 dev_err(&adapter->pdev->dev,
4611 "Firmware load not allowed (interface is down)\n");
940a3fcd 4612 return -ENETDOWN;
485bf569
SN		 4613 }
4614
4615 status = request_firmware(&fw, fw_file, &adapter->pdev->dev);
4616 if (status)
4617 goto fw_exit;
4618
4619 dev_info(&adapter->pdev->dev, "Flashing firmware file %s\n", fw_file);
4620
4621 if (lancer_chip(adapter))
4622 status = lancer_fw_download(adapter, fw);
4623 else
4624 status = be_fw_download(adapter, fw);
4625
eeb65ced 4626 if (!status)
e97e3cda 4627 be_cmd_get_fw_ver(adapter);
eeb65ced 4628
84517482
AK		 4629fw_exit:
4630 release_firmware(fw);
4631 return status;
4632}
4633
add511b3
RP		 4634static int be_ndo_bridge_setlink(struct net_device *dev, struct nlmsghdr *nlh,
4635 u16 flags)
a77dcb8c
AK		 4636{
4637 struct be_adapter *adapter = netdev_priv(dev);
4638 struct nlattr *attr, *br_spec;
4639 int rem;
4640 int status = 0;
4641 u16 mode = 0;
4642
4643 if (!sriov_enabled(adapter))
4644 return -EOPNOTSUPP;
4645
4646 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
4ea85e83
TG		 4647 if (!br_spec)
4648 return -EINVAL;
a77dcb8c
AK		 4649
4650 nla_for_each_nested(attr, br_spec, rem) {
4651 if (nla_type(attr) != IFLA_BRIDGE_MODE)
4652 continue;
4653
b7c1a314
TG		 4654 if (nla_len(attr) < sizeof(mode))
4655 return -EINVAL;
4656
a77dcb8c
AK		 4657 mode = nla_get_u16(attr);
4658 if (mode != BRIDGE_MODE_VEPA && mode != BRIDGE_MODE_VEB)
4659 return -EINVAL;
4660
4661 status = be_cmd_set_hsw_config(adapter, 0, 0,
4662 adapter->if_handle,
4663 mode == BRIDGE_MODE_VEPA ?
4664 PORT_FWD_TYPE_VEPA :
4665 PORT_FWD_TYPE_VEB);
4666 if (status)
4667 goto err;
4668
4669 dev_info(&adapter->pdev->dev, "enabled switch mode: %s\n",
4670 mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
4671
4672 return status;
4673 }
4674err:
4675 dev_err(&adapter->pdev->dev, "Failed to set switch mode %s\n",
4676 mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
4677
4678 return status;
4679}
4680
4681static int be_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
748b539a 4682 struct net_device *dev, u32 filter_mask)
a77dcb8c
AK		 4683{
4684 struct be_adapter *adapter = netdev_priv(dev);
4685 int status = 0;
4686 u8 hsw_mode;
4687
4688 if (!sriov_enabled(adapter))
4689 return 0;
4690
4691 /* BE and Lancer chips support VEB mode only */
4692 if (BEx_chip(adapter) || lancer_chip(adapter)) {
4693 hsw_mode = PORT_FWD_TYPE_VEB;
4694 } else {
4695 status = be_cmd_get_hsw_config(adapter, NULL, 0,
4696 adapter->if_handle, &hsw_mode);
4697 if (status)
4698 return 0;
4699 }
4700
4701 return ndo_dflt_bridge_getlink(skb, pid, seq, dev,
4702 hsw_mode == PORT_FWD_TYPE_VEPA ?
2c3c031c
SF		 4703 BRIDGE_MODE_VEPA : BRIDGE_MODE_VEB,
4704 0, 0);
a77dcb8c
AK		 4705}
4706
c5abe7c0 4707#ifdef CONFIG_BE2NET_VXLAN
630f4b70
SB		 4708/* VxLAN offload Notes:
4709 *
4710 * The stack defines tunnel offload flags (hw_enc_features) for IP and doesn't
4711 * distinguish various types of transports (VxLAN, GRE, NVGRE ..). So, offload
4712 * is expected to work across all types of IP tunnels once exported. Skyhawk
4713 * supports offloads for either VxLAN or NVGRE, exclusively. So we export VxLAN
16dde0d6
SB		 4714 * offloads in hw_enc_features only when a VxLAN port is added. If other (non
4715 * VxLAN) tunnels are configured while VxLAN offloads are enabled, offloads for
4716 * those other tunnels are unexported on the fly through ndo_features_check().
630f4b70
SB		 4717 *
4718 * Skyhawk supports VxLAN offloads only for one UDP dport. So, if the stack
4719 * adds more than one port, disable offloads and don't re-enable them again
4720 * until after all the tunnels are removed.
4721 */
c9c47142
SP		 4722static void be_add_vxlan_port(struct net_device *netdev, sa_family_t sa_family,
4723 __be16 port)
4724{
4725 struct be_adapter *adapter = netdev_priv(netdev);
4726 struct device *dev = &adapter->pdev->dev;
4727 int status;
4728
4729 if (lancer_chip(adapter) || BEx_chip(adapter))
4730 return;
4731
4732 if (adapter->flags & BE_FLAGS_VXLAN_OFFLOADS) {
c9c47142
SP		 4733 dev_info(dev,
4734 "Only one UDP port supported for VxLAN offloads\n");
630f4b70
SB		 4735 dev_info(dev, "Disabling VxLAN offloads\n");
4736 adapter->vxlan_port_count++;
4737 goto err;
c9c47142
SP		 4738 }
4739
630f4b70
SB		 4740 if (adapter->vxlan_port_count++ >= 1)
4741 return;
4742
c9c47142
SP		 4743 status = be_cmd_manage_iface(adapter, adapter->if_handle,
4744 OP_CONVERT_NORMAL_TO_TUNNEL);
4745 if (status) {
4746 dev_warn(dev, "Failed to convert normal interface to tunnel\n");
4747 goto err;
4748 }
4749
4750 status = be_cmd_set_vxlan_port(adapter, port);
4751 if (status) {
4752 dev_warn(dev, "Failed to add VxLAN port\n");
4753 goto err;
4754 }
4755 adapter->flags |= BE_FLAGS_VXLAN_OFFLOADS;
4756 adapter->vxlan_port = port;
4757
630f4b70
SB		 4758 netdev->hw_enc_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
4759 NETIF_F_TSO | NETIF_F_TSO6 |
4760 NETIF_F_GSO_UDP_TUNNEL;
4761 netdev->hw_features |= NETIF_F_GSO_UDP_TUNNEL;
ac9a3d84 4762 netdev->features |= NETIF_F_GSO_UDP_TUNNEL;
630f4b70 4763
c9c47142
SP		 4764 dev_info(dev, "Enabled VxLAN offloads for UDP port %d\n",
4765 be16_to_cpu(port));
4766 return;
4767err:
4768 be_disable_vxlan_offloads(adapter);
c9c47142
SP		 4769}
4770
4771static void be_del_vxlan_port(struct net_device *netdev, sa_family_t sa_family,
4772 __be16 port)
4773{
4774 struct be_adapter *adapter = netdev_priv(netdev);
4775
4776 if (lancer_chip(adapter) || BEx_chip(adapter))
4777 return;
4778
4779 if (adapter->vxlan_port != port)
630f4b70 4780 goto done;
c9c47142
SP		 4781
4782 be_disable_vxlan_offloads(adapter);
4783
4784 dev_info(&adapter->pdev->dev,
4785 "Disabled VxLAN offloads for UDP port %d\n",
4786 be16_to_cpu(port));
630f4b70
SB		 4787done:
4788 adapter->vxlan_port_count--;
c9c47142 4789}
725d548f 4790
5f35227e
JG		 4791static netdev_features_t be_features_check(struct sk_buff *skb,
4792 struct net_device *dev,
4793 netdev_features_t features)
725d548f 4794{
16dde0d6
SB		 4795 struct be_adapter *adapter = netdev_priv(dev);
4796 u8 l4_hdr = 0;
4797
4798 /* The code below restricts offload features for some tunneled packets.
4799 * Offload features for normal (non tunnel) packets are unchanged.
4800 */
4801 if (!skb->encapsulation ||
4802 !(adapter->flags & BE_FLAGS_VXLAN_OFFLOADS))
4803 return features;
4804
4805 /* It's an encapsulated packet and VxLAN offloads are enabled. We
4806 * should disable tunnel offload features if it's not a VxLAN packet,
4807 * as tunnel offloads have been enabled only for VxLAN. This is done to
4808 * allow other tunneled traffic like GRE work fine while VxLAN
4809 * offloads are configured in Skyhawk-R.
4810 */
4811 switch (vlan_get_protocol(skb)) {
4812 case htons(ETH_P_IP):
4813 l4_hdr = ip_hdr(skb)->protocol;
4814 break;
4815 case htons(ETH_P_IPV6):
4816 l4_hdr = ipv6_hdr(skb)->nexthdr;
4817 break;
4818 default:
4819 return features;
4820 }
4821
4822 if (l4_hdr != IPPROTO_UDP ||
4823 skb->inner_protocol_type != ENCAP_TYPE_ETHER ||
4824 skb->inner_protocol != htons(ETH_P_TEB) ||
4825 skb_inner_mac_header(skb) - skb_transport_header(skb) !=
4826 sizeof(struct udphdr) + sizeof(struct vxlanhdr))
4827 return features & ~(NETIF_F_ALL_CSUM | NETIF_F_GSO_MASK);
4828
4829 return features;
725d548f 4830}
c5abe7c0 4831#endif
c9c47142 4832
e5686ad8 4833static const struct net_device_ops be_netdev_ops = {
6b7c5b94
SP		 4834 .ndo_open = be_open,
4835 .ndo_stop = be_close,
4836 .ndo_start_xmit = be_xmit,
a54769f5 4837 .ndo_set_rx_mode = be_set_rx_mode,
6b7c5b94
SP		 4838 .ndo_set_mac_address = be_mac_addr_set,
4839 .ndo_change_mtu = be_change_mtu,
ab1594e9 4840 .ndo_get_stats64 = be_get_stats64,
6b7c5b94 4841 .ndo_validate_addr = eth_validate_addr,
6b7c5b94
SP		 4842 .ndo_vlan_rx_add_vid = be_vlan_add_vid,
4843 .ndo_vlan_rx_kill_vid = be_vlan_rem_vid,
64600ea5 4844 .ndo_set_vf_mac = be_set_vf_mac,
1da87b7f 4845 .ndo_set_vf_vlan = be_set_vf_vlan,
ed616689 4846 .ndo_set_vf_rate = be_set_vf_tx_rate,
66268739 4847 .ndo_get_vf_config = be_get_vf_config,
bdce2ad7 4848 .ndo_set_vf_link_state = be_set_vf_link_state,
66268739
IV		 4849#ifdef CONFIG_NET_POLL_CONTROLLER
4850 .ndo_poll_controller = be_netpoll,
4851#endif
a77dcb8c
AK		 4852 .ndo_bridge_setlink = be_ndo_bridge_setlink,
4853 .ndo_bridge_getlink = be_ndo_bridge_getlink,
6384a4d0 4854#ifdef CONFIG_NET_RX_BUSY_POLL
c9c47142 4855 .ndo_busy_poll = be_busy_poll,
6384a4d0 4856#endif
c5abe7c0 4857#ifdef CONFIG_BE2NET_VXLAN
c9c47142
SP		 4858 .ndo_add_vxlan_port = be_add_vxlan_port,
4859 .ndo_del_vxlan_port = be_del_vxlan_port,
5f35227e 4860 .ndo_features_check = be_features_check,
c5abe7c0 4861#endif
6b7c5b94
SP		 4862};
4863
4864static void be_netdev_init(struct net_device *netdev)
4865{
4866 struct be_adapter *adapter = netdev_priv(netdev);
4867
6332c8d3 4868 netdev->hw_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6 |
8b8ddc68 4869 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM |
f646968f 4870 NETIF_F_HW_VLAN_CTAG_TX;
8b8ddc68
MM		 4871 if (be_multi_rxq(adapter))
4872 netdev->hw_features |= NETIF_F_RXHASH;
6332c8d3
MM		 4873
4874 netdev->features |= netdev->hw_features |
f646968f 4875 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_FILTER;
4b972914 4876
eb8a50d9 4877 netdev->vlan_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6 |
79032644 4878 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
51c59870 4879
fbc13f01
AK		 4880 netdev->priv_flags |= IFF_UNICAST_FLT;
4881
6b7c5b94
SP		 4882 netdev->flags |= IFF_MULTICAST;
4883
b7e5887e 4884 netif_set_gso_max_size(netdev, 65535 - ETH_HLEN);
c190e3c8 4885
10ef9ab4 4886 netdev->netdev_ops = &be_netdev_ops;
6b7c5b94 4887
7ad24ea4 4888 netdev->ethtool_ops = &be_ethtool_ops;
6b7c5b94
SP		 4889}
4890
78fad34e
SP		 4891static int lancer_recover_func(struct be_adapter *adapter)
4892{
4893 struct device *dev = &adapter->pdev->dev;
4894 int status;
4895
4896 status = lancer_test_and_set_rdy_state(adapter);
4897 if (status)
4898 goto err;
4899
4900 if (netif_running(adapter->netdev))
4901 be_close(adapter->netdev);
4902
4903 be_clear(adapter);
4904
4905 be_clear_all_error(adapter);
4906
4907 status = be_setup(adapter);
4908 if (status)
4909 goto err;
4910
4911 if (netif_running(adapter->netdev)) {
4912 status = be_open(adapter->netdev);
4913 if (status)
4914 goto err;
4915 }
4916
4917 dev_err(dev, "Adapter recovery successful\n");
4918 return 0;
4919err:
4920 if (status == -EAGAIN)
4921 dev_err(dev, "Waiting for resource provisioning\n");
4922 else
4923 dev_err(dev, "Adapter recovery failed\n");
4924
4925 return status;
4926}
4927
4928static void be_func_recovery_task(struct work_struct *work)
4929{
4930 struct be_adapter *adapter =
4931 container_of(work, struct be_adapter, func_recovery_work.work);
4932 int status = 0;
4933
4934 be_detect_error(adapter);
4935
4936 if (adapter->hw_error && lancer_chip(adapter)) {
4937 rtnl_lock();
4938 netif_device_detach(adapter->netdev);
4939 rtnl_unlock();
4940
4941 status = lancer_recover_func(adapter);
4942 if (!status)
4943 netif_device_attach(adapter->netdev);
4944 }
4945
4946 /* In Lancer, for all errors other than provisioning error (-EAGAIN),
4947 * no need to attempt further recovery.
4948 */
4949 if (!status || status == -EAGAIN)
4950 schedule_delayed_work(&adapter->func_recovery_work,
4951 msecs_to_jiffies(1000));
4952}
4953
4954static void be_log_sfp_info(struct be_adapter *adapter)
4955{
4956 int status;
4957
4958 status = be_cmd_query_sfp_info(adapter);
4959 if (!status) {
4960 dev_err(&adapter->pdev->dev,
4961 "Unqualified SFP+ detected on %c from %s part no: %s",
4962 adapter->port_name, adapter->phy.vendor_name,
4963 adapter->phy.vendor_pn);
4964 }
4965 adapter->flags &= ~BE_FLAGS_EVT_INCOMPATIBLE_SFP;
4966}
4967
4968static void be_worker(struct work_struct *work)
4969{
4970 struct be_adapter *adapter =
4971 container_of(work, struct be_adapter, work.work);
4972 struct be_rx_obj *rxo;
4973 int i;
4974
4975 /* when interrupts are not yet enabled, just reap any pending
4976 * mcc completions
4977 */
4978 if (!netif_running(adapter->netdev)) {
4979 local_bh_disable();
4980 be_process_mcc(adapter);
4981 local_bh_enable();
4982 goto reschedule;
4983 }
4984
4985 if (!adapter->stats_cmd_sent) {
4986 if (lancer_chip(adapter))
4987 lancer_cmd_get_pport_stats(adapter,
4988 &adapter->stats_cmd);
4989 else
4990 be_cmd_get_stats(adapter, &adapter->stats_cmd);
4991 }
4992
4993 if (be_physfn(adapter) &&
4994 MODULO(adapter->work_counter, adapter->be_get_temp_freq) == 0)
4995 be_cmd_get_die_temperature(adapter);
4996
4997 for_all_rx_queues(adapter, rxo, i) {
4998 /* Replenish RX-queues starved due to memory
4999 * allocation failures.
5000 */
5001 if (rxo->rx_post_starved)
5002 be_post_rx_frags(rxo, GFP_KERNEL, MAX_RX_POST);
5003 }
5004
5005 be_eqd_update(adapter);
5006
5007 if (adapter->flags & BE_FLAGS_EVT_INCOMPATIBLE_SFP)
5008 be_log_sfp_info(adapter);
5009
5010reschedule:
5011 adapter->work_counter++;
5012 schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
5013}
5014
6b7c5b94
SP		 5015static void be_unmap_pci_bars(struct be_adapter *adapter)
5016{
c5b3ad4c
SP		 5017 if (adapter->csr)
5018 pci_iounmap(adapter->pdev, adapter->csr);
8788fdc2 5019 if (adapter->db)
ce66f781 5020 pci_iounmap(adapter->pdev, adapter->db);
045508a8
PP		 5021}
5022
ce66f781
SP		 5023static int db_bar(struct be_adapter *adapter)
5024{
5025 if (lancer_chip(adapter) || !be_physfn(adapter))
5026 return 0;
5027 else
5028 return 4;
5029}
5030
5031static int be_roce_map_pci_bars(struct be_adapter *adapter)
045508a8 5032{
dbf0f2a7 5033 if (skyhawk_chip(adapter)) {
ce66f781
SP		 5034 adapter->roce_db.size = 4096;
5035 adapter->roce_db.io_addr = pci_resource_start(adapter->pdev,
5036 db_bar(adapter));
5037 adapter->roce_db.total_size = pci_resource_len(adapter->pdev,
5038 db_bar(adapter));
5039 }
045508a8 5040 return 0;
6b7c5b94
SP		 5041}
5042
5043static int be_map_pci_bars(struct be_adapter *adapter)
5044{
5045 u8 __iomem *addr;
78fad34e
SP		 5046 u32 sli_intf;
5047
5048 pci_read_config_dword(adapter->pdev, SLI_INTF_REG_OFFSET, &sli_intf);
5049 adapter->sli_family = (sli_intf & SLI_INTF_FAMILY_MASK) >>
5050 SLI_INTF_FAMILY_SHIFT;
5051 adapter->virtfn = (sli_intf & SLI_INTF_FT_MASK) ? 1 : 0;
fe6d2a38 5052
c5b3ad4c
SP		 5053 if (BEx_chip(adapter) && be_physfn(adapter)) {
5054 adapter->csr = pci_iomap(adapter->pdev, 2, 0);
ddf1169f 5055 if (!adapter->csr)
c5b3ad4c
SP		 5056 return -ENOMEM;
5057 }
5058
ce66f781 5059 addr = pci_iomap(adapter->pdev, db_bar(adapter), 0);
ddf1169f 5060 if (!addr)
6b7c5b94 5061 goto pci_map_err;
ba343c77 5062 adapter->db = addr;
ce66f781
SP		 5063
5064 be_roce_map_pci_bars(adapter);
6b7c5b94 5065 return 0;
ce66f781 5066
6b7c5b94 5067pci_map_err:
acbafeb1 5068 dev_err(&adapter->pdev->dev, "Error in mapping PCI BARs\n");
6b7c5b94
SP		 5069 be_unmap_pci_bars(adapter);
5070 return -ENOMEM;
5071}
5072
78fad34e 5073static void be_drv_cleanup(struct be_adapter *adapter)
6b7c5b94 5074{
8788fdc2 5075 struct be_dma_mem *mem = &adapter->mbox_mem_alloced;
78fad34e 5076 struct device *dev = &adapter->pdev->dev;
6b7c5b94
SP		 5077
5078 if (mem->va)
78fad34e 5079 dma_free_coherent(dev, mem->size, mem->va, mem->dma);
e7b909a6 5080
5b8821b7 5081 mem = &adapter->rx_filter;
e7b909a6 5082 if (mem->va)
78fad34e
SP		 5083 dma_free_coherent(dev, mem->size, mem->va, mem->dma);
5084
5085 mem = &adapter->stats_cmd;
5086 if (mem->va)
5087 dma_free_coherent(dev, mem->size, mem->va, mem->dma);
6b7c5b94
SP		 5088}
5089
78fad34e
SP		 5090/* Allocate and initialize various fields in be_adapter struct */
5091static int be_drv_init(struct be_adapter *adapter)
6b7c5b94 5092{
8788fdc2
SP		 5093 struct be_dma_mem *mbox_mem_alloc = &adapter->mbox_mem_alloced;
5094 struct be_dma_mem *mbox_mem_align = &adapter->mbox_mem;
5b8821b7 5095 struct be_dma_mem *rx_filter = &adapter->rx_filter;
78fad34e
SP		 5096 struct be_dma_mem *stats_cmd = &adapter->stats_cmd;
5097 struct device *dev = &adapter->pdev->dev;
5098 int status = 0;
6b7c5b94
SP		 5099
5100 mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
78fad34e 5101 mbox_mem_alloc->va = dma_alloc_coherent(dev, mbox_mem_alloc->size,
2b7bcebf
IV		 5102 &mbox_mem_alloc->dma,
5103 GFP_KERNEL);
78fad34e
SP		 5104 if (!mbox_mem_alloc->va)
5105 return -ENOMEM;
5106
6b7c5b94
SP		 5107 mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
5108 mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
5109 mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
5110 memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
e7b909a6 5111
5b8821b7 5112 rx_filter->size = sizeof(struct be_cmd_req_rx_filter);
78fad34e
SP		 5113 rx_filter->va = dma_zalloc_coherent(dev, rx_filter->size,
5114 &rx_filter->dma, GFP_KERNEL);
ddf1169f 5115 if (!rx_filter->va) {
e7b909a6
SP		 5116 status = -ENOMEM;
5117 goto free_mbox;
5118 }
1f9061d2 5119
78fad34e
SP		 5120 if (lancer_chip(adapter))
5121 stats_cmd->size = sizeof(struct lancer_cmd_req_pport_stats);
5122 else if (BE2_chip(adapter))
5123 stats_cmd->size = sizeof(struct be_cmd_req_get_stats_v0);
5124 else if (BE3_chip(adapter))
5125 stats_cmd->size = sizeof(struct be_cmd_req_get_stats_v1);
5126 else
5127 stats_cmd->size = sizeof(struct be_cmd_req_get_stats_v2);
5128 stats_cmd->va = dma_zalloc_coherent(dev, stats_cmd->size,
5129 &stats_cmd->dma, GFP_KERNEL);
5130 if (!stats_cmd->va) {
5131 status = -ENOMEM;
5132 goto free_rx_filter;
5133 }
5134
2984961c 5135 mutex_init(&adapter->mbox_lock);
8788fdc2
SP		 5136 spin_lock_init(&adapter->mcc_lock);
5137 spin_lock_init(&adapter->mcc_cq_lock);
5eeff635 5138 init_completion(&adapter->et_cmd_compl);
e7b909a6 5139
78fad34e 5140 pci_save_state(adapter->pdev);
6b7c5b94 5141
78fad34e
SP		 5142 INIT_DELAYED_WORK(&adapter->work, be_worker);
5143 INIT_DELAYED_WORK(&adapter->func_recovery_work, be_func_recovery_task);
6b7c5b94 5144
78fad34e
SP		 5145 adapter->rx_fc = true;
5146 adapter->tx_fc = true;
6b7c5b94 5147
78fad34e
SP		 5148 /* Must be a power of 2 or else MODULO will BUG_ON */
5149 adapter->be_get_temp_freq = 64;
5150 adapter->cfg_num_qs = netif_get_num_default_rss_queues();
ca34fe38 5151
6b7c5b94 5152 return 0;
78fad34e
SP		 5153
5154free_rx_filter:
5155 dma_free_coherent(dev, rx_filter->size, rx_filter->va, rx_filter->dma);
5156free_mbox:
5157 dma_free_coherent(dev, mbox_mem_alloc->size, mbox_mem_alloc->va,
5158 mbox_mem_alloc->dma);
5159 return status;
6b7c5b94
SP		 5160}
5161
3bc6b06c 5162static void be_remove(struct pci_dev *pdev)
6b7c5b94
SP		 5163{
5164 struct be_adapter *adapter = pci_get_drvdata(pdev);
8d56ff11 5165
6b7c5b94
SP		 5166 if (!adapter)
5167 return;
5168
045508a8 5169 be_roce_dev_remove(adapter);
8cef7a78 5170 be_intr_set(adapter, false);
045508a8 5171
f67ef7ba
PR		 5172 cancel_delayed_work_sync(&adapter->func_recovery_work);
5173
6b7c5b94
SP		 5174 unregister_netdev(adapter->netdev);
5175
5fb379ee
SP		 5176 be_clear(adapter);
5177
bf99e50d
PR		 5178 /* tell fw we're done with firing cmds */
5179 be_cmd_fw_clean(adapter);
5180
78fad34e
SP		 5181 be_unmap_pci_bars(adapter);
5182 be_drv_cleanup(adapter);
6b7c5b94 5183
d6b6d987
SP		 5184 pci_disable_pcie_error_reporting(pdev);
5185
6b7c5b94
SP		 5186 pci_release_regions(pdev);
5187 pci_disable_device(pdev);
5188
5189 free_netdev(adapter->netdev);
5190}
5191
257a3feb 5192/* If any VFs are already enabled don't FLR the PF */
39f1d94d
SP		 5193static bool be_reset_required(struct be_adapter *adapter)
5194{
257a3feb 5195 return pci_num_vf(adapter->pdev) ? false : true;
39f1d94d
SP		 5196}
5197
d379142b
SP		 5198static char *mc_name(struct be_adapter *adapter)
5199{
f93f160b
VV		 5200 char *str = ""; /* default */
5201
5202 switch (adapter->mc_type) {
5203 case UMC:
5204 str = "UMC";
5205 break;
5206 case FLEX10:
5207 str = "FLEX10";
5208 break;
5209 case vNIC1:
5210 str = "vNIC-1";
5211 break;
5212 case nPAR:
5213 str = "nPAR";
5214 break;
5215 case UFP:
5216 str = "UFP";
5217 break;
5218 case vNIC2:
5219 str = "vNIC-2";
5220 break;
5221 default:
5222 str = "";
5223 }
5224
5225 return str;
d379142b
SP		 5226}
5227
5228static inline char *func_name(struct be_adapter *adapter)
5229{
5230 return be_physfn(adapter) ? "PF" : "VF";
5231}
5232
f7062ee5
SP		 5233static inline char *nic_name(struct pci_dev *pdev)
5234{
5235 switch (pdev->device) {
5236 case OC_DEVICE_ID1:
5237 return OC_NAME;
5238 case OC_DEVICE_ID2:
5239 return OC_NAME_BE;
5240 case OC_DEVICE_ID3:
5241 case OC_DEVICE_ID4:
5242 return OC_NAME_LANCER;
5243 case BE_DEVICE_ID2:
5244 return BE3_NAME;
5245 case OC_DEVICE_ID5:
5246 case OC_DEVICE_ID6:
5247 return OC_NAME_SH;
5248 default:
5249 return BE_NAME;
5250 }
5251}
5252
ca3de6b2
SP		 5253/* Wait for the FW to be ready and perform the required initialization */
5254static int be_func_init(struct be_adapter *adapter)
5255{
5256 int status;
5257
5258 status = be_fw_wait_ready(adapter);
5259 if (status)
5260 return status;
5261
5262 if (be_reset_required(adapter)) {
5263 status = be_cmd_reset_function(adapter);
5264 if (status)
5265 return status;
5266
5267 /* Wait for interrupts to quiesce after an FLR */
5268 msleep(100);
5269 }
5270
5271 /* Tell FW we're ready to fire cmds */
5272 status = be_cmd_fw_init(adapter);
5273 if (status)
5274 return status;
5275
5276 /* Allow interrupts for other ULPs running on NIC function */
5277 be_intr_set(adapter, true);
5278
5279 return 0;
5280}
5281
1dd06ae8 5282static int be_probe(struct pci_dev *pdev, const struct pci_device_id *pdev_id)
6b7c5b94 5283{
6b7c5b94
SP		 5284 struct be_adapter *adapter;
5285 struct net_device *netdev;
21252377 5286 int status = 0;
6b7c5b94 5287
acbafeb1
SP		 5288 dev_info(&pdev->dev, "%s version is %s\n", DRV_NAME, DRV_VER);
5289
6b7c5b94
SP		 5290 status = pci_enable_device(pdev);
5291 if (status)
5292 goto do_none;
5293
5294 status = pci_request_regions(pdev, DRV_NAME);
5295 if (status)
5296 goto disable_dev;
5297 pci_set_master(pdev);
5298
7f640062 5299 netdev = alloc_etherdev_mqs(sizeof(*adapter), MAX_TX_QS, MAX_RX_QS);
ddf1169f 5300 if (!netdev) {
6b7c5b94
SP		 5301 status = -ENOMEM;
5302 goto rel_reg;
5303 }
5304 adapter = netdev_priv(netdev);
5305 adapter->pdev = pdev;
5306 pci_set_drvdata(pdev, adapter);
5307 adapter->netdev = netdev;
2243e2e9 5308 SET_NETDEV_DEV(netdev, &pdev->dev);
6b7c5b94 5309
4c15c243 5310 status = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
6b7c5b94
SP		 5311 if (!status) {
5312 netdev->features |= NETIF_F_HIGHDMA;
5313 } else {
4c15c243 5314 status = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
6b7c5b94
SP		 5315 if (status) {
5316 dev_err(&pdev->dev, "Could not set PCI DMA Mask\n");
5317 goto free_netdev;
5318 }
5319 }
5320
2f951a9a
KA		 5321 status = pci_enable_pcie_error_reporting(pdev);
5322 if (!status)
5323 dev_info(&pdev->dev, "PCIe error reporting enabled\n");
d6b6d987 5324
78fad34e 5325 status = be_map_pci_bars(adapter);
6b7c5b94 5326 if (status)
39f1d94d 5327 goto free_netdev;
6b7c5b94 5328
78fad34e
SP		 5329 status = be_drv_init(adapter);
5330 if (status)
5331 goto unmap_bars;
5332
ca3de6b2 5333 status = be_func_init(adapter);
2d177be8 5334 if (status)
78fad34e 5335 goto drv_cleanup;
2243e2e9 5336
5fb379ee
SP		 5337 status = be_setup(adapter);
5338 if (status)
78fad34e 5339 goto drv_cleanup;
2243e2e9 5340
3abcdeda 5341 be_netdev_init(netdev);
6b7c5b94
SP		 5342 status = register_netdev(netdev);
5343 if (status != 0)
5fb379ee 5344 goto unsetup;
6b7c5b94 5345
045508a8
PP		 5346 be_roce_dev_add(adapter);
5347
f67ef7ba
PR		 5348 schedule_delayed_work(&adapter->func_recovery_work,
5349 msecs_to_jiffies(1000));
b4e32a71 5350
d379142b 5351 dev_info(&pdev->dev, "%s: %s %s port %c\n", nic_name(pdev),
21252377 5352 func_name(adapter), mc_name(adapter), adapter->port_name);
34b1ef04 5353
6b7c5b94
SP		 5354 return 0;
5355
5fb379ee
SP		 5356unsetup:
5357 be_clear(adapter);
78fad34e
SP		 5358drv_cleanup:
5359 be_drv_cleanup(adapter);
5360unmap_bars:
5361 be_unmap_pci_bars(adapter);
f9449ab7 5362free_netdev:
fe6d2a38 5363 free_netdev(netdev);
6b7c5b94
SP		 5364rel_reg:
5365 pci_release_regions(pdev);
5366disable_dev:
5367 pci_disable_device(pdev);
5368do_none:
c4ca2374 5369 dev_err(&pdev->dev, "%s initialization failed\n", nic_name(pdev));
6b7c5b94
SP		 5370 return status;
5371}
5372
5373static int be_suspend(struct pci_dev *pdev, pm_message_t state)
5374{
5375 struct be_adapter *adapter = pci_get_drvdata(pdev);
5376 struct net_device *netdev = adapter->netdev;
5377
76a9e08e 5378 if (adapter->wol_en)
71d8d1b5
AK		 5379 be_setup_wol(adapter, true);
5380
d4360d6f 5381 be_intr_set(adapter, false);
f67ef7ba
PR		 5382 cancel_delayed_work_sync(&adapter->func_recovery_work);
5383
6b7c5b94
SP		 5384 netif_device_detach(netdev);
5385 if (netif_running(netdev)) {
5386 rtnl_lock();
5387 be_close(netdev);
5388 rtnl_unlock();
5389 }
9b0365f1 5390 be_clear(adapter);
6b7c5b94
SP		 5391
5392 pci_save_state(pdev);
5393 pci_disable_device(pdev);
5394 pci_set_power_state(pdev, pci_choose_state(pdev, state));
5395 return 0;
5396}
5397
5398static int be_resume(struct pci_dev *pdev)
5399{
5400 int status = 0;
5401 struct be_adapter *adapter = pci_get_drvdata(pdev);
5402 struct net_device *netdev = adapter->netdev;
5403
5404 netif_device_detach(netdev);
5405
5406 status = pci_enable_device(pdev);
5407 if (status)
5408 return status;
5409
1ca01512 5410 pci_set_power_state(pdev, PCI_D0);
6b7c5b94
SP		 5411 pci_restore_state(pdev);
5412
ca3de6b2 5413 status = be_func_init(adapter);
2243e2e9
SP		 5414 if (status)
5415 return status;
5416
9b0365f1 5417 be_setup(adapter);
6b7c5b94
SP		 5418 if (netif_running(netdev)) {
5419 rtnl_lock();
5420 be_open(netdev);
5421 rtnl_unlock();
5422 }
f67ef7ba
PR		 5423
5424 schedule_delayed_work(&adapter->func_recovery_work,
5425 msecs_to_jiffies(1000));
6b7c5b94 5426 netif_device_attach(netdev);
71d8d1b5 5427
76a9e08e 5428 if (adapter->wol_en)
71d8d1b5 5429 be_setup_wol(adapter, false);
a4ca055f 5430
6b7c5b94
SP		 5431 return 0;
5432}
5433
82456b03
SP		 5434/*
5435 * An FLR will stop BE from DMAing any data.
5436 */
5437static void be_shutdown(struct pci_dev *pdev)
5438{
5439 struct be_adapter *adapter = pci_get_drvdata(pdev);
82456b03 5440
2d5d4154
AK		 5441 if (!adapter)
5442 return;
82456b03 5443
d114f99a 5444 be_roce_dev_shutdown(adapter);
0f4a6828 5445 cancel_delayed_work_sync(&adapter->work);
f67ef7ba 5446 cancel_delayed_work_sync(&adapter->func_recovery_work);
a4ca055f 5447
2d5d4154 5448 netif_device_detach(adapter->netdev);
82456b03 5449
57841869
AK		 5450 be_cmd_reset_function(adapter);
5451
82456b03 5452 pci_disable_device(pdev);
82456b03
SP		 5453}
5454
cf588477 5455static pci_ers_result_t be_eeh_err_detected(struct pci_dev *pdev,
748b539a 5456 pci_channel_state_t state)
cf588477
SP		 5457{
5458 struct be_adapter *adapter = pci_get_drvdata(pdev);
5459 struct net_device *netdev = adapter->netdev;
5460
5461 dev_err(&adapter->pdev->dev, "EEH error detected\n");
5462
01e5b2c4
SK		 5463 if (!adapter->eeh_error) {
5464 adapter->eeh_error = true;
cf588477 5465
01e5b2c4 5466 cancel_delayed_work_sync(&adapter->func_recovery_work);
cf588477 5467
cf588477 5468 rtnl_lock();
01e5b2c4
SK		 5469 netif_device_detach(netdev);
5470 if (netif_running(netdev))
5471 be_close(netdev);
cf588477 5472 rtnl_unlock();
01e5b2c4
SK		 5473
5474 be_clear(adapter);
cf588477 5475 }
cf588477
SP		 5476
5477 if (state == pci_channel_io_perm_failure)
5478 return PCI_ERS_RESULT_DISCONNECT;
5479
5480 pci_disable_device(pdev);
5481
eeb7fc7b
SK		 5482 /* The error could cause the FW to trigger a flash debug dump.
5483 * Resetting the card while flash dump is in progress
c8a54163
PR		 5484 * can cause it not to recover; wait for it to finish.
5485 * Wait only for first function as it is needed only once per
5486 * adapter.
eeb7fc7b 5487 */
c8a54163
PR		 5488 if (pdev->devfn == 0)
5489 ssleep(30);
5490
cf588477
SP		 5491 return PCI_ERS_RESULT_NEED_RESET;
5492}
5493
5494static pci_ers_result_t be_eeh_reset(struct pci_dev *pdev)
5495{
5496 struct be_adapter *adapter = pci_get_drvdata(pdev);
5497 int status;
5498
5499 dev_info(&adapter->pdev->dev, "EEH reset\n");
cf588477
SP		 5500
5501 status = pci_enable_device(pdev);
5502 if (status)
5503 return PCI_ERS_RESULT_DISCONNECT;
5504
5505 pci_set_master(pdev);
1ca01512 5506 pci_set_power_state(pdev, PCI_D0);
cf588477
SP		 5507 pci_restore_state(pdev);
5508
5509 /* Check if card is ok and fw is ready */
c5b3ad4c
SP		 5510 dev_info(&adapter->pdev->dev,
5511 "Waiting for FW to be ready after EEH reset\n");
bf99e50d 5512 status = be_fw_wait_ready(adapter);
cf588477
SP		 5513 if (status)
5514 return PCI_ERS_RESULT_DISCONNECT;
5515
d6b6d987 5516 pci_cleanup_aer_uncorrect_error_status(pdev);
01e5b2c4 5517 be_clear_all_error(adapter);
cf588477
SP		 5518 return PCI_ERS_RESULT_RECOVERED;
5519}
5520
5521static void be_eeh_resume(struct pci_dev *pdev)
5522{
5523 int status = 0;
5524 struct be_adapter *adapter = pci_get_drvdata(pdev);
5525 struct net_device *netdev = adapter->netdev;
5526
5527 dev_info(&adapter->pdev->dev, "EEH resume\n");
5528
5529 pci_save_state(pdev);
5530
ca3de6b2 5531 status = be_func_init(adapter);
bf99e50d
PR		 5532 if (status)
5533 goto err;
5534
cf588477
SP		 5535 status = be_setup(adapter);
5536 if (status)
5537 goto err;
5538
5539 if (netif_running(netdev)) {
5540 status = be_open(netdev);
5541 if (status)
5542 goto err;
5543 }
f67ef7ba
PR		 5544
5545 schedule_delayed_work(&adapter->func_recovery_work,
5546 msecs_to_jiffies(1000));
cf588477
SP		 5547 netif_device_attach(netdev);
5548 return;
5549err:
5550 dev_err(&adapter->pdev->dev, "EEH resume failed\n");
cf588477
SP		 5551}
5552
3646f0e5 5553static const struct pci_error_handlers be_eeh_handlers = {
cf588477
SP		 5554 .error_detected = be_eeh_err_detected,
5555 .slot_reset = be_eeh_reset,
5556 .resume = be_eeh_resume,
5557};
5558
6b7c5b94
SP		 5559static struct pci_driver be_driver = {
5560 .name = DRV_NAME,
5561 .id_table = be_dev_ids,
5562 .probe = be_probe,
5563 .remove = be_remove,
5564 .suspend = be_suspend,
cf588477 5565 .resume = be_resume,
82456b03 5566 .shutdown = be_shutdown,
cf588477 5567 .err_handler = &be_eeh_handlers
6b7c5b94
SP		 5568};
5569
5570static int __init be_init_module(void)
5571{
8e95a202
JP		 5572 if (rx_frag_size != 8192 && rx_frag_size != 4096 &&
5573 rx_frag_size != 2048) {
6b7c5b94
SP		 5574 printk(KERN_WARNING DRV_NAME
5575 " : Module param rx_frag_size must be 2048/4096/8192."
5576 " Using 2048\n");
5577 rx_frag_size = 2048;
5578 }
6b7c5b94
SP		 5579
5580 return pci_register_driver(&be_driver);
5581}
5582module_init(be_init_module);
5583
5584static void __exit be_exit_module(void)
5585{
5586 pci_unregister_driver(&be_driver);
5587}
5588module_exit(be_exit_module);
Ubuntu Jammy Linux kernel mirror