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ethtool: fix drvinfo strings set in drivers
[mirror_ubuntu-bionic-kernel.git] / drivers / net / ethernet / freescale / gianfar_ethtool.c
CommitLineData
1da177e4 1/*
3396c782 2 * drivers/net/ethernet/freescale/gianfar_ethtool.c
1da177e4
LT		 3 *
4 * Gianfar Ethernet Driver
5 * Ethtool support for Gianfar Enet
6 * Based on e1000 ethtool support
7 *
8 * Author: Andy Fleming
4c8d3d99 9 * Maintainer: Kumar Gala
a12f801d 10 * Modifier: Sandeep Gopalpet <sandeep.kumar@freescale.com>
1da177e4 11 *
6c43e046 12 * Copyright 2003-2006, 2008-2009, 2011 Freescale Semiconductor, Inc.
1da177e4 13 *
6aa20a22
JG		 14 * This software may be used and distributed according to
15 * the terms of the GNU Public License, Version 2, incorporated herein
1da177e4
LT		 16 * by reference.
17 */
18
59deab26
JP		 19#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
20
1da177e4 21#include <linux/kernel.h>
1da177e4
LT		 22#include <linux/string.h>
23#include <linux/errno.h>
1da177e4
LT		 24#include <linux/interrupt.h>
25#include <linux/init.h>
26#include <linux/delay.h>
27#include <linux/netdevice.h>
28#include <linux/etherdevice.h>
65a85a8d 29#include <linux/net_tstamp.h>
1da177e4
LT		 30#include <linux/skbuff.h>
31#include <linux/spinlock.h>
32#include <linux/mm.h>
33
34#include <asm/io.h>
35#include <asm/irq.h>
36#include <asm/uaccess.h>
37#include <linux/module.h>
1da177e4
LT		 38#include <linux/crc32.h>
39#include <asm/types.h>
1da177e4 40#include <linux/ethtool.h>
bb40dcbb
AF		 41#include <linux/mii.h>
42#include <linux/phy.h>
4aa3a715 43#include <linux/sort.h>
380b153c 44#include <linux/if_vlan.h>
1da177e4
LT		 45
46#include "gianfar.h"
47
0bbaf069 48extern void gfar_start(struct net_device *dev);
cbfc6071
JC		 49extern int gfar_clean_rx_ring(struct gfar_priv_rx_q *rx_queue,
50 int rx_work_limit);
1da177e4 51
bb40dcbb
AF		 52#define GFAR_MAX_COAL_USECS 0xffff
53#define GFAR_MAX_COAL_FRAMES 0xff
0bbaf069 54static void gfar_fill_stats(struct net_device *dev, struct ethtool_stats *dummy,
cbfc6071 55 u64 *buf);
0bbaf069 56static void gfar_gstrings(struct net_device *dev, u32 stringset, u8 * buf);
cbfc6071
JC		 57static int gfar_gcoalesce(struct net_device *dev,
58 struct ethtool_coalesce *cvals);
59static int gfar_scoalesce(struct net_device *dev,
60 struct ethtool_coalesce *cvals);
61static void gfar_gringparam(struct net_device *dev,
62 struct ethtool_ringparam *rvals);
63static int gfar_sringparam(struct net_device *dev,
64 struct ethtool_ringparam *rvals);
65static void gfar_gdrvinfo(struct net_device *dev,
66 struct ethtool_drvinfo *drvinfo);
1da177e4 67
30f7e310 68static const char stat_gstrings[][ETH_GSTRING_LEN] = {
1da177e4
LT		 69 "rx-dropped-by-kernel",
70 "rx-large-frame-errors",
71 "rx-short-frame-errors",
72 "rx-non-octet-errors",
73 "rx-crc-errors",
74 "rx-overrun-errors",
75 "rx-busy-errors",
76 "rx-babbling-errors",
77 "rx-truncated-frames",
78 "ethernet-bus-error",
79 "tx-babbling-errors",
80 "tx-underrun-errors",
81 "rx-skb-missing-errors",
82 "tx-timeout-errors",
83 "tx-rx-64-frames",
84 "tx-rx-65-127-frames",
85 "tx-rx-128-255-frames",
86 "tx-rx-256-511-frames",
87 "tx-rx-512-1023-frames",
88 "tx-rx-1024-1518-frames",
89 "tx-rx-1519-1522-good-vlan",
90 "rx-bytes",
91 "rx-packets",
92 "rx-fcs-errors",
93 "receive-multicast-packet",
94 "receive-broadcast-packet",
95 "rx-control-frame-packets",
96 "rx-pause-frame-packets",
97 "rx-unknown-op-code",
98 "rx-alignment-error",
99 "rx-frame-length-error",
100 "rx-code-error",
101 "rx-carrier-sense-error",
102 "rx-undersize-packets",
103 "rx-oversize-packets",
104 "rx-fragmented-frames",
105 "rx-jabber-frames",
106 "rx-dropped-frames",
107 "tx-byte-counter",
108 "tx-packets",
109 "tx-multicast-packets",
110 "tx-broadcast-packets",
111 "tx-pause-control-frames",
112 "tx-deferral-packets",
113 "tx-excessive-deferral-packets",
114 "tx-single-collision-packets",
115 "tx-multiple-collision-packets",
116 "tx-late-collision-packets",
117 "tx-excessive-collision-packets",
118 "tx-total-collision",
119 "reserved",
120 "tx-dropped-frames",
121 "tx-jabber-frames",
122 "tx-fcs-errors",
123 "tx-control-frames",
124 "tx-oversize-frames",
125 "tx-undersize-frames",
126 "tx-fragmented-frames",
127};
128
0bbaf069
KG		 129/* Fill in a buffer with the strings which correspond to the
130 * stats */
131static void gfar_gstrings(struct net_device *dev, u32 stringset, u8 * buf)
132{
133 struct gfar_private *priv = netdev_priv(dev);
7f7f5316 134
b31a1d8b 135 if (priv->device_flags & FSL_GIANFAR_DEV_HAS_RMON)
0bbaf069
KG		 136 memcpy(buf, stat_gstrings, GFAR_STATS_LEN * ETH_GSTRING_LEN);
137 else
138 memcpy(buf, stat_gstrings,
cbfc6071 139 GFAR_EXTRA_STATS_LEN * ETH_GSTRING_LEN);
0bbaf069
KG		 140}
141
1da177e4
LT		 142/* Fill in an array of 64-bit statistics from various sources.
143 * This array will be appended to the end of the ethtool_stats
144 * structure, and returned to user space
145 */
cbfc6071
JC		 146static void gfar_fill_stats(struct net_device *dev, struct ethtool_stats *dummy,
147 u64 *buf)
1da177e4
LT		 148{
149 int i;
150 struct gfar_private *priv = netdev_priv(dev);
46ceb60c 151 struct gfar __iomem *regs = priv->gfargrp[0].regs;
1da177e4 152 u64 *extra = (u64 *) & priv->extra_stats;
1da177e4 153
b31a1d8b 154 if (priv->device_flags & FSL_GIANFAR_DEV_HAS_RMON) {
f4983704 155 u32 __iomem *rmon = (u32 __iomem *) &regs->rmon;
0bbaf069 156 struct gfar_stats *stats = (struct gfar_stats *) buf;
1da177e4 157
0bbaf069 158 for (i = 0; i < GFAR_RMON_LEN; i++)
cc8c6e37 159 stats->rmon[i] = (u64) gfar_read(&rmon[i]);
1da177e4 160
0bbaf069
KG		 161 for (i = 0; i < GFAR_EXTRA_STATS_LEN; i++)
162 stats->extra[i] = extra[i];
163 } else
164 for (i = 0; i < GFAR_EXTRA_STATS_LEN; i++)
165 buf[i] = extra[i];
1da177e4
LT		 166}
167
b9f2c044 168static int gfar_sset_count(struct net_device *dev, int sset)
1da177e4 169{
1da177e4 170 struct gfar_private *priv = netdev_priv(dev);
1da177e4 171
b9f2c044
JG		 172 switch (sset) {
173 case ETH_SS_STATS:
b31a1d8b 174 if (priv->device_flags & FSL_GIANFAR_DEV_HAS_RMON)
b9f2c044
JG		 175 return GFAR_STATS_LEN;
176 else
177 return GFAR_EXTRA_STATS_LEN;
178 default:
179 return -EOPNOTSUPP;
180 }
1da177e4
LT		 181}
182
1da177e4 183/* Fills in the drvinfo structure with some basic info */
cbfc6071
JC		 184static void gfar_gdrvinfo(struct net_device *dev,
185 struct ethtool_drvinfo *drvinfo)
1da177e4 186{
7826d43f
JP		 187 strlcpy(drvinfo->driver, DRV_NAME, sizeof(drvinfo->driver));
188 strlcpy(drvinfo->version, gfar_driver_version,
189 sizeof(drvinfo->version));
190 strlcpy(drvinfo->fw_version, "N/A", sizeof(drvinfo->fw_version));
191 strlcpy(drvinfo->bus_info, "N/A", sizeof(drvinfo->bus_info));
1da177e4
LT		 192 drvinfo->regdump_len = 0;
193 drvinfo->eedump_len = 0;
194}
195
bb40dcbb
AF		 196
197static int gfar_ssettings(struct net_device *dev, struct ethtool_cmd *cmd)
198{
199 struct gfar_private *priv = netdev_priv(dev);
200 struct phy_device *phydev = priv->phydev;
201
202 if (NULL == phydev)
203 return -ENODEV;
204
205 return phy_ethtool_sset(phydev, cmd);
206}
207
208
1da177e4 209/* Return the current settings in the ethtool_cmd structure */
0bbaf069 210static int gfar_gsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1da177e4
LT		 211{
212 struct gfar_private *priv = netdev_priv(dev);
bb40dcbb 213 struct phy_device *phydev = priv->phydev;
a12f801d
SG		 214 struct gfar_priv_rx_q *rx_queue = NULL;
215 struct gfar_priv_tx_q *tx_queue = NULL;
bb40dcbb
AF		 216
217 if (NULL == phydev)
218 return -ENODEV;
fba4ed03
SG		 219 tx_queue = priv->tx_queue[0];
220 rx_queue = priv->rx_queue[0];
6aa20a22 221
fba4ed03
SG		 222 /* etsec-1.7 and older versions have only one txic
223 * and rxic regs although they support multiple queues */
a12f801d
SG		 224 cmd->maxtxpkt = get_icft_value(tx_queue->txic);
225 cmd->maxrxpkt = get_icft_value(rx_queue->rxic);
1da177e4 226
bb40dcbb 227 return phy_ethtool_gset(phydev, cmd);
1da177e4
LT		 228}
229
230/* Return the length of the register structure */
0bbaf069 231static int gfar_reglen(struct net_device *dev)
1da177e4
LT		 232{
233 return sizeof (struct gfar);
234}
235
236/* Return a dump of the GFAR register space */
cbfc6071
JC		 237static void gfar_get_regs(struct net_device *dev, struct ethtool_regs *regs,
238 void *regbuf)
1da177e4
LT		 239{
240 int i;
241 struct gfar_private *priv = netdev_priv(dev);
46ceb60c 242 u32 __iomem *theregs = (u32 __iomem *) priv->gfargrp[0].regs;
1da177e4
LT		 243 u32 *buf = (u32 *) regbuf;
244
245 for (i = 0; i < sizeof (struct gfar) / sizeof (u32); i++)
cc8c6e37 246 buf[i] = gfar_read(&theregs[i]);
1da177e4
LT		 247}
248
1da177e4
LT		 249/* Convert microseconds to ethernet clock ticks, which changes
250 * depending on what speed the controller is running at */
cbfc6071
JC		 251static unsigned int gfar_usecs2ticks(struct gfar_private *priv,
252 unsigned int usecs)
1da177e4
LT		 253{
254 unsigned int count;
255
256 /* The timer is different, depending on the interface speed */
bb40dcbb
AF		 257 switch (priv->phydev->speed) {
258 case SPEED_1000:
1da177e4
LT		 259 count = GFAR_GBIT_TIME;
260 break;
bb40dcbb 261 case SPEED_100:
1da177e4
LT		 262 count = GFAR_100_TIME;
263 break;
bb40dcbb 264 case SPEED_10:
1da177e4
LT		 265 default:
266 count = GFAR_10_TIME;
267 break;
268 }
269
270 /* Make sure we return a number greater than 0
271 * if usecs > 0 */
807540ba 272 return (usecs * 1000 + count - 1) / count;
1da177e4
LT		 273}
274
275/* Convert ethernet clock ticks to microseconds */
cbfc6071
JC		 276static unsigned int gfar_ticks2usecs(struct gfar_private *priv,
277 unsigned int ticks)
1da177e4
LT		 278{
279 unsigned int count;
280
281 /* The timer is different, depending on the interface speed */
bb40dcbb
AF		 282 switch (priv->phydev->speed) {
283 case SPEED_1000:
1da177e4
LT		 284 count = GFAR_GBIT_TIME;
285 break;
bb40dcbb 286 case SPEED_100:
1da177e4
LT		 287 count = GFAR_100_TIME;
288 break;
bb40dcbb 289 case SPEED_10:
1da177e4
LT		 290 default:
291 count = GFAR_10_TIME;
292 break;
293 }
294
295 /* Make sure we return a number greater than 0 */
296 /* if ticks is > 0 */
807540ba 297 return (ticks * count) / 1000;
1da177e4
LT		 298}
299
300/* Get the coalescing parameters, and put them in the cvals
301 * structure. */
cbfc6071
JC		 302static int gfar_gcoalesce(struct net_device *dev,
303 struct ethtool_coalesce *cvals)
1da177e4
LT		 304{
305 struct gfar_private *priv = netdev_priv(dev);
a12f801d
SG		 306 struct gfar_priv_rx_q *rx_queue = NULL;
307 struct gfar_priv_tx_q *tx_queue = NULL;
b46a8454
DH		 308 unsigned long rxtime;
309 unsigned long rxcount;
310 unsigned long txtime;
311 unsigned long txcount;
6aa20a22 312
b31a1d8b 313 if (!(priv->device_flags & FSL_GIANFAR_DEV_HAS_COALESCE))
0bbaf069 314 return -EOPNOTSUPP;
1da177e4 315
bb40dcbb
AF		 316 if (NULL == priv->phydev)
317 return -ENODEV;
318
fba4ed03
SG		 319 rx_queue = priv->rx_queue[0];
320 tx_queue = priv->tx_queue[0];
a12f801d
SG		 321
322 rxtime = get_ictt_value(rx_queue->rxic);
323 rxcount = get_icft_value(rx_queue->rxic);
324 txtime = get_ictt_value(tx_queue->txic);
325 txcount = get_icft_value(tx_queue->txic);
b46a8454
DH		 326 cvals->rx_coalesce_usecs = gfar_ticks2usecs(priv, rxtime);
327 cvals->rx_max_coalesced_frames = rxcount;
1da177e4 328
b46a8454
DH		 329 cvals->tx_coalesce_usecs = gfar_ticks2usecs(priv, txtime);
330 cvals->tx_max_coalesced_frames = txcount;
1da177e4
LT		 331
332 cvals->use_adaptive_rx_coalesce = 0;
333 cvals->use_adaptive_tx_coalesce = 0;
334
335 cvals->pkt_rate_low = 0;
336 cvals->rx_coalesce_usecs_low = 0;
337 cvals->rx_max_coalesced_frames_low = 0;
338 cvals->tx_coalesce_usecs_low = 0;
339 cvals->tx_max_coalesced_frames_low = 0;
340
341 /* When the packet rate is below pkt_rate_high but above
342 * pkt_rate_low (both measured in packets per second) the
343 * normal {rx,tx}_* coalescing parameters are used.
344 */
345
346 /* When the packet rate is (measured in packets per second)
347 * is above pkt_rate_high, the {rx,tx}_*_high parameters are
348 * used.
349 */
350 cvals->pkt_rate_high = 0;
351 cvals->rx_coalesce_usecs_high = 0;
352 cvals->rx_max_coalesced_frames_high = 0;
353 cvals->tx_coalesce_usecs_high = 0;
354 cvals->tx_max_coalesced_frames_high = 0;
355
356 /* How often to do adaptive coalescing packet rate sampling,
357 * measured in seconds. Must not be zero.
358 */
359 cvals->rate_sample_interval = 0;
360
361 return 0;
362}
363
364/* Change the coalescing values.
365 * Both cvals->*_usecs and cvals->*_frames have to be > 0
366 * in order for coalescing to be active
367 */
cbfc6071
JC		 368static int gfar_scoalesce(struct net_device *dev,
369 struct ethtool_coalesce *cvals)
1da177e4
LT		 370{
371 struct gfar_private *priv = netdev_priv(dev);
46ceb60c 372 int i = 0;
1da177e4 373
b31a1d8b 374 if (!(priv->device_flags & FSL_GIANFAR_DEV_HAS_COALESCE))
0bbaf069
KG		 375 return -EOPNOTSUPP;
376
1da177e4 377 /* Set up rx coalescing */
46ceb60c
SG		 378 /* As of now, we will enable/disable coalescing for all
379 * queues together in case of eTSEC2, this will be modified
cbfc6071
JC		 380 * along with the ethtool interface
381 */
1da177e4 382 if ((cvals->rx_coalesce_usecs == 0) ||
46ceb60c
SG		 383 (cvals->rx_max_coalesced_frames == 0)) {
384 for (i = 0; i < priv->num_rx_queues; i++)
385 priv->rx_queue[i]->rxcoalescing = 0;
386 } else {
387 for (i = 0; i < priv->num_rx_queues; i++)
388 priv->rx_queue[i]->rxcoalescing = 1;
389 }
1da177e4 390
bb40dcbb
AF		 391 if (NULL == priv->phydev)
392 return -ENODEV;
393
394 /* Check the bounds of the values */
395 if (cvals->rx_coalesce_usecs > GFAR_MAX_COAL_USECS) {
396 pr_info("Coalescing is limited to %d microseconds\n",
59deab26 397 GFAR_MAX_COAL_USECS);
bb40dcbb
AF		 398 return -EINVAL;
399 }
400
401 if (cvals->rx_max_coalesced_frames > GFAR_MAX_COAL_FRAMES) {
402 pr_info("Coalescing is limited to %d frames\n",
59deab26 403 GFAR_MAX_COAL_FRAMES);
bb40dcbb
AF		 404 return -EINVAL;
405 }
406
46ceb60c
SG		 407 for (i = 0; i < priv->num_rx_queues; i++) {
408 priv->rx_queue[i]->rxic = mk_ic_value(
409 cvals->rx_max_coalesced_frames,
410 gfar_usecs2ticks(priv, cvals->rx_coalesce_usecs));
411 }
1da177e4
LT		 412
413 /* Set up tx coalescing */
414 if ((cvals->tx_coalesce_usecs == 0) ||
46ceb60c
SG		 415 (cvals->tx_max_coalesced_frames == 0)) {
416 for (i = 0; i < priv->num_tx_queues; i++)
417 priv->tx_queue[i]->txcoalescing = 0;
418 } else {
419 for (i = 0; i < priv->num_tx_queues; i++)
420 priv->tx_queue[i]->txcoalescing = 1;
421 }
1da177e4 422
bb40dcbb
AF		 423 /* Check the bounds of the values */
424 if (cvals->tx_coalesce_usecs > GFAR_MAX_COAL_USECS) {
425 pr_info("Coalescing is limited to %d microseconds\n",
59deab26 426 GFAR_MAX_COAL_USECS);
bb40dcbb
AF		 427 return -EINVAL;
428 }
429
430 if (cvals->tx_max_coalesced_frames > GFAR_MAX_COAL_FRAMES) {
431 pr_info("Coalescing is limited to %d frames\n",
59deab26 432 GFAR_MAX_COAL_FRAMES);
bb40dcbb
AF		 433 return -EINVAL;
434 }
435
46ceb60c
SG		 436 for (i = 0; i < priv->num_tx_queues; i++) {
437 priv->tx_queue[i]->txic = mk_ic_value(
438 cvals->tx_max_coalesced_frames,
439 gfar_usecs2ticks(priv, cvals->tx_coalesce_usecs));
440 }
1da177e4 441
46ceb60c 442 gfar_configure_coalescing(priv, 0xFF, 0xFF);
1da177e4
LT		 443
444 return 0;
445}
446
447/* Fills in rvals with the current ring parameters. Currently,
448 * rx, rx_mini, and rx_jumbo rings are the same size, as mini and
449 * jumbo are ignored by the driver */
cbfc6071
JC		 450static void gfar_gringparam(struct net_device *dev,
451 struct ethtool_ringparam *rvals)
1da177e4
LT		 452{
453 struct gfar_private *priv = netdev_priv(dev);
a12f801d
SG		 454 struct gfar_priv_tx_q *tx_queue = NULL;
455 struct gfar_priv_rx_q *rx_queue = NULL;
456
fba4ed03
SG		 457 tx_queue = priv->tx_queue[0];
458 rx_queue = priv->rx_queue[0];
1da177e4
LT		 459
460 rvals->rx_max_pending = GFAR_RX_MAX_RING_SIZE;
461 rvals->rx_mini_max_pending = GFAR_RX_MAX_RING_SIZE;
462 rvals->rx_jumbo_max_pending = GFAR_RX_MAX_RING_SIZE;
463 rvals->tx_max_pending = GFAR_TX_MAX_RING_SIZE;
464
465 /* Values changeable by the user. The valid values are
466 * in the range 1 to the "*_max_pending" counterpart above.
467 */
a12f801d
SG		 468 rvals->rx_pending = rx_queue->rx_ring_size;
469 rvals->rx_mini_pending = rx_queue->rx_ring_size;
470 rvals->rx_jumbo_pending = rx_queue->rx_ring_size;
471 rvals->tx_pending = tx_queue->tx_ring_size;
1da177e4
LT		 472}
473
474/* Change the current ring parameters, stopping the controller if
475 * necessary so that we don't mess things up while we're in
476 * motion. We wait for the ring to be clean before reallocating
cbfc6071
JC		 477 * the rings.
478 */
479static int gfar_sringparam(struct net_device *dev,
480 struct ethtool_ringparam *rvals)
1da177e4 481{
1da177e4 482 struct gfar_private *priv = netdev_priv(dev);
fba4ed03 483 int err = 0, i = 0;
1da177e4
LT		 484
485 if (rvals->rx_pending > GFAR_RX_MAX_RING_SIZE)
486 return -EINVAL;
487
488 if (!is_power_of_2(rvals->rx_pending)) {
59deab26 489 netdev_err(dev, "Ring sizes must be a power of 2\n");
1da177e4
LT		 490 return -EINVAL;
491 }
492
493 if (rvals->tx_pending > GFAR_TX_MAX_RING_SIZE)
494 return -EINVAL;
495
496 if (!is_power_of_2(rvals->tx_pending)) {
59deab26 497 netdev_err(dev, "Ring sizes must be a power of 2\n");
1da177e4
LT		 498 return -EINVAL;
499 }
500
a12f801d 501
0bbaf069
KG		 502 if (dev->flags & IFF_UP) {
503 unsigned long flags;
1da177e4 504
0bbaf069 505 /* Halt TX and RX, and process the frames which
cbfc6071
JC		 506 * have already been received
507 */
fba4ed03
SG		 508 local_irq_save(flags);
509 lock_tx_qs(priv);
510 lock_rx_qs(priv);
fef6108d 511
0bbaf069 512 gfar_halt(dev);
fef6108d 513
fba4ed03
SG		 514 unlock_rx_qs(priv);
515 unlock_tx_qs(priv);
516 local_irq_restore(flags);
1da177e4 517
fba4ed03
SG		 518 for (i = 0; i < priv->num_rx_queues; i++)
519 gfar_clean_rx_ring(priv->rx_queue[i],
cbfc6071 520 priv->rx_queue[i]->rx_ring_size);
12dea57b 521
0bbaf069
KG		 522 /* Now we take down the rings to rebuild them */
523 stop_gfar(dev);
524 }
1da177e4 525
0bbaf069 526 /* Change the size */
fba4ed03
SG		 527 for (i = 0; i < priv->num_rx_queues; i++) {
528 priv->rx_queue[i]->rx_ring_size = rvals->rx_pending;
529 priv->tx_queue[i]->tx_ring_size = rvals->tx_pending;
cbfc6071
JC		 530 priv->tx_queue[i]->num_txbdfree =
531 priv->tx_queue[i]->tx_ring_size;
fba4ed03 532 }
1da177e4 533
0bbaf069 534 /* Rebuild the rings with the new size */
12dea57b 535 if (dev->flags & IFF_UP) {
0bbaf069 536 err = startup_gfar(dev);
fba4ed03 537 netif_tx_wake_all_queues(dev);
12dea57b 538 }
0bbaf069
KG		 539 return err;
540}
1da177e4 541
c8f44aff 542int gfar_set_features(struct net_device *dev, netdev_features_t features)
0bbaf069
KG		 543{
544 struct gfar_private *priv = netdev_priv(dev);
d87eb127 545 unsigned long flags;
fba4ed03 546 int err = 0, i = 0;
c8f44aff 547 netdev_features_t changed = dev->features ^ features;
1da177e4 548
87c288c6
JP		 549 if (changed & (NETIF_F_HW_VLAN_TX|NETIF_F_HW_VLAN_RX))
550 gfar_vlan_mode(dev, features);
551
8b3afe95
MM		 552 if (!(changed & NETIF_F_RXCSUM))
553 return 0;
a12f801d 554
0bbaf069 555 if (dev->flags & IFF_UP) {
0bbaf069 556 /* Halt TX and RX, and process the frames which
cbfc6071
JC		 557 * have already been received
558 */
fba4ed03
SG		 559 local_irq_save(flags);
560 lock_tx_qs(priv);
561 lock_rx_qs(priv);
fef6108d 562
0bbaf069 563 gfar_halt(dev);
fef6108d 564
fba4ed03
SG		 565 unlock_tx_qs(priv);
566 unlock_rx_qs(priv);
9756403b 567 local_irq_restore(flags);
0bbaf069 568
fba4ed03
SG		 569 for (i = 0; i < priv->num_rx_queues; i++)
570 gfar_clean_rx_ring(priv->rx_queue[i],
cbfc6071 571 priv->rx_queue[i]->rx_ring_size);
12dea57b 572
0bbaf069 573 /* Now we take down the rings to rebuild them */
1da177e4 574 stop_gfar(dev);
1da177e4 575
8b3afe95 576 dev->features = features;
1da177e4 577
1da177e4 578 err = startup_gfar(dev);
fba4ed03 579 netif_tx_wake_all_queues(dev);
12dea57b 580 }
1da177e4
LT		 581 return err;
582}
583
0bbaf069 584static uint32_t gfar_get_msglevel(struct net_device *dev)
6aa20a22 585{
0bbaf069 586 struct gfar_private *priv = netdev_priv(dev);
cbfc6071 587
0bbaf069 588 return priv->msg_enable;
6aa20a22
JG		 589}
590
0bbaf069 591static void gfar_set_msglevel(struct net_device *dev, uint32_t data)
6aa20a22 592{
0bbaf069 593 struct gfar_private *priv = netdev_priv(dev);
cbfc6071 594
0bbaf069
KG		 595 priv->msg_enable = data;
596}
597
d87eb127
SW		 598#ifdef CONFIG_PM
599static void gfar_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
600{
601 struct gfar_private *priv = netdev_priv(dev);
602
b31a1d8b 603 if (priv->device_flags & FSL_GIANFAR_DEV_HAS_MAGIC_PACKET) {
d87eb127
SW		 604 wol->supported = WAKE_MAGIC;
605 wol->wolopts = priv->wol_en ? WAKE_MAGIC : 0;
606 } else {
607 wol->supported = wol->wolopts = 0;
608 }
609}
610
611static int gfar_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
612{
613 struct gfar_private *priv = netdev_priv(dev);
614 unsigned long flags;
615
b31a1d8b 616 if (!(priv->device_flags & FSL_GIANFAR_DEV_HAS_MAGIC_PACKET) &&
d87eb127
SW		 617 wol->wolopts != 0)
618 return -EINVAL;
619
620 if (wol->wolopts & ~WAKE_MAGIC)
621 return -EINVAL;
622
6c4f1994
RW		 623 device_set_wakeup_enable(&dev->dev, wol->wolopts & WAKE_MAGIC);
624
d87eb127 625 spin_lock_irqsave(&priv->bflock, flags);
6c4f1994 626 priv->wol_en = !!device_may_wakeup(&dev->dev);
d87eb127
SW		 627 spin_unlock_irqrestore(&priv->bflock, flags);
628
629 return 0;
630}
631#endif
0bbaf069 632
7a8b3372
SG		 633static void ethflow_to_filer_rules (struct gfar_private *priv, u64 ethflow)
634{
635 u32 fcr = 0x0, fpr = FPR_FILER_MASK;
636
637 if (ethflow & RXH_L2DA) {
638 fcr = RQFCR_PID_DAH |RQFCR_CMP_NOMATCH |
cbfc6071 639 RQFCR_HASH | RQFCR_AND | RQFCR_HASHTBL_0;
6c43e046
WJB		 640 priv->ftp_rqfpr[priv->cur_filer_idx] = fpr;
641 priv->ftp_rqfcr[priv->cur_filer_idx] = fcr;
7a8b3372
SG		 642 gfar_write_filer(priv, priv->cur_filer_idx, fcr, fpr);
643 priv->cur_filer_idx = priv->cur_filer_idx - 1;
644
645 fcr = RQFCR_PID_DAL | RQFCR_AND | RQFCR_CMP_NOMATCH |
cbfc6071 646 RQFCR_HASH | RQFCR_AND | RQFCR_HASHTBL_0;
6c43e046
WJB		 647 priv->ftp_rqfpr[priv->cur_filer_idx] = fpr;
648 priv->ftp_rqfcr[priv->cur_filer_idx] = fcr;
7a8b3372
SG		 649 gfar_write_filer(priv, priv->cur_filer_idx, fcr, fpr);
650 priv->cur_filer_idx = priv->cur_filer_idx - 1;
651 }
652
653 if (ethflow & RXH_VLAN) {
654 fcr = RQFCR_PID_VID | RQFCR_CMP_NOMATCH | RQFCR_HASH |
cbfc6071 655 RQFCR_AND | RQFCR_HASHTBL_0;
7a8b3372 656 gfar_write_filer(priv, priv->cur_filer_idx, fcr, fpr);
6c43e046
WJB		 657 priv->ftp_rqfpr[priv->cur_filer_idx] = fpr;
658 priv->ftp_rqfcr[priv->cur_filer_idx] = fcr;
7a8b3372
SG		 659 priv->cur_filer_idx = priv->cur_filer_idx - 1;
660 }
661
662 if (ethflow & RXH_IP_SRC) {
663 fcr = RQFCR_PID_SIA | RQFCR_CMP_NOMATCH | RQFCR_HASH |
cbfc6071 664 RQFCR_AND | RQFCR_HASHTBL_0;
6c43e046
WJB		 665 priv->ftp_rqfpr[priv->cur_filer_idx] = fpr;
666 priv->ftp_rqfcr[priv->cur_filer_idx] = fcr;
7a8b3372
SG		 667 gfar_write_filer(priv, priv->cur_filer_idx, fcr, fpr);
668 priv->cur_filer_idx = priv->cur_filer_idx - 1;
669 }
670
671 if (ethflow & (RXH_IP_DST)) {
672 fcr = RQFCR_PID_DIA | RQFCR_CMP_NOMATCH | RQFCR_HASH |
cbfc6071 673 RQFCR_AND | RQFCR_HASHTBL_0;
6c43e046
WJB		 674 priv->ftp_rqfpr[priv->cur_filer_idx] = fpr;
675 priv->ftp_rqfcr[priv->cur_filer_idx] = fcr;
7a8b3372
SG		 676 gfar_write_filer(priv, priv->cur_filer_idx, fcr, fpr);
677 priv->cur_filer_idx = priv->cur_filer_idx - 1;
678 }
679
680 if (ethflow & RXH_L3_PROTO) {
681 fcr = RQFCR_PID_L4P | RQFCR_CMP_NOMATCH | RQFCR_HASH |
cbfc6071 682 RQFCR_AND | RQFCR_HASHTBL_0;
6c43e046
WJB		 683 priv->ftp_rqfpr[priv->cur_filer_idx] = fpr;
684 priv->ftp_rqfcr[priv->cur_filer_idx] = fcr;
7a8b3372
SG		 685 gfar_write_filer(priv, priv->cur_filer_idx, fcr, fpr);
686 priv->cur_filer_idx = priv->cur_filer_idx - 1;
687 }
688
689 if (ethflow & RXH_L4_B_0_1) {
690 fcr = RQFCR_PID_SPT | RQFCR_CMP_NOMATCH | RQFCR_HASH |
cbfc6071 691 RQFCR_AND | RQFCR_HASHTBL_0;
6c43e046
WJB		 692 priv->ftp_rqfpr[priv->cur_filer_idx] = fpr;
693 priv->ftp_rqfcr[priv->cur_filer_idx] = fcr;
7a8b3372
SG		 694 gfar_write_filer(priv, priv->cur_filer_idx, fcr, fpr);
695 priv->cur_filer_idx = priv->cur_filer_idx - 1;
696 }
697
698 if (ethflow & RXH_L4_B_2_3) {
699 fcr = RQFCR_PID_DPT | RQFCR_CMP_NOMATCH | RQFCR_HASH |
cbfc6071 700 RQFCR_AND | RQFCR_HASHTBL_0;
6c43e046
WJB		 701 priv->ftp_rqfpr[priv->cur_filer_idx] = fpr;
702 priv->ftp_rqfcr[priv->cur_filer_idx] = fcr;
7a8b3372
SG		 703 gfar_write_filer(priv, priv->cur_filer_idx, fcr, fpr);
704 priv->cur_filer_idx = priv->cur_filer_idx - 1;
705 }
706}
707
cbfc6071
JC		 708static int gfar_ethflow_to_filer_table(struct gfar_private *priv, u64 ethflow,
709 u64 class)
7a8b3372
SG		 710{
711 unsigned int last_rule_idx = priv->cur_filer_idx;
712 unsigned int cmp_rqfpr;
588dc911
WS		 713 unsigned int *local_rqfpr;
714 unsigned int *local_rqfcr;
7a8b3372
SG		 715 int i = 0x0, k = 0x0;
716 int j = MAX_FILER_IDX, l = 0x0;
588dc911
WS		 717 int ret = 1;
718
719 local_rqfpr = kmalloc(sizeof(unsigned int) * (MAX_FILER_IDX + 1),
cbfc6071 720 GFP_KERNEL);
588dc911 721 local_rqfcr = kmalloc(sizeof(unsigned int) * (MAX_FILER_IDX + 1),
cbfc6071 722 GFP_KERNEL);
588dc911
WS		 723 if (!local_rqfpr || !local_rqfcr) {
724 pr_err("Out of memory\n");
725 ret = 0;
726 goto err;
727 }
7a8b3372
SG		 728
729 switch (class) {
730 case TCP_V4_FLOW:
731 cmp_rqfpr = RQFPR_IPV4 |RQFPR_TCP;
732 break;
733 case UDP_V4_FLOW:
734 cmp_rqfpr = RQFPR_IPV4 |RQFPR_UDP;
735 break;
736 case TCP_V6_FLOW:
737 cmp_rqfpr = RQFPR_IPV6 |RQFPR_TCP;
738 break;
739 case UDP_V6_FLOW:
740 cmp_rqfpr = RQFPR_IPV6 |RQFPR_UDP;
741 break;
7a8b3372 742 default:
59deab26 743 pr_err("Right now this class is not supported\n");
588dc911
WS		 744 ret = 0;
745 goto err;
7a8b3372
SG		 746 }
747
748 for (i = 0; i < MAX_FILER_IDX + 1; i++) {
6c43e046
WJB		 749 local_rqfpr[j] = priv->ftp_rqfpr[i];
750 local_rqfcr[j] = priv->ftp_rqfcr[i];
7a8b3372 751 j--;
cbfc6071
JC		 752 if ((priv->ftp_rqfcr[i] ==
753 (RQFCR_PID_PARSE | RQFCR_CLE | RQFCR_AND)) &&
754 (priv->ftp_rqfpr[i] == cmp_rqfpr))
7a8b3372
SG		 755 break;
756 }
757
758 if (i == MAX_FILER_IDX + 1) {
59deab26 759 pr_err("No parse rule found, can't create hash rules\n");
588dc911
WS		 760 ret = 0;
761 goto err;
7a8b3372
SG		 762 }
763
764 /* If a match was found, then it begins the starting of a cluster rule
765 * if it was already programmed, we need to overwrite these rules
766 */
767 for (l = i+1; l < MAX_FILER_IDX; l++) {
6c43e046 768 if ((priv->ftp_rqfcr[l] & RQFCR_CLE) &&
cbfc6071 769 !(priv->ftp_rqfcr[l] & RQFCR_AND)) {
6c43e046 770 priv->ftp_rqfcr[l] = RQFCR_CLE | RQFCR_CMP_EXACT |
cbfc6071 771 RQFCR_HASHTBL_0 | RQFCR_PID_MASK;
6c43e046
WJB		 772 priv->ftp_rqfpr[l] = FPR_FILER_MASK;
773 gfar_write_filer(priv, l, priv->ftp_rqfcr[l],
cbfc6071 774 priv->ftp_rqfpr[l]);
7a8b3372
SG		 775 break;
776 }
777
6c43e046
WJB		 778 if (!(priv->ftp_rqfcr[l] & RQFCR_CLE) &&
779 (priv->ftp_rqfcr[l] & RQFCR_AND))
7a8b3372
SG		 780 continue;
781 else {
6c43e046
WJB		 782 local_rqfpr[j] = priv->ftp_rqfpr[l];
783 local_rqfcr[j] = priv->ftp_rqfcr[l];
7a8b3372
SG		 784 j--;
785 }
786 }
787
788 priv->cur_filer_idx = l - 1;
789 last_rule_idx = l;
790
791 /* hash rules */
792 ethflow_to_filer_rules(priv, ethflow);
793
794 /* Write back the popped out rules again */
795 for (k = j+1; k < MAX_FILER_IDX; k++) {
6c43e046
WJB		 796 priv->ftp_rqfpr[priv->cur_filer_idx] = local_rqfpr[k];
797 priv->ftp_rqfcr[priv->cur_filer_idx] = local_rqfcr[k];
7a8b3372 798 gfar_write_filer(priv, priv->cur_filer_idx,
cbfc6071 799 local_rqfcr[k], local_rqfpr[k]);
7a8b3372
SG		 800 if (!priv->cur_filer_idx)
801 break;
802 priv->cur_filer_idx = priv->cur_filer_idx - 1;
803 }
804
588dc911
WS		 805err:
806 kfree(local_rqfcr);
807 kfree(local_rqfpr);
808 return ret;
7a8b3372
SG		 809}
810
cbfc6071
JC		 811static int gfar_set_hash_opts(struct gfar_private *priv,
812 struct ethtool_rxnfc *cmd)
7a8b3372 813{
7a8b3372
SG		 814 /* write the filer rules here */
815 if (!gfar_ethflow_to_filer_table(priv, cmd->data, cmd->flow_type))
bde3528f 816 return -EINVAL;
7a8b3372
SG		 817
818 return 0;
819}
820
4aa3a715
SP		 821static int gfar_check_filer_hardware(struct gfar_private *priv)
822{
823 struct gfar __iomem *regs = NULL;
824 u32 i;
825
826 regs = priv->gfargrp[0].regs;
827
828 /* Check if we are in FIFO mode */
829 i = gfar_read(&regs->ecntrl);
830 i &= ECNTRL_FIFM;
831 if (i == ECNTRL_FIFM) {
832 netdev_notice(priv->ndev, "Interface in FIFO mode\n");
833 i = gfar_read(&regs->rctrl);
834 i &= RCTRL_PRSDEP_MASK | RCTRL_PRSFM;
835 if (i == (RCTRL_PRSDEP_MASK | RCTRL_PRSFM)) {
836 netdev_info(priv->ndev,
cbfc6071 837 "Receive Queue Filtering enabled\n");
4aa3a715
SP		 838 } else {
839 netdev_warn(priv->ndev,
cbfc6071 840 "Receive Queue Filtering disabled\n");
4aa3a715
SP		 841 return -EOPNOTSUPP;
842 }
843 }
844 /* Or in standard mode */
845 else {
846 i = gfar_read(&regs->rctrl);
847 i &= RCTRL_PRSDEP_MASK;
848 if (i == RCTRL_PRSDEP_MASK) {
849 netdev_info(priv->ndev,
cbfc6071 850 "Receive Queue Filtering enabled\n");
4aa3a715
SP		 851 } else {
852 netdev_warn(priv->ndev,
cbfc6071 853 "Receive Queue Filtering disabled\n");
4aa3a715
SP		 854 return -EOPNOTSUPP;
855 }
856 }
857
858 /* Sets the properties for arbitrary filer rule
cbfc6071
JC		 859 * to the first 4 Layer 4 Bytes
860 */
4aa3a715
SP		 861 regs->rbifx = 0xC0C1C2C3;
862 return 0;
863}
864
865static int gfar_comp_asc(const void *a, const void *b)
866{
867 return memcmp(a, b, 4);
868}
869
870static int gfar_comp_desc(const void *a, const void *b)
871{
872 return -memcmp(a, b, 4);
873}
874
875static void gfar_swap(void *a, void *b, int size)
876{
877 u32 *_a = a;
878 u32 *_b = b;
879
880 swap(_a[0], _b[0]);
881 swap(_a[1], _b[1]);
882 swap(_a[2], _b[2]);
883 swap(_a[3], _b[3]);
884}
885
886/* Write a mask to filer cache */
887static void gfar_set_mask(u32 mask, struct filer_table *tab)
888{
889 tab->fe[tab->index].ctrl = RQFCR_AND | RQFCR_PID_MASK | RQFCR_CMP_EXACT;
890 tab->fe[tab->index].prop = mask;
891 tab->index++;
892}
893
894/* Sets parse bits (e.g. IP or TCP) */
895static void gfar_set_parse_bits(u32 value, u32 mask, struct filer_table *tab)
896{
897 gfar_set_mask(mask, tab);
cbfc6071
JC		 898 tab->fe[tab->index].ctrl = RQFCR_CMP_EXACT | RQFCR_PID_PARSE |
899 RQFCR_AND;
4aa3a715
SP		 900 tab->fe[tab->index].prop = value;
901 tab->index++;
902}
903
904static void gfar_set_general_attribute(u32 value, u32 mask, u32 flag,
cbfc6071 905 struct filer_table *tab)
4aa3a715
SP		 906{
907 gfar_set_mask(mask, tab);
908 tab->fe[tab->index].ctrl = RQFCR_CMP_EXACT | RQFCR_AND | flag;
909 tab->fe[tab->index].prop = value;
910 tab->index++;
911}
912
cbfc6071 913/* For setting a tuple of value and mask of type flag
4aa3a715
SP		 914 * Example:
915 * IP-Src = 10.0.0.0/255.0.0.0
916 * value: 0x0A000000 mask: FF000000 flag: RQFPR_IPV4
917 *
918 * Ethtool gives us a value=0 and mask=~0 for don't care a tuple
919 * For a don't care mask it gives us a 0
920 *
921 * The check if don't care and the mask adjustment if mask=0 is done for VLAN
922 * and MAC stuff on an upper level (due to missing information on this level).
923 * For these guys we can discard them if they are value=0 and mask=0.
924 *
925 * Further the all masks are one-padded for better hardware efficiency.
926 */
927static void gfar_set_attribute(u32 value, u32 mask, u32 flag,
cbfc6071 928 struct filer_table *tab)
4aa3a715
SP		 929{
930 switch (flag) {
380b153c 931 /* 3bit */
4aa3a715
SP		 932 case RQFCR_PID_PRI:
933 if (!(value | mask))
934 return;
935 mask |= RQFCR_PID_PRI_MASK;
936 break;
937 /* 8bit */
938 case RQFCR_PID_L4P:
939 case RQFCR_PID_TOS:
940 if (!~(mask | RQFCR_PID_L4P_MASK))
941 return;
942 if (!mask)
943 mask = ~0;
944 else
945 mask |= RQFCR_PID_L4P_MASK;
946 break;
947 /* 12bit */
948 case RQFCR_PID_VID:
949 if (!(value | mask))
950 return;
951 mask |= RQFCR_PID_VID_MASK;
952 break;
953 /* 16bit */
954 case RQFCR_PID_DPT:
955 case RQFCR_PID_SPT:
956 case RQFCR_PID_ETY:
957 if (!~(mask | RQFCR_PID_PORT_MASK))
958 return;
959 if (!mask)
960 mask = ~0;
961 else
962 mask |= RQFCR_PID_PORT_MASK;
963 break;
964 /* 24bit */
965 case RQFCR_PID_DAH:
966 case RQFCR_PID_DAL:
967 case RQFCR_PID_SAH:
968 case RQFCR_PID_SAL:
969 if (!(value | mask))
970 return;
971 mask |= RQFCR_PID_MAC_MASK;
972 break;
973 /* for all real 32bit masks */
974 default:
975 if (!~mask)
976 return;
977 if (!mask)
978 mask = ~0;
979 break;
980 }
981 gfar_set_general_attribute(value, mask, flag, tab);
982}
983
984/* Translates value and mask for UDP, TCP or SCTP */
985static void gfar_set_basic_ip(struct ethtool_tcpip4_spec *value,
cbfc6071
JC		 986 struct ethtool_tcpip4_spec *mask,
987 struct filer_table *tab)
4aa3a715
SP		 988{
989 gfar_set_attribute(value->ip4src, mask->ip4src, RQFCR_PID_SIA, tab);
990 gfar_set_attribute(value->ip4dst, mask->ip4dst, RQFCR_PID_DIA, tab);
991 gfar_set_attribute(value->pdst, mask->pdst, RQFCR_PID_DPT, tab);
992 gfar_set_attribute(value->psrc, mask->psrc, RQFCR_PID_SPT, tab);
993 gfar_set_attribute(value->tos, mask->tos, RQFCR_PID_TOS, tab);
994}
995
996/* Translates value and mask for RAW-IP4 */
997static void gfar_set_user_ip(struct ethtool_usrip4_spec *value,
cbfc6071
JC		 998 struct ethtool_usrip4_spec *mask,
999 struct filer_table *tab)
4aa3a715
SP		 1000{
1001 gfar_set_attribute(value->ip4src, mask->ip4src, RQFCR_PID_SIA, tab);
1002 gfar_set_attribute(value->ip4dst, mask->ip4dst, RQFCR_PID_DIA, tab);
1003 gfar_set_attribute(value->tos, mask->tos, RQFCR_PID_TOS, tab);
1004 gfar_set_attribute(value->proto, mask->proto, RQFCR_PID_L4P, tab);
1005 gfar_set_attribute(value->l4_4_bytes, mask->l4_4_bytes, RQFCR_PID_ARB,
cbfc6071 1006 tab);
4aa3a715
SP		 1007
1008}
1009
1010/* Translates value and mask for ETHER spec */
1011static void gfar_set_ether(struct ethhdr *value, struct ethhdr *mask,
cbfc6071 1012 struct filer_table *tab)
4aa3a715
SP		 1013{
1014 u32 upper_temp_mask = 0;
1015 u32 lower_temp_mask = 0;
cbfc6071 1016
4aa3a715
SP		 1017 /* Source address */
1018 if (!is_broadcast_ether_addr(mask->h_source)) {
4aa3a715
SP		 1019 if (is_zero_ether_addr(mask->h_source)) {
1020 upper_temp_mask = 0xFFFFFFFF;
1021 lower_temp_mask = 0xFFFFFFFF;
1022 } else {
cbfc6071
JC		 1023 upper_temp_mask = mask->h_source[0] << 16 |
1024 mask->h_source[1] << 8 |
1025 mask->h_source[2];
1026 lower_temp_mask = mask->h_source[3] << 16 |
1027 mask->h_source[4] << 8 |
1028 mask->h_source[5];
4aa3a715
SP		 1029 }
1030 /* Upper 24bit */
cbfc6071
JC		 1031 gfar_set_attribute(value->h_source[0] << 16 |
1032 value->h_source[1] << 8 |
1033 value->h_source[2],
1034 upper_temp_mask, RQFCR_PID_SAH, tab);
4aa3a715 1035 /* And the same for the lower part */
cbfc6071
JC		 1036 gfar_set_attribute(value->h_source[3] << 16 |
1037 value->h_source[4] << 8 |
1038 value->h_source[5],
1039 lower_temp_mask, RQFCR_PID_SAL, tab);
4aa3a715
SP		 1040 }
1041 /* Destination address */
1042 if (!is_broadcast_ether_addr(mask->h_dest)) {
4aa3a715 1043 /* Special for destination is limited broadcast */
cbfc6071
JC		 1044 if ((is_broadcast_ether_addr(value->h_dest) &&
1045 is_zero_ether_addr(mask->h_dest))) {
4aa3a715
SP		 1046 gfar_set_parse_bits(RQFPR_EBC, RQFPR_EBC, tab);
1047 } else {
4aa3a715
SP		 1048 if (is_zero_ether_addr(mask->h_dest)) {
1049 upper_temp_mask = 0xFFFFFFFF;
1050 lower_temp_mask = 0xFFFFFFFF;
1051 } else {
cbfc6071
JC		 1052 upper_temp_mask = mask->h_dest[0] << 16 |
1053 mask->h_dest[1] << 8 |
1054 mask->h_dest[2];
1055 lower_temp_mask = mask->h_dest[3] << 16 |
1056 mask->h_dest[4] << 8 |
1057 mask->h_dest[5];
4aa3a715
SP		 1058 }
1059
1060 /* Upper 24bit */
cbfc6071
JC		 1061 gfar_set_attribute(value->h_dest[0] << 16 |
1062 value->h_dest[1] << 8 |
1063 value->h_dest[2],
1064 upper_temp_mask, RQFCR_PID_DAH, tab);
4aa3a715 1065 /* And the same for the lower part */
cbfc6071
JC		 1066 gfar_set_attribute(value->h_dest[3] << 16 |
1067 value->h_dest[4] << 8 |
1068 value->h_dest[5],
1069 lower_temp_mask, RQFCR_PID_DAL, tab);
4aa3a715
SP		 1070 }
1071 }
1072
1073 gfar_set_attribute(value->h_proto, mask->h_proto, RQFCR_PID_ETY, tab);
4aa3a715
SP		 1074}
1075
1076/* Convert a rule to binary filter format of gianfar */
1077static int gfar_convert_to_filer(struct ethtool_rx_flow_spec *rule,
cbfc6071 1078 struct filer_table *tab)
4aa3a715
SP		 1079{
1080 u32 vlan = 0, vlan_mask = 0;
1081 u32 id = 0, id_mask = 0;
1082 u32 cfi = 0, cfi_mask = 0;
1083 u32 prio = 0, prio_mask = 0;
4aa3a715
SP		 1084 u32 old_index = tab->index;
1085
1086 /* Check if vlan is wanted */
1087 if ((rule->flow_type & FLOW_EXT) && (rule->m_ext.vlan_tci != 0xFFFF)) {
1088 if (!rule->m_ext.vlan_tci)
1089 rule->m_ext.vlan_tci = 0xFFFF;
1090
1091 vlan = RQFPR_VLN;
1092 vlan_mask = RQFPR_VLN;
1093
1094 /* Separate the fields */
380b153c
SP		 1095 id = rule->h_ext.vlan_tci & VLAN_VID_MASK;
1096 id_mask = rule->m_ext.vlan_tci & VLAN_VID_MASK;
1097 cfi = rule->h_ext.vlan_tci & VLAN_CFI_MASK;
1098 cfi_mask = rule->m_ext.vlan_tci & VLAN_CFI_MASK;
cbfc6071
JC		 1099 prio = (rule->h_ext.vlan_tci & VLAN_PRIO_MASK) >>
1100 VLAN_PRIO_SHIFT;
1101 prio_mask = (rule->m_ext.vlan_tci & VLAN_PRIO_MASK) >>
1102 VLAN_PRIO_SHIFT;
380b153c
SP		 1103
1104 if (cfi == VLAN_TAG_PRESENT && cfi_mask == VLAN_TAG_PRESENT) {
4aa3a715
SP		 1105 vlan |= RQFPR_CFI;
1106 vlan_mask |= RQFPR_CFI;
cbfc6071
JC		 1107 } else if (cfi != VLAN_TAG_PRESENT &&
1108 cfi_mask == VLAN_TAG_PRESENT) {
4aa3a715
SP		 1109 vlan_mask |= RQFPR_CFI;
1110 }
1111 }
1112
1113 switch (rule->flow_type & ~FLOW_EXT) {
1114 case TCP_V4_FLOW:
1115 gfar_set_parse_bits(RQFPR_IPV4 | RQFPR_TCP | vlan,
cbfc6071 1116 RQFPR_IPV4 | RQFPR_TCP | vlan_mask, tab);
4aa3a715 1117 gfar_set_basic_ip(&rule->h_u.tcp_ip4_spec,
cbfc6071 1118 &rule->m_u.tcp_ip4_spec, tab);
4aa3a715
SP		 1119 break;
1120 case UDP_V4_FLOW:
1121 gfar_set_parse_bits(RQFPR_IPV4 | RQFPR_UDP | vlan,
cbfc6071 1122 RQFPR_IPV4 | RQFPR_UDP | vlan_mask, tab);
4aa3a715 1123 gfar_set_basic_ip(&rule->h_u.udp_ip4_spec,
cbfc6071 1124 &rule->m_u.udp_ip4_spec, tab);
4aa3a715
SP		 1125 break;
1126 case SCTP_V4_FLOW:
1127 gfar_set_parse_bits(RQFPR_IPV4 | vlan, RQFPR_IPV4 | vlan_mask,
cbfc6071 1128 tab);
4aa3a715 1129 gfar_set_attribute(132, 0, RQFCR_PID_L4P, tab);
cbfc6071
JC		 1130 gfar_set_basic_ip((struct ethtool_tcpip4_spec *)&rule->h_u,
1131 (struct ethtool_tcpip4_spec *)&rule->m_u,
1132 tab);
4aa3a715
SP		 1133 break;
1134 case IP_USER_FLOW:
1135 gfar_set_parse_bits(RQFPR_IPV4 | vlan, RQFPR_IPV4 | vlan_mask,
cbfc6071 1136 tab);
4aa3a715 1137 gfar_set_user_ip((struct ethtool_usrip4_spec *) &rule->h_u,
cbfc6071
JC		 1138 (struct ethtool_usrip4_spec *) &rule->m_u,
1139 tab);
4aa3a715
SP		 1140 break;
1141 case ETHER_FLOW:
1142 if (vlan)
1143 gfar_set_parse_bits(vlan, vlan_mask, tab);
1144 gfar_set_ether((struct ethhdr *) &rule->h_u,
cbfc6071 1145 (struct ethhdr *) &rule->m_u, tab);
4aa3a715
SP		 1146 break;
1147 default:
1148 return -1;
1149 }
1150
1151 /* Set the vlan attributes in the end */
1152 if (vlan) {
1153 gfar_set_attribute(id, id_mask, RQFCR_PID_VID, tab);
1154 gfar_set_attribute(prio, prio_mask, RQFCR_PID_PRI, tab);
1155 }
1156
1157 /* If there has been nothing written till now, it must be a default */
1158 if (tab->index == old_index) {
1159 gfar_set_mask(0xFFFFFFFF, tab);
1160 tab->fe[tab->index].ctrl = 0x20;
1161 tab->fe[tab->index].prop = 0x0;
1162 tab->index++;
1163 }
1164
1165 /* Remove last AND */
1166 tab->fe[tab->index - 1].ctrl &= (~RQFCR_AND);
1167
1168 /* Specify which queue to use or to drop */
1169 if (rule->ring_cookie == RX_CLS_FLOW_DISC)
1170 tab->fe[tab->index - 1].ctrl |= RQFCR_RJE;
1171 else
1172 tab->fe[tab->index - 1].ctrl |= (rule->ring_cookie << 10);
1173
1174 /* Only big enough entries can be clustered */
1175 if (tab->index > (old_index + 2)) {
1176 tab->fe[old_index + 1].ctrl |= RQFCR_CLE;
1177 tab->fe[tab->index - 1].ctrl |= RQFCR_CLE;
1178 }
1179
cbfc6071
JC		 1180 /* In rare cases the cache can be full while there is
1181 * free space in hw
1182 */
4aa3a715
SP		 1183 if (tab->index > MAX_FILER_CACHE_IDX - 1)
1184 return -EBUSY;
1185
1186 return 0;
1187}
1188
1189/* Copy size filer entries */
1190static void gfar_copy_filer_entries(struct gfar_filer_entry dst[0],
cbfc6071 1191 struct gfar_filer_entry src[0], s32 size)
4aa3a715
SP		 1192{
1193 while (size > 0) {
1194 size--;
1195 dst[size].ctrl = src[size].ctrl;
1196 dst[size].prop = src[size].prop;
1197 }
1198}
1199
1200/* Delete the contents of the filer-table between start and end
cbfc6071
JC		 1201 * and collapse them
1202 */
4aa3a715
SP		 1203static int gfar_trim_filer_entries(u32 begin, u32 end, struct filer_table *tab)
1204{
1205 int length;
cbfc6071 1206
4aa3a715
SP		 1207 if (end > MAX_FILER_CACHE_IDX || end < begin)
1208 return -EINVAL;
1209
1210 end++;
1211 length = end - begin;
1212
1213 /* Copy */
1214 while (end < tab->index) {
1215 tab->fe[begin].ctrl = tab->fe[end].ctrl;
1216 tab->fe[begin++].prop = tab->fe[end++].prop;
1217
1218 }
1219 /* Fill up with don't cares */
1220 while (begin < tab->index) {
1221 tab->fe[begin].ctrl = 0x60;
1222 tab->fe[begin].prop = 0xFFFFFFFF;
1223 begin++;
1224 }
1225
1226 tab->index -= length;
1227 return 0;
1228}
1229
1230/* Make space on the wanted location */
1231static int gfar_expand_filer_entries(u32 begin, u32 length,
cbfc6071 1232 struct filer_table *tab)
4aa3a715 1233{
cbfc6071
JC		 1234 if (length == 0 || length + tab->index > MAX_FILER_CACHE_IDX ||
1235 begin > MAX_FILER_CACHE_IDX)
4aa3a715
SP		 1236 return -EINVAL;
1237
1238 gfar_copy_filer_entries(&(tab->fe[begin + length]), &(tab->fe[begin]),
cbfc6071 1239 tab->index - length + 1);
4aa3a715
SP		 1240
1241 tab->index += length;
1242 return 0;
1243}
1244
1245static int gfar_get_next_cluster_start(int start, struct filer_table *tab)
1246{
cbfc6071
JC		 1247 for (; (start < tab->index) && (start < MAX_FILER_CACHE_IDX - 1);
1248 start++) {
1249 if ((tab->fe[start].ctrl & (RQFCR_AND | RQFCR_CLE)) ==
1250 (RQFCR_AND | RQFCR_CLE))
4aa3a715
SP		 1251 return start;
1252 }
1253 return -1;
1254}
1255
1256static int gfar_get_next_cluster_end(int start, struct filer_table *tab)
1257{
cbfc6071
JC		 1258 for (; (start < tab->index) && (start < MAX_FILER_CACHE_IDX - 1);
1259 start++) {
1260 if ((tab->fe[start].ctrl & (RQFCR_AND | RQFCR_CLE)) ==
1261 (RQFCR_CLE))
4aa3a715
SP		 1262 return start;
1263 }
1264 return -1;
1265}
1266
cbfc6071 1267/* Uses hardwares clustering option to reduce
4aa3a715
SP		 1268 * the number of filer table entries
1269 */
1270static void gfar_cluster_filer(struct filer_table *tab)
1271{
1272 s32 i = -1, j, iend, jend;
1273
1274 while ((i = gfar_get_next_cluster_start(++i, tab)) != -1) {
1275 j = i;
1276 while ((j = gfar_get_next_cluster_start(++j, tab)) != -1) {
cbfc6071 1277 /* The cluster entries self and the previous one
4aa3a715
SP		 1278 * (a mask) must be identical!
1279 */
1280 if (tab->fe[i].ctrl != tab->fe[j].ctrl)
1281 break;
1282 if (tab->fe[i].prop != tab->fe[j].prop)
1283 break;
1284 if (tab->fe[i - 1].ctrl != tab->fe[j - 1].ctrl)
1285 break;
1286 if (tab->fe[i - 1].prop != tab->fe[j - 1].prop)
1287 break;
1288 iend = gfar_get_next_cluster_end(i, tab);
1289 jend = gfar_get_next_cluster_end(j, tab);
1290 if (jend == -1 || iend == -1)
1291 break;
cbfc6071
JC		 1292
1293 /* First we make some free space, where our cluster
4aa3a715
SP		 1294 * element should be. Then we copy it there and finally
1295 * delete in from its old location.
1296 */
cbfc6071
JC		 1297 if (gfar_expand_filer_entries(iend, (jend - j), tab) ==
1298 -EINVAL)
4aa3a715
SP		 1299 break;
1300
1301 gfar_copy_filer_entries(&(tab->fe[iend + 1]),
cbfc6071 1302 &(tab->fe[jend + 1]), jend - j);
4aa3a715
SP		 1303
1304 if (gfar_trim_filer_entries(jend - 1,
cbfc6071
JC		 1305 jend + (jend - j),
1306 tab) == -EINVAL)
4aa3a715
SP		 1307 return;
1308
1309 /* Mask out cluster bit */
1310 tab->fe[iend].ctrl &= ~(RQFCR_CLE);
1311 }
1312 }
1313}
1314
380b153c
SP		 1315/* Swaps the masked bits of a1<>a2 and b1<>b2 */
1316static void gfar_swap_bits(struct gfar_filer_entry *a1,
cbfc6071
JC		 1317 struct gfar_filer_entry *a2,
1318 struct gfar_filer_entry *b1,
1319 struct gfar_filer_entry *b2, u32 mask)
4aa3a715
SP		 1320{
1321 u32 temp[4];
380b153c
SP		 1322 temp[0] = a1->ctrl & mask;
1323 temp[1] = a2->ctrl & mask;
1324 temp[2] = b1->ctrl & mask;
1325 temp[3] = b2->ctrl & mask;
4aa3a715 1326
380b153c
SP		 1327 a1->ctrl &= ~mask;
1328 a2->ctrl &= ~mask;
1329 b1->ctrl &= ~mask;
1330 b2->ctrl &= ~mask;
4aa3a715
SP		 1331
1332 a1->ctrl |= temp[1];
1333 a2->ctrl |= temp[0];
1334 b1->ctrl |= temp[3];
1335 b2->ctrl |= temp[2];
1336}
1337
cbfc6071 1338/* Generate a list consisting of masks values with their start and
4aa3a715
SP		 1339 * end of validity and block as indicator for parts belonging
1340 * together (glued by ANDs) in mask_table
1341 */
1342static u32 gfar_generate_mask_table(struct gfar_mask_entry *mask_table,
cbfc6071 1343 struct filer_table *tab)
4aa3a715
SP		 1344{
1345 u32 i, and_index = 0, block_index = 1;
1346
1347 for (i = 0; i < tab->index; i++) {
1348
1349 /* LSByte of control = 0 sets a mask */
1350 if (!(tab->fe[i].ctrl & 0xF)) {
1351 mask_table[and_index].mask = tab->fe[i].prop;
1352 mask_table[and_index].start = i;
1353 mask_table[and_index].block = block_index;
1354 if (and_index >= 1)
1355 mask_table[and_index - 1].end = i - 1;
1356 and_index++;
1357 }
380b153c 1358 /* cluster starts and ends will be separated because they should
cbfc6071
JC		 1359 * hold their position
1360 */
4aa3a715
SP		 1361 if (tab->fe[i].ctrl & RQFCR_CLE)
1362 block_index++;
1363 /* A not set AND indicates the end of a depended block */
1364 if (!(tab->fe[i].ctrl & RQFCR_AND))
1365 block_index++;
4aa3a715
SP		 1366 }
1367
1368 mask_table[and_index - 1].end = i - 1;
1369
1370 return and_index;
1371}
1372
cbfc6071 1373/* Sorts the entries of mask_table by the values of the masks.
4aa3a715
SP		 1374 * Important: The 0xFF80 flags of the first and last entry of a
1375 * block must hold their position (which queue, CLusterEnable, ReJEct,
1376 * AND)
1377 */
1378static void gfar_sort_mask_table(struct gfar_mask_entry *mask_table,
cbfc6071 1379 struct filer_table *temp_table, u32 and_index)
4aa3a715
SP		 1380{
1381 /* Pointer to compare function (_asc or _desc) */
1382 int (*gfar_comp)(const void *, const void *);
1383
1384 u32 i, size = 0, start = 0, prev = 1;
1385 u32 old_first, old_last, new_first, new_last;
1386
1387 gfar_comp = &gfar_comp_desc;
1388
1389 for (i = 0; i < and_index; i++) {
4aa3a715
SP		 1390 if (prev != mask_table[i].block) {
1391 old_first = mask_table[start].start + 1;
1392 old_last = mask_table[i - 1].end;
1393 sort(mask_table + start, size,
cbfc6071
JC		 1394 sizeof(struct gfar_mask_entry),
1395 gfar_comp, &gfar_swap);
4aa3a715
SP		 1396
1397 /* Toggle order for every block. This makes the
cbfc6071
JC		 1398 * thing more efficient!
1399 */
4aa3a715
SP		 1400 if (gfar_comp == gfar_comp_desc)
1401 gfar_comp = &gfar_comp_asc;
1402 else
1403 gfar_comp = &gfar_comp_desc;
1404
1405 new_first = mask_table[start].start + 1;
1406 new_last = mask_table[i - 1].end;
1407
380b153c 1408 gfar_swap_bits(&temp_table->fe[new_first],
cbfc6071
JC		 1409 &temp_table->fe[old_first],
1410 &temp_table->fe[new_last],
1411 &temp_table->fe[old_last],
1412 RQFCR_QUEUE | RQFCR_CLE |
1413 RQFCR_RJE | RQFCR_AND);
4aa3a715
SP		 1414
1415 start = i;
1416 size = 0;
1417 }
1418 size++;
1419 prev = mask_table[i].block;
1420 }
4aa3a715
SP		 1421}
1422
cbfc6071 1423/* Reduces the number of masks needed in the filer table to save entries
4aa3a715
SP		 1424 * This is done by sorting the masks of a depended block. A depended block is
1425 * identified by gluing ANDs or CLE. The sorting order toggles after every
1426 * block. Of course entries in scope of a mask must change their location with
1427 * it.
1428 */
1429static int gfar_optimize_filer_masks(struct filer_table *tab)
1430{
1431 struct filer_table *temp_table;
1432 struct gfar_mask_entry *mask_table;
1433
1434 u32 and_index = 0, previous_mask = 0, i = 0, j = 0, size = 0;
1435 s32 ret = 0;
1436
1437 /* We need a copy of the filer table because
cbfc6071
JC		 1438 * we want to change its order
1439 */
b8ffdbd0 1440 temp_table = kmemdup(tab, sizeof(*temp_table), GFP_KERNEL);
4aa3a715
SP		 1441 if (temp_table == NULL)
1442 return -ENOMEM;
4aa3a715
SP		 1443
1444 mask_table = kcalloc(MAX_FILER_CACHE_IDX / 2 + 1,
cbfc6071 1445 sizeof(struct gfar_mask_entry), GFP_KERNEL);
4aa3a715
SP		 1446
1447 if (mask_table == NULL) {
1448 ret = -ENOMEM;
1449 goto end;
1450 }
1451
1452 and_index = gfar_generate_mask_table(mask_table, tab);
1453
1454 gfar_sort_mask_table(mask_table, temp_table, and_index);
1455
1456 /* Now we can copy the data from our duplicated filer table to
cbfc6071
JC		 1457 * the real one in the order the mask table says
1458 */
4aa3a715
SP		 1459 for (i = 0; i < and_index; i++) {
1460 size = mask_table[i].end - mask_table[i].start + 1;
1461 gfar_copy_filer_entries(&(tab->fe[j]),
1462 &(temp_table->fe[mask_table[i].start]), size);
1463 j += size;
1464 }
1465
1466 /* And finally we just have to check for duplicated masks and drop the
cbfc6071
JC		 1467 * second ones
1468 */
4aa3a715
SP		 1469 for (i = 0; i < tab->index && i < MAX_FILER_CACHE_IDX; i++) {
1470 if (tab->fe[i].ctrl == 0x80) {
1471 previous_mask = i++;
1472 break;
1473 }
1474 }
1475 for (; i < tab->index && i < MAX_FILER_CACHE_IDX; i++) {
1476 if (tab->fe[i].ctrl == 0x80) {
1477 if (tab->fe[i].prop == tab->fe[previous_mask].prop) {
1478 /* Two identical ones found!
cbfc6071
JC		 1479 * So drop the second one!
1480 */
4aa3a715
SP		 1481 gfar_trim_filer_entries(i, i, tab);
1482 } else
1483 /* Not identical! */
1484 previous_mask = i;
1485 }
1486 }
1487
1488 kfree(mask_table);
1489end: kfree(temp_table);
1490 return ret;
1491}
1492
1493/* Write the bit-pattern from software's buffer to hardware registers */
1494static int gfar_write_filer_table(struct gfar_private *priv,
cbfc6071 1495 struct filer_table *tab)
4aa3a715
SP		 1496{
1497 u32 i = 0;
1498 if (tab->index > MAX_FILER_IDX - 1)
1499 return -EBUSY;
1500
1501 /* Avoid inconsistent filer table to be processed */
1502 lock_rx_qs(priv);
1503
1504 /* Fill regular entries */
cbfc6071
JC		 1505 for (; i < MAX_FILER_IDX - 1 && (tab->fe[i].ctrl | tab->fe[i].ctrl);
1506 i++)
4aa3a715
SP		 1507 gfar_write_filer(priv, i, tab->fe[i].ctrl, tab->fe[i].prop);
1508 /* Fill the rest with fall-troughs */
1509 for (; i < MAX_FILER_IDX - 1; i++)
1510 gfar_write_filer(priv, i, 0x60, 0xFFFFFFFF);
1511 /* Last entry must be default accept
cbfc6071
JC		 1512 * because that's what people expect
1513 */
4aa3a715
SP		 1514 gfar_write_filer(priv, i, 0x20, 0x0);
1515
1516 unlock_rx_qs(priv);
1517
1518 return 0;
1519}
1520
1521static int gfar_check_capability(struct ethtool_rx_flow_spec *flow,
cbfc6071 1522 struct gfar_private *priv)
4aa3a715
SP		 1523{
1524
1525 if (flow->flow_type & FLOW_EXT) {
1526 if (~flow->m_ext.data[0] || ~flow->m_ext.data[1])
1527 netdev_warn(priv->ndev,
cbfc6071 1528 "User-specific data not supported!\n");
4aa3a715
SP		 1529 if (~flow->m_ext.vlan_etype)
1530 netdev_warn(priv->ndev,
cbfc6071 1531 "VLAN-etype not supported!\n");
4aa3a715
SP		 1532 }
1533 if (flow->flow_type == IP_USER_FLOW)
1534 if (flow->h_u.usr_ip4_spec.ip_ver != ETH_RX_NFC_IP4)
1535 netdev_warn(priv->ndev,
cbfc6071 1536 "IP-Version differing from IPv4 not supported!\n");
4aa3a715
SP		 1537
1538 return 0;
1539}
1540
1541static int gfar_process_filer_changes(struct gfar_private *priv)
1542{
1543 struct ethtool_flow_spec_container *j;
1544 struct filer_table *tab;
1545 s32 i = 0;
1546 s32 ret = 0;
1547
1548 /* So index is set to zero, too! */
1549 tab = kzalloc(sizeof(*tab), GFP_KERNEL);
1550 if (tab == NULL)
1551 return -ENOMEM;
1552
1553 /* Now convert the existing filer data from flow_spec into
cbfc6071
JC		 1554 * filer tables binary format
1555 */
4aa3a715
SP		 1556 list_for_each_entry(j, &priv->rx_list.list, list) {
1557 ret = gfar_convert_to_filer(&j->fs, tab);
1558 if (ret == -EBUSY) {
cbfc6071
JC		 1559 netdev_err(priv->ndev,
1560 "Rule not added: No free space!\n");
4aa3a715
SP		 1561 goto end;
1562 }
1563 if (ret == -1) {
cbfc6071
JC		 1564 netdev_err(priv->ndev,
1565 "Rule not added: Unsupported Flow-type!\n");
4aa3a715
SP		 1566 goto end;
1567 }
1568 }
1569
1570 i = tab->index;
1571
1572 /* Optimizations to save entries */
1573 gfar_cluster_filer(tab);
1574 gfar_optimize_filer_masks(tab);
1575
1576 pr_debug("\n\tSummary:\n"
cbfc6071
JC		 1577 "\tData on hardware: %d\n"
1578 "\tCompression rate: %d%%\n",
1579 tab->index, 100 - (100 * tab->index) / i);
4aa3a715
SP		 1580
1581 /* Write everything to hardware */
1582 ret = gfar_write_filer_table(priv, tab);
1583 if (ret == -EBUSY) {
1584 netdev_err(priv->ndev, "Rule not added: No free space!\n");
1585 goto end;
1586 }
1587
cbfc6071
JC		 1588end:
1589 kfree(tab);
4aa3a715
SP		 1590 return ret;
1591}
1592
1593static void gfar_invert_masks(struct ethtool_rx_flow_spec *flow)
1594{
1595 u32 i = 0;
1596
1597 for (i = 0; i < sizeof(flow->m_u); i++)
1598 flow->m_u.hdata[i] ^= 0xFF;
1599
1600 flow->m_ext.vlan_etype ^= 0xFFFF;
1601 flow->m_ext.vlan_tci ^= 0xFFFF;
1602 flow->m_ext.data[0] ^= ~0;
1603 flow->m_ext.data[1] ^= ~0;
1604}
1605
1606static int gfar_add_cls(struct gfar_private *priv,
cbfc6071 1607 struct ethtool_rx_flow_spec *flow)
4aa3a715
SP		 1608{
1609 struct ethtool_flow_spec_container *temp, *comp;
1610 int ret = 0;
1611
1612 temp = kmalloc(sizeof(*temp), GFP_KERNEL);
1613 if (temp == NULL)
1614 return -ENOMEM;
1615 memcpy(&temp->fs, flow, sizeof(temp->fs));
1616
1617 gfar_invert_masks(&temp->fs);
1618 ret = gfar_check_capability(&temp->fs, priv);
1619 if (ret)
1620 goto clean_mem;
1621 /* Link in the new element at the right @location */
1622 if (list_empty(&priv->rx_list.list)) {
1623 ret = gfar_check_filer_hardware(priv);
1624 if (ret != 0)
1625 goto clean_mem;
1626 list_add(&temp->list, &priv->rx_list.list);
1627 goto process;
1628 } else {
4aa3a715
SP		 1629 list_for_each_entry(comp, &priv->rx_list.list, list) {
1630 if (comp->fs.location > flow->location) {
1631 list_add_tail(&temp->list, &comp->list);
1632 goto process;
1633 }
1634 if (comp->fs.location == flow->location) {
1635 netdev_err(priv->ndev,
cbfc6071
JC		 1636 "Rule not added: ID %d not free!\n",
1637 flow->location);
4aa3a715
SP		 1638 ret = -EBUSY;
1639 goto clean_mem;
1640 }
1641 }
1642 list_add_tail(&temp->list, &priv->rx_list.list);
1643 }
1644
1645process:
1646 ret = gfar_process_filer_changes(priv);
1647 if (ret)
1648 goto clean_list;
1649 priv->rx_list.count++;
1650 return ret;
1651
1652clean_list:
1653 list_del(&temp->list);
1654clean_mem:
1655 kfree(temp);
1656 return ret;
1657}
1658
1659static int gfar_del_cls(struct gfar_private *priv, u32 loc)
1660{
1661 struct ethtool_flow_spec_container *comp;
1662 u32 ret = -EINVAL;
1663
1664 if (list_empty(&priv->rx_list.list))
1665 return ret;
1666
1667 list_for_each_entry(comp, &priv->rx_list.list, list) {
1668 if (comp->fs.location == loc) {
1669 list_del(&comp->list);
1670 kfree(comp);
1671 priv->rx_list.count--;
1672 gfar_process_filer_changes(priv);
1673 ret = 0;
1674 break;
1675 }
1676 }
1677
1678 return ret;
4aa3a715
SP		 1679}
1680
1681static int gfar_get_cls(struct gfar_private *priv, struct ethtool_rxnfc *cmd)
1682{
1683 struct ethtool_flow_spec_container *comp;
1684 u32 ret = -EINVAL;
1685
1686 list_for_each_entry(comp, &priv->rx_list.list, list) {
1687 if (comp->fs.location == cmd->fs.location) {
1688 memcpy(&cmd->fs, &comp->fs, sizeof(cmd->fs));
1689 gfar_invert_masks(&cmd->fs);
1690 ret = 0;
1691 break;
1692 }
1693 }
1694
1695 return ret;
1696}
1697
1698static int gfar_get_cls_all(struct gfar_private *priv,
cbfc6071 1699 struct ethtool_rxnfc *cmd, u32 *rule_locs)
4aa3a715
SP		 1700{
1701 struct ethtool_flow_spec_container *comp;
1702 u32 i = 0;
1703
1704 list_for_each_entry(comp, &priv->rx_list.list, list) {
710778ff
BH		 1705 if (i == cmd->rule_cnt)
1706 return -EMSGSIZE;
1707 rule_locs[i] = comp->fs.location;
1708 i++;
4aa3a715
SP		 1709 }
1710
1711 cmd->data = MAX_FILER_IDX;
473e64ee 1712 cmd->rule_cnt = i;
4aa3a715
SP		 1713
1714 return 0;
1715}
1716
7a8b3372
SG		 1717static int gfar_set_nfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
1718{
1719 struct gfar_private *priv = netdev_priv(dev);
1720 int ret = 0;
1721
4aa3a715
SP		 1722 mutex_lock(&priv->rx_queue_access);
1723
1724 switch (cmd->cmd) {
7a8b3372
SG		 1725 case ETHTOOL_SRXFH:
1726 ret = gfar_set_hash_opts(priv, cmd);
1727 break;
4aa3a715 1728 case ETHTOOL_SRXCLSRLINS:
3a73e49c
BH		 1729 if ((cmd->fs.ring_cookie != RX_CLS_FLOW_DISC &&
1730 cmd->fs.ring_cookie >= priv->num_rx_queues) ||
1731 cmd->fs.location >= MAX_FILER_IDX) {
4aa3a715
SP		 1732 ret = -EINVAL;
1733 break;
1734 }
1735 ret = gfar_add_cls(priv, &cmd->fs);
1736 break;
1737 case ETHTOOL_SRXCLSRLDEL:
1738 ret = gfar_del_cls(priv, cmd->fs.location);
1739 break;
7a8b3372
SG		 1740 default:
1741 ret = -EINVAL;
1742 }
1743
4aa3a715
SP		 1744 mutex_unlock(&priv->rx_queue_access);
1745
1746 return ret;
1747}
1748
1749static int gfar_get_nfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
cbfc6071 1750 u32 *rule_locs)
4aa3a715
SP		 1751{
1752 struct gfar_private *priv = netdev_priv(dev);
1753 int ret = 0;
1754
1755 switch (cmd->cmd) {
1756 case ETHTOOL_GRXRINGS:
1757 cmd->data = priv->num_rx_queues;
1758 break;
1759 case ETHTOOL_GRXCLSRLCNT:
1760 cmd->rule_cnt = priv->rx_list.count;
1761 break;
1762 case ETHTOOL_GRXCLSRULE:
1763 ret = gfar_get_cls(priv, cmd);
1764 break;
1765 case ETHTOOL_GRXCLSRLALL:
815c7db5 1766 ret = gfar_get_cls_all(priv, cmd, rule_locs);
4aa3a715
SP		 1767 break;
1768 default:
1769 ret = -EINVAL;
1770 break;
1771 }
1772
7a8b3372
SG		 1773 return ret;
1774}
1775
66636287 1776int gfar_phc_index = -1;
28889b7e 1777EXPORT_SYMBOL(gfar_phc_index);
66636287
RC		 1778
1779static int gfar_get_ts_info(struct net_device *dev,
1780 struct ethtool_ts_info *info)
1781{
1782 struct gfar_private *priv = netdev_priv(dev);
1783
1784 if (!(priv->device_flags & FSL_GIANFAR_DEV_HAS_TIMER)) {
cbfc6071
JC		 1785 info->so_timestamping = SOF_TIMESTAMPING_RX_SOFTWARE |
1786 SOF_TIMESTAMPING_SOFTWARE;
66636287
RC		 1787 info->phc_index = -1;
1788 return 0;
1789 }
cbfc6071
JC		 1790 info->so_timestamping = SOF_TIMESTAMPING_TX_HARDWARE |
1791 SOF_TIMESTAMPING_RX_HARDWARE |
1792 SOF_TIMESTAMPING_RAW_HARDWARE;
66636287 1793 info->phc_index = gfar_phc_index;
cbfc6071
JC		 1794 info->tx_types = (1 << HWTSTAMP_TX_OFF) |
1795 (1 << HWTSTAMP_TX_ON);
1796 info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) |
1797 (1 << HWTSTAMP_FILTER_ALL);
66636287
RC		 1798 return 0;
1799}
1800
7282d491 1801const struct ethtool_ops gfar_ethtool_ops = {
1da177e4 1802 .get_settings = gfar_gsettings,
bb40dcbb 1803 .set_settings = gfar_ssettings,
1da177e4
LT		 1804 .get_drvinfo = gfar_gdrvinfo,
1805 .get_regs_len = gfar_reglen,
1806 .get_regs = gfar_get_regs,
1807 .get_link = ethtool_op_get_link,
1808 .get_coalesce = gfar_gcoalesce,
1809 .set_coalesce = gfar_scoalesce,
1810 .get_ringparam = gfar_gringparam,
1811 .set_ringparam = gfar_sringparam,
1812 .get_strings = gfar_gstrings,
b9f2c044 1813 .get_sset_count = gfar_sset_count,
1da177e4 1814 .get_ethtool_stats = gfar_fill_stats,
0bbaf069
KG		 1815 .get_msglevel = gfar_get_msglevel,
1816 .set_msglevel = gfar_set_msglevel,
d87eb127
SW		 1817#ifdef CONFIG_PM
1818 .get_wol = gfar_get_wol,
1819 .set_wol = gfar_set_wol,
1820#endif
7a8b3372 1821 .set_rxnfc = gfar_set_nfc,
4aa3a715 1822 .get_rxnfc = gfar_get_nfc,
66636287 1823 .get_ts_info = gfar_get_ts_info,
1da177e4 1824};
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