projects / mirror_ubuntu-bionic-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| 84844054 S |
1 | /* |
| 2 | * Copyright (c) 2016~2017 Hisilicon Limited. | |
| 3 | * | |
| 4 | * This program is free software; you can redistribute it and/or modify | |
| 5 | * it under the terms of the GNU General Public License as published by | |
| 6 | * the Free Software Foundation; either version 2 of the License, or | |
| 7 | * (at your option) any later version. | |
| 8 | */ | |
| 9 | ||
| 10 | #ifndef __HCLGE_TM_H | |
| 11 | #define __HCLGE_TM_H | |
| 12 | ||
| 13 | #include <linux/types.h> | |
| 14 | ||
| 15 | /* MAC Pause */ | |
| 16 | #define HCLGE_TX_MAC_PAUSE_EN_MSK BIT(0) | |
| 17 | #define HCLGE_RX_MAC_PAUSE_EN_MSK BIT(1) | |
| 18 | ||
| 19 | #define HCLGE_TM_PORT_BASE_MODE_MSK BIT(0) | |
| 20 | ||
| 21 | /* SP or DWRR */ | |
| 22 | #define HCLGE_TM_TX_SCHD_DWRR_MSK BIT(0) | |
| 23 | #define HCLGE_TM_TX_SCHD_SP_MSK (0xFE) | |
| 24 | ||
| 25 | struct hclge_pg_to_pri_link_cmd { | |
| 26 | u8 pg_id; | |
| 27 | u8 rsvd1[3]; | |
| 28 | u8 pri_bit_map; | |
| 29 | }; | |
| 30 | ||
| 31 | struct hclge_qs_to_pri_link_cmd { | |
| 32 | __le16 qs_id; | |
| 33 | __le16 rsvd; | |
| 34 | u8 priority; | |
| 35 | #define HCLGE_TM_QS_PRI_LINK_VLD_MSK BIT(0) | |
| 36 | u8 link_vld; | |
| 37 | }; | |
| 38 | ||
| 39 | struct hclge_nq_to_qs_link_cmd { | |
| 40 | __le16 nq_id; | |
| 41 | __le16 rsvd; | |
| 42 | #define HCLGE_TM_Q_QS_LINK_VLD_MSK BIT(10) | |
| 43 | __le16 qset_id; | |
| 44 | }; | |
| 45 | ||
| 46 | struct hclge_pg_weight_cmd { | |
| 47 | u8 pg_id; | |
| 48 | u8 dwrr; | |
| 49 | }; | |
| 50 | ||
| 51 | struct hclge_priority_weight_cmd { | |
| 52 | u8 pri_id; | |
| 53 | u8 dwrr; | |
| 54 | }; | |
| 55 | ||
| 56 | struct hclge_qs_weight_cmd { | |
| 57 | __le16 qs_id; | |
| 58 | u8 dwrr; | |
| 59 | }; | |
| 60 | ||
| 61 | #define HCLGE_TM_SHAP_IR_B_MSK GENMASK(7, 0) | |
| 62 | #define HCLGE_TM_SHAP_IR_B_LSH 0 | |
| 63 | #define HCLGE_TM_SHAP_IR_U_MSK GENMASK(11, 8) | |
| 64 | #define HCLGE_TM_SHAP_IR_U_LSH 8 | |
| 65 | #define HCLGE_TM_SHAP_IR_S_MSK GENMASK(15, 12) | |
| 66 | #define HCLGE_TM_SHAP_IR_S_LSH 12 | |
| 67 | #define HCLGE_TM_SHAP_BS_B_MSK GENMASK(20, 16) | |
| 68 | #define HCLGE_TM_SHAP_BS_B_LSH 16 | |
| 69 | #define HCLGE_TM_SHAP_BS_S_MSK GENMASK(25, 21) | |
| 70 | #define HCLGE_TM_SHAP_BS_S_LSH 21 | |
| 71 | ||
| 72 | enum hclge_shap_bucket { | |
| 73 | HCLGE_TM_SHAP_C_BUCKET = 0, | |
| 74 | HCLGE_TM_SHAP_P_BUCKET, | |
| 75 | }; | |
| 76 | ||
| 77 | struct hclge_pri_shapping_cmd { | |
| 78 | u8 pri_id; | |
| 79 | u8 rsvd[3]; | |
| 80 | __le32 pri_shapping_para; | |
| 81 | }; | |
| 82 | ||
| 83 | struct hclge_pg_shapping_cmd { | |
| 84 | u8 pg_id; | |
| 85 | u8 rsvd[3]; | |
| 86 | __le32 pg_shapping_para; | |
| 87 | }; | |
| 88 | ||
| 89 | struct hclge_bp_to_qs_map_cmd { | |
| 90 | u8 tc_id; | |
| 91 | u8 rsvd[2]; | |
| 92 | u8 qs_group_id; | |
| 93 | __le32 qs_bit_map; | |
| 94 | u32 rsvd1; | |
| 95 | }; | |
| 96 | ||
| 9dc2145d YL |
97 | struct hclge_pfc_en_cmd { |
| 98 | u8 tx_rx_en_bitmap; | |
| 99 | u8 pri_en_bitmap; | |
| 100 | }; | |
| 101 | ||
| 0a5677d3 YL |
102 | struct hclge_port_shapping_cmd { |
| 103 | __le32 port_shapping_para; | |
| 104 | }; | |
| 105 | ||
| c4726338 | 106 | #define hclge_tm_set_field(dest, string, val) \ |
| 84844054 S |
107 | hnae_set_field((dest), (HCLGE_TM_SHAP_##string##_MSK), \ |
| 108 | (HCLGE_TM_SHAP_##string##_LSH), val) | |
| c4726338 | 109 | #define hclge_tm_get_field(src, string) \ |
| 84844054 S |
110 | hnae_get_field((src), (HCLGE_TM_SHAP_##string##_MSK), \ |
| 111 | (HCLGE_TM_SHAP_##string##_LSH)) | |
| 112 | ||
| 113 | int hclge_tm_schd_init(struct hclge_dev *hdev); | |
| 114 | int hclge_pause_setup_hw(struct hclge_dev *hdev); | |
| 77f255c1 YL |
115 | int hclge_tm_schd_mode_hw(struct hclge_dev *hdev); |
| 116 | int hclge_tm_prio_tc_info_update(struct hclge_dev *hdev, u8 *prio_tc); | |
| 117 | void hclge_tm_schd_info_update(struct hclge_dev *hdev, u8 num_tc); | |
| 118 | int hclge_tm_dwrr_cfg(struct hclge_dev *hdev); | |
| 119 | int hclge_tm_map_cfg(struct hclge_dev *hdev); | |
| 120 | int hclge_tm_init_hw(struct hclge_dev *hdev); | |
| 09ea401e | 121 | int hclge_mac_pause_en_cfg(struct hclge_dev *hdev, bool tx, bool rx); |
| 84844054 | 122 | #endif |