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igb: implement 580 MDI setting support
[mirror_ubuntu-eoan-kernel.git] / drivers / net / ethernet / intel / e1000 / e1000_ethtool.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
0abb6eb1
AK		 3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK		 16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT		 22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29/* ethtool support for e1000 */
30
31#include "e1000.h"
1da177e4
LT		 32#include <asm/uaccess.h>
33
8328c38f
AK		 34enum {NETDEV_STATS, E1000_STATS};
35
1da177e4
LT		 36struct e1000_stats {
37 char stat_string[ETH_GSTRING_LEN];
8328c38f 38 int type;
1da177e4
LT		 39 int sizeof_stat;
40 int stat_offset;
41};
42
8328c38f
AK		 43#define E1000_STAT(m) E1000_STATS, \
44 sizeof(((struct e1000_adapter *)0)->m), \
45 offsetof(struct e1000_adapter, m)
46#define E1000_NETDEV_STAT(m) NETDEV_STATS, \
47 sizeof(((struct net_device *)0)->m), \
48 offsetof(struct net_device, m)
49
1da177e4 50static const struct e1000_stats e1000_gstrings_stats[] = {
49559854
MW		 51 { "rx_packets", E1000_STAT(stats.gprc) },
52 { "tx_packets", E1000_STAT(stats.gptc) },
53 { "rx_bytes", E1000_STAT(stats.gorcl) },
54 { "tx_bytes", E1000_STAT(stats.gotcl) },
55 { "rx_broadcast", E1000_STAT(stats.bprc) },
56 { "tx_broadcast", E1000_STAT(stats.bptc) },
57 { "rx_multicast", E1000_STAT(stats.mprc) },
58 { "tx_multicast", E1000_STAT(stats.mptc) },
59 { "rx_errors", E1000_STAT(stats.rxerrc) },
60 { "tx_errors", E1000_STAT(stats.txerrc) },
5fe31def 61 { "tx_dropped", E1000_NETDEV_STAT(stats.tx_dropped) },
49559854
MW		 62 { "multicast", E1000_STAT(stats.mprc) },
63 { "collisions", E1000_STAT(stats.colc) },
64 { "rx_length_errors", E1000_STAT(stats.rlerrc) },
5fe31def 65 { "rx_over_errors", E1000_NETDEV_STAT(stats.rx_over_errors) },
49559854 66 { "rx_crc_errors", E1000_STAT(stats.crcerrs) },
5fe31def 67 { "rx_frame_errors", E1000_NETDEV_STAT(stats.rx_frame_errors) },
2648345f 68 { "rx_no_buffer_count", E1000_STAT(stats.rnbc) },
49559854
MW		 69 { "rx_missed_errors", E1000_STAT(stats.mpc) },
70 { "tx_aborted_errors", E1000_STAT(stats.ecol) },
71 { "tx_carrier_errors", E1000_STAT(stats.tncrs) },
5fe31def
AK		 72 { "tx_fifo_errors", E1000_NETDEV_STAT(stats.tx_fifo_errors) },
73 { "tx_heartbeat_errors", E1000_NETDEV_STAT(stats.tx_heartbeat_errors) },
49559854 74 { "tx_window_errors", E1000_STAT(stats.latecol) },
1da177e4
LT		 75 { "tx_abort_late_coll", E1000_STAT(stats.latecol) },
76 { "tx_deferred_ok", E1000_STAT(stats.dc) },
77 { "tx_single_coll_ok", E1000_STAT(stats.scc) },
78 { "tx_multi_coll_ok", E1000_STAT(stats.mcc) },
6b7660cd 79 { "tx_timeout_count", E1000_STAT(tx_timeout_count) },
fcfb1224 80 { "tx_restart_queue", E1000_STAT(restart_queue) },
1da177e4
LT		 81 { "rx_long_length_errors", E1000_STAT(stats.roc) },
82 { "rx_short_length_errors", E1000_STAT(stats.ruc) },
83 { "rx_align_errors", E1000_STAT(stats.algnerrc) },
84 { "tx_tcp_seg_good", E1000_STAT(stats.tsctc) },
85 { "tx_tcp_seg_failed", E1000_STAT(stats.tsctfc) },
86 { "rx_flow_control_xon", E1000_STAT(stats.xonrxc) },
87 { "rx_flow_control_xoff", E1000_STAT(stats.xoffrxc) },
88 { "tx_flow_control_xon", E1000_STAT(stats.xontxc) },
89 { "tx_flow_control_xoff", E1000_STAT(stats.xofftxc) },
90 { "rx_long_byte_count", E1000_STAT(stats.gorcl) },
91 { "rx_csum_offload_good", E1000_STAT(hw_csum_good) },
e4c811c9 92 { "rx_csum_offload_errors", E1000_STAT(hw_csum_err) },
6b7660cd 93 { "alloc_rx_buff_failed", E1000_STAT(alloc_rx_buff_failed) },
15e376b4
JG		 94 { "tx_smbus", E1000_STAT(stats.mgptc) },
95 { "rx_smbus", E1000_STAT(stats.mgprc) },
96 { "dropped_smbus", E1000_STAT(stats.mgpdc) },
1da177e4 97};
7bfa4816 98
7bfa4816 99#define E1000_QUEUE_STATS_LEN 0
ff8ac609 100#define E1000_GLOBAL_STATS_LEN ARRAY_SIZE(e1000_gstrings_stats)
7bfa4816 101#define E1000_STATS_LEN (E1000_GLOBAL_STATS_LEN + E1000_QUEUE_STATS_LEN)
1da177e4
LT		 102static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = {
103 "Register test (offline)", "Eeprom test (offline)",
104 "Interrupt test (offline)", "Loopback test (offline)",
105 "Link test (on/offline)"
106};
4c3616cd 107#define E1000_TEST_LEN ARRAY_SIZE(e1000_gstrings_test)
1da177e4 108
64798845
JP		 109static int e1000_get_settings(struct net_device *netdev,
110 struct ethtool_cmd *ecmd)
1da177e4 111{
60490fe0 112 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 113 struct e1000_hw *hw = &adapter->hw;
114
96838a40 115 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 116
117 ecmd->supported = (SUPPORTED_10baseT_Half |
118 SUPPORTED_10baseT_Full |
119 SUPPORTED_100baseT_Half |
120 SUPPORTED_100baseT_Full |
121 SUPPORTED_1000baseT_Full|
122 SUPPORTED_Autoneg |
123 SUPPORTED_TP);
1da177e4
LT		 124 ecmd->advertising = ADVERTISED_TP;
125
96838a40 126 if (hw->autoneg == 1) {
1da177e4 127 ecmd->advertising |= ADVERTISED_Autoneg;
1da177e4 128 /* the e1000 autoneg seems to match ethtool nicely */
1da177e4
LT		 129 ecmd->advertising |= hw->autoneg_advertised;
130 }
131
132 ecmd->port = PORT_TP;
133 ecmd->phy_address = hw->phy_addr;
134
96838a40 135 if (hw->mac_type == e1000_82543)
1da177e4
LT		 136 ecmd->transceiver = XCVR_EXTERNAL;
137 else
138 ecmd->transceiver = XCVR_INTERNAL;
139
140 } else {
141 ecmd->supported = (SUPPORTED_1000baseT_Full |
142 SUPPORTED_FIBRE |
143 SUPPORTED_Autoneg);
144
012609a8
MC		 145 ecmd->advertising = (ADVERTISED_1000baseT_Full |
146 ADVERTISED_FIBRE |
147 ADVERTISED_Autoneg);
1da177e4
LT		 148
149 ecmd->port = PORT_FIBRE;
150
96838a40 151 if (hw->mac_type >= e1000_82545)
1da177e4
LT		 152 ecmd->transceiver = XCVR_INTERNAL;
153 else
154 ecmd->transceiver = XCVR_EXTERNAL;
155 }
156
1dc32918 157 if (er32(STATUS) & E1000_STATUS_LU) {
1da177e4
LT		 158
159 e1000_get_speed_and_duplex(hw, &adapter->link_speed,
160 &adapter->link_duplex);
70739497 161 ethtool_cmd_speed_set(ecmd, adapter->link_speed);
1da177e4 162
25985edc 163 /* unfortunately FULL_DUPLEX != DUPLEX_FULL
1da177e4
LT		 164 * and HALF_DUPLEX != DUPLEX_HALF */
165
96838a40 166 if (adapter->link_duplex == FULL_DUPLEX)
1da177e4
LT		 167 ecmd->duplex = DUPLEX_FULL;
168 else
169 ecmd->duplex = DUPLEX_HALF;
170 } else {
70739497 171 ethtool_cmd_speed_set(ecmd, -1);
1da177e4
LT		 172 ecmd->duplex = -1;
173 }
174
175 ecmd->autoneg = ((hw->media_type == e1000_media_type_fiber) ||
176 hw->autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
177 return 0;
178}
179
64798845
JP		 180static int e1000_set_settings(struct net_device *netdev,
181 struct ethtool_cmd *ecmd)
1da177e4 182{
60490fe0 183 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 184 struct e1000_hw *hw = &adapter->hw;
185
1a821ca5
JB		 186 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
187 msleep(1);
188
57128197 189 if (ecmd->autoneg == AUTONEG_ENABLE) {
1da177e4 190 hw->autoneg = 1;
96838a40 191 if (hw->media_type == e1000_media_type_fiber)
012609a8
MC		 192 hw->autoneg_advertised = ADVERTISED_1000baseT_Full |
193 ADVERTISED_FIBRE |
194 ADVERTISED_Autoneg;
96838a40 195 else
2f2ca263
JK		 196 hw->autoneg_advertised = ecmd->advertising |
197 ADVERTISED_TP |
198 ADVERTISED_Autoneg;
012609a8 199 ecmd->advertising = hw->autoneg_advertised;
25db0338
DD		 200 } else {
201 u32 speed = ethtool_cmd_speed(ecmd);
14ad2513 202 if (e1000_set_spd_dplx(adapter, speed, ecmd->duplex)) {
1a821ca5 203 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4 204 return -EINVAL;
1a821ca5 205 }
25db0338 206 }
1da177e4
LT		 207
208 /* reset the link */
209
1a821ca5
JB		 210 if (netif_running(adapter->netdev)) {
211 e1000_down(adapter);
212 e1000_up(adapter);
213 } else
1da177e4
LT		 214 e1000_reset(adapter);
215
1a821ca5 216 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 217 return 0;
218}
219
b548192a
NN		 220static u32 e1000_get_link(struct net_device *netdev)
221{
222 struct e1000_adapter *adapter = netdev_priv(netdev);
223
224 /*
225 * If the link is not reported up to netdev, interrupts are disabled,
226 * and so the physical link state may have changed since we last
227 * looked. Set get_link_status to make sure that the true link
228 * state is interrogated, rather than pulling a cached and possibly
229 * stale link state from the driver.
230 */
231 if (!netif_carrier_ok(netdev))
232 adapter->hw.get_link_status = 1;
233
234 return e1000_has_link(adapter);
235}
236
64798845
JP		 237static void e1000_get_pauseparam(struct net_device *netdev,
238 struct ethtool_pauseparam *pause)
1da177e4 239{
60490fe0 240 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 241 struct e1000_hw *hw = &adapter->hw;
242
96838a40 243 pause->autoneg =
1da177e4 244 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
96838a40 245
11241b10 246 if (hw->fc == E1000_FC_RX_PAUSE)
1da177e4 247 pause->rx_pause = 1;
11241b10 248 else if (hw->fc == E1000_FC_TX_PAUSE)
1da177e4 249 pause->tx_pause = 1;
11241b10 250 else if (hw->fc == E1000_FC_FULL) {
1da177e4
LT		 251 pause->rx_pause = 1;
252 pause->tx_pause = 1;
253 }
254}
255
64798845
JP		 256static int e1000_set_pauseparam(struct net_device *netdev,
257 struct ethtool_pauseparam *pause)
1da177e4 258{
60490fe0 259 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 260 struct e1000_hw *hw = &adapter->hw;
1a821ca5 261 int retval = 0;
96838a40 262
1da177e4
LT		 263 adapter->fc_autoneg = pause->autoneg;
264
1a821ca5
JB		 265 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
266 msleep(1);
267
96838a40 268 if (pause->rx_pause && pause->tx_pause)
11241b10 269 hw->fc = E1000_FC_FULL;
96838a40 270 else if (pause->rx_pause && !pause->tx_pause)
11241b10 271 hw->fc = E1000_FC_RX_PAUSE;
96838a40 272 else if (!pause->rx_pause && pause->tx_pause)
11241b10 273 hw->fc = E1000_FC_TX_PAUSE;
96838a40 274 else if (!pause->rx_pause && !pause->tx_pause)
11241b10 275 hw->fc = E1000_FC_NONE;
1da177e4
LT		 276
277 hw->original_fc = hw->fc;
278
96838a40 279 if (adapter->fc_autoneg == AUTONEG_ENABLE) {
1a821ca5
JB		 280 if (netif_running(adapter->netdev)) {
281 e1000_down(adapter);
282 e1000_up(adapter);
283 } else
1da177e4 284 e1000_reset(adapter);
96838a40 285 } else
1a821ca5 286 retval = ((hw->media_type == e1000_media_type_fiber) ?
90fb5135 287 e1000_setup_link(hw) : e1000_force_mac_fc(hw));
96838a40 288
1a821ca5
JB		 289 clear_bit(__E1000_RESETTING, &adapter->flags);
290 return retval;
1da177e4
LT		 291}
292
64798845 293static u32 e1000_get_msglevel(struct net_device *netdev)
1da177e4 294{
60490fe0 295 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 296 return adapter->msg_enable;
297}
298
64798845 299static void e1000_set_msglevel(struct net_device *netdev, u32 data)
1da177e4 300{
60490fe0 301 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 302 adapter->msg_enable = data;
303}
304
64798845 305static int e1000_get_regs_len(struct net_device *netdev)
1da177e4
LT		 306{
307#define E1000_REGS_LEN 32
406874a7 308 return E1000_REGS_LEN * sizeof(u32);
1da177e4
LT		 309}
310
64798845
JP		 311static void e1000_get_regs(struct net_device *netdev, struct ethtool_regs *regs,
312 void *p)
1da177e4 313{
60490fe0 314 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 315 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 316 u32 *regs_buff = p;
317 u16 phy_data;
1da177e4 318
406874a7 319 memset(p, 0, E1000_REGS_LEN * sizeof(u32));
1da177e4
LT		 320
321 regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
322
1dc32918
JP		 323 regs_buff[0] = er32(CTRL);
324 regs_buff[1] = er32(STATUS);
1da177e4 325
1dc32918
JP		 326 regs_buff[2] = er32(RCTL);
327 regs_buff[3] = er32(RDLEN);
328 regs_buff[4] = er32(RDH);
329 regs_buff[5] = er32(RDT);
330 regs_buff[6] = er32(RDTR);
1da177e4 331
1dc32918
JP		 332 regs_buff[7] = er32(TCTL);
333 regs_buff[8] = er32(TDLEN);
334 regs_buff[9] = er32(TDH);
335 regs_buff[10] = er32(TDT);
336 regs_buff[11] = er32(TIDV);
1da177e4 337
1dc32918 338 regs_buff[12] = hw->phy_type; /* PHY type (IGP=1, M88=0) */
96838a40 339 if (hw->phy_type == e1000_phy_igp) {
1da177e4
LT		 340 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
341 IGP01E1000_PHY_AGC_A);
342 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_A &
343 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 344 regs_buff[13] = (u32)phy_data; /* cable length */
1da177e4
LT		 345 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
346 IGP01E1000_PHY_AGC_B);
347 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_B &
348 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 349 regs_buff[14] = (u32)phy_data; /* cable length */
1da177e4
LT		 350 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
351 IGP01E1000_PHY_AGC_C);
352 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_C &
353 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 354 regs_buff[15] = (u32)phy_data; /* cable length */
1da177e4
LT		 355 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
356 IGP01E1000_PHY_AGC_D);
357 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_D &
358 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 359 regs_buff[16] = (u32)phy_data; /* cable length */
1da177e4
LT		 360 regs_buff[17] = 0; /* extended 10bt distance (not needed) */
361 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
362 e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS &
363 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 364 regs_buff[18] = (u32)phy_data; /* cable polarity */
1da177e4
LT		 365 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
366 IGP01E1000_PHY_PCS_INIT_REG);
367 e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG &
368 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 369 regs_buff[19] = (u32)phy_data; /* cable polarity */
1da177e4
LT		 370 regs_buff[20] = 0; /* polarity correction enabled (always) */
371 regs_buff[22] = 0; /* phy receive errors (unavailable) */
372 regs_buff[23] = regs_buff[18]; /* mdix mode */
373 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
374 } else {
8fc897b0 375 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
406874a7 376 regs_buff[13] = (u32)phy_data; /* cable length */
1da177e4
LT		 377 regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */
378 regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */
379 regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */
8fc897b0 380 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
406874a7 381 regs_buff[17] = (u32)phy_data; /* extended 10bt distance */
1da177e4
LT		 382 regs_buff[18] = regs_buff[13]; /* cable polarity */
383 regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */
384 regs_buff[20] = regs_buff[17]; /* polarity correction */
385 /* phy receive errors */
386 regs_buff[22] = adapter->phy_stats.receive_errors;
387 regs_buff[23] = regs_buff[13]; /* mdix mode */
388 }
389 regs_buff[21] = adapter->phy_stats.idle_errors; /* phy idle errors */
390 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
406874a7 391 regs_buff[24] = (u32)phy_data; /* phy local receiver status */
1da177e4 392 regs_buff[25] = regs_buff[24]; /* phy remote receiver status */
96838a40 393 if (hw->mac_type >= e1000_82540 &&
4ccc12ae 394 hw->media_type == e1000_media_type_copper) {
1dc32918 395 regs_buff[26] = er32(MANC);
1da177e4
LT		 396 }
397}
398
64798845 399static int e1000_get_eeprom_len(struct net_device *netdev)
1da177e4 400{
60490fe0 401 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918
JP		 402 struct e1000_hw *hw = &adapter->hw;
403
404 return hw->eeprom.word_size * 2;
1da177e4
LT		 405}
406
64798845
JP		 407static int e1000_get_eeprom(struct net_device *netdev,
408 struct ethtool_eeprom *eeprom, u8 *bytes)
1da177e4 409{
60490fe0 410 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 411 struct e1000_hw *hw = &adapter->hw;
406874a7 412 u16 *eeprom_buff;
1da177e4
LT		 413 int first_word, last_word;
414 int ret_val = 0;
406874a7 415 u16 i;
1da177e4 416
96838a40 417 if (eeprom->len == 0)
1da177e4
LT		 418 return -EINVAL;
419
420 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
421
422 first_word = eeprom->offset >> 1;
423 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
424
406874a7 425 eeprom_buff = kmalloc(sizeof(u16) *
1da177e4 426 (last_word - first_word + 1), GFP_KERNEL);
96838a40 427 if (!eeprom_buff)
1da177e4
LT		 428 return -ENOMEM;
429
96838a40 430 if (hw->eeprom.type == e1000_eeprom_spi)
1da177e4
LT		 431 ret_val = e1000_read_eeprom(hw, first_word,
432 last_word - first_word + 1,
433 eeprom_buff);
434 else {
c7be73bc
JP		 435 for (i = 0; i < last_word - first_word + 1; i++) {
436 ret_val = e1000_read_eeprom(hw, first_word + i, 1,
437 &eeprom_buff[i]);
438 if (ret_val)
1da177e4 439 break;
c7be73bc 440 }
1da177e4
LT		 441 }
442
443 /* Device's eeprom is always little-endian, word addressable */
444 for (i = 0; i < last_word - first_word + 1; i++)
445 le16_to_cpus(&eeprom_buff[i]);
446
406874a7 447 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1),
1da177e4
LT		 448 eeprom->len);
449 kfree(eeprom_buff);
450
451 return ret_val;
452}
453
64798845
JP		 454static int e1000_set_eeprom(struct net_device *netdev,
455 struct ethtool_eeprom *eeprom, u8 *bytes)
1da177e4 456{
60490fe0 457 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 458 struct e1000_hw *hw = &adapter->hw;
406874a7 459 u16 *eeprom_buff;
1da177e4
LT		 460 void *ptr;
461 int max_len, first_word, last_word, ret_val = 0;
406874a7 462 u16 i;
1da177e4 463
96838a40 464 if (eeprom->len == 0)
1da177e4
LT		 465 return -EOPNOTSUPP;
466
96838a40 467 if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
1da177e4
LT		 468 return -EFAULT;
469
470 max_len = hw->eeprom.word_size * 2;
471
472 first_word = eeprom->offset >> 1;
473 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
474 eeprom_buff = kmalloc(max_len, GFP_KERNEL);
96838a40 475 if (!eeprom_buff)
1da177e4
LT		 476 return -ENOMEM;
477
478 ptr = (void *)eeprom_buff;
479
96838a40 480 if (eeprom->offset & 1) {
1da177e4
LT		 481 /* need read/modify/write of first changed EEPROM word */
482 /* only the second byte of the word is being modified */
483 ret_val = e1000_read_eeprom(hw, first_word, 1,
484 &eeprom_buff[0]);
485 ptr++;
486 }
96838a40 487 if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
1da177e4
LT		 488 /* need read/modify/write of last changed EEPROM word */
489 /* only the first byte of the word is being modified */
490 ret_val = e1000_read_eeprom(hw, last_word, 1,
491 &eeprom_buff[last_word - first_word]);
492 }
493
494 /* Device's eeprom is always little-endian, word addressable */
495 for (i = 0; i < last_word - first_word + 1; i++)
496 le16_to_cpus(&eeprom_buff[i]);
497
498 memcpy(ptr, bytes, eeprom->len);
499
500 for (i = 0; i < last_word - first_word + 1; i++)
501 eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
502
503 ret_val = e1000_write_eeprom(hw, first_word,
504 last_word - first_word + 1, eeprom_buff);
505
1532ecea
JB		 506 /* Update the checksum over the first part of the EEPROM if needed */
507 if ((ret_val == 0) && (first_word <= EEPROM_CHECKSUM_REG))
1da177e4
LT		 508 e1000_update_eeprom_checksum(hw);
509
510 kfree(eeprom_buff);
511 return ret_val;
512}
513
64798845
JP		 514static void e1000_get_drvinfo(struct net_device *netdev,
515 struct ethtool_drvinfo *drvinfo)
1da177e4 516{
60490fe0 517 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 518
612a94d6
RJ		 519 strlcpy(drvinfo->driver, e1000_driver_name,
520 sizeof(drvinfo->driver));
521 strlcpy(drvinfo->version, e1000_driver_version,
522 sizeof(drvinfo->version));
a2917e22 523
612a94d6
RJ		 524 strlcpy(drvinfo->bus_info, pci_name(adapter->pdev),
525 sizeof(drvinfo->bus_info));
1da177e4
LT		 526 drvinfo->regdump_len = e1000_get_regs_len(netdev);
527 drvinfo->eedump_len = e1000_get_eeprom_len(netdev);
528}
529
64798845
JP		 530static void e1000_get_ringparam(struct net_device *netdev,
531 struct ethtool_ringparam *ring)
1da177e4 532{
60490fe0 533 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918
JP		 534 struct e1000_hw *hw = &adapter->hw;
535 e1000_mac_type mac_type = hw->mac_type;
581d708e
MC		 536 struct e1000_tx_ring *txdr = adapter->tx_ring;
537 struct e1000_rx_ring *rxdr = adapter->rx_ring;
1da177e4
LT		 538
539 ring->rx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_RXD :
540 E1000_MAX_82544_RXD;
541 ring->tx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_TXD :
542 E1000_MAX_82544_TXD;
1da177e4
LT		 543 ring->rx_pending = rxdr->count;
544 ring->tx_pending = txdr->count;
1da177e4
LT		 545}
546
64798845
JP		 547static int e1000_set_ringparam(struct net_device *netdev,
548 struct ethtool_ringparam *ring)
1da177e4 549{
60490fe0 550 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918
JP		 551 struct e1000_hw *hw = &adapter->hw;
552 e1000_mac_type mac_type = hw->mac_type;
793fab72
VA		 553 struct e1000_tx_ring *txdr, *tx_old;
554 struct e1000_rx_ring *rxdr, *rx_old;
1c7e5b12 555 int i, err;
581d708e 556
0989aa43
JK		 557 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
558 return -EINVAL;
559
2db10a08
AK		 560 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
561 msleep(1);
562
581d708e
MC		 563 if (netif_running(adapter->netdev))
564 e1000_down(adapter);
1da177e4
LT		 565
566 tx_old = adapter->tx_ring;
567 rx_old = adapter->rx_ring;
568
793fab72 569 err = -ENOMEM;
1c7e5b12 570 txdr = kcalloc(adapter->num_tx_queues, sizeof(struct e1000_tx_ring), GFP_KERNEL);
793fab72
VA		 571 if (!txdr)
572 goto err_alloc_tx;
581d708e 573
1c7e5b12 574 rxdr = kcalloc(adapter->num_rx_queues, sizeof(struct e1000_rx_ring), GFP_KERNEL);
793fab72
VA		 575 if (!rxdr)
576 goto err_alloc_rx;
581d708e 577
793fab72
VA		 578 adapter->tx_ring = txdr;
579 adapter->rx_ring = rxdr;
581d708e 580
406874a7
JP		 581 rxdr->count = max(ring->rx_pending,(u32)E1000_MIN_RXD);
582 rxdr->count = min(rxdr->count,(u32)(mac_type < e1000_82544 ?
1da177e4 583 E1000_MAX_RXD : E1000_MAX_82544_RXD));
9099cfb9 584 rxdr->count = ALIGN(rxdr->count, REQ_RX_DESCRIPTOR_MULTIPLE);
1da177e4 585
406874a7
JP		 586 txdr->count = max(ring->tx_pending,(u32)E1000_MIN_TXD);
587 txdr->count = min(txdr->count,(u32)(mac_type < e1000_82544 ?
1da177e4 588 E1000_MAX_TXD : E1000_MAX_82544_TXD));
9099cfb9 589 txdr->count = ALIGN(txdr->count, REQ_TX_DESCRIPTOR_MULTIPLE);
1da177e4 590
f56799ea 591 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 592 txdr[i].count = txdr->count;
f56799ea 593 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 594 rxdr[i].count = rxdr->count;
581d708e 595
96838a40 596 if (netif_running(adapter->netdev)) {
1da177e4 597 /* Try to get new resources before deleting old */
c7be73bc
JP		 598 err = e1000_setup_all_rx_resources(adapter);
599 if (err)
1da177e4 600 goto err_setup_rx;
c7be73bc
JP		 601 err = e1000_setup_all_tx_resources(adapter);
602 if (err)
1da177e4
LT		 603 goto err_setup_tx;
604
605 /* save the new, restore the old in order to free it,
606 * then restore the new back again */
607
1da177e4
LT		 608 adapter->rx_ring = rx_old;
609 adapter->tx_ring = tx_old;
581d708e
MC		 610 e1000_free_all_rx_resources(adapter);
611 e1000_free_all_tx_resources(adapter);
612 kfree(tx_old);
613 kfree(rx_old);
793fab72
VA		 614 adapter->rx_ring = rxdr;
615 adapter->tx_ring = txdr;
c7be73bc
JP		 616 err = e1000_up(adapter);
617 if (err)
2db10a08 618 goto err_setup;
1da177e4
LT		 619 }
620
2db10a08 621 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 622 return 0;
623err_setup_tx:
581d708e 624 e1000_free_all_rx_resources(adapter);
1da177e4
LT		 625err_setup_rx:
626 adapter->rx_ring = rx_old;
627 adapter->tx_ring = tx_old;
793fab72
VA		 628 kfree(rxdr);
629err_alloc_rx:
630 kfree(txdr);
631err_alloc_tx:
1da177e4 632 e1000_up(adapter);
2db10a08
AK		 633err_setup:
634 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 635 return err;
636}
637
64798845
JP		 638static bool reg_pattern_test(struct e1000_adapter *adapter, u64 *data, int reg,
639 u32 mask, u32 write)
7e64300a 640{
1dc32918 641 struct e1000_hw *hw = &adapter->hw;
406874a7 642 static const u32 test[] =
7e64300a 643 {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
1dc32918 644 u8 __iomem *address = hw->hw_addr + reg;
406874a7 645 u32 read;
7e64300a
JP		 646 int i;
647
648 for (i = 0; i < ARRAY_SIZE(test); i++) {
649 writel(write & test[i], address);
650 read = readl(address);
651 if (read != (write & test[i] & mask)) {
feb8f478
ET		 652 e_err(drv, "pattern test reg %04X failed: "
653 "got 0x%08X expected 0x%08X\n",
654 reg, read, (write & test[i] & mask));
7e64300a
JP		 655 *data = reg;
656 return true;
657 }
658 }
659 return false;
1da177e4
LT		 660}
661
64798845
JP		 662static bool reg_set_and_check(struct e1000_adapter *adapter, u64 *data, int reg,
663 u32 mask, u32 write)
7e64300a 664{
1dc32918
JP		 665 struct e1000_hw *hw = &adapter->hw;
666 u8 __iomem *address = hw->hw_addr + reg;
406874a7 667 u32 read;
7e64300a
JP		 668
669 writel(write & mask, address);
670 read = readl(address);
671 if ((read & mask) != (write & mask)) {
feb8f478 672 e_err(drv, "set/check reg %04X test failed: "
675ad473
ET		 673 "got 0x%08X expected 0x%08X\n",
674 reg, (read & mask), (write & mask));
7e64300a
JP		 675 *data = reg;
676 return true;
677 }
678 return false;
1da177e4
LT		 679}
680
7e64300a
JP		 681#define REG_PATTERN_TEST(reg, mask, write) \
682 do { \
683 if (reg_pattern_test(adapter, data, \
1dc32918 684 (hw->mac_type >= e1000_82543) \
7e64300a
JP		 685 ? E1000_##reg : E1000_82542_##reg, \
686 mask, write)) \
687 return 1; \
688 } while (0)
689
690#define REG_SET_AND_CHECK(reg, mask, write) \
691 do { \
692 if (reg_set_and_check(adapter, data, \
1dc32918 693 (hw->mac_type >= e1000_82543) \
7e64300a
JP		 694 ? E1000_##reg : E1000_82542_##reg, \
695 mask, write)) \
696 return 1; \
697 } while (0)
698
64798845 699static int e1000_reg_test(struct e1000_adapter *adapter, u64 *data)
1da177e4 700{
406874a7
JP		 701 u32 value, before, after;
702 u32 i, toggle;
1dc32918 703 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 704
705 /* The status register is Read Only, so a write should fail.
706 * Some bits that get toggled are ignored.
707 */
1532ecea 708
868d5309 709 /* there are several bits on newer hardware that are r/w */
1532ecea 710 toggle = 0xFFFFF833;
b01f6691 711
1dc32918
JP		 712 before = er32(STATUS);
713 value = (er32(STATUS) & toggle);
714 ew32(STATUS, toggle);
715 after = er32(STATUS) & toggle;
96838a40 716 if (value != after) {
feb8f478 717 e_err(drv, "failed STATUS register test got: "
675ad473 718 "0x%08X expected: 0x%08X\n", after, value);
1da177e4
LT		 719 *data = 1;
720 return 1;
721 }
b01f6691 722 /* restore previous status */
1dc32918 723 ew32(STATUS, before);
90fb5135 724
1532ecea
JB		 725 REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
726 REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF);
727 REG_PATTERN_TEST(FCT, 0x0000FFFF, 0xFFFFFFFF);
728 REG_PATTERN_TEST(VET, 0x0000FFFF, 0xFFFFFFFF);
90fb5135 729
1da177e4
LT		 730 REG_PATTERN_TEST(RDTR, 0x0000FFFF, 0xFFFFFFFF);
731 REG_PATTERN_TEST(RDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
732 REG_PATTERN_TEST(RDLEN, 0x000FFF80, 0x000FFFFF);
733 REG_PATTERN_TEST(RDH, 0x0000FFFF, 0x0000FFFF);
734 REG_PATTERN_TEST(RDT, 0x0000FFFF, 0x0000FFFF);
735 REG_PATTERN_TEST(FCRTH, 0x0000FFF8, 0x0000FFF8);
736 REG_PATTERN_TEST(FCTTV, 0x0000FFFF, 0x0000FFFF);
737 REG_PATTERN_TEST(TIPG, 0x3FFFFFFF, 0x3FFFFFFF);
738 REG_PATTERN_TEST(TDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
739 REG_PATTERN_TEST(TDLEN, 0x000FFF80, 0x000FFFFF);
740
741 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x00000000);
90fb5135 742
1532ecea 743 before = 0x06DFB3FE;
cd94dd0b 744 REG_SET_AND_CHECK(RCTL, before, 0x003FFFFB);
1da177e4
LT		 745 REG_SET_AND_CHECK(TCTL, 0xFFFFFFFF, 0x00000000);
746
1dc32918 747 if (hw->mac_type >= e1000_82543) {
1da177e4 748
cd94dd0b 749 REG_SET_AND_CHECK(RCTL, before, 0xFFFFFFFF);
1da177e4 750 REG_PATTERN_TEST(RDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
1532ecea 751 REG_PATTERN_TEST(TXCW, 0xC000FFFF, 0x0000FFFF);
1da177e4
LT		 752 REG_PATTERN_TEST(TDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
753 REG_PATTERN_TEST(TIDV, 0x0000FFFF, 0x0000FFFF);
1532ecea 754 value = E1000_RAR_ENTRIES;
cd94dd0b 755 for (i = 0; i < value; i++) {
1da177e4 756 REG_PATTERN_TEST(RA + (((i << 1) + 1) << 2), 0x8003FFFF,
90fb5135 757 0xFFFFFFFF);
1da177e4
LT		 758 }
759
760 } else {
761
762 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x01FFFFFF);
763 REG_PATTERN_TEST(RDBAL, 0xFFFFF000, 0xFFFFFFFF);
764 REG_PATTERN_TEST(TXCW, 0x0000FFFF, 0x0000FFFF);
765 REG_PATTERN_TEST(TDBAL, 0xFFFFF000, 0xFFFFFFFF);
766
767 }
768
1532ecea 769 value = E1000_MC_TBL_SIZE;
cd94dd0b 770 for (i = 0; i < value; i++)
1da177e4
LT		 771 REG_PATTERN_TEST(MTA + (i << 2), 0xFFFFFFFF, 0xFFFFFFFF);
772
773 *data = 0;
774 return 0;
775}
776
64798845 777static int e1000_eeprom_test(struct e1000_adapter *adapter, u64 *data)
1da177e4 778{
1dc32918 779 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 780 u16 temp;
781 u16 checksum = 0;
782 u16 i;
1da177e4
LT		 783
784 *data = 0;
785 /* Read and add up the contents of the EEPROM */
96838a40 786 for (i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) {
1dc32918 787 if ((e1000_read_eeprom(hw, i, 1, &temp)) < 0) {
1da177e4
LT		 788 *data = 1;
789 break;
790 }
791 checksum += temp;
792 }
793
794 /* If Checksum is not Correct return error else test passed */
e982f17c 795 if ((checksum != (u16)EEPROM_SUM) && !(*data))
1da177e4
LT		 796 *data = 2;
797
798 return *data;
799}
800
64798845 801static irqreturn_t e1000_test_intr(int irq, void *data)
1da177e4 802{
e982f17c 803 struct net_device *netdev = (struct net_device *)data;
60490fe0 804 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 805 struct e1000_hw *hw = &adapter->hw;
1da177e4 806
1dc32918 807 adapter->test_icr |= er32(ICR);
1da177e4
LT		 808
809 return IRQ_HANDLED;
810}
811
64798845 812static int e1000_intr_test(struct e1000_adapter *adapter, u64 *data)
1da177e4
LT		 813{
814 struct net_device *netdev = adapter->netdev;
406874a7 815 u32 mask, i = 0;
c3033b01 816 bool shared_int = true;
406874a7 817 u32 irq = adapter->pdev->irq;
1dc32918 818 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 819
820 *data = 0;
821
8fc897b0 822 /* NOTE: we don't test MSI interrupts here, yet */
1da177e4 823 /* Hook up test interrupt handler just for this test */
a0607fd3 824 if (!request_irq(irq, e1000_test_intr, IRQF_PROBE_SHARED, netdev->name,
90fb5135 825 netdev))
c3033b01 826 shared_int = false;
a0607fd3 827 else if (request_irq(irq, e1000_test_intr, IRQF_SHARED,
90fb5135 828 netdev->name, netdev)) {
1da177e4
LT		 829 *data = 1;
830 return -1;
831 }
feb8f478
ET		 832 e_info(hw, "testing %s interrupt\n", (shared_int ?
833 "shared" : "unshared"));
1da177e4
LT		 834
835 /* Disable all the interrupts */
1dc32918 836 ew32(IMC, 0xFFFFFFFF);
945a5151 837 E1000_WRITE_FLUSH();
f8ec4733 838 msleep(10);
1da177e4
LT		 839
840 /* Test each interrupt */
96838a40 841 for (; i < 10; i++) {
1da177e4
LT		 842
843 /* Interrupt to test */
844 mask = 1 << i;
845
76c224bc
AK		 846 if (!shared_int) {
847 /* Disable the interrupt to be reported in
848 * the cause register and then force the same
849 * interrupt and see if one gets posted. If
850 * an interrupt was posted to the bus, the
851 * test failed.
852 */
853 adapter->test_icr = 0;
1dc32918
JP		 854 ew32(IMC, mask);
855 ew32(ICS, mask);
945a5151 856 E1000_WRITE_FLUSH();
f8ec4733 857 msleep(10);
76c224bc
AK		 858
859 if (adapter->test_icr & mask) {
860 *data = 3;
861 break;
862 }
1da177e4
LT		 863 }
864
865 /* Enable the interrupt to be reported in
866 * the cause register and then force the same
867 * interrupt and see if one gets posted. If
868 * an interrupt was not posted to the bus, the
869 * test failed.
870 */
871 adapter->test_icr = 0;
1dc32918
JP		 872 ew32(IMS, mask);
873 ew32(ICS, mask);
945a5151 874 E1000_WRITE_FLUSH();
f8ec4733 875 msleep(10);
1da177e4 876
96838a40 877 if (!(adapter->test_icr & mask)) {
1da177e4
LT		 878 *data = 4;
879 break;
880 }
881
76c224bc 882 if (!shared_int) {
1da177e4
LT		 883 /* Disable the other interrupts to be reported in
884 * the cause register and then force the other
885 * interrupts and see if any get posted. If
886 * an interrupt was posted to the bus, the
887 * test failed.
888 */
889 adapter->test_icr = 0;
1dc32918
JP		 890 ew32(IMC, ~mask & 0x00007FFF);
891 ew32(ICS, ~mask & 0x00007FFF);
945a5151 892 E1000_WRITE_FLUSH();
f8ec4733 893 msleep(10);
1da177e4 894
96838a40 895 if (adapter->test_icr) {
1da177e4
LT		 896 *data = 5;
897 break;
898 }
899 }
900 }
901
902 /* Disable all the interrupts */
1dc32918 903 ew32(IMC, 0xFFFFFFFF);
945a5151 904 E1000_WRITE_FLUSH();
f8ec4733 905 msleep(10);
1da177e4
LT		 906
907 /* Unhook test interrupt handler */
908 free_irq(irq, netdev);
909
910 return *data;
911}
912
64798845 913static void e1000_free_desc_rings(struct e1000_adapter *adapter)
1da177e4 914{
581d708e
MC		 915 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
916 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1da177e4
LT		 917 struct pci_dev *pdev = adapter->pdev;
918 int i;
919
96838a40
JB		 920 if (txdr->desc && txdr->buffer_info) {
921 for (i = 0; i < txdr->count; i++) {
922 if (txdr->buffer_info[i].dma)
b16f53be
NN		 923 dma_unmap_single(&pdev->dev,
924 txdr->buffer_info[i].dma,
1da177e4 925 txdr->buffer_info[i].length,
b16f53be 926 DMA_TO_DEVICE);
96838a40 927 if (txdr->buffer_info[i].skb)
1da177e4
LT		 928 dev_kfree_skb(txdr->buffer_info[i].skb);
929 }
930 }
931
96838a40
JB		 932 if (rxdr->desc && rxdr->buffer_info) {
933 for (i = 0; i < rxdr->count; i++) {
934 if (rxdr->buffer_info[i].dma)
b16f53be
NN		 935 dma_unmap_single(&pdev->dev,
936 rxdr->buffer_info[i].dma,
1da177e4 937 rxdr->buffer_info[i].length,
b16f53be 938 DMA_FROM_DEVICE);
96838a40 939 if (rxdr->buffer_info[i].skb)
1da177e4
LT		 940 dev_kfree_skb(rxdr->buffer_info[i].skb);
941 }
942 }
943
f5645110 944 if (txdr->desc) {
b16f53be
NN		 945 dma_free_coherent(&pdev->dev, txdr->size, txdr->desc,
946 txdr->dma);
6b27adb6
JL		 947 txdr->desc = NULL;
948 }
f5645110 949 if (rxdr->desc) {
b16f53be
NN		 950 dma_free_coherent(&pdev->dev, rxdr->size, rxdr->desc,
951 rxdr->dma);
6b27adb6
JL		 952 rxdr->desc = NULL;
953 }
1da177e4 954
b4558ea9 955 kfree(txdr->buffer_info);
6b27adb6 956 txdr->buffer_info = NULL;
b4558ea9 957 kfree(rxdr->buffer_info);
6b27adb6 958 rxdr->buffer_info = NULL;
1da177e4
LT		 959}
960
64798845 961static int e1000_setup_desc_rings(struct e1000_adapter *adapter)
1da177e4 962{
1dc32918 963 struct e1000_hw *hw = &adapter->hw;
581d708e
MC		 964 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
965 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1da177e4 966 struct pci_dev *pdev = adapter->pdev;
406874a7 967 u32 rctl;
1c7e5b12 968 int i, ret_val;
1da177e4
LT		 969
970 /* Setup Tx descriptor ring and Tx buffers */
971
96838a40
JB		 972 if (!txdr->count)
973 txdr->count = E1000_DEFAULT_TXD;
1da177e4 974
c7be73bc
JP		 975 txdr->buffer_info = kcalloc(txdr->count, sizeof(struct e1000_buffer),
976 GFP_KERNEL);
977 if (!txdr->buffer_info) {
1da177e4
LT		 978 ret_val = 1;
979 goto err_nomem;
980 }
1da177e4
LT		 981
982 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
9099cfb9 983 txdr->size = ALIGN(txdr->size, 4096);
b16f53be
NN		 984 txdr->desc = dma_alloc_coherent(&pdev->dev, txdr->size, &txdr->dma,
985 GFP_KERNEL);
c7be73bc 986 if (!txdr->desc) {
1da177e4
LT		 987 ret_val = 2;
988 goto err_nomem;
989 }
990 memset(txdr->desc, 0, txdr->size);
991 txdr->next_to_use = txdr->next_to_clean = 0;
992
e982f17c
JP		 993 ew32(TDBAL, ((u64)txdr->dma & 0x00000000FFFFFFFF));
994 ew32(TDBAH, ((u64)txdr->dma >> 32));
1dc32918
JP		 995 ew32(TDLEN, txdr->count * sizeof(struct e1000_tx_desc));
996 ew32(TDH, 0);
997 ew32(TDT, 0);
998 ew32(TCTL, E1000_TCTL_PSP | E1000_TCTL_EN |
999 E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
1000 E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT);
1da177e4 1001
96838a40 1002 for (i = 0; i < txdr->count; i++) {
1da177e4
LT		 1003 struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*txdr, i);
1004 struct sk_buff *skb;
1005 unsigned int size = 1024;
1006
c7be73bc
JP		 1007 skb = alloc_skb(size, GFP_KERNEL);
1008 if (!skb) {
1da177e4
LT		 1009 ret_val = 3;
1010 goto err_nomem;
1011 }
1012 skb_put(skb, size);
1013 txdr->buffer_info[i].skb = skb;
1014 txdr->buffer_info[i].length = skb->len;
1015 txdr->buffer_info[i].dma =
b16f53be
NN		 1016 dma_map_single(&pdev->dev, skb->data, skb->len,
1017 DMA_TO_DEVICE);
1da177e4
LT		 1018 tx_desc->buffer_addr = cpu_to_le64(txdr->buffer_info[i].dma);
1019 tx_desc->lower.data = cpu_to_le32(skb->len);
1020 tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP |
1021 E1000_TXD_CMD_IFCS |
1022 E1000_TXD_CMD_RPS);
1023 tx_desc->upper.data = 0;
1024 }
1025
1026 /* Setup Rx descriptor ring and Rx buffers */
1027
96838a40
JB		 1028 if (!rxdr->count)
1029 rxdr->count = E1000_DEFAULT_RXD;
1da177e4 1030
c7be73bc
JP		 1031 rxdr->buffer_info = kcalloc(rxdr->count, sizeof(struct e1000_buffer),
1032 GFP_KERNEL);
1033 if (!rxdr->buffer_info) {
1da177e4
LT		 1034 ret_val = 4;
1035 goto err_nomem;
1036 }
1da177e4
LT		 1037
1038 rxdr->size = rxdr->count * sizeof(struct e1000_rx_desc);
b16f53be
NN		 1039 rxdr->desc = dma_alloc_coherent(&pdev->dev, rxdr->size, &rxdr->dma,
1040 GFP_KERNEL);
c7be73bc 1041 if (!rxdr->desc) {
1da177e4
LT		 1042 ret_val = 5;
1043 goto err_nomem;
1044 }
1045 memset(rxdr->desc, 0, rxdr->size);
1046 rxdr->next_to_use = rxdr->next_to_clean = 0;
1047
1dc32918
JP		 1048 rctl = er32(RCTL);
1049 ew32(RCTL, rctl & ~E1000_RCTL_EN);
e982f17c
JP		 1050 ew32(RDBAL, ((u64)rxdr->dma & 0xFFFFFFFF));
1051 ew32(RDBAH, ((u64)rxdr->dma >> 32));
1dc32918
JP		 1052 ew32(RDLEN, rxdr->size);
1053 ew32(RDH, 0);
1054 ew32(RDT, 0);
1da177e4
LT		 1055 rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
1056 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1dc32918
JP		 1057 (hw->mc_filter_type << E1000_RCTL_MO_SHIFT);
1058 ew32(RCTL, rctl);
1da177e4 1059
96838a40 1060 for (i = 0; i < rxdr->count; i++) {
1da177e4
LT		 1061 struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rxdr, i);
1062 struct sk_buff *skb;
1063
c7be73bc
JP		 1064 skb = alloc_skb(E1000_RXBUFFER_2048 + NET_IP_ALIGN, GFP_KERNEL);
1065 if (!skb) {
1da177e4
LT		 1066 ret_val = 6;
1067 goto err_nomem;
1068 }
1069 skb_reserve(skb, NET_IP_ALIGN);
1070 rxdr->buffer_info[i].skb = skb;
1071 rxdr->buffer_info[i].length = E1000_RXBUFFER_2048;
1072 rxdr->buffer_info[i].dma =
b16f53be
NN		 1073 dma_map_single(&pdev->dev, skb->data,
1074 E1000_RXBUFFER_2048, DMA_FROM_DEVICE);
1da177e4
LT		 1075 rx_desc->buffer_addr = cpu_to_le64(rxdr->buffer_info[i].dma);
1076 memset(skb->data, 0x00, skb->len);
1077 }
1078
1079 return 0;
1080
1081err_nomem:
1082 e1000_free_desc_rings(adapter);
1083 return ret_val;
1084}
1085
64798845 1086static void e1000_phy_disable_receiver(struct e1000_adapter *adapter)
1da177e4 1087{
1dc32918
JP		 1088 struct e1000_hw *hw = &adapter->hw;
1089
1da177e4 1090 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1dc32918
JP		 1091 e1000_write_phy_reg(hw, 29, 0x001F);
1092 e1000_write_phy_reg(hw, 30, 0x8FFC);
1093 e1000_write_phy_reg(hw, 29, 0x001A);
1094 e1000_write_phy_reg(hw, 30, 0x8FF0);
1da177e4
LT		 1095}
1096
64798845 1097static void e1000_phy_reset_clk_and_crs(struct e1000_adapter *adapter)
1da177e4 1098{
1dc32918 1099 struct e1000_hw *hw = &adapter->hw;
406874a7 1100 u16 phy_reg;
1da177e4
LT		 1101
1102 /* Because we reset the PHY above, we need to re-force TX_CLK in the
1103 * Extended PHY Specific Control Register to 25MHz clock. This
1104 * value defaults back to a 2.5MHz clock when the PHY is reset.
1105 */
1dc32918 1106 e1000_read_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
1da177e4 1107 phy_reg |= M88E1000_EPSCR_TX_CLK_25;
1dc32918 1108 e1000_write_phy_reg(hw,
1da177e4
LT		 1109 M88E1000_EXT_PHY_SPEC_CTRL, phy_reg);
1110
1111 /* In addition, because of the s/w reset above, we need to enable
1112 * CRS on TX. This must be set for both full and half duplex
1113 * operation.
1114 */
1dc32918 1115 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1da177e4 1116 phy_reg |= M88E1000_PSCR_ASSERT_CRS_ON_TX;
1dc32918 1117 e1000_write_phy_reg(hw,
1da177e4
LT		 1118 M88E1000_PHY_SPEC_CTRL, phy_reg);
1119}
1120
64798845 1121static int e1000_nonintegrated_phy_loopback(struct e1000_adapter *adapter)
1da177e4 1122{
1dc32918 1123 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 1124 u32 ctrl_reg;
1125 u16 phy_reg;
1da177e4
LT		 1126
1127 /* Setup the Device Control Register for PHY loopback test. */
1128
1dc32918 1129 ctrl_reg = er32(CTRL);
1da177e4
LT		 1130 ctrl_reg |= (E1000_CTRL_ILOS | /* Invert Loss-Of-Signal */
1131 E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1132 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1133 E1000_CTRL_SPD_1000 | /* Force Speed to 1000 */
1134 E1000_CTRL_FD); /* Force Duplex to FULL */
1135
1dc32918 1136 ew32(CTRL, ctrl_reg);
1da177e4
LT		 1137
1138 /* Read the PHY Specific Control Register (0x10) */
1dc32918 1139 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1da177e4
LT		 1140
1141 /* Clear Auto-Crossover bits in PHY Specific Control Register
1142 * (bits 6:5).
1143 */
1144 phy_reg &= ~M88E1000_PSCR_AUTO_X_MODE;
1dc32918 1145 e1000_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_reg);
1da177e4
LT		 1146
1147 /* Perform software reset on the PHY */
1dc32918 1148 e1000_phy_reset(hw);
1da177e4
LT		 1149
1150 /* Have to setup TX_CLK and TX_CRS after software reset */
1151 e1000_phy_reset_clk_and_crs(adapter);
1152
1dc32918 1153 e1000_write_phy_reg(hw, PHY_CTRL, 0x8100);
1da177e4
LT		 1154
1155 /* Wait for reset to complete. */
1156 udelay(500);
1157
1158 /* Have to setup TX_CLK and TX_CRS after software reset */
1159 e1000_phy_reset_clk_and_crs(adapter);
1160
1161 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1162 e1000_phy_disable_receiver(adapter);
1163
1164 /* Set the loopback bit in the PHY control register. */
1dc32918 1165 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
1da177e4 1166 phy_reg |= MII_CR_LOOPBACK;
1dc32918 1167 e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
1da177e4
LT		 1168
1169 /* Setup TX_CLK and TX_CRS one more time. */
1170 e1000_phy_reset_clk_and_crs(adapter);
1171
1172 /* Check Phy Configuration */
1dc32918 1173 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
96838a40 1174 if (phy_reg != 0x4100)
1da177e4
LT		 1175 return 9;
1176
1dc32918 1177 e1000_read_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
96838a40 1178 if (phy_reg != 0x0070)
1da177e4
LT		 1179 return 10;
1180
1dc32918 1181 e1000_read_phy_reg(hw, 29, &phy_reg);
96838a40 1182 if (phy_reg != 0x001A)
1da177e4
LT		 1183 return 11;
1184
1185 return 0;
1186}
1187
64798845 1188static int e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
1da177e4 1189{
1dc32918 1190 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 1191 u32 ctrl_reg = 0;
1192 u32 stat_reg = 0;
1da177e4 1193
1dc32918 1194 hw->autoneg = false;
1da177e4 1195
1dc32918 1196 if (hw->phy_type == e1000_phy_m88) {
1da177e4 1197 /* Auto-MDI/MDIX Off */
1dc32918 1198 e1000_write_phy_reg(hw,
1da177e4
LT		 1199 M88E1000_PHY_SPEC_CTRL, 0x0808);
1200 /* reset to update Auto-MDI/MDIX */
1dc32918 1201 e1000_write_phy_reg(hw, PHY_CTRL, 0x9140);
1da177e4 1202 /* autoneg off */
1dc32918 1203 e1000_write_phy_reg(hw, PHY_CTRL, 0x8140);
1532ecea 1204 }
1da177e4 1205
1dc32918 1206 ctrl_reg = er32(CTRL);
cd94dd0b 1207
1532ecea
JB		 1208 /* force 1000, set loopback */
1209 e1000_write_phy_reg(hw, PHY_CTRL, 0x4140);
cd94dd0b 1210
1532ecea
JB		 1211 /* Now set up the MAC to the same speed/duplex as the PHY. */
1212 ctrl_reg = er32(CTRL);
1213 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1214 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1215 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1216 E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1217 E1000_CTRL_FD); /* Force Duplex to FULL */
1da177e4 1218
1dc32918
JP		 1219 if (hw->media_type == e1000_media_type_copper &&
1220 hw->phy_type == e1000_phy_m88)
1da177e4 1221 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
8fc897b0 1222 else {
1da177e4
LT		 1223 /* Set the ILOS bit on the fiber Nic is half
1224 * duplex link is detected. */
1dc32918 1225 stat_reg = er32(STATUS);
96838a40 1226 if ((stat_reg & E1000_STATUS_FD) == 0)
1da177e4
LT		 1227 ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
1228 }
1229
1dc32918 1230 ew32(CTRL, ctrl_reg);
1da177e4
LT		 1231
1232 /* Disable the receiver on the PHY so when a cable is plugged in, the
1233 * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1234 */
1dc32918 1235 if (hw->phy_type == e1000_phy_m88)
1da177e4
LT		 1236 e1000_phy_disable_receiver(adapter);
1237
1238 udelay(500);
1239
1240 return 0;
1241}
1242
64798845 1243static int e1000_set_phy_loopback(struct e1000_adapter *adapter)
1da177e4 1244{
1dc32918 1245 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 1246 u16 phy_reg = 0;
1247 u16 count = 0;
1da177e4 1248
1dc32918 1249 switch (hw->mac_type) {
1da177e4 1250 case e1000_82543:
1dc32918 1251 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 1252 /* Attempt to setup Loopback mode on Non-integrated PHY.
1253 * Some PHY registers get corrupted at random, so
1254 * attempt this 10 times.
1255 */
96838a40 1256 while (e1000_nonintegrated_phy_loopback(adapter) &&
1da177e4 1257 count++ < 10);
96838a40 1258 if (count < 11)
1da177e4
LT		 1259 return 0;
1260 }
1261 break;
1262
1263 case e1000_82544:
1264 case e1000_82540:
1265 case e1000_82545:
1266 case e1000_82545_rev_3:
1267 case e1000_82546:
1268 case e1000_82546_rev_3:
1269 case e1000_82541:
1270 case e1000_82541_rev_2:
1271 case e1000_82547:
1272 case e1000_82547_rev_2:
1273 return e1000_integrated_phy_loopback(adapter);
1274 break;
1da177e4
LT		 1275 default:
1276 /* Default PHY loopback work is to read the MII
1277 * control register and assert bit 14 (loopback mode).
1278 */
1dc32918 1279 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
1da177e4 1280 phy_reg |= MII_CR_LOOPBACK;
1dc32918 1281 e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
1da177e4
LT		 1282 return 0;
1283 break;
1284 }
1285
1286 return 8;
1287}
1288
64798845 1289static int e1000_setup_loopback_test(struct e1000_adapter *adapter)
1da177e4 1290{
49273163 1291 struct e1000_hw *hw = &adapter->hw;
406874a7 1292 u32 rctl;
1da177e4 1293
49273163
JK		 1294 if (hw->media_type == e1000_media_type_fiber ||
1295 hw->media_type == e1000_media_type_internal_serdes) {
1296 switch (hw->mac_type) {
1297 case e1000_82545:
1298 case e1000_82546:
1299 case e1000_82545_rev_3:
1300 case e1000_82546_rev_3:
1da177e4 1301 return e1000_set_phy_loopback(adapter);
49273163 1302 break;
49273163 1303 default:
1dc32918 1304 rctl = er32(RCTL);
1da177e4 1305 rctl |= E1000_RCTL_LBM_TCVR;
1dc32918 1306 ew32(RCTL, rctl);
1da177e4
LT		 1307 return 0;
1308 }
49273163 1309 } else if (hw->media_type == e1000_media_type_copper)
1da177e4
LT		 1310 return e1000_set_phy_loopback(adapter);
1311
1312 return 7;
1313}
1314
64798845 1315static void e1000_loopback_cleanup(struct e1000_adapter *adapter)
1da177e4 1316{
49273163 1317 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 1318 u32 rctl;
1319 u16 phy_reg;
1da177e4 1320
1dc32918 1321 rctl = er32(RCTL);
1da177e4 1322 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
1dc32918 1323 ew32(RCTL, rctl);
1da177e4 1324
49273163 1325 switch (hw->mac_type) {
49273163
JK		 1326 case e1000_82545:
1327 case e1000_82546:
1328 case e1000_82545_rev_3:
1329 case e1000_82546_rev_3:
1330 default:
c3033b01 1331 hw->autoneg = true;
49273163
JK		 1332 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
1333 if (phy_reg & MII_CR_LOOPBACK) {
1da177e4 1334 phy_reg &= ~MII_CR_LOOPBACK;
49273163
JK		 1335 e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
1336 e1000_phy_reset(hw);
1da177e4 1337 }
49273163 1338 break;
1da177e4
LT		 1339 }
1340}
1341
64798845
JP		 1342static void e1000_create_lbtest_frame(struct sk_buff *skb,
1343 unsigned int frame_size)
1da177e4
LT		 1344{
1345 memset(skb->data, 0xFF, frame_size);
ce7393b9 1346 frame_size &= ~1;
1da177e4
LT		 1347 memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1348 memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
1349 memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
1350}
1351
64798845
JP		 1352static int e1000_check_lbtest_frame(struct sk_buff *skb,
1353 unsigned int frame_size)
1da177e4 1354{
ce7393b9 1355 frame_size &= ~1;
96838a40
JB		 1356 if (*(skb->data + 3) == 0xFF) {
1357 if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
1da177e4
LT		 1358 (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
1359 return 0;
1360 }
1361 }
1362 return 13;
1363}
1364
64798845 1365static int e1000_run_loopback_test(struct e1000_adapter *adapter)
1da177e4 1366{
1dc32918 1367 struct e1000_hw *hw = &adapter->hw;
581d708e
MC		 1368 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1369 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1da177e4 1370 struct pci_dev *pdev = adapter->pdev;
e4eff729
MC		 1371 int i, j, k, l, lc, good_cnt, ret_val=0;
1372 unsigned long time;
1da177e4 1373
1dc32918 1374 ew32(RDT, rxdr->count - 1);
1da177e4 1375
96838a40 1376 /* Calculate the loop count based on the largest descriptor ring
e4eff729
MC		 1377 * The idea is to wrap the largest ring a number of times using 64
1378 * send/receive pairs during each loop
1379 */
1da177e4 1380
96838a40 1381 if (rxdr->count <= txdr->count)
e4eff729
MC		 1382 lc = ((txdr->count / 64) * 2) + 1;
1383 else
1384 lc = ((rxdr->count / 64) * 2) + 1;
1385
1386 k = l = 0;
96838a40
JB		 1387 for (j = 0; j <= lc; j++) { /* loop count loop */
1388 for (i = 0; i < 64; i++) { /* send the packets */
1389 e1000_create_lbtest_frame(txdr->buffer_info[i].skb,
e4eff729 1390 1024);
b16f53be
NN		 1391 dma_sync_single_for_device(&pdev->dev,
1392 txdr->buffer_info[k].dma,
1393 txdr->buffer_info[k].length,
1394 DMA_TO_DEVICE);
96838a40 1395 if (unlikely(++k == txdr->count)) k = 0;
e4eff729 1396 }
1dc32918 1397 ew32(TDT, k);
945a5151 1398 E1000_WRITE_FLUSH();
f8ec4733 1399 msleep(200);
e4eff729
MC		 1400 time = jiffies; /* set the start time for the receive */
1401 good_cnt = 0;
1402 do { /* receive the sent packets */
b16f53be
NN		 1403 dma_sync_single_for_cpu(&pdev->dev,
1404 rxdr->buffer_info[l].dma,
1405 rxdr->buffer_info[l].length,
1406 DMA_FROM_DEVICE);
96838a40 1407
e4eff729
MC		 1408 ret_val = e1000_check_lbtest_frame(
1409 rxdr->buffer_info[l].skb,
1410 1024);
96838a40 1411 if (!ret_val)
e4eff729 1412 good_cnt++;
96838a40
JB		 1413 if (unlikely(++l == rxdr->count)) l = 0;
1414 /* time + 20 msecs (200 msecs on 2.4) is more than
1415 * enough time to complete the receives, if it's
e4eff729
MC		 1416 * exceeded, break and error off
1417 */
1418 } while (good_cnt < 64 && jiffies < (time + 20));
96838a40 1419 if (good_cnt != 64) {
e4eff729 1420 ret_val = 13; /* ret_val is the same as mis-compare */
96838a40 1421 break;
e4eff729 1422 }
96838a40 1423 if (jiffies >= (time + 2)) {
e4eff729
MC		 1424 ret_val = 14; /* error code for time out error */
1425 break;
1426 }
1427 } /* end loop count loop */
1da177e4
LT		 1428 return ret_val;
1429}
1430
64798845 1431static int e1000_loopback_test(struct e1000_adapter *adapter, u64 *data)
1da177e4 1432{
c7be73bc
JP		 1433 *data = e1000_setup_desc_rings(adapter);
1434 if (*data)
57128197 1435 goto out;
c7be73bc
JP		 1436 *data = e1000_setup_loopback_test(adapter);
1437 if (*data)
57128197 1438 goto err_loopback;
1da177e4
LT		 1439 *data = e1000_run_loopback_test(adapter);
1440 e1000_loopback_cleanup(adapter);
57128197 1441
1da177e4 1442err_loopback:
57128197
JK		 1443 e1000_free_desc_rings(adapter);
1444out:
1da177e4
LT		 1445 return *data;
1446}
1447
64798845 1448static int e1000_link_test(struct e1000_adapter *adapter, u64 *data)
1da177e4 1449{
1dc32918 1450 struct e1000_hw *hw = &adapter->hw;
1da177e4 1451 *data = 0;
1dc32918 1452 if (hw->media_type == e1000_media_type_internal_serdes) {
1da177e4 1453 int i = 0;
be0f0719 1454 hw->serdes_has_link = false;
1da177e4 1455
2648345f
MC		 1456 /* On some blade server designs, link establishment
1457 * could take as long as 2-3 minutes */
1da177e4 1458 do {
1dc32918 1459 e1000_check_for_link(hw);
be0f0719 1460 if (hw->serdes_has_link)
1da177e4 1461 return *data;
f8ec4733 1462 msleep(20);
1da177e4
LT		 1463 } while (i++ < 3750);
1464
2648345f 1465 *data = 1;
1da177e4 1466 } else {
1dc32918
JP		 1467 e1000_check_for_link(hw);
1468 if (hw->autoneg) /* if auto_neg is set wait for it */
f8ec4733 1469 msleep(4000);
1da177e4 1470
1dc32918 1471 if (!(er32(STATUS) & E1000_STATUS_LU)) {
1da177e4
LT		 1472 *data = 1;
1473 }
1474 }
1475 return *data;
1476}
1477
64798845 1478static int e1000_get_sset_count(struct net_device *netdev, int sset)
1da177e4 1479{
b9f2c044
JG		 1480 switch (sset) {
1481 case ETH_SS_TEST:
1482 return E1000_TEST_LEN;
1483 case ETH_SS_STATS:
1484 return E1000_STATS_LEN;
1485 default:
1486 return -EOPNOTSUPP;
1487 }
1da177e4
LT		 1488}
1489
64798845
JP		 1490static void e1000_diag_test(struct net_device *netdev,
1491 struct ethtool_test *eth_test, u64 *data)
1da177e4 1492{
60490fe0 1493 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1494 struct e1000_hw *hw = &adapter->hw;
c3033b01 1495 bool if_running = netif_running(netdev);
1da177e4 1496
1314bbf3 1497 set_bit(__E1000_TESTING, &adapter->flags);
96838a40 1498 if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1da177e4
LT		 1499 /* Offline tests */
1500
1501 /* save speed, duplex, autoneg settings */
1dc32918
JP		 1502 u16 autoneg_advertised = hw->autoneg_advertised;
1503 u8 forced_speed_duplex = hw->forced_speed_duplex;
1504 u8 autoneg = hw->autoneg;
1da177e4 1505
feb8f478 1506 e_info(hw, "offline testing starting\n");
d658266e 1507
1da177e4
LT		 1508 /* Link test performed before hardware reset so autoneg doesn't
1509 * interfere with test result */
96838a40 1510 if (e1000_link_test(adapter, &data[4]))
1da177e4
LT		 1511 eth_test->flags |= ETH_TEST_FL_FAILED;
1512
96838a40 1513 if (if_running)
2db10a08
AK		 1514 /* indicate we're in test mode */
1515 dev_close(netdev);
1da177e4
LT		 1516 else
1517 e1000_reset(adapter);
1518
96838a40 1519 if (e1000_reg_test(adapter, &data[0]))
1da177e4
LT		 1520 eth_test->flags |= ETH_TEST_FL_FAILED;
1521
1522 e1000_reset(adapter);
96838a40 1523 if (e1000_eeprom_test(adapter, &data[1]))
1da177e4
LT		 1524 eth_test->flags |= ETH_TEST_FL_FAILED;
1525
1526 e1000_reset(adapter);
96838a40 1527 if (e1000_intr_test(adapter, &data[2]))
1da177e4
LT		 1528 eth_test->flags |= ETH_TEST_FL_FAILED;
1529
1530 e1000_reset(adapter);
d658266e
JB		 1531 /* make sure the phy is powered up */
1532 e1000_power_up_phy(adapter);
96838a40 1533 if (e1000_loopback_test(adapter, &data[3]))
1da177e4
LT		 1534 eth_test->flags |= ETH_TEST_FL_FAILED;
1535
1536 /* restore speed, duplex, autoneg settings */
1dc32918
JP		 1537 hw->autoneg_advertised = autoneg_advertised;
1538 hw->forced_speed_duplex = forced_speed_duplex;
1539 hw->autoneg = autoneg;
1da177e4
LT		 1540
1541 e1000_reset(adapter);
1314bbf3 1542 clear_bit(__E1000_TESTING, &adapter->flags);
96838a40 1543 if (if_running)
2db10a08 1544 dev_open(netdev);
1da177e4 1545 } else {
feb8f478 1546 e_info(hw, "online testing starting\n");
1da177e4 1547 /* Online tests */
96838a40 1548 if (e1000_link_test(adapter, &data[4]))
1da177e4
LT		 1549 eth_test->flags |= ETH_TEST_FL_FAILED;
1550
90fb5135 1551 /* Online tests aren't run; pass by default */
1da177e4
LT		 1552 data[0] = 0;
1553 data[1] = 0;
1554 data[2] = 0;
1555 data[3] = 0;
2db10a08 1556
1314bbf3 1557 clear_bit(__E1000_TESTING, &adapter->flags);
1da177e4 1558 }
352c9f85 1559 msleep_interruptible(4 * 1000);
1da177e4
LT		 1560}
1561
64798845
JP		 1562static int e1000_wol_exclusion(struct e1000_adapter *adapter,
1563 struct ethtool_wolinfo *wol)
1da177e4 1564{
1da177e4 1565 struct e1000_hw *hw = &adapter->hw;
120cd576 1566 int retval = 1; /* fail by default */
1da177e4 1567
120cd576 1568 switch (hw->device_id) {
dc1f71f6 1569 case E1000_DEV_ID_82542:
1da177e4
LT		 1570 case E1000_DEV_ID_82543GC_FIBER:
1571 case E1000_DEV_ID_82543GC_COPPER:
1572 case E1000_DEV_ID_82544EI_FIBER:
1573 case E1000_DEV_ID_82546EB_QUAD_COPPER:
1574 case E1000_DEV_ID_82545EM_FIBER:
1575 case E1000_DEV_ID_82545EM_COPPER:
84916829 1576 case E1000_DEV_ID_82546GB_QUAD_COPPER:
120cd576
JB		 1577 case E1000_DEV_ID_82546GB_PCIE:
1578 /* these don't support WoL at all */
1da177e4 1579 wol->supported = 0;
120cd576 1580 break;
1da177e4
LT		 1581 case E1000_DEV_ID_82546EB_FIBER:
1582 case E1000_DEV_ID_82546GB_FIBER:
120cd576 1583 /* Wake events not supported on port B */
1dc32918 1584 if (er32(STATUS) & E1000_STATUS_FUNC_1) {
1da177e4 1585 wol->supported = 0;
120cd576 1586 break;
1da177e4 1587 }
120cd576
JB		 1588 /* return success for non excluded adapter ports */
1589 retval = 0;
1590 break;
1591 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1592 /* quad port adapters only support WoL on port A */
1593 if (!adapter->quad_port_a) {
1594 wol->supported = 0;
1595 break;
1596 }
1597 /* return success for non excluded adapter ports */
1598 retval = 0;
1599 break;
1da177e4 1600 default:
120cd576
JB		 1601 /* dual port cards only support WoL on port A from now on
1602 * unless it was enabled in the eeprom for port B
1603 * so exclude FUNC_1 ports from having WoL enabled */
1dc32918 1604 if (er32(STATUS) & E1000_STATUS_FUNC_1 &&
120cd576
JB		 1605 !adapter->eeprom_wol) {
1606 wol->supported = 0;
1607 break;
1608 }
84916829 1609
120cd576
JB		 1610 retval = 0;
1611 }
1612
1613 return retval;
1614}
1615
64798845
JP		 1616static void e1000_get_wol(struct net_device *netdev,
1617 struct ethtool_wolinfo *wol)
120cd576
JB		 1618{
1619 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1620 struct e1000_hw *hw = &adapter->hw;
120cd576
JB		 1621
1622 wol->supported = WAKE_UCAST | WAKE_MCAST |
1623 WAKE_BCAST | WAKE_MAGIC;
1624 wol->wolopts = 0;
1625
1626 /* this function will set ->supported = 0 and return 1 if wol is not
1627 * supported by this hardware */
de126489
RW		 1628 if (e1000_wol_exclusion(adapter, wol) ||
1629 !device_can_wakeup(&adapter->pdev->dev))
1da177e4 1630 return;
120cd576
JB		 1631
1632 /* apply any specific unsupported masks here */
1dc32918 1633 switch (hw->device_id) {
120cd576
JB		 1634 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1635 /* KSP3 does not suppport UCAST wake-ups */
1636 wol->supported &= ~WAKE_UCAST;
1637
1638 if (adapter->wol & E1000_WUFC_EX)
feb8f478
ET		 1639 e_err(drv, "Interface does not support directed "
1640 "(unicast) frame wake-up packets\n");
120cd576
JB		 1641 break;
1642 default:
1643 break;
1da177e4 1644 }
120cd576
JB		 1645
1646 if (adapter->wol & E1000_WUFC_EX)
1647 wol->wolopts |= WAKE_UCAST;
1648 if (adapter->wol & E1000_WUFC_MC)
1649 wol->wolopts |= WAKE_MCAST;
1650 if (adapter->wol & E1000_WUFC_BC)
1651 wol->wolopts |= WAKE_BCAST;
1652 if (adapter->wol & E1000_WUFC_MAG)
1653 wol->wolopts |= WAKE_MAGIC;
1da177e4
LT		 1654}
1655
64798845 1656static int e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1da177e4 1657{
60490fe0 1658 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1659 struct e1000_hw *hw = &adapter->hw;
1660
120cd576
JB		 1661 if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
1662 return -EOPNOTSUPP;
1663
de126489
RW		 1664 if (e1000_wol_exclusion(adapter, wol) ||
1665 !device_can_wakeup(&adapter->pdev->dev))
1da177e4
LT		 1666 return wol->wolopts ? -EOPNOTSUPP : 0;
1667
120cd576 1668 switch (hw->device_id) {
84916829 1669 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
84916829 1670 if (wol->wolopts & WAKE_UCAST) {
feb8f478
ET		 1671 e_err(drv, "Interface does not support directed "
1672 "(unicast) frame wake-up packets\n");
84916829
JK		 1673 return -EOPNOTSUPP;
1674 }
120cd576 1675 break;
1da177e4 1676 default:
120cd576 1677 break;
1da177e4
LT		 1678 }
1679
120cd576
JB		 1680 /* these settings will always override what we currently have */
1681 adapter->wol = 0;
1682
1683 if (wol->wolopts & WAKE_UCAST)
1684 adapter->wol |= E1000_WUFC_EX;
1685 if (wol->wolopts & WAKE_MCAST)
1686 adapter->wol |= E1000_WUFC_MC;
1687 if (wol->wolopts & WAKE_BCAST)
1688 adapter->wol |= E1000_WUFC_BC;
1689 if (wol->wolopts & WAKE_MAGIC)
1690 adapter->wol |= E1000_WUFC_MAG;
1691
de126489
RW		 1692 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1693
1da177e4
LT		 1694 return 0;
1695}
1696
64359091
JK		 1697static int e1000_set_phys_id(struct net_device *netdev,
1698 enum ethtool_phys_id_state state)
1da177e4 1699{
64359091 1700 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1701 struct e1000_hw *hw = &adapter->hw;
1da177e4 1702
64359091
JK		 1703 switch (state) {
1704 case ETHTOOL_ID_ACTIVE:
1705 e1000_setup_led(hw);
1706 return 2;
1da177e4 1707
64359091
JK		 1708 case ETHTOOL_ID_ON:
1709 e1000_led_on(hw);
1710 break;
1da177e4 1711
64359091
JK		 1712 case ETHTOOL_ID_OFF:
1713 e1000_led_off(hw);
1714 break;
1da177e4 1715
64359091
JK		 1716 case ETHTOOL_ID_INACTIVE:
1717 e1000_cleanup_led(hw);
1da177e4 1718 }
1da177e4
LT		 1719
1720 return 0;
1721}
1722
94c9e5a8
JB		 1723static int e1000_get_coalesce(struct net_device *netdev,
1724 struct ethtool_coalesce *ec)
1725{
1726 struct e1000_adapter *adapter = netdev_priv(netdev);
1727
1728 if (adapter->hw.mac_type < e1000_82545)
1729 return -EOPNOTSUPP;
1730
eab2abf5 1731 if (adapter->itr_setting <= 4)
94c9e5a8
JB		 1732 ec->rx_coalesce_usecs = adapter->itr_setting;
1733 else
1734 ec->rx_coalesce_usecs = 1000000 / adapter->itr_setting;
1735
1736 return 0;
1737}
1738
1739static int e1000_set_coalesce(struct net_device *netdev,
1740 struct ethtool_coalesce *ec)
1741{
1742 struct e1000_adapter *adapter = netdev_priv(netdev);
1743 struct e1000_hw *hw = &adapter->hw;
1744
1745 if (hw->mac_type < e1000_82545)
1746 return -EOPNOTSUPP;
1747
1748 if ((ec->rx_coalesce_usecs > E1000_MAX_ITR_USECS) ||
eab2abf5 1749 ((ec->rx_coalesce_usecs > 4) &&
94c9e5a8
JB		 1750 (ec->rx_coalesce_usecs < E1000_MIN_ITR_USECS)) ||
1751 (ec->rx_coalesce_usecs == 2))
1752 return -EINVAL;
1753
eab2abf5
JB		 1754 if (ec->rx_coalesce_usecs == 4) {
1755 adapter->itr = adapter->itr_setting = 4;
1756 } else if (ec->rx_coalesce_usecs <= 3) {
94c9e5a8
JB		 1757 adapter->itr = 20000;
1758 adapter->itr_setting = ec->rx_coalesce_usecs;
1759 } else {
1760 adapter->itr = (1000000 / ec->rx_coalesce_usecs);
1761 adapter->itr_setting = adapter->itr & ~3;
1762 }
1763
1764 if (adapter->itr_setting != 0)
1765 ew32(ITR, 1000000000 / (adapter->itr * 256));
1766 else
1767 ew32(ITR, 0);
1768
1769 return 0;
1770}
1771
64798845 1772static int e1000_nway_reset(struct net_device *netdev)
1da177e4 1773{
60490fe0 1774 struct e1000_adapter *adapter = netdev_priv(netdev);
2db10a08
AK		 1775 if (netif_running(netdev))
1776 e1000_reinit_locked(adapter);
1da177e4
LT		 1777 return 0;
1778}
1779
64798845
JP		 1780static void e1000_get_ethtool_stats(struct net_device *netdev,
1781 struct ethtool_stats *stats, u64 *data)
1da177e4 1782{
60490fe0 1783 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 1784 int i;
8328c38f 1785 char *p = NULL;
1da177e4
LT		 1786
1787 e1000_update_stats(adapter);
7bfa4816 1788 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
8328c38f
AK		 1789 switch (e1000_gstrings_stats[i].type) {
1790 case NETDEV_STATS:
1791 p = (char *) netdev +
1792 e1000_gstrings_stats[i].stat_offset;
1793 break;
1794 case E1000_STATS:
1795 p = (char *) adapter +
1796 e1000_gstrings_stats[i].stat_offset;
1797 break;
1798 }
1799
7bfa4816 1800 data[i] = (e1000_gstrings_stats[i].sizeof_stat ==
406874a7 1801 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1da177e4 1802 }
7bfa4816 1803/* BUG_ON(i != E1000_STATS_LEN); */
1da177e4
LT		 1804}
1805
64798845
JP		 1806static void e1000_get_strings(struct net_device *netdev, u32 stringset,
1807 u8 *data)
1da177e4 1808{
406874a7 1809 u8 *p = data;
1da177e4
LT		 1810 int i;
1811
96838a40 1812 switch (stringset) {
1da177e4 1813 case ETH_SS_TEST:
96838a40 1814 memcpy(data, *e1000_gstrings_test,
c32bc6e9 1815 sizeof(e1000_gstrings_test));
1da177e4
LT		 1816 break;
1817 case ETH_SS_STATS:
7bfa4816
JK		 1818 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
1819 memcpy(p, e1000_gstrings_stats[i].stat_string,
1820 ETH_GSTRING_LEN);
1821 p += ETH_GSTRING_LEN;
1822 }
7bfa4816 1823/* BUG_ON(p - data != E1000_STATS_LEN * ETH_GSTRING_LEN); */
1da177e4
LT		 1824 break;
1825 }
1826}
1827
7282d491 1828static const struct ethtool_ops e1000_ethtool_ops = {
1da177e4
LT		 1829 .get_settings = e1000_get_settings,
1830 .set_settings = e1000_set_settings,
1831 .get_drvinfo = e1000_get_drvinfo,
1832 .get_regs_len = e1000_get_regs_len,
1833 .get_regs = e1000_get_regs,
1834 .get_wol = e1000_get_wol,
1835 .set_wol = e1000_set_wol,
8fc897b0
AK		 1836 .get_msglevel = e1000_get_msglevel,
1837 .set_msglevel = e1000_set_msglevel,
1da177e4 1838 .nway_reset = e1000_nway_reset,
b548192a 1839 .get_link = e1000_get_link,
1da177e4
LT		 1840 .get_eeprom_len = e1000_get_eeprom_len,
1841 .get_eeprom = e1000_get_eeprom,
1842 .set_eeprom = e1000_set_eeprom,
1843 .get_ringparam = e1000_get_ringparam,
1844 .set_ringparam = e1000_set_ringparam,
8fc897b0
AK		 1845 .get_pauseparam = e1000_get_pauseparam,
1846 .set_pauseparam = e1000_set_pauseparam,
1da177e4
LT		 1847 .self_test = e1000_diag_test,
1848 .get_strings = e1000_get_strings,
64359091 1849 .set_phys_id = e1000_set_phys_id,
1da177e4 1850 .get_ethtool_stats = e1000_get_ethtool_stats,
94c9e5a8
JB		 1851 .get_sset_count = e1000_get_sset_count,
1852 .get_coalesce = e1000_get_coalesce,
1853 .set_coalesce = e1000_set_coalesce,
e10df2c6 1854 .get_ts_info = ethtool_op_get_ts_info,
1da177e4
LT		 1855};
1856
1857void e1000_set_ethtool_ops(struct net_device *netdev)
1858{
1859 SET_ETHTOOL_OPS(netdev, &e1000_ethtool_ops);
1860}
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