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1da177e4 | 1 | /******************************************************************************* |
887a79f4 KMJ |
2 | * Intel PRO/1000 Linux driver |
3 | * Copyright(c) 1999 - 2006 Intel Corporation. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms and conditions of the GNU General Public License, | |
7 | * version 2, as published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope it will be useful, but WITHOUT | |
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
12 | * more details. | |
13 | * | |
14 | * The full GNU General Public License is included in this distribution in | |
15 | * the file called "COPYING". | |
16 | * | |
17 | * Contact Information: | |
18 | * Linux NICS <linux.nics@intel.com> | |
19 | * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | |
20 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
21 | * | |
22 | ******************************************************************************/ | |
1da177e4 LT |
23 | |
24 | /* ethtool support for e1000 */ | |
25 | ||
26 | #include "e1000.h" | |
d5c7d7f6 | 27 | #include <linux/jiffies.h> |
887a79f4 | 28 | #include <linux/uaccess.h> |
1da177e4 | 29 | |
8328c38f AK |
30 | enum {NETDEV_STATS, E1000_STATS}; |
31 | ||
1da177e4 LT |
32 | struct e1000_stats { |
33 | char stat_string[ETH_GSTRING_LEN]; | |
8328c38f | 34 | int type; |
1da177e4 LT |
35 | int sizeof_stat; |
36 | int stat_offset; | |
37 | }; | |
38 | ||
8328c38f AK |
39 | #define E1000_STAT(m) E1000_STATS, \ |
40 | sizeof(((struct e1000_adapter *)0)->m), \ | |
887a79f4 | 41 | offsetof(struct e1000_adapter, m) |
8328c38f AK |
42 | #define E1000_NETDEV_STAT(m) NETDEV_STATS, \ |
43 | sizeof(((struct net_device *)0)->m), \ | |
44 | offsetof(struct net_device, m) | |
45 | ||
1da177e4 | 46 | static const struct e1000_stats e1000_gstrings_stats[] = { |
49559854 MW |
47 | { "rx_packets", E1000_STAT(stats.gprc) }, |
48 | { "tx_packets", E1000_STAT(stats.gptc) }, | |
49 | { "rx_bytes", E1000_STAT(stats.gorcl) }, | |
50 | { "tx_bytes", E1000_STAT(stats.gotcl) }, | |
51 | { "rx_broadcast", E1000_STAT(stats.bprc) }, | |
52 | { "tx_broadcast", E1000_STAT(stats.bptc) }, | |
53 | { "rx_multicast", E1000_STAT(stats.mprc) }, | |
54 | { "tx_multicast", E1000_STAT(stats.mptc) }, | |
55 | { "rx_errors", E1000_STAT(stats.rxerrc) }, | |
56 | { "tx_errors", E1000_STAT(stats.txerrc) }, | |
5fe31def | 57 | { "tx_dropped", E1000_NETDEV_STAT(stats.tx_dropped) }, |
49559854 MW |
58 | { "multicast", E1000_STAT(stats.mprc) }, |
59 | { "collisions", E1000_STAT(stats.colc) }, | |
60 | { "rx_length_errors", E1000_STAT(stats.rlerrc) }, | |
5fe31def | 61 | { "rx_over_errors", E1000_NETDEV_STAT(stats.rx_over_errors) }, |
49559854 | 62 | { "rx_crc_errors", E1000_STAT(stats.crcerrs) }, |
5fe31def | 63 | { "rx_frame_errors", E1000_NETDEV_STAT(stats.rx_frame_errors) }, |
2648345f | 64 | { "rx_no_buffer_count", E1000_STAT(stats.rnbc) }, |
49559854 MW |
65 | { "rx_missed_errors", E1000_STAT(stats.mpc) }, |
66 | { "tx_aborted_errors", E1000_STAT(stats.ecol) }, | |
67 | { "tx_carrier_errors", E1000_STAT(stats.tncrs) }, | |
5fe31def AK |
68 | { "tx_fifo_errors", E1000_NETDEV_STAT(stats.tx_fifo_errors) }, |
69 | { "tx_heartbeat_errors", E1000_NETDEV_STAT(stats.tx_heartbeat_errors) }, | |
49559854 | 70 | { "tx_window_errors", E1000_STAT(stats.latecol) }, |
1da177e4 LT |
71 | { "tx_abort_late_coll", E1000_STAT(stats.latecol) }, |
72 | { "tx_deferred_ok", E1000_STAT(stats.dc) }, | |
73 | { "tx_single_coll_ok", E1000_STAT(stats.scc) }, | |
74 | { "tx_multi_coll_ok", E1000_STAT(stats.mcc) }, | |
6b7660cd | 75 | { "tx_timeout_count", E1000_STAT(tx_timeout_count) }, |
fcfb1224 | 76 | { "tx_restart_queue", E1000_STAT(restart_queue) }, |
1da177e4 LT |
77 | { "rx_long_length_errors", E1000_STAT(stats.roc) }, |
78 | { "rx_short_length_errors", E1000_STAT(stats.ruc) }, | |
79 | { "rx_align_errors", E1000_STAT(stats.algnerrc) }, | |
80 | { "tx_tcp_seg_good", E1000_STAT(stats.tsctc) }, | |
81 | { "tx_tcp_seg_failed", E1000_STAT(stats.tsctfc) }, | |
82 | { "rx_flow_control_xon", E1000_STAT(stats.xonrxc) }, | |
83 | { "rx_flow_control_xoff", E1000_STAT(stats.xoffrxc) }, | |
84 | { "tx_flow_control_xon", E1000_STAT(stats.xontxc) }, | |
85 | { "tx_flow_control_xoff", E1000_STAT(stats.xofftxc) }, | |
86 | { "rx_long_byte_count", E1000_STAT(stats.gorcl) }, | |
87 | { "rx_csum_offload_good", E1000_STAT(hw_csum_good) }, | |
e4c811c9 | 88 | { "rx_csum_offload_errors", E1000_STAT(hw_csum_err) }, |
6b7660cd | 89 | { "alloc_rx_buff_failed", E1000_STAT(alloc_rx_buff_failed) }, |
15e376b4 JG |
90 | { "tx_smbus", E1000_STAT(stats.mgptc) }, |
91 | { "rx_smbus", E1000_STAT(stats.mgprc) }, | |
92 | { "dropped_smbus", E1000_STAT(stats.mgpdc) }, | |
1da177e4 | 93 | }; |
7bfa4816 | 94 | |
7bfa4816 | 95 | #define E1000_QUEUE_STATS_LEN 0 |
ff8ac609 | 96 | #define E1000_GLOBAL_STATS_LEN ARRAY_SIZE(e1000_gstrings_stats) |
7bfa4816 | 97 | #define E1000_STATS_LEN (E1000_GLOBAL_STATS_LEN + E1000_QUEUE_STATS_LEN) |
1da177e4 LT |
98 | static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = { |
99 | "Register test (offline)", "Eeprom test (offline)", | |
100 | "Interrupt test (offline)", "Loopback test (offline)", | |
101 | "Link test (on/offline)" | |
102 | }; | |
887a79f4 | 103 | |
4c3616cd | 104 | #define E1000_TEST_LEN ARRAY_SIZE(e1000_gstrings_test) |
1da177e4 | 105 | |
5add2f9a PR |
106 | static int e1000_get_link_ksettings(struct net_device *netdev, |
107 | struct ethtool_link_ksettings *cmd) | |
1da177e4 | 108 | { |
60490fe0 | 109 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 110 | struct e1000_hw *hw = &adapter->hw; |
5add2f9a | 111 | u32 supported, advertising; |
1da177e4 | 112 | |
96838a40 | 113 | if (hw->media_type == e1000_media_type_copper) { |
5add2f9a PR |
114 | supported = (SUPPORTED_10baseT_Half | |
115 | SUPPORTED_10baseT_Full | | |
116 | SUPPORTED_100baseT_Half | | |
117 | SUPPORTED_100baseT_Full | | |
118 | SUPPORTED_1000baseT_Full| | |
119 | SUPPORTED_Autoneg | | |
120 | SUPPORTED_TP); | |
121 | advertising = ADVERTISED_TP; | |
1da177e4 | 122 | |
96838a40 | 123 | if (hw->autoneg == 1) { |
5add2f9a | 124 | advertising |= ADVERTISED_Autoneg; |
1da177e4 | 125 | /* the e1000 autoneg seems to match ethtool nicely */ |
5add2f9a | 126 | advertising |= hw->autoneg_advertised; |
1da177e4 LT |
127 | } |
128 | ||
5add2f9a PR |
129 | cmd->base.port = PORT_TP; |
130 | cmd->base.phy_address = hw->phy_addr; | |
1da177e4 | 131 | } else { |
5add2f9a PR |
132 | supported = (SUPPORTED_1000baseT_Full | |
133 | SUPPORTED_FIBRE | | |
134 | SUPPORTED_Autoneg); | |
1da177e4 | 135 | |
5add2f9a PR |
136 | advertising = (ADVERTISED_1000baseT_Full | |
137 | ADVERTISED_FIBRE | | |
138 | ADVERTISED_Autoneg); | |
1da177e4 | 139 | |
5add2f9a | 140 | cmd->base.port = PORT_FIBRE; |
1da177e4 LT |
141 | } |
142 | ||
1dc32918 | 143 | if (er32(STATUS) & E1000_STATUS_LU) { |
1da177e4 | 144 | e1000_get_speed_and_duplex(hw, &adapter->link_speed, |
887a79f4 | 145 | &adapter->link_duplex); |
5add2f9a | 146 | cmd->base.speed = adapter->link_speed; |
1da177e4 | 147 | |
25985edc | 148 | /* unfortunately FULL_DUPLEX != DUPLEX_FULL |
6cfbd97b JK |
149 | * and HALF_DUPLEX != DUPLEX_HALF |
150 | */ | |
96838a40 | 151 | if (adapter->link_duplex == FULL_DUPLEX) |
5add2f9a | 152 | cmd->base.duplex = DUPLEX_FULL; |
1da177e4 | 153 | else |
5add2f9a | 154 | cmd->base.duplex = DUPLEX_HALF; |
1da177e4 | 155 | } else { |
5add2f9a PR |
156 | cmd->base.speed = SPEED_UNKNOWN; |
157 | cmd->base.duplex = DUPLEX_UNKNOWN; | |
1da177e4 LT |
158 | } |
159 | ||
5add2f9a | 160 | cmd->base.autoneg = ((hw->media_type == e1000_media_type_fiber) || |
1da177e4 | 161 | hw->autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE; |
c819bbd5 JB |
162 | |
163 | /* MDI-X => 1; MDI => 0 */ | |
164 | if ((hw->media_type == e1000_media_type_copper) && | |
165 | netif_carrier_ok(netdev)) | |
5add2f9a | 166 | cmd->base.eth_tp_mdix = (!!adapter->phy_info.mdix_mode ? |
6cfbd97b | 167 | ETH_TP_MDI_X : ETH_TP_MDI); |
c819bbd5 | 168 | else |
5add2f9a | 169 | cmd->base.eth_tp_mdix = ETH_TP_MDI_INVALID; |
c819bbd5 JB |
170 | |
171 | if (hw->mdix == AUTO_ALL_MODES) | |
5add2f9a | 172 | cmd->base.eth_tp_mdix_ctrl = ETH_TP_MDI_AUTO; |
c819bbd5 | 173 | else |
5add2f9a PR |
174 | cmd->base.eth_tp_mdix_ctrl = hw->mdix; |
175 | ||
176 | ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported, | |
177 | supported); | |
178 | ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising, | |
179 | advertising); | |
180 | ||
1da177e4 LT |
181 | return 0; |
182 | } | |
183 | ||
5add2f9a PR |
184 | static int e1000_set_link_ksettings(struct net_device *netdev, |
185 | const struct ethtool_link_ksettings *cmd) | |
1da177e4 | 186 | { |
60490fe0 | 187 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 188 | struct e1000_hw *hw = &adapter->hw; |
5add2f9a PR |
189 | u32 advertising; |
190 | ||
191 | ethtool_convert_link_mode_to_legacy_u32(&advertising, | |
192 | cmd->link_modes.advertising); | |
1da177e4 | 193 | |
6cfbd97b | 194 | /* MDI setting is only allowed when autoneg enabled because |
c819bbd5 JB |
195 | * some hardware doesn't allow MDI setting when speed or |
196 | * duplex is forced. | |
197 | */ | |
5add2f9a | 198 | if (cmd->base.eth_tp_mdix_ctrl) { |
c819bbd5 JB |
199 | if (hw->media_type != e1000_media_type_copper) |
200 | return -EOPNOTSUPP; | |
201 | ||
5add2f9a PR |
202 | if ((cmd->base.eth_tp_mdix_ctrl != ETH_TP_MDI_AUTO) && |
203 | (cmd->base.autoneg != AUTONEG_ENABLE)) { | |
c819bbd5 JB |
204 | e_err(drv, "forcing MDI/MDI-X state is not supported when link speed and/or duplex are forced\n"); |
205 | return -EINVAL; | |
206 | } | |
207 | } | |
208 | ||
1a821ca5 JB |
209 | while (test_and_set_bit(__E1000_RESETTING, &adapter->flags)) |
210 | msleep(1); | |
211 | ||
5add2f9a | 212 | if (cmd->base.autoneg == AUTONEG_ENABLE) { |
1da177e4 | 213 | hw->autoneg = 1; |
96838a40 | 214 | if (hw->media_type == e1000_media_type_fiber) |
012609a8 | 215 | hw->autoneg_advertised = ADVERTISED_1000baseT_Full | |
5add2f9a PR |
216 | ADVERTISED_FIBRE | |
217 | ADVERTISED_Autoneg; | |
96838a40 | 218 | else |
5add2f9a | 219 | hw->autoneg_advertised = advertising | |
6cfbd97b JK |
220 | ADVERTISED_TP | |
221 | ADVERTISED_Autoneg; | |
25db0338 | 222 | } else { |
5add2f9a | 223 | u32 speed = cmd->base.speed; |
c819bbd5 | 224 | /* calling this overrides forced MDI setting */ |
5add2f9a | 225 | if (e1000_set_spd_dplx(adapter, speed, cmd->base.duplex)) { |
1a821ca5 | 226 | clear_bit(__E1000_RESETTING, &adapter->flags); |
1da177e4 | 227 | return -EINVAL; |
1a821ca5 | 228 | } |
25db0338 | 229 | } |
1da177e4 | 230 | |
c819bbd5 | 231 | /* MDI-X => 2; MDI => 1; Auto => 3 */ |
5add2f9a PR |
232 | if (cmd->base.eth_tp_mdix_ctrl) { |
233 | if (cmd->base.eth_tp_mdix_ctrl == ETH_TP_MDI_AUTO) | |
c819bbd5 JB |
234 | hw->mdix = AUTO_ALL_MODES; |
235 | else | |
5add2f9a | 236 | hw->mdix = cmd->base.eth_tp_mdix_ctrl; |
c819bbd5 JB |
237 | } |
238 | ||
1da177e4 LT |
239 | /* reset the link */ |
240 | ||
1a821ca5 JB |
241 | if (netif_running(adapter->netdev)) { |
242 | e1000_down(adapter); | |
243 | e1000_up(adapter); | |
887a79f4 | 244 | } else { |
1da177e4 | 245 | e1000_reset(adapter); |
887a79f4 | 246 | } |
1a821ca5 | 247 | clear_bit(__E1000_RESETTING, &adapter->flags); |
1da177e4 LT |
248 | return 0; |
249 | } | |
250 | ||
b548192a NN |
251 | static u32 e1000_get_link(struct net_device *netdev) |
252 | { | |
253 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
254 | ||
6cfbd97b | 255 | /* If the link is not reported up to netdev, interrupts are disabled, |
b548192a NN |
256 | * and so the physical link state may have changed since we last |
257 | * looked. Set get_link_status to make sure that the true link | |
258 | * state is interrogated, rather than pulling a cached and possibly | |
259 | * stale link state from the driver. | |
260 | */ | |
261 | if (!netif_carrier_ok(netdev)) | |
262 | adapter->hw.get_link_status = 1; | |
263 | ||
264 | return e1000_has_link(adapter); | |
265 | } | |
266 | ||
64798845 JP |
267 | static void e1000_get_pauseparam(struct net_device *netdev, |
268 | struct ethtool_pauseparam *pause) | |
1da177e4 | 269 | { |
60490fe0 | 270 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
271 | struct e1000_hw *hw = &adapter->hw; |
272 | ||
96838a40 | 273 | pause->autoneg = |
1da177e4 | 274 | (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE); |
96838a40 | 275 | |
887a79f4 | 276 | if (hw->fc == E1000_FC_RX_PAUSE) { |
1da177e4 | 277 | pause->rx_pause = 1; |
887a79f4 | 278 | } else if (hw->fc == E1000_FC_TX_PAUSE) { |
1da177e4 | 279 | pause->tx_pause = 1; |
887a79f4 | 280 | } else if (hw->fc == E1000_FC_FULL) { |
1da177e4 LT |
281 | pause->rx_pause = 1; |
282 | pause->tx_pause = 1; | |
283 | } | |
284 | } | |
285 | ||
64798845 JP |
286 | static int e1000_set_pauseparam(struct net_device *netdev, |
287 | struct ethtool_pauseparam *pause) | |
1da177e4 | 288 | { |
60490fe0 | 289 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 290 | struct e1000_hw *hw = &adapter->hw; |
1a821ca5 | 291 | int retval = 0; |
96838a40 | 292 | |
1da177e4 LT |
293 | adapter->fc_autoneg = pause->autoneg; |
294 | ||
1a821ca5 JB |
295 | while (test_and_set_bit(__E1000_RESETTING, &adapter->flags)) |
296 | msleep(1); | |
297 | ||
96838a40 | 298 | if (pause->rx_pause && pause->tx_pause) |
11241b10 | 299 | hw->fc = E1000_FC_FULL; |
96838a40 | 300 | else if (pause->rx_pause && !pause->tx_pause) |
11241b10 | 301 | hw->fc = E1000_FC_RX_PAUSE; |
96838a40 | 302 | else if (!pause->rx_pause && pause->tx_pause) |
11241b10 | 303 | hw->fc = E1000_FC_TX_PAUSE; |
96838a40 | 304 | else if (!pause->rx_pause && !pause->tx_pause) |
11241b10 | 305 | hw->fc = E1000_FC_NONE; |
1da177e4 LT |
306 | |
307 | hw->original_fc = hw->fc; | |
308 | ||
96838a40 | 309 | if (adapter->fc_autoneg == AUTONEG_ENABLE) { |
1a821ca5 JB |
310 | if (netif_running(adapter->netdev)) { |
311 | e1000_down(adapter); | |
312 | e1000_up(adapter); | |
887a79f4 | 313 | } else { |
1da177e4 | 314 | e1000_reset(adapter); |
887a79f4 | 315 | } |
96838a40 | 316 | } else |
1a821ca5 | 317 | retval = ((hw->media_type == e1000_media_type_fiber) ? |
90fb5135 | 318 | e1000_setup_link(hw) : e1000_force_mac_fc(hw)); |
96838a40 | 319 | |
1a821ca5 JB |
320 | clear_bit(__E1000_RESETTING, &adapter->flags); |
321 | return retval; | |
1da177e4 LT |
322 | } |
323 | ||
64798845 | 324 | static u32 e1000_get_msglevel(struct net_device *netdev) |
1da177e4 | 325 | { |
60490fe0 | 326 | struct e1000_adapter *adapter = netdev_priv(netdev); |
887a79f4 | 327 | |
1da177e4 LT |
328 | return adapter->msg_enable; |
329 | } | |
330 | ||
64798845 | 331 | static void e1000_set_msglevel(struct net_device *netdev, u32 data) |
1da177e4 | 332 | { |
60490fe0 | 333 | struct e1000_adapter *adapter = netdev_priv(netdev); |
887a79f4 | 334 | |
1da177e4 LT |
335 | adapter->msg_enable = data; |
336 | } | |
337 | ||
64798845 | 338 | static int e1000_get_regs_len(struct net_device *netdev) |
1da177e4 LT |
339 | { |
340 | #define E1000_REGS_LEN 32 | |
406874a7 | 341 | return E1000_REGS_LEN * sizeof(u32); |
1da177e4 LT |
342 | } |
343 | ||
64798845 JP |
344 | static void e1000_get_regs(struct net_device *netdev, struct ethtool_regs *regs, |
345 | void *p) | |
1da177e4 | 346 | { |
60490fe0 | 347 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 348 | struct e1000_hw *hw = &adapter->hw; |
406874a7 JP |
349 | u32 *regs_buff = p; |
350 | u16 phy_data; | |
1da177e4 | 351 | |
406874a7 | 352 | memset(p, 0, E1000_REGS_LEN * sizeof(u32)); |
1da177e4 LT |
353 | |
354 | regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id; | |
355 | ||
1dc32918 JP |
356 | regs_buff[0] = er32(CTRL); |
357 | regs_buff[1] = er32(STATUS); | |
1da177e4 | 358 | |
1dc32918 JP |
359 | regs_buff[2] = er32(RCTL); |
360 | regs_buff[3] = er32(RDLEN); | |
361 | regs_buff[4] = er32(RDH); | |
362 | regs_buff[5] = er32(RDT); | |
363 | regs_buff[6] = er32(RDTR); | |
1da177e4 | 364 | |
1dc32918 JP |
365 | regs_buff[7] = er32(TCTL); |
366 | regs_buff[8] = er32(TDLEN); | |
367 | regs_buff[9] = er32(TDH); | |
368 | regs_buff[10] = er32(TDT); | |
369 | regs_buff[11] = er32(TIDV); | |
1da177e4 | 370 | |
1dc32918 | 371 | regs_buff[12] = hw->phy_type; /* PHY type (IGP=1, M88=0) */ |
96838a40 | 372 | if (hw->phy_type == e1000_phy_igp) { |
1da177e4 LT |
373 | e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, |
374 | IGP01E1000_PHY_AGC_A); | |
375 | e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_A & | |
376 | IGP01E1000_PHY_PAGE_SELECT, &phy_data); | |
406874a7 | 377 | regs_buff[13] = (u32)phy_data; /* cable length */ |
1da177e4 LT |
378 | e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, |
379 | IGP01E1000_PHY_AGC_B); | |
380 | e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_B & | |
381 | IGP01E1000_PHY_PAGE_SELECT, &phy_data); | |
406874a7 | 382 | regs_buff[14] = (u32)phy_data; /* cable length */ |
1da177e4 LT |
383 | e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, |
384 | IGP01E1000_PHY_AGC_C); | |
385 | e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_C & | |
386 | IGP01E1000_PHY_PAGE_SELECT, &phy_data); | |
406874a7 | 387 | regs_buff[15] = (u32)phy_data; /* cable length */ |
1da177e4 LT |
388 | e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, |
389 | IGP01E1000_PHY_AGC_D); | |
390 | e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_D & | |
391 | IGP01E1000_PHY_PAGE_SELECT, &phy_data); | |
406874a7 | 392 | regs_buff[16] = (u32)phy_data; /* cable length */ |
1da177e4 LT |
393 | regs_buff[17] = 0; /* extended 10bt distance (not needed) */ |
394 | e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0); | |
395 | e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS & | |
396 | IGP01E1000_PHY_PAGE_SELECT, &phy_data); | |
406874a7 | 397 | regs_buff[18] = (u32)phy_data; /* cable polarity */ |
1da177e4 LT |
398 | e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, |
399 | IGP01E1000_PHY_PCS_INIT_REG); | |
400 | e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG & | |
401 | IGP01E1000_PHY_PAGE_SELECT, &phy_data); | |
406874a7 | 402 | regs_buff[19] = (u32)phy_data; /* cable polarity */ |
1da177e4 LT |
403 | regs_buff[20] = 0; /* polarity correction enabled (always) */ |
404 | regs_buff[22] = 0; /* phy receive errors (unavailable) */ | |
405 | regs_buff[23] = regs_buff[18]; /* mdix mode */ | |
406 | e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0); | |
407 | } else { | |
8fc897b0 | 408 | e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data); |
406874a7 | 409 | regs_buff[13] = (u32)phy_data; /* cable length */ |
1da177e4 LT |
410 | regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */ |
411 | regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */ | |
412 | regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */ | |
8fc897b0 | 413 | e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data); |
406874a7 | 414 | regs_buff[17] = (u32)phy_data; /* extended 10bt distance */ |
1da177e4 LT |
415 | regs_buff[18] = regs_buff[13]; /* cable polarity */ |
416 | regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */ | |
417 | regs_buff[20] = regs_buff[17]; /* polarity correction */ | |
418 | /* phy receive errors */ | |
419 | regs_buff[22] = adapter->phy_stats.receive_errors; | |
420 | regs_buff[23] = regs_buff[13]; /* mdix mode */ | |
421 | } | |
422 | regs_buff[21] = adapter->phy_stats.idle_errors; /* phy idle errors */ | |
423 | e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data); | |
406874a7 | 424 | regs_buff[24] = (u32)phy_data; /* phy local receiver status */ |
1da177e4 | 425 | regs_buff[25] = regs_buff[24]; /* phy remote receiver status */ |
96838a40 | 426 | if (hw->mac_type >= e1000_82540 && |
4ccc12ae | 427 | hw->media_type == e1000_media_type_copper) { |
1dc32918 | 428 | regs_buff[26] = er32(MANC); |
1da177e4 LT |
429 | } |
430 | } | |
431 | ||
64798845 | 432 | static int e1000_get_eeprom_len(struct net_device *netdev) |
1da177e4 | 433 | { |
60490fe0 | 434 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1dc32918 JP |
435 | struct e1000_hw *hw = &adapter->hw; |
436 | ||
437 | return hw->eeprom.word_size * 2; | |
1da177e4 LT |
438 | } |
439 | ||
64798845 JP |
440 | static int e1000_get_eeprom(struct net_device *netdev, |
441 | struct ethtool_eeprom *eeprom, u8 *bytes) | |
1da177e4 | 442 | { |
60490fe0 | 443 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 444 | struct e1000_hw *hw = &adapter->hw; |
406874a7 | 445 | u16 *eeprom_buff; |
1da177e4 LT |
446 | int first_word, last_word; |
447 | int ret_val = 0; | |
406874a7 | 448 | u16 i; |
1da177e4 | 449 | |
96838a40 | 450 | if (eeprom->len == 0) |
1da177e4 LT |
451 | return -EINVAL; |
452 | ||
453 | eeprom->magic = hw->vendor_id | (hw->device_id << 16); | |
454 | ||
455 | first_word = eeprom->offset >> 1; | |
456 | last_word = (eeprom->offset + eeprom->len - 1) >> 1; | |
457 | ||
406874a7 | 458 | eeprom_buff = kmalloc(sizeof(u16) * |
1da177e4 | 459 | (last_word - first_word + 1), GFP_KERNEL); |
96838a40 | 460 | if (!eeprom_buff) |
1da177e4 LT |
461 | return -ENOMEM; |
462 | ||
96838a40 | 463 | if (hw->eeprom.type == e1000_eeprom_spi) |
1da177e4 LT |
464 | ret_val = e1000_read_eeprom(hw, first_word, |
465 | last_word - first_word + 1, | |
466 | eeprom_buff); | |
467 | else { | |
c7be73bc JP |
468 | for (i = 0; i < last_word - first_word + 1; i++) { |
469 | ret_val = e1000_read_eeprom(hw, first_word + i, 1, | |
470 | &eeprom_buff[i]); | |
471 | if (ret_val) | |
1da177e4 | 472 | break; |
c7be73bc | 473 | } |
1da177e4 LT |
474 | } |
475 | ||
476 | /* Device's eeprom is always little-endian, word addressable */ | |
477 | for (i = 0; i < last_word - first_word + 1; i++) | |
478 | le16_to_cpus(&eeprom_buff[i]); | |
479 | ||
406874a7 | 480 | memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), |
6cfbd97b | 481 | eeprom->len); |
1da177e4 LT |
482 | kfree(eeprom_buff); |
483 | ||
484 | return ret_val; | |
485 | } | |
486 | ||
64798845 JP |
487 | static int e1000_set_eeprom(struct net_device *netdev, |
488 | struct ethtool_eeprom *eeprom, u8 *bytes) | |
1da177e4 | 489 | { |
60490fe0 | 490 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 491 | struct e1000_hw *hw = &adapter->hw; |
406874a7 | 492 | u16 *eeprom_buff; |
1da177e4 LT |
493 | void *ptr; |
494 | int max_len, first_word, last_word, ret_val = 0; | |
406874a7 | 495 | u16 i; |
1da177e4 | 496 | |
96838a40 | 497 | if (eeprom->len == 0) |
1da177e4 LT |
498 | return -EOPNOTSUPP; |
499 | ||
96838a40 | 500 | if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16))) |
1da177e4 LT |
501 | return -EFAULT; |
502 | ||
503 | max_len = hw->eeprom.word_size * 2; | |
504 | ||
505 | first_word = eeprom->offset >> 1; | |
506 | last_word = (eeprom->offset + eeprom->len - 1) >> 1; | |
507 | eeprom_buff = kmalloc(max_len, GFP_KERNEL); | |
96838a40 | 508 | if (!eeprom_buff) |
1da177e4 LT |
509 | return -ENOMEM; |
510 | ||
511 | ptr = (void *)eeprom_buff; | |
512 | ||
96838a40 | 513 | if (eeprom->offset & 1) { |
6cfbd97b JK |
514 | /* need read/modify/write of first changed EEPROM word |
515 | * only the second byte of the word is being modified | |
516 | */ | |
1da177e4 LT |
517 | ret_val = e1000_read_eeprom(hw, first_word, 1, |
518 | &eeprom_buff[0]); | |
519 | ptr++; | |
520 | } | |
96838a40 | 521 | if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) { |
6cfbd97b JK |
522 | /* need read/modify/write of last changed EEPROM word |
523 | * only the first byte of the word is being modified | |
524 | */ | |
1da177e4 | 525 | ret_val = e1000_read_eeprom(hw, last_word, 1, |
887a79f4 | 526 | &eeprom_buff[last_word - first_word]); |
1da177e4 LT |
527 | } |
528 | ||
529 | /* Device's eeprom is always little-endian, word addressable */ | |
530 | for (i = 0; i < last_word - first_word + 1; i++) | |
531 | le16_to_cpus(&eeprom_buff[i]); | |
532 | ||
533 | memcpy(ptr, bytes, eeprom->len); | |
534 | ||
535 | for (i = 0; i < last_word - first_word + 1; i++) | |
536 | eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]); | |
537 | ||
538 | ret_val = e1000_write_eeprom(hw, first_word, | |
539 | last_word - first_word + 1, eeprom_buff); | |
540 | ||
1532ecea JB |
541 | /* Update the checksum over the first part of the EEPROM if needed */ |
542 | if ((ret_val == 0) && (first_word <= EEPROM_CHECKSUM_REG)) | |
1da177e4 LT |
543 | e1000_update_eeprom_checksum(hw); |
544 | ||
545 | kfree(eeprom_buff); | |
546 | return ret_val; | |
547 | } | |
548 | ||
64798845 JP |
549 | static void e1000_get_drvinfo(struct net_device *netdev, |
550 | struct ethtool_drvinfo *drvinfo) | |
1da177e4 | 551 | { |
60490fe0 | 552 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 553 | |
612a94d6 RJ |
554 | strlcpy(drvinfo->driver, e1000_driver_name, |
555 | sizeof(drvinfo->driver)); | |
556 | strlcpy(drvinfo->version, e1000_driver_version, | |
557 | sizeof(drvinfo->version)); | |
a2917e22 | 558 | |
612a94d6 RJ |
559 | strlcpy(drvinfo->bus_info, pci_name(adapter->pdev), |
560 | sizeof(drvinfo->bus_info)); | |
1da177e4 LT |
561 | } |
562 | ||
64798845 JP |
563 | static void e1000_get_ringparam(struct net_device *netdev, |
564 | struct ethtool_ringparam *ring) | |
1da177e4 | 565 | { |
60490fe0 | 566 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1dc32918 JP |
567 | struct e1000_hw *hw = &adapter->hw; |
568 | e1000_mac_type mac_type = hw->mac_type; | |
581d708e MC |
569 | struct e1000_tx_ring *txdr = adapter->tx_ring; |
570 | struct e1000_rx_ring *rxdr = adapter->rx_ring; | |
1da177e4 LT |
571 | |
572 | ring->rx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_RXD : | |
573 | E1000_MAX_82544_RXD; | |
574 | ring->tx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_TXD : | |
575 | E1000_MAX_82544_TXD; | |
1da177e4 LT |
576 | ring->rx_pending = rxdr->count; |
577 | ring->tx_pending = txdr->count; | |
1da177e4 LT |
578 | } |
579 | ||
64798845 JP |
580 | static int e1000_set_ringparam(struct net_device *netdev, |
581 | struct ethtool_ringparam *ring) | |
1da177e4 | 582 | { |
60490fe0 | 583 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1dc32918 JP |
584 | struct e1000_hw *hw = &adapter->hw; |
585 | e1000_mac_type mac_type = hw->mac_type; | |
793fab72 VA |
586 | struct e1000_tx_ring *txdr, *tx_old; |
587 | struct e1000_rx_ring *rxdr, *rx_old; | |
1c7e5b12 | 588 | int i, err; |
581d708e | 589 | |
0989aa43 JK |
590 | if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) |
591 | return -EINVAL; | |
592 | ||
2db10a08 AK |
593 | while (test_and_set_bit(__E1000_RESETTING, &adapter->flags)) |
594 | msleep(1); | |
595 | ||
581d708e MC |
596 | if (netif_running(adapter->netdev)) |
597 | e1000_down(adapter); | |
1da177e4 LT |
598 | |
599 | tx_old = adapter->tx_ring; | |
600 | rx_old = adapter->rx_ring; | |
601 | ||
793fab72 | 602 | err = -ENOMEM; |
6cfbd97b JK |
603 | txdr = kcalloc(adapter->num_tx_queues, sizeof(struct e1000_tx_ring), |
604 | GFP_KERNEL); | |
793fab72 VA |
605 | if (!txdr) |
606 | goto err_alloc_tx; | |
581d708e | 607 | |
6cfbd97b JK |
608 | rxdr = kcalloc(adapter->num_rx_queues, sizeof(struct e1000_rx_ring), |
609 | GFP_KERNEL); | |
793fab72 VA |
610 | if (!rxdr) |
611 | goto err_alloc_rx; | |
581d708e | 612 | |
793fab72 VA |
613 | adapter->tx_ring = txdr; |
614 | adapter->rx_ring = rxdr; | |
581d708e | 615 | |
887a79f4 KMJ |
616 | rxdr->count = max(ring->rx_pending, (u32)E1000_MIN_RXD); |
617 | rxdr->count = min(rxdr->count, (u32)(mac_type < e1000_82544 ? | |
6cfbd97b | 618 | E1000_MAX_RXD : E1000_MAX_82544_RXD)); |
9099cfb9 | 619 | rxdr->count = ALIGN(rxdr->count, REQ_RX_DESCRIPTOR_MULTIPLE); |
887a79f4 KMJ |
620 | txdr->count = max(ring->tx_pending, (u32)E1000_MIN_TXD); |
621 | txdr->count = min(txdr->count, (u32)(mac_type < e1000_82544 ? | |
6cfbd97b | 622 | E1000_MAX_TXD : E1000_MAX_82544_TXD)); |
9099cfb9 | 623 | txdr->count = ALIGN(txdr->count, REQ_TX_DESCRIPTOR_MULTIPLE); |
1da177e4 | 624 | |
f56799ea | 625 | for (i = 0; i < adapter->num_tx_queues; i++) |
581d708e | 626 | txdr[i].count = txdr->count; |
f56799ea | 627 | for (i = 0; i < adapter->num_rx_queues; i++) |
581d708e | 628 | rxdr[i].count = rxdr->count; |
581d708e | 629 | |
96838a40 | 630 | if (netif_running(adapter->netdev)) { |
1da177e4 | 631 | /* Try to get new resources before deleting old */ |
c7be73bc JP |
632 | err = e1000_setup_all_rx_resources(adapter); |
633 | if (err) | |
1da177e4 | 634 | goto err_setup_rx; |
c7be73bc JP |
635 | err = e1000_setup_all_tx_resources(adapter); |
636 | if (err) | |
1da177e4 LT |
637 | goto err_setup_tx; |
638 | ||
639 | /* save the new, restore the old in order to free it, | |
6cfbd97b JK |
640 | * then restore the new back again |
641 | */ | |
1da177e4 | 642 | |
1da177e4 LT |
643 | adapter->rx_ring = rx_old; |
644 | adapter->tx_ring = tx_old; | |
581d708e MC |
645 | e1000_free_all_rx_resources(adapter); |
646 | e1000_free_all_tx_resources(adapter); | |
647 | kfree(tx_old); | |
648 | kfree(rx_old); | |
793fab72 VA |
649 | adapter->rx_ring = rxdr; |
650 | adapter->tx_ring = txdr; | |
c7be73bc JP |
651 | err = e1000_up(adapter); |
652 | if (err) | |
2db10a08 | 653 | goto err_setup; |
1da177e4 LT |
654 | } |
655 | ||
2db10a08 | 656 | clear_bit(__E1000_RESETTING, &adapter->flags); |
1da177e4 LT |
657 | return 0; |
658 | err_setup_tx: | |
581d708e | 659 | e1000_free_all_rx_resources(adapter); |
1da177e4 LT |
660 | err_setup_rx: |
661 | adapter->rx_ring = rx_old; | |
662 | adapter->tx_ring = tx_old; | |
793fab72 VA |
663 | kfree(rxdr); |
664 | err_alloc_rx: | |
665 | kfree(txdr); | |
666 | err_alloc_tx: | |
1da177e4 | 667 | e1000_up(adapter); |
2db10a08 AK |
668 | err_setup: |
669 | clear_bit(__E1000_RESETTING, &adapter->flags); | |
1da177e4 LT |
670 | return err; |
671 | } | |
672 | ||
64798845 JP |
673 | static bool reg_pattern_test(struct e1000_adapter *adapter, u64 *data, int reg, |
674 | u32 mask, u32 write) | |
7e64300a | 675 | { |
1dc32918 | 676 | struct e1000_hw *hw = &adapter->hw; |
887a79f4 KMJ |
677 | static const u32 test[] = { |
678 | 0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF | |
679 | }; | |
1dc32918 | 680 | u8 __iomem *address = hw->hw_addr + reg; |
406874a7 | 681 | u32 read; |
7e64300a JP |
682 | int i; |
683 | ||
684 | for (i = 0; i < ARRAY_SIZE(test); i++) { | |
685 | writel(write & test[i], address); | |
686 | read = readl(address); | |
687 | if (read != (write & test[i] & mask)) { | |
feb8f478 ET |
688 | e_err(drv, "pattern test reg %04X failed: " |
689 | "got 0x%08X expected 0x%08X\n", | |
690 | reg, read, (write & test[i] & mask)); | |
7e64300a JP |
691 | *data = reg; |
692 | return true; | |
693 | } | |
694 | } | |
695 | return false; | |
1da177e4 LT |
696 | } |
697 | ||
64798845 JP |
698 | static bool reg_set_and_check(struct e1000_adapter *adapter, u64 *data, int reg, |
699 | u32 mask, u32 write) | |
7e64300a | 700 | { |
1dc32918 JP |
701 | struct e1000_hw *hw = &adapter->hw; |
702 | u8 __iomem *address = hw->hw_addr + reg; | |
406874a7 | 703 | u32 read; |
7e64300a JP |
704 | |
705 | writel(write & mask, address); | |
706 | read = readl(address); | |
707 | if ((read & mask) != (write & mask)) { | |
feb8f478 | 708 | e_err(drv, "set/check reg %04X test failed: " |
675ad473 ET |
709 | "got 0x%08X expected 0x%08X\n", |
710 | reg, (read & mask), (write & mask)); | |
7e64300a JP |
711 | *data = reg; |
712 | return true; | |
713 | } | |
714 | return false; | |
1da177e4 LT |
715 | } |
716 | ||
7e64300a JP |
717 | #define REG_PATTERN_TEST(reg, mask, write) \ |
718 | do { \ | |
719 | if (reg_pattern_test(adapter, data, \ | |
1dc32918 | 720 | (hw->mac_type >= e1000_82543) \ |
7e64300a JP |
721 | ? E1000_##reg : E1000_82542_##reg, \ |
722 | mask, write)) \ | |
723 | return 1; \ | |
724 | } while (0) | |
725 | ||
726 | #define REG_SET_AND_CHECK(reg, mask, write) \ | |
727 | do { \ | |
728 | if (reg_set_and_check(adapter, data, \ | |
1dc32918 | 729 | (hw->mac_type >= e1000_82543) \ |
7e64300a JP |
730 | ? E1000_##reg : E1000_82542_##reg, \ |
731 | mask, write)) \ | |
732 | return 1; \ | |
733 | } while (0) | |
734 | ||
64798845 | 735 | static int e1000_reg_test(struct e1000_adapter *adapter, u64 *data) |
1da177e4 | 736 | { |
406874a7 JP |
737 | u32 value, before, after; |
738 | u32 i, toggle; | |
1dc32918 | 739 | struct e1000_hw *hw = &adapter->hw; |
1da177e4 LT |
740 | |
741 | /* The status register is Read Only, so a write should fail. | |
742 | * Some bits that get toggled are ignored. | |
743 | */ | |
1532ecea | 744 | |
868d5309 | 745 | /* there are several bits on newer hardware that are r/w */ |
1532ecea | 746 | toggle = 0xFFFFF833; |
b01f6691 | 747 | |
1dc32918 JP |
748 | before = er32(STATUS); |
749 | value = (er32(STATUS) & toggle); | |
750 | ew32(STATUS, toggle); | |
751 | after = er32(STATUS) & toggle; | |
96838a40 | 752 | if (value != after) { |
feb8f478 | 753 | e_err(drv, "failed STATUS register test got: " |
675ad473 | 754 | "0x%08X expected: 0x%08X\n", after, value); |
1da177e4 LT |
755 | *data = 1; |
756 | return 1; | |
757 | } | |
b01f6691 | 758 | /* restore previous status */ |
1dc32918 | 759 | ew32(STATUS, before); |
90fb5135 | 760 | |
1532ecea JB |
761 | REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF); |
762 | REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF); | |
763 | REG_PATTERN_TEST(FCT, 0x0000FFFF, 0xFFFFFFFF); | |
764 | REG_PATTERN_TEST(VET, 0x0000FFFF, 0xFFFFFFFF); | |
90fb5135 | 765 | |
1da177e4 LT |
766 | REG_PATTERN_TEST(RDTR, 0x0000FFFF, 0xFFFFFFFF); |
767 | REG_PATTERN_TEST(RDBAH, 0xFFFFFFFF, 0xFFFFFFFF); | |
768 | REG_PATTERN_TEST(RDLEN, 0x000FFF80, 0x000FFFFF); | |
769 | REG_PATTERN_TEST(RDH, 0x0000FFFF, 0x0000FFFF); | |
770 | REG_PATTERN_TEST(RDT, 0x0000FFFF, 0x0000FFFF); | |
771 | REG_PATTERN_TEST(FCRTH, 0x0000FFF8, 0x0000FFF8); | |
772 | REG_PATTERN_TEST(FCTTV, 0x0000FFFF, 0x0000FFFF); | |
773 | REG_PATTERN_TEST(TIPG, 0x3FFFFFFF, 0x3FFFFFFF); | |
774 | REG_PATTERN_TEST(TDBAH, 0xFFFFFFFF, 0xFFFFFFFF); | |
775 | REG_PATTERN_TEST(TDLEN, 0x000FFF80, 0x000FFFFF); | |
776 | ||
777 | REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x00000000); | |
90fb5135 | 778 | |
1532ecea | 779 | before = 0x06DFB3FE; |
cd94dd0b | 780 | REG_SET_AND_CHECK(RCTL, before, 0x003FFFFB); |
1da177e4 LT |
781 | REG_SET_AND_CHECK(TCTL, 0xFFFFFFFF, 0x00000000); |
782 | ||
1dc32918 | 783 | if (hw->mac_type >= e1000_82543) { |
cd94dd0b | 784 | REG_SET_AND_CHECK(RCTL, before, 0xFFFFFFFF); |
1da177e4 | 785 | REG_PATTERN_TEST(RDBAL, 0xFFFFFFF0, 0xFFFFFFFF); |
1532ecea | 786 | REG_PATTERN_TEST(TXCW, 0xC000FFFF, 0x0000FFFF); |
1da177e4 LT |
787 | REG_PATTERN_TEST(TDBAL, 0xFFFFFFF0, 0xFFFFFFFF); |
788 | REG_PATTERN_TEST(TIDV, 0x0000FFFF, 0x0000FFFF); | |
1532ecea | 789 | value = E1000_RAR_ENTRIES; |
cd94dd0b | 790 | for (i = 0; i < value; i++) { |
887a79f4 KMJ |
791 | REG_PATTERN_TEST(RA + (((i << 1) + 1) << 2), |
792 | 0x8003FFFF, 0xFFFFFFFF); | |
1da177e4 | 793 | } |
1da177e4 | 794 | } else { |
1da177e4 LT |
795 | REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x01FFFFFF); |
796 | REG_PATTERN_TEST(RDBAL, 0xFFFFF000, 0xFFFFFFFF); | |
797 | REG_PATTERN_TEST(TXCW, 0x0000FFFF, 0x0000FFFF); | |
798 | REG_PATTERN_TEST(TDBAL, 0xFFFFF000, 0xFFFFFFFF); | |
1da177e4 LT |
799 | } |
800 | ||
1532ecea | 801 | value = E1000_MC_TBL_SIZE; |
cd94dd0b | 802 | for (i = 0; i < value; i++) |
1da177e4 LT |
803 | REG_PATTERN_TEST(MTA + (i << 2), 0xFFFFFFFF, 0xFFFFFFFF); |
804 | ||
805 | *data = 0; | |
806 | return 0; | |
807 | } | |
808 | ||
64798845 | 809 | static int e1000_eeprom_test(struct e1000_adapter *adapter, u64 *data) |
1da177e4 | 810 | { |
1dc32918 | 811 | struct e1000_hw *hw = &adapter->hw; |
406874a7 JP |
812 | u16 temp; |
813 | u16 checksum = 0; | |
814 | u16 i; | |
1da177e4 LT |
815 | |
816 | *data = 0; | |
817 | /* Read and add up the contents of the EEPROM */ | |
96838a40 | 818 | for (i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) { |
1dc32918 | 819 | if ((e1000_read_eeprom(hw, i, 1, &temp)) < 0) { |
1da177e4 LT |
820 | *data = 1; |
821 | break; | |
822 | } | |
823 | checksum += temp; | |
824 | } | |
825 | ||
826 | /* If Checksum is not Correct return error else test passed */ | |
e982f17c | 827 | if ((checksum != (u16)EEPROM_SUM) && !(*data)) |
1da177e4 LT |
828 | *data = 2; |
829 | ||
830 | return *data; | |
831 | } | |
832 | ||
64798845 | 833 | static irqreturn_t e1000_test_intr(int irq, void *data) |
1da177e4 | 834 | { |
e982f17c | 835 | struct net_device *netdev = (struct net_device *)data; |
60490fe0 | 836 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1dc32918 | 837 | struct e1000_hw *hw = &adapter->hw; |
1da177e4 | 838 | |
1dc32918 | 839 | adapter->test_icr |= er32(ICR); |
1da177e4 LT |
840 | |
841 | return IRQ_HANDLED; | |
842 | } | |
843 | ||
64798845 | 844 | static int e1000_intr_test(struct e1000_adapter *adapter, u64 *data) |
1da177e4 LT |
845 | { |
846 | struct net_device *netdev = adapter->netdev; | |
406874a7 | 847 | u32 mask, i = 0; |
c3033b01 | 848 | bool shared_int = true; |
406874a7 | 849 | u32 irq = adapter->pdev->irq; |
1dc32918 | 850 | struct e1000_hw *hw = &adapter->hw; |
1da177e4 LT |
851 | |
852 | *data = 0; | |
853 | ||
6cfbd97b JK |
854 | /* NOTE: we don't test MSI interrupts here, yet |
855 | * Hook up test interrupt handler just for this test | |
856 | */ | |
a0607fd3 | 857 | if (!request_irq(irq, e1000_test_intr, IRQF_PROBE_SHARED, netdev->name, |
6cfbd97b | 858 | netdev)) |
c3033b01 | 859 | shared_int = false; |
a0607fd3 | 860 | else if (request_irq(irq, e1000_test_intr, IRQF_SHARED, |
6cfbd97b | 861 | netdev->name, netdev)) { |
1da177e4 LT |
862 | *data = 1; |
863 | return -1; | |
864 | } | |
feb8f478 ET |
865 | e_info(hw, "testing %s interrupt\n", (shared_int ? |
866 | "shared" : "unshared")); | |
1da177e4 LT |
867 | |
868 | /* Disable all the interrupts */ | |
1dc32918 | 869 | ew32(IMC, 0xFFFFFFFF); |
945a5151 | 870 | E1000_WRITE_FLUSH(); |
f8ec4733 | 871 | msleep(10); |
1da177e4 LT |
872 | |
873 | /* Test each interrupt */ | |
96838a40 | 874 | for (; i < 10; i++) { |
1da177e4 LT |
875 | /* Interrupt to test */ |
876 | mask = 1 << i; | |
877 | ||
76c224bc AK |
878 | if (!shared_int) { |
879 | /* Disable the interrupt to be reported in | |
880 | * the cause register and then force the same | |
881 | * interrupt and see if one gets posted. If | |
882 | * an interrupt was posted to the bus, the | |
883 | * test failed. | |
884 | */ | |
885 | adapter->test_icr = 0; | |
1dc32918 JP |
886 | ew32(IMC, mask); |
887 | ew32(ICS, mask); | |
945a5151 | 888 | E1000_WRITE_FLUSH(); |
f8ec4733 | 889 | msleep(10); |
76c224bc AK |
890 | |
891 | if (adapter->test_icr & mask) { | |
892 | *data = 3; | |
893 | break; | |
894 | } | |
1da177e4 LT |
895 | } |
896 | ||
897 | /* Enable the interrupt to be reported in | |
898 | * the cause register and then force the same | |
899 | * interrupt and see if one gets posted. If | |
900 | * an interrupt was not posted to the bus, the | |
901 | * test failed. | |
902 | */ | |
903 | adapter->test_icr = 0; | |
1dc32918 JP |
904 | ew32(IMS, mask); |
905 | ew32(ICS, mask); | |
945a5151 | 906 | E1000_WRITE_FLUSH(); |
f8ec4733 | 907 | msleep(10); |
1da177e4 | 908 | |
96838a40 | 909 | if (!(adapter->test_icr & mask)) { |
1da177e4 LT |
910 | *data = 4; |
911 | break; | |
912 | } | |
913 | ||
76c224bc | 914 | if (!shared_int) { |
1da177e4 LT |
915 | /* Disable the other interrupts to be reported in |
916 | * the cause register and then force the other | |
917 | * interrupts and see if any get posted. If | |
918 | * an interrupt was posted to the bus, the | |
919 | * test failed. | |
920 | */ | |
921 | adapter->test_icr = 0; | |
1dc32918 JP |
922 | ew32(IMC, ~mask & 0x00007FFF); |
923 | ew32(ICS, ~mask & 0x00007FFF); | |
945a5151 | 924 | E1000_WRITE_FLUSH(); |
f8ec4733 | 925 | msleep(10); |
1da177e4 | 926 | |
96838a40 | 927 | if (adapter->test_icr) { |
1da177e4 LT |
928 | *data = 5; |
929 | break; | |
930 | } | |
931 | } | |
932 | } | |
933 | ||
934 | /* Disable all the interrupts */ | |
1dc32918 | 935 | ew32(IMC, 0xFFFFFFFF); |
945a5151 | 936 | E1000_WRITE_FLUSH(); |
f8ec4733 | 937 | msleep(10); |
1da177e4 LT |
938 | |
939 | /* Unhook test interrupt handler */ | |
940 | free_irq(irq, netdev); | |
941 | ||
942 | return *data; | |
943 | } | |
944 | ||
64798845 | 945 | static void e1000_free_desc_rings(struct e1000_adapter *adapter) |
1da177e4 | 946 | { |
581d708e MC |
947 | struct e1000_tx_ring *txdr = &adapter->test_tx_ring; |
948 | struct e1000_rx_ring *rxdr = &adapter->test_rx_ring; | |
1da177e4 LT |
949 | struct pci_dev *pdev = adapter->pdev; |
950 | int i; | |
951 | ||
96838a40 JB |
952 | if (txdr->desc && txdr->buffer_info) { |
953 | for (i = 0; i < txdr->count; i++) { | |
954 | if (txdr->buffer_info[i].dma) | |
b16f53be NN |
955 | dma_unmap_single(&pdev->dev, |
956 | txdr->buffer_info[i].dma, | |
1da177e4 | 957 | txdr->buffer_info[i].length, |
b16f53be | 958 | DMA_TO_DEVICE); |
96838a40 | 959 | if (txdr->buffer_info[i].skb) |
1da177e4 LT |
960 | dev_kfree_skb(txdr->buffer_info[i].skb); |
961 | } | |
962 | } | |
963 | ||
96838a40 JB |
964 | if (rxdr->desc && rxdr->buffer_info) { |
965 | for (i = 0; i < rxdr->count; i++) { | |
966 | if (rxdr->buffer_info[i].dma) | |
b16f53be NN |
967 | dma_unmap_single(&pdev->dev, |
968 | rxdr->buffer_info[i].dma, | |
93f0afe9 | 969 | E1000_RXBUFFER_2048, |
b16f53be | 970 | DMA_FROM_DEVICE); |
13809609 | 971 | kfree(rxdr->buffer_info[i].rxbuf.data); |
1da177e4 LT |
972 | } |
973 | } | |
974 | ||
f5645110 | 975 | if (txdr->desc) { |
b16f53be NN |
976 | dma_free_coherent(&pdev->dev, txdr->size, txdr->desc, |
977 | txdr->dma); | |
6b27adb6 JL |
978 | txdr->desc = NULL; |
979 | } | |
f5645110 | 980 | if (rxdr->desc) { |
b16f53be NN |
981 | dma_free_coherent(&pdev->dev, rxdr->size, rxdr->desc, |
982 | rxdr->dma); | |
6b27adb6 JL |
983 | rxdr->desc = NULL; |
984 | } | |
1da177e4 | 985 | |
b4558ea9 | 986 | kfree(txdr->buffer_info); |
6b27adb6 | 987 | txdr->buffer_info = NULL; |
b4558ea9 | 988 | kfree(rxdr->buffer_info); |
6b27adb6 | 989 | rxdr->buffer_info = NULL; |
1da177e4 LT |
990 | } |
991 | ||
64798845 | 992 | static int e1000_setup_desc_rings(struct e1000_adapter *adapter) |
1da177e4 | 993 | { |
1dc32918 | 994 | struct e1000_hw *hw = &adapter->hw; |
581d708e MC |
995 | struct e1000_tx_ring *txdr = &adapter->test_tx_ring; |
996 | struct e1000_rx_ring *rxdr = &adapter->test_rx_ring; | |
1da177e4 | 997 | struct pci_dev *pdev = adapter->pdev; |
406874a7 | 998 | u32 rctl; |
1c7e5b12 | 999 | int i, ret_val; |
1da177e4 LT |
1000 | |
1001 | /* Setup Tx descriptor ring and Tx buffers */ | |
1002 | ||
96838a40 JB |
1003 | if (!txdr->count) |
1004 | txdr->count = E1000_DEFAULT_TXD; | |
1da177e4 | 1005 | |
580f321d | 1006 | txdr->buffer_info = kcalloc(txdr->count, sizeof(struct e1000_tx_buffer), |
c7be73bc JP |
1007 | GFP_KERNEL); |
1008 | if (!txdr->buffer_info) { | |
1da177e4 LT |
1009 | ret_val = 1; |
1010 | goto err_nomem; | |
1011 | } | |
1da177e4 LT |
1012 | |
1013 | txdr->size = txdr->count * sizeof(struct e1000_tx_desc); | |
9099cfb9 | 1014 | txdr->size = ALIGN(txdr->size, 4096); |
ede23fa8 JP |
1015 | txdr->desc = dma_zalloc_coherent(&pdev->dev, txdr->size, &txdr->dma, |
1016 | GFP_KERNEL); | |
c7be73bc | 1017 | if (!txdr->desc) { |
1da177e4 LT |
1018 | ret_val = 2; |
1019 | goto err_nomem; | |
1020 | } | |
1da177e4 LT |
1021 | txdr->next_to_use = txdr->next_to_clean = 0; |
1022 | ||
e982f17c JP |
1023 | ew32(TDBAL, ((u64)txdr->dma & 0x00000000FFFFFFFF)); |
1024 | ew32(TDBAH, ((u64)txdr->dma >> 32)); | |
1dc32918 JP |
1025 | ew32(TDLEN, txdr->count * sizeof(struct e1000_tx_desc)); |
1026 | ew32(TDH, 0); | |
1027 | ew32(TDT, 0); | |
1028 | ew32(TCTL, E1000_TCTL_PSP | E1000_TCTL_EN | | |
1029 | E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT | | |
1030 | E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT); | |
1da177e4 | 1031 | |
96838a40 | 1032 | for (i = 0; i < txdr->count; i++) { |
1da177e4 LT |
1033 | struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*txdr, i); |
1034 | struct sk_buff *skb; | |
1035 | unsigned int size = 1024; | |
1036 | ||
c7be73bc JP |
1037 | skb = alloc_skb(size, GFP_KERNEL); |
1038 | if (!skb) { | |
1da177e4 LT |
1039 | ret_val = 3; |
1040 | goto err_nomem; | |
1041 | } | |
1042 | skb_put(skb, size); | |
1043 | txdr->buffer_info[i].skb = skb; | |
1044 | txdr->buffer_info[i].length = skb->len; | |
1045 | txdr->buffer_info[i].dma = | |
b16f53be NN |
1046 | dma_map_single(&pdev->dev, skb->data, skb->len, |
1047 | DMA_TO_DEVICE); | |
d6b057b5 CP |
1048 | if (dma_mapping_error(&pdev->dev, txdr->buffer_info[i].dma)) { |
1049 | ret_val = 4; | |
1050 | goto err_nomem; | |
1051 | } | |
1da177e4 LT |
1052 | tx_desc->buffer_addr = cpu_to_le64(txdr->buffer_info[i].dma); |
1053 | tx_desc->lower.data = cpu_to_le32(skb->len); | |
1054 | tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP | | |
1055 | E1000_TXD_CMD_IFCS | | |
1056 | E1000_TXD_CMD_RPS); | |
1057 | tx_desc->upper.data = 0; | |
1058 | } | |
1059 | ||
1060 | /* Setup Rx descriptor ring and Rx buffers */ | |
1061 | ||
96838a40 JB |
1062 | if (!rxdr->count) |
1063 | rxdr->count = E1000_DEFAULT_RXD; | |
1da177e4 | 1064 | |
93f0afe9 | 1065 | rxdr->buffer_info = kcalloc(rxdr->count, sizeof(struct e1000_rx_buffer), |
c7be73bc JP |
1066 | GFP_KERNEL); |
1067 | if (!rxdr->buffer_info) { | |
d6b057b5 | 1068 | ret_val = 5; |
1da177e4 LT |
1069 | goto err_nomem; |
1070 | } | |
1da177e4 LT |
1071 | |
1072 | rxdr->size = rxdr->count * sizeof(struct e1000_rx_desc); | |
ede23fa8 JP |
1073 | rxdr->desc = dma_zalloc_coherent(&pdev->dev, rxdr->size, &rxdr->dma, |
1074 | GFP_KERNEL); | |
c7be73bc | 1075 | if (!rxdr->desc) { |
d6b057b5 | 1076 | ret_val = 6; |
1da177e4 LT |
1077 | goto err_nomem; |
1078 | } | |
1da177e4 LT |
1079 | rxdr->next_to_use = rxdr->next_to_clean = 0; |
1080 | ||
1dc32918 JP |
1081 | rctl = er32(RCTL); |
1082 | ew32(RCTL, rctl & ~E1000_RCTL_EN); | |
e982f17c JP |
1083 | ew32(RDBAL, ((u64)rxdr->dma & 0xFFFFFFFF)); |
1084 | ew32(RDBAH, ((u64)rxdr->dma >> 32)); | |
1dc32918 JP |
1085 | ew32(RDLEN, rxdr->size); |
1086 | ew32(RDH, 0); | |
1087 | ew32(RDT, 0); | |
1da177e4 LT |
1088 | rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 | |
1089 | E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF | | |
1dc32918 JP |
1090 | (hw->mc_filter_type << E1000_RCTL_MO_SHIFT); |
1091 | ew32(RCTL, rctl); | |
1da177e4 | 1092 | |
96838a40 | 1093 | for (i = 0; i < rxdr->count; i++) { |
1da177e4 | 1094 | struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rxdr, i); |
13809609 | 1095 | u8 *buf; |
1da177e4 | 1096 | |
13809609 FW |
1097 | buf = kzalloc(E1000_RXBUFFER_2048 + NET_SKB_PAD + NET_IP_ALIGN, |
1098 | GFP_KERNEL); | |
1099 | if (!buf) { | |
d6b057b5 | 1100 | ret_val = 7; |
1da177e4 LT |
1101 | goto err_nomem; |
1102 | } | |
13809609 FW |
1103 | rxdr->buffer_info[i].rxbuf.data = buf; |
1104 | ||
1da177e4 | 1105 | rxdr->buffer_info[i].dma = |
13809609 FW |
1106 | dma_map_single(&pdev->dev, |
1107 | buf + NET_SKB_PAD + NET_IP_ALIGN, | |
b16f53be | 1108 | E1000_RXBUFFER_2048, DMA_FROM_DEVICE); |
d6b057b5 CP |
1109 | if (dma_mapping_error(&pdev->dev, rxdr->buffer_info[i].dma)) { |
1110 | ret_val = 8; | |
1111 | goto err_nomem; | |
1112 | } | |
1da177e4 | 1113 | rx_desc->buffer_addr = cpu_to_le64(rxdr->buffer_info[i].dma); |
1da177e4 LT |
1114 | } |
1115 | ||
1116 | return 0; | |
1117 | ||
1118 | err_nomem: | |
1119 | e1000_free_desc_rings(adapter); | |
1120 | return ret_val; | |
1121 | } | |
1122 | ||
64798845 | 1123 | static void e1000_phy_disable_receiver(struct e1000_adapter *adapter) |
1da177e4 | 1124 | { |
1dc32918 JP |
1125 | struct e1000_hw *hw = &adapter->hw; |
1126 | ||
1da177e4 | 1127 | /* Write out to PHY registers 29 and 30 to disable the Receiver. */ |
1dc32918 JP |
1128 | e1000_write_phy_reg(hw, 29, 0x001F); |
1129 | e1000_write_phy_reg(hw, 30, 0x8FFC); | |
1130 | e1000_write_phy_reg(hw, 29, 0x001A); | |
1131 | e1000_write_phy_reg(hw, 30, 0x8FF0); | |
1da177e4 LT |
1132 | } |
1133 | ||
64798845 | 1134 | static void e1000_phy_reset_clk_and_crs(struct e1000_adapter *adapter) |
1da177e4 | 1135 | { |
1dc32918 | 1136 | struct e1000_hw *hw = &adapter->hw; |
406874a7 | 1137 | u16 phy_reg; |
1da177e4 LT |
1138 | |
1139 | /* Because we reset the PHY above, we need to re-force TX_CLK in the | |
1140 | * Extended PHY Specific Control Register to 25MHz clock. This | |
1141 | * value defaults back to a 2.5MHz clock when the PHY is reset. | |
1142 | */ | |
1dc32918 | 1143 | e1000_read_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg); |
1da177e4 | 1144 | phy_reg |= M88E1000_EPSCR_TX_CLK_25; |
887a79f4 | 1145 | e1000_write_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, phy_reg); |
1da177e4 LT |
1146 | |
1147 | /* In addition, because of the s/w reset above, we need to enable | |
1148 | * CRS on TX. This must be set for both full and half duplex | |
1149 | * operation. | |
1150 | */ | |
1dc32918 | 1151 | e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_reg); |
1da177e4 | 1152 | phy_reg |= M88E1000_PSCR_ASSERT_CRS_ON_TX; |
887a79f4 | 1153 | e1000_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_reg); |
1da177e4 LT |
1154 | } |
1155 | ||
64798845 | 1156 | static int e1000_nonintegrated_phy_loopback(struct e1000_adapter *adapter) |
1da177e4 | 1157 | { |
1dc32918 | 1158 | struct e1000_hw *hw = &adapter->hw; |
406874a7 JP |
1159 | u32 ctrl_reg; |
1160 | u16 phy_reg; | |
1da177e4 LT |
1161 | |
1162 | /* Setup the Device Control Register for PHY loopback test. */ | |
1163 | ||
1dc32918 | 1164 | ctrl_reg = er32(CTRL); |
1da177e4 LT |
1165 | ctrl_reg |= (E1000_CTRL_ILOS | /* Invert Loss-Of-Signal */ |
1166 | E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */ | |
1167 | E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */ | |
1168 | E1000_CTRL_SPD_1000 | /* Force Speed to 1000 */ | |
1169 | E1000_CTRL_FD); /* Force Duplex to FULL */ | |
1170 | ||
1dc32918 | 1171 | ew32(CTRL, ctrl_reg); |
1da177e4 LT |
1172 | |
1173 | /* Read the PHY Specific Control Register (0x10) */ | |
1dc32918 | 1174 | e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_reg); |
1da177e4 LT |
1175 | |
1176 | /* Clear Auto-Crossover bits in PHY Specific Control Register | |
1177 | * (bits 6:5). | |
1178 | */ | |
1179 | phy_reg &= ~M88E1000_PSCR_AUTO_X_MODE; | |
1dc32918 | 1180 | e1000_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_reg); |
1da177e4 LT |
1181 | |
1182 | /* Perform software reset on the PHY */ | |
1dc32918 | 1183 | e1000_phy_reset(hw); |
1da177e4 LT |
1184 | |
1185 | /* Have to setup TX_CLK and TX_CRS after software reset */ | |
1186 | e1000_phy_reset_clk_and_crs(adapter); | |
1187 | ||
1dc32918 | 1188 | e1000_write_phy_reg(hw, PHY_CTRL, 0x8100); |
1da177e4 LT |
1189 | |
1190 | /* Wait for reset to complete. */ | |
1191 | udelay(500); | |
1192 | ||
1193 | /* Have to setup TX_CLK and TX_CRS after software reset */ | |
1194 | e1000_phy_reset_clk_and_crs(adapter); | |
1195 | ||
1196 | /* Write out to PHY registers 29 and 30 to disable the Receiver. */ | |
1197 | e1000_phy_disable_receiver(adapter); | |
1198 | ||
1199 | /* Set the loopback bit in the PHY control register. */ | |
1dc32918 | 1200 | e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg); |
1da177e4 | 1201 | phy_reg |= MII_CR_LOOPBACK; |
1dc32918 | 1202 | e1000_write_phy_reg(hw, PHY_CTRL, phy_reg); |
1da177e4 LT |
1203 | |
1204 | /* Setup TX_CLK and TX_CRS one more time. */ | |
1205 | e1000_phy_reset_clk_and_crs(adapter); | |
1206 | ||
1207 | /* Check Phy Configuration */ | |
1dc32918 | 1208 | e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg); |
96838a40 | 1209 | if (phy_reg != 0x4100) |
887a79f4 | 1210 | return 9; |
1da177e4 | 1211 | |
1dc32918 | 1212 | e1000_read_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg); |
96838a40 | 1213 | if (phy_reg != 0x0070) |
1da177e4 LT |
1214 | return 10; |
1215 | ||
1dc32918 | 1216 | e1000_read_phy_reg(hw, 29, &phy_reg); |
96838a40 | 1217 | if (phy_reg != 0x001A) |
1da177e4 LT |
1218 | return 11; |
1219 | ||
1220 | return 0; | |
1221 | } | |
1222 | ||
64798845 | 1223 | static int e1000_integrated_phy_loopback(struct e1000_adapter *adapter) |
1da177e4 | 1224 | { |
1dc32918 | 1225 | struct e1000_hw *hw = &adapter->hw; |
406874a7 JP |
1226 | u32 ctrl_reg = 0; |
1227 | u32 stat_reg = 0; | |
1da177e4 | 1228 | |
1dc32918 | 1229 | hw->autoneg = false; |
1da177e4 | 1230 | |
1dc32918 | 1231 | if (hw->phy_type == e1000_phy_m88) { |
1da177e4 | 1232 | /* Auto-MDI/MDIX Off */ |
1dc32918 | 1233 | e1000_write_phy_reg(hw, |
1da177e4 LT |
1234 | M88E1000_PHY_SPEC_CTRL, 0x0808); |
1235 | /* reset to update Auto-MDI/MDIX */ | |
1dc32918 | 1236 | e1000_write_phy_reg(hw, PHY_CTRL, 0x9140); |
1da177e4 | 1237 | /* autoneg off */ |
1dc32918 | 1238 | e1000_write_phy_reg(hw, PHY_CTRL, 0x8140); |
1532ecea | 1239 | } |
1da177e4 | 1240 | |
1dc32918 | 1241 | ctrl_reg = er32(CTRL); |
cd94dd0b | 1242 | |
1532ecea JB |
1243 | /* force 1000, set loopback */ |
1244 | e1000_write_phy_reg(hw, PHY_CTRL, 0x4140); | |
cd94dd0b | 1245 | |
1532ecea JB |
1246 | /* Now set up the MAC to the same speed/duplex as the PHY. */ |
1247 | ctrl_reg = er32(CTRL); | |
1248 | ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */ | |
1249 | ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */ | |
1250 | E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */ | |
1251 | E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */ | |
6cfbd97b | 1252 | E1000_CTRL_FD); /* Force Duplex to FULL */ |
1da177e4 | 1253 | |
1dc32918 | 1254 | if (hw->media_type == e1000_media_type_copper && |
887a79f4 | 1255 | hw->phy_type == e1000_phy_m88) |
1da177e4 | 1256 | ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */ |
8fc897b0 | 1257 | else { |
1da177e4 | 1258 | /* Set the ILOS bit on the fiber Nic is half |
6cfbd97b JK |
1259 | * duplex link is detected. |
1260 | */ | |
1dc32918 | 1261 | stat_reg = er32(STATUS); |
96838a40 | 1262 | if ((stat_reg & E1000_STATUS_FD) == 0) |
1da177e4 LT |
1263 | ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU); |
1264 | } | |
1265 | ||
1dc32918 | 1266 | ew32(CTRL, ctrl_reg); |
1da177e4 LT |
1267 | |
1268 | /* Disable the receiver on the PHY so when a cable is plugged in, the | |
1269 | * PHY does not begin to autoneg when a cable is reconnected to the NIC. | |
1270 | */ | |
1dc32918 | 1271 | if (hw->phy_type == e1000_phy_m88) |
1da177e4 LT |
1272 | e1000_phy_disable_receiver(adapter); |
1273 | ||
1274 | udelay(500); | |
1275 | ||
1276 | return 0; | |
1277 | } | |
1278 | ||
64798845 | 1279 | static int e1000_set_phy_loopback(struct e1000_adapter *adapter) |
1da177e4 | 1280 | { |
1dc32918 | 1281 | struct e1000_hw *hw = &adapter->hw; |
406874a7 JP |
1282 | u16 phy_reg = 0; |
1283 | u16 count = 0; | |
1da177e4 | 1284 | |
1dc32918 | 1285 | switch (hw->mac_type) { |
1da177e4 | 1286 | case e1000_82543: |
1dc32918 | 1287 | if (hw->media_type == e1000_media_type_copper) { |
1da177e4 LT |
1288 | /* Attempt to setup Loopback mode on Non-integrated PHY. |
1289 | * Some PHY registers get corrupted at random, so | |
1290 | * attempt this 10 times. | |
1291 | */ | |
96838a40 | 1292 | while (e1000_nonintegrated_phy_loopback(adapter) && |
887a79f4 | 1293 | count++ < 10); |
96838a40 | 1294 | if (count < 11) |
1da177e4 LT |
1295 | return 0; |
1296 | } | |
1297 | break; | |
1298 | ||
1299 | case e1000_82544: | |
1300 | case e1000_82540: | |
1301 | case e1000_82545: | |
1302 | case e1000_82545_rev_3: | |
1303 | case e1000_82546: | |
1304 | case e1000_82546_rev_3: | |
1305 | case e1000_82541: | |
1306 | case e1000_82541_rev_2: | |
1307 | case e1000_82547: | |
1308 | case e1000_82547_rev_2: | |
1309 | return e1000_integrated_phy_loopback(adapter); | |
1da177e4 LT |
1310 | default: |
1311 | /* Default PHY loopback work is to read the MII | |
1312 | * control register and assert bit 14 (loopback mode). | |
1313 | */ | |
1dc32918 | 1314 | e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg); |
1da177e4 | 1315 | phy_reg |= MII_CR_LOOPBACK; |
1dc32918 | 1316 | e1000_write_phy_reg(hw, PHY_CTRL, phy_reg); |
1da177e4 | 1317 | return 0; |
1da177e4 LT |
1318 | } |
1319 | ||
1320 | return 8; | |
1321 | } | |
1322 | ||
64798845 | 1323 | static int e1000_setup_loopback_test(struct e1000_adapter *adapter) |
1da177e4 | 1324 | { |
49273163 | 1325 | struct e1000_hw *hw = &adapter->hw; |
406874a7 | 1326 | u32 rctl; |
1da177e4 | 1327 | |
49273163 JK |
1328 | if (hw->media_type == e1000_media_type_fiber || |
1329 | hw->media_type == e1000_media_type_internal_serdes) { | |
1330 | switch (hw->mac_type) { | |
1331 | case e1000_82545: | |
1332 | case e1000_82546: | |
1333 | case e1000_82545_rev_3: | |
1334 | case e1000_82546_rev_3: | |
1da177e4 | 1335 | return e1000_set_phy_loopback(adapter); |
49273163 | 1336 | default: |
1dc32918 | 1337 | rctl = er32(RCTL); |
1da177e4 | 1338 | rctl |= E1000_RCTL_LBM_TCVR; |
1dc32918 | 1339 | ew32(RCTL, rctl); |
1da177e4 LT |
1340 | return 0; |
1341 | } | |
887a79f4 | 1342 | } else if (hw->media_type == e1000_media_type_copper) { |
1da177e4 | 1343 | return e1000_set_phy_loopback(adapter); |
887a79f4 | 1344 | } |
1da177e4 LT |
1345 | |
1346 | return 7; | |
1347 | } | |
1348 | ||
64798845 | 1349 | static void e1000_loopback_cleanup(struct e1000_adapter *adapter) |
1da177e4 | 1350 | { |
49273163 | 1351 | struct e1000_hw *hw = &adapter->hw; |
406874a7 JP |
1352 | u32 rctl; |
1353 | u16 phy_reg; | |
1da177e4 | 1354 | |
1dc32918 | 1355 | rctl = er32(RCTL); |
1da177e4 | 1356 | rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC); |
1dc32918 | 1357 | ew32(RCTL, rctl); |
1da177e4 | 1358 | |
49273163 | 1359 | switch (hw->mac_type) { |
49273163 JK |
1360 | case e1000_82545: |
1361 | case e1000_82546: | |
1362 | case e1000_82545_rev_3: | |
1363 | case e1000_82546_rev_3: | |
1364 | default: | |
c3033b01 | 1365 | hw->autoneg = true; |
49273163 JK |
1366 | e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg); |
1367 | if (phy_reg & MII_CR_LOOPBACK) { | |
1da177e4 | 1368 | phy_reg &= ~MII_CR_LOOPBACK; |
49273163 JK |
1369 | e1000_write_phy_reg(hw, PHY_CTRL, phy_reg); |
1370 | e1000_phy_reset(hw); | |
1da177e4 | 1371 | } |
49273163 | 1372 | break; |
1da177e4 LT |
1373 | } |
1374 | } | |
1375 | ||
64798845 JP |
1376 | static void e1000_create_lbtest_frame(struct sk_buff *skb, |
1377 | unsigned int frame_size) | |
1da177e4 LT |
1378 | { |
1379 | memset(skb->data, 0xFF, frame_size); | |
ce7393b9 | 1380 | frame_size &= ~1; |
1da177e4 LT |
1381 | memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1); |
1382 | memset(&skb->data[frame_size / 2 + 10], 0xBE, 1); | |
1383 | memset(&skb->data[frame_size / 2 + 12], 0xAF, 1); | |
1384 | } | |
1385 | ||
13809609 | 1386 | static int e1000_check_lbtest_frame(const unsigned char *data, |
64798845 | 1387 | unsigned int frame_size) |
1da177e4 | 1388 | { |
ce7393b9 | 1389 | frame_size &= ~1; |
13809609 FW |
1390 | if (*(data + 3) == 0xFF) { |
1391 | if ((*(data + frame_size / 2 + 10) == 0xBE) && | |
1392 | (*(data + frame_size / 2 + 12) == 0xAF)) { | |
1da177e4 LT |
1393 | return 0; |
1394 | } | |
1395 | } | |
1396 | return 13; | |
1397 | } | |
1398 | ||
64798845 | 1399 | static int e1000_run_loopback_test(struct e1000_adapter *adapter) |
1da177e4 | 1400 | { |
1dc32918 | 1401 | struct e1000_hw *hw = &adapter->hw; |
581d708e MC |
1402 | struct e1000_tx_ring *txdr = &adapter->test_tx_ring; |
1403 | struct e1000_rx_ring *rxdr = &adapter->test_rx_ring; | |
1da177e4 | 1404 | struct pci_dev *pdev = adapter->pdev; |
887a79f4 | 1405 | int i, j, k, l, lc, good_cnt, ret_val = 0; |
e4eff729 | 1406 | unsigned long time; |
1da177e4 | 1407 | |
1dc32918 | 1408 | ew32(RDT, rxdr->count - 1); |
1da177e4 | 1409 | |
96838a40 | 1410 | /* Calculate the loop count based on the largest descriptor ring |
e4eff729 MC |
1411 | * The idea is to wrap the largest ring a number of times using 64 |
1412 | * send/receive pairs during each loop | |
1413 | */ | |
1da177e4 | 1414 | |
96838a40 | 1415 | if (rxdr->count <= txdr->count) |
e4eff729 MC |
1416 | lc = ((txdr->count / 64) * 2) + 1; |
1417 | else | |
1418 | lc = ((rxdr->count / 64) * 2) + 1; | |
1419 | ||
1420 | k = l = 0; | |
96838a40 JB |
1421 | for (j = 0; j <= lc; j++) { /* loop count loop */ |
1422 | for (i = 0; i < 64; i++) { /* send the packets */ | |
1423 | e1000_create_lbtest_frame(txdr->buffer_info[i].skb, | |
887a79f4 | 1424 | 1024); |
b16f53be NN |
1425 | dma_sync_single_for_device(&pdev->dev, |
1426 | txdr->buffer_info[k].dma, | |
1427 | txdr->buffer_info[k].length, | |
1428 | DMA_TO_DEVICE); | |
887a79f4 KMJ |
1429 | if (unlikely(++k == txdr->count)) |
1430 | k = 0; | |
e4eff729 | 1431 | } |
1dc32918 | 1432 | ew32(TDT, k); |
945a5151 | 1433 | E1000_WRITE_FLUSH(); |
f8ec4733 | 1434 | msleep(200); |
e4eff729 MC |
1435 | time = jiffies; /* set the start time for the receive */ |
1436 | good_cnt = 0; | |
1437 | do { /* receive the sent packets */ | |
b16f53be NN |
1438 | dma_sync_single_for_cpu(&pdev->dev, |
1439 | rxdr->buffer_info[l].dma, | |
93f0afe9 | 1440 | E1000_RXBUFFER_2048, |
b16f53be | 1441 | DMA_FROM_DEVICE); |
96838a40 | 1442 | |
e4eff729 | 1443 | ret_val = e1000_check_lbtest_frame( |
13809609 FW |
1444 | rxdr->buffer_info[l].rxbuf.data + |
1445 | NET_SKB_PAD + NET_IP_ALIGN, | |
6cfbd97b | 1446 | 1024); |
96838a40 | 1447 | if (!ret_val) |
e4eff729 | 1448 | good_cnt++; |
887a79f4 KMJ |
1449 | if (unlikely(++l == rxdr->count)) |
1450 | l = 0; | |
96838a40 JB |
1451 | /* time + 20 msecs (200 msecs on 2.4) is more than |
1452 | * enough time to complete the receives, if it's | |
e4eff729 MC |
1453 | * exceeded, break and error off |
1454 | */ | |
1aa65f4d MS |
1455 | } while (good_cnt < 64 && time_after(time + 20, jiffies)); |
1456 | ||
96838a40 | 1457 | if (good_cnt != 64) { |
e4eff729 | 1458 | ret_val = 13; /* ret_val is the same as mis-compare */ |
96838a40 | 1459 | break; |
e4eff729 | 1460 | } |
d5c7d7f6 | 1461 | if (time_after_eq(jiffies, time + 2)) { |
e4eff729 MC |
1462 | ret_val = 14; /* error code for time out error */ |
1463 | break; | |
1464 | } | |
1465 | } /* end loop count loop */ | |
1da177e4 LT |
1466 | return ret_val; |
1467 | } | |
1468 | ||
64798845 | 1469 | static int e1000_loopback_test(struct e1000_adapter *adapter, u64 *data) |
1da177e4 | 1470 | { |
c7be73bc JP |
1471 | *data = e1000_setup_desc_rings(adapter); |
1472 | if (*data) | |
57128197 | 1473 | goto out; |
c7be73bc JP |
1474 | *data = e1000_setup_loopback_test(adapter); |
1475 | if (*data) | |
57128197 | 1476 | goto err_loopback; |
1da177e4 LT |
1477 | *data = e1000_run_loopback_test(adapter); |
1478 | e1000_loopback_cleanup(adapter); | |
57128197 | 1479 | |
1da177e4 | 1480 | err_loopback: |
57128197 JK |
1481 | e1000_free_desc_rings(adapter); |
1482 | out: | |
1da177e4 LT |
1483 | return *data; |
1484 | } | |
1485 | ||
64798845 | 1486 | static int e1000_link_test(struct e1000_adapter *adapter, u64 *data) |
1da177e4 | 1487 | { |
1dc32918 | 1488 | struct e1000_hw *hw = &adapter->hw; |
1da177e4 | 1489 | *data = 0; |
1dc32918 | 1490 | if (hw->media_type == e1000_media_type_internal_serdes) { |
1da177e4 | 1491 | int i = 0; |
887a79f4 | 1492 | |
be0f0719 | 1493 | hw->serdes_has_link = false; |
1da177e4 | 1494 | |
2648345f | 1495 | /* On some blade server designs, link establishment |
6cfbd97b JK |
1496 | * could take as long as 2-3 minutes |
1497 | */ | |
1da177e4 | 1498 | do { |
1dc32918 | 1499 | e1000_check_for_link(hw); |
be0f0719 | 1500 | if (hw->serdes_has_link) |
1da177e4 | 1501 | return *data; |
f8ec4733 | 1502 | msleep(20); |
1da177e4 LT |
1503 | } while (i++ < 3750); |
1504 | ||
2648345f | 1505 | *data = 1; |
1da177e4 | 1506 | } else { |
1dc32918 JP |
1507 | e1000_check_for_link(hw); |
1508 | if (hw->autoneg) /* if auto_neg is set wait for it */ | |
f8ec4733 | 1509 | msleep(4000); |
1da177e4 | 1510 | |
887a79f4 | 1511 | if (!(er32(STATUS) & E1000_STATUS_LU)) |
1da177e4 | 1512 | *data = 1; |
1da177e4 LT |
1513 | } |
1514 | return *data; | |
1515 | } | |
1516 | ||
64798845 | 1517 | static int e1000_get_sset_count(struct net_device *netdev, int sset) |
1da177e4 | 1518 | { |
b9f2c044 JG |
1519 | switch (sset) { |
1520 | case ETH_SS_TEST: | |
1521 | return E1000_TEST_LEN; | |
1522 | case ETH_SS_STATS: | |
1523 | return E1000_STATS_LEN; | |
1524 | default: | |
1525 | return -EOPNOTSUPP; | |
1526 | } | |
1da177e4 LT |
1527 | } |
1528 | ||
64798845 JP |
1529 | static void e1000_diag_test(struct net_device *netdev, |
1530 | struct ethtool_test *eth_test, u64 *data) | |
1da177e4 | 1531 | { |
60490fe0 | 1532 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1dc32918 | 1533 | struct e1000_hw *hw = &adapter->hw; |
c3033b01 | 1534 | bool if_running = netif_running(netdev); |
1da177e4 | 1535 | |
1314bbf3 | 1536 | set_bit(__E1000_TESTING, &adapter->flags); |
96838a40 | 1537 | if (eth_test->flags == ETH_TEST_FL_OFFLINE) { |
1da177e4 LT |
1538 | /* Offline tests */ |
1539 | ||
1540 | /* save speed, duplex, autoneg settings */ | |
1dc32918 JP |
1541 | u16 autoneg_advertised = hw->autoneg_advertised; |
1542 | u8 forced_speed_duplex = hw->forced_speed_duplex; | |
1543 | u8 autoneg = hw->autoneg; | |
1da177e4 | 1544 | |
feb8f478 | 1545 | e_info(hw, "offline testing starting\n"); |
d658266e | 1546 | |
1da177e4 | 1547 | /* Link test performed before hardware reset so autoneg doesn't |
6cfbd97b JK |
1548 | * interfere with test result |
1549 | */ | |
96838a40 | 1550 | if (e1000_link_test(adapter, &data[4])) |
1da177e4 LT |
1551 | eth_test->flags |= ETH_TEST_FL_FAILED; |
1552 | ||
96838a40 | 1553 | if (if_running) |
2db10a08 | 1554 | /* indicate we're in test mode */ |
1f2f83f8 | 1555 | e1000_close(netdev); |
1da177e4 LT |
1556 | else |
1557 | e1000_reset(adapter); | |
1558 | ||
96838a40 | 1559 | if (e1000_reg_test(adapter, &data[0])) |
1da177e4 LT |
1560 | eth_test->flags |= ETH_TEST_FL_FAILED; |
1561 | ||
1562 | e1000_reset(adapter); | |
96838a40 | 1563 | if (e1000_eeprom_test(adapter, &data[1])) |
1da177e4 LT |
1564 | eth_test->flags |= ETH_TEST_FL_FAILED; |
1565 | ||
1566 | e1000_reset(adapter); | |
96838a40 | 1567 | if (e1000_intr_test(adapter, &data[2])) |
1da177e4 LT |
1568 | eth_test->flags |= ETH_TEST_FL_FAILED; |
1569 | ||
1570 | e1000_reset(adapter); | |
d658266e JB |
1571 | /* make sure the phy is powered up */ |
1572 | e1000_power_up_phy(adapter); | |
96838a40 | 1573 | if (e1000_loopback_test(adapter, &data[3])) |
1da177e4 LT |
1574 | eth_test->flags |= ETH_TEST_FL_FAILED; |
1575 | ||
1576 | /* restore speed, duplex, autoneg settings */ | |
1dc32918 JP |
1577 | hw->autoneg_advertised = autoneg_advertised; |
1578 | hw->forced_speed_duplex = forced_speed_duplex; | |
1579 | hw->autoneg = autoneg; | |
1da177e4 LT |
1580 | |
1581 | e1000_reset(adapter); | |
1314bbf3 | 1582 | clear_bit(__E1000_TESTING, &adapter->flags); |
96838a40 | 1583 | if (if_running) |
1f2f83f8 | 1584 | e1000_open(netdev); |
1da177e4 | 1585 | } else { |
feb8f478 | 1586 | e_info(hw, "online testing starting\n"); |
1da177e4 | 1587 | /* Online tests */ |
96838a40 | 1588 | if (e1000_link_test(adapter, &data[4])) |
1da177e4 LT |
1589 | eth_test->flags |= ETH_TEST_FL_FAILED; |
1590 | ||
90fb5135 | 1591 | /* Online tests aren't run; pass by default */ |
1da177e4 LT |
1592 | data[0] = 0; |
1593 | data[1] = 0; | |
1594 | data[2] = 0; | |
1595 | data[3] = 0; | |
2db10a08 | 1596 | |
1314bbf3 | 1597 | clear_bit(__E1000_TESTING, &adapter->flags); |
1da177e4 | 1598 | } |
352c9f85 | 1599 | msleep_interruptible(4 * 1000); |
1da177e4 LT |
1600 | } |
1601 | ||
64798845 JP |
1602 | static int e1000_wol_exclusion(struct e1000_adapter *adapter, |
1603 | struct ethtool_wolinfo *wol) | |
1da177e4 | 1604 | { |
1da177e4 | 1605 | struct e1000_hw *hw = &adapter->hw; |
120cd576 | 1606 | int retval = 1; /* fail by default */ |
1da177e4 | 1607 | |
120cd576 | 1608 | switch (hw->device_id) { |
dc1f71f6 | 1609 | case E1000_DEV_ID_82542: |
1da177e4 LT |
1610 | case E1000_DEV_ID_82543GC_FIBER: |
1611 | case E1000_DEV_ID_82543GC_COPPER: | |
1612 | case E1000_DEV_ID_82544EI_FIBER: | |
1613 | case E1000_DEV_ID_82546EB_QUAD_COPPER: | |
1614 | case E1000_DEV_ID_82545EM_FIBER: | |
1615 | case E1000_DEV_ID_82545EM_COPPER: | |
84916829 | 1616 | case E1000_DEV_ID_82546GB_QUAD_COPPER: |
120cd576 JB |
1617 | case E1000_DEV_ID_82546GB_PCIE: |
1618 | /* these don't support WoL at all */ | |
1da177e4 | 1619 | wol->supported = 0; |
120cd576 | 1620 | break; |
1da177e4 LT |
1621 | case E1000_DEV_ID_82546EB_FIBER: |
1622 | case E1000_DEV_ID_82546GB_FIBER: | |
120cd576 | 1623 | /* Wake events not supported on port B */ |
1dc32918 | 1624 | if (er32(STATUS) & E1000_STATUS_FUNC_1) { |
1da177e4 | 1625 | wol->supported = 0; |
120cd576 | 1626 | break; |
1da177e4 | 1627 | } |
120cd576 JB |
1628 | /* return success for non excluded adapter ports */ |
1629 | retval = 0; | |
1630 | break; | |
1631 | case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3: | |
1632 | /* quad port adapters only support WoL on port A */ | |
1633 | if (!adapter->quad_port_a) { | |
1634 | wol->supported = 0; | |
1635 | break; | |
1636 | } | |
1637 | /* return success for non excluded adapter ports */ | |
1638 | retval = 0; | |
1639 | break; | |
1da177e4 | 1640 | default: |
120cd576 JB |
1641 | /* dual port cards only support WoL on port A from now on |
1642 | * unless it was enabled in the eeprom for port B | |
6cfbd97b JK |
1643 | * so exclude FUNC_1 ports from having WoL enabled |
1644 | */ | |
1dc32918 | 1645 | if (er32(STATUS) & E1000_STATUS_FUNC_1 && |
120cd576 JB |
1646 | !adapter->eeprom_wol) { |
1647 | wol->supported = 0; | |
1648 | break; | |
1649 | } | |
84916829 | 1650 | |
120cd576 JB |
1651 | retval = 0; |
1652 | } | |
1653 | ||
1654 | return retval; | |
1655 | } | |
1656 | ||
64798845 JP |
1657 | static void e1000_get_wol(struct net_device *netdev, |
1658 | struct ethtool_wolinfo *wol) | |
120cd576 JB |
1659 | { |
1660 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
1dc32918 | 1661 | struct e1000_hw *hw = &adapter->hw; |
120cd576 | 1662 | |
887a79f4 | 1663 | wol->supported = WAKE_UCAST | WAKE_MCAST | WAKE_BCAST | WAKE_MAGIC; |
120cd576 JB |
1664 | wol->wolopts = 0; |
1665 | ||
1666 | /* this function will set ->supported = 0 and return 1 if wol is not | |
6cfbd97b JK |
1667 | * supported by this hardware |
1668 | */ | |
de126489 RW |
1669 | if (e1000_wol_exclusion(adapter, wol) || |
1670 | !device_can_wakeup(&adapter->pdev->dev)) | |
1da177e4 | 1671 | return; |
120cd576 JB |
1672 | |
1673 | /* apply any specific unsupported masks here */ | |
1dc32918 | 1674 | switch (hw->device_id) { |
120cd576 | 1675 | case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3: |
d7558148 | 1676 | /* KSP3 does not support UCAST wake-ups */ |
120cd576 JB |
1677 | wol->supported &= ~WAKE_UCAST; |
1678 | ||
1679 | if (adapter->wol & E1000_WUFC_EX) | |
feb8f478 ET |
1680 | e_err(drv, "Interface does not support directed " |
1681 | "(unicast) frame wake-up packets\n"); | |
120cd576 JB |
1682 | break; |
1683 | default: | |
1684 | break; | |
1da177e4 | 1685 | } |
120cd576 JB |
1686 | |
1687 | if (adapter->wol & E1000_WUFC_EX) | |
1688 | wol->wolopts |= WAKE_UCAST; | |
1689 | if (adapter->wol & E1000_WUFC_MC) | |
1690 | wol->wolopts |= WAKE_MCAST; | |
1691 | if (adapter->wol & E1000_WUFC_BC) | |
1692 | wol->wolopts |= WAKE_BCAST; | |
1693 | if (adapter->wol & E1000_WUFC_MAG) | |
1694 | wol->wolopts |= WAKE_MAGIC; | |
1da177e4 LT |
1695 | } |
1696 | ||
64798845 | 1697 | static int e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) |
1da177e4 | 1698 | { |
60490fe0 | 1699 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 LT |
1700 | struct e1000_hw *hw = &adapter->hw; |
1701 | ||
120cd576 JB |
1702 | if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE)) |
1703 | return -EOPNOTSUPP; | |
1704 | ||
de126489 RW |
1705 | if (e1000_wol_exclusion(adapter, wol) || |
1706 | !device_can_wakeup(&adapter->pdev->dev)) | |
1da177e4 LT |
1707 | return wol->wolopts ? -EOPNOTSUPP : 0; |
1708 | ||
120cd576 | 1709 | switch (hw->device_id) { |
84916829 | 1710 | case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3: |
84916829 | 1711 | if (wol->wolopts & WAKE_UCAST) { |
feb8f478 ET |
1712 | e_err(drv, "Interface does not support directed " |
1713 | "(unicast) frame wake-up packets\n"); | |
84916829 JK |
1714 | return -EOPNOTSUPP; |
1715 | } | |
120cd576 | 1716 | break; |
1da177e4 | 1717 | default: |
120cd576 | 1718 | break; |
1da177e4 LT |
1719 | } |
1720 | ||
120cd576 JB |
1721 | /* these settings will always override what we currently have */ |
1722 | adapter->wol = 0; | |
1723 | ||
1724 | if (wol->wolopts & WAKE_UCAST) | |
1725 | adapter->wol |= E1000_WUFC_EX; | |
1726 | if (wol->wolopts & WAKE_MCAST) | |
1727 | adapter->wol |= E1000_WUFC_MC; | |
1728 | if (wol->wolopts & WAKE_BCAST) | |
1729 | adapter->wol |= E1000_WUFC_BC; | |
1730 | if (wol->wolopts & WAKE_MAGIC) | |
1731 | adapter->wol |= E1000_WUFC_MAG; | |
1732 | ||
de126489 RW |
1733 | device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol); |
1734 | ||
1da177e4 LT |
1735 | return 0; |
1736 | } | |
1737 | ||
64359091 JK |
1738 | static int e1000_set_phys_id(struct net_device *netdev, |
1739 | enum ethtool_phys_id_state state) | |
1da177e4 | 1740 | { |
64359091 | 1741 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1dc32918 | 1742 | struct e1000_hw *hw = &adapter->hw; |
1da177e4 | 1743 | |
64359091 JK |
1744 | switch (state) { |
1745 | case ETHTOOL_ID_ACTIVE: | |
1746 | e1000_setup_led(hw); | |
1747 | return 2; | |
1da177e4 | 1748 | |
64359091 JK |
1749 | case ETHTOOL_ID_ON: |
1750 | e1000_led_on(hw); | |
1751 | break; | |
1da177e4 | 1752 | |
64359091 JK |
1753 | case ETHTOOL_ID_OFF: |
1754 | e1000_led_off(hw); | |
1755 | break; | |
1da177e4 | 1756 | |
64359091 JK |
1757 | case ETHTOOL_ID_INACTIVE: |
1758 | e1000_cleanup_led(hw); | |
1da177e4 | 1759 | } |
1da177e4 LT |
1760 | |
1761 | return 0; | |
1762 | } | |
1763 | ||
94c9e5a8 JB |
1764 | static int e1000_get_coalesce(struct net_device *netdev, |
1765 | struct ethtool_coalesce *ec) | |
1766 | { | |
1767 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
1768 | ||
1769 | if (adapter->hw.mac_type < e1000_82545) | |
1770 | return -EOPNOTSUPP; | |
1771 | ||
eab2abf5 | 1772 | if (adapter->itr_setting <= 4) |
94c9e5a8 JB |
1773 | ec->rx_coalesce_usecs = adapter->itr_setting; |
1774 | else | |
1775 | ec->rx_coalesce_usecs = 1000000 / adapter->itr_setting; | |
1776 | ||
1777 | return 0; | |
1778 | } | |
1779 | ||
1780 | static int e1000_set_coalesce(struct net_device *netdev, | |
1781 | struct ethtool_coalesce *ec) | |
1782 | { | |
1783 | struct e1000_adapter *adapter = netdev_priv(netdev); | |
1784 | struct e1000_hw *hw = &adapter->hw; | |
1785 | ||
1786 | if (hw->mac_type < e1000_82545) | |
1787 | return -EOPNOTSUPP; | |
1788 | ||
1789 | if ((ec->rx_coalesce_usecs > E1000_MAX_ITR_USECS) || | |
eab2abf5 | 1790 | ((ec->rx_coalesce_usecs > 4) && |
94c9e5a8 JB |
1791 | (ec->rx_coalesce_usecs < E1000_MIN_ITR_USECS)) || |
1792 | (ec->rx_coalesce_usecs == 2)) | |
1793 | return -EINVAL; | |
1794 | ||
eab2abf5 JB |
1795 | if (ec->rx_coalesce_usecs == 4) { |
1796 | adapter->itr = adapter->itr_setting = 4; | |
1797 | } else if (ec->rx_coalesce_usecs <= 3) { | |
94c9e5a8 JB |
1798 | adapter->itr = 20000; |
1799 | adapter->itr_setting = ec->rx_coalesce_usecs; | |
1800 | } else { | |
1801 | adapter->itr = (1000000 / ec->rx_coalesce_usecs); | |
1802 | adapter->itr_setting = adapter->itr & ~3; | |
1803 | } | |
1804 | ||
1805 | if (adapter->itr_setting != 0) | |
1806 | ew32(ITR, 1000000000 / (adapter->itr * 256)); | |
1807 | else | |
1808 | ew32(ITR, 0); | |
1809 | ||
1810 | return 0; | |
1811 | } | |
1812 | ||
64798845 | 1813 | static int e1000_nway_reset(struct net_device *netdev) |
1da177e4 | 1814 | { |
60490fe0 | 1815 | struct e1000_adapter *adapter = netdev_priv(netdev); |
887a79f4 | 1816 | |
2db10a08 AK |
1817 | if (netif_running(netdev)) |
1818 | e1000_reinit_locked(adapter); | |
1da177e4 LT |
1819 | return 0; |
1820 | } | |
1821 | ||
64798845 JP |
1822 | static void e1000_get_ethtool_stats(struct net_device *netdev, |
1823 | struct ethtool_stats *stats, u64 *data) | |
1da177e4 | 1824 | { |
60490fe0 | 1825 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1da177e4 | 1826 | int i; |
8328c38f | 1827 | char *p = NULL; |
887a79f4 | 1828 | const struct e1000_stats *stat = e1000_gstrings_stats; |
1da177e4 LT |
1829 | |
1830 | e1000_update_stats(adapter); | |
7bfa4816 | 1831 | for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) { |
887a79f4 | 1832 | switch (stat->type) { |
8328c38f | 1833 | case NETDEV_STATS: |
887a79f4 | 1834 | p = (char *)netdev + stat->stat_offset; |
8328c38f AK |
1835 | break; |
1836 | case E1000_STATS: | |
887a79f4 KMJ |
1837 | p = (char *)adapter + stat->stat_offset; |
1838 | break; | |
1839 | default: | |
1840 | WARN_ONCE(1, "Invalid E1000 stat type: %u index %d\n", | |
1841 | stat->type, i); | |
8328c38f AK |
1842 | break; |
1843 | } | |
1844 | ||
887a79f4 KMJ |
1845 | if (stat->sizeof_stat == sizeof(u64)) |
1846 | data[i] = *(u64 *)p; | |
1847 | else | |
1848 | data[i] = *(u32 *)p; | |
1849 | ||
1850 | stat++; | |
1da177e4 | 1851 | } |
6cfbd97b | 1852 | /* BUG_ON(i != E1000_STATS_LEN); */ |
1da177e4 LT |
1853 | } |
1854 | ||
64798845 JP |
1855 | static void e1000_get_strings(struct net_device *netdev, u32 stringset, |
1856 | u8 *data) | |
1da177e4 | 1857 | { |
406874a7 | 1858 | u8 *p = data; |
1da177e4 LT |
1859 | int i; |
1860 | ||
96838a40 | 1861 | switch (stringset) { |
1da177e4 | 1862 | case ETH_SS_TEST: |
887a79f4 | 1863 | memcpy(data, e1000_gstrings_test, sizeof(e1000_gstrings_test)); |
1da177e4 LT |
1864 | break; |
1865 | case ETH_SS_STATS: | |
7bfa4816 JK |
1866 | for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) { |
1867 | memcpy(p, e1000_gstrings_stats[i].stat_string, | |
1868 | ETH_GSTRING_LEN); | |
1869 | p += ETH_GSTRING_LEN; | |
1870 | } | |
6cfbd97b | 1871 | /* BUG_ON(p - data != E1000_STATS_LEN * ETH_GSTRING_LEN); */ |
1da177e4 LT |
1872 | break; |
1873 | } | |
1874 | } | |
1875 | ||
7282d491 | 1876 | static const struct ethtool_ops e1000_ethtool_ops = { |
6cfbd97b JK |
1877 | .get_drvinfo = e1000_get_drvinfo, |
1878 | .get_regs_len = e1000_get_regs_len, | |
1879 | .get_regs = e1000_get_regs, | |
1880 | .get_wol = e1000_get_wol, | |
1881 | .set_wol = e1000_set_wol, | |
1882 | .get_msglevel = e1000_get_msglevel, | |
1883 | .set_msglevel = e1000_set_msglevel, | |
1884 | .nway_reset = e1000_nway_reset, | |
1885 | .get_link = e1000_get_link, | |
1886 | .get_eeprom_len = e1000_get_eeprom_len, | |
1887 | .get_eeprom = e1000_get_eeprom, | |
1888 | .set_eeprom = e1000_set_eeprom, | |
1889 | .get_ringparam = e1000_get_ringparam, | |
1890 | .set_ringparam = e1000_set_ringparam, | |
1891 | .get_pauseparam = e1000_get_pauseparam, | |
1892 | .set_pauseparam = e1000_set_pauseparam, | |
1893 | .self_test = e1000_diag_test, | |
1894 | .get_strings = e1000_get_strings, | |
1895 | .set_phys_id = e1000_set_phys_id, | |
1896 | .get_ethtool_stats = e1000_get_ethtool_stats, | |
1897 | .get_sset_count = e1000_get_sset_count, | |
1898 | .get_coalesce = e1000_get_coalesce, | |
1899 | .set_coalesce = e1000_set_coalesce, | |
e10df2c6 | 1900 | .get_ts_info = ethtool_op_get_ts_info, |
5add2f9a PR |
1901 | .get_link_ksettings = e1000_get_link_ksettings, |
1902 | .set_link_ksettings = e1000_set_link_ksettings, | |
1da177e4 LT |
1903 | }; |
1904 | ||
1905 | void e1000_set_ethtool_ops(struct net_device *netdev) | |
1906 | { | |
7ad24ea4 | 1907 | netdev->ethtool_ops = &e1000_ethtool_ops; |
1da177e4 | 1908 | } |