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Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
[mirror_ubuntu-eoan-kernel.git] / drivers / net / ethernet / intel / e1000 / e1000_ethtool.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
0abb6eb1
AK		 3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK		 16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT		 22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29/* ethtool support for e1000 */
30
31#include "e1000.h"
1da177e4
LT		 32#include <asm/uaccess.h>
33
8328c38f
AK		 34enum {NETDEV_STATS, E1000_STATS};
35
1da177e4
LT		 36struct e1000_stats {
37 char stat_string[ETH_GSTRING_LEN];
8328c38f 38 int type;
1da177e4
LT		 39 int sizeof_stat;
40 int stat_offset;
41};
42
8328c38f
AK		 43#define E1000_STAT(m) E1000_STATS, \
44 sizeof(((struct e1000_adapter *)0)->m), \
45 offsetof(struct e1000_adapter, m)
46#define E1000_NETDEV_STAT(m) NETDEV_STATS, \
47 sizeof(((struct net_device *)0)->m), \
48 offsetof(struct net_device, m)
49
1da177e4 50static const struct e1000_stats e1000_gstrings_stats[] = {
49559854
MW		 51 { "rx_packets", E1000_STAT(stats.gprc) },
52 { "tx_packets", E1000_STAT(stats.gptc) },
53 { "rx_bytes", E1000_STAT(stats.gorcl) },
54 { "tx_bytes", E1000_STAT(stats.gotcl) },
55 { "rx_broadcast", E1000_STAT(stats.bprc) },
56 { "tx_broadcast", E1000_STAT(stats.bptc) },
57 { "rx_multicast", E1000_STAT(stats.mprc) },
58 { "tx_multicast", E1000_STAT(stats.mptc) },
59 { "rx_errors", E1000_STAT(stats.rxerrc) },
60 { "tx_errors", E1000_STAT(stats.txerrc) },
5fe31def 61 { "tx_dropped", E1000_NETDEV_STAT(stats.tx_dropped) },
49559854
MW		 62 { "multicast", E1000_STAT(stats.mprc) },
63 { "collisions", E1000_STAT(stats.colc) },
64 { "rx_length_errors", E1000_STAT(stats.rlerrc) },
5fe31def 65 { "rx_over_errors", E1000_NETDEV_STAT(stats.rx_over_errors) },
49559854 66 { "rx_crc_errors", E1000_STAT(stats.crcerrs) },
5fe31def 67 { "rx_frame_errors", E1000_NETDEV_STAT(stats.rx_frame_errors) },
2648345f 68 { "rx_no_buffer_count", E1000_STAT(stats.rnbc) },
49559854
MW		 69 { "rx_missed_errors", E1000_STAT(stats.mpc) },
70 { "tx_aborted_errors", E1000_STAT(stats.ecol) },
71 { "tx_carrier_errors", E1000_STAT(stats.tncrs) },
5fe31def
AK		 72 { "tx_fifo_errors", E1000_NETDEV_STAT(stats.tx_fifo_errors) },
73 { "tx_heartbeat_errors", E1000_NETDEV_STAT(stats.tx_heartbeat_errors) },
49559854 74 { "tx_window_errors", E1000_STAT(stats.latecol) },
1da177e4
LT		 75 { "tx_abort_late_coll", E1000_STAT(stats.latecol) },
76 { "tx_deferred_ok", E1000_STAT(stats.dc) },
77 { "tx_single_coll_ok", E1000_STAT(stats.scc) },
78 { "tx_multi_coll_ok", E1000_STAT(stats.mcc) },
6b7660cd 79 { "tx_timeout_count", E1000_STAT(tx_timeout_count) },
fcfb1224 80 { "tx_restart_queue", E1000_STAT(restart_queue) },
1da177e4
LT		 81 { "rx_long_length_errors", E1000_STAT(stats.roc) },
82 { "rx_short_length_errors", E1000_STAT(stats.ruc) },
83 { "rx_align_errors", E1000_STAT(stats.algnerrc) },
84 { "tx_tcp_seg_good", E1000_STAT(stats.tsctc) },
85 { "tx_tcp_seg_failed", E1000_STAT(stats.tsctfc) },
86 { "rx_flow_control_xon", E1000_STAT(stats.xonrxc) },
87 { "rx_flow_control_xoff", E1000_STAT(stats.xoffrxc) },
88 { "tx_flow_control_xon", E1000_STAT(stats.xontxc) },
89 { "tx_flow_control_xoff", E1000_STAT(stats.xofftxc) },
90 { "rx_long_byte_count", E1000_STAT(stats.gorcl) },
91 { "rx_csum_offload_good", E1000_STAT(hw_csum_good) },
e4c811c9 92 { "rx_csum_offload_errors", E1000_STAT(hw_csum_err) },
6b7660cd 93 { "alloc_rx_buff_failed", E1000_STAT(alloc_rx_buff_failed) },
15e376b4
JG		 94 { "tx_smbus", E1000_STAT(stats.mgptc) },
95 { "rx_smbus", E1000_STAT(stats.mgprc) },
96 { "dropped_smbus", E1000_STAT(stats.mgpdc) },
1da177e4 97};
7bfa4816 98
7bfa4816 99#define E1000_QUEUE_STATS_LEN 0
ff8ac609 100#define E1000_GLOBAL_STATS_LEN ARRAY_SIZE(e1000_gstrings_stats)
7bfa4816 101#define E1000_STATS_LEN (E1000_GLOBAL_STATS_LEN + E1000_QUEUE_STATS_LEN)
1da177e4
LT		 102static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = {
103 "Register test (offline)", "Eeprom test (offline)",
104 "Interrupt test (offline)", "Loopback test (offline)",
105 "Link test (on/offline)"
106};
4c3616cd 107#define E1000_TEST_LEN ARRAY_SIZE(e1000_gstrings_test)
1da177e4 108
64798845
JP		 109static int e1000_get_settings(struct net_device *netdev,
110 struct ethtool_cmd *ecmd)
1da177e4 111{
60490fe0 112 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 113 struct e1000_hw *hw = &adapter->hw;
114
96838a40 115 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 116
117 ecmd->supported = (SUPPORTED_10baseT_Half |
6cfbd97b
JK		 118 SUPPORTED_10baseT_Full |
119 SUPPORTED_100baseT_Half |
120 SUPPORTED_100baseT_Full |
121 SUPPORTED_1000baseT_Full|
122 SUPPORTED_Autoneg |
123 SUPPORTED_TP);
1da177e4
LT		 124 ecmd->advertising = ADVERTISED_TP;
125
96838a40 126 if (hw->autoneg == 1) {
1da177e4 127 ecmd->advertising |= ADVERTISED_Autoneg;
1da177e4 128 /* the e1000 autoneg seems to match ethtool nicely */
1da177e4
LT		 129 ecmd->advertising |= hw->autoneg_advertised;
130 }
131
132 ecmd->port = PORT_TP;
133 ecmd->phy_address = hw->phy_addr;
134
96838a40 135 if (hw->mac_type == e1000_82543)
1da177e4
LT		 136 ecmd->transceiver = XCVR_EXTERNAL;
137 else
138 ecmd->transceiver = XCVR_INTERNAL;
139
140 } else {
141 ecmd->supported = (SUPPORTED_1000baseT_Full |
142 SUPPORTED_FIBRE |
143 SUPPORTED_Autoneg);
144
012609a8
MC		 145 ecmd->advertising = (ADVERTISED_1000baseT_Full |
146 ADVERTISED_FIBRE |
147 ADVERTISED_Autoneg);
1da177e4
LT		 148
149 ecmd->port = PORT_FIBRE;
150
96838a40 151 if (hw->mac_type >= e1000_82545)
1da177e4
LT		 152 ecmd->transceiver = XCVR_INTERNAL;
153 else
154 ecmd->transceiver = XCVR_EXTERNAL;
155 }
156
1dc32918 157 if (er32(STATUS) & E1000_STATUS_LU) {
1da177e4
LT		 158
159 e1000_get_speed_and_duplex(hw, &adapter->link_speed,
160 &adapter->link_duplex);
70739497 161 ethtool_cmd_speed_set(ecmd, adapter->link_speed);
1da177e4 162
25985edc 163 /* unfortunately FULL_DUPLEX != DUPLEX_FULL
6cfbd97b
JK		 164 * and HALF_DUPLEX != DUPLEX_HALF
165 */
96838a40 166 if (adapter->link_duplex == FULL_DUPLEX)
1da177e4
LT		 167 ecmd->duplex = DUPLEX_FULL;
168 else
169 ecmd->duplex = DUPLEX_HALF;
170 } else {
70739497 171 ethtool_cmd_speed_set(ecmd, -1);
1da177e4
LT		 172 ecmd->duplex = -1;
173 }
174
175 ecmd->autoneg = ((hw->media_type == e1000_media_type_fiber) ||
176 hw->autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
c819bbd5
JB		 177
178 /* MDI-X => 1; MDI => 0 */
179 if ((hw->media_type == e1000_media_type_copper) &&
180 netif_carrier_ok(netdev))
181 ecmd->eth_tp_mdix = (!!adapter->phy_info.mdix_mode ?
6cfbd97b 182 ETH_TP_MDI_X : ETH_TP_MDI);
c819bbd5
JB		 183 else
184 ecmd->eth_tp_mdix = ETH_TP_MDI_INVALID;
185
186 if (hw->mdix == AUTO_ALL_MODES)
187 ecmd->eth_tp_mdix_ctrl = ETH_TP_MDI_AUTO;
188 else
189 ecmd->eth_tp_mdix_ctrl = hw->mdix;
1da177e4
LT		 190 return 0;
191}
192
64798845
JP		 193static int e1000_set_settings(struct net_device *netdev,
194 struct ethtool_cmd *ecmd)
1da177e4 195{
60490fe0 196 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 197 struct e1000_hw *hw = &adapter->hw;
198
6cfbd97b 199 /* MDI setting is only allowed when autoneg enabled because
c819bbd5
JB		 200 * some hardware doesn't allow MDI setting when speed or
201 * duplex is forced.
202 */
203 if (ecmd->eth_tp_mdix_ctrl) {
204 if (hw->media_type != e1000_media_type_copper)
205 return -EOPNOTSUPP;
206
207 if ((ecmd->eth_tp_mdix_ctrl != ETH_TP_MDI_AUTO) &&
208 (ecmd->autoneg != AUTONEG_ENABLE)) {
209 e_err(drv, "forcing MDI/MDI-X state is not supported when link speed and/or duplex are forced\n");
210 return -EINVAL;
211 }
212 }
213
1a821ca5
JB		 214 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
215 msleep(1);
216
57128197 217 if (ecmd->autoneg == AUTONEG_ENABLE) {
1da177e4 218 hw->autoneg = 1;
96838a40 219 if (hw->media_type == e1000_media_type_fiber)
012609a8
MC		 220 hw->autoneg_advertised = ADVERTISED_1000baseT_Full |
221 ADVERTISED_FIBRE |
222 ADVERTISED_Autoneg;
96838a40 223 else
2f2ca263 224 hw->autoneg_advertised = ecmd->advertising |
6cfbd97b
JK		 225 ADVERTISED_TP |
226 ADVERTISED_Autoneg;
012609a8 227 ecmd->advertising = hw->autoneg_advertised;
25db0338
DD		 228 } else {
229 u32 speed = ethtool_cmd_speed(ecmd);
c819bbd5 230 /* calling this overrides forced MDI setting */
14ad2513 231 if (e1000_set_spd_dplx(adapter, speed, ecmd->duplex)) {
1a821ca5 232 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4 233 return -EINVAL;
1a821ca5 234 }
25db0338 235 }
1da177e4 236
c819bbd5
JB		 237 /* MDI-X => 2; MDI => 1; Auto => 3 */
238 if (ecmd->eth_tp_mdix_ctrl) {
239 if (ecmd->eth_tp_mdix_ctrl == ETH_TP_MDI_AUTO)
240 hw->mdix = AUTO_ALL_MODES;
241 else
242 hw->mdix = ecmd->eth_tp_mdix_ctrl;
243 }
244
1da177e4
LT		 245 /* reset the link */
246
1a821ca5
JB		 247 if (netif_running(adapter->netdev)) {
248 e1000_down(adapter);
249 e1000_up(adapter);
250 } else
1da177e4
LT		 251 e1000_reset(adapter);
252
1a821ca5 253 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 254 return 0;
255}
256
b548192a
NN		 257static u32 e1000_get_link(struct net_device *netdev)
258{
259 struct e1000_adapter *adapter = netdev_priv(netdev);
260
6cfbd97b 261 /* If the link is not reported up to netdev, interrupts are disabled,
b548192a
NN		 262 * and so the physical link state may have changed since we last
263 * looked. Set get_link_status to make sure that the true link
264 * state is interrogated, rather than pulling a cached and possibly
265 * stale link state from the driver.
266 */
267 if (!netif_carrier_ok(netdev))
268 adapter->hw.get_link_status = 1;
269
270 return e1000_has_link(adapter);
271}
272
64798845
JP		 273static void e1000_get_pauseparam(struct net_device *netdev,
274 struct ethtool_pauseparam *pause)
1da177e4 275{
60490fe0 276 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 277 struct e1000_hw *hw = &adapter->hw;
278
96838a40 279 pause->autoneg =
1da177e4 280 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
96838a40 281
11241b10 282 if (hw->fc == E1000_FC_RX_PAUSE)
1da177e4 283 pause->rx_pause = 1;
11241b10 284 else if (hw->fc == E1000_FC_TX_PAUSE)
1da177e4 285 pause->tx_pause = 1;
11241b10 286 else if (hw->fc == E1000_FC_FULL) {
1da177e4
LT		 287 pause->rx_pause = 1;
288 pause->tx_pause = 1;
289 }
290}
291
64798845
JP		 292static int e1000_set_pauseparam(struct net_device *netdev,
293 struct ethtool_pauseparam *pause)
1da177e4 294{
60490fe0 295 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 296 struct e1000_hw *hw = &adapter->hw;
1a821ca5 297 int retval = 0;
96838a40 298
1da177e4
LT		 299 adapter->fc_autoneg = pause->autoneg;
300
1a821ca5
JB		 301 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
302 msleep(1);
303
96838a40 304 if (pause->rx_pause && pause->tx_pause)
11241b10 305 hw->fc = E1000_FC_FULL;
96838a40 306 else if (pause->rx_pause && !pause->tx_pause)
11241b10 307 hw->fc = E1000_FC_RX_PAUSE;
96838a40 308 else if (!pause->rx_pause && pause->tx_pause)
11241b10 309 hw->fc = E1000_FC_TX_PAUSE;
96838a40 310 else if (!pause->rx_pause && !pause->tx_pause)
11241b10 311 hw->fc = E1000_FC_NONE;
1da177e4
LT		 312
313 hw->original_fc = hw->fc;
314
96838a40 315 if (adapter->fc_autoneg == AUTONEG_ENABLE) {
1a821ca5
JB		 316 if (netif_running(adapter->netdev)) {
317 e1000_down(adapter);
318 e1000_up(adapter);
319 } else
1da177e4 320 e1000_reset(adapter);
96838a40 321 } else
1a821ca5 322 retval = ((hw->media_type == e1000_media_type_fiber) ?
90fb5135 323 e1000_setup_link(hw) : e1000_force_mac_fc(hw));
96838a40 324
1a821ca5
JB		 325 clear_bit(__E1000_RESETTING, &adapter->flags);
326 return retval;
1da177e4
LT		 327}
328
64798845 329static u32 e1000_get_msglevel(struct net_device *netdev)
1da177e4 330{
60490fe0 331 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 332 return adapter->msg_enable;
333}
334
64798845 335static void e1000_set_msglevel(struct net_device *netdev, u32 data)
1da177e4 336{
60490fe0 337 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 338 adapter->msg_enable = data;
339}
340
64798845 341static int e1000_get_regs_len(struct net_device *netdev)
1da177e4
LT		 342{
343#define E1000_REGS_LEN 32
406874a7 344 return E1000_REGS_LEN * sizeof(u32);
1da177e4
LT		 345}
346
64798845
JP		 347static void e1000_get_regs(struct net_device *netdev, struct ethtool_regs *regs,
348 void *p)
1da177e4 349{
60490fe0 350 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 351 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 352 u32 *regs_buff = p;
353 u16 phy_data;
1da177e4 354
406874a7 355 memset(p, 0, E1000_REGS_LEN * sizeof(u32));
1da177e4
LT		 356
357 regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
358
1dc32918
JP		 359 regs_buff[0] = er32(CTRL);
360 regs_buff[1] = er32(STATUS);
1da177e4 361
1dc32918
JP		 362 regs_buff[2] = er32(RCTL);
363 regs_buff[3] = er32(RDLEN);
364 regs_buff[4] = er32(RDH);
365 regs_buff[5] = er32(RDT);
366 regs_buff[6] = er32(RDTR);
1da177e4 367
1dc32918
JP		 368 regs_buff[7] = er32(TCTL);
369 regs_buff[8] = er32(TDLEN);
370 regs_buff[9] = er32(TDH);
371 regs_buff[10] = er32(TDT);
372 regs_buff[11] = er32(TIDV);
1da177e4 373
1dc32918 374 regs_buff[12] = hw->phy_type; /* PHY type (IGP=1, M88=0) */
96838a40 375 if (hw->phy_type == e1000_phy_igp) {
1da177e4
LT		 376 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
377 IGP01E1000_PHY_AGC_A);
378 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_A &
379 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 380 regs_buff[13] = (u32)phy_data; /* cable length */
1da177e4
LT		 381 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
382 IGP01E1000_PHY_AGC_B);
383 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_B &
384 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 385 regs_buff[14] = (u32)phy_data; /* cable length */
1da177e4
LT		 386 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
387 IGP01E1000_PHY_AGC_C);
388 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_C &
389 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 390 regs_buff[15] = (u32)phy_data; /* cable length */
1da177e4
LT		 391 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
392 IGP01E1000_PHY_AGC_D);
393 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_D &
394 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 395 regs_buff[16] = (u32)phy_data; /* cable length */
1da177e4
LT		 396 regs_buff[17] = 0; /* extended 10bt distance (not needed) */
397 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
398 e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS &
399 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 400 regs_buff[18] = (u32)phy_data; /* cable polarity */
1da177e4
LT		 401 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
402 IGP01E1000_PHY_PCS_INIT_REG);
403 e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG &
404 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 405 regs_buff[19] = (u32)phy_data; /* cable polarity */
1da177e4
LT		 406 regs_buff[20] = 0; /* polarity correction enabled (always) */
407 regs_buff[22] = 0; /* phy receive errors (unavailable) */
408 regs_buff[23] = regs_buff[18]; /* mdix mode */
409 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
410 } else {
8fc897b0 411 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
406874a7 412 regs_buff[13] = (u32)phy_data; /* cable length */
1da177e4
LT		 413 regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */
414 regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */
415 regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */
8fc897b0 416 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
406874a7 417 regs_buff[17] = (u32)phy_data; /* extended 10bt distance */
1da177e4
LT		 418 regs_buff[18] = regs_buff[13]; /* cable polarity */
419 regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */
420 regs_buff[20] = regs_buff[17]; /* polarity correction */
421 /* phy receive errors */
422 regs_buff[22] = adapter->phy_stats.receive_errors;
423 regs_buff[23] = regs_buff[13]; /* mdix mode */
424 }
425 regs_buff[21] = adapter->phy_stats.idle_errors; /* phy idle errors */
426 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
406874a7 427 regs_buff[24] = (u32)phy_data; /* phy local receiver status */
1da177e4 428 regs_buff[25] = regs_buff[24]; /* phy remote receiver status */
96838a40 429 if (hw->mac_type >= e1000_82540 &&
4ccc12ae 430 hw->media_type == e1000_media_type_copper) {
1dc32918 431 regs_buff[26] = er32(MANC);
1da177e4
LT		 432 }
433}
434
64798845 435static int e1000_get_eeprom_len(struct net_device *netdev)
1da177e4 436{
60490fe0 437 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918
JP		 438 struct e1000_hw *hw = &adapter->hw;
439
440 return hw->eeprom.word_size * 2;
1da177e4
LT		 441}
442
64798845
JP		 443static int e1000_get_eeprom(struct net_device *netdev,
444 struct ethtool_eeprom *eeprom, u8 *bytes)
1da177e4 445{
60490fe0 446 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 447 struct e1000_hw *hw = &adapter->hw;
406874a7 448 u16 *eeprom_buff;
1da177e4
LT		 449 int first_word, last_word;
450 int ret_val = 0;
406874a7 451 u16 i;
1da177e4 452
96838a40 453 if (eeprom->len == 0)
1da177e4
LT		 454 return -EINVAL;
455
456 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
457
458 first_word = eeprom->offset >> 1;
459 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
460
406874a7 461 eeprom_buff = kmalloc(sizeof(u16) *
1da177e4 462 (last_word - first_word + 1), GFP_KERNEL);
96838a40 463 if (!eeprom_buff)
1da177e4
LT		 464 return -ENOMEM;
465
96838a40 466 if (hw->eeprom.type == e1000_eeprom_spi)
1da177e4
LT		 467 ret_val = e1000_read_eeprom(hw, first_word,
468 last_word - first_word + 1,
469 eeprom_buff);
470 else {
c7be73bc
JP		 471 for (i = 0; i < last_word - first_word + 1; i++) {
472 ret_val = e1000_read_eeprom(hw, first_word + i, 1,
473 &eeprom_buff[i]);
474 if (ret_val)
1da177e4 475 break;
c7be73bc 476 }
1da177e4
LT		 477 }
478
479 /* Device's eeprom is always little-endian, word addressable */
480 for (i = 0; i < last_word - first_word + 1; i++)
481 le16_to_cpus(&eeprom_buff[i]);
482
406874a7 483 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1),
6cfbd97b 484 eeprom->len);
1da177e4
LT		 485 kfree(eeprom_buff);
486
487 return ret_val;
488}
489
64798845
JP		 490static int e1000_set_eeprom(struct net_device *netdev,
491 struct ethtool_eeprom *eeprom, u8 *bytes)
1da177e4 492{
60490fe0 493 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 494 struct e1000_hw *hw = &adapter->hw;
406874a7 495 u16 *eeprom_buff;
1da177e4
LT		 496 void *ptr;
497 int max_len, first_word, last_word, ret_val = 0;
406874a7 498 u16 i;
1da177e4 499
96838a40 500 if (eeprom->len == 0)
1da177e4
LT		 501 return -EOPNOTSUPP;
502
96838a40 503 if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
1da177e4
LT		 504 return -EFAULT;
505
506 max_len = hw->eeprom.word_size * 2;
507
508 first_word = eeprom->offset >> 1;
509 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
510 eeprom_buff = kmalloc(max_len, GFP_KERNEL);
96838a40 511 if (!eeprom_buff)
1da177e4
LT		 512 return -ENOMEM;
513
514 ptr = (void *)eeprom_buff;
515
96838a40 516 if (eeprom->offset & 1) {
6cfbd97b
JK		 517 /* need read/modify/write of first changed EEPROM word
518 * only the second byte of the word is being modified
519 */
1da177e4
LT		 520 ret_val = e1000_read_eeprom(hw, first_word, 1,
521 &eeprom_buff[0]);
522 ptr++;
523 }
96838a40 524 if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
6cfbd97b
JK		 525 /* need read/modify/write of last changed EEPROM word
526 * only the first byte of the word is being modified
527 */
1da177e4
LT		 528 ret_val = e1000_read_eeprom(hw, last_word, 1,
529 &eeprom_buff[last_word - first_word]);
530 }
531
532 /* Device's eeprom is always little-endian, word addressable */
533 for (i = 0; i < last_word - first_word + 1; i++)
534 le16_to_cpus(&eeprom_buff[i]);
535
536 memcpy(ptr, bytes, eeprom->len);
537
538 for (i = 0; i < last_word - first_word + 1; i++)
539 eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
540
541 ret_val = e1000_write_eeprom(hw, first_word,
542 last_word - first_word + 1, eeprom_buff);
543
1532ecea
JB		 544 /* Update the checksum over the first part of the EEPROM if needed */
545 if ((ret_val == 0) && (first_word <= EEPROM_CHECKSUM_REG))
1da177e4
LT		 546 e1000_update_eeprom_checksum(hw);
547
548 kfree(eeprom_buff);
549 return ret_val;
550}
551
64798845
JP		 552static void e1000_get_drvinfo(struct net_device *netdev,
553 struct ethtool_drvinfo *drvinfo)
1da177e4 554{
60490fe0 555 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 556
612a94d6
RJ		 557 strlcpy(drvinfo->driver, e1000_driver_name,
558 sizeof(drvinfo->driver));
559 strlcpy(drvinfo->version, e1000_driver_version,
560 sizeof(drvinfo->version));
a2917e22 561
612a94d6
RJ		 562 strlcpy(drvinfo->bus_info, pci_name(adapter->pdev),
563 sizeof(drvinfo->bus_info));
1da177e4
LT		 564 drvinfo->regdump_len = e1000_get_regs_len(netdev);
565 drvinfo->eedump_len = e1000_get_eeprom_len(netdev);
566}
567
64798845
JP		 568static void e1000_get_ringparam(struct net_device *netdev,
569 struct ethtool_ringparam *ring)
1da177e4 570{
60490fe0 571 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918
JP		 572 struct e1000_hw *hw = &adapter->hw;
573 e1000_mac_type mac_type = hw->mac_type;
581d708e
MC		 574 struct e1000_tx_ring *txdr = adapter->tx_ring;
575 struct e1000_rx_ring *rxdr = adapter->rx_ring;
1da177e4
LT		 576
577 ring->rx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_RXD :
578 E1000_MAX_82544_RXD;
579 ring->tx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_TXD :
580 E1000_MAX_82544_TXD;
1da177e4
LT		 581 ring->rx_pending = rxdr->count;
582 ring->tx_pending = txdr->count;
1da177e4
LT		 583}
584
64798845
JP		 585static int e1000_set_ringparam(struct net_device *netdev,
586 struct ethtool_ringparam *ring)
1da177e4 587{
60490fe0 588 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918
JP		 589 struct e1000_hw *hw = &adapter->hw;
590 e1000_mac_type mac_type = hw->mac_type;
793fab72
VA		 591 struct e1000_tx_ring *txdr, *tx_old;
592 struct e1000_rx_ring *rxdr, *rx_old;
1c7e5b12 593 int i, err;
581d708e 594
0989aa43
JK		 595 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
596 return -EINVAL;
597
2db10a08
AK		 598 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
599 msleep(1);
600
581d708e
MC		 601 if (netif_running(adapter->netdev))
602 e1000_down(adapter);
1da177e4
LT		 603
604 tx_old = adapter->tx_ring;
605 rx_old = adapter->rx_ring;
606
793fab72 607 err = -ENOMEM;
6cfbd97b
JK		 608 txdr = kcalloc(adapter->num_tx_queues, sizeof(struct e1000_tx_ring),
609 GFP_KERNEL);
793fab72
VA		 610 if (!txdr)
611 goto err_alloc_tx;
581d708e 612
6cfbd97b
JK		 613 rxdr = kcalloc(adapter->num_rx_queues, sizeof(struct e1000_rx_ring),
614 GFP_KERNEL);
793fab72
VA		 615 if (!rxdr)
616 goto err_alloc_rx;
581d708e 617
793fab72
VA		 618 adapter->tx_ring = txdr;
619 adapter->rx_ring = rxdr;
581d708e 620
406874a7
JP		 621 rxdr->count = max(ring->rx_pending,(u32)E1000_MIN_RXD);
622 rxdr->count = min(rxdr->count,(u32)(mac_type < e1000_82544 ?
6cfbd97b 623 E1000_MAX_RXD : E1000_MAX_82544_RXD));
9099cfb9 624 rxdr->count = ALIGN(rxdr->count, REQ_RX_DESCRIPTOR_MULTIPLE);
1da177e4 625
406874a7
JP		 626 txdr->count = max(ring->tx_pending,(u32)E1000_MIN_TXD);
627 txdr->count = min(txdr->count,(u32)(mac_type < e1000_82544 ?
6cfbd97b 628 E1000_MAX_TXD : E1000_MAX_82544_TXD));
9099cfb9 629 txdr->count = ALIGN(txdr->count, REQ_TX_DESCRIPTOR_MULTIPLE);
1da177e4 630
f56799ea 631 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 632 txdr[i].count = txdr->count;
f56799ea 633 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 634 rxdr[i].count = rxdr->count;
581d708e 635
96838a40 636 if (netif_running(adapter->netdev)) {
1da177e4 637 /* Try to get new resources before deleting old */
c7be73bc
JP		 638 err = e1000_setup_all_rx_resources(adapter);
639 if (err)
1da177e4 640 goto err_setup_rx;
c7be73bc
JP		 641 err = e1000_setup_all_tx_resources(adapter);
642 if (err)
1da177e4
LT		 643 goto err_setup_tx;
644
645 /* save the new, restore the old in order to free it,
6cfbd97b
JK		 646 * then restore the new back again
647 */
1da177e4 648
1da177e4
LT		 649 adapter->rx_ring = rx_old;
650 adapter->tx_ring = tx_old;
581d708e
MC		 651 e1000_free_all_rx_resources(adapter);
652 e1000_free_all_tx_resources(adapter);
653 kfree(tx_old);
654 kfree(rx_old);
793fab72
VA		 655 adapter->rx_ring = rxdr;
656 adapter->tx_ring = txdr;
c7be73bc
JP		 657 err = e1000_up(adapter);
658 if (err)
2db10a08 659 goto err_setup;
1da177e4
LT		 660 }
661
2db10a08 662 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 663 return 0;
664err_setup_tx:
581d708e 665 e1000_free_all_rx_resources(adapter);
1da177e4
LT		 666err_setup_rx:
667 adapter->rx_ring = rx_old;
668 adapter->tx_ring = tx_old;
793fab72
VA		 669 kfree(rxdr);
670err_alloc_rx:
671 kfree(txdr);
672err_alloc_tx:
1da177e4 673 e1000_up(adapter);
2db10a08
AK		 674err_setup:
675 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 676 return err;
677}
678
64798845
JP		 679static bool reg_pattern_test(struct e1000_adapter *adapter, u64 *data, int reg,
680 u32 mask, u32 write)
7e64300a 681{
1dc32918 682 struct e1000_hw *hw = &adapter->hw;
406874a7 683 static const u32 test[] =
7e64300a 684 {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
1dc32918 685 u8 __iomem *address = hw->hw_addr + reg;
406874a7 686 u32 read;
7e64300a
JP		 687 int i;
688
689 for (i = 0; i < ARRAY_SIZE(test); i++) {
690 writel(write & test[i], address);
691 read = readl(address);
692 if (read != (write & test[i] & mask)) {
feb8f478
ET		 693 e_err(drv, "pattern test reg %04X failed: "
694 "got 0x%08X expected 0x%08X\n",
695 reg, read, (write & test[i] & mask));
7e64300a
JP		 696 *data = reg;
697 return true;
698 }
699 }
700 return false;
1da177e4
LT		 701}
702
64798845
JP		 703static bool reg_set_and_check(struct e1000_adapter *adapter, u64 *data, int reg,
704 u32 mask, u32 write)
7e64300a 705{
1dc32918
JP		 706 struct e1000_hw *hw = &adapter->hw;
707 u8 __iomem *address = hw->hw_addr + reg;
406874a7 708 u32 read;
7e64300a
JP		 709
710 writel(write & mask, address);
711 read = readl(address);
712 if ((read & mask) != (write & mask)) {
feb8f478 713 e_err(drv, "set/check reg %04X test failed: "
675ad473
ET		 714 "got 0x%08X expected 0x%08X\n",
715 reg, (read & mask), (write & mask));
7e64300a
JP		 716 *data = reg;
717 return true;
718 }
719 return false;
1da177e4
LT		 720}
721
7e64300a
JP		 722#define REG_PATTERN_TEST(reg, mask, write) \
723 do { \
724 if (reg_pattern_test(adapter, data, \
1dc32918 725 (hw->mac_type >= e1000_82543) \
7e64300a
JP		 726 ? E1000_##reg : E1000_82542_##reg, \
727 mask, write)) \
728 return 1; \
729 } while (0)
730
731#define REG_SET_AND_CHECK(reg, mask, write) \
732 do { \
733 if (reg_set_and_check(adapter, data, \
1dc32918 734 (hw->mac_type >= e1000_82543) \
7e64300a
JP		 735 ? E1000_##reg : E1000_82542_##reg, \
736 mask, write)) \
737 return 1; \
738 } while (0)
739
64798845 740static int e1000_reg_test(struct e1000_adapter *adapter, u64 *data)
1da177e4 741{
406874a7
JP		 742 u32 value, before, after;
743 u32 i, toggle;
1dc32918 744 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 745
746 /* The status register is Read Only, so a write should fail.
747 * Some bits that get toggled are ignored.
748 */
1532ecea 749
868d5309 750 /* there are several bits on newer hardware that are r/w */
1532ecea 751 toggle = 0xFFFFF833;
b01f6691 752
1dc32918
JP		 753 before = er32(STATUS);
754 value = (er32(STATUS) & toggle);
755 ew32(STATUS, toggle);
756 after = er32(STATUS) & toggle;
96838a40 757 if (value != after) {
feb8f478 758 e_err(drv, "failed STATUS register test got: "
675ad473 759 "0x%08X expected: 0x%08X\n", after, value);
1da177e4
LT		 760 *data = 1;
761 return 1;
762 }
b01f6691 763 /* restore previous status */
1dc32918 764 ew32(STATUS, before);
90fb5135 765
1532ecea
JB		 766 REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
767 REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF);
768 REG_PATTERN_TEST(FCT, 0x0000FFFF, 0xFFFFFFFF);
769 REG_PATTERN_TEST(VET, 0x0000FFFF, 0xFFFFFFFF);
90fb5135 770
1da177e4
LT		 771 REG_PATTERN_TEST(RDTR, 0x0000FFFF, 0xFFFFFFFF);
772 REG_PATTERN_TEST(RDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
773 REG_PATTERN_TEST(RDLEN, 0x000FFF80, 0x000FFFFF);
774 REG_PATTERN_TEST(RDH, 0x0000FFFF, 0x0000FFFF);
775 REG_PATTERN_TEST(RDT, 0x0000FFFF, 0x0000FFFF);
776 REG_PATTERN_TEST(FCRTH, 0x0000FFF8, 0x0000FFF8);
777 REG_PATTERN_TEST(FCTTV, 0x0000FFFF, 0x0000FFFF);
778 REG_PATTERN_TEST(TIPG, 0x3FFFFFFF, 0x3FFFFFFF);
779 REG_PATTERN_TEST(TDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
780 REG_PATTERN_TEST(TDLEN, 0x000FFF80, 0x000FFFFF);
781
782 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x00000000);
90fb5135 783
1532ecea 784 before = 0x06DFB3FE;
cd94dd0b 785 REG_SET_AND_CHECK(RCTL, before, 0x003FFFFB);
1da177e4
LT		 786 REG_SET_AND_CHECK(TCTL, 0xFFFFFFFF, 0x00000000);
787
1dc32918 788 if (hw->mac_type >= e1000_82543) {
cd94dd0b 789 REG_SET_AND_CHECK(RCTL, before, 0xFFFFFFFF);
1da177e4 790 REG_PATTERN_TEST(RDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
1532ecea 791 REG_PATTERN_TEST(TXCW, 0xC000FFFF, 0x0000FFFF);
1da177e4
LT		 792 REG_PATTERN_TEST(TDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
793 REG_PATTERN_TEST(TIDV, 0x0000FFFF, 0x0000FFFF);
1532ecea 794 value = E1000_RAR_ENTRIES;
cd94dd0b 795 for (i = 0; i < value; i++) {
1da177e4 796 REG_PATTERN_TEST(RA + (((i << 1) + 1) << 2), 0x8003FFFF,
90fb5135 797 0xFFFFFFFF);
1da177e4 798 }
1da177e4 799 } else {
1da177e4
LT		 800 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x01FFFFFF);
801 REG_PATTERN_TEST(RDBAL, 0xFFFFF000, 0xFFFFFFFF);
802 REG_PATTERN_TEST(TXCW, 0x0000FFFF, 0x0000FFFF);
803 REG_PATTERN_TEST(TDBAL, 0xFFFFF000, 0xFFFFFFFF);
1da177e4
LT		 804 }
805
1532ecea 806 value = E1000_MC_TBL_SIZE;
cd94dd0b 807 for (i = 0; i < value; i++)
1da177e4
LT		 808 REG_PATTERN_TEST(MTA + (i << 2), 0xFFFFFFFF, 0xFFFFFFFF);
809
810 *data = 0;
811 return 0;
812}
813
64798845 814static int e1000_eeprom_test(struct e1000_adapter *adapter, u64 *data)
1da177e4 815{
1dc32918 816 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 817 u16 temp;
818 u16 checksum = 0;
819 u16 i;
1da177e4
LT		 820
821 *data = 0;
822 /* Read and add up the contents of the EEPROM */
96838a40 823 for (i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) {
1dc32918 824 if ((e1000_read_eeprom(hw, i, 1, &temp)) < 0) {
1da177e4
LT		 825 *data = 1;
826 break;
827 }
828 checksum += temp;
829 }
830
831 /* If Checksum is not Correct return error else test passed */
e982f17c 832 if ((checksum != (u16)EEPROM_SUM) && !(*data))
1da177e4
LT		 833 *data = 2;
834
835 return *data;
836}
837
64798845 838static irqreturn_t e1000_test_intr(int irq, void *data)
1da177e4 839{
e982f17c 840 struct net_device *netdev = (struct net_device *)data;
60490fe0 841 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 842 struct e1000_hw *hw = &adapter->hw;
1da177e4 843
1dc32918 844 adapter->test_icr |= er32(ICR);
1da177e4
LT		 845
846 return IRQ_HANDLED;
847}
848
64798845 849static int e1000_intr_test(struct e1000_adapter *adapter, u64 *data)
1da177e4
LT		 850{
851 struct net_device *netdev = adapter->netdev;
406874a7 852 u32 mask, i = 0;
c3033b01 853 bool shared_int = true;
406874a7 854 u32 irq = adapter->pdev->irq;
1dc32918 855 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 856
857 *data = 0;
858
6cfbd97b
JK		 859 /* NOTE: we don't test MSI interrupts here, yet
860 * Hook up test interrupt handler just for this test
861 */
a0607fd3 862 if (!request_irq(irq, e1000_test_intr, IRQF_PROBE_SHARED, netdev->name,
6cfbd97b 863 netdev))
c3033b01 864 shared_int = false;
a0607fd3 865 else if (request_irq(irq, e1000_test_intr, IRQF_SHARED,
6cfbd97b 866 netdev->name, netdev)) {
1da177e4
LT		 867 *data = 1;
868 return -1;
869 }
feb8f478
ET		 870 e_info(hw, "testing %s interrupt\n", (shared_int ?
871 "shared" : "unshared"));
1da177e4
LT		 872
873 /* Disable all the interrupts */
1dc32918 874 ew32(IMC, 0xFFFFFFFF);
945a5151 875 E1000_WRITE_FLUSH();
f8ec4733 876 msleep(10);
1da177e4
LT		 877
878 /* Test each interrupt */
96838a40 879 for (; i < 10; i++) {
1da177e4
LT		 880
881 /* Interrupt to test */
882 mask = 1 << i;
883
76c224bc
AK		 884 if (!shared_int) {
885 /* Disable the interrupt to be reported in
886 * the cause register and then force the same
887 * interrupt and see if one gets posted. If
888 * an interrupt was posted to the bus, the
889 * test failed.
890 */
891 adapter->test_icr = 0;
1dc32918
JP		 892 ew32(IMC, mask);
893 ew32(ICS, mask);
945a5151 894 E1000_WRITE_FLUSH();
f8ec4733 895 msleep(10);
76c224bc
AK		 896
897 if (adapter->test_icr & mask) {
898 *data = 3;
899 break;
900 }
1da177e4
LT		 901 }
902
903 /* Enable the interrupt to be reported in
904 * the cause register and then force the same
905 * interrupt and see if one gets posted. If
906 * an interrupt was not posted to the bus, the
907 * test failed.
908 */
909 adapter->test_icr = 0;
1dc32918
JP		 910 ew32(IMS, mask);
911 ew32(ICS, mask);
945a5151 912 E1000_WRITE_FLUSH();
f8ec4733 913 msleep(10);
1da177e4 914
96838a40 915 if (!(adapter->test_icr & mask)) {
1da177e4
LT		 916 *data = 4;
917 break;
918 }
919
76c224bc 920 if (!shared_int) {
1da177e4
LT		 921 /* Disable the other interrupts to be reported in
922 * the cause register and then force the other
923 * interrupts and see if any get posted. If
924 * an interrupt was posted to the bus, the
925 * test failed.
926 */
927 adapter->test_icr = 0;
1dc32918
JP		 928 ew32(IMC, ~mask & 0x00007FFF);
929 ew32(ICS, ~mask & 0x00007FFF);
945a5151 930 E1000_WRITE_FLUSH();
f8ec4733 931 msleep(10);
1da177e4 932
96838a40 933 if (adapter->test_icr) {
1da177e4
LT		 934 *data = 5;
935 break;
936 }
937 }
938 }
939
940 /* Disable all the interrupts */
1dc32918 941 ew32(IMC, 0xFFFFFFFF);
945a5151 942 E1000_WRITE_FLUSH();
f8ec4733 943 msleep(10);
1da177e4
LT		 944
945 /* Unhook test interrupt handler */
946 free_irq(irq, netdev);
947
948 return *data;
949}
950
64798845 951static void e1000_free_desc_rings(struct e1000_adapter *adapter)
1da177e4 952{
581d708e
MC		 953 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
954 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1da177e4
LT		 955 struct pci_dev *pdev = adapter->pdev;
956 int i;
957
96838a40
JB		 958 if (txdr->desc && txdr->buffer_info) {
959 for (i = 0; i < txdr->count; i++) {
960 if (txdr->buffer_info[i].dma)
b16f53be
NN		 961 dma_unmap_single(&pdev->dev,
962 txdr->buffer_info[i].dma,
1da177e4 963 txdr->buffer_info[i].length,
b16f53be 964 DMA_TO_DEVICE);
96838a40 965 if (txdr->buffer_info[i].skb)
1da177e4
LT		 966 dev_kfree_skb(txdr->buffer_info[i].skb);
967 }
968 }
969
96838a40
JB		 970 if (rxdr->desc && rxdr->buffer_info) {
971 for (i = 0; i < rxdr->count; i++) {
972 if (rxdr->buffer_info[i].dma)
b16f53be
NN		 973 dma_unmap_single(&pdev->dev,
974 rxdr->buffer_info[i].dma,
1da177e4 975 rxdr->buffer_info[i].length,
b16f53be 976 DMA_FROM_DEVICE);
96838a40 977 if (rxdr->buffer_info[i].skb)
1da177e4
LT		 978 dev_kfree_skb(rxdr->buffer_info[i].skb);
979 }
980 }
981
f5645110 982 if (txdr->desc) {
b16f53be
NN		 983 dma_free_coherent(&pdev->dev, txdr->size, txdr->desc,
984 txdr->dma);
6b27adb6
JL		 985 txdr->desc = NULL;
986 }
f5645110 987 if (rxdr->desc) {
b16f53be
NN		 988 dma_free_coherent(&pdev->dev, rxdr->size, rxdr->desc,
989 rxdr->dma);
6b27adb6
JL		 990 rxdr->desc = NULL;
991 }
1da177e4 992
b4558ea9 993 kfree(txdr->buffer_info);
6b27adb6 994 txdr->buffer_info = NULL;
b4558ea9 995 kfree(rxdr->buffer_info);
6b27adb6 996 rxdr->buffer_info = NULL;
1da177e4
LT		 997}
998
64798845 999static int e1000_setup_desc_rings(struct e1000_adapter *adapter)
1da177e4 1000{
1dc32918 1001 struct e1000_hw *hw = &adapter->hw;
581d708e
MC		 1002 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1003 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1da177e4 1004 struct pci_dev *pdev = adapter->pdev;
406874a7 1005 u32 rctl;
1c7e5b12 1006 int i, ret_val;
1da177e4
LT		 1007
1008 /* Setup Tx descriptor ring and Tx buffers */
1009
96838a40
JB		 1010 if (!txdr->count)
1011 txdr->count = E1000_DEFAULT_TXD;
1da177e4 1012
c7be73bc
JP		 1013 txdr->buffer_info = kcalloc(txdr->count, sizeof(struct e1000_buffer),
1014 GFP_KERNEL);
1015 if (!txdr->buffer_info) {
1da177e4
LT		 1016 ret_val = 1;
1017 goto err_nomem;
1018 }
1da177e4
LT		 1019
1020 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
9099cfb9 1021 txdr->size = ALIGN(txdr->size, 4096);
b16f53be
NN		 1022 txdr->desc = dma_alloc_coherent(&pdev->dev, txdr->size, &txdr->dma,
1023 GFP_KERNEL);
c7be73bc 1024 if (!txdr->desc) {
1da177e4
LT		 1025 ret_val = 2;
1026 goto err_nomem;
1027 }
1028 memset(txdr->desc, 0, txdr->size);
1029 txdr->next_to_use = txdr->next_to_clean = 0;
1030
e982f17c
JP		 1031 ew32(TDBAL, ((u64)txdr->dma & 0x00000000FFFFFFFF));
1032 ew32(TDBAH, ((u64)txdr->dma >> 32));
1dc32918
JP		 1033 ew32(TDLEN, txdr->count * sizeof(struct e1000_tx_desc));
1034 ew32(TDH, 0);
1035 ew32(TDT, 0);
1036 ew32(TCTL, E1000_TCTL_PSP | E1000_TCTL_EN |
1037 E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
1038 E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT);
1da177e4 1039
96838a40 1040 for (i = 0; i < txdr->count; i++) {
1da177e4
LT		 1041 struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*txdr, i);
1042 struct sk_buff *skb;
1043 unsigned int size = 1024;
1044
c7be73bc
JP		 1045 skb = alloc_skb(size, GFP_KERNEL);
1046 if (!skb) {
1da177e4
LT		 1047 ret_val = 3;
1048 goto err_nomem;
1049 }
1050 skb_put(skb, size);
1051 txdr->buffer_info[i].skb = skb;
1052 txdr->buffer_info[i].length = skb->len;
1053 txdr->buffer_info[i].dma =
b16f53be
NN		 1054 dma_map_single(&pdev->dev, skb->data, skb->len,
1055 DMA_TO_DEVICE);
1da177e4
LT		 1056 tx_desc->buffer_addr = cpu_to_le64(txdr->buffer_info[i].dma);
1057 tx_desc->lower.data = cpu_to_le32(skb->len);
1058 tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP |
1059 E1000_TXD_CMD_IFCS |
1060 E1000_TXD_CMD_RPS);
1061 tx_desc->upper.data = 0;
1062 }
1063
1064 /* Setup Rx descriptor ring and Rx buffers */
1065
96838a40
JB		 1066 if (!rxdr->count)
1067 rxdr->count = E1000_DEFAULT_RXD;
1da177e4 1068
c7be73bc
JP		 1069 rxdr->buffer_info = kcalloc(rxdr->count, sizeof(struct e1000_buffer),
1070 GFP_KERNEL);
1071 if (!rxdr->buffer_info) {
1da177e4
LT		 1072 ret_val = 4;
1073 goto err_nomem;
1074 }
1da177e4
LT		 1075
1076 rxdr->size = rxdr->count * sizeof(struct e1000_rx_desc);
b16f53be
NN		 1077 rxdr->desc = dma_alloc_coherent(&pdev->dev, rxdr->size, &rxdr->dma,
1078 GFP_KERNEL);
c7be73bc 1079 if (!rxdr->desc) {
1da177e4
LT		 1080 ret_val = 5;
1081 goto err_nomem;
1082 }
1083 memset(rxdr->desc, 0, rxdr->size);
1084 rxdr->next_to_use = rxdr->next_to_clean = 0;
1085
1dc32918
JP		 1086 rctl = er32(RCTL);
1087 ew32(RCTL, rctl & ~E1000_RCTL_EN);
e982f17c
JP		 1088 ew32(RDBAL, ((u64)rxdr->dma & 0xFFFFFFFF));
1089 ew32(RDBAH, ((u64)rxdr->dma >> 32));
1dc32918
JP		 1090 ew32(RDLEN, rxdr->size);
1091 ew32(RDH, 0);
1092 ew32(RDT, 0);
1da177e4
LT		 1093 rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
1094 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1dc32918
JP		 1095 (hw->mc_filter_type << E1000_RCTL_MO_SHIFT);
1096 ew32(RCTL, rctl);
1da177e4 1097
96838a40 1098 for (i = 0; i < rxdr->count; i++) {
1da177e4
LT		 1099 struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rxdr, i);
1100 struct sk_buff *skb;
1101
c7be73bc
JP		 1102 skb = alloc_skb(E1000_RXBUFFER_2048 + NET_IP_ALIGN, GFP_KERNEL);
1103 if (!skb) {
1da177e4
LT		 1104 ret_val = 6;
1105 goto err_nomem;
1106 }
1107 skb_reserve(skb, NET_IP_ALIGN);
1108 rxdr->buffer_info[i].skb = skb;
1109 rxdr->buffer_info[i].length = E1000_RXBUFFER_2048;
1110 rxdr->buffer_info[i].dma =
b16f53be
NN		 1111 dma_map_single(&pdev->dev, skb->data,
1112 E1000_RXBUFFER_2048, DMA_FROM_DEVICE);
1da177e4
LT		 1113 rx_desc->buffer_addr = cpu_to_le64(rxdr->buffer_info[i].dma);
1114 memset(skb->data, 0x00, skb->len);
1115 }
1116
1117 return 0;
1118
1119err_nomem:
1120 e1000_free_desc_rings(adapter);
1121 return ret_val;
1122}
1123
64798845 1124static void e1000_phy_disable_receiver(struct e1000_adapter *adapter)
1da177e4 1125{
1dc32918
JP		 1126 struct e1000_hw *hw = &adapter->hw;
1127
1da177e4 1128 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1dc32918
JP		 1129 e1000_write_phy_reg(hw, 29, 0x001F);
1130 e1000_write_phy_reg(hw, 30, 0x8FFC);
1131 e1000_write_phy_reg(hw, 29, 0x001A);
1132 e1000_write_phy_reg(hw, 30, 0x8FF0);
1da177e4
LT		 1133}
1134
64798845 1135static void e1000_phy_reset_clk_and_crs(struct e1000_adapter *adapter)
1da177e4 1136{
1dc32918 1137 struct e1000_hw *hw = &adapter->hw;
406874a7 1138 u16 phy_reg;
1da177e4
LT		 1139
1140 /* Because we reset the PHY above, we need to re-force TX_CLK in the
1141 * Extended PHY Specific Control Register to 25MHz clock. This
1142 * value defaults back to a 2.5MHz clock when the PHY is reset.
1143 */
1dc32918 1144 e1000_read_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
1da177e4 1145 phy_reg |= M88E1000_EPSCR_TX_CLK_25;
1dc32918 1146 e1000_write_phy_reg(hw,
1da177e4
LT		 1147 M88E1000_EXT_PHY_SPEC_CTRL, phy_reg);
1148
1149 /* In addition, because of the s/w reset above, we need to enable
1150 * CRS on TX. This must be set for both full and half duplex
1151 * operation.
1152 */
1dc32918 1153 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1da177e4 1154 phy_reg |= M88E1000_PSCR_ASSERT_CRS_ON_TX;
1dc32918 1155 e1000_write_phy_reg(hw,
1da177e4
LT		 1156 M88E1000_PHY_SPEC_CTRL, phy_reg);
1157}
1158
64798845 1159static int e1000_nonintegrated_phy_loopback(struct e1000_adapter *adapter)
1da177e4 1160{
1dc32918 1161 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 1162 u32 ctrl_reg;
1163 u16 phy_reg;
1da177e4
LT		 1164
1165 /* Setup the Device Control Register for PHY loopback test. */
1166
1dc32918 1167 ctrl_reg = er32(CTRL);
1da177e4
LT		 1168 ctrl_reg |= (E1000_CTRL_ILOS | /* Invert Loss-Of-Signal */
1169 E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1170 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1171 E1000_CTRL_SPD_1000 | /* Force Speed to 1000 */
1172 E1000_CTRL_FD); /* Force Duplex to FULL */
1173
1dc32918 1174 ew32(CTRL, ctrl_reg);
1da177e4
LT		 1175
1176 /* Read the PHY Specific Control Register (0x10) */
1dc32918 1177 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1da177e4
LT		 1178
1179 /* Clear Auto-Crossover bits in PHY Specific Control Register
1180 * (bits 6:5).
1181 */
1182 phy_reg &= ~M88E1000_PSCR_AUTO_X_MODE;
1dc32918 1183 e1000_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_reg);
1da177e4
LT		 1184
1185 /* Perform software reset on the PHY */
1dc32918 1186 e1000_phy_reset(hw);
1da177e4
LT		 1187
1188 /* Have to setup TX_CLK and TX_CRS after software reset */
1189 e1000_phy_reset_clk_and_crs(adapter);
1190
1dc32918 1191 e1000_write_phy_reg(hw, PHY_CTRL, 0x8100);
1da177e4
LT		 1192
1193 /* Wait for reset to complete. */
1194 udelay(500);
1195
1196 /* Have to setup TX_CLK and TX_CRS after software reset */
1197 e1000_phy_reset_clk_and_crs(adapter);
1198
1199 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1200 e1000_phy_disable_receiver(adapter);
1201
1202 /* Set the loopback bit in the PHY control register. */
1dc32918 1203 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
1da177e4 1204 phy_reg |= MII_CR_LOOPBACK;
1dc32918 1205 e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
1da177e4
LT		 1206
1207 /* Setup TX_CLK and TX_CRS one more time. */
1208 e1000_phy_reset_clk_and_crs(adapter);
1209
1210 /* Check Phy Configuration */
1dc32918 1211 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
96838a40 1212 if (phy_reg != 0x4100)
1da177e4
LT		 1213 return 9;
1214
1dc32918 1215 e1000_read_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
96838a40 1216 if (phy_reg != 0x0070)
1da177e4
LT		 1217 return 10;
1218
1dc32918 1219 e1000_read_phy_reg(hw, 29, &phy_reg);
96838a40 1220 if (phy_reg != 0x001A)
1da177e4
LT		 1221 return 11;
1222
1223 return 0;
1224}
1225
64798845 1226static int e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
1da177e4 1227{
1dc32918 1228 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 1229 u32 ctrl_reg = 0;
1230 u32 stat_reg = 0;
1da177e4 1231
1dc32918 1232 hw->autoneg = false;
1da177e4 1233
1dc32918 1234 if (hw->phy_type == e1000_phy_m88) {
1da177e4 1235 /* Auto-MDI/MDIX Off */
1dc32918 1236 e1000_write_phy_reg(hw,
1da177e4
LT		 1237 M88E1000_PHY_SPEC_CTRL, 0x0808);
1238 /* reset to update Auto-MDI/MDIX */
1dc32918 1239 e1000_write_phy_reg(hw, PHY_CTRL, 0x9140);
1da177e4 1240 /* autoneg off */
1dc32918 1241 e1000_write_phy_reg(hw, PHY_CTRL, 0x8140);
1532ecea 1242 }
1da177e4 1243
1dc32918 1244 ctrl_reg = er32(CTRL);
cd94dd0b 1245
1532ecea
JB		 1246 /* force 1000, set loopback */
1247 e1000_write_phy_reg(hw, PHY_CTRL, 0x4140);
cd94dd0b 1248
1532ecea
JB		 1249 /* Now set up the MAC to the same speed/duplex as the PHY. */
1250 ctrl_reg = er32(CTRL);
1251 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1252 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1253 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1254 E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
6cfbd97b 1255 E1000_CTRL_FD); /* Force Duplex to FULL */
1da177e4 1256
1dc32918
JP		 1257 if (hw->media_type == e1000_media_type_copper &&
1258 hw->phy_type == e1000_phy_m88)
1da177e4 1259 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
8fc897b0 1260 else {
1da177e4 1261 /* Set the ILOS bit on the fiber Nic is half
6cfbd97b
JK		 1262 * duplex link is detected.
1263 */
1dc32918 1264 stat_reg = er32(STATUS);
96838a40 1265 if ((stat_reg & E1000_STATUS_FD) == 0)
1da177e4
LT		 1266 ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
1267 }
1268
1dc32918 1269 ew32(CTRL, ctrl_reg);
1da177e4
LT		 1270
1271 /* Disable the receiver on the PHY so when a cable is plugged in, the
1272 * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1273 */
1dc32918 1274 if (hw->phy_type == e1000_phy_m88)
1da177e4
LT		 1275 e1000_phy_disable_receiver(adapter);
1276
1277 udelay(500);
1278
1279 return 0;
1280}
1281
64798845 1282static int e1000_set_phy_loopback(struct e1000_adapter *adapter)
1da177e4 1283{
1dc32918 1284 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 1285 u16 phy_reg = 0;
1286 u16 count = 0;
1da177e4 1287
1dc32918 1288 switch (hw->mac_type) {
1da177e4 1289 case e1000_82543:
1dc32918 1290 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 1291 /* Attempt to setup Loopback mode on Non-integrated PHY.
1292 * Some PHY registers get corrupted at random, so
1293 * attempt this 10 times.
1294 */
96838a40 1295 while (e1000_nonintegrated_phy_loopback(adapter) &&
1da177e4 1296 count++ < 10);
96838a40 1297 if (count < 11)
1da177e4
LT		 1298 return 0;
1299 }
1300 break;
1301
1302 case e1000_82544:
1303 case e1000_82540:
1304 case e1000_82545:
1305 case e1000_82545_rev_3:
1306 case e1000_82546:
1307 case e1000_82546_rev_3:
1308 case e1000_82541:
1309 case e1000_82541_rev_2:
1310 case e1000_82547:
1311 case e1000_82547_rev_2:
1312 return e1000_integrated_phy_loopback(adapter);
1313 break;
1da177e4
LT		 1314 default:
1315 /* Default PHY loopback work is to read the MII
1316 * control register and assert bit 14 (loopback mode).
1317 */
1dc32918 1318 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
1da177e4 1319 phy_reg |= MII_CR_LOOPBACK;
1dc32918 1320 e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
1da177e4
LT		 1321 return 0;
1322 break;
1323 }
1324
1325 return 8;
1326}
1327
64798845 1328static int e1000_setup_loopback_test(struct e1000_adapter *adapter)
1da177e4 1329{
49273163 1330 struct e1000_hw *hw = &adapter->hw;
406874a7 1331 u32 rctl;
1da177e4 1332
49273163
JK		 1333 if (hw->media_type == e1000_media_type_fiber ||
1334 hw->media_type == e1000_media_type_internal_serdes) {
1335 switch (hw->mac_type) {
1336 case e1000_82545:
1337 case e1000_82546:
1338 case e1000_82545_rev_3:
1339 case e1000_82546_rev_3:
1da177e4 1340 return e1000_set_phy_loopback(adapter);
49273163 1341 break;
49273163 1342 default:
1dc32918 1343 rctl = er32(RCTL);
1da177e4 1344 rctl |= E1000_RCTL_LBM_TCVR;
1dc32918 1345 ew32(RCTL, rctl);
1da177e4
LT		 1346 return 0;
1347 }
49273163 1348 } else if (hw->media_type == e1000_media_type_copper)
1da177e4
LT		 1349 return e1000_set_phy_loopback(adapter);
1350
1351 return 7;
1352}
1353
64798845 1354static void e1000_loopback_cleanup(struct e1000_adapter *adapter)
1da177e4 1355{
49273163 1356 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 1357 u32 rctl;
1358 u16 phy_reg;
1da177e4 1359
1dc32918 1360 rctl = er32(RCTL);
1da177e4 1361 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
1dc32918 1362 ew32(RCTL, rctl);
1da177e4 1363
49273163 1364 switch (hw->mac_type) {
49273163
JK		 1365 case e1000_82545:
1366 case e1000_82546:
1367 case e1000_82545_rev_3:
1368 case e1000_82546_rev_3:
1369 default:
c3033b01 1370 hw->autoneg = true;
49273163
JK		 1371 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
1372 if (phy_reg & MII_CR_LOOPBACK) {
1da177e4 1373 phy_reg &= ~MII_CR_LOOPBACK;
49273163
JK		 1374 e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
1375 e1000_phy_reset(hw);
1da177e4 1376 }
49273163 1377 break;
1da177e4
LT		 1378 }
1379}
1380
64798845
JP		 1381static void e1000_create_lbtest_frame(struct sk_buff *skb,
1382 unsigned int frame_size)
1da177e4
LT		 1383{
1384 memset(skb->data, 0xFF, frame_size);
ce7393b9 1385 frame_size &= ~1;
1da177e4
LT		 1386 memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1387 memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
1388 memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
1389}
1390
64798845
JP		 1391static int e1000_check_lbtest_frame(struct sk_buff *skb,
1392 unsigned int frame_size)
1da177e4 1393{
ce7393b9 1394 frame_size &= ~1;
96838a40
JB		 1395 if (*(skb->data + 3) == 0xFF) {
1396 if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
1da177e4
LT		 1397 (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
1398 return 0;
1399 }
1400 }
1401 return 13;
1402}
1403
64798845 1404static int e1000_run_loopback_test(struct e1000_adapter *adapter)
1da177e4 1405{
1dc32918 1406 struct e1000_hw *hw = &adapter->hw;
581d708e
MC		 1407 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1408 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1da177e4 1409 struct pci_dev *pdev = adapter->pdev;
e4eff729
MC		 1410 int i, j, k, l, lc, good_cnt, ret_val=0;
1411 unsigned long time;
1da177e4 1412
1dc32918 1413 ew32(RDT, rxdr->count - 1);
1da177e4 1414
96838a40 1415 /* Calculate the loop count based on the largest descriptor ring
e4eff729
MC		 1416 * The idea is to wrap the largest ring a number of times using 64
1417 * send/receive pairs during each loop
1418 */
1da177e4 1419
96838a40 1420 if (rxdr->count <= txdr->count)
e4eff729
MC		 1421 lc = ((txdr->count / 64) * 2) + 1;
1422 else
1423 lc = ((rxdr->count / 64) * 2) + 1;
1424
1425 k = l = 0;
96838a40
JB		 1426 for (j = 0; j <= lc; j++) { /* loop count loop */
1427 for (i = 0; i < 64; i++) { /* send the packets */
1428 e1000_create_lbtest_frame(txdr->buffer_info[i].skb,
e4eff729 1429 1024);
b16f53be
NN		 1430 dma_sync_single_for_device(&pdev->dev,
1431 txdr->buffer_info[k].dma,
1432 txdr->buffer_info[k].length,
1433 DMA_TO_DEVICE);
96838a40 1434 if (unlikely(++k == txdr->count)) k = 0;
e4eff729 1435 }
1dc32918 1436 ew32(TDT, k);
945a5151 1437 E1000_WRITE_FLUSH();
f8ec4733 1438 msleep(200);
e4eff729
MC		 1439 time = jiffies; /* set the start time for the receive */
1440 good_cnt = 0;
1441 do { /* receive the sent packets */
b16f53be
NN		 1442 dma_sync_single_for_cpu(&pdev->dev,
1443 rxdr->buffer_info[l].dma,
1444 rxdr->buffer_info[l].length,
1445 DMA_FROM_DEVICE);
96838a40 1446
e4eff729
MC		 1447 ret_val = e1000_check_lbtest_frame(
1448 rxdr->buffer_info[l].skb,
6cfbd97b 1449 1024);
96838a40 1450 if (!ret_val)
e4eff729 1451 good_cnt++;
96838a40
JB		 1452 if (unlikely(++l == rxdr->count)) l = 0;
1453 /* time + 20 msecs (200 msecs on 2.4) is more than
1454 * enough time to complete the receives, if it's
e4eff729
MC		 1455 * exceeded, break and error off
1456 */
1457 } while (good_cnt < 64 && jiffies < (time + 20));
96838a40 1458 if (good_cnt != 64) {
e4eff729 1459 ret_val = 13; /* ret_val is the same as mis-compare */
96838a40 1460 break;
e4eff729 1461 }
96838a40 1462 if (jiffies >= (time + 2)) {
e4eff729
MC		 1463 ret_val = 14; /* error code for time out error */
1464 break;
1465 }
1466 } /* end loop count loop */
1da177e4
LT		 1467 return ret_val;
1468}
1469
64798845 1470static int e1000_loopback_test(struct e1000_adapter *adapter, u64 *data)
1da177e4 1471{
c7be73bc
JP		 1472 *data = e1000_setup_desc_rings(adapter);
1473 if (*data)
57128197 1474 goto out;
c7be73bc
JP		 1475 *data = e1000_setup_loopback_test(adapter);
1476 if (*data)
57128197 1477 goto err_loopback;
1da177e4
LT		 1478 *data = e1000_run_loopback_test(adapter);
1479 e1000_loopback_cleanup(adapter);
57128197 1480
1da177e4 1481err_loopback:
57128197
JK		 1482 e1000_free_desc_rings(adapter);
1483out:
1da177e4
LT		 1484 return *data;
1485}
1486
64798845 1487static int e1000_link_test(struct e1000_adapter *adapter, u64 *data)
1da177e4 1488{
1dc32918 1489 struct e1000_hw *hw = &adapter->hw;
1da177e4 1490 *data = 0;
1dc32918 1491 if (hw->media_type == e1000_media_type_internal_serdes) {
1da177e4 1492 int i = 0;
be0f0719 1493 hw->serdes_has_link = false;
1da177e4 1494
2648345f 1495 /* On some blade server designs, link establishment
6cfbd97b
JK		 1496 * could take as long as 2-3 minutes
1497 */
1da177e4 1498 do {
1dc32918 1499 e1000_check_for_link(hw);
be0f0719 1500 if (hw->serdes_has_link)
1da177e4 1501 return *data;
f8ec4733 1502 msleep(20);
1da177e4
LT		 1503 } while (i++ < 3750);
1504
2648345f 1505 *data = 1;
1da177e4 1506 } else {
1dc32918
JP		 1507 e1000_check_for_link(hw);
1508 if (hw->autoneg) /* if auto_neg is set wait for it */
f8ec4733 1509 msleep(4000);
1da177e4 1510
1dc32918 1511 if (!(er32(STATUS) & E1000_STATUS_LU)) {
1da177e4
LT		 1512 *data = 1;
1513 }
1514 }
1515 return *data;
1516}
1517
64798845 1518static int e1000_get_sset_count(struct net_device *netdev, int sset)
1da177e4 1519{
b9f2c044
JG		 1520 switch (sset) {
1521 case ETH_SS_TEST:
1522 return E1000_TEST_LEN;
1523 case ETH_SS_STATS:
1524 return E1000_STATS_LEN;
1525 default:
1526 return -EOPNOTSUPP;
1527 }
1da177e4
LT		 1528}
1529
64798845
JP		 1530static void e1000_diag_test(struct net_device *netdev,
1531 struct ethtool_test *eth_test, u64 *data)
1da177e4 1532{
60490fe0 1533 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1534 struct e1000_hw *hw = &adapter->hw;
c3033b01 1535 bool if_running = netif_running(netdev);
1da177e4 1536
1314bbf3 1537 set_bit(__E1000_TESTING, &adapter->flags);
96838a40 1538 if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1da177e4
LT		 1539 /* Offline tests */
1540
1541 /* save speed, duplex, autoneg settings */
1dc32918
JP		 1542 u16 autoneg_advertised = hw->autoneg_advertised;
1543 u8 forced_speed_duplex = hw->forced_speed_duplex;
1544 u8 autoneg = hw->autoneg;
1da177e4 1545
feb8f478 1546 e_info(hw, "offline testing starting\n");
d658266e 1547
1da177e4 1548 /* Link test performed before hardware reset so autoneg doesn't
6cfbd97b
JK		 1549 * interfere with test result
1550 */
96838a40 1551 if (e1000_link_test(adapter, &data[4]))
1da177e4
LT		 1552 eth_test->flags |= ETH_TEST_FL_FAILED;
1553
96838a40 1554 if (if_running)
2db10a08
AK		 1555 /* indicate we're in test mode */
1556 dev_close(netdev);
1da177e4
LT		 1557 else
1558 e1000_reset(adapter);
1559
96838a40 1560 if (e1000_reg_test(adapter, &data[0]))
1da177e4
LT		 1561 eth_test->flags |= ETH_TEST_FL_FAILED;
1562
1563 e1000_reset(adapter);
96838a40 1564 if (e1000_eeprom_test(adapter, &data[1]))
1da177e4
LT		 1565 eth_test->flags |= ETH_TEST_FL_FAILED;
1566
1567 e1000_reset(adapter);
96838a40 1568 if (e1000_intr_test(adapter, &data[2]))
1da177e4
LT		 1569 eth_test->flags |= ETH_TEST_FL_FAILED;
1570
1571 e1000_reset(adapter);
d658266e
JB		 1572 /* make sure the phy is powered up */
1573 e1000_power_up_phy(adapter);
96838a40 1574 if (e1000_loopback_test(adapter, &data[3]))
1da177e4
LT		 1575 eth_test->flags |= ETH_TEST_FL_FAILED;
1576
1577 /* restore speed, duplex, autoneg settings */
1dc32918
JP		 1578 hw->autoneg_advertised = autoneg_advertised;
1579 hw->forced_speed_duplex = forced_speed_duplex;
1580 hw->autoneg = autoneg;
1da177e4
LT		 1581
1582 e1000_reset(adapter);
1314bbf3 1583 clear_bit(__E1000_TESTING, &adapter->flags);
96838a40 1584 if (if_running)
2db10a08 1585 dev_open(netdev);
1da177e4 1586 } else {
feb8f478 1587 e_info(hw, "online testing starting\n");
1da177e4 1588 /* Online tests */
96838a40 1589 if (e1000_link_test(adapter, &data[4]))
1da177e4
LT		 1590 eth_test->flags |= ETH_TEST_FL_FAILED;
1591
90fb5135 1592 /* Online tests aren't run; pass by default */
1da177e4
LT		 1593 data[0] = 0;
1594 data[1] = 0;
1595 data[2] = 0;
1596 data[3] = 0;
2db10a08 1597
1314bbf3 1598 clear_bit(__E1000_TESTING, &adapter->flags);
1da177e4 1599 }
352c9f85 1600 msleep_interruptible(4 * 1000);
1da177e4
LT		 1601}
1602
64798845
JP		 1603static int e1000_wol_exclusion(struct e1000_adapter *adapter,
1604 struct ethtool_wolinfo *wol)
1da177e4 1605{
1da177e4 1606 struct e1000_hw *hw = &adapter->hw;
120cd576 1607 int retval = 1; /* fail by default */
1da177e4 1608
120cd576 1609 switch (hw->device_id) {
dc1f71f6 1610 case E1000_DEV_ID_82542:
1da177e4
LT		 1611 case E1000_DEV_ID_82543GC_FIBER:
1612 case E1000_DEV_ID_82543GC_COPPER:
1613 case E1000_DEV_ID_82544EI_FIBER:
1614 case E1000_DEV_ID_82546EB_QUAD_COPPER:
1615 case E1000_DEV_ID_82545EM_FIBER:
1616 case E1000_DEV_ID_82545EM_COPPER:
84916829 1617 case E1000_DEV_ID_82546GB_QUAD_COPPER:
120cd576
JB		 1618 case E1000_DEV_ID_82546GB_PCIE:
1619 /* these don't support WoL at all */
1da177e4 1620 wol->supported = 0;
120cd576 1621 break;
1da177e4
LT		 1622 case E1000_DEV_ID_82546EB_FIBER:
1623 case E1000_DEV_ID_82546GB_FIBER:
120cd576 1624 /* Wake events not supported on port B */
1dc32918 1625 if (er32(STATUS) & E1000_STATUS_FUNC_1) {
1da177e4 1626 wol->supported = 0;
120cd576 1627 break;
1da177e4 1628 }
120cd576
JB		 1629 /* return success for non excluded adapter ports */
1630 retval = 0;
1631 break;
1632 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1633 /* quad port adapters only support WoL on port A */
1634 if (!adapter->quad_port_a) {
1635 wol->supported = 0;
1636 break;
1637 }
1638 /* return success for non excluded adapter ports */
1639 retval = 0;
1640 break;
1da177e4 1641 default:
120cd576
JB		 1642 /* dual port cards only support WoL on port A from now on
1643 * unless it was enabled in the eeprom for port B
6cfbd97b
JK		 1644 * so exclude FUNC_1 ports from having WoL enabled
1645 */
1dc32918 1646 if (er32(STATUS) & E1000_STATUS_FUNC_1 &&
120cd576
JB		 1647 !adapter->eeprom_wol) {
1648 wol->supported = 0;
1649 break;
1650 }
84916829 1651
120cd576
JB		 1652 retval = 0;
1653 }
1654
1655 return retval;
1656}
1657
64798845
JP		 1658static void e1000_get_wol(struct net_device *netdev,
1659 struct ethtool_wolinfo *wol)
120cd576
JB		 1660{
1661 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1662 struct e1000_hw *hw = &adapter->hw;
120cd576
JB		 1663
1664 wol->supported = WAKE_UCAST | WAKE_MCAST |
1665 WAKE_BCAST | WAKE_MAGIC;
1666 wol->wolopts = 0;
1667
1668 /* this function will set ->supported = 0 and return 1 if wol is not
6cfbd97b
JK		 1669 * supported by this hardware
1670 */
de126489
RW		 1671 if (e1000_wol_exclusion(adapter, wol) ||
1672 !device_can_wakeup(&adapter->pdev->dev))
1da177e4 1673 return;
120cd576
JB		 1674
1675 /* apply any specific unsupported masks here */
1dc32918 1676 switch (hw->device_id) {
120cd576 1677 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
d7558148 1678 /* KSP3 does not support UCAST wake-ups */
120cd576
JB		 1679 wol->supported &= ~WAKE_UCAST;
1680
1681 if (adapter->wol & E1000_WUFC_EX)
feb8f478
ET		 1682 e_err(drv, "Interface does not support directed "
1683 "(unicast) frame wake-up packets\n");
120cd576
JB		 1684 break;
1685 default:
1686 break;
1da177e4 1687 }
120cd576
JB		 1688
1689 if (adapter->wol & E1000_WUFC_EX)
1690 wol->wolopts |= WAKE_UCAST;
1691 if (adapter->wol & E1000_WUFC_MC)
1692 wol->wolopts |= WAKE_MCAST;
1693 if (adapter->wol & E1000_WUFC_BC)
1694 wol->wolopts |= WAKE_BCAST;
1695 if (adapter->wol & E1000_WUFC_MAG)
1696 wol->wolopts |= WAKE_MAGIC;
1da177e4
LT		 1697}
1698
64798845 1699static int e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1da177e4 1700{
60490fe0 1701 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1702 struct e1000_hw *hw = &adapter->hw;
1703
120cd576
JB		 1704 if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
1705 return -EOPNOTSUPP;
1706
de126489
RW		 1707 if (e1000_wol_exclusion(adapter, wol) ||
1708 !device_can_wakeup(&adapter->pdev->dev))
1da177e4
LT		 1709 return wol->wolopts ? -EOPNOTSUPP : 0;
1710
120cd576 1711 switch (hw->device_id) {
84916829 1712 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
84916829 1713 if (wol->wolopts & WAKE_UCAST) {
feb8f478
ET		 1714 e_err(drv, "Interface does not support directed "
1715 "(unicast) frame wake-up packets\n");
84916829
JK		 1716 return -EOPNOTSUPP;
1717 }
120cd576 1718 break;
1da177e4 1719 default:
120cd576 1720 break;
1da177e4
LT		 1721 }
1722
120cd576
JB		 1723 /* these settings will always override what we currently have */
1724 adapter->wol = 0;
1725
1726 if (wol->wolopts & WAKE_UCAST)
1727 adapter->wol |= E1000_WUFC_EX;
1728 if (wol->wolopts & WAKE_MCAST)
1729 adapter->wol |= E1000_WUFC_MC;
1730 if (wol->wolopts & WAKE_BCAST)
1731 adapter->wol |= E1000_WUFC_BC;
1732 if (wol->wolopts & WAKE_MAGIC)
1733 adapter->wol |= E1000_WUFC_MAG;
1734
de126489
RW		 1735 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1736
1da177e4
LT		 1737 return 0;
1738}
1739
64359091
JK		 1740static int e1000_set_phys_id(struct net_device *netdev,
1741 enum ethtool_phys_id_state state)
1da177e4 1742{
64359091 1743 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1744 struct e1000_hw *hw = &adapter->hw;
1da177e4 1745
64359091
JK		 1746 switch (state) {
1747 case ETHTOOL_ID_ACTIVE:
1748 e1000_setup_led(hw);
1749 return 2;
1da177e4 1750
64359091
JK		 1751 case ETHTOOL_ID_ON:
1752 e1000_led_on(hw);
1753 break;
1da177e4 1754
64359091
JK		 1755 case ETHTOOL_ID_OFF:
1756 e1000_led_off(hw);
1757 break;
1da177e4 1758
64359091
JK		 1759 case ETHTOOL_ID_INACTIVE:
1760 e1000_cleanup_led(hw);
1da177e4 1761 }
1da177e4
LT		 1762
1763 return 0;
1764}
1765
94c9e5a8
JB		 1766static int e1000_get_coalesce(struct net_device *netdev,
1767 struct ethtool_coalesce *ec)
1768{
1769 struct e1000_adapter *adapter = netdev_priv(netdev);
1770
1771 if (adapter->hw.mac_type < e1000_82545)
1772 return -EOPNOTSUPP;
1773
eab2abf5 1774 if (adapter->itr_setting <= 4)
94c9e5a8
JB		 1775 ec->rx_coalesce_usecs = adapter->itr_setting;
1776 else
1777 ec->rx_coalesce_usecs = 1000000 / adapter->itr_setting;
1778
1779 return 0;
1780}
1781
1782static int e1000_set_coalesce(struct net_device *netdev,
1783 struct ethtool_coalesce *ec)
1784{
1785 struct e1000_adapter *adapter = netdev_priv(netdev);
1786 struct e1000_hw *hw = &adapter->hw;
1787
1788 if (hw->mac_type < e1000_82545)
1789 return -EOPNOTSUPP;
1790
1791 if ((ec->rx_coalesce_usecs > E1000_MAX_ITR_USECS) ||
eab2abf5 1792 ((ec->rx_coalesce_usecs > 4) &&
94c9e5a8
JB		 1793 (ec->rx_coalesce_usecs < E1000_MIN_ITR_USECS)) ||
1794 (ec->rx_coalesce_usecs == 2))
1795 return -EINVAL;
1796
eab2abf5
JB		 1797 if (ec->rx_coalesce_usecs == 4) {
1798 adapter->itr = adapter->itr_setting = 4;
1799 } else if (ec->rx_coalesce_usecs <= 3) {
94c9e5a8
JB		 1800 adapter->itr = 20000;
1801 adapter->itr_setting = ec->rx_coalesce_usecs;
1802 } else {
1803 adapter->itr = (1000000 / ec->rx_coalesce_usecs);
1804 adapter->itr_setting = adapter->itr & ~3;
1805 }
1806
1807 if (adapter->itr_setting != 0)
1808 ew32(ITR, 1000000000 / (adapter->itr * 256));
1809 else
1810 ew32(ITR, 0);
1811
1812 return 0;
1813}
1814
64798845 1815static int e1000_nway_reset(struct net_device *netdev)
1da177e4 1816{
60490fe0 1817 struct e1000_adapter *adapter = netdev_priv(netdev);
2db10a08
AK		 1818 if (netif_running(netdev))
1819 e1000_reinit_locked(adapter);
1da177e4
LT		 1820 return 0;
1821}
1822
64798845
JP		 1823static void e1000_get_ethtool_stats(struct net_device *netdev,
1824 struct ethtool_stats *stats, u64 *data)
1da177e4 1825{
60490fe0 1826 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 1827 int i;
8328c38f 1828 char *p = NULL;
1da177e4
LT		 1829
1830 e1000_update_stats(adapter);
7bfa4816 1831 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
8328c38f
AK		 1832 switch (e1000_gstrings_stats[i].type) {
1833 case NETDEV_STATS:
1834 p = (char *) netdev +
1835 e1000_gstrings_stats[i].stat_offset;
1836 break;
1837 case E1000_STATS:
1838 p = (char *) adapter +
1839 e1000_gstrings_stats[i].stat_offset;
1840 break;
1841 }
1842
7bfa4816 1843 data[i] = (e1000_gstrings_stats[i].sizeof_stat ==
406874a7 1844 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1da177e4 1845 }
6cfbd97b 1846/* BUG_ON(i != E1000_STATS_LEN); */
1da177e4
LT		 1847}
1848
64798845
JP		 1849static void e1000_get_strings(struct net_device *netdev, u32 stringset,
1850 u8 *data)
1da177e4 1851{
406874a7 1852 u8 *p = data;
1da177e4
LT		 1853 int i;
1854
96838a40 1855 switch (stringset) {
1da177e4 1856 case ETH_SS_TEST:
96838a40 1857 memcpy(data, *e1000_gstrings_test,
c32bc6e9 1858 sizeof(e1000_gstrings_test));
1da177e4
LT		 1859 break;
1860 case ETH_SS_STATS:
7bfa4816
JK		 1861 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
1862 memcpy(p, e1000_gstrings_stats[i].stat_string,
1863 ETH_GSTRING_LEN);
1864 p += ETH_GSTRING_LEN;
1865 }
6cfbd97b 1866 /* BUG_ON(p - data != E1000_STATS_LEN * ETH_GSTRING_LEN); */
1da177e4
LT		 1867 break;
1868 }
1869}
1870
7282d491 1871static const struct ethtool_ops e1000_ethtool_ops = {
6cfbd97b
JK		 1872 .get_settings = e1000_get_settings,
1873 .set_settings = e1000_set_settings,
1874 .get_drvinfo = e1000_get_drvinfo,
1875 .get_regs_len = e1000_get_regs_len,
1876 .get_regs = e1000_get_regs,
1877 .get_wol = e1000_get_wol,
1878 .set_wol = e1000_set_wol,
1879 .get_msglevel = e1000_get_msglevel,
1880 .set_msglevel = e1000_set_msglevel,
1881 .nway_reset = e1000_nway_reset,
1882 .get_link = e1000_get_link,
1883 .get_eeprom_len = e1000_get_eeprom_len,
1884 .get_eeprom = e1000_get_eeprom,
1885 .set_eeprom = e1000_set_eeprom,
1886 .get_ringparam = e1000_get_ringparam,
1887 .set_ringparam = e1000_set_ringparam,
1888 .get_pauseparam = e1000_get_pauseparam,
1889 .set_pauseparam = e1000_set_pauseparam,
1890 .self_test = e1000_diag_test,
1891 .get_strings = e1000_get_strings,
1892 .set_phys_id = e1000_set_phys_id,
1893 .get_ethtool_stats = e1000_get_ethtool_stats,
1894 .get_sset_count = e1000_get_sset_count,
1895 .get_coalesce = e1000_get_coalesce,
1896 .set_coalesce = e1000_set_coalesce,
e10df2c6 1897 .get_ts_info = ethtool_op_get_ts_info,
1da177e4
LT		 1898};
1899
1900void e1000_set_ethtool_ops(struct net_device *netdev)
1901{
1902 SET_ETHTOOL_OPS(netdev, &e1000_ethtool_ops);
1903}
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