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[mirror_ubuntu-artful-kernel.git] / drivers / net / ethernet / intel / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
0abb6eb1
AK		 3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK		 16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT		 22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
d0bb53e1 30#include <net/ip6_checksum.h>
5377a416 31#include <linux/io.h>
70c71606 32#include <linux/prefetch.h>
5622e404
JP		 33#include <linux/bitops.h>
34#include <linux/if_vlan.h>
5377a416
DB		 35
36/* Intel Media SOC GbE MDIO physical base address */
37static unsigned long ce4100_gbe_mdio_base_phy;
38/* Intel Media SOC GbE MDIO virtual base address */
39void __iomem *ce4100_gbe_mdio_base_virt;
1da177e4 40
1da177e4 41char e1000_driver_name[] = "e1000";
3ad2cc67 42static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
ab08853f 43#define DRV_VERSION "7.3.21-k8-NAPI"
abec42a4
SH		 44const char e1000_driver_version[] = DRV_VERSION;
45static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT		 46
47/* e1000_pci_tbl - PCI Device ID Table
48 *
49 * Last entry must be all 0s
50 *
51 * Macro expands to...
52 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
53 */
a3aa1884 54static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
1da177e4
LT		 55 INTEL_E1000_ETHERNET_DEVICE(0x1000),
56 INTEL_E1000_ETHERNET_DEVICE(0x1001),
57 INTEL_E1000_ETHERNET_DEVICE(0x1004),
58 INTEL_E1000_ETHERNET_DEVICE(0x1008),
59 INTEL_E1000_ETHERNET_DEVICE(0x1009),
60 INTEL_E1000_ETHERNET_DEVICE(0x100C),
61 INTEL_E1000_ETHERNET_DEVICE(0x100D),
62 INTEL_E1000_ETHERNET_DEVICE(0x100E),
63 INTEL_E1000_ETHERNET_DEVICE(0x100F),
64 INTEL_E1000_ETHERNET_DEVICE(0x1010),
65 INTEL_E1000_ETHERNET_DEVICE(0x1011),
66 INTEL_E1000_ETHERNET_DEVICE(0x1012),
67 INTEL_E1000_ETHERNET_DEVICE(0x1013),
68 INTEL_E1000_ETHERNET_DEVICE(0x1014),
69 INTEL_E1000_ETHERNET_DEVICE(0x1015),
70 INTEL_E1000_ETHERNET_DEVICE(0x1016),
71 INTEL_E1000_ETHERNET_DEVICE(0x1017),
72 INTEL_E1000_ETHERNET_DEVICE(0x1018),
73 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 74 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 75 INTEL_E1000_ETHERNET_DEVICE(0x101D),
76 INTEL_E1000_ETHERNET_DEVICE(0x101E),
77 INTEL_E1000_ETHERNET_DEVICE(0x1026),
78 INTEL_E1000_ETHERNET_DEVICE(0x1027),
79 INTEL_E1000_ETHERNET_DEVICE(0x1028),
80 INTEL_E1000_ETHERNET_DEVICE(0x1075),
81 INTEL_E1000_ETHERNET_DEVICE(0x1076),
82 INTEL_E1000_ETHERNET_DEVICE(0x1077),
83 INTEL_E1000_ETHERNET_DEVICE(0x1078),
84 INTEL_E1000_ETHERNET_DEVICE(0x1079),
85 INTEL_E1000_ETHERNET_DEVICE(0x107A),
86 INTEL_E1000_ETHERNET_DEVICE(0x107B),
87 INTEL_E1000_ETHERNET_DEVICE(0x107C),
88 INTEL_E1000_ETHERNET_DEVICE(0x108A),
b7ee49db 89 INTEL_E1000_ETHERNET_DEVICE(0x1099),
b7ee49db 90 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
5377a416 91 INTEL_E1000_ETHERNET_DEVICE(0x2E6E),
1da177e4
LT		 92 /* required last entry */
93 {0,}
94};
95
96MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
97
35574764
NN		 98int e1000_up(struct e1000_adapter *adapter);
99void e1000_down(struct e1000_adapter *adapter);
100void e1000_reinit_locked(struct e1000_adapter *adapter);
101void e1000_reset(struct e1000_adapter *adapter);
35574764
NN		 102int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
103int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
104void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
105void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
3ad2cc67 106static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
35574764 107 struct e1000_tx_ring *txdr);
3ad2cc67 108static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
35574764 109 struct e1000_rx_ring *rxdr);
3ad2cc67 110static void e1000_free_tx_resources(struct e1000_adapter *adapter,
35574764 111 struct e1000_tx_ring *tx_ring);
3ad2cc67 112static void e1000_free_rx_resources(struct e1000_adapter *adapter,
35574764
NN		 113 struct e1000_rx_ring *rx_ring);
114void e1000_update_stats(struct e1000_adapter *adapter);
1da177e4
LT		 115
116static int e1000_init_module(void);
117static void e1000_exit_module(void);
118static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
119static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e 120static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT		 121static int e1000_sw_init(struct e1000_adapter *adapter);
122static int e1000_open(struct net_device *netdev);
123static int e1000_close(struct net_device *netdev);
124static void e1000_configure_tx(struct e1000_adapter *adapter);
125static void e1000_configure_rx(struct e1000_adapter *adapter);
126static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 127static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
128static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
129static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
130 struct e1000_tx_ring *tx_ring);
131static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
132 struct e1000_rx_ring *rx_ring);
db0ce50d 133static void e1000_set_rx_mode(struct net_device *netdev);
5cf42fcd 134static void e1000_update_phy_info_task(struct work_struct *work);
a4010afe 135static void e1000_watchdog(struct work_struct *work);
5cf42fcd 136static void e1000_82547_tx_fifo_stall_task(struct work_struct *work);
3b29a56d
SH		 137static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
138 struct net_device *netdev);
1da177e4
LT		 139static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
140static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
141static int e1000_set_mac(struct net_device *netdev, void *p);
7d12e780 142static irqreturn_t e1000_intr(int irq, void *data);
c3033b01
JP		 143static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
144 struct e1000_tx_ring *tx_ring);
bea3348e 145static int e1000_clean(struct napi_struct *napi, int budget);
c3033b01
JP		 146static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
147 struct e1000_rx_ring *rx_ring,
148 int *work_done, int work_to_do);
edbbb3ca
JB		 149static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
150 struct e1000_rx_ring *rx_ring,
151 int *work_done, int work_to_do);
581d708e 152static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
edbbb3ca 153 struct e1000_rx_ring *rx_ring,
72d64a43 154 int cleaned_count);
edbbb3ca
JB		 155static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
156 struct e1000_rx_ring *rx_ring,
157 int cleaned_count);
1da177e4
LT		 158static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
159static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
160 int cmd);
1da177e4
LT		 161static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
162static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
163static void e1000_tx_timeout(struct net_device *dev);
65f27f38 164static void e1000_reset_task(struct work_struct *work);
1da177e4 165static void e1000_smartspeed(struct e1000_adapter *adapter);
e619d523
AK		 166static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
167 struct sk_buff *skb);
1da177e4 168
5622e404 169static bool e1000_vlan_used(struct e1000_adapter *adapter);
c8f44aff
MM		 170static void e1000_vlan_mode(struct net_device *netdev,
171 netdev_features_t features);
406874a7
JP		 172static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid);
173static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid);
1da177e4
LT		 174static void e1000_restore_vlan(struct e1000_adapter *adapter);
175
6fdfef16 176#ifdef CONFIG_PM
b43fcd7d 177static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
1da177e4
LT		 178static int e1000_resume(struct pci_dev *pdev);
179#endif
c653e635 180static void e1000_shutdown(struct pci_dev *pdev);
1da177e4
LT		 181
182#ifdef CONFIG_NET_POLL_CONTROLLER
183/* for netdump / net console */
184static void e1000_netpoll (struct net_device *netdev);
185#endif
186
1f753861
JB		 187#define COPYBREAK_DEFAULT 256
188static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
189module_param(copybreak, uint, 0644);
190MODULE_PARM_DESC(copybreak,
191 "Maximum size of packet that is copied to a new buffer on receive");
192
9026729b
AK		 193static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
194 pci_channel_state_t state);
195static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
196static void e1000_io_resume(struct pci_dev *pdev);
197
198static struct pci_error_handlers e1000_err_handler = {
199 .error_detected = e1000_io_error_detected,
200 .slot_reset = e1000_io_slot_reset,
201 .resume = e1000_io_resume,
202};
24025e4e 203
1da177e4
LT		 204static struct pci_driver e1000_driver = {
205 .name = e1000_driver_name,
206 .id_table = e1000_pci_tbl,
207 .probe = e1000_probe,
208 .remove = __devexit_p(e1000_remove),
c4e24f01 209#ifdef CONFIG_PM
25985edc 210 /* Power Management Hooks */
1da177e4 211 .suspend = e1000_suspend,
c653e635 212 .resume = e1000_resume,
1da177e4 213#endif
9026729b
AK		 214 .shutdown = e1000_shutdown,
215 .err_handler = &e1000_err_handler
1da177e4
LT		 216};
217
218MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
219MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
220MODULE_LICENSE("GPL");
221MODULE_VERSION(DRV_VERSION);
222
223static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
224module_param(debug, int, 0);
225MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
226
675ad473
ET		 227/**
228 * e1000_get_hw_dev - return device
229 * used by hardware layer to print debugging information
230 *
231 **/
232struct net_device *e1000_get_hw_dev(struct e1000_hw *hw)
233{
234 struct e1000_adapter *adapter = hw->back;
235 return adapter->netdev;
236}
237
1da177e4
LT		 238/**
239 * e1000_init_module - Driver Registration Routine
240 *
241 * e1000_init_module is the first routine called when the driver is
242 * loaded. All it does is register with the PCI subsystem.
243 **/
244
64798845 245static int __init e1000_init_module(void)
1da177e4
LT		 246{
247 int ret;
675ad473 248 pr_info("%s - version %s\n", e1000_driver_string, e1000_driver_version);
1da177e4 249
675ad473 250 pr_info("%s\n", e1000_copyright);
1da177e4 251
29917620 252 ret = pci_register_driver(&e1000_driver);
1f753861
JB		 253 if (copybreak != COPYBREAK_DEFAULT) {
254 if (copybreak == 0)
675ad473 255 pr_info("copybreak disabled\n");
1f753861 256 else
675ad473
ET		 257 pr_info("copybreak enabled for "
258 "packets <= %u bytes\n", copybreak);
1f753861 259 }
1da177e4
LT		 260 return ret;
261}
262
263module_init(e1000_init_module);
264
265/**
266 * e1000_exit_module - Driver Exit Cleanup Routine
267 *
268 * e1000_exit_module is called just before the driver is removed
269 * from memory.
270 **/
271
64798845 272static void __exit e1000_exit_module(void)
1da177e4 273{
1da177e4
LT		 274 pci_unregister_driver(&e1000_driver);
275}
276
277module_exit(e1000_exit_module);
278
2db10a08
AK		 279static int e1000_request_irq(struct e1000_adapter *adapter)
280{
281 struct net_device *netdev = adapter->netdev;
3e18826c 282 irq_handler_t handler = e1000_intr;
e94bd23f
AK		 283 int irq_flags = IRQF_SHARED;
284 int err;
2db10a08 285
e94bd23f
AK		 286 err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
287 netdev);
288 if (err) {
feb8f478 289 e_err(probe, "Unable to allocate interrupt Error: %d\n", err);
e94bd23f 290 }
2db10a08
AK		 291
292 return err;
293}
294
295static void e1000_free_irq(struct e1000_adapter *adapter)
296{
297 struct net_device *netdev = adapter->netdev;
298
299 free_irq(adapter->pdev->irq, netdev);
2db10a08
AK		 300}
301
1da177e4
LT		 302/**
303 * e1000_irq_disable - Mask off interrupt generation on the NIC
304 * @adapter: board private structure
305 **/
306
64798845 307static void e1000_irq_disable(struct e1000_adapter *adapter)
1da177e4 308{
1dc32918
JP		 309 struct e1000_hw *hw = &adapter->hw;
310
311 ew32(IMC, ~0);
312 E1000_WRITE_FLUSH();
1da177e4
LT		 313 synchronize_irq(adapter->pdev->irq);
314}
315
316/**
317 * e1000_irq_enable - Enable default interrupt generation settings
318 * @adapter: board private structure
319 **/
320
64798845 321static void e1000_irq_enable(struct e1000_adapter *adapter)
1da177e4 322{
1dc32918
JP		 323 struct e1000_hw *hw = &adapter->hw;
324
325 ew32(IMS, IMS_ENABLE_MASK);
326 E1000_WRITE_FLUSH();
1da177e4 327}
3ad2cc67 328
64798845 329static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2d7edb92 330{
1dc32918 331 struct e1000_hw *hw = &adapter->hw;
2d7edb92 332 struct net_device *netdev = adapter->netdev;
1dc32918 333 u16 vid = hw->mng_cookie.vlan_id;
406874a7 334 u16 old_vid = adapter->mng_vlan_id;
96838a40 335
5622e404
JP		 336 if (!e1000_vlan_used(adapter))
337 return;
338
339 if (!test_bit(vid, adapter->active_vlans)) {
340 if (hw->mng_cookie.status &
341 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
342 e1000_vlan_rx_add_vid(netdev, vid);
c5f226fe 343 adapter->mng_vlan_id = vid;
5622e404
JP		 344 } else {
345 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
346 }
347 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
348 (vid != old_vid) &&
349 !test_bit(old_vid, adapter->active_vlans))
350 e1000_vlan_rx_kill_vid(netdev, old_vid);
351 } else {
352 adapter->mng_vlan_id = vid;
2d7edb92
MC		 353 }
354}
b55ccb35 355
64798845 356static void e1000_init_manageability(struct e1000_adapter *adapter)
0fccd0e9 357{
1dc32918
JP		 358 struct e1000_hw *hw = &adapter->hw;
359
0fccd0e9 360 if (adapter->en_mng_pt) {
1dc32918 361 u32 manc = er32(MANC);
0fccd0e9
JG		 362
363 /* disable hardware interception of ARP */
364 manc &= ~(E1000_MANC_ARP_EN);
365
1dc32918 366 ew32(MANC, manc);
0fccd0e9
JG		 367 }
368}
369
64798845 370static void e1000_release_manageability(struct e1000_adapter *adapter)
0fccd0e9 371{
1dc32918
JP		 372 struct e1000_hw *hw = &adapter->hw;
373
0fccd0e9 374 if (adapter->en_mng_pt) {
1dc32918 375 u32 manc = er32(MANC);
0fccd0e9
JG		 376
377 /* re-enable hardware interception of ARP */
378 manc |= E1000_MANC_ARP_EN;
379
1dc32918 380 ew32(MANC, manc);
0fccd0e9
JG		 381 }
382}
383
e0aac5a2
AK		 384/**
385 * e1000_configure - configure the hardware for RX and TX
386 * @adapter = private board structure
387 **/
388static void e1000_configure(struct e1000_adapter *adapter)
1da177e4
LT		 389{
390 struct net_device *netdev = adapter->netdev;
2db10a08 391 int i;
1da177e4 392
db0ce50d 393 e1000_set_rx_mode(netdev);
1da177e4
LT		 394
395 e1000_restore_vlan(adapter);
0fccd0e9 396 e1000_init_manageability(adapter);
1da177e4
LT		 397
398 e1000_configure_tx(adapter);
399 e1000_setup_rctl(adapter);
400 e1000_configure_rx(adapter);
72d64a43
JK		 401 /* call E1000_DESC_UNUSED which always leaves
402 * at least 1 descriptor unused to make sure
403 * next_to_use != next_to_clean */
f56799ea 404 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 405 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e
JK		 406 adapter->alloc_rx_buf(adapter, ring,
407 E1000_DESC_UNUSED(ring));
f56799ea 408 }
e0aac5a2
AK		 409}
410
411int e1000_up(struct e1000_adapter *adapter)
412{
1dc32918
JP		 413 struct e1000_hw *hw = &adapter->hw;
414
e0aac5a2
AK		 415 /* hardware has been reset, we need to reload some things */
416 e1000_configure(adapter);
417
418 clear_bit(__E1000_DOWN, &adapter->flags);
7bfa4816 419
bea3348e 420 napi_enable(&adapter->napi);
c3570acb 421
5de55624
MC		 422 e1000_irq_enable(adapter);
423
4cb9be7a
JB		 424 netif_wake_queue(adapter->netdev);
425
79f3d399 426 /* fire a link change interrupt to start the watchdog */
1dc32918 427 ew32(ICS, E1000_ICS_LSC);
1da177e4
LT		 428 return 0;
429}
430
79f05bf0
AK		 431/**
432 * e1000_power_up_phy - restore link in case the phy was powered down
433 * @adapter: address of board private structure
434 *
435 * The phy may be powered down to save power and turn off link when the
436 * driver is unloaded and wake on lan is not enabled (among others)
437 * *** this routine MUST be followed by a call to e1000_reset ***
438 *
439 **/
440
d658266e 441void e1000_power_up_phy(struct e1000_adapter *adapter)
79f05bf0 442{
1dc32918 443 struct e1000_hw *hw = &adapter->hw;
406874a7 444 u16 mii_reg = 0;
79f05bf0
AK		 445
446 /* Just clear the power down bit to wake the phy back up */
1dc32918 447 if (hw->media_type == e1000_media_type_copper) {
79f05bf0
AK		 448 /* according to the manual, the phy will retain its
449 * settings across a power-down/up cycle */
1dc32918 450 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 451 mii_reg &= ~MII_CR_POWER_DOWN;
1dc32918 452 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
79f05bf0
AK		 453 }
454}
455
456static void e1000_power_down_phy(struct e1000_adapter *adapter)
457{
1dc32918
JP		 458 struct e1000_hw *hw = &adapter->hw;
459
61c2505f 460 /* Power down the PHY so no link is implied when interface is down *
c3033b01 461 * The PHY cannot be powered down if any of the following is true *
79f05bf0
AK		 462 * (a) WoL is enabled
463 * (b) AMT is active
464 * (c) SoL/IDER session is active */
1dc32918
JP		 465 if (!adapter->wol && hw->mac_type >= e1000_82540 &&
466 hw->media_type == e1000_media_type_copper) {
406874a7 467 u16 mii_reg = 0;
61c2505f 468
1dc32918 469 switch (hw->mac_type) {
61c2505f
BA		 470 case e1000_82540:
471 case e1000_82545:
472 case e1000_82545_rev_3:
473 case e1000_82546:
5377a416 474 case e1000_ce4100:
61c2505f
BA		 475 case e1000_82546_rev_3:
476 case e1000_82541:
477 case e1000_82541_rev_2:
478 case e1000_82547:
479 case e1000_82547_rev_2:
1dc32918 480 if (er32(MANC) & E1000_MANC_SMBUS_EN)
61c2505f
BA		 481 goto out;
482 break;
61c2505f
BA		 483 default:
484 goto out;
485 }
1dc32918 486 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 487 mii_reg |= MII_CR_POWER_DOWN;
1dc32918 488 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
4e0d8f7d 489 msleep(1);
79f05bf0 490 }
61c2505f
BA		 491out:
492 return;
79f05bf0
AK		 493}
494
a4010afe
JB		 495static void e1000_down_and_stop(struct e1000_adapter *adapter)
496{
497 set_bit(__E1000_DOWN, &adapter->flags);
498 cancel_work_sync(&adapter->reset_task);
499 cancel_delayed_work_sync(&adapter->watchdog_task);
500 cancel_delayed_work_sync(&adapter->phy_info_task);
501 cancel_delayed_work_sync(&adapter->fifo_stall_task);
502}
503
64798845 504void e1000_down(struct e1000_adapter *adapter)
1da177e4 505{
a6c42322 506 struct e1000_hw *hw = &adapter->hw;
1da177e4 507 struct net_device *netdev = adapter->netdev;
a6c42322 508 u32 rctl, tctl;
1da177e4 509
1314bbf3 510
a6c42322
JB		 511 /* disable receives in the hardware */
512 rctl = er32(RCTL);
513 ew32(RCTL, rctl & ~E1000_RCTL_EN);
514 /* flush and sleep below */
515
51851073 516 netif_tx_disable(netdev);
a6c42322
JB		 517
518 /* disable transmits in the hardware */
519 tctl = er32(TCTL);
520 tctl &= ~E1000_TCTL_EN;
521 ew32(TCTL, tctl);
522 /* flush both disables and wait for them to finish */
523 E1000_WRITE_FLUSH();
524 msleep(10);
525
bea3348e 526 napi_disable(&adapter->napi);
c3570acb 527
1da177e4 528 e1000_irq_disable(adapter);
c1605eb3 529
ab08853f
AC		 530 /*
531 * Setting DOWN must be after irq_disable to prevent
532 * a screaming interrupt. Setting DOWN also prevents
a4010afe 533 * tasks from rescheduling.
ab08853f 534 */
a4010afe 535 e1000_down_and_stop(adapter);
1da177e4 536
1da177e4
LT		 537 adapter->link_speed = 0;
538 adapter->link_duplex = 0;
539 netif_carrier_off(netdev);
1da177e4
LT		 540
541 e1000_reset(adapter);
581d708e
MC		 542 e1000_clean_all_tx_rings(adapter);
543 e1000_clean_all_rx_rings(adapter);
1da177e4 544}
1da177e4 545
38df7a39 546static void e1000_reinit_safe(struct e1000_adapter *adapter)
338c15e4
JB		 547{
548 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
549 msleep(1);
0ef4eedc 550 mutex_lock(&adapter->mutex);
338c15e4
JB		 551 e1000_down(adapter);
552 e1000_up(adapter);
0ef4eedc 553 mutex_unlock(&adapter->mutex);
338c15e4
JB		 554 clear_bit(__E1000_RESETTING, &adapter->flags);
555}
556
64798845 557void e1000_reinit_locked(struct e1000_adapter *adapter)
2db10a08 558{
338c15e4
JB		 559 /* if rtnl_lock is not held the call path is bogus */
560 ASSERT_RTNL();
2db10a08
AK		 561 WARN_ON(in_interrupt());
562 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
563 msleep(1);
564 e1000_down(adapter);
565 e1000_up(adapter);
566 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 567}
568
64798845 569void e1000_reset(struct e1000_adapter *adapter)
1da177e4 570{
1dc32918 571 struct e1000_hw *hw = &adapter->hw;
406874a7 572 u32 pba = 0, tx_space, min_tx_space, min_rx_space;
c3033b01 573 bool legacy_pba_adjust = false;
b7cb8c2c 574 u16 hwm;
1da177e4
LT		 575
576 /* Repartition Pba for greater than 9k mtu
577 * To take effect CTRL.RST is required.
578 */
579
1dc32918 580 switch (hw->mac_type) {
018ea44e
BA		 581 case e1000_82542_rev2_0:
582 case e1000_82542_rev2_1:
583 case e1000_82543:
584 case e1000_82544:
585 case e1000_82540:
586 case e1000_82541:
587 case e1000_82541_rev_2:
c3033b01 588 legacy_pba_adjust = true;
018ea44e
BA		 589 pba = E1000_PBA_48K;
590 break;
591 case e1000_82545:
592 case e1000_82545_rev_3:
593 case e1000_82546:
5377a416 594 case e1000_ce4100:
018ea44e
BA		 595 case e1000_82546_rev_3:
596 pba = E1000_PBA_48K;
597 break;
2d7edb92 598 case e1000_82547:
0e6ef3e0 599 case e1000_82547_rev_2:
c3033b01 600 legacy_pba_adjust = true;
2d7edb92
MC		 601 pba = E1000_PBA_30K;
602 break;
018ea44e
BA		 603 case e1000_undefined:
604 case e1000_num_macs:
2d7edb92
MC		 605 break;
606 }
607
c3033b01 608 if (legacy_pba_adjust) {
b7cb8c2c 609 if (hw->max_frame_size > E1000_RXBUFFER_8192)
018ea44e 610 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92 611
1dc32918 612 if (hw->mac_type == e1000_82547) {
018ea44e
BA		 613 adapter->tx_fifo_head = 0;
614 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
615 adapter->tx_fifo_size =
616 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
617 atomic_set(&adapter->tx_fifo_stall, 0);
618 }
b7cb8c2c 619 } else if (hw->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
018ea44e 620 /* adjust PBA for jumbo frames */
1dc32918 621 ew32(PBA, pba);
018ea44e
BA		 622
623 /* To maintain wire speed transmits, the Tx FIFO should be
b7cb8c2c 624 * large enough to accommodate two full transmit packets,
018ea44e 625 * rounded up to the next 1KB and expressed in KB. Likewise,
b7cb8c2c 626 * the Rx FIFO should be large enough to accommodate at least
018ea44e
BA		 627 * one full receive packet and is similarly rounded up and
628 * expressed in KB. */
1dc32918 629 pba = er32(PBA);
018ea44e
BA		 630 /* upper 16 bits has Tx packet buffer allocation size in KB */
631 tx_space = pba >> 16;
632 /* lower 16 bits has Rx packet buffer allocation size in KB */
633 pba &= 0xffff;
b7cb8c2c
JB		 634 /*
635 * the tx fifo also stores 16 bytes of information about the tx
636 * but don't include ethernet FCS because hardware appends it
637 */
638 min_tx_space = (hw->max_frame_size +
639 sizeof(struct e1000_tx_desc) -
640 ETH_FCS_LEN) * 2;
9099cfb9 641 min_tx_space = ALIGN(min_tx_space, 1024);
018ea44e 642 min_tx_space >>= 10;
b7cb8c2c
JB		 643 /* software strips receive CRC, so leave room for it */
644 min_rx_space = hw->max_frame_size;
9099cfb9 645 min_rx_space = ALIGN(min_rx_space, 1024);
018ea44e
BA		 646 min_rx_space >>= 10;
647
648 /* If current Tx allocation is less than the min Tx FIFO size,
649 * and the min Tx FIFO size is less than the current Rx FIFO
650 * allocation, take space away from current Rx allocation */
651 if (tx_space < min_tx_space &&
652 ((min_tx_space - tx_space) < pba)) {
653 pba = pba - (min_tx_space - tx_space);
654
655 /* PCI/PCIx hardware has PBA alignment constraints */
1dc32918 656 switch (hw->mac_type) {
018ea44e
BA		 657 case e1000_82545 ... e1000_82546_rev_3:
658 pba &= ~(E1000_PBA_8K - 1);
659 break;
660 default:
661 break;
662 }
663
664 /* if short on rx space, rx wins and must trump tx
665 * adjustment or use Early Receive if available */
1532ecea
JB		 666 if (pba < min_rx_space)
667 pba = min_rx_space;
018ea44e 668 }
1da177e4 669 }
2d7edb92 670
1dc32918 671 ew32(PBA, pba);
1da177e4 672
b7cb8c2c
JB		 673 /*
674 * flow control settings:
675 * The high water mark must be low enough to fit one full frame
676 * (or the size used for early receive) above it in the Rx FIFO.
677 * Set it to the lower of:
678 * - 90% of the Rx FIFO size, and
679 * - the full Rx FIFO size minus the early receive size (for parts
680 * with ERT support assuming ERT set to E1000_ERT_2048), or
681 * - the full Rx FIFO size minus one full frame
682 */
683 hwm = min(((pba << 10) * 9 / 10),
684 ((pba << 10) - hw->max_frame_size));
685
686 hw->fc_high_water = hwm & 0xFFF8; /* 8-byte granularity */
687 hw->fc_low_water = hw->fc_high_water - 8;
edbbb3ca 688 hw->fc_pause_time = E1000_FC_PAUSE_TIME;
1dc32918
JP		 689 hw->fc_send_xon = 1;
690 hw->fc = hw->original_fc;
1da177e4 691
2d7edb92 692 /* Allow time for pending master requests to run */
1dc32918
JP		 693 e1000_reset_hw(hw);
694 if (hw->mac_type >= e1000_82544)
695 ew32(WUC, 0);
09ae3e88 696
1dc32918 697 if (e1000_init_hw(hw))
feb8f478 698 e_dev_err("Hardware Error\n");
2d7edb92 699 e1000_update_mng_vlan(adapter);
3d5460a0
JB		 700
701 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
1dc32918 702 if (hw->mac_type >= e1000_82544 &&
1dc32918
JP		 703 hw->autoneg == 1 &&
704 hw->autoneg_advertised == ADVERTISE_1000_FULL) {
705 u32 ctrl = er32(CTRL);
3d5460a0
JB		 706 /* clear phy power management bit if we are in gig only mode,
707 * which if enabled will attempt negotiation to 100Mb, which
708 * can cause a loss of link at power off or driver unload */
709 ctrl &= ~E1000_CTRL_SWDPIN3;
1dc32918 710 ew32(CTRL, ctrl);
3d5460a0
JB		 711 }
712
1da177e4 713 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1dc32918 714 ew32(VET, ETHERNET_IEEE_VLAN_TYPE);
1da177e4 715
1dc32918
JP		 716 e1000_reset_adaptive(hw);
717 e1000_phy_get_info(hw, &adapter->phy_info);
9a53a202 718
0fccd0e9 719 e1000_release_manageability(adapter);
1da177e4
LT		 720}
721
67b3c27c
AK		 722/**
723 * Dump the eeprom for users having checksum issues
724 **/
b4ea895d 725static void e1000_dump_eeprom(struct e1000_adapter *adapter)
67b3c27c
AK		 726{
727 struct net_device *netdev = adapter->netdev;
728 struct ethtool_eeprom eeprom;
729 const struct ethtool_ops *ops = netdev->ethtool_ops;
730 u8 *data;
731 int i;
732 u16 csum_old, csum_new = 0;
733
734 eeprom.len = ops->get_eeprom_len(netdev);
735 eeprom.offset = 0;
736
737 data = kmalloc(eeprom.len, GFP_KERNEL);
738 if (!data) {
675ad473 739 pr_err("Unable to allocate memory to dump EEPROM data\n");
67b3c27c
AK		 740 return;
741 }
742
743 ops->get_eeprom(netdev, &eeprom, data);
744
745 csum_old = (data[EEPROM_CHECKSUM_REG * 2]) +
746 (data[EEPROM_CHECKSUM_REG * 2 + 1] << 8);
747 for (i = 0; i < EEPROM_CHECKSUM_REG * 2; i += 2)
748 csum_new += data[i] + (data[i + 1] << 8);
749 csum_new = EEPROM_SUM - csum_new;
750
675ad473
ET		 751 pr_err("/*********************/\n");
752 pr_err("Current EEPROM Checksum : 0x%04x\n", csum_old);
753 pr_err("Calculated : 0x%04x\n", csum_new);
67b3c27c 754
675ad473
ET		 755 pr_err("Offset Values\n");
756 pr_err("======== ======\n");
67b3c27c
AK		 757 print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 16, 1, data, 128, 0);
758
675ad473
ET		 759 pr_err("Include this output when contacting your support provider.\n");
760 pr_err("This is not a software error! Something bad happened to\n");
761 pr_err("your hardware or EEPROM image. Ignoring this problem could\n");
762 pr_err("result in further problems, possibly loss of data,\n");
763 pr_err("corruption or system hangs!\n");
764 pr_err("The MAC Address will be reset to 00:00:00:00:00:00,\n");
765 pr_err("which is invalid and requires you to set the proper MAC\n");
766 pr_err("address manually before continuing to enable this network\n");
767 pr_err("device. Please inspect the EEPROM dump and report the\n");
768 pr_err("issue to your hardware vendor or Intel Customer Support.\n");
769 pr_err("/*********************/\n");
67b3c27c
AK		 770
771 kfree(data);
772}
773
81250297
TI		 774/**
775 * e1000_is_need_ioport - determine if an adapter needs ioport resources or not
776 * @pdev: PCI device information struct
777 *
778 * Return true if an adapter needs ioport resources
779 **/
780static int e1000_is_need_ioport(struct pci_dev *pdev)
781{
782 switch (pdev->device) {
783 case E1000_DEV_ID_82540EM:
784 case E1000_DEV_ID_82540EM_LOM:
785 case E1000_DEV_ID_82540EP:
786 case E1000_DEV_ID_82540EP_LOM:
787 case E1000_DEV_ID_82540EP_LP:
788 case E1000_DEV_ID_82541EI:
789 case E1000_DEV_ID_82541EI_MOBILE:
790 case E1000_DEV_ID_82541ER:
791 case E1000_DEV_ID_82541ER_LOM:
792 case E1000_DEV_ID_82541GI:
793 case E1000_DEV_ID_82541GI_LF:
794 case E1000_DEV_ID_82541GI_MOBILE:
795 case E1000_DEV_ID_82544EI_COPPER:
796 case E1000_DEV_ID_82544EI_FIBER:
797 case E1000_DEV_ID_82544GC_COPPER:
798 case E1000_DEV_ID_82544GC_LOM:
799 case E1000_DEV_ID_82545EM_COPPER:
800 case E1000_DEV_ID_82545EM_FIBER:
801 case E1000_DEV_ID_82546EB_COPPER:
802 case E1000_DEV_ID_82546EB_FIBER:
803 case E1000_DEV_ID_82546EB_QUAD_COPPER:
804 return true;
805 default:
806 return false;
807 }
808}
809
c8f44aff
MM		 810static netdev_features_t e1000_fix_features(struct net_device *netdev,
811 netdev_features_t features)
5622e404
JP		 812{
813 /*
814 * Since there is no support for separate rx/tx vlan accel
815 * enable/disable make sure tx flag is always in same state as rx.
816 */
817 if (features & NETIF_F_HW_VLAN_RX)
818 features |= NETIF_F_HW_VLAN_TX;
819 else
820 features &= ~NETIF_F_HW_VLAN_TX;
821
822 return features;
823}
824
c8f44aff
MM		 825static int e1000_set_features(struct net_device *netdev,
826 netdev_features_t features)
e97d3207
MM		 827{
828 struct e1000_adapter *adapter = netdev_priv(netdev);
c8f44aff 829 netdev_features_t changed = features ^ netdev->features;
e97d3207 830
5622e404
JP		 831 if (changed & NETIF_F_HW_VLAN_RX)
832 e1000_vlan_mode(netdev, features);
833
e97d3207
MM		 834 if (!(changed & NETIF_F_RXCSUM))
835 return 0;
836
837 adapter->rx_csum = !!(features & NETIF_F_RXCSUM);
838
839 if (netif_running(netdev))
840 e1000_reinit_locked(adapter);
841 else
842 e1000_reset(adapter);
843
844 return 0;
845}
846
0e7614bc
SH		 847static const struct net_device_ops e1000_netdev_ops = {
848 .ndo_open = e1000_open,
849 .ndo_stop = e1000_close,
00829823 850 .ndo_start_xmit = e1000_xmit_frame,
0e7614bc
SH		 851 .ndo_get_stats = e1000_get_stats,
852 .ndo_set_rx_mode = e1000_set_rx_mode,
853 .ndo_set_mac_address = e1000_set_mac,
5622e404 854 .ndo_tx_timeout = e1000_tx_timeout,
0e7614bc
SH		 855 .ndo_change_mtu = e1000_change_mtu,
856 .ndo_do_ioctl = e1000_ioctl,
857 .ndo_validate_addr = eth_validate_addr,
0e7614bc
SH		 858 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
859 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
860#ifdef CONFIG_NET_POLL_CONTROLLER
861 .ndo_poll_controller = e1000_netpoll,
862#endif
5622e404
JP		 863 .ndo_fix_features = e1000_fix_features,
864 .ndo_set_features = e1000_set_features,
0e7614bc
SH		 865};
866
e508be17
JB		 867/**
868 * e1000_init_hw_struct - initialize members of hw struct
869 * @adapter: board private struct
870 * @hw: structure used by e1000_hw.c
871 *
872 * Factors out initialization of the e1000_hw struct to its own function
873 * that can be called very early at init (just after struct allocation).
874 * Fields are initialized based on PCI device information and
875 * OS network device settings (MTU size).
876 * Returns negative error codes if MAC type setup fails.
877 */
878static int e1000_init_hw_struct(struct e1000_adapter *adapter,
879 struct e1000_hw *hw)
880{
881 struct pci_dev *pdev = adapter->pdev;
882
883 /* PCI config space info */
884 hw->vendor_id = pdev->vendor;
885 hw->device_id = pdev->device;
886 hw->subsystem_vendor_id = pdev->subsystem_vendor;
887 hw->subsystem_id = pdev->subsystem_device;
888 hw->revision_id = pdev->revision;
889
890 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
891
892 hw->max_frame_size = adapter->netdev->mtu +
893 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
894 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
895
896 /* identify the MAC */
897 if (e1000_set_mac_type(hw)) {
898 e_err(probe, "Unknown MAC Type\n");
899 return -EIO;
900 }
901
902 switch (hw->mac_type) {
903 default:
904 break;
905 case e1000_82541:
906 case e1000_82547:
907 case e1000_82541_rev_2:
908 case e1000_82547_rev_2:
909 hw->phy_init_script = 1;
910 break;
911 }
912
913 e1000_set_media_type(hw);
914 e1000_get_bus_info(hw);
915
916 hw->wait_autoneg_complete = false;
917 hw->tbi_compatibility_en = true;
918 hw->adaptive_ifs = true;
919
920 /* Copper options */
921
922 if (hw->media_type == e1000_media_type_copper) {
923 hw->mdix = AUTO_ALL_MODES;
924 hw->disable_polarity_correction = false;
925 hw->master_slave = E1000_MASTER_SLAVE;
926 }
927
928 return 0;
929}
930
1da177e4
LT		 931/**
932 * e1000_probe - Device Initialization Routine
933 * @pdev: PCI device information struct
934 * @ent: entry in e1000_pci_tbl
935 *
936 * Returns 0 on success, negative on failure
937 *
938 * e1000_probe initializes an adapter identified by a pci_dev structure.
939 * The OS initialization, configuring of the adapter private structure,
940 * and a hardware reset occur.
941 **/
1dc32918
JP		 942static int __devinit e1000_probe(struct pci_dev *pdev,
943 const struct pci_device_id *ent)
1da177e4
LT		 944{
945 struct net_device *netdev;
946 struct e1000_adapter *adapter;
1dc32918 947 struct e1000_hw *hw;
2d7edb92 948
1da177e4 949 static int cards_found = 0;
120cd576 950 static int global_quad_port_a = 0; /* global ksp3 port a indication */
2d7edb92 951 int i, err, pci_using_dac;
406874a7 952 u16 eeprom_data = 0;
5377a416 953 u16 tmp = 0;
406874a7 954 u16 eeprom_apme_mask = E1000_EEPROM_APME;
81250297 955 int bars, need_ioport;
0795af57 956
81250297
TI		 957 /* do not allocate ioport bars when not needed */
958 need_ioport = e1000_is_need_ioport(pdev);
959 if (need_ioport) {
960 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
961 err = pci_enable_device(pdev);
962 } else {
963 bars = pci_select_bars(pdev, IORESOURCE_MEM);
4d7155b9 964 err = pci_enable_device_mem(pdev);
81250297 965 }
c7be73bc 966 if (err)
1da177e4
LT		 967 return err;
968
81250297 969 err = pci_request_selected_regions(pdev, bars, e1000_driver_name);
c7be73bc 970 if (err)
6dd62ab0 971 goto err_pci_reg;
1da177e4
LT		 972
973 pci_set_master(pdev);
dbb5aaeb
NN		 974 err = pci_save_state(pdev);
975 if (err)
976 goto err_alloc_etherdev;
1da177e4 977
6dd62ab0 978 err = -ENOMEM;
1da177e4 979 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6dd62ab0 980 if (!netdev)
1da177e4 981 goto err_alloc_etherdev;
1da177e4 982
1da177e4
LT		 983 SET_NETDEV_DEV(netdev, &pdev->dev);
984
985 pci_set_drvdata(pdev, netdev);
60490fe0 986 adapter = netdev_priv(netdev);
1da177e4
LT		 987 adapter->netdev = netdev;
988 adapter->pdev = pdev;
1da177e4 989 adapter->msg_enable = (1 << debug) - 1;
81250297
TI		 990 adapter->bars = bars;
991 adapter->need_ioport = need_ioport;
1da177e4 992
1dc32918
JP		 993 hw = &adapter->hw;
994 hw->back = adapter;
995
6dd62ab0 996 err = -EIO;
275f165f 997 hw->hw_addr = pci_ioremap_bar(pdev, BAR_0);
1dc32918 998 if (!hw->hw_addr)
1da177e4 999 goto err_ioremap;
1da177e4 1000
81250297
TI		 1001 if (adapter->need_ioport) {
1002 for (i = BAR_1; i <= BAR_5; i++) {
1003 if (pci_resource_len(pdev, i) == 0)
1004 continue;
1005 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1006 hw->io_base = pci_resource_start(pdev, i);
1007 break;
1008 }
1da177e4
LT		 1009 }
1010 }
1011
e508be17
JB		 1012 /* make ready for any if (hw->...) below */
1013 err = e1000_init_hw_struct(adapter, hw);
1014 if (err)
1015 goto err_sw_init;
1016
1017 /*
1018 * there is a workaround being applied below that limits
1019 * 64-bit DMA addresses to 64-bit hardware. There are some
1020 * 32-bit adapters that Tx hang when given 64-bit DMA addresses
1021 */
1022 pci_using_dac = 0;
1023 if ((hw->bus_type == e1000_bus_type_pcix) &&
1024 !dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) {
1025 /*
1026 * according to DMA-API-HOWTO, coherent calls will always
1027 * succeed if the set call did
1028 */
1029 dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
1030 pci_using_dac = 1;
e508be17 1031 } else {
19a0b67a
DN		 1032 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
1033 if (err) {
1034 pr_err("No usable DMA config, aborting\n");
1035 goto err_dma;
1036 }
1037 dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
e508be17
JB		 1038 }
1039
0e7614bc 1040 netdev->netdev_ops = &e1000_netdev_ops;
1da177e4 1041 e1000_set_ethtool_ops(netdev);
1da177e4 1042 netdev->watchdog_timeo = 5 * HZ;
bea3348e 1043 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
0e7614bc 1044
0eb5a34c 1045 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1da177e4 1046
1da177e4
LT		 1047 adapter->bd_number = cards_found;
1048
1049 /* setup the private structure */
1050
c7be73bc
JP		 1051 err = e1000_sw_init(adapter);
1052 if (err)
1da177e4
LT		 1053 goto err_sw_init;
1054
6dd62ab0 1055 err = -EIO;
5377a416
DB		 1056 if (hw->mac_type == e1000_ce4100) {
1057 ce4100_gbe_mdio_base_phy = pci_resource_start(pdev, BAR_1);
1058 ce4100_gbe_mdio_base_virt = ioremap(ce4100_gbe_mdio_base_phy,
1059 pci_resource_len(pdev, BAR_1));
1060
1061 if (!ce4100_gbe_mdio_base_virt)
1062 goto err_mdio_ioremap;
1063 }
2d7edb92 1064
1dc32918 1065 if (hw->mac_type >= e1000_82543) {
e97d3207 1066 netdev->hw_features = NETIF_F_SG |
5622e404
JP		 1067 NETIF_F_HW_CSUM |
1068 NETIF_F_HW_VLAN_RX;
e97d3207 1069 netdev->features = NETIF_F_HW_VLAN_TX |
1da177e4
LT		 1070 NETIF_F_HW_VLAN_FILTER;
1071 }
1072
1dc32918
JP		 1073 if ((hw->mac_type >= e1000_82544) &&
1074 (hw->mac_type != e1000_82547))
e97d3207
MM		 1075 netdev->hw_features |= NETIF_F_TSO;
1076
1077 netdev->features |= netdev->hw_features;
1078 netdev->hw_features |= NETIF_F_RXCSUM;
2d7edb92 1079
7b872a55 1080 if (pci_using_dac) {
1da177e4 1081 netdev->features |= NETIF_F_HIGHDMA;
7b872a55
YZ		 1082 netdev->vlan_features |= NETIF_F_HIGHDMA;
1083 }
1da177e4 1084
20501a69 1085 netdev->vlan_features |= NETIF_F_TSO;
20501a69
PM		 1086 netdev->vlan_features |= NETIF_F_HW_CSUM;
1087 netdev->vlan_features |= NETIF_F_SG;
1088
01789349
JP		 1089 netdev->priv_flags |= IFF_UNICAST_FLT;
1090
1dc32918 1091 adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
2d7edb92 1092
cd94dd0b 1093 /* initialize eeprom parameters */
1dc32918 1094 if (e1000_init_eeprom_params(hw)) {
feb8f478 1095 e_err(probe, "EEPROM initialization failed\n");
6dd62ab0 1096 goto err_eeprom;
cd94dd0b
AK		 1097 }
1098
96838a40 1099 /* before reading the EEPROM, reset the controller to
1da177e4 1100 * put the device in a known good starting state */
96838a40 1101
1dc32918 1102 e1000_reset_hw(hw);
1da177e4
LT		 1103
1104 /* make sure the EEPROM is good */
1dc32918 1105 if (e1000_validate_eeprom_checksum(hw) < 0) {
feb8f478 1106 e_err(probe, "The EEPROM Checksum Is Not Valid\n");
67b3c27c
AK		 1107 e1000_dump_eeprom(adapter);
1108 /*
1109 * set MAC address to all zeroes to invalidate and temporary
1110 * disable this device for the user. This blocks regular
1111 * traffic while still permitting ethtool ioctls from reaching
1112 * the hardware as well as allowing the user to run the
1113 * interface after manually setting a hw addr using
1114 * `ip set address`
1115 */
1dc32918 1116 memset(hw->mac_addr, 0, netdev->addr_len);
67b3c27c
AK		 1117 } else {
1118 /* copy the MAC address out of the EEPROM */
1dc32918 1119 if (e1000_read_mac_addr(hw))
feb8f478 1120 e_err(probe, "EEPROM Read Error\n");
1da177e4 1121 }
67b3c27c 1122 /* don't block initalization here due to bad MAC address */
1dc32918
JP		 1123 memcpy(netdev->dev_addr, hw->mac_addr, netdev->addr_len);
1124 memcpy(netdev->perm_addr, hw->mac_addr, netdev->addr_len);
1da177e4 1125
67b3c27c 1126 if (!is_valid_ether_addr(netdev->perm_addr))
feb8f478 1127 e_err(probe, "Invalid MAC Address\n");
1da177e4 1128
1da177e4 1129
a4010afe
JB		 1130 INIT_DELAYED_WORK(&adapter->watchdog_task, e1000_watchdog);
1131 INIT_DELAYED_WORK(&adapter->fifo_stall_task,
1132 e1000_82547_tx_fifo_stall_task);
1133 INIT_DELAYED_WORK(&adapter->phy_info_task, e1000_update_phy_info_task);
65f27f38 1134 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1da177e4 1135
1da177e4
LT		 1136 e1000_check_options(adapter);
1137
1138 /* Initial Wake on LAN setting
1139 * If APM wake is enabled in the EEPROM,
1140 * enable the ACPI Magic Packet filter
1141 */
1142
1dc32918 1143 switch (hw->mac_type) {
1da177e4
LT		 1144 case e1000_82542_rev2_0:
1145 case e1000_82542_rev2_1:
1146 case e1000_82543:
1147 break;
1148 case e1000_82544:
1dc32918 1149 e1000_read_eeprom(hw,
1da177e4
LT		 1150 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
1151 eeprom_apme_mask = E1000_EEPROM_82544_APM;
1152 break;
1153 case e1000_82546:
1154 case e1000_82546_rev_3:
1dc32918
JP		 1155 if (er32(STATUS) & E1000_STATUS_FUNC_1){
1156 e1000_read_eeprom(hw,
1da177e4
LT		 1157 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1158 break;
1159 }
1160 /* Fall Through */
1161 default:
1dc32918 1162 e1000_read_eeprom(hw,
1da177e4
LT		 1163 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1164 break;
1165 }
96838a40 1166 if (eeprom_data & eeprom_apme_mask)
120cd576
JB		 1167 adapter->eeprom_wol |= E1000_WUFC_MAG;
1168
1169 /* now that we have the eeprom settings, apply the special cases
1170 * where the eeprom may be wrong or the board simply won't support
1171 * wake on lan on a particular port */
1172 switch (pdev->device) {
1173 case E1000_DEV_ID_82546GB_PCIE:
1174 adapter->eeprom_wol = 0;
1175 break;
1176 case E1000_DEV_ID_82546EB_FIBER:
1177 case E1000_DEV_ID_82546GB_FIBER:
120cd576
JB		 1178 /* Wake events only supported on port A for dual fiber
1179 * regardless of eeprom setting */
1dc32918 1180 if (er32(STATUS) & E1000_STATUS_FUNC_1)
120cd576
JB		 1181 adapter->eeprom_wol = 0;
1182 break;
1183 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1184 /* if quad port adapter, disable WoL on all but port A */
1185 if (global_quad_port_a != 0)
1186 adapter->eeprom_wol = 0;
1187 else
1188 adapter->quad_port_a = 1;
1189 /* Reset for multiple quad port adapters */
1190 if (++global_quad_port_a == 4)
1191 global_quad_port_a = 0;
1192 break;
1193 }
1194
1195 /* initialize the wol settings based on the eeprom settings */
1196 adapter->wol = adapter->eeprom_wol;
de126489 1197 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1da177e4 1198
5377a416
DB		 1199 /* Auto detect PHY address */
1200 if (hw->mac_type == e1000_ce4100) {
1201 for (i = 0; i < 32; i++) {
1202 hw->phy_addr = i;
1203 e1000_read_phy_reg(hw, PHY_ID2, &tmp);
1204 if (tmp == 0 || tmp == 0xFF) {
1205 if (i == 31)
1206 goto err_eeprom;
1207 continue;
1208 } else
1209 break;
1210 }
1211 }
1212
675ad473
ET		 1213 /* reset the hardware with the new settings */
1214 e1000_reset(adapter);
1215
1216 strcpy(netdev->name, "eth%d");
1217 err = register_netdev(netdev);
1218 if (err)
1219 goto err_register;
1220
5622e404
JP		 1221 e1000_vlan_mode(netdev, netdev->features);
1222
fb3d47d4 1223 /* print bus type/speed/width info */
feb8f478 1224 e_info(probe, "(PCI%s:%dMHz:%d-bit) %pM\n",
7837e58c
JP		 1225 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" : ""),
1226 ((hw->bus_speed == e1000_bus_speed_133) ? 133 :
1227 (hw->bus_speed == e1000_bus_speed_120) ? 120 :
1228 (hw->bus_speed == e1000_bus_speed_100) ? 100 :
1229 (hw->bus_speed == e1000_bus_speed_66) ? 66 : 33),
1230 ((hw->bus_width == e1000_bus_width_64) ? 64 : 32),
1231 netdev->dev_addr);
1314bbf3 1232
eb62efd2
JB		 1233 /* carrier off reporting is important to ethtool even BEFORE open */
1234 netif_carrier_off(netdev);
1235
feb8f478 1236 e_info(probe, "Intel(R) PRO/1000 Network Connection\n");
1da177e4
LT		 1237
1238 cards_found++;
1239 return 0;
1240
1241err_register:
6dd62ab0 1242err_eeprom:
1532ecea 1243 e1000_phy_hw_reset(hw);
6dd62ab0 1244
1dc32918
JP		 1245 if (hw->flash_address)
1246 iounmap(hw->flash_address);
6dd62ab0
VA		 1247 kfree(adapter->tx_ring);
1248 kfree(adapter->rx_ring);
e508be17 1249err_dma:
1da177e4 1250err_sw_init:
5377a416
DB		 1251err_mdio_ioremap:
1252 iounmap(ce4100_gbe_mdio_base_virt);
1dc32918 1253 iounmap(hw->hw_addr);
1da177e4
LT		 1254err_ioremap:
1255 free_netdev(netdev);
1256err_alloc_etherdev:
81250297 1257 pci_release_selected_regions(pdev, bars);
6dd62ab0 1258err_pci_reg:
6dd62ab0 1259 pci_disable_device(pdev);
1da177e4
LT		 1260 return err;
1261}
1262
1263/**
1264 * e1000_remove - Device Removal Routine
1265 * @pdev: PCI device information struct
1266 *
1267 * e1000_remove is called by the PCI subsystem to alert the driver
1268 * that it should release a PCI device. The could be caused by a
1269 * Hot-Plug event, or because the driver is going to be removed from
1270 * memory.
1271 **/
1272
64798845 1273static void __devexit e1000_remove(struct pci_dev *pdev)
1da177e4
LT		 1274{
1275 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 1276 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1277 struct e1000_hw *hw = &adapter->hw;
1da177e4 1278
a4010afe 1279 e1000_down_and_stop(adapter);
0fccd0e9 1280 e1000_release_manageability(adapter);
1da177e4 1281
bea3348e
SH		 1282 unregister_netdev(netdev);
1283
1532ecea 1284 e1000_phy_hw_reset(hw);
1da177e4 1285
24025e4e
MC		 1286 kfree(adapter->tx_ring);
1287 kfree(adapter->rx_ring);
24025e4e 1288
1dc32918
JP		 1289 iounmap(hw->hw_addr);
1290 if (hw->flash_address)
1291 iounmap(hw->flash_address);
81250297 1292 pci_release_selected_regions(pdev, adapter->bars);
1da177e4
LT		 1293
1294 free_netdev(netdev);
1295
1296 pci_disable_device(pdev);
1297}
1298
1299/**
1300 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1301 * @adapter: board private structure to initialize
1302 *
1303 * e1000_sw_init initializes the Adapter private data structure.
e508be17 1304 * e1000_init_hw_struct MUST be called before this function
1da177e4
LT		 1305 **/
1306
64798845 1307static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
1da177e4 1308{
eb0f8054 1309 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1da177e4 1310
f56799ea
JK		 1311 adapter->num_tx_queues = 1;
1312 adapter->num_rx_queues = 1;
581d708e
MC		 1313
1314 if (e1000_alloc_queues(adapter)) {
feb8f478 1315 e_err(probe, "Unable to allocate memory for queues\n");
581d708e
MC		 1316 return -ENOMEM;
1317 }
1318
47313054 1319 /* Explicitly disable IRQ since the NIC can be in any state. */
47313054
HX		 1320 e1000_irq_disable(adapter);
1321
1da177e4 1322 spin_lock_init(&adapter->stats_lock);
0ef4eedc 1323 mutex_init(&adapter->mutex);
1da177e4 1324
1314bbf3
AK		 1325 set_bit(__E1000_DOWN, &adapter->flags);
1326
1da177e4
LT		 1327 return 0;
1328}
1329
581d708e
MC		 1330/**
1331 * e1000_alloc_queues - Allocate memory for all rings
1332 * @adapter: board private structure to initialize
1333 *
1334 * We allocate one ring per queue at run-time since we don't know the
3e1d7cd2 1335 * number of queues at compile-time.
581d708e
MC		 1336 **/
1337
64798845 1338static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
581d708e 1339{
1c7e5b12
YB		 1340 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1341 sizeof(struct e1000_tx_ring), GFP_KERNEL);
581d708e
MC		 1342 if (!adapter->tx_ring)
1343 return -ENOMEM;
581d708e 1344
1c7e5b12
YB		 1345 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1346 sizeof(struct e1000_rx_ring), GFP_KERNEL);
581d708e
MC		 1347 if (!adapter->rx_ring) {
1348 kfree(adapter->tx_ring);
1349 return -ENOMEM;
1350 }
581d708e 1351
581d708e
MC		 1352 return E1000_SUCCESS;
1353}
1354
1da177e4
LT		 1355/**
1356 * e1000_open - Called when a network interface is made active
1357 * @netdev: network interface device structure
1358 *
1359 * Returns 0 on success, negative value on failure
1360 *
1361 * The open entry point is called when a network interface is made
1362 * active by the system (IFF_UP). At this point all resources needed
1363 * for transmit and receive operations are allocated, the interrupt
a4010afe 1364 * handler is registered with the OS, the watchdog task is started,
1da177e4
LT		 1365 * and the stack is notified that the interface is ready.
1366 **/
1367
64798845 1368static int e1000_open(struct net_device *netdev)
1da177e4 1369{
60490fe0 1370 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1371 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1372 int err;
1373
2db10a08 1374 /* disallow open during test */
1314bbf3 1375 if (test_bit(__E1000_TESTING, &adapter->flags))
2db10a08
AK		 1376 return -EBUSY;
1377
eb62efd2
JB		 1378 netif_carrier_off(netdev);
1379
1da177e4 1380 /* allocate transmit descriptors */
e0aac5a2
AK		 1381 err = e1000_setup_all_tx_resources(adapter);
1382 if (err)
1da177e4
LT		 1383 goto err_setup_tx;
1384
1385 /* allocate receive descriptors */
e0aac5a2 1386 err = e1000_setup_all_rx_resources(adapter);
b5bf28cd 1387 if (err)
e0aac5a2 1388 goto err_setup_rx;
b5bf28cd 1389
79f05bf0
AK		 1390 e1000_power_up_phy(adapter);
1391
2d7edb92 1392 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1dc32918 1393 if ((hw->mng_cookie.status &
2d7edb92
MC		 1394 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1395 e1000_update_mng_vlan(adapter);
1396 }
1da177e4 1397
e0aac5a2
AK		 1398 /* before we allocate an interrupt, we must be ready to handle it.
1399 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1400 * as soon as we call pci_request_irq, so we have to setup our
1401 * clean_rx handler before we do so. */
1402 e1000_configure(adapter);
1403
1404 err = e1000_request_irq(adapter);
1405 if (err)
1406 goto err_req_irq;
1407
1408 /* From here on the code is the same as e1000_up() */
1409 clear_bit(__E1000_DOWN, &adapter->flags);
1410
bea3348e 1411 napi_enable(&adapter->napi);
47313054 1412
e0aac5a2
AK		 1413 e1000_irq_enable(adapter);
1414
076152d5
BH		 1415 netif_start_queue(netdev);
1416
e0aac5a2 1417 /* fire a link status change interrupt to start the watchdog */
1dc32918 1418 ew32(ICS, E1000_ICS_LSC);
e0aac5a2 1419
1da177e4
LT		 1420 return E1000_SUCCESS;
1421
b5bf28cd 1422err_req_irq:
e0aac5a2 1423 e1000_power_down_phy(adapter);
581d708e 1424 e1000_free_all_rx_resources(adapter);
1da177e4 1425err_setup_rx:
581d708e 1426 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1427err_setup_tx:
1428 e1000_reset(adapter);
1429
1430 return err;
1431}
1432
1433/**
1434 * e1000_close - Disables a network interface
1435 * @netdev: network interface device structure
1436 *
1437 * Returns 0, this is not allowed to fail
1438 *
1439 * The close entry point is called when an interface is de-activated
1440 * by the OS. The hardware is still under the drivers control, but
1441 * needs to be disabled. A global MAC reset is issued to stop the
1442 * hardware, and all transmit and receive resources are freed.
1443 **/
1444
64798845 1445static int e1000_close(struct net_device *netdev)
1da177e4 1446{
60490fe0 1447 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1448 struct e1000_hw *hw = &adapter->hw;
1da177e4 1449
2db10a08 1450 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 1451 e1000_down(adapter);
79f05bf0 1452 e1000_power_down_phy(adapter);
2db10a08 1453 e1000_free_irq(adapter);
1da177e4 1454
581d708e
MC		 1455 e1000_free_all_tx_resources(adapter);
1456 e1000_free_all_rx_resources(adapter);
1da177e4 1457
4666560a
BA		 1458 /* kill manageability vlan ID if supported, but not if a vlan with
1459 * the same ID is registered on the host OS (let 8021q kill it) */
1dc32918 1460 if ((hw->mng_cookie.status &
4666560a 1461 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
5622e404 1462 !test_bit(adapter->mng_vlan_id, adapter->active_vlans)) {
2d7edb92
MC		 1463 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1464 }
b55ccb35 1465
1da177e4
LT		 1466 return 0;
1467}
1468
1469/**
1470 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1471 * @adapter: address of board private structure
2d7edb92
MC		 1472 * @start: address of beginning of memory
1473 * @len: length of memory
1da177e4 1474 **/
64798845
JP		 1475static bool e1000_check_64k_bound(struct e1000_adapter *adapter, void *start,
1476 unsigned long len)
1da177e4 1477{
1dc32918 1478 struct e1000_hw *hw = &adapter->hw;
e982f17c 1479 unsigned long begin = (unsigned long)start;
1da177e4
LT		 1480 unsigned long end = begin + len;
1481
2648345f
MC		 1482 /* First rev 82545 and 82546 need to not allow any memory
1483 * write location to cross 64k boundary due to errata 23 */
1dc32918 1484 if (hw->mac_type == e1000_82545 ||
5377a416 1485 hw->mac_type == e1000_ce4100 ||
1dc32918 1486 hw->mac_type == e1000_82546) {
c3033b01 1487 return ((begin ^ (end - 1)) >> 16) != 0 ? false : true;
1da177e4
LT		 1488 }
1489
c3033b01 1490 return true;
1da177e4
LT		 1491}
1492
1493/**
1494 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1495 * @adapter: board private structure
581d708e 1496 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1497 *
1498 * Return 0 on success, negative on failure
1499 **/
1500
64798845
JP		 1501static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
1502 struct e1000_tx_ring *txdr)
1da177e4 1503{
1da177e4
LT		 1504 struct pci_dev *pdev = adapter->pdev;
1505 int size;
1506
1507 size = sizeof(struct e1000_buffer) * txdr->count;
89bf67f1 1508 txdr->buffer_info = vzalloc(size);
96838a40 1509 if (!txdr->buffer_info) {
feb8f478
ET		 1510 e_err(probe, "Unable to allocate memory for the Tx descriptor "
1511 "ring\n");
1da177e4
LT		 1512 return -ENOMEM;
1513 }
1da177e4
LT		 1514
1515 /* round up to nearest 4K */
1516
1517 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
9099cfb9 1518 txdr->size = ALIGN(txdr->size, 4096);
1da177e4 1519
b16f53be
NN		 1520 txdr->desc = dma_alloc_coherent(&pdev->dev, txdr->size, &txdr->dma,
1521 GFP_KERNEL);
96838a40 1522 if (!txdr->desc) {
1da177e4 1523setup_tx_desc_die:
1da177e4 1524 vfree(txdr->buffer_info);
feb8f478
ET		 1525 e_err(probe, "Unable to allocate memory for the Tx descriptor "
1526 "ring\n");
1da177e4
LT		 1527 return -ENOMEM;
1528 }
1529
2648345f 1530 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1531 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1532 void *olddesc = txdr->desc;
1533 dma_addr_t olddma = txdr->dma;
feb8f478 1534 e_err(tx_err, "txdr align check failed: %u bytes at %p\n",
675ad473 1535 txdr->size, txdr->desc);
2648345f 1536 /* Try again, without freeing the previous */
b16f53be
NN		 1537 txdr->desc = dma_alloc_coherent(&pdev->dev, txdr->size,
1538 &txdr->dma, GFP_KERNEL);
2648345f 1539 /* Failed allocation, critical failure */
96838a40 1540 if (!txdr->desc) {
b16f53be
NN		 1541 dma_free_coherent(&pdev->dev, txdr->size, olddesc,
1542 olddma);
1da177e4
LT		 1543 goto setup_tx_desc_die;
1544 }
1545
1546 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1547 /* give up */
b16f53be
NN		 1548 dma_free_coherent(&pdev->dev, txdr->size, txdr->desc,
1549 txdr->dma);
1550 dma_free_coherent(&pdev->dev, txdr->size, olddesc,
1551 olddma);
feb8f478 1552 e_err(probe, "Unable to allocate aligned memory "
675ad473 1553 "for the transmit descriptor ring\n");
1da177e4
LT		 1554 vfree(txdr->buffer_info);
1555 return -ENOMEM;
1556 } else {
2648345f 1557 /* Free old allocation, new allocation was successful */
b16f53be
NN		 1558 dma_free_coherent(&pdev->dev, txdr->size, olddesc,
1559 olddma);
1da177e4
LT		 1560 }
1561 }
1562 memset(txdr->desc, 0, txdr->size);
1563
1564 txdr->next_to_use = 0;
1565 txdr->next_to_clean = 0;
1566
1567 return 0;
1568}
1569
581d708e
MC		 1570/**
1571 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1572 * (Descriptors) for all queues
1573 * @adapter: board private structure
1574 *
581d708e
MC		 1575 * Return 0 on success, negative on failure
1576 **/
1577
64798845 1578int e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1579{
1580 int i, err = 0;
1581
f56799ea 1582 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1583 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1584 if (err) {
feb8f478 1585 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
3fbbc72e
VA		 1586 for (i-- ; i >= 0; i--)
1587 e1000_free_tx_resources(adapter,
1588 &adapter->tx_ring[i]);
581d708e
MC		 1589 break;
1590 }
1591 }
1592
1593 return err;
1594}
1595
1da177e4
LT		 1596/**
1597 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1598 * @adapter: board private structure
1599 *
1600 * Configure the Tx unit of the MAC after a reset.
1601 **/
1602
64798845 1603static void e1000_configure_tx(struct e1000_adapter *adapter)
1da177e4 1604{
406874a7 1605 u64 tdba;
581d708e 1606 struct e1000_hw *hw = &adapter->hw;
1532ecea 1607 u32 tdlen, tctl, tipg;
406874a7 1608 u32 ipgr1, ipgr2;
1da177e4
LT		 1609
1610 /* Setup the HW Tx Head and Tail descriptor pointers */
1611
f56799ea 1612 switch (adapter->num_tx_queues) {
24025e4e
MC		 1613 case 1:
1614 default:
581d708e
MC		 1615 tdba = adapter->tx_ring[0].dma;
1616 tdlen = adapter->tx_ring[0].count *
1617 sizeof(struct e1000_tx_desc);
1dc32918
JP		 1618 ew32(TDLEN, tdlen);
1619 ew32(TDBAH, (tdba >> 32));
1620 ew32(TDBAL, (tdba & 0x00000000ffffffffULL));
1621 ew32(TDT, 0);
1622 ew32(TDH, 0);
6a951698
AK		 1623 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1624 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
24025e4e
MC		 1625 break;
1626 }
1da177e4
LT		 1627
1628 /* Set the default values for the Tx Inter Packet Gap timer */
1532ecea 1629 if ((hw->media_type == e1000_media_type_fiber ||
d89b6c67 1630 hw->media_type == e1000_media_type_internal_serdes))
0fadb059
JK		 1631 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1632 else
1633 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1634
581d708e 1635 switch (hw->mac_type) {
1da177e4
LT		 1636 case e1000_82542_rev2_0:
1637 case e1000_82542_rev2_1:
1638 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1639 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1640 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4
LT		 1641 break;
1642 default:
0fadb059
JK		 1643 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1644 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1645 break;
1da177e4 1646 }
0fadb059
JK		 1647 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1648 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1dc32918 1649 ew32(TIPG, tipg);
1da177e4
LT		 1650
1651 /* Set the Tx Interrupt Delay register */
1652
1dc32918 1653 ew32(TIDV, adapter->tx_int_delay);
581d708e 1654 if (hw->mac_type >= e1000_82540)
1dc32918 1655 ew32(TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1656
1657 /* Program the Transmit Control Register */
1658
1dc32918 1659 tctl = er32(TCTL);
1da177e4 1660 tctl &= ~E1000_TCTL_CT;
7e6c9861 1661 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1662 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1663
581d708e 1664 e1000_config_collision_dist(hw);
1da177e4
LT		 1665
1666 /* Setup Transmit Descriptor Settings for eop descriptor */
6a042dab
JB		 1667 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1668
1669 /* only set IDE if we are delaying interrupts using the timers */
1670 if (adapter->tx_int_delay)
1671 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1da177e4 1672
581d708e 1673 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1674 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1675 else
1676 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1677
1678 /* Cache if we're 82544 running in PCI-X because we'll
1679 * need this to apply a workaround later in the send path. */
581d708e
MC		 1680 if (hw->mac_type == e1000_82544 &&
1681 hw->bus_type == e1000_bus_type_pcix)
1da177e4 1682 adapter->pcix_82544 = 1;
7e6c9861 1683
1dc32918 1684 ew32(TCTL, tctl);
7e6c9861 1685
1da177e4
LT		 1686}
1687
1688/**
1689 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1690 * @adapter: board private structure
581d708e 1691 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1692 *
1693 * Returns 0 on success, negative on failure
1694 **/
1695
64798845
JP		 1696static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
1697 struct e1000_rx_ring *rxdr)
1da177e4 1698{
1da177e4 1699 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1700 int size, desc_len;
1da177e4
LT		 1701
1702 size = sizeof(struct e1000_buffer) * rxdr->count;
89bf67f1 1703 rxdr->buffer_info = vzalloc(size);
581d708e 1704 if (!rxdr->buffer_info) {
feb8f478
ET		 1705 e_err(probe, "Unable to allocate memory for the Rx descriptor "
1706 "ring\n");
1da177e4
LT		 1707 return -ENOMEM;
1708 }
1da177e4 1709
1532ecea 1710 desc_len = sizeof(struct e1000_rx_desc);
2d7edb92 1711
1da177e4
LT		 1712 /* Round up to nearest 4K */
1713
2d7edb92 1714 rxdr->size = rxdr->count * desc_len;
9099cfb9 1715 rxdr->size = ALIGN(rxdr->size, 4096);
1da177e4 1716
b16f53be
NN		 1717 rxdr->desc = dma_alloc_coherent(&pdev->dev, rxdr->size, &rxdr->dma,
1718 GFP_KERNEL);
1da177e4 1719
581d708e 1720 if (!rxdr->desc) {
feb8f478
ET		 1721 e_err(probe, "Unable to allocate memory for the Rx descriptor "
1722 "ring\n");
1da177e4 1723setup_rx_desc_die:
1da177e4
LT		 1724 vfree(rxdr->buffer_info);
1725 return -ENOMEM;
1726 }
1727
2648345f 1728 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1729 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1730 void *olddesc = rxdr->desc;
1731 dma_addr_t olddma = rxdr->dma;
feb8f478 1732 e_err(rx_err, "rxdr align check failed: %u bytes at %p\n",
675ad473 1733 rxdr->size, rxdr->desc);
2648345f 1734 /* Try again, without freeing the previous */
b16f53be
NN		 1735 rxdr->desc = dma_alloc_coherent(&pdev->dev, rxdr->size,
1736 &rxdr->dma, GFP_KERNEL);
2648345f 1737 /* Failed allocation, critical failure */
581d708e 1738 if (!rxdr->desc) {
b16f53be
NN		 1739 dma_free_coherent(&pdev->dev, rxdr->size, olddesc,
1740 olddma);
feb8f478
ET		 1741 e_err(probe, "Unable to allocate memory for the Rx "
1742 "descriptor ring\n");
1da177e4
LT		 1743 goto setup_rx_desc_die;
1744 }
1745
1746 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1747 /* give up */
b16f53be
NN		 1748 dma_free_coherent(&pdev->dev, rxdr->size, rxdr->desc,
1749 rxdr->dma);
1750 dma_free_coherent(&pdev->dev, rxdr->size, olddesc,
1751 olddma);
feb8f478
ET		 1752 e_err(probe, "Unable to allocate aligned memory for "
1753 "the Rx descriptor ring\n");
581d708e 1754 goto setup_rx_desc_die;
1da177e4 1755 } else {
2648345f 1756 /* Free old allocation, new allocation was successful */
b16f53be
NN		 1757 dma_free_coherent(&pdev->dev, rxdr->size, olddesc,
1758 olddma);
1da177e4
LT		 1759 }
1760 }
1761 memset(rxdr->desc, 0, rxdr->size);
1762
1763 rxdr->next_to_clean = 0;
1764 rxdr->next_to_use = 0;
edbbb3ca 1765 rxdr->rx_skb_top = NULL;
1da177e4
LT		 1766
1767 return 0;
1768}
1769
581d708e
MC		 1770/**
1771 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1772 * (Descriptors) for all queues
1773 * @adapter: board private structure
1774 *
581d708e
MC		 1775 * Return 0 on success, negative on failure
1776 **/
1777
64798845 1778int e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1779{
1780 int i, err = 0;
1781
f56799ea 1782 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1783 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1784 if (err) {
feb8f478 1785 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
3fbbc72e
VA		 1786 for (i-- ; i >= 0; i--)
1787 e1000_free_rx_resources(adapter,
1788 &adapter->rx_ring[i]);
581d708e
MC		 1789 break;
1790 }
1791 }
1792
1793 return err;
1794}
1795
1da177e4 1796/**
2648345f 1797 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1798 * @adapter: Board private structure
1799 **/
64798845 1800static void e1000_setup_rctl(struct e1000_adapter *adapter)
1da177e4 1801{
1dc32918 1802 struct e1000_hw *hw = &adapter->hw;
630b25cd 1803 u32 rctl;
1da177e4 1804
1dc32918 1805 rctl = er32(RCTL);
1da177e4
LT		 1806
1807 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1808
d5bc77a2
DN		 1809 rctl |= E1000_RCTL_BAM | E1000_RCTL_LBM_NO |
1810 E1000_RCTL_RDMTS_HALF |
1dc32918 1811 (hw->mc_filter_type << E1000_RCTL_MO_SHIFT);
1da177e4 1812
1dc32918 1813 if (hw->tbi_compatibility_on == 1)
1da177e4
LT		 1814 rctl |= E1000_RCTL_SBP;
1815 else
1816 rctl &= ~E1000_RCTL_SBP;
1817
2d7edb92
MC		 1818 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1819 rctl &= ~E1000_RCTL_LPE;
1820 else
1821 rctl |= E1000_RCTL_LPE;
1822
1da177e4 1823 /* Setup buffer sizes */
9e2feace
AK		 1824 rctl &= ~E1000_RCTL_SZ_4096;
1825 rctl |= E1000_RCTL_BSEX;
1826 switch (adapter->rx_buffer_len) {
a1415ee6
JK		 1827 case E1000_RXBUFFER_2048:
1828 default:
1829 rctl |= E1000_RCTL_SZ_2048;
1830 rctl &= ~E1000_RCTL_BSEX;
1831 break;
1832 case E1000_RXBUFFER_4096:
1833 rctl |= E1000_RCTL_SZ_4096;
1834 break;
1835 case E1000_RXBUFFER_8192:
1836 rctl |= E1000_RCTL_SZ_8192;
1837 break;
1838 case E1000_RXBUFFER_16384:
1839 rctl |= E1000_RCTL_SZ_16384;
1840 break;
2d7edb92
MC		 1841 }
1842
1dc32918 1843 ew32(RCTL, rctl);
1da177e4
LT		 1844}
1845
1846/**
1847 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1848 * @adapter: board private structure
1849 *
1850 * Configure the Rx unit of the MAC after a reset.
1851 **/
1852
64798845 1853static void e1000_configure_rx(struct e1000_adapter *adapter)
1da177e4 1854{
406874a7 1855 u64 rdba;
581d708e 1856 struct e1000_hw *hw = &adapter->hw;
1532ecea 1857 u32 rdlen, rctl, rxcsum;
2d7edb92 1858
edbbb3ca
JB		 1859 if (adapter->netdev->mtu > ETH_DATA_LEN) {
1860 rdlen = adapter->rx_ring[0].count *
1861 sizeof(struct e1000_rx_desc);
1862 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
1863 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
1864 } else {
1865 rdlen = adapter->rx_ring[0].count *
1866 sizeof(struct e1000_rx_desc);
1867 adapter->clean_rx = e1000_clean_rx_irq;
1868 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1869 }
1da177e4
LT		 1870
1871 /* disable receives while setting up the descriptors */
1dc32918
JP		 1872 rctl = er32(RCTL);
1873 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1874
1875 /* set the Receive Delay Timer Register */
1dc32918 1876 ew32(RDTR, adapter->rx_int_delay);
1da177e4 1877
581d708e 1878 if (hw->mac_type >= e1000_82540) {
1dc32918 1879 ew32(RADV, adapter->rx_abs_int_delay);
835bb129 1880 if (adapter->itr_setting != 0)
1dc32918 1881 ew32(ITR, 1000000000 / (adapter->itr * 256));
1da177e4
LT		 1882 }
1883
581d708e
MC		 1884 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1885 * the Base and Length of the Rx Descriptor Ring */
f56799ea 1886 switch (adapter->num_rx_queues) {
24025e4e
MC		 1887 case 1:
1888 default:
581d708e 1889 rdba = adapter->rx_ring[0].dma;
1dc32918
JP		 1890 ew32(RDLEN, rdlen);
1891 ew32(RDBAH, (rdba >> 32));
1892 ew32(RDBAL, (rdba & 0x00000000ffffffffULL));
1893 ew32(RDT, 0);
1894 ew32(RDH, 0);
6a951698
AK		 1895 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
1896 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
581d708e 1897 break;
24025e4e
MC		 1898 }
1899
1da177e4 1900 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e 1901 if (hw->mac_type >= e1000_82543) {
1dc32918 1902 rxcsum = er32(RXCSUM);
630b25cd 1903 if (adapter->rx_csum)
2d7edb92 1904 rxcsum |= E1000_RXCSUM_TUOFL;
630b25cd 1905 else
2d7edb92 1906 /* don't need to clear IPPCSE as it defaults to 0 */
630b25cd 1907 rxcsum &= ~E1000_RXCSUM_TUOFL;
1dc32918 1908 ew32(RXCSUM, rxcsum);
1da177e4
LT		 1909 }
1910
1911 /* Enable Receives */
d5bc77a2 1912 ew32(RCTL, rctl | E1000_RCTL_EN);
1da177e4
LT		 1913}
1914
1915/**
581d708e 1916 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 1917 * @adapter: board private structure
581d708e 1918 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 1919 *
1920 * Free all transmit software resources
1921 **/
1922
64798845
JP		 1923static void e1000_free_tx_resources(struct e1000_adapter *adapter,
1924 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 1925{
1926 struct pci_dev *pdev = adapter->pdev;
1927
581d708e 1928 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 1929
581d708e
MC		 1930 vfree(tx_ring->buffer_info);
1931 tx_ring->buffer_info = NULL;
1da177e4 1932
b16f53be
NN		 1933 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
1934 tx_ring->dma);
1da177e4 1935
581d708e
MC		 1936 tx_ring->desc = NULL;
1937}
1938
1939/**
1940 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1941 * @adapter: board private structure
1942 *
1943 * Free all transmit software resources
1944 **/
1945
64798845 1946void e1000_free_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1947{
1948 int i;
1949
f56799ea 1950 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1951 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1952}
1953
64798845
JP		 1954static void e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1955 struct e1000_buffer *buffer_info)
1da177e4 1956{
602c0554
AD		 1957 if (buffer_info->dma) {
1958 if (buffer_info->mapped_as_page)
b16f53be
NN		 1959 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
1960 buffer_info->length, DMA_TO_DEVICE);
602c0554 1961 else
b16f53be 1962 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
602c0554 1963 buffer_info->length,
b16f53be 1964 DMA_TO_DEVICE);
602c0554
AD		 1965 buffer_info->dma = 0;
1966 }
a9ebadd6 1967 if (buffer_info->skb) {
1da177e4 1968 dev_kfree_skb_any(buffer_info->skb);
a9ebadd6
JB		 1969 buffer_info->skb = NULL;
1970 }
37e73df8 1971 buffer_info->time_stamp = 0;
a9ebadd6 1972 /* buffer_info must be completely set up in the transmit path */
1da177e4
LT		 1973}
1974
1975/**
1976 * e1000_clean_tx_ring - Free Tx Buffers
1977 * @adapter: board private structure
581d708e 1978 * @tx_ring: ring to be cleaned
1da177e4
LT		 1979 **/
1980
64798845
JP		 1981static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
1982 struct e1000_tx_ring *tx_ring)
1da177e4 1983{
1dc32918 1984 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1985 struct e1000_buffer *buffer_info;
1986 unsigned long size;
1987 unsigned int i;
1988
1989 /* Free all the Tx ring sk_buffs */
1990
96838a40 1991 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 1992 buffer_info = &tx_ring->buffer_info[i];
1993 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
1994 }
1995
1996 size = sizeof(struct e1000_buffer) * tx_ring->count;
1997 memset(tx_ring->buffer_info, 0, size);
1998
1999 /* Zero out the descriptor ring */
2000
2001 memset(tx_ring->desc, 0, tx_ring->size);
2002
2003 tx_ring->next_to_use = 0;
2004 tx_ring->next_to_clean = 0;
fd803241 2005 tx_ring->last_tx_tso = 0;
1da177e4 2006
1dc32918
JP		 2007 writel(0, hw->hw_addr + tx_ring->tdh);
2008 writel(0, hw->hw_addr + tx_ring->tdt);
581d708e
MC		 2009}
2010
2011/**
2012 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2013 * @adapter: board private structure
2014 **/
2015
64798845 2016static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
581d708e
MC		 2017{
2018 int i;
2019
f56799ea 2020 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2021 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2022}
2023
2024/**
2025 * e1000_free_rx_resources - Free Rx Resources
2026 * @adapter: board private structure
581d708e 2027 * @rx_ring: ring to clean the resources from
1da177e4
LT		 2028 *
2029 * Free all receive software resources
2030 **/
2031
64798845
JP		 2032static void e1000_free_rx_resources(struct e1000_adapter *adapter,
2033 struct e1000_rx_ring *rx_ring)
1da177e4 2034{
1da177e4
LT		 2035 struct pci_dev *pdev = adapter->pdev;
2036
581d708e 2037 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 2038
2039 vfree(rx_ring->buffer_info);
2040 rx_ring->buffer_info = NULL;
2041
b16f53be
NN		 2042 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2043 rx_ring->dma);
1da177e4
LT		 2044
2045 rx_ring->desc = NULL;
2046}
2047
2048/**
581d708e 2049 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 2050 * @adapter: board private structure
581d708e
MC		 2051 *
2052 * Free all receive software resources
2053 **/
2054
64798845 2055void e1000_free_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 2056{
2057 int i;
2058
f56799ea 2059 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 2060 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2061}
2062
2063/**
2064 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2065 * @adapter: board private structure
2066 * @rx_ring: ring to free buffers from
1da177e4
LT		 2067 **/
2068
64798845
JP		 2069static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
2070 struct e1000_rx_ring *rx_ring)
1da177e4 2071{
1dc32918 2072 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2073 struct e1000_buffer *buffer_info;
2074 struct pci_dev *pdev = adapter->pdev;
2075 unsigned long size;
630b25cd 2076 unsigned int i;
1da177e4
LT		 2077
2078 /* Free all the Rx ring sk_buffs */
96838a40 2079 for (i = 0; i < rx_ring->count; i++) {
1da177e4 2080 buffer_info = &rx_ring->buffer_info[i];
edbbb3ca
JB		 2081 if (buffer_info->dma &&
2082 adapter->clean_rx == e1000_clean_rx_irq) {
b16f53be 2083 dma_unmap_single(&pdev->dev, buffer_info->dma,
edbbb3ca 2084 buffer_info->length,
b16f53be 2085 DMA_FROM_DEVICE);
edbbb3ca
JB		 2086 } else if (buffer_info->dma &&
2087 adapter->clean_rx == e1000_clean_jumbo_rx_irq) {
b16f53be
NN		 2088 dma_unmap_page(&pdev->dev, buffer_info->dma,
2089 buffer_info->length,
2090 DMA_FROM_DEVICE);
679be3ba 2091 }
1da177e4 2092
679be3ba 2093 buffer_info->dma = 0;
edbbb3ca
JB		 2094 if (buffer_info->page) {
2095 put_page(buffer_info->page);
2096 buffer_info->page = NULL;
2097 }
679be3ba 2098 if (buffer_info->skb) {
1da177e4
LT		 2099 dev_kfree_skb(buffer_info->skb);
2100 buffer_info->skb = NULL;
997f5cbd 2101 }
1da177e4
LT		 2102 }
2103
edbbb3ca
JB		 2104 /* there also may be some cached data from a chained receive */
2105 if (rx_ring->rx_skb_top) {
2106 dev_kfree_skb(rx_ring->rx_skb_top);
2107 rx_ring->rx_skb_top = NULL;
2108 }
2109
1da177e4
LT		 2110 size = sizeof(struct e1000_buffer) * rx_ring->count;
2111 memset(rx_ring->buffer_info, 0, size);
2112
2113 /* Zero out the descriptor ring */
1da177e4
LT		 2114 memset(rx_ring->desc, 0, rx_ring->size);
2115
2116 rx_ring->next_to_clean = 0;
2117 rx_ring->next_to_use = 0;
2118
1dc32918
JP		 2119 writel(0, hw->hw_addr + rx_ring->rdh);
2120 writel(0, hw->hw_addr + rx_ring->rdt);
581d708e
MC		 2121}
2122
2123/**
2124 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2125 * @adapter: board private structure
2126 **/
2127
64798845 2128static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
581d708e
MC		 2129{
2130 int i;
2131
f56799ea 2132 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2133 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2134}
2135
2136/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2137 * and memory write and invalidate disabled for certain operations
2138 */
64798845 2139static void e1000_enter_82542_rst(struct e1000_adapter *adapter)
1da177e4 2140{
1dc32918 2141 struct e1000_hw *hw = &adapter->hw;
1da177e4 2142 struct net_device *netdev = adapter->netdev;
406874a7 2143 u32 rctl;
1da177e4 2144
1dc32918 2145 e1000_pci_clear_mwi(hw);
1da177e4 2146
1dc32918 2147 rctl = er32(RCTL);
1da177e4 2148 rctl |= E1000_RCTL_RST;
1dc32918
JP		 2149 ew32(RCTL, rctl);
2150 E1000_WRITE_FLUSH();
1da177e4
LT		 2151 mdelay(5);
2152
96838a40 2153 if (netif_running(netdev))
581d708e 2154 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2155}
2156
64798845 2157static void e1000_leave_82542_rst(struct e1000_adapter *adapter)
1da177e4 2158{
1dc32918 2159 struct e1000_hw *hw = &adapter->hw;
1da177e4 2160 struct net_device *netdev = adapter->netdev;
406874a7 2161 u32 rctl;
1da177e4 2162
1dc32918 2163 rctl = er32(RCTL);
1da177e4 2164 rctl &= ~E1000_RCTL_RST;
1dc32918
JP		 2165 ew32(RCTL, rctl);
2166 E1000_WRITE_FLUSH();
1da177e4
LT		 2167 mdelay(5);
2168
1dc32918
JP		 2169 if (hw->pci_cmd_word & PCI_COMMAND_INVALIDATE)
2170 e1000_pci_set_mwi(hw);
1da177e4 2171
96838a40 2172 if (netif_running(netdev)) {
72d64a43
JK		 2173 /* No need to loop, because 82542 supports only 1 queue */
2174 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2175 e1000_configure_rx(adapter);
72d64a43 2176 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2177 }
2178}
2179
2180/**
2181 * e1000_set_mac - Change the Ethernet Address of the NIC
2182 * @netdev: network interface device structure
2183 * @p: pointer to an address structure
2184 *
2185 * Returns 0 on success, negative on failure
2186 **/
2187
64798845 2188static int e1000_set_mac(struct net_device *netdev, void *p)
1da177e4 2189{
60490fe0 2190 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 2191 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2192 struct sockaddr *addr = p;
2193
96838a40 2194 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2195 return -EADDRNOTAVAIL;
2196
2197 /* 82542 2.0 needs to be in reset to write receive address registers */
2198
1dc32918 2199 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2200 e1000_enter_82542_rst(adapter);
2201
2202 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1dc32918 2203 memcpy(hw->mac_addr, addr->sa_data, netdev->addr_len);
1da177e4 2204
1dc32918 2205 e1000_rar_set(hw, hw->mac_addr, 0);
1da177e4 2206
1dc32918 2207 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2208 e1000_leave_82542_rst(adapter);
2209
2210 return 0;
2211}
2212
2213/**
db0ce50d 2214 * e1000_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
1da177e4
LT		 2215 * @netdev: network interface device structure
2216 *
db0ce50d
PM		 2217 * The set_rx_mode entry point is called whenever the unicast or multicast
2218 * address lists or the network interface flags are updated. This routine is
2219 * responsible for configuring the hardware for proper unicast, multicast,
1da177e4
LT		 2220 * promiscuous mode, and all-multi behavior.
2221 **/
2222
64798845 2223static void e1000_set_rx_mode(struct net_device *netdev)
1da177e4 2224{
60490fe0 2225 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 2226 struct e1000_hw *hw = &adapter->hw;
ccffad25
JP		 2227 struct netdev_hw_addr *ha;
2228 bool use_uc = false;
406874a7
JP		 2229 u32 rctl;
2230 u32 hash_value;
868d5309 2231 int i, rar_entries = E1000_RAR_ENTRIES;
1532ecea 2232 int mta_reg_count = E1000_NUM_MTA_REGISTERS;
81c52285
JB		 2233 u32 *mcarray = kcalloc(mta_reg_count, sizeof(u32), GFP_ATOMIC);
2234
2235 if (!mcarray) {
feb8f478 2236 e_err(probe, "memory allocation failed\n");
81c52285
JB		 2237 return;
2238 }
cd94dd0b 2239
2648345f
MC		 2240 /* Check for Promiscuous and All Multicast modes */
2241
1dc32918 2242 rctl = er32(RCTL);
1da177e4 2243
96838a40 2244 if (netdev->flags & IFF_PROMISC) {
1da177e4 2245 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2246 rctl &= ~E1000_RCTL_VFE;
1da177e4 2247 } else {
1532ecea 2248 if (netdev->flags & IFF_ALLMULTI)
746b9f02 2249 rctl |= E1000_RCTL_MPE;
1532ecea 2250 else
746b9f02 2251 rctl &= ~E1000_RCTL_MPE;
1532ecea 2252 /* Enable VLAN filter if there is a VLAN */
5622e404 2253 if (e1000_vlan_used(adapter))
1532ecea 2254 rctl |= E1000_RCTL_VFE;
db0ce50d
PM		 2255 }
2256
32e7bfc4 2257 if (netdev_uc_count(netdev) > rar_entries - 1) {
db0ce50d
PM		 2258 rctl |= E1000_RCTL_UPE;
2259 } else if (!(netdev->flags & IFF_PROMISC)) {
2260 rctl &= ~E1000_RCTL_UPE;
ccffad25 2261 use_uc = true;
1da177e4
LT		 2262 }
2263
1dc32918 2264 ew32(RCTL, rctl);
1da177e4
LT		 2265
2266 /* 82542 2.0 needs to be in reset to write receive address registers */
2267
96838a40 2268 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2269 e1000_enter_82542_rst(adapter);
2270
db0ce50d
PM		 2271 /* load the first 14 addresses into the exact filters 1-14. Unicast
2272 * addresses take precedence to avoid disabling unicast filtering
2273 * when possible.
2274 *
b595076a 2275 * RAR 0 is used for the station MAC address
1da177e4
LT		 2276 * if there are not 14 addresses, go ahead and clear the filters
2277 */
ccffad25
JP		 2278 i = 1;
2279 if (use_uc)
32e7bfc4 2280 netdev_for_each_uc_addr(ha, netdev) {
ccffad25
JP		 2281 if (i == rar_entries)
2282 break;
2283 e1000_rar_set(hw, ha->addr, i++);
2284 }
2285
22bedad3 2286 netdev_for_each_mc_addr(ha, netdev) {
7a81e9f3
JP		 2287 if (i == rar_entries) {
2288 /* load any remaining addresses into the hash table */
2289 u32 hash_reg, hash_bit, mta;
22bedad3 2290 hash_value = e1000_hash_mc_addr(hw, ha->addr);
7a81e9f3
JP		 2291 hash_reg = (hash_value >> 5) & 0x7F;
2292 hash_bit = hash_value & 0x1F;
2293 mta = (1 << hash_bit);
2294 mcarray[hash_reg] |= mta;
10886af5 2295 } else {
22bedad3 2296 e1000_rar_set(hw, ha->addr, i++);
1da177e4
LT		 2297 }
2298 }
2299
7a81e9f3
JP		 2300 for (; i < rar_entries; i++) {
2301 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2302 E1000_WRITE_FLUSH();
2303 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2304 E1000_WRITE_FLUSH();
1da177e4
LT		 2305 }
2306
81c52285
JB		 2307 /* write the hash table completely, write from bottom to avoid
2308 * both stupid write combining chipsets, and flushing each write */
2309 for (i = mta_reg_count - 1; i >= 0 ; i--) {
2310 /*
2311 * If we are on an 82544 has an errata where writing odd
2312 * offsets overwrites the previous even offset, but writing
2313 * backwards over the range solves the issue by always
2314 * writing the odd offset first
2315 */
2316 E1000_WRITE_REG_ARRAY(hw, MTA, i, mcarray[i]);
2317 }
2318 E1000_WRITE_FLUSH();
2319
96838a40 2320 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2321 e1000_leave_82542_rst(adapter);
81c52285
JB		 2322
2323 kfree(mcarray);
1da177e4
LT		 2324}
2325
a4010afe
JB		 2326/**
2327 * e1000_update_phy_info_task - get phy info
2328 * @work: work struct contained inside adapter struct
2329 *
2330 * Need to wait a few seconds after link up to get diagnostic information from
2331 * the phy
2332 */
5cf42fcd
JB		 2333static void e1000_update_phy_info_task(struct work_struct *work)
2334{
2335 struct e1000_adapter *adapter = container_of(work,
a4010afe
JB		 2336 struct e1000_adapter,
2337 phy_info_task.work);
0ef4eedc
JB		 2338 if (test_bit(__E1000_DOWN, &adapter->flags))
2339 return;
2340 mutex_lock(&adapter->mutex);
a4010afe 2341 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
0ef4eedc 2342 mutex_unlock(&adapter->mutex);
1da177e4
LT		 2343}
2344
5cf42fcd
JB		 2345/**
2346 * e1000_82547_tx_fifo_stall_task - task to complete work
2347 * @work: work struct contained inside adapter struct
2348 **/
2349static void e1000_82547_tx_fifo_stall_task(struct work_struct *work)
2350{
2351 struct e1000_adapter *adapter = container_of(work,
a4010afe
JB		 2352 struct e1000_adapter,
2353 fifo_stall_task.work);
1dc32918 2354 struct e1000_hw *hw = &adapter->hw;
1da177e4 2355 struct net_device *netdev = adapter->netdev;
406874a7 2356 u32 tctl;
1da177e4 2357
0ef4eedc
JB		 2358 if (test_bit(__E1000_DOWN, &adapter->flags))
2359 return;
2360 mutex_lock(&adapter->mutex);
96838a40 2361 if (atomic_read(&adapter->tx_fifo_stall)) {
1dc32918
JP		 2362 if ((er32(TDT) == er32(TDH)) &&
2363 (er32(TDFT) == er32(TDFH)) &&
2364 (er32(TDFTS) == er32(TDFHS))) {
2365 tctl = er32(TCTL);
2366 ew32(TCTL, tctl & ~E1000_TCTL_EN);
2367 ew32(TDFT, adapter->tx_head_addr);
2368 ew32(TDFH, adapter->tx_head_addr);
2369 ew32(TDFTS, adapter->tx_head_addr);
2370 ew32(TDFHS, adapter->tx_head_addr);
2371 ew32(TCTL, tctl);
2372 E1000_WRITE_FLUSH();
1da177e4
LT		 2373
2374 adapter->tx_fifo_head = 0;
2375 atomic_set(&adapter->tx_fifo_stall, 0);
2376 netif_wake_queue(netdev);
baa34745 2377 } else if (!test_bit(__E1000_DOWN, &adapter->flags)) {
a4010afe 2378 schedule_delayed_work(&adapter->fifo_stall_task, 1);
1da177e4
LT		 2379 }
2380 }
0ef4eedc 2381 mutex_unlock(&adapter->mutex);
1da177e4
LT		 2382}
2383
b548192a 2384bool e1000_has_link(struct e1000_adapter *adapter)
be0f0719
JB		 2385{
2386 struct e1000_hw *hw = &adapter->hw;
2387 bool link_active = false;
be0f0719 2388
6d9e5130
NS		 2389 /* get_link_status is set on LSC (link status) interrupt or rx
2390 * sequence error interrupt (except on intel ce4100).
2391 * get_link_status will stay false until the
2392 * e1000_check_for_link establishes link for copper adapters
2393 * ONLY
be0f0719
JB		 2394 */
2395 switch (hw->media_type) {
2396 case e1000_media_type_copper:
6d9e5130
NS		 2397 if (hw->mac_type == e1000_ce4100)
2398 hw->get_link_status = 1;
be0f0719 2399 if (hw->get_link_status) {
120a5d0d 2400 e1000_check_for_link(hw);
be0f0719
JB		 2401 link_active = !hw->get_link_status;
2402 } else {
2403 link_active = true;
2404 }
2405 break;
2406 case e1000_media_type_fiber:
120a5d0d 2407 e1000_check_for_link(hw);
be0f0719
JB		 2408 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
2409 break;
2410 case e1000_media_type_internal_serdes:
120a5d0d 2411 e1000_check_for_link(hw);
be0f0719
JB		 2412 link_active = hw->serdes_has_link;
2413 break;
2414 default:
2415 break;
2416 }
2417
2418 return link_active;
2419}
2420
1da177e4 2421/**
a4010afe
JB		 2422 * e1000_watchdog - work function
2423 * @work: work struct contained inside adapter struct
1da177e4 2424 **/
a4010afe 2425static void e1000_watchdog(struct work_struct *work)
1da177e4 2426{
a4010afe
JB		 2427 struct e1000_adapter *adapter = container_of(work,
2428 struct e1000_adapter,
2429 watchdog_task.work);
1dc32918 2430 struct e1000_hw *hw = &adapter->hw;
1da177e4 2431 struct net_device *netdev = adapter->netdev;
545c67c0 2432 struct e1000_tx_ring *txdr = adapter->tx_ring;
406874a7 2433 u32 link, tctl;
90fb5135 2434
0ef4eedc
JB		 2435 if (test_bit(__E1000_DOWN, &adapter->flags))
2436 return;
2437
2438 mutex_lock(&adapter->mutex);
be0f0719
JB		 2439 link = e1000_has_link(adapter);
2440 if ((netif_carrier_ok(netdev)) && link)
2441 goto link_up;
1da177e4 2442
96838a40
JB		 2443 if (link) {
2444 if (!netif_carrier_ok(netdev)) {
406874a7 2445 u32 ctrl;
c3033b01 2446 bool txb2b = true;
be0f0719 2447 /* update snapshot of PHY registers on LSC */
1dc32918 2448 e1000_get_speed_and_duplex(hw,
1da177e4
LT		 2449 &adapter->link_speed,
2450 &adapter->link_duplex);
2451
1dc32918 2452 ctrl = er32(CTRL);
675ad473
ET		 2453 pr_info("%s NIC Link is Up %d Mbps %s, "
2454 "Flow Control: %s\n",
2455 netdev->name,
2456 adapter->link_speed,
2457 adapter->link_duplex == FULL_DUPLEX ?
2458 "Full Duplex" : "Half Duplex",
2459 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2460 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2461 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2462 E1000_CTRL_TFCE) ? "TX" : "None")));
1da177e4 2463
39ca5f03 2464 /* adjust timeout factor according to speed/duplex */
66a2b0a3 2465 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2466 switch (adapter->link_speed) {
2467 case SPEED_10:
c3033b01 2468 txb2b = false;
be0f0719 2469 adapter->tx_timeout_factor = 16;
7e6c9861
JK		 2470 break;
2471 case SPEED_100:
c3033b01 2472 txb2b = false;
7e6c9861
JK		 2473 /* maybe add some timeout factor ? */
2474 break;
2475 }
2476
1532ecea 2477 /* enable transmits in the hardware */
1dc32918 2478 tctl = er32(TCTL);
7e6c9861 2479 tctl |= E1000_TCTL_EN;
1dc32918 2480 ew32(TCTL, tctl);
66a2b0a3 2481
1da177e4 2482 netif_carrier_on(netdev);
baa34745 2483 if (!test_bit(__E1000_DOWN, &adapter->flags))
a4010afe
JB		 2484 schedule_delayed_work(&adapter->phy_info_task,
2485 2 * HZ);
1da177e4
LT		 2486 adapter->smartspeed = 0;
2487 }
2488 } else {
96838a40 2489 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2490 adapter->link_speed = 0;
2491 adapter->link_duplex = 0;
675ad473
ET		 2492 pr_info("%s NIC Link is Down\n",
2493 netdev->name);
1da177e4 2494 netif_carrier_off(netdev);
baa34745
JB		 2495
2496 if (!test_bit(__E1000_DOWN, &adapter->flags))
a4010afe
JB		 2497 schedule_delayed_work(&adapter->phy_info_task,
2498 2 * HZ);
1da177e4
LT		 2499 }
2500
2501 e1000_smartspeed(adapter);
2502 }
2503
be0f0719 2504link_up:
1da177e4
LT		 2505 e1000_update_stats(adapter);
2506
1dc32918 2507 hw->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
1da177e4 2508 adapter->tpt_old = adapter->stats.tpt;
1dc32918 2509 hw->collision_delta = adapter->stats.colc - adapter->colc_old;
1da177e4
LT		 2510 adapter->colc_old = adapter->stats.colc;
2511
2512 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2513 adapter->gorcl_old = adapter->stats.gorcl;
2514 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2515 adapter->gotcl_old = adapter->stats.gotcl;
2516
1dc32918 2517 e1000_update_adaptive(hw);
1da177e4 2518
f56799ea 2519 if (!netif_carrier_ok(netdev)) {
581d708e 2520 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2521 /* We've lost link, so the controller stops DMA,
2522 * but we've got queued Tx work that's never going
2523 * to get done, so reset controller to flush Tx.
2524 * (Do the reset outside of interrupt context). */
87041639
JK		 2525 adapter->tx_timeout_count++;
2526 schedule_work(&adapter->reset_task);
0ef4eedc
JB		 2527 /* exit immediately since reset is imminent */
2528 goto unlock;
1da177e4
LT		 2529 }
2530 }
2531
eab2abf5
JB		 2532 /* Simple mode for Interrupt Throttle Rate (ITR) */
2533 if (hw->mac_type >= e1000_82540 && adapter->itr_setting == 4) {
2534 /*
2535 * Symmetric Tx/Rx gets a reduced ITR=2000;
2536 * Total asymmetrical Tx or Rx gets ITR=8000;
2537 * everyone else is between 2000-8000.
2538 */
2539 u32 goc = (adapter->gotcl + adapter->gorcl) / 10000;
2540 u32 dif = (adapter->gotcl > adapter->gorcl ?
2541 adapter->gotcl - adapter->gorcl :
2542 adapter->gorcl - adapter->gotcl) / 10000;
2543 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2544
2545 ew32(ITR, 1000000000 / (itr * 256));
2546 }
2547
1da177e4 2548 /* Cause software interrupt to ensure rx ring is cleaned */
1dc32918 2549 ew32(ICS, E1000_ICS_RXDMT0);
1da177e4 2550
2648345f 2551 /* Force detection of hung controller every watchdog period */
c3033b01 2552 adapter->detect_tx_hung = true;
1da177e4 2553
a4010afe 2554 /* Reschedule the task */
baa34745 2555 if (!test_bit(__E1000_DOWN, &adapter->flags))
a4010afe 2556 schedule_delayed_work(&adapter->watchdog_task, 2 * HZ);
0ef4eedc
JB		 2557
2558unlock:
2559 mutex_unlock(&adapter->mutex);
1da177e4
LT		 2560}
2561
835bb129
JB		 2562enum latency_range {
2563 lowest_latency = 0,
2564 low_latency = 1,
2565 bulk_latency = 2,
2566 latency_invalid = 255
2567};
2568
2569/**
2570 * e1000_update_itr - update the dynamic ITR value based on statistics
8fce4731
JB		 2571 * @adapter: pointer to adapter
2572 * @itr_setting: current adapter->itr
2573 * @packets: the number of packets during this measurement interval
2574 * @bytes: the number of bytes during this measurement interval
2575 *
835bb129
JB		 2576 * Stores a new ITR value based on packets and byte
2577 * counts during the last interrupt. The advantage of per interrupt
2578 * computation is faster updates and more accurate ITR for the current
2579 * traffic pattern. Constants in this function were computed
2580 * based on theoretical maximum wire speed and thresholds were set based
2581 * on testing data as well as attempting to minimize response time
2582 * while increasing bulk throughput.
2583 * this functionality is controlled by the InterruptThrottleRate module
2584 * parameter (see e1000_param.c)
835bb129
JB		 2585 **/
2586static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
64798845 2587 u16 itr_setting, int packets, int bytes)
835bb129
JB		 2588{
2589 unsigned int retval = itr_setting;
2590 struct e1000_hw *hw = &adapter->hw;
2591
2592 if (unlikely(hw->mac_type < e1000_82540))
2593 goto update_itr_done;
2594
2595 if (packets == 0)
2596 goto update_itr_done;
2597
835bb129
JB		 2598 switch (itr_setting) {
2599 case lowest_latency:
2b65326e
JB		 2600 /* jumbo frames get bulk treatment*/
2601 if (bytes/packets > 8000)
2602 retval = bulk_latency;
2603 else if ((packets < 5) && (bytes > 512))
835bb129
JB		 2604 retval = low_latency;
2605 break;
2606 case low_latency: /* 50 usec aka 20000 ints/s */
2607 if (bytes > 10000) {
2b65326e
JB		 2608 /* jumbo frames need bulk latency setting */
2609 if (bytes/packets > 8000)
2610 retval = bulk_latency;
2611 else if ((packets < 10) || ((bytes/packets) > 1200))
835bb129
JB		 2612 retval = bulk_latency;
2613 else if ((packets > 35))
2614 retval = lowest_latency;
2b65326e
JB		 2615 } else if (bytes/packets > 2000)
2616 retval = bulk_latency;
2617 else if (packets <= 2 && bytes < 512)
835bb129
JB		 2618 retval = lowest_latency;
2619 break;
2620 case bulk_latency: /* 250 usec aka 4000 ints/s */
2621 if (bytes > 25000) {
2622 if (packets > 35)
2623 retval = low_latency;
2b65326e
JB		 2624 } else if (bytes < 6000) {
2625 retval = low_latency;
835bb129
JB		 2626 }
2627 break;
2628 }
2629
2630update_itr_done:
2631 return retval;
2632}
2633
2634static void e1000_set_itr(struct e1000_adapter *adapter)
2635{
2636 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 2637 u16 current_itr;
2638 u32 new_itr = adapter->itr;
835bb129
JB		 2639
2640 if (unlikely(hw->mac_type < e1000_82540))
2641 return;
2642
2643 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2644 if (unlikely(adapter->link_speed != SPEED_1000)) {
2645 current_itr = 0;
2646 new_itr = 4000;
2647 goto set_itr_now;
2648 }
2649
2650 adapter->tx_itr = e1000_update_itr(adapter,
2651 adapter->tx_itr,
2652 adapter->total_tx_packets,
2653 adapter->total_tx_bytes);
2b65326e
JB		 2654 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2655 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2656 adapter->tx_itr = low_latency;
2657
835bb129
JB		 2658 adapter->rx_itr = e1000_update_itr(adapter,
2659 adapter->rx_itr,
2660 adapter->total_rx_packets,
2661 adapter->total_rx_bytes);
2b65326e
JB		 2662 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2663 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2664 adapter->rx_itr = low_latency;
835bb129
JB		 2665
2666 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2667
835bb129
JB		 2668 switch (current_itr) {
2669 /* counts and packets in update_itr are dependent on these numbers */
2670 case lowest_latency:
2671 new_itr = 70000;
2672 break;
2673 case low_latency:
2674 new_itr = 20000; /* aka hwitr = ~200 */
2675 break;
2676 case bulk_latency:
2677 new_itr = 4000;
2678 break;
2679 default:
2680 break;
2681 }
2682
2683set_itr_now:
2684 if (new_itr != adapter->itr) {
2685 /* this attempts to bias the interrupt rate towards Bulk
2686 * by adding intermediate steps when interrupt rate is
2687 * increasing */
2688 new_itr = new_itr > adapter->itr ?
2689 min(adapter->itr + (new_itr >> 2), new_itr) :
2690 new_itr;
2691 adapter->itr = new_itr;
1dc32918 2692 ew32(ITR, 1000000000 / (new_itr * 256));
835bb129 2693 }
835bb129
JB		 2694}
2695
1da177e4
LT		 2696#define E1000_TX_FLAGS_CSUM 0x00000001
2697#define E1000_TX_FLAGS_VLAN 0x00000002
2698#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2699#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT		 2700#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2701#define E1000_TX_FLAGS_VLAN_SHIFT 16
2702
64798845
JP		 2703static int e1000_tso(struct e1000_adapter *adapter,
2704 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
1da177e4 2705{
1da177e4 2706 struct e1000_context_desc *context_desc;
545c67c0 2707 struct e1000_buffer *buffer_info;
1da177e4 2708 unsigned int i;
406874a7
JP		 2709 u32 cmd_length = 0;
2710 u16 ipcse = 0, tucse, mss;
2711 u8 ipcss, ipcso, tucss, tucso, hdr_len;
1da177e4
LT		 2712 int err;
2713
89114afd 2714 if (skb_is_gso(skb)) {
1da177e4
LT		 2715 if (skb_header_cloned(skb)) {
2716 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2717 if (err)
2718 return err;
2719 }
2720
ab6a5bb6 2721 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
7967168c 2722 mss = skb_shinfo(skb)->gso_size;
60828236 2723 if (skb->protocol == htons(ETH_P_IP)) {
eddc9ec5
ACM		 2724 struct iphdr *iph = ip_hdr(skb);
2725 iph->tot_len = 0;
2726 iph->check = 0;
aa8223c7
ACM		 2727 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2728 iph->daddr, 0,
2729 IPPROTO_TCP,
2730 0);
2d7edb92 2731 cmd_length = E1000_TXD_CMD_IP;
ea2ae17d 2732 ipcse = skb_transport_offset(skb) - 1;
e15fdd03 2733 } else if (skb->protocol == htons(ETH_P_IPV6)) {
0660e03f 2734 ipv6_hdr(skb)->payload_len = 0;
aa8223c7 2735 tcp_hdr(skb)->check =
0660e03f
ACM		 2736 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2737 &ipv6_hdr(skb)->daddr,
2738 0, IPPROTO_TCP, 0);
2d7edb92 2739 ipcse = 0;
2d7edb92 2740 }
bbe735e4 2741 ipcss = skb_network_offset(skb);
eddc9ec5 2742 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
ea2ae17d 2743 tucss = skb_transport_offset(skb);
aa8223c7 2744 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
1da177e4
LT		 2745 tucse = 0;
2746
2747 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2748 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2749
581d708e
MC		 2750 i = tx_ring->next_to_use;
2751 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2752 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2753
2754 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2755 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2756 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2757 context_desc->upper_setup.tcp_fields.tucss = tucss;
2758 context_desc->upper_setup.tcp_fields.tucso = tucso;
2759 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2760 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2761 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2762 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2763
545c67c0 2764 buffer_info->time_stamp = jiffies;
a9ebadd6 2765 buffer_info->next_to_watch = i;
545c67c0 2766
581d708e
MC		 2767 if (++i == tx_ring->count) i = 0;
2768 tx_ring->next_to_use = i;
1da177e4 2769
c3033b01 2770 return true;
1da177e4 2771 }
c3033b01 2772 return false;
1da177e4
LT		 2773}
2774
64798845
JP		 2775static bool e1000_tx_csum(struct e1000_adapter *adapter,
2776 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
1da177e4
LT		 2777{
2778 struct e1000_context_desc *context_desc;
545c67c0 2779 struct e1000_buffer *buffer_info;
1da177e4 2780 unsigned int i;
406874a7 2781 u8 css;
3ed30676 2782 u32 cmd_len = E1000_TXD_CMD_DEXT;
1da177e4 2783
3ed30676
DG		 2784 if (skb->ip_summed != CHECKSUM_PARTIAL)
2785 return false;
1da177e4 2786
3ed30676 2787 switch (skb->protocol) {
09640e63 2788 case cpu_to_be16(ETH_P_IP):
3ed30676
DG		 2789 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2790 cmd_len |= E1000_TXD_CMD_TCP;
2791 break;
09640e63 2792 case cpu_to_be16(ETH_P_IPV6):
3ed30676
DG		 2793 /* XXX not handling all IPV6 headers */
2794 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2795 cmd_len |= E1000_TXD_CMD_TCP;
2796 break;
2797 default:
2798 if (unlikely(net_ratelimit()))
feb8f478
ET		 2799 e_warn(drv, "checksum_partial proto=%x!\n",
2800 skb->protocol);
3ed30676
DG		 2801 break;
2802 }
1da177e4 2803
0d0b1672 2804 css = skb_checksum_start_offset(skb);
1da177e4 2805
3ed30676
DG		 2806 i = tx_ring->next_to_use;
2807 buffer_info = &tx_ring->buffer_info[i];
2808 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2809
3ed30676
DG		 2810 context_desc->lower_setup.ip_config = 0;
2811 context_desc->upper_setup.tcp_fields.tucss = css;
2812 context_desc->upper_setup.tcp_fields.tucso =
2813 css + skb->csum_offset;
2814 context_desc->upper_setup.tcp_fields.tucse = 0;
2815 context_desc->tcp_seg_setup.data = 0;
2816 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
1da177e4 2817
3ed30676
DG		 2818 buffer_info->time_stamp = jiffies;
2819 buffer_info->next_to_watch = i;
1da177e4 2820
3ed30676
DG		 2821 if (unlikely(++i == tx_ring->count)) i = 0;
2822 tx_ring->next_to_use = i;
2823
2824 return true;
1da177e4
LT		 2825}
2826
2827#define E1000_MAX_TXD_PWR 12
2828#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2829
64798845
JP		 2830static int e1000_tx_map(struct e1000_adapter *adapter,
2831 struct e1000_tx_ring *tx_ring,
2832 struct sk_buff *skb, unsigned int first,
2833 unsigned int max_per_txd, unsigned int nr_frags,
2834 unsigned int mss)
1da177e4 2835{
1dc32918 2836 struct e1000_hw *hw = &adapter->hw;
602c0554 2837 struct pci_dev *pdev = adapter->pdev;
37e73df8 2838 struct e1000_buffer *buffer_info;
d20b606c 2839 unsigned int len = skb_headlen(skb);
602c0554 2840 unsigned int offset = 0, size, count = 0, i;
31c15a2f 2841 unsigned int f, bytecount, segs;
1da177e4
LT		 2842
2843 i = tx_ring->next_to_use;
2844
96838a40 2845 while (len) {
37e73df8 2846 buffer_info = &tx_ring->buffer_info[i];
1da177e4 2847 size = min(len, max_per_txd);
fd803241
JK		 2848 /* Workaround for Controller erratum --
2849 * descriptor for non-tso packet in a linear SKB that follows a
2850 * tso gets written back prematurely before the data is fully
0f15a8fa 2851 * DMA'd to the controller */
fd803241 2852 if (!skb->data_len && tx_ring->last_tx_tso &&
89114afd 2853 !skb_is_gso(skb)) {
fd803241
JK		 2854 tx_ring->last_tx_tso = 0;
2855 size -= 4;
2856 }
2857
1da177e4
LT		 2858 /* Workaround for premature desc write-backs
2859 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2860 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4 2861 size -= 4;
97338bde
MC		 2862 /* work-around for errata 10 and it applies
2863 * to all controllers in PCI-X mode
2864 * The fix is to make sure that the first descriptor of a
2865 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2866 */
1dc32918 2867 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2868 (size > 2015) && count == 0))
2869 size = 2015;
96838a40 2870
1da177e4
LT		 2871 /* Workaround for potential 82544 hang in PCI-X. Avoid
2872 * terminating buffers within evenly-aligned dwords. */
96838a40 2873 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2874 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2875 size > 4))
2876 size -= 4;
2877
2878 buffer_info->length = size;
cdd7549e 2879 /* set time_stamp *before* dma to help avoid a possible race */
1da177e4 2880 buffer_info->time_stamp = jiffies;
602c0554 2881 buffer_info->mapped_as_page = false;
b16f53be
NN		 2882 buffer_info->dma = dma_map_single(&pdev->dev,
2883 skb->data + offset,
2884 size, DMA_TO_DEVICE);
2885 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
602c0554 2886 goto dma_error;
a9ebadd6 2887 buffer_info->next_to_watch = i;
1da177e4
LT		 2888
2889 len -= size;
2890 offset += size;
2891 count++;
37e73df8
AD		 2892 if (len) {
2893 i++;
2894 if (unlikely(i == tx_ring->count))
2895 i = 0;
2896 }
1da177e4
LT		 2897 }
2898
96838a40 2899 for (f = 0; f < nr_frags; f++) {
9e903e08 2900 const struct skb_frag_struct *frag;
1da177e4
LT		 2901
2902 frag = &skb_shinfo(skb)->frags[f];
9e903e08 2903 len = skb_frag_size(frag);
877749bf 2904 offset = 0;
1da177e4 2905
96838a40 2906 while (len) {
877749bf 2907 unsigned long bufend;
37e73df8
AD		 2908 i++;
2909 if (unlikely(i == tx_ring->count))
2910 i = 0;
2911
1da177e4
LT		 2912 buffer_info = &tx_ring->buffer_info[i];
2913 size = min(len, max_per_txd);
1da177e4
LT		 2914 /* Workaround for premature desc write-backs
2915 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2916 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
1da177e4 2917 size -= 4;
1da177e4
LT		 2918 /* Workaround for potential 82544 hang in PCI-X.
2919 * Avoid terminating buffers within evenly-aligned
2920 * dwords. */
877749bf
IC		 2921 bufend = (unsigned long)
2922 page_to_phys(skb_frag_page(frag));
2923 bufend += offset + size - 1;
96838a40 2924 if (unlikely(adapter->pcix_82544 &&
877749bf
IC		 2925 !(bufend & 4) &&
2926 size > 4))
1da177e4
LT		 2927 size -= 4;
2928
2929 buffer_info->length = size;
1da177e4 2930 buffer_info->time_stamp = jiffies;
602c0554 2931 buffer_info->mapped_as_page = true;
877749bf
IC		 2932 buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag,
2933 offset, size, DMA_TO_DEVICE);
b16f53be 2934 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
602c0554 2935 goto dma_error;
a9ebadd6 2936 buffer_info->next_to_watch = i;
1da177e4
LT		 2937
2938 len -= size;
2939 offset += size;
2940 count++;
1da177e4
LT		 2941 }
2942 }
2943
31c15a2f
DN		 2944 segs = skb_shinfo(skb)->gso_segs ?: 1;
2945 /* multiply data chunks by size of headers */
2946 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
2947
1da177e4 2948 tx_ring->buffer_info[i].skb = skb;
31c15a2f
DN		 2949 tx_ring->buffer_info[i].segs = segs;
2950 tx_ring->buffer_info[i].bytecount = bytecount;
1da177e4
LT		 2951 tx_ring->buffer_info[first].next_to_watch = i;
2952
2953 return count;
602c0554
AD		 2954
2955dma_error:
2956 dev_err(&pdev->dev, "TX DMA map failed\n");
2957 buffer_info->dma = 0;
c1fa347f 2958 if (count)
602c0554 2959 count--;
c1fa347f
RK		 2960
2961 while (count--) {
2962 if (i==0)
602c0554 2963 i += tx_ring->count;
c1fa347f 2964 i--;
602c0554
AD		 2965 buffer_info = &tx_ring->buffer_info[i];
2966 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2967 }
2968
2969 return 0;
1da177e4
LT		 2970}
2971
64798845
JP		 2972static void e1000_tx_queue(struct e1000_adapter *adapter,
2973 struct e1000_tx_ring *tx_ring, int tx_flags,
2974 int count)
1da177e4 2975{
1dc32918 2976 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2977 struct e1000_tx_desc *tx_desc = NULL;
2978 struct e1000_buffer *buffer_info;
406874a7 2979 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
1da177e4
LT		 2980 unsigned int i;
2981
96838a40 2982 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4
LT		 2983 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2984 E1000_TXD_CMD_TSE;
2d7edb92
MC		 2985 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2986
96838a40 2987 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 2988 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 2989 }
2990
96838a40 2991 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 2992 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2993 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2994 }
2995
96838a40 2996 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 2997 txd_lower |= E1000_TXD_CMD_VLE;
2998 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2999 }
3000
3001 i = tx_ring->next_to_use;
3002
96838a40 3003 while (count--) {
1da177e4
LT		 3004 buffer_info = &tx_ring->buffer_info[i];
3005 tx_desc = E1000_TX_DESC(*tx_ring, i);
3006 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3007 tx_desc->lower.data =
3008 cpu_to_le32(txd_lower | buffer_info->length);
3009 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 3010 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 3011 }
3012
3013 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3014
3015 /* Force memory writes to complete before letting h/w
3016 * know there are new descriptors to fetch. (Only
3017 * applicable for weak-ordered memory model archs,
3018 * such as IA-64). */
3019 wmb();
3020
3021 tx_ring->next_to_use = i;
1dc32918 3022 writel(i, hw->hw_addr + tx_ring->tdt);
2ce9047f
JB		 3023 /* we need this if more than one processor can write to our tail
3024 * at a time, it syncronizes IO on IA64/Altix systems */
3025 mmiowb();
1da177e4
LT		 3026}
3027
3028/**
3029 * 82547 workaround to avoid controller hang in half-duplex environment.
3030 * The workaround is to avoid queuing a large packet that would span
3031 * the internal Tx FIFO ring boundary by notifying the stack to resend
3032 * the packet at a later time. This gives the Tx FIFO an opportunity to
3033 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3034 * to the beginning of the Tx FIFO.
3035 **/
3036
3037#define E1000_FIFO_HDR 0x10
3038#define E1000_82547_PAD_LEN 0x3E0
3039
64798845
JP		 3040static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
3041 struct sk_buff *skb)
1da177e4 3042{
406874a7
JP		 3043 u32 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3044 u32 skb_fifo_len = skb->len + E1000_FIFO_HDR;
1da177e4 3045
9099cfb9 3046 skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
1da177e4 3047
96838a40 3048 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 3049 goto no_fifo_stall_required;
3050
96838a40 3051 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 3052 return 1;
3053
96838a40 3054 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 3055 atomic_set(&adapter->tx_fifo_stall, 1);
3056 return 1;
3057 }
3058
3059no_fifo_stall_required:
3060 adapter->tx_fifo_head += skb_fifo_len;
96838a40 3061 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 3062 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3063 return 0;
3064}
3065
65c7973f
JB		 3066static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3067{
3068 struct e1000_adapter *adapter = netdev_priv(netdev);
3069 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3070
3071 netif_stop_queue(netdev);
3072 /* Herbert's original patch had:
3073 * smp_mb__after_netif_stop_queue();
3074 * but since that doesn't exist yet, just open code it. */
3075 smp_mb();
3076
3077 /* We need to check again in a case another CPU has just
3078 * made room available. */
3079 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3080 return -EBUSY;
3081
3082 /* A reprieve! */
3083 netif_start_queue(netdev);
fcfb1224 3084 ++adapter->restart_queue;
65c7973f
JB		 3085 return 0;
3086}
3087
3088static int e1000_maybe_stop_tx(struct net_device *netdev,
3089 struct e1000_tx_ring *tx_ring, int size)
3090{
3091 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3092 return 0;
3093 return __e1000_maybe_stop_tx(netdev, size);
3094}
3095
1da177e4 3096#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3b29a56d
SH		 3097static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
3098 struct net_device *netdev)
1da177e4 3099{
60490fe0 3100 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 3101 struct e1000_hw *hw = &adapter->hw;
581d708e 3102 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 3103 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3104 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3105 unsigned int tx_flags = 0;
e743d313 3106 unsigned int len = skb_headlen(skb);
6d1e3aa7
KK		 3107 unsigned int nr_frags;
3108 unsigned int mss;
1da177e4 3109 int count = 0;
76c224bc 3110 int tso;
1da177e4 3111 unsigned int f;
1da177e4 3112
65c7973f
JB		 3113 /* This goes back to the question of how to logically map a tx queue
3114 * to a flow. Right now, performance is impacted slightly negatively
3115 * if using multiple tx queues. If the stack breaks away from a
3116 * single qdisc implementation, we can look at this again. */
581d708e 3117 tx_ring = adapter->tx_ring;
24025e4e 3118
581d708e 3119 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 3120 dev_kfree_skb_any(skb);
3121 return NETDEV_TX_OK;
3122 }
3123
7967168c 3124 mss = skb_shinfo(skb)->gso_size;
76c224bc 3125 /* The controller does a simple calculation to
1da177e4
LT		 3126 * make sure there is enough room in the FIFO before
3127 * initiating the DMA for each buffer. The calc is:
3128 * 4 = ceil(buffer len/mss). To make sure we don't
3129 * overrun the FIFO, adjust the max buffer len if mss
3130 * drops. */
96838a40 3131 if (mss) {
406874a7 3132 u8 hdr_len;
1da177e4
LT		 3133 max_per_txd = min(mss << 2, max_per_txd);
3134 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 3135
ab6a5bb6 3136 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
6d1e3aa7 3137 if (skb->data_len && hdr_len == len) {
1dc32918 3138 switch (hw->mac_type) {
9f687888 3139 unsigned int pull_size;
683a2aa3
HX		 3140 case e1000_82544:
3141 /* Make sure we have room to chop off 4 bytes,
3142 * and that the end alignment will work out to
3143 * this hardware's requirements
3144 * NOTE: this is a TSO only workaround
3145 * if end byte alignment not correct move us
3146 * into the next dword */
27a884dc 3147 if ((unsigned long)(skb_tail_pointer(skb) - 1) & 4)
683a2aa3
HX		 3148 break;
3149 /* fall through */
9f687888
JK		 3150 pull_size = min((unsigned int)4, skb->data_len);
3151 if (!__pskb_pull_tail(skb, pull_size)) {
feb8f478
ET		 3152 e_err(drv, "__pskb_pull_tail "
3153 "failed.\n");
9f687888 3154 dev_kfree_skb_any(skb);
749dfc70 3155 return NETDEV_TX_OK;
9f687888 3156 }
e743d313 3157 len = skb_headlen(skb);
9f687888
JK		 3158 break;
3159 default:
3160 /* do nothing */
3161 break;
d74bbd3b 3162 }
9a3056da 3163 }
1da177e4
LT		 3164 }
3165
9a3056da 3166 /* reserve a descriptor for the offload context */
84fa7933 3167 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
1da177e4 3168 count++;
2648345f 3169 count++;
fd803241 3170
fd803241 3171 /* Controller Erratum workaround */
89114afd 3172 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
fd803241 3173 count++;
fd803241 3174
1da177e4
LT		 3175 count += TXD_USE_COUNT(len, max_txd_pwr);
3176
96838a40 3177 if (adapter->pcix_82544)
1da177e4
LT		 3178 count++;
3179
96838a40 3180 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 3181 * in PCI-X mode, so add one more descriptor to the count
3182 */
1dc32918 3183 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 3184 (len > 2015)))
3185 count++;
3186
1da177e4 3187 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 3188 for (f = 0; f < nr_frags; f++)
9e903e08 3189 count += TXD_USE_COUNT(skb_frag_size(&skb_shinfo(skb)->frags[f]),
1da177e4 3190 max_txd_pwr);
96838a40 3191 if (adapter->pcix_82544)
1da177e4
LT		 3192 count += nr_frags;
3193
1da177e4
LT		 3194 /* need: count + 2 desc gap to keep tail from touching
3195 * head, otherwise try next time */
8017943e 3196 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2)))
1da177e4 3197 return NETDEV_TX_BUSY;
1da177e4 3198
a4010afe
JB		 3199 if (unlikely((hw->mac_type == e1000_82547) &&
3200 (e1000_82547_fifo_workaround(adapter, skb)))) {
3201 netif_stop_queue(netdev);
3202 if (!test_bit(__E1000_DOWN, &adapter->flags))
3203 schedule_delayed_work(&adapter->fifo_stall_task, 1);
3204 return NETDEV_TX_BUSY;
1da177e4
LT		 3205 }
3206
5622e404 3207 if (vlan_tx_tag_present(skb)) {
1da177e4
LT		 3208 tx_flags |= E1000_TX_FLAGS_VLAN;
3209 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3210 }
3211
581d708e 3212 first = tx_ring->next_to_use;
96838a40 3213
581d708e 3214 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 3215 if (tso < 0) {
3216 dev_kfree_skb_any(skb);
3217 return NETDEV_TX_OK;
3218 }
3219
fd803241 3220 if (likely(tso)) {
8fce4731
JB		 3221 if (likely(hw->mac_type != e1000_82544))
3222 tx_ring->last_tx_tso = 1;
1da177e4 3223 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 3224 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 3225 tx_flags |= E1000_TX_FLAGS_CSUM;
3226
60828236 3227 if (likely(skb->protocol == htons(ETH_P_IP)))
2d7edb92
MC		 3228 tx_flags |= E1000_TX_FLAGS_IPV4;
3229
37e73df8
AD		 3230 count = e1000_tx_map(adapter, tx_ring, skb, first, max_per_txd,
3231 nr_frags, mss);
1da177e4 3232
37e73df8
AD		 3233 if (count) {
3234 e1000_tx_queue(adapter, tx_ring, tx_flags, count);
37e73df8
AD		 3235 /* Make sure there is space in the ring for the next send. */
3236 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
1da177e4 3237
37e73df8
AD		 3238 } else {
3239 dev_kfree_skb_any(skb);
3240 tx_ring->buffer_info[first].time_stamp = 0;
3241 tx_ring->next_to_use = first;
3242 }
1da177e4 3243
1da177e4
LT		 3244 return NETDEV_TX_OK;
3245}
3246
3247/**
3248 * e1000_tx_timeout - Respond to a Tx Hang
3249 * @netdev: network interface device structure
3250 **/
3251
64798845 3252static void e1000_tx_timeout(struct net_device *netdev)
1da177e4 3253{
60490fe0 3254 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3255
3256 /* Do the reset outside of interrupt context */
87041639
JK		 3257 adapter->tx_timeout_count++;
3258 schedule_work(&adapter->reset_task);
1da177e4
LT		 3259}
3260
64798845 3261static void e1000_reset_task(struct work_struct *work)
1da177e4 3262{
65f27f38
DH		 3263 struct e1000_adapter *adapter =
3264 container_of(work, struct e1000_adapter, reset_task);
1da177e4 3265
0ef4eedc
JB		 3266 if (test_bit(__E1000_DOWN, &adapter->flags))
3267 return;
338c15e4 3268 e1000_reinit_safe(adapter);
1da177e4
LT		 3269}
3270
3271/**
3272 * e1000_get_stats - Get System Network Statistics
3273 * @netdev: network interface device structure
3274 *
3275 * Returns the address of the device statistics structure.
a4010afe 3276 * The statistics are actually updated from the watchdog.
1da177e4
LT		 3277 **/
3278
64798845 3279static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
1da177e4 3280{
6b7660cd 3281 /* only return the current stats */
5fe31def 3282 return &netdev->stats;
1da177e4
LT		 3283}
3284
3285/**
3286 * e1000_change_mtu - Change the Maximum Transfer Unit
3287 * @netdev: network interface device structure
3288 * @new_mtu: new value for maximum frame size
3289 *
3290 * Returns 0 on success, negative on failure
3291 **/
3292
64798845 3293static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
1da177e4 3294{
60490fe0 3295 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 3296 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3297 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3298
96838a40
JB		 3299 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3300 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
feb8f478 3301 e_err(probe, "Invalid MTU setting\n");
1da177e4 3302 return -EINVAL;
2d7edb92 3303 }
1da177e4 3304
997f5cbd 3305 /* Adapter-specific max frame size limits. */
1dc32918 3306 switch (hw->mac_type) {
9e2feace 3307 case e1000_undefined ... e1000_82542_rev2_1:
b7cb8c2c 3308 if (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)) {
feb8f478 3309 e_err(probe, "Jumbo Frames not supported.\n");
2d7edb92 3310 return -EINVAL;
2d7edb92 3311 }
997f5cbd 3312 break;
997f5cbd
JK		 3313 default:
3314 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3315 break;
1da177e4
LT		 3316 }
3317
3d6114e7
JB		 3318 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
3319 msleep(1);
3320 /* e1000_down has a dependency on max_frame_size */
3321 hw->max_frame_size = max_frame;
3322 if (netif_running(netdev))
3323 e1000_down(adapter);
3324
87f5032e 3325 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
9e2feace 3326 * means we reserve 2 more, this pushes us to allocate from the next
edbbb3ca
JB		 3327 * larger slab size.
3328 * i.e. RXBUFFER_2048 --> size-4096 slab
3329 * however with the new *_jumbo_rx* routines, jumbo receives will use
3330 * fragmented skbs */
9e2feace 3331
9926146b 3332 if (max_frame <= E1000_RXBUFFER_2048)
9e2feace 3333 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
edbbb3ca
JB		 3334 else
3335#if (PAGE_SIZE >= E1000_RXBUFFER_16384)
9e2feace 3336 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
edbbb3ca
JB		 3337#elif (PAGE_SIZE >= E1000_RXBUFFER_4096)
3338 adapter->rx_buffer_len = PAGE_SIZE;
3339#endif
9e2feace
AK		 3340
3341 /* adjust allocation if LPE protects us, and we aren't using SBP */
1dc32918 3342 if (!hw->tbi_compatibility_on &&
b7cb8c2c 3343 ((max_frame == (ETH_FRAME_LEN + ETH_FCS_LEN)) ||
9e2feace
AK		 3344 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3345 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
997f5cbd 3346
675ad473
ET		 3347 pr_info("%s changing MTU from %d to %d\n",
3348 netdev->name, netdev->mtu, new_mtu);
2d7edb92
MC		 3349 netdev->mtu = new_mtu;
3350
2db10a08 3351 if (netif_running(netdev))
3d6114e7
JB		 3352 e1000_up(adapter);
3353 else
3354 e1000_reset(adapter);
3355
3356 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4 3357
1da177e4
LT		 3358 return 0;
3359}
3360
3361/**
3362 * e1000_update_stats - Update the board statistics counters
3363 * @adapter: board private structure
3364 **/
3365
64798845 3366void e1000_update_stats(struct e1000_adapter *adapter)
1da177e4 3367{
5fe31def 3368 struct net_device *netdev = adapter->netdev;
1da177e4 3369 struct e1000_hw *hw = &adapter->hw;
282f33c9 3370 struct pci_dev *pdev = adapter->pdev;
1da177e4 3371 unsigned long flags;
406874a7 3372 u16 phy_tmp;
1da177e4
LT		 3373
3374#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3375
282f33c9
LV		 3376 /*
3377 * Prevent stats update while adapter is being reset, or if the pci
3378 * connection is down.
3379 */
9026729b 3380 if (adapter->link_speed == 0)
282f33c9 3381 return;
81b1955e 3382 if (pci_channel_offline(pdev))
9026729b
AK		 3383 return;
3384
1da177e4
LT		 3385 spin_lock_irqsave(&adapter->stats_lock, flags);
3386
828d055f 3387 /* these counters are modified from e1000_tbi_adjust_stats,
1da177e4
LT		 3388 * called from the interrupt context, so they must only
3389 * be written while holding adapter->stats_lock
3390 */
3391
1dc32918
JP		 3392 adapter->stats.crcerrs += er32(CRCERRS);
3393 adapter->stats.gprc += er32(GPRC);
3394 adapter->stats.gorcl += er32(GORCL);
3395 adapter->stats.gorch += er32(GORCH);
3396 adapter->stats.bprc += er32(BPRC);
3397 adapter->stats.mprc += er32(MPRC);
3398 adapter->stats.roc += er32(ROC);
3399
1532ecea
JB		 3400 adapter->stats.prc64 += er32(PRC64);
3401 adapter->stats.prc127 += er32(PRC127);
3402 adapter->stats.prc255 += er32(PRC255);
3403 adapter->stats.prc511 += er32(PRC511);
3404 adapter->stats.prc1023 += er32(PRC1023);
3405 adapter->stats.prc1522 += er32(PRC1522);
1dc32918
JP		 3406
3407 adapter->stats.symerrs += er32(SYMERRS);
3408 adapter->stats.mpc += er32(MPC);
3409 adapter->stats.scc += er32(SCC);
3410 adapter->stats.ecol += er32(ECOL);
3411 adapter->stats.mcc += er32(MCC);
3412 adapter->stats.latecol += er32(LATECOL);
3413 adapter->stats.dc += er32(DC);
3414 adapter->stats.sec += er32(SEC);
3415 adapter->stats.rlec += er32(RLEC);
3416 adapter->stats.xonrxc += er32(XONRXC);
3417 adapter->stats.xontxc += er32(XONTXC);
3418 adapter->stats.xoffrxc += er32(XOFFRXC);
3419 adapter->stats.xofftxc += er32(XOFFTXC);
3420 adapter->stats.fcruc += er32(FCRUC);
3421 adapter->stats.gptc += er32(GPTC);
3422 adapter->stats.gotcl += er32(GOTCL);
3423 adapter->stats.gotch += er32(GOTCH);
3424 adapter->stats.rnbc += er32(RNBC);
3425 adapter->stats.ruc += er32(RUC);
3426 adapter->stats.rfc += er32(RFC);
3427 adapter->stats.rjc += er32(RJC);
3428 adapter->stats.torl += er32(TORL);
3429 adapter->stats.torh += er32(TORH);
3430 adapter->stats.totl += er32(TOTL);
3431 adapter->stats.toth += er32(TOTH);
3432 adapter->stats.tpr += er32(TPR);
3433
1532ecea
JB		 3434 adapter->stats.ptc64 += er32(PTC64);
3435 adapter->stats.ptc127 += er32(PTC127);
3436 adapter->stats.ptc255 += er32(PTC255);
3437 adapter->stats.ptc511 += er32(PTC511);
3438 adapter->stats.ptc1023 += er32(PTC1023);
3439 adapter->stats.ptc1522 += er32(PTC1522);
1dc32918
JP		 3440
3441 adapter->stats.mptc += er32(MPTC);
3442 adapter->stats.bptc += er32(BPTC);
1da177e4
LT		 3443
3444 /* used for adaptive IFS */
3445
1dc32918 3446 hw->tx_packet_delta = er32(TPT);
1da177e4 3447 adapter->stats.tpt += hw->tx_packet_delta;
1dc32918 3448 hw->collision_delta = er32(COLC);
1da177e4
LT		 3449 adapter->stats.colc += hw->collision_delta;
3450
96838a40 3451 if (hw->mac_type >= e1000_82543) {
1dc32918
JP		 3452 adapter->stats.algnerrc += er32(ALGNERRC);
3453 adapter->stats.rxerrc += er32(RXERRC);
3454 adapter->stats.tncrs += er32(TNCRS);
3455 adapter->stats.cexterr += er32(CEXTERR);
3456 adapter->stats.tsctc += er32(TSCTC);
3457 adapter->stats.tsctfc += er32(TSCTFC);
1da177e4
LT		 3458 }
3459
3460 /* Fill out the OS statistics structure */
5fe31def
AK		 3461 netdev->stats.multicast = adapter->stats.mprc;
3462 netdev->stats.collisions = adapter->stats.colc;
1da177e4
LT		 3463
3464 /* Rx Errors */
3465
87041639
JK		 3466 /* RLEC on some newer hardware can be incorrect so build
3467 * our own version based on RUC and ROC */
5fe31def 3468 netdev->stats.rx_errors = adapter->stats.rxerrc +
1da177e4 3469 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK		 3470 adapter->stats.ruc + adapter->stats.roc +
3471 adapter->stats.cexterr;
49559854 3472 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
5fe31def
AK		 3473 netdev->stats.rx_length_errors = adapter->stats.rlerrc;
3474 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
3475 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
3476 netdev->stats.rx_missed_errors = adapter->stats.mpc;
1da177e4
LT		 3477
3478 /* Tx Errors */
49559854 3479 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
5fe31def
AK		 3480 netdev->stats.tx_errors = adapter->stats.txerrc;
3481 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
3482 netdev->stats.tx_window_errors = adapter->stats.latecol;
3483 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
1dc32918 3484 if (hw->bad_tx_carr_stats_fd &&
167fb284 3485 adapter->link_duplex == FULL_DUPLEX) {
5fe31def 3486 netdev->stats.tx_carrier_errors = 0;
167fb284
JG		 3487 adapter->stats.tncrs = 0;
3488 }
1da177e4
LT		 3489
3490 /* Tx Dropped needs to be maintained elsewhere */
3491
3492 /* Phy Stats */
96838a40
JB		 3493 if (hw->media_type == e1000_media_type_copper) {
3494 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3495 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3496 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3497 adapter->phy_stats.idle_errors += phy_tmp;
3498 }
3499
96838a40 3500 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3501 (hw->phy_type == e1000_phy_m88) &&
3502 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3503 adapter->phy_stats.receive_errors += phy_tmp;
3504 }
3505
15e376b4 3506 /* Management Stats */
1dc32918
JP		 3507 if (hw->has_smbus) {
3508 adapter->stats.mgptc += er32(MGTPTC);
3509 adapter->stats.mgprc += er32(MGTPRC);
3510 adapter->stats.mgpdc += er32(MGTPDC);
15e376b4
JG		 3511 }
3512
1da177e4
LT		 3513 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3514}
9ac98284 3515
1da177e4
LT		 3516/**
3517 * e1000_intr - Interrupt Handler
3518 * @irq: interrupt number
3519 * @data: pointer to a network interface device structure
1da177e4
LT		 3520 **/
3521
64798845 3522static irqreturn_t e1000_intr(int irq, void *data)
1da177e4
LT		 3523{
3524 struct net_device *netdev = data;
60490fe0 3525 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3526 struct e1000_hw *hw = &adapter->hw;
1532ecea 3527 u32 icr = er32(ICR);
c3570acb 3528
4c11b8ad 3529 if (unlikely((!icr)))
835bb129
JB		 3530 return IRQ_NONE; /* Not our interrupt */
3531
4c11b8ad
JB		 3532 /*
3533 * we might have caused the interrupt, but the above
3534 * read cleared it, and just in case the driver is
3535 * down there is nothing to do so return handled
3536 */
3537 if (unlikely(test_bit(__E1000_DOWN, &adapter->flags)))
3538 return IRQ_HANDLED;
3539
96838a40 3540 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3541 hw->get_link_status = 1;
1314bbf3
AK		 3542 /* guard against interrupt when we're going down */
3543 if (!test_bit(__E1000_DOWN, &adapter->flags))
a4010afe 3544 schedule_delayed_work(&adapter->watchdog_task, 1);
1da177e4
LT		 3545 }
3546
1532ecea
JB		 3547 /* disable interrupts, without the synchronize_irq bit */
3548 ew32(IMC, ~0);
3549 E1000_WRITE_FLUSH();
3550
288379f0 3551 if (likely(napi_schedule_prep(&adapter->napi))) {
835bb129
JB		 3552 adapter->total_tx_bytes = 0;
3553 adapter->total_tx_packets = 0;
3554 adapter->total_rx_bytes = 0;
3555 adapter->total_rx_packets = 0;
288379f0 3556 __napi_schedule(&adapter->napi);
a6c42322 3557 } else {
90fb5135
AK		 3558 /* this really should not happen! if it does it is basically a
3559 * bug, but not a hard error, so enable ints and continue */
a6c42322
JB		 3560 if (!test_bit(__E1000_DOWN, &adapter->flags))
3561 e1000_irq_enable(adapter);
3562 }
1da177e4 3563
1da177e4
LT		 3564 return IRQ_HANDLED;
3565}
3566
1da177e4
LT		 3567/**
3568 * e1000_clean - NAPI Rx polling callback
3569 * @adapter: board private structure
3570 **/
64798845 3571static int e1000_clean(struct napi_struct *napi, int budget)
1da177e4 3572{
bea3348e 3573 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
650b5a5c 3574 int tx_clean_complete = 0, work_done = 0;
581d708e 3575
650b5a5c 3576 tx_clean_complete = e1000_clean_tx_irq(adapter, &adapter->tx_ring[0]);
581d708e 3577
650b5a5c 3578 adapter->clean_rx(adapter, &adapter->rx_ring[0], &work_done, budget);
581d708e 3579
650b5a5c 3580 if (!tx_clean_complete)
d2c7ddd6
DM		 3581 work_done = budget;
3582
53e52c72
DM		 3583 /* If budget not fully consumed, exit the polling mode */
3584 if (work_done < budget) {
835bb129
JB		 3585 if (likely(adapter->itr_setting & 3))
3586 e1000_set_itr(adapter);
288379f0 3587 napi_complete(napi);
a6c42322
JB		 3588 if (!test_bit(__E1000_DOWN, &adapter->flags))
3589 e1000_irq_enable(adapter);
1da177e4
LT		 3590 }
3591
bea3348e 3592 return work_done;
1da177e4
LT		 3593}
3594
1da177e4
LT		 3595/**
3596 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3597 * @adapter: board private structure
3598 **/
64798845
JP		 3599static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
3600 struct e1000_tx_ring *tx_ring)
1da177e4 3601{
1dc32918 3602 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3603 struct net_device *netdev = adapter->netdev;
3604 struct e1000_tx_desc *tx_desc, *eop_desc;
3605 struct e1000_buffer *buffer_info;
3606 unsigned int i, eop;
2a1af5d7 3607 unsigned int count = 0;
835bb129 3608 unsigned int total_tx_bytes=0, total_tx_packets=0;
1da177e4
LT		 3609
3610 i = tx_ring->next_to_clean;
3611 eop = tx_ring->buffer_info[i].next_to_watch;
3612 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3613
ccfb342c
AD		 3614 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
3615 (count < tx_ring->count)) {
843f4267 3616 bool cleaned = false;
2d0bb1c1 3617 rmb(); /* read buffer_info after eop_desc */
843f4267 3618 for ( ; !cleaned; count++) {
1da177e4
LT		 3619 tx_desc = E1000_TX_DESC(*tx_ring, i);
3620 buffer_info = &tx_ring->buffer_info[i];
3621 cleaned = (i == eop);
3622
835bb129 3623 if (cleaned) {
31c15a2f
DN		 3624 total_tx_packets += buffer_info->segs;
3625 total_tx_bytes += buffer_info->bytecount;
835bb129 3626 }
fd803241 3627 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
a9ebadd6 3628 tx_desc->upper.data = 0;
1da177e4 3629
96838a40 3630 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 3631 }
581d708e 3632
1da177e4
LT		 3633 eop = tx_ring->buffer_info[i].next_to_watch;
3634 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3635 }
3636
3637 tx_ring->next_to_clean = i;
3638
77b2aad5 3639#define TX_WAKE_THRESHOLD 32
843f4267 3640 if (unlikely(count && netif_carrier_ok(netdev) &&
65c7973f
JB		 3641 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
3642 /* Make sure that anybody stopping the queue after this
3643 * sees the new next_to_clean.
3644 */
3645 smp_mb();
cdd7549e
JB		 3646
3647 if (netif_queue_stopped(netdev) &&
3648 !(test_bit(__E1000_DOWN, &adapter->flags))) {
77b2aad5 3649 netif_wake_queue(netdev);
fcfb1224
JB		 3650 ++adapter->restart_queue;
3651 }
77b2aad5 3652 }
2648345f 3653
581d708e 3654 if (adapter->detect_tx_hung) {
2648345f 3655 /* Detect a transmit hang in hardware, this serializes the
1da177e4 3656 * check with the clearing of time_stamp and movement of i */
c3033b01 3657 adapter->detect_tx_hung = false;
cdd7549e
JB		 3658 if (tx_ring->buffer_info[eop].time_stamp &&
3659 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
8e95a202
JP		 3660 (adapter->tx_timeout_factor * HZ)) &&
3661 !(er32(STATUS) & E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 3662
3663 /* detected Tx unit hang */
feb8f478 3664 e_err(drv, "Detected Tx Unit Hang\n"
675ad473
ET		 3665 " Tx Queue <%lu>\n"
3666 " TDH <%x>\n"
3667 " TDT <%x>\n"
3668 " next_to_use <%x>\n"
3669 " next_to_clean <%x>\n"
3670 "buffer_info[next_to_clean]\n"
3671 " time_stamp <%lx>\n"
3672 " next_to_watch <%x>\n"
3673 " jiffies <%lx>\n"
3674 " next_to_watch.status <%x>\n",
7bfa4816
JK		 3675 (unsigned long)((tx_ring - adapter->tx_ring) /
3676 sizeof(struct e1000_tx_ring)),
1dc32918
JP		 3677 readl(hw->hw_addr + tx_ring->tdh),
3678 readl(hw->hw_addr + tx_ring->tdt),
70b8f1e1 3679 tx_ring->next_to_use,
392137fa 3680 tx_ring->next_to_clean,
cdd7549e 3681 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC		 3682 eop,
3683 jiffies,
3684 eop_desc->upper.fields.status);
1da177e4 3685 netif_stop_queue(netdev);
70b8f1e1 3686 }
1da177e4 3687 }
835bb129
JB		 3688 adapter->total_tx_bytes += total_tx_bytes;
3689 adapter->total_tx_packets += total_tx_packets;
5fe31def
AK		 3690 netdev->stats.tx_bytes += total_tx_bytes;
3691 netdev->stats.tx_packets += total_tx_packets;
807540ba 3692 return count < tx_ring->count;
1da177e4
LT		 3693}
3694
3695/**
3696 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3697 * @adapter: board private structure
3698 * @status_err: receive descriptor status and error fields
3699 * @csum: receive descriptor csum field
3700 * @sk_buff: socket buffer with received data
1da177e4
LT		 3701 **/
3702
64798845
JP		 3703static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
3704 u32 csum, struct sk_buff *skb)
1da177e4 3705{
1dc32918 3706 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 3707 u16 status = (u16)status_err;
3708 u8 errors = (u8)(status_err >> 24);
bc8acf2c
ED		 3709
3710 skb_checksum_none_assert(skb);
2d7edb92 3711
1da177e4 3712 /* 82543 or newer only */
1dc32918 3713 if (unlikely(hw->mac_type < e1000_82543)) return;
1da177e4 3714 /* Ignore Checksum bit is set */
96838a40 3715 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 3716 /* TCP/UDP checksum error bit is set */
96838a40 3717 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3718 /* let the stack verify checksum errors */
1da177e4 3719 adapter->hw_csum_err++;
2d7edb92
MC		 3720 return;
3721 }
3722 /* TCP/UDP Checksum has not been calculated */
1532ecea
JB		 3723 if (!(status & E1000_RXD_STAT_TCPCS))
3724 return;
3725
2d7edb92
MC		 3726 /* It must be a TCP or UDP packet with a valid checksum */
3727 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3728 /* TCP checksum is good */
3729 skb->ip_summed = CHECKSUM_UNNECESSARY;
1da177e4 3730 }
2d7edb92 3731 adapter->hw_csum_good++;
1da177e4
LT		 3732}
3733
edbbb3ca
JB		 3734/**
3735 * e1000_consume_page - helper function
3736 **/
3737static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
3738 u16 length)
3739{
3740 bi->page = NULL;
3741 skb->len += length;
3742 skb->data_len += length;
ed64b3cc 3743 skb->truesize += PAGE_SIZE;
edbbb3ca
JB		 3744}
3745
3746/**
3747 * e1000_receive_skb - helper function to handle rx indications
3748 * @adapter: board private structure
3749 * @status: descriptor status field as written by hardware
3750 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
3751 * @skb: pointer to sk_buff to be indicated to stack
3752 */
3753static void e1000_receive_skb(struct e1000_adapter *adapter, u8 status,
3754 __le16 vlan, struct sk_buff *skb)
3755{
6a08d194
JB		 3756 skb->protocol = eth_type_trans(skb, adapter->netdev);
3757
5622e404
JP		 3758 if (status & E1000_RXD_STAT_VP) {
3759 u16 vid = le16_to_cpu(vlan) & E1000_RXD_SPC_VLAN_MASK;
3760
3761 __vlan_hwaccel_put_tag(skb, vid);
3762 }
3763 napi_gro_receive(&adapter->napi, skb);
edbbb3ca
JB		 3764}
3765
3766/**
3767 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
3768 * @adapter: board private structure
3769 * @rx_ring: ring to clean
3770 * @work_done: amount of napi work completed this call
3771 * @work_to_do: max amount of work allowed for this call to do
3772 *
3773 * the return value indicates whether actual cleaning was done, there
3774 * is no guarantee that everything was cleaned
3775 */
3776static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
3777 struct e1000_rx_ring *rx_ring,
3778 int *work_done, int work_to_do)
3779{
3780 struct e1000_hw *hw = &adapter->hw;
3781 struct net_device *netdev = adapter->netdev;
3782 struct pci_dev *pdev = adapter->pdev;
3783 struct e1000_rx_desc *rx_desc, *next_rxd;
3784 struct e1000_buffer *buffer_info, *next_buffer;
3785 unsigned long irq_flags;
3786 u32 length;
3787 unsigned int i;
3788 int cleaned_count = 0;
3789 bool cleaned = false;
3790 unsigned int total_rx_bytes=0, total_rx_packets=0;
3791
3792 i = rx_ring->next_to_clean;
3793 rx_desc = E1000_RX_DESC(*rx_ring, i);
3794 buffer_info = &rx_ring->buffer_info[i];
3795
3796 while (rx_desc->status & E1000_RXD_STAT_DD) {
3797 struct sk_buff *skb;
3798 u8 status;
3799
3800 if (*work_done >= work_to_do)
3801 break;
3802 (*work_done)++;
2d0bb1c1 3803 rmb(); /* read descriptor and rx_buffer_info after status DD */
edbbb3ca
JB		 3804
3805 status = rx_desc->status;
3806 skb = buffer_info->skb;
3807 buffer_info->skb = NULL;
3808
3809 if (++i == rx_ring->count) i = 0;
3810 next_rxd = E1000_RX_DESC(*rx_ring, i);
3811 prefetch(next_rxd);
3812
3813 next_buffer = &rx_ring->buffer_info[i];
3814
3815 cleaned = true;
3816 cleaned_count++;
b16f53be
NN		 3817 dma_unmap_page(&pdev->dev, buffer_info->dma,
3818 buffer_info->length, DMA_FROM_DEVICE);
edbbb3ca
JB		 3819 buffer_info->dma = 0;
3820
3821 length = le16_to_cpu(rx_desc->length);
3822
3823 /* errors is only valid for DD + EOP descriptors */
3824 if (unlikely((status & E1000_RXD_STAT_EOP) &&
3825 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
3826 u8 last_byte = *(skb->data + length - 1);
3827 if (TBI_ACCEPT(hw, status, rx_desc->errors, length,
3828 last_byte)) {
3829 spin_lock_irqsave(&adapter->stats_lock,
3830 irq_flags);
3831 e1000_tbi_adjust_stats(hw, &adapter->stats,
3832 length, skb->data);
3833 spin_unlock_irqrestore(&adapter->stats_lock,
3834 irq_flags);
3835 length--;
3836 } else {
3837 /* recycle both page and skb */
3838 buffer_info->skb = skb;
3839 /* an error means any chain goes out the window
3840 * too */
3841 if (rx_ring->rx_skb_top)
3842 dev_kfree_skb(rx_ring->rx_skb_top);
3843 rx_ring->rx_skb_top = NULL;
3844 goto next_desc;
3845 }
3846 }
3847
3848#define rxtop rx_ring->rx_skb_top
3849 if (!(status & E1000_RXD_STAT_EOP)) {
3850 /* this descriptor is only the beginning (or middle) */
3851 if (!rxtop) {
3852 /* this is the beginning of a chain */
3853 rxtop = skb;
3854 skb_fill_page_desc(rxtop, 0, buffer_info->page,
3855 0, length);
3856 } else {
3857 /* this is the middle of a chain */
3858 skb_fill_page_desc(rxtop,
3859 skb_shinfo(rxtop)->nr_frags,
3860 buffer_info->page, 0, length);
3861 /* re-use the skb, only consumed the page */
3862 buffer_info->skb = skb;
3863 }
3864 e1000_consume_page(buffer_info, rxtop, length);
3865 goto next_desc;
3866 } else {
3867 if (rxtop) {
3868 /* end of the chain */
3869 skb_fill_page_desc(rxtop,
3870 skb_shinfo(rxtop)->nr_frags,
3871 buffer_info->page, 0, length);
3872 /* re-use the current skb, we only consumed the
3873 * page */
3874 buffer_info->skb = skb;
3875 skb = rxtop;
3876 rxtop = NULL;
3877 e1000_consume_page(buffer_info, skb, length);
3878 } else {
3879 /* no chain, got EOP, this buf is the packet
3880 * copybreak to save the put_page/alloc_page */
3881 if (length <= copybreak &&
3882 skb_tailroom(skb) >= length) {
3883 u8 *vaddr;
3884 vaddr = kmap_atomic(buffer_info->page,
3885 KM_SKB_DATA_SOFTIRQ);
3886 memcpy(skb_tail_pointer(skb), vaddr, length);
3887 kunmap_atomic(vaddr,
3888 KM_SKB_DATA_SOFTIRQ);
3889 /* re-use the page, so don't erase
3890 * buffer_info->page */
3891 skb_put(skb, length);
3892 } else {
3893 skb_fill_page_desc(skb, 0,
3894 buffer_info->page, 0,
3895 length);
3896 e1000_consume_page(buffer_info, skb,
3897 length);
3898 }
3899 }
3900 }
3901
3902 /* Receive Checksum Offload XXX recompute due to CRC strip? */
3903 e1000_rx_checksum(adapter,
3904 (u32)(status) |
3905 ((u32)(rx_desc->errors) << 24),
3906 le16_to_cpu(rx_desc->csum), skb);
3907
3908 pskb_trim(skb, skb->len - 4);
3909
3910 /* probably a little skewed due to removing CRC */
3911 total_rx_bytes += skb->len;
3912 total_rx_packets++;
3913
3914 /* eth type trans needs skb->data to point to something */
3915 if (!pskb_may_pull(skb, ETH_HLEN)) {
feb8f478 3916 e_err(drv, "pskb_may_pull failed.\n");
edbbb3ca
JB		 3917 dev_kfree_skb(skb);
3918 goto next_desc;
3919 }
3920
edbbb3ca
JB		 3921 e1000_receive_skb(adapter, status, rx_desc->special, skb);
3922
3923next_desc:
3924 rx_desc->status = 0;
3925
3926 /* return some buffers to hardware, one at a time is too slow */
3927 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3928 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3929 cleaned_count = 0;
3930 }
3931
3932 /* use prefetched values */
3933 rx_desc = next_rxd;
3934 buffer_info = next_buffer;
3935 }
3936 rx_ring->next_to_clean = i;
3937
3938 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3939 if (cleaned_count)
3940 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3941
3942 adapter->total_rx_packets += total_rx_packets;
3943 adapter->total_rx_bytes += total_rx_bytes;
5fe31def
AK		 3944 netdev->stats.rx_bytes += total_rx_bytes;
3945 netdev->stats.rx_packets += total_rx_packets;
edbbb3ca
JB		 3946 return cleaned;
3947}
3948
57bf6eef
JP		 3949/*
3950 * this should improve performance for small packets with large amounts
3951 * of reassembly being done in the stack
3952 */
3953static void e1000_check_copybreak(struct net_device *netdev,
3954 struct e1000_buffer *buffer_info,
3955 u32 length, struct sk_buff **skb)
3956{
3957 struct sk_buff *new_skb;
3958
3959 if (length > copybreak)
3960 return;
3961
3962 new_skb = netdev_alloc_skb_ip_align(netdev, length);
3963 if (!new_skb)
3964 return;
3965
3966 skb_copy_to_linear_data_offset(new_skb, -NET_IP_ALIGN,
3967 (*skb)->data - NET_IP_ALIGN,
3968 length + NET_IP_ALIGN);
3969 /* save the skb in buffer_info as good */
3970 buffer_info->skb = *skb;
3971 *skb = new_skb;
3972}
3973
1da177e4 3974/**
2d7edb92 3975 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4 3976 * @adapter: board private structure
edbbb3ca
JB		 3977 * @rx_ring: ring to clean
3978 * @work_done: amount of napi work completed this call
3979 * @work_to_do: max amount of work allowed for this call to do
3980 */
64798845
JP		 3981static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
3982 struct e1000_rx_ring *rx_ring,
3983 int *work_done, int work_to_do)
1da177e4 3984{
1dc32918 3985 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3986 struct net_device *netdev = adapter->netdev;
3987 struct pci_dev *pdev = adapter->pdev;
86c3d59f
JB		 3988 struct e1000_rx_desc *rx_desc, *next_rxd;
3989 struct e1000_buffer *buffer_info, *next_buffer;
1da177e4 3990 unsigned long flags;
406874a7 3991 u32 length;
1da177e4 3992 unsigned int i;
72d64a43 3993 int cleaned_count = 0;
c3033b01 3994 bool cleaned = false;
835bb129 3995 unsigned int total_rx_bytes=0, total_rx_packets=0;
1da177e4
LT		 3996
3997 i = rx_ring->next_to_clean;
3998 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 3999 buffer_info = &rx_ring->buffer_info[i];
1da177e4 4000
b92ff8ee 4001 while (rx_desc->status & E1000_RXD_STAT_DD) {
24f476ee 4002 struct sk_buff *skb;
a292ca6e 4003 u8 status;
90fb5135 4004
96838a40 4005 if (*work_done >= work_to_do)
1da177e4
LT		 4006 break;
4007 (*work_done)++;
2d0bb1c1 4008 rmb(); /* read descriptor and rx_buffer_info after status DD */
c3570acb 4009
a292ca6e 4010 status = rx_desc->status;
b92ff8ee 4011 skb = buffer_info->skb;
86c3d59f
JB		 4012 buffer_info->skb = NULL;
4013
30320be8
JK		 4014 prefetch(skb->data - NET_IP_ALIGN);
4015
86c3d59f
JB		 4016 if (++i == rx_ring->count) i = 0;
4017 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK		 4018 prefetch(next_rxd);
4019
86c3d59f 4020 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 4021
c3033b01 4022 cleaned = true;
72d64a43 4023 cleaned_count++;
b16f53be
NN		 4024 dma_unmap_single(&pdev->dev, buffer_info->dma,
4025 buffer_info->length, DMA_FROM_DEVICE);
679be3ba 4026 buffer_info->dma = 0;
1da177e4 4027
1da177e4 4028 length = le16_to_cpu(rx_desc->length);
ea30e119 4029 /* !EOP means multiple descriptors were used to store a single
40a14dea
JB		 4030 * packet, if thats the case we need to toss it. In fact, we
4031 * to toss every packet with the EOP bit clear and the next
4032 * frame that _does_ have the EOP bit set, as it is by
4033 * definition only a frame fragment
4034 */
4035 if (unlikely(!(status & E1000_RXD_STAT_EOP)))
4036 adapter->discarding = true;
4037
4038 if (adapter->discarding) {
a1415ee6 4039 /* All receives must fit into a single buffer */
feb8f478 4040 e_dbg("Receive packet consumed multiple buffers\n");
864c4e45 4041 /* recycle */
8fc897b0 4042 buffer_info->skb = skb;
40a14dea
JB		 4043 if (status & E1000_RXD_STAT_EOP)
4044 adapter->discarding = false;
1da177e4
LT		 4045 goto next_desc;
4046 }
4047
96838a40 4048 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
edbbb3ca 4049 u8 last_byte = *(skb->data + length - 1);
1dc32918
JP		 4050 if (TBI_ACCEPT(hw, status, rx_desc->errors, length,
4051 last_byte)) {
1da177e4 4052 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4053 e1000_tbi_adjust_stats(hw, &adapter->stats,
1da177e4
LT		 4054 length, skb->data);
4055 spin_unlock_irqrestore(&adapter->stats_lock,
4056 flags);
4057 length--;
4058 } else {
9e2feace
AK		 4059 /* recycle */
4060 buffer_info->skb = skb;
1da177e4
LT		 4061 goto next_desc;
4062 }
1cb5821f 4063 }
1da177e4 4064
d2a1e213
JB		 4065 /* adjust length to remove Ethernet CRC, this must be
4066 * done after the TBI_ACCEPT workaround above */
4067 length -= 4;
4068
835bb129
JB		 4069 /* probably a little skewed due to removing CRC */
4070 total_rx_bytes += length;
4071 total_rx_packets++;
4072
57bf6eef
JP		 4073 e1000_check_copybreak(netdev, buffer_info, length, &skb);
4074
996695de 4075 skb_put(skb, length);
1da177e4
LT		 4076
4077 /* Receive Checksum Offload */
a292ca6e 4078 e1000_rx_checksum(adapter,
406874a7
JP		 4079 (u32)(status) |
4080 ((u32)(rx_desc->errors) << 24),
c3d7a3a4 4081 le16_to_cpu(rx_desc->csum), skb);
96838a40 4082
edbbb3ca 4083 e1000_receive_skb(adapter, status, rx_desc->special, skb);
c3570acb 4084
1da177e4
LT		 4085next_desc:
4086 rx_desc->status = 0;
1da177e4 4087
72d64a43
JK		 4088 /* return some buffers to hardware, one at a time is too slow */
4089 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4090 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4091 cleaned_count = 0;
4092 }
4093
30320be8 4094 /* use prefetched values */
86c3d59f
JB		 4095 rx_desc = next_rxd;
4096 buffer_info = next_buffer;
1da177e4 4097 }
1da177e4 4098 rx_ring->next_to_clean = i;
72d64a43
JK		 4099
4100 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4101 if (cleaned_count)
4102 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92 4103
835bb129
JB		 4104 adapter->total_rx_packets += total_rx_packets;
4105 adapter->total_rx_bytes += total_rx_bytes;
5fe31def
AK		 4106 netdev->stats.rx_bytes += total_rx_bytes;
4107 netdev->stats.rx_packets += total_rx_packets;
2d7edb92
MC		 4108 return cleaned;
4109}
4110
edbbb3ca
JB		 4111/**
4112 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
4113 * @adapter: address of board private structure
4114 * @rx_ring: pointer to receive ring structure
4115 * @cleaned_count: number of buffers to allocate this pass
4116 **/
4117
4118static void
4119e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
4120 struct e1000_rx_ring *rx_ring, int cleaned_count)
4121{
4122 struct net_device *netdev = adapter->netdev;
4123 struct pci_dev *pdev = adapter->pdev;
4124 struct e1000_rx_desc *rx_desc;
4125 struct e1000_buffer *buffer_info;
4126 struct sk_buff *skb;
4127 unsigned int i;
89d71a66 4128 unsigned int bufsz = 256 - 16 /*for skb_reserve */ ;
edbbb3ca
JB		 4129
4130 i = rx_ring->next_to_use;
4131 buffer_info = &rx_ring->buffer_info[i];
4132
4133 while (cleaned_count--) {
4134 skb = buffer_info->skb;
4135 if (skb) {
4136 skb_trim(skb, 0);
4137 goto check_page;
4138 }
4139
89d71a66 4140 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
edbbb3ca
JB		 4141 if (unlikely(!skb)) {
4142 /* Better luck next round */
4143 adapter->alloc_rx_buff_failed++;
4144 break;
4145 }
4146
4147 /* Fix for errata 23, can't cross 64kB boundary */
4148 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4149 struct sk_buff *oldskb = skb;
feb8f478
ET		 4150 e_err(rx_err, "skb align check failed: %u bytes at "
4151 "%p\n", bufsz, skb->data);
edbbb3ca 4152 /* Try again, without freeing the previous */
89d71a66 4153 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
edbbb3ca
JB		 4154 /* Failed allocation, critical failure */
4155 if (!skb) {
4156 dev_kfree_skb(oldskb);
4157 adapter->alloc_rx_buff_failed++;
4158 break;
4159 }
4160
4161 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4162 /* give up */
4163 dev_kfree_skb(skb);
4164 dev_kfree_skb(oldskb);
4165 break; /* while (cleaned_count--) */
4166 }
4167
4168 /* Use new allocation */
4169 dev_kfree_skb(oldskb);
4170 }
edbbb3ca
JB		 4171 buffer_info->skb = skb;
4172 buffer_info->length = adapter->rx_buffer_len;
4173check_page:
4174 /* allocate a new page if necessary */
4175 if (!buffer_info->page) {
4176 buffer_info->page = alloc_page(GFP_ATOMIC);
4177 if (unlikely(!buffer_info->page)) {
4178 adapter->alloc_rx_buff_failed++;
4179 break;
4180 }
4181 }
4182
b5abb028 4183 if (!buffer_info->dma) {
b16f53be 4184 buffer_info->dma = dma_map_page(&pdev->dev,
edbbb3ca 4185 buffer_info->page, 0,
b16f53be
NN		 4186 buffer_info->length,
4187 DMA_FROM_DEVICE);
4188 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
b5abb028
AB		 4189 put_page(buffer_info->page);
4190 dev_kfree_skb(skb);
4191 buffer_info->page = NULL;
4192 buffer_info->skb = NULL;
4193 buffer_info->dma = 0;
4194 adapter->alloc_rx_buff_failed++;
4195 break; /* while !buffer_info->skb */
4196 }
4197 }
edbbb3ca
JB		 4198
4199 rx_desc = E1000_RX_DESC(*rx_ring, i);
4200 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4201
4202 if (unlikely(++i == rx_ring->count))
4203 i = 0;
4204 buffer_info = &rx_ring->buffer_info[i];
4205 }
4206
4207 if (likely(rx_ring->next_to_use != i)) {
4208 rx_ring->next_to_use = i;
4209 if (unlikely(i-- == 0))
4210 i = (rx_ring->count - 1);
4211
4212 /* Force memory writes to complete before letting h/w
4213 * know there are new descriptors to fetch. (Only
4214 * applicable for weak-ordered memory model archs,
4215 * such as IA-64). */
4216 wmb();
4217 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4218 }
4219}
4220
1da177e4 4221/**
2d7edb92 4222 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 4223 * @adapter: address of board private structure
4224 **/
4225
64798845
JP		 4226static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4227 struct e1000_rx_ring *rx_ring,
4228 int cleaned_count)
1da177e4 4229{
1dc32918 4230 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4231 struct net_device *netdev = adapter->netdev;
4232 struct pci_dev *pdev = adapter->pdev;
4233 struct e1000_rx_desc *rx_desc;
4234 struct e1000_buffer *buffer_info;
4235 struct sk_buff *skb;
2648345f 4236 unsigned int i;
89d71a66 4237 unsigned int bufsz = adapter->rx_buffer_len;
1da177e4
LT		 4238
4239 i = rx_ring->next_to_use;
4240 buffer_info = &rx_ring->buffer_info[i];
4241
a292ca6e 4242 while (cleaned_count--) {
ca6f7224
CH		 4243 skb = buffer_info->skb;
4244 if (skb) {
a292ca6e
JK		 4245 skb_trim(skb, 0);
4246 goto map_skb;
4247 }
4248
89d71a66 4249 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
96838a40 4250 if (unlikely(!skb)) {
1da177e4 4251 /* Better luck next round */
72d64a43 4252 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4253 break;
4254 }
4255
2648345f 4256 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 4257 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4258 struct sk_buff *oldskb = skb;
feb8f478
ET		 4259 e_err(rx_err, "skb align check failed: %u bytes at "
4260 "%p\n", bufsz, skb->data);
2648345f 4261 /* Try again, without freeing the previous */
89d71a66 4262 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
2648345f 4263 /* Failed allocation, critical failure */
1da177e4
LT		 4264 if (!skb) {
4265 dev_kfree_skb(oldskb);
edbbb3ca 4266 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4267 break;
4268 }
2648345f 4269
1da177e4
LT		 4270 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4271 /* give up */
4272 dev_kfree_skb(skb);
4273 dev_kfree_skb(oldskb);
edbbb3ca 4274 adapter->alloc_rx_buff_failed++;
1da177e4 4275 break; /* while !buffer_info->skb */
1da177e4 4276 }
ca6f7224
CH		 4277
4278 /* Use new allocation */
4279 dev_kfree_skb(oldskb);
1da177e4 4280 }
1da177e4
LT		 4281 buffer_info->skb = skb;
4282 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 4283map_skb:
b16f53be 4284 buffer_info->dma = dma_map_single(&pdev->dev,
1da177e4 4285 skb->data,
edbbb3ca 4286 buffer_info->length,
b16f53be
NN		 4287 DMA_FROM_DEVICE);
4288 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
b5abb028
AB		 4289 dev_kfree_skb(skb);
4290 buffer_info->skb = NULL;
4291 buffer_info->dma = 0;
4292 adapter->alloc_rx_buff_failed++;
4293 break; /* while !buffer_info->skb */
4294 }
1da177e4 4295
edbbb3ca
JB		 4296 /*
4297 * XXX if it was allocated cleanly it will never map to a
4298 * boundary crossing
4299 */
4300
2648345f
MC		 4301 /* Fix for errata 23, can't cross 64kB boundary */
4302 if (!e1000_check_64k_bound(adapter,
4303 (void *)(unsigned long)buffer_info->dma,
4304 adapter->rx_buffer_len)) {
feb8f478
ET		 4305 e_err(rx_err, "dma align check failed: %u bytes at "
4306 "%p\n", adapter->rx_buffer_len,
675ad473 4307 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 4308 dev_kfree_skb(skb);
4309 buffer_info->skb = NULL;
4310
b16f53be 4311 dma_unmap_single(&pdev->dev, buffer_info->dma,
1da177e4 4312 adapter->rx_buffer_len,
b16f53be 4313 DMA_FROM_DEVICE);
679be3ba 4314 buffer_info->dma = 0;
1da177e4 4315
edbbb3ca 4316 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4317 break; /* while !buffer_info->skb */
4318 }
1da177e4
LT		 4319 rx_desc = E1000_RX_DESC(*rx_ring, i);
4320 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4321
96838a40
JB		 4322 if (unlikely(++i == rx_ring->count))
4323 i = 0;
1da177e4
LT		 4324 buffer_info = &rx_ring->buffer_info[i];
4325 }
4326
b92ff8ee
JB		 4327 if (likely(rx_ring->next_to_use != i)) {
4328 rx_ring->next_to_use = i;
4329 if (unlikely(i-- == 0))
4330 i = (rx_ring->count - 1);
4331
4332 /* Force memory writes to complete before letting h/w
4333 * know there are new descriptors to fetch. (Only
4334 * applicable for weak-ordered memory model archs,
4335 * such as IA-64). */
4336 wmb();
1dc32918 4337 writel(i, hw->hw_addr + rx_ring->rdt);
b92ff8ee 4338 }
1da177e4
LT		 4339}
4340
4341/**
4342 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4343 * @adapter:
4344 **/
4345
64798845 4346static void e1000_smartspeed(struct e1000_adapter *adapter)
1da177e4 4347{
1dc32918 4348 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 4349 u16 phy_status;
4350 u16 phy_ctrl;
1da177e4 4351
1dc32918
JP		 4352 if ((hw->phy_type != e1000_phy_igp) || !hw->autoneg ||
4353 !(hw->autoneg_advertised & ADVERTISE_1000_FULL))
1da177e4
LT		 4354 return;
4355
96838a40 4356 if (adapter->smartspeed == 0) {
1da177e4
LT		 4357 /* If Master/Slave config fault is asserted twice,
4358 * we assume back-to-back */
1dc32918 4359 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4360 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4361 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4362 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4363 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4364 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4 4365 phy_ctrl &= ~CR_1000T_MS_ENABLE;
1dc32918 4366 e1000_write_phy_reg(hw, PHY_1000T_CTRL,
1da177e4
LT		 4367 phy_ctrl);
4368 adapter->smartspeed++;
1dc32918
JP		 4369 if (!e1000_phy_setup_autoneg(hw) &&
4370 !e1000_read_phy_reg(hw, PHY_CTRL,
1da177e4
LT		 4371 &phy_ctrl)) {
4372 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4373 MII_CR_RESTART_AUTO_NEG);
1dc32918 4374 e1000_write_phy_reg(hw, PHY_CTRL,
1da177e4
LT		 4375 phy_ctrl);
4376 }
4377 }
4378 return;
96838a40 4379 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4 4380 /* If still no link, perhaps using 2/3 pair cable */
1dc32918 4381 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
1da177e4 4382 phy_ctrl |= CR_1000T_MS_ENABLE;
1dc32918
JP		 4383 e1000_write_phy_reg(hw, PHY_1000T_CTRL, phy_ctrl);
4384 if (!e1000_phy_setup_autoneg(hw) &&
4385 !e1000_read_phy_reg(hw, PHY_CTRL, &phy_ctrl)) {
1da177e4
LT		 4386 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4387 MII_CR_RESTART_AUTO_NEG);
1dc32918 4388 e1000_write_phy_reg(hw, PHY_CTRL, phy_ctrl);
1da177e4
LT		 4389 }
4390 }
4391 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4392 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4393 adapter->smartspeed = 0;
4394}
4395
4396/**
4397 * e1000_ioctl -
4398 * @netdev:
4399 * @ifreq:
4400 * @cmd:
4401 **/
4402
64798845 4403static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1da177e4
LT		 4404{
4405 switch (cmd) {
4406 case SIOCGMIIPHY:
4407 case SIOCGMIIREG:
4408 case SIOCSMIIREG:
4409 return e1000_mii_ioctl(netdev, ifr, cmd);
4410 default:
4411 return -EOPNOTSUPP;
4412 }
4413}
4414
4415/**
4416 * e1000_mii_ioctl -
4417 * @netdev:
4418 * @ifreq:
4419 * @cmd:
4420 **/
4421
64798845
JP		 4422static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4423 int cmd)
1da177e4 4424{
60490fe0 4425 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4426 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4427 struct mii_ioctl_data *data = if_mii(ifr);
4428 int retval;
406874a7 4429 u16 mii_reg;
97876fc6 4430 unsigned long flags;
1da177e4 4431
1dc32918 4432 if (hw->media_type != e1000_media_type_copper)
1da177e4
LT		 4433 return -EOPNOTSUPP;
4434
4435 switch (cmd) {
4436 case SIOCGMIIPHY:
1dc32918 4437 data->phy_id = hw->phy_addr;
1da177e4
LT		 4438 break;
4439 case SIOCGMIIREG:
97876fc6 4440 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4441 if (e1000_read_phy_reg(hw, data->reg_num & 0x1F,
97876fc6
MC		 4442 &data->val_out)) {
4443 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4444 return -EIO;
97876fc6
MC		 4445 }
4446 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4447 break;
4448 case SIOCSMIIREG:
96838a40 4449 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4450 return -EFAULT;
4451 mii_reg = data->val_in;
97876fc6 4452 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4453 if (e1000_write_phy_reg(hw, data->reg_num,
97876fc6
MC		 4454 mii_reg)) {
4455 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4456 return -EIO;
97876fc6 4457 }
f0163ac4 4458 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1dc32918 4459 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 4460 switch (data->reg_num) {
4461 case PHY_CTRL:
96838a40 4462 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4463 break;
96838a40 4464 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1dc32918
JP		 4465 hw->autoneg = 1;
4466 hw->autoneg_advertised = 0x2F;
1da177e4 4467 } else {
14ad2513 4468 u32 speed;
1da177e4 4469 if (mii_reg & 0x40)
14ad2513 4470 speed = SPEED_1000;
1da177e4 4471 else if (mii_reg & 0x2000)
14ad2513 4472 speed = SPEED_100;
1da177e4 4473 else
14ad2513
DD		 4474 speed = SPEED_10;
4475 retval = e1000_set_spd_dplx(
4476 adapter, speed,
4477 ((mii_reg & 0x100)
4478 ? DUPLEX_FULL :
4479 DUPLEX_HALF));
f0163ac4 4480 if (retval)
1da177e4
LT		 4481 return retval;
4482 }
2db10a08
AK		 4483 if (netif_running(adapter->netdev))
4484 e1000_reinit_locked(adapter);
4485 else
1da177e4
LT		 4486 e1000_reset(adapter);
4487 break;
4488 case M88E1000_PHY_SPEC_CTRL:
4489 case M88E1000_EXT_PHY_SPEC_CTRL:
1dc32918 4490 if (e1000_phy_reset(hw))
1da177e4
LT		 4491 return -EIO;
4492 break;
4493 }
4494 } else {
4495 switch (data->reg_num) {
4496 case PHY_CTRL:
96838a40 4497 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4498 break;
2db10a08
AK		 4499 if (netif_running(adapter->netdev))
4500 e1000_reinit_locked(adapter);
4501 else
1da177e4
LT		 4502 e1000_reset(adapter);
4503 break;
4504 }
4505 }
4506 break;
4507 default:
4508 return -EOPNOTSUPP;
4509 }
4510 return E1000_SUCCESS;
4511}
4512
64798845 4513void e1000_pci_set_mwi(struct e1000_hw *hw)
1da177e4
LT		 4514{
4515 struct e1000_adapter *adapter = hw->back;
2648345f 4516 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4517
96838a40 4518 if (ret_val)
feb8f478 4519 e_err(probe, "Error in setting MWI\n");
1da177e4
LT		 4520}
4521
64798845 4522void e1000_pci_clear_mwi(struct e1000_hw *hw)
1da177e4
LT		 4523{
4524 struct e1000_adapter *adapter = hw->back;
4525
4526 pci_clear_mwi(adapter->pdev);
4527}
4528
64798845 4529int e1000_pcix_get_mmrbc(struct e1000_hw *hw)
007755eb
PO		 4530{
4531 struct e1000_adapter *adapter = hw->back;
4532 return pcix_get_mmrbc(adapter->pdev);
4533}
4534
64798845 4535void e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc)
007755eb
PO		 4536{
4537 struct e1000_adapter *adapter = hw->back;
4538 pcix_set_mmrbc(adapter->pdev, mmrbc);
4539}
4540
64798845 4541void e1000_io_write(struct e1000_hw *hw, unsigned long port, u32 value)
1da177e4
LT		 4542{
4543 outl(value, port);
4544}
4545
5622e404
JP		 4546static bool e1000_vlan_used(struct e1000_adapter *adapter)
4547{
4548 u16 vid;
4549
4550 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
4551 return true;
4552 return false;
4553}
4554
4555static void e1000_vlan_filter_on_off(struct e1000_adapter *adapter,
4556 bool filter_on)
1da177e4 4557{
1dc32918 4558 struct e1000_hw *hw = &adapter->hw;
5622e404 4559 u32 rctl;
1da177e4 4560
9150b76a
JB		 4561 if (!test_bit(__E1000_DOWN, &adapter->flags))
4562 e1000_irq_disable(adapter);
1da177e4 4563
5622e404 4564 if (filter_on) {
1532ecea
JB		 4565 /* enable VLAN receive filtering */
4566 rctl = er32(RCTL);
4567 rctl &= ~E1000_RCTL_CFIEN;
5622e404 4568 if (!(adapter->netdev->flags & IFF_PROMISC))
1532ecea
JB		 4569 rctl |= E1000_RCTL_VFE;
4570 ew32(RCTL, rctl);
4571 e1000_update_mng_vlan(adapter);
1da177e4 4572 } else {
1532ecea
JB		 4573 /* disable VLAN receive filtering */
4574 rctl = er32(RCTL);
4575 rctl &= ~E1000_RCTL_VFE;
4576 ew32(RCTL, rctl);
5622e404 4577 }
fd38d7a0 4578
5622e404
JP		 4579 if (!test_bit(__E1000_DOWN, &adapter->flags))
4580 e1000_irq_enable(adapter);
4581}
4582
c8f44aff
MM		 4583static void e1000_vlan_mode(struct net_device *netdev,
4584 netdev_features_t features)
5622e404
JP		 4585{
4586 struct e1000_adapter *adapter = netdev_priv(netdev);
4587 struct e1000_hw *hw = &adapter->hw;
4588 u32 ctrl;
4589
4590 if (!test_bit(__E1000_DOWN, &adapter->flags))
4591 e1000_irq_disable(adapter);
4592
4593 ctrl = er32(CTRL);
4594 if (features & NETIF_F_HW_VLAN_RX) {
4595 /* enable VLAN tag insert/strip */
4596 ctrl |= E1000_CTRL_VME;
4597 } else {
4598 /* disable VLAN tag insert/strip */
4599 ctrl &= ~E1000_CTRL_VME;
1da177e4 4600 }
5622e404 4601 ew32(CTRL, ctrl);
1da177e4 4602
9150b76a
JB		 4603 if (!test_bit(__E1000_DOWN, &adapter->flags))
4604 e1000_irq_enable(adapter);
1da177e4
LT		 4605}
4606
64798845 4607static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1da177e4 4608{
60490fe0 4609 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4610 struct e1000_hw *hw = &adapter->hw;
406874a7 4611 u32 vfta, index;
96838a40 4612
1dc32918 4613 if ((hw->mng_cookie.status &
96838a40
JB		 4614 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4615 (vid == adapter->mng_vlan_id))
2d7edb92 4616 return;
5622e404
JP		 4617
4618 if (!e1000_vlan_used(adapter))
4619 e1000_vlan_filter_on_off(adapter, true);
4620
1da177e4
LT		 4621 /* add VID to filter table */
4622 index = (vid >> 5) & 0x7F;
1dc32918 4623 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4624 vfta |= (1 << (vid & 0x1F));
1dc32918 4625 e1000_write_vfta(hw, index, vfta);
5622e404
JP		 4626
4627 set_bit(vid, adapter->active_vlans);
1da177e4
LT		 4628}
4629
64798845 4630static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1da177e4 4631{
60490fe0 4632 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4633 struct e1000_hw *hw = &adapter->hw;
406874a7 4634 u32 vfta, index;
1da177e4 4635
9150b76a
JB		 4636 if (!test_bit(__E1000_DOWN, &adapter->flags))
4637 e1000_irq_disable(adapter);
9150b76a
JB		 4638 if (!test_bit(__E1000_DOWN, &adapter->flags))
4639 e1000_irq_enable(adapter);
1da177e4
LT		 4640
4641 /* remove VID from filter table */
4642 index = (vid >> 5) & 0x7F;
1dc32918 4643 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4644 vfta &= ~(1 << (vid & 0x1F));
1dc32918 4645 e1000_write_vfta(hw, index, vfta);
5622e404
JP		 4646
4647 clear_bit(vid, adapter->active_vlans);
4648
4649 if (!e1000_vlan_used(adapter))
4650 e1000_vlan_filter_on_off(adapter, false);
1da177e4
LT		 4651}
4652
64798845 4653static void e1000_restore_vlan(struct e1000_adapter *adapter)
1da177e4 4654{
5622e404 4655 u16 vid;
1da177e4 4656
5622e404
JP		 4657 if (!e1000_vlan_used(adapter))
4658 return;
4659
4660 e1000_vlan_filter_on_off(adapter, true);
4661 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
4662 e1000_vlan_rx_add_vid(adapter->netdev, vid);
1da177e4
LT		 4663}
4664
14ad2513 4665int e1000_set_spd_dplx(struct e1000_adapter *adapter, u32 spd, u8 dplx)
1da177e4 4666{
1dc32918
JP		 4667 struct e1000_hw *hw = &adapter->hw;
4668
4669 hw->autoneg = 0;
1da177e4 4670
14ad2513
DD		 4671 /* Make sure dplx is at most 1 bit and lsb of speed is not set
4672 * for the switch() below to work */
4673 if ((spd & 1) || (dplx & ~1))
4674 goto err_inval;
4675
6921368f 4676 /* Fiber NICs only allow 1000 gbps Full duplex */
1dc32918 4677 if ((hw->media_type == e1000_media_type_fiber) &&
14ad2513
DD		 4678 spd != SPEED_1000 &&
4679 dplx != DUPLEX_FULL)
4680 goto err_inval;
6921368f 4681
14ad2513 4682 switch (spd + dplx) {
1da177e4 4683 case SPEED_10 + DUPLEX_HALF:
1dc32918 4684 hw->forced_speed_duplex = e1000_10_half;
1da177e4
LT		 4685 break;
4686 case SPEED_10 + DUPLEX_FULL:
1dc32918 4687 hw->forced_speed_duplex = e1000_10_full;
1da177e4
LT		 4688 break;
4689 case SPEED_100 + DUPLEX_HALF:
1dc32918 4690 hw->forced_speed_duplex = e1000_100_half;
1da177e4
LT		 4691 break;
4692 case SPEED_100 + DUPLEX_FULL:
1dc32918 4693 hw->forced_speed_duplex = e1000_100_full;
1da177e4
LT		 4694 break;
4695 case SPEED_1000 + DUPLEX_FULL:
1dc32918
JP		 4696 hw->autoneg = 1;
4697 hw->autoneg_advertised = ADVERTISE_1000_FULL;
1da177e4
LT		 4698 break;
4699 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4700 default:
14ad2513 4701 goto err_inval;
1da177e4
LT		 4702 }
4703 return 0;
14ad2513
DD		 4704
4705err_inval:
4706 e_err(probe, "Unsupported Speed/Duplex configuration\n");
4707 return -EINVAL;
1da177e4
LT		 4708}
4709
b43fcd7d 4710static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake)
1da177e4
LT		 4711{
4712 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4713 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4714 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 4715 u32 ctrl, ctrl_ext, rctl, status;
4716 u32 wufc = adapter->wol;
6fdfef16 4717#ifdef CONFIG_PM
240b1710 4718 int retval = 0;
6fdfef16 4719#endif
1da177e4
LT		 4720
4721 netif_device_detach(netdev);
4722
0ef4eedc
JB		 4723 mutex_lock(&adapter->mutex);
4724
2db10a08
AK		 4725 if (netif_running(netdev)) {
4726 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 4727 e1000_down(adapter);
2db10a08 4728 }
1da177e4 4729
2f82665f 4730#ifdef CONFIG_PM
1d33e9c6 4731 retval = pci_save_state(pdev);
0ef4eedc
JB		 4732 if (retval) {
4733 mutex_unlock(&adapter->mutex);
2f82665f 4734 return retval;
0ef4eedc 4735 }
2f82665f
JB		 4736#endif
4737
1dc32918 4738 status = er32(STATUS);
96838a40 4739 if (status & E1000_STATUS_LU)
1da177e4
LT		 4740 wufc &= ~E1000_WUFC_LNKC;
4741
96838a40 4742 if (wufc) {
1da177e4 4743 e1000_setup_rctl(adapter);
db0ce50d 4744 e1000_set_rx_mode(netdev);
1da177e4
LT		 4745
4746 /* turn on all-multi mode if wake on multicast is enabled */
120cd576 4747 if (wufc & E1000_WUFC_MC) {
1dc32918 4748 rctl = er32(RCTL);
1da177e4 4749 rctl |= E1000_RCTL_MPE;
1dc32918 4750 ew32(RCTL, rctl);
1da177e4
LT		 4751 }
4752
1dc32918
JP		 4753 if (hw->mac_type >= e1000_82540) {
4754 ctrl = er32(CTRL);
1da177e4
LT		 4755 /* advertise wake from D3Cold */
4756 #define E1000_CTRL_ADVD3WUC 0x00100000
4757 /* phy power management enable */
4758 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4759 ctrl |= E1000_CTRL_ADVD3WUC |
4760 E1000_CTRL_EN_PHY_PWR_MGMT;
1dc32918 4761 ew32(CTRL, ctrl);
1da177e4
LT		 4762 }
4763
1dc32918 4764 if (hw->media_type == e1000_media_type_fiber ||
1532ecea 4765 hw->media_type == e1000_media_type_internal_serdes) {
1da177e4 4766 /* keep the laser running in D3 */
1dc32918 4767 ctrl_ext = er32(CTRL_EXT);
1da177e4 4768 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
1dc32918 4769 ew32(CTRL_EXT, ctrl_ext);
1da177e4
LT		 4770 }
4771
1dc32918
JP		 4772 ew32(WUC, E1000_WUC_PME_EN);
4773 ew32(WUFC, wufc);
1da177e4 4774 } else {
1dc32918
JP		 4775 ew32(WUC, 0);
4776 ew32(WUFC, 0);
1da177e4
LT		 4777 }
4778
0fccd0e9
JG		 4779 e1000_release_manageability(adapter);
4780
b43fcd7d
RW		 4781 *enable_wake = !!wufc;
4782
0fccd0e9 4783 /* make sure adapter isn't asleep if manageability is enabled */
b43fcd7d
RW		 4784 if (adapter->en_mng_pt)
4785 *enable_wake = true;
1da177e4 4786
edd106fc
AK		 4787 if (netif_running(netdev))
4788 e1000_free_irq(adapter);
4789
0ef4eedc
JB		 4790 mutex_unlock(&adapter->mutex);
4791
1da177e4 4792 pci_disable_device(pdev);
240b1710 4793
1da177e4
LT		 4794 return 0;
4795}
4796
2f82665f 4797#ifdef CONFIG_PM
b43fcd7d
RW		 4798static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
4799{
4800 int retval;
4801 bool wake;
4802
4803 retval = __e1000_shutdown(pdev, &wake);
4804 if (retval)
4805 return retval;
4806
4807 if (wake) {
4808 pci_prepare_to_sleep(pdev);
4809 } else {
4810 pci_wake_from_d3(pdev, false);
4811 pci_set_power_state(pdev, PCI_D3hot);
4812 }
4813
4814 return 0;
4815}
4816
64798845 4817static int e1000_resume(struct pci_dev *pdev)
1da177e4
LT		 4818{
4819 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4820 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4821 struct e1000_hw *hw = &adapter->hw;
406874a7 4822 u32 err;
1da177e4 4823
d0e027db 4824 pci_set_power_state(pdev, PCI_D0);
1d33e9c6 4825 pci_restore_state(pdev);
dbb5aaeb 4826 pci_save_state(pdev);
81250297
TI		 4827
4828 if (adapter->need_ioport)
4829 err = pci_enable_device(pdev);
4830 else
4831 err = pci_enable_device_mem(pdev);
c7be73bc 4832 if (err) {
675ad473 4833 pr_err("Cannot enable PCI device from suspend\n");
3d1dd8cb
AK		 4834 return err;
4835 }
a4cb847d 4836 pci_set_master(pdev);
1da177e4 4837
d0e027db
AK		 4838 pci_enable_wake(pdev, PCI_D3hot, 0);
4839 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4 4840
c7be73bc
JP		 4841 if (netif_running(netdev)) {
4842 err = e1000_request_irq(adapter);
4843 if (err)
4844 return err;
4845 }
edd106fc
AK		 4846
4847 e1000_power_up_phy(adapter);
1da177e4 4848 e1000_reset(adapter);
1dc32918 4849 ew32(WUS, ~0);
1da177e4 4850
0fccd0e9
JG		 4851 e1000_init_manageability(adapter);
4852
96838a40 4853 if (netif_running(netdev))
1da177e4
LT		 4854 e1000_up(adapter);
4855
4856 netif_device_attach(netdev);
4857
1da177e4
LT		 4858 return 0;
4859}
4860#endif
c653e635
AK		 4861
4862static void e1000_shutdown(struct pci_dev *pdev)
4863{
b43fcd7d
RW		 4864 bool wake;
4865
4866 __e1000_shutdown(pdev, &wake);
4867
4868 if (system_state == SYSTEM_POWER_OFF) {
4869 pci_wake_from_d3(pdev, wake);
4870 pci_set_power_state(pdev, PCI_D3hot);
4871 }
c653e635
AK		 4872}
4873
1da177e4
LT		 4874#ifdef CONFIG_NET_POLL_CONTROLLER
4875/*
4876 * Polling 'interrupt' - used by things like netconsole to send skbs
4877 * without having to re-enable interrupts. It's not called while
4878 * the interrupt routine is executing.
4879 */
64798845 4880static void e1000_netpoll(struct net_device *netdev)
1da177e4 4881{
60490fe0 4882 struct e1000_adapter *adapter = netdev_priv(netdev);
d3d9e484 4883
1da177e4 4884 disable_irq(adapter->pdev->irq);
7d12e780 4885 e1000_intr(adapter->pdev->irq, netdev);
1da177e4
LT		 4886 enable_irq(adapter->pdev->irq);
4887}
4888#endif
4889
9026729b
AK		 4890/**
4891 * e1000_io_error_detected - called when PCI error is detected
4892 * @pdev: Pointer to PCI device
120a5d0d 4893 * @state: The current pci connection state
9026729b
AK		 4894 *
4895 * This function is called after a PCI bus error affecting
4896 * this device has been detected.
4897 */
64798845
JP		 4898static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
4899 pci_channel_state_t state)
9026729b
AK		 4900{
4901 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 4902 struct e1000_adapter *adapter = netdev_priv(netdev);
9026729b
AK		 4903
4904 netif_device_detach(netdev);
4905
eab63302
AD		 4906 if (state == pci_channel_io_perm_failure)
4907 return PCI_ERS_RESULT_DISCONNECT;
4908
9026729b
AK		 4909 if (netif_running(netdev))
4910 e1000_down(adapter);
72e8d6bb 4911 pci_disable_device(pdev);
9026729b
AK		 4912
4913 /* Request a slot slot reset. */
4914 return PCI_ERS_RESULT_NEED_RESET;
4915}
4916
4917/**
4918 * e1000_io_slot_reset - called after the pci bus has been reset.
4919 * @pdev: Pointer to PCI device
4920 *
4921 * Restart the card from scratch, as if from a cold-boot. Implementation
4922 * resembles the first-half of the e1000_resume routine.
4923 */
4924static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4925{
4926 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 4927 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4928 struct e1000_hw *hw = &adapter->hw;
81250297 4929 int err;
9026729b 4930
81250297
TI		 4931 if (adapter->need_ioport)
4932 err = pci_enable_device(pdev);
4933 else
4934 err = pci_enable_device_mem(pdev);
4935 if (err) {
675ad473 4936 pr_err("Cannot re-enable PCI device after reset.\n");
9026729b
AK		 4937 return PCI_ERS_RESULT_DISCONNECT;
4938 }
4939 pci_set_master(pdev);
4940
dbf38c94
LV		 4941 pci_enable_wake(pdev, PCI_D3hot, 0);
4942 pci_enable_wake(pdev, PCI_D3cold, 0);
9026729b 4943
9026729b 4944 e1000_reset(adapter);
1dc32918 4945 ew32(WUS, ~0);
9026729b
AK		 4946
4947 return PCI_ERS_RESULT_RECOVERED;
4948}
4949
4950/**
4951 * e1000_io_resume - called when traffic can start flowing again.
4952 * @pdev: Pointer to PCI device
4953 *
4954 * This callback is called when the error recovery driver tells us that
4955 * its OK to resume normal operation. Implementation resembles the
4956 * second-half of the e1000_resume routine.
4957 */
4958static void e1000_io_resume(struct pci_dev *pdev)
4959{
4960 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 4961 struct e1000_adapter *adapter = netdev_priv(netdev);
0fccd0e9
JG		 4962
4963 e1000_init_manageability(adapter);
9026729b
AK		 4964
4965 if (netif_running(netdev)) {
4966 if (e1000_up(adapter)) {
675ad473 4967 pr_info("can't bring device back up after reset\n");
9026729b
AK		 4968 return;
4969 }
4970 }
4971
4972 netif_device_attach(netdev);
9026729b
AK		 4973}
4974
1da177e4 4975/* e1000_main.c */
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