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Merge branch 'work.misc' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs
[mirror_ubuntu-jammy-kernel.git] / drivers / net / ethernet / intel / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
0abb6eb1
AK		 3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK		 16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT		 22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
d0bb53e1 30#include <net/ip6_checksum.h>
5377a416 31#include <linux/io.h>
70c71606 32#include <linux/prefetch.h>
5622e404
JP		 33#include <linux/bitops.h>
34#include <linux/if_vlan.h>
5377a416 35
1da177e4 36char e1000_driver_name[] = "e1000";
3ad2cc67 37static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
ab08853f 38#define DRV_VERSION "7.3.21-k8-NAPI"
abec42a4
SH		 39const char e1000_driver_version[] = DRV_VERSION;
40static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT		 41
42/* e1000_pci_tbl - PCI Device ID Table
43 *
44 * Last entry must be all 0s
45 *
46 * Macro expands to...
47 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
48 */
9baa3c34 49static const struct pci_device_id e1000_pci_tbl[] = {
1da177e4
LT		 50 INTEL_E1000_ETHERNET_DEVICE(0x1000),
51 INTEL_E1000_ETHERNET_DEVICE(0x1001),
52 INTEL_E1000_ETHERNET_DEVICE(0x1004),
53 INTEL_E1000_ETHERNET_DEVICE(0x1008),
54 INTEL_E1000_ETHERNET_DEVICE(0x1009),
55 INTEL_E1000_ETHERNET_DEVICE(0x100C),
56 INTEL_E1000_ETHERNET_DEVICE(0x100D),
57 INTEL_E1000_ETHERNET_DEVICE(0x100E),
58 INTEL_E1000_ETHERNET_DEVICE(0x100F),
59 INTEL_E1000_ETHERNET_DEVICE(0x1010),
60 INTEL_E1000_ETHERNET_DEVICE(0x1011),
61 INTEL_E1000_ETHERNET_DEVICE(0x1012),
62 INTEL_E1000_ETHERNET_DEVICE(0x1013),
63 INTEL_E1000_ETHERNET_DEVICE(0x1014),
64 INTEL_E1000_ETHERNET_DEVICE(0x1015),
65 INTEL_E1000_ETHERNET_DEVICE(0x1016),
66 INTEL_E1000_ETHERNET_DEVICE(0x1017),
67 INTEL_E1000_ETHERNET_DEVICE(0x1018),
68 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 69 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 70 INTEL_E1000_ETHERNET_DEVICE(0x101D),
71 INTEL_E1000_ETHERNET_DEVICE(0x101E),
72 INTEL_E1000_ETHERNET_DEVICE(0x1026),
73 INTEL_E1000_ETHERNET_DEVICE(0x1027),
74 INTEL_E1000_ETHERNET_DEVICE(0x1028),
75 INTEL_E1000_ETHERNET_DEVICE(0x1075),
76 INTEL_E1000_ETHERNET_DEVICE(0x1076),
77 INTEL_E1000_ETHERNET_DEVICE(0x1077),
78 INTEL_E1000_ETHERNET_DEVICE(0x1078),
79 INTEL_E1000_ETHERNET_DEVICE(0x1079),
80 INTEL_E1000_ETHERNET_DEVICE(0x107A),
81 INTEL_E1000_ETHERNET_DEVICE(0x107B),
82 INTEL_E1000_ETHERNET_DEVICE(0x107C),
83 INTEL_E1000_ETHERNET_DEVICE(0x108A),
b7ee49db 84 INTEL_E1000_ETHERNET_DEVICE(0x1099),
b7ee49db 85 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
5377a416 86 INTEL_E1000_ETHERNET_DEVICE(0x2E6E),
1da177e4
LT		 87 /* required last entry */
88 {0,}
89};
90
91MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
92
35574764
NN		 93int e1000_up(struct e1000_adapter *adapter);
94void e1000_down(struct e1000_adapter *adapter);
95void e1000_reinit_locked(struct e1000_adapter *adapter);
96void e1000_reset(struct e1000_adapter *adapter);
35574764
NN		 97int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
98int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
99void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
100void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
3ad2cc67 101static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
a48954c8 102 struct e1000_tx_ring *txdr);
3ad2cc67 103static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
a48954c8 104 struct e1000_rx_ring *rxdr);
3ad2cc67 105static void e1000_free_tx_resources(struct e1000_adapter *adapter,
a48954c8 106 struct e1000_tx_ring *tx_ring);
3ad2cc67 107static void e1000_free_rx_resources(struct e1000_adapter *adapter,
a48954c8 108 struct e1000_rx_ring *rx_ring);
35574764 109void e1000_update_stats(struct e1000_adapter *adapter);
1da177e4
LT		 110
111static int e1000_init_module(void);
112static void e1000_exit_module(void);
113static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
9f9a12f8 114static void e1000_remove(struct pci_dev *pdev);
581d708e 115static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4 116static int e1000_sw_init(struct e1000_adapter *adapter);
1f2f83f8
SA		 117int e1000_open(struct net_device *netdev);
118int e1000_close(struct net_device *netdev);
1da177e4
LT		 119static void e1000_configure_tx(struct e1000_adapter *adapter);
120static void e1000_configure_rx(struct e1000_adapter *adapter);
121static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 122static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
123static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
124static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
a48954c8 125 struct e1000_tx_ring *tx_ring);
581d708e 126static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
a48954c8 127 struct e1000_rx_ring *rx_ring);
db0ce50d 128static void e1000_set_rx_mode(struct net_device *netdev);
5cf42fcd 129static void e1000_update_phy_info_task(struct work_struct *work);
a4010afe 130static void e1000_watchdog(struct work_struct *work);
5cf42fcd 131static void e1000_82547_tx_fifo_stall_task(struct work_struct *work);
3b29a56d
SH		 132static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
133 struct net_device *netdev);
1da177e4
LT		 134static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
135static int e1000_set_mac(struct net_device *netdev, void *p);
7d12e780 136static irqreturn_t e1000_intr(int irq, void *data);
c3033b01
JP		 137static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
138 struct e1000_tx_ring *tx_ring);
bea3348e 139static int e1000_clean(struct napi_struct *napi, int budget);
c3033b01
JP		 140static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
141 struct e1000_rx_ring *rx_ring,
142 int *work_done, int work_to_do);
edbbb3ca
JB		 143static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
144 struct e1000_rx_ring *rx_ring,
145 int *work_done, int work_to_do);
08e83316
SD		 146static void e1000_alloc_dummy_rx_buffers(struct e1000_adapter *adapter,
147 struct e1000_rx_ring *rx_ring,
148 int cleaned_count)
149{
150}
581d708e 151static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
edbbb3ca 152 struct e1000_rx_ring *rx_ring,
72d64a43 153 int cleaned_count);
edbbb3ca
JB		 154static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
155 struct e1000_rx_ring *rx_ring,
156 int cleaned_count);
1da177e4
LT		 157static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
158static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
159 int cmd);
1da177e4
LT		 160static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
161static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
162static void e1000_tx_timeout(struct net_device *dev);
65f27f38 163static void e1000_reset_task(struct work_struct *work);
1da177e4 164static void e1000_smartspeed(struct e1000_adapter *adapter);
e619d523 165static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
a48954c8 166 struct sk_buff *skb);
1da177e4 167
5622e404 168static bool e1000_vlan_used(struct e1000_adapter *adapter);
c8f44aff
MM		 169static void e1000_vlan_mode(struct net_device *netdev,
170 netdev_features_t features);
52f5509f
JP		 171static void e1000_vlan_filter_on_off(struct e1000_adapter *adapter,
172 bool filter_on);
80d5c368
PM		 173static int e1000_vlan_rx_add_vid(struct net_device *netdev,
174 __be16 proto, u16 vid);
175static int e1000_vlan_rx_kill_vid(struct net_device *netdev,
176 __be16 proto, u16 vid);
1da177e4
LT		 177static void e1000_restore_vlan(struct e1000_adapter *adapter);
178
6fdfef16 179#ifdef CONFIG_PM
b43fcd7d 180static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
1da177e4
LT		 181static int e1000_resume(struct pci_dev *pdev);
182#endif
c653e635 183static void e1000_shutdown(struct pci_dev *pdev);
1da177e4
LT		 184
185#ifdef CONFIG_NET_POLL_CONTROLLER
186/* for netdump / net console */
187static void e1000_netpoll (struct net_device *netdev);
188#endif
189
1f753861
JB		 190#define COPYBREAK_DEFAULT 256
191static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
192module_param(copybreak, uint, 0644);
193MODULE_PARM_DESC(copybreak,
194 "Maximum size of packet that is copied to a new buffer on receive");
195
9026729b 196static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
a48954c8 197 pci_channel_state_t state);
9026729b
AK		 198static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
199static void e1000_io_resume(struct pci_dev *pdev);
200
3646f0e5 201static const struct pci_error_handlers e1000_err_handler = {
9026729b
AK		 202 .error_detected = e1000_io_error_detected,
203 .slot_reset = e1000_io_slot_reset,
204 .resume = e1000_io_resume,
205};
24025e4e 206
1da177e4
LT		 207static struct pci_driver e1000_driver = {
208 .name = e1000_driver_name,
209 .id_table = e1000_pci_tbl,
210 .probe = e1000_probe,
9f9a12f8 211 .remove = e1000_remove,
c4e24f01 212#ifdef CONFIG_PM
25985edc 213 /* Power Management Hooks */
1da177e4 214 .suspend = e1000_suspend,
c653e635 215 .resume = e1000_resume,
1da177e4 216#endif
9026729b
AK		 217 .shutdown = e1000_shutdown,
218 .err_handler = &e1000_err_handler
1da177e4
LT		 219};
220
221MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
222MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
223MODULE_LICENSE("GPL");
224MODULE_VERSION(DRV_VERSION);
225
b3f4d599 226#define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
227static int debug = -1;
1da177e4
LT		 228module_param(debug, int, 0);
229MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
230
675ad473
ET		 231/**
232 * e1000_get_hw_dev - return device
233 * used by hardware layer to print debugging information
234 *
235 **/
236struct net_device *e1000_get_hw_dev(struct e1000_hw *hw)
237{
238 struct e1000_adapter *adapter = hw->back;
239 return adapter->netdev;
240}
241
1da177e4
LT		 242/**
243 * e1000_init_module - Driver Registration Routine
244 *
245 * e1000_init_module is the first routine called when the driver is
246 * loaded. All it does is register with the PCI subsystem.
247 **/
64798845 248static int __init e1000_init_module(void)
1da177e4
LT		 249{
250 int ret;
675ad473 251 pr_info("%s - version %s\n", e1000_driver_string, e1000_driver_version);
1da177e4 252
675ad473 253 pr_info("%s\n", e1000_copyright);
1da177e4 254
29917620 255 ret = pci_register_driver(&e1000_driver);
1f753861
JB		 256 if (copybreak != COPYBREAK_DEFAULT) {
257 if (copybreak == 0)
675ad473 258 pr_info("copybreak disabled\n");
1f753861 259 else
675ad473
ET		 260 pr_info("copybreak enabled for "
261 "packets <= %u bytes\n", copybreak);
1f753861 262 }
1da177e4
LT		 263 return ret;
264}
265
266module_init(e1000_init_module);
267
268/**
269 * e1000_exit_module - Driver Exit Cleanup Routine
270 *
271 * e1000_exit_module is called just before the driver is removed
272 * from memory.
273 **/
64798845 274static void __exit e1000_exit_module(void)
1da177e4 275{
1da177e4
LT		 276 pci_unregister_driver(&e1000_driver);
277}
278
279module_exit(e1000_exit_module);
280
2db10a08
AK		 281static int e1000_request_irq(struct e1000_adapter *adapter)
282{
283 struct net_device *netdev = adapter->netdev;
3e18826c 284 irq_handler_t handler = e1000_intr;
e94bd23f
AK		 285 int irq_flags = IRQF_SHARED;
286 int err;
2db10a08 287
e94bd23f 288 err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
a48954c8 289 netdev);
e94bd23f 290 if (err) {
feb8f478 291 e_err(probe, "Unable to allocate interrupt Error: %d\n", err);
e94bd23f 292 }
2db10a08
AK		 293
294 return err;
295}
296
297static void e1000_free_irq(struct e1000_adapter *adapter)
298{
299 struct net_device *netdev = adapter->netdev;
300
301 free_irq(adapter->pdev->irq, netdev);
2db10a08
AK		 302}
303
1da177e4
LT		 304/**
305 * e1000_irq_disable - Mask off interrupt generation on the NIC
306 * @adapter: board private structure
307 **/
64798845 308static void e1000_irq_disable(struct e1000_adapter *adapter)
1da177e4 309{
1dc32918
JP		 310 struct e1000_hw *hw = &adapter->hw;
311
312 ew32(IMC, ~0);
313 E1000_WRITE_FLUSH();
1da177e4
LT		 314 synchronize_irq(adapter->pdev->irq);
315}
316
317/**
318 * e1000_irq_enable - Enable default interrupt generation settings
319 * @adapter: board private structure
320 **/
64798845 321static void e1000_irq_enable(struct e1000_adapter *adapter)
1da177e4 322{
1dc32918
JP		 323 struct e1000_hw *hw = &adapter->hw;
324
325 ew32(IMS, IMS_ENABLE_MASK);
326 E1000_WRITE_FLUSH();
1da177e4 327}
3ad2cc67 328
64798845 329static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2d7edb92 330{
1dc32918 331 struct e1000_hw *hw = &adapter->hw;
2d7edb92 332 struct net_device *netdev = adapter->netdev;
1dc32918 333 u16 vid = hw->mng_cookie.vlan_id;
406874a7 334 u16 old_vid = adapter->mng_vlan_id;
96838a40 335
5622e404
JP		 336 if (!e1000_vlan_used(adapter))
337 return;
338
339 if (!test_bit(vid, adapter->active_vlans)) {
340 if (hw->mng_cookie.status &
341 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
80d5c368 342 e1000_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid);
c5f226fe 343 adapter->mng_vlan_id = vid;
5622e404
JP		 344 } else {
345 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
346 }
347 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
348 (vid != old_vid) &&
349 !test_bit(old_vid, adapter->active_vlans))
80d5c368
PM		 350 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
351 old_vid);
5622e404
JP		 352 } else {
353 adapter->mng_vlan_id = vid;
2d7edb92
MC		 354 }
355}
b55ccb35 356
64798845 357static void e1000_init_manageability(struct e1000_adapter *adapter)
0fccd0e9 358{
1dc32918
JP		 359 struct e1000_hw *hw = &adapter->hw;
360
0fccd0e9 361 if (adapter->en_mng_pt) {
1dc32918 362 u32 manc = er32(MANC);
0fccd0e9
JG		 363
364 /* disable hardware interception of ARP */
365 manc &= ~(E1000_MANC_ARP_EN);
366
1dc32918 367 ew32(MANC, manc);
0fccd0e9
JG		 368 }
369}
370
64798845 371static void e1000_release_manageability(struct e1000_adapter *adapter)
0fccd0e9 372{
1dc32918
JP		 373 struct e1000_hw *hw = &adapter->hw;
374
0fccd0e9 375 if (adapter->en_mng_pt) {
1dc32918 376 u32 manc = er32(MANC);
0fccd0e9
JG		 377
378 /* re-enable hardware interception of ARP */
379 manc |= E1000_MANC_ARP_EN;
380
1dc32918 381 ew32(MANC, manc);
0fccd0e9
JG		 382 }
383}
384
e0aac5a2
AK		 385/**
386 * e1000_configure - configure the hardware for RX and TX
387 * @adapter = private board structure
388 **/
389static void e1000_configure(struct e1000_adapter *adapter)
1da177e4
LT		 390{
391 struct net_device *netdev = adapter->netdev;
2db10a08 392 int i;
1da177e4 393
db0ce50d 394 e1000_set_rx_mode(netdev);
1da177e4
LT		 395
396 e1000_restore_vlan(adapter);
0fccd0e9 397 e1000_init_manageability(adapter);
1da177e4
LT		 398
399 e1000_configure_tx(adapter);
400 e1000_setup_rctl(adapter);
401 e1000_configure_rx(adapter);
72d64a43
JK		 402 /* call E1000_DESC_UNUSED which always leaves
403 * at least 1 descriptor unused to make sure
6cfbd97b
JK		 404 * next_to_use != next_to_clean
405 */
f56799ea 406 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 407 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e 408 adapter->alloc_rx_buf(adapter, ring,
6cfbd97b 409 E1000_DESC_UNUSED(ring));
f56799ea 410 }
e0aac5a2
AK		 411}
412
413int e1000_up(struct e1000_adapter *adapter)
414{
1dc32918
JP		 415 struct e1000_hw *hw = &adapter->hw;
416
e0aac5a2
AK		 417 /* hardware has been reset, we need to reload some things */
418 e1000_configure(adapter);
419
420 clear_bit(__E1000_DOWN, &adapter->flags);
7bfa4816 421
bea3348e 422 napi_enable(&adapter->napi);
c3570acb 423
5de55624
MC		 424 e1000_irq_enable(adapter);
425
4cb9be7a
JB		 426 netif_wake_queue(adapter->netdev);
427
79f3d399 428 /* fire a link change interrupt to start the watchdog */
1dc32918 429 ew32(ICS, E1000_ICS_LSC);
1da177e4
LT		 430 return 0;
431}
432
79f05bf0
AK		 433/**
434 * e1000_power_up_phy - restore link in case the phy was powered down
435 * @adapter: address of board private structure
436 *
437 * The phy may be powered down to save power and turn off link when the
438 * driver is unloaded and wake on lan is not enabled (among others)
439 * *** this routine MUST be followed by a call to e1000_reset ***
79f05bf0 440 **/
d658266e 441void e1000_power_up_phy(struct e1000_adapter *adapter)
79f05bf0 442{
1dc32918 443 struct e1000_hw *hw = &adapter->hw;
406874a7 444 u16 mii_reg = 0;
79f05bf0
AK		 445
446 /* Just clear the power down bit to wake the phy back up */
1dc32918 447 if (hw->media_type == e1000_media_type_copper) {
79f05bf0 448 /* according to the manual, the phy will retain its
6cfbd97b
JK		 449 * settings across a power-down/up cycle
450 */
1dc32918 451 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 452 mii_reg &= ~MII_CR_POWER_DOWN;
1dc32918 453 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
79f05bf0
AK		 454 }
455}
456
457static void e1000_power_down_phy(struct e1000_adapter *adapter)
458{
1dc32918
JP		 459 struct e1000_hw *hw = &adapter->hw;
460
61c2505f 461 /* Power down the PHY so no link is implied when interface is down *
c3033b01 462 * The PHY cannot be powered down if any of the following is true *
79f05bf0
AK		 463 * (a) WoL is enabled
464 * (b) AMT is active
6cfbd97b
JK		 465 * (c) SoL/IDER session is active
466 */
1dc32918
JP		 467 if (!adapter->wol && hw->mac_type >= e1000_82540 &&
468 hw->media_type == e1000_media_type_copper) {
406874a7 469 u16 mii_reg = 0;
61c2505f 470
1dc32918 471 switch (hw->mac_type) {
61c2505f
BA		 472 case e1000_82540:
473 case e1000_82545:
474 case e1000_82545_rev_3:
475 case e1000_82546:
5377a416 476 case e1000_ce4100:
61c2505f
BA		 477 case e1000_82546_rev_3:
478 case e1000_82541:
479 case e1000_82541_rev_2:
480 case e1000_82547:
481 case e1000_82547_rev_2:
1dc32918 482 if (er32(MANC) & E1000_MANC_SMBUS_EN)
61c2505f
BA		 483 goto out;
484 break;
61c2505f
BA		 485 default:
486 goto out;
487 }
1dc32918 488 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 489 mii_reg |= MII_CR_POWER_DOWN;
1dc32918 490 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
4e0d8f7d 491 msleep(1);
79f05bf0 492 }
61c2505f
BA		 493out:
494 return;
79f05bf0
AK		 495}
496
a4010afe
JB		 497static void e1000_down_and_stop(struct e1000_adapter *adapter)
498{
499 set_bit(__E1000_DOWN, &adapter->flags);
8ce6909f 500
a4010afe 501 cancel_delayed_work_sync(&adapter->watchdog_task);
74a1b1ea
VD		 502
503 /*
504 * Since the watchdog task can reschedule other tasks, we should cancel
505 * it first, otherwise we can run into the situation when a work is
506 * still running after the adapter has been turned down.
507 */
508
a4010afe
JB		 509 cancel_delayed_work_sync(&adapter->phy_info_task);
510 cancel_delayed_work_sync(&adapter->fifo_stall_task);
74a1b1ea
VD		 511
512 /* Only kill reset task if adapter is not resetting */
513 if (!test_bit(__E1000_RESETTING, &adapter->flags))
514 cancel_work_sync(&adapter->reset_task);
a4010afe
JB		 515}
516
64798845 517void e1000_down(struct e1000_adapter *adapter)
1da177e4 518{
a6c42322 519 struct e1000_hw *hw = &adapter->hw;
1da177e4 520 struct net_device *netdev = adapter->netdev;
a6c42322 521 u32 rctl, tctl;
1da177e4 522
a6c42322
JB		 523 /* disable receives in the hardware */
524 rctl = er32(RCTL);
525 ew32(RCTL, rctl & ~E1000_RCTL_EN);
526 /* flush and sleep below */
527
51851073 528 netif_tx_disable(netdev);
a6c42322
JB		 529
530 /* disable transmits in the hardware */
531 tctl = er32(TCTL);
532 tctl &= ~E1000_TCTL_EN;
533 ew32(TCTL, tctl);
534 /* flush both disables and wait for them to finish */
535 E1000_WRITE_FLUSH();
536 msleep(10);
537
44c445c3
VM		 538 /* Set the carrier off after transmits have been disabled in the
539 * hardware, to avoid race conditions with e1000_watchdog() (which
540 * may be running concurrently to us, checking for the carrier
541 * bit to decide whether it should enable transmits again). Such
542 * a race condition would result into transmission being disabled
543 * in the hardware until the next IFF_DOWN+IFF_UP cycle.
544 */
545 netif_carrier_off(netdev);
546
bea3348e 547 napi_disable(&adapter->napi);
c3570acb 548
1da177e4 549 e1000_irq_disable(adapter);
c1605eb3 550
6cfbd97b 551 /* Setting DOWN must be after irq_disable to prevent
ab08853f 552 * a screaming interrupt. Setting DOWN also prevents
a4010afe 553 * tasks from rescheduling.
ab08853f 554 */
a4010afe 555 e1000_down_and_stop(adapter);
1da177e4 556
1da177e4
LT		 557 adapter->link_speed = 0;
558 adapter->link_duplex = 0;
1da177e4
LT		 559
560 e1000_reset(adapter);
581d708e
MC		 561 e1000_clean_all_tx_rings(adapter);
562 e1000_clean_all_rx_rings(adapter);
1da177e4 563}
1da177e4 564
64798845 565void e1000_reinit_locked(struct e1000_adapter *adapter)
2db10a08
AK		 566{
567 WARN_ON(in_interrupt());
568 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
569 msleep(1);
570 e1000_down(adapter);
571 e1000_up(adapter);
572 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 573}
574
64798845 575void e1000_reset(struct e1000_adapter *adapter)
1da177e4 576{
1dc32918 577 struct e1000_hw *hw = &adapter->hw;
406874a7 578 u32 pba = 0, tx_space, min_tx_space, min_rx_space;
c3033b01 579 bool legacy_pba_adjust = false;
b7cb8c2c 580 u16 hwm;
1da177e4
LT		 581
582 /* Repartition Pba for greater than 9k mtu
583 * To take effect CTRL.RST is required.
584 */
585
1dc32918 586 switch (hw->mac_type) {
018ea44e
BA		 587 case e1000_82542_rev2_0:
588 case e1000_82542_rev2_1:
589 case e1000_82543:
590 case e1000_82544:
591 case e1000_82540:
592 case e1000_82541:
593 case e1000_82541_rev_2:
c3033b01 594 legacy_pba_adjust = true;
018ea44e
BA		 595 pba = E1000_PBA_48K;
596 break;
597 case e1000_82545:
598 case e1000_82545_rev_3:
599 case e1000_82546:
5377a416 600 case e1000_ce4100:
018ea44e
BA		 601 case e1000_82546_rev_3:
602 pba = E1000_PBA_48K;
603 break;
2d7edb92 604 case e1000_82547:
0e6ef3e0 605 case e1000_82547_rev_2:
c3033b01 606 legacy_pba_adjust = true;
2d7edb92
MC		 607 pba = E1000_PBA_30K;
608 break;
018ea44e
BA		 609 case e1000_undefined:
610 case e1000_num_macs:
2d7edb92
MC		 611 break;
612 }
613
c3033b01 614 if (legacy_pba_adjust) {
b7cb8c2c 615 if (hw->max_frame_size > E1000_RXBUFFER_8192)
018ea44e 616 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92 617
1dc32918 618 if (hw->mac_type == e1000_82547) {
018ea44e
BA		 619 adapter->tx_fifo_head = 0;
620 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
621 adapter->tx_fifo_size =
622 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
623 atomic_set(&adapter->tx_fifo_stall, 0);
624 }
b7cb8c2c 625 } else if (hw->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
018ea44e 626 /* adjust PBA for jumbo frames */
1dc32918 627 ew32(PBA, pba);
018ea44e
BA		 628
629 /* To maintain wire speed transmits, the Tx FIFO should be
b7cb8c2c 630 * large enough to accommodate two full transmit packets,
018ea44e 631 * rounded up to the next 1KB and expressed in KB. Likewise,
b7cb8c2c 632 * the Rx FIFO should be large enough to accommodate at least
018ea44e 633 * one full receive packet and is similarly rounded up and
6cfbd97b
JK		 634 * expressed in KB.
635 */
1dc32918 636 pba = er32(PBA);
018ea44e
BA		 637 /* upper 16 bits has Tx packet buffer allocation size in KB */
638 tx_space = pba >> 16;
639 /* lower 16 bits has Rx packet buffer allocation size in KB */
640 pba &= 0xffff;
6cfbd97b 641 /* the Tx fifo also stores 16 bytes of information about the Tx
b7cb8c2c
JB		 642 * but don't include ethernet FCS because hardware appends it
643 */
644 min_tx_space = (hw->max_frame_size +
a48954c8
JW		 645 sizeof(struct e1000_tx_desc) -
646 ETH_FCS_LEN) * 2;
9099cfb9 647 min_tx_space = ALIGN(min_tx_space, 1024);
018ea44e 648 min_tx_space >>= 10;
b7cb8c2c
JB		 649 /* software strips receive CRC, so leave room for it */
650 min_rx_space = hw->max_frame_size;
9099cfb9 651 min_rx_space = ALIGN(min_rx_space, 1024);
018ea44e
BA		 652 min_rx_space >>= 10;
653
654 /* If current Tx allocation is less than the min Tx FIFO size,
655 * and the min Tx FIFO size is less than the current Rx FIFO
6cfbd97b
JK		 656 * allocation, take space away from current Rx allocation
657 */
018ea44e
BA		 658 if (tx_space < min_tx_space &&
659 ((min_tx_space - tx_space) < pba)) {
660 pba = pba - (min_tx_space - tx_space);
661
662 /* PCI/PCIx hardware has PBA alignment constraints */
1dc32918 663 switch (hw->mac_type) {
018ea44e
BA		 664 case e1000_82545 ... e1000_82546_rev_3:
665 pba &= ~(E1000_PBA_8K - 1);
666 break;
667 default:
668 break;
669 }
670
6cfbd97b
JK		 671 /* if short on Rx space, Rx wins and must trump Tx
672 * adjustment or use Early Receive if available
673 */
1532ecea
JB		 674 if (pba < min_rx_space)
675 pba = min_rx_space;
018ea44e 676 }
1da177e4 677 }
2d7edb92 678
1dc32918 679 ew32(PBA, pba);
1da177e4 680
6cfbd97b 681 /* flow control settings:
b7cb8c2c
JB		 682 * The high water mark must be low enough to fit one full frame
683 * (or the size used for early receive) above it in the Rx FIFO.
684 * Set it to the lower of:
685 * - 90% of the Rx FIFO size, and
686 * - the full Rx FIFO size minus the early receive size (for parts
687 * with ERT support assuming ERT set to E1000_ERT_2048), or
688 * - the full Rx FIFO size minus one full frame
689 */
690 hwm = min(((pba << 10) * 9 / 10),
691 ((pba << 10) - hw->max_frame_size));
692
693 hw->fc_high_water = hwm & 0xFFF8; /* 8-byte granularity */
694 hw->fc_low_water = hw->fc_high_water - 8;
edbbb3ca 695 hw->fc_pause_time = E1000_FC_PAUSE_TIME;
1dc32918
JP		 696 hw->fc_send_xon = 1;
697 hw->fc = hw->original_fc;
1da177e4 698
2d7edb92 699 /* Allow time for pending master requests to run */
1dc32918
JP		 700 e1000_reset_hw(hw);
701 if (hw->mac_type >= e1000_82544)
702 ew32(WUC, 0);
09ae3e88 703
1dc32918 704 if (e1000_init_hw(hw))
feb8f478 705 e_dev_err("Hardware Error\n");
2d7edb92 706 e1000_update_mng_vlan(adapter);
3d5460a0
JB		 707
708 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
1dc32918 709 if (hw->mac_type >= e1000_82544 &&
1dc32918
JP		 710 hw->autoneg == 1 &&
711 hw->autoneg_advertised == ADVERTISE_1000_FULL) {
712 u32 ctrl = er32(CTRL);
3d5460a0
JB		 713 /* clear phy power management bit if we are in gig only mode,
714 * which if enabled will attempt negotiation to 100Mb, which
6cfbd97b
JK		 715 * can cause a loss of link at power off or driver unload
716 */
3d5460a0 717 ctrl &= ~E1000_CTRL_SWDPIN3;
1dc32918 718 ew32(CTRL, ctrl);
3d5460a0
JB		 719 }
720
1da177e4 721 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1dc32918 722 ew32(VET, ETHERNET_IEEE_VLAN_TYPE);
1da177e4 723
1dc32918
JP		 724 e1000_reset_adaptive(hw);
725 e1000_phy_get_info(hw, &adapter->phy_info);
9a53a202 726
0fccd0e9 727 e1000_release_manageability(adapter);
1da177e4
LT		 728}
729
1aa8b471 730/* Dump the eeprom for users having checksum issues */
b4ea895d 731static void e1000_dump_eeprom(struct e1000_adapter *adapter)
67b3c27c
AK		 732{
733 struct net_device *netdev = adapter->netdev;
734 struct ethtool_eeprom eeprom;
735 const struct ethtool_ops *ops = netdev->ethtool_ops;
736 u8 *data;
737 int i;
738 u16 csum_old, csum_new = 0;
739
740 eeprom.len = ops->get_eeprom_len(netdev);
741 eeprom.offset = 0;
742
743 data = kmalloc(eeprom.len, GFP_KERNEL);
e404decb 744 if (!data)
67b3c27c 745 return;
67b3c27c
AK		 746
747 ops->get_eeprom(netdev, &eeprom, data);
748
749 csum_old = (data[EEPROM_CHECKSUM_REG * 2]) +
750 (data[EEPROM_CHECKSUM_REG * 2 + 1] << 8);
751 for (i = 0; i < EEPROM_CHECKSUM_REG * 2; i += 2)
752 csum_new += data[i] + (data[i + 1] << 8);
753 csum_new = EEPROM_SUM - csum_new;
754
675ad473
ET		 755 pr_err("/*********************/\n");
756 pr_err("Current EEPROM Checksum : 0x%04x\n", csum_old);
757 pr_err("Calculated : 0x%04x\n", csum_new);
67b3c27c 758
675ad473
ET		 759 pr_err("Offset Values\n");
760 pr_err("======== ======\n");
67b3c27c
AK		 761 print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 16, 1, data, 128, 0);
762
675ad473
ET		 763 pr_err("Include this output when contacting your support provider.\n");
764 pr_err("This is not a software error! Something bad happened to\n");
765 pr_err("your hardware or EEPROM image. Ignoring this problem could\n");
766 pr_err("result in further problems, possibly loss of data,\n");
767 pr_err("corruption or system hangs!\n");
768 pr_err("The MAC Address will be reset to 00:00:00:00:00:00,\n");
769 pr_err("which is invalid and requires you to set the proper MAC\n");
770 pr_err("address manually before continuing to enable this network\n");
771 pr_err("device. Please inspect the EEPROM dump and report the\n");
772 pr_err("issue to your hardware vendor or Intel Customer Support.\n");
773 pr_err("/*********************/\n");
67b3c27c
AK		 774
775 kfree(data);
776}
777
81250297
TI		 778/**
779 * e1000_is_need_ioport - determine if an adapter needs ioport resources or not
780 * @pdev: PCI device information struct
781 *
782 * Return true if an adapter needs ioport resources
783 **/
784static int e1000_is_need_ioport(struct pci_dev *pdev)
785{
786 switch (pdev->device) {
787 case E1000_DEV_ID_82540EM:
788 case E1000_DEV_ID_82540EM_LOM:
789 case E1000_DEV_ID_82540EP:
790 case E1000_DEV_ID_82540EP_LOM:
791 case E1000_DEV_ID_82540EP_LP:
792 case E1000_DEV_ID_82541EI:
793 case E1000_DEV_ID_82541EI_MOBILE:
794 case E1000_DEV_ID_82541ER:
795 case E1000_DEV_ID_82541ER_LOM:
796 case E1000_DEV_ID_82541GI:
797 case E1000_DEV_ID_82541GI_LF:
798 case E1000_DEV_ID_82541GI_MOBILE:
799 case E1000_DEV_ID_82544EI_COPPER:
800 case E1000_DEV_ID_82544EI_FIBER:
801 case E1000_DEV_ID_82544GC_COPPER:
802 case E1000_DEV_ID_82544GC_LOM:
803 case E1000_DEV_ID_82545EM_COPPER:
804 case E1000_DEV_ID_82545EM_FIBER:
805 case E1000_DEV_ID_82546EB_COPPER:
806 case E1000_DEV_ID_82546EB_FIBER:
807 case E1000_DEV_ID_82546EB_QUAD_COPPER:
808 return true;
809 default:
810 return false;
811 }
812}
813
c8f44aff
MM		 814static netdev_features_t e1000_fix_features(struct net_device *netdev,
815 netdev_features_t features)
5622e404 816{
6cfbd97b
JK		 817 /* Since there is no support for separate Rx/Tx vlan accel
818 * enable/disable make sure Tx flag is always in same state as Rx.
5622e404 819 */
f646968f
PM		 820 if (features & NETIF_F_HW_VLAN_CTAG_RX)
821 features |= NETIF_F_HW_VLAN_CTAG_TX;
5622e404 822 else
f646968f 823 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
5622e404
JP		 824
825 return features;
826}
827
c8f44aff
MM		 828static int e1000_set_features(struct net_device *netdev,
829 netdev_features_t features)
e97d3207
MM		 830{
831 struct e1000_adapter *adapter = netdev_priv(netdev);
c8f44aff 832 netdev_features_t changed = features ^ netdev->features;
e97d3207 833
f646968f 834 if (changed & NETIF_F_HW_VLAN_CTAG_RX)
5622e404
JP		 835 e1000_vlan_mode(netdev, features);
836
e825b731 837 if (!(changed & (NETIF_F_RXCSUM | NETIF_F_RXALL)))
e97d3207
MM		 838 return 0;
839
e825b731 840 netdev->features = features;
e97d3207
MM		 841 adapter->rx_csum = !!(features & NETIF_F_RXCSUM);
842
843 if (netif_running(netdev))
844 e1000_reinit_locked(adapter);
845 else
846 e1000_reset(adapter);
847
848 return 0;
849}
850
0e7614bc
SH		 851static const struct net_device_ops e1000_netdev_ops = {
852 .ndo_open = e1000_open,
853 .ndo_stop = e1000_close,
00829823 854 .ndo_start_xmit = e1000_xmit_frame,
0e7614bc
SH		 855 .ndo_set_rx_mode = e1000_set_rx_mode,
856 .ndo_set_mac_address = e1000_set_mac,
5622e404 857 .ndo_tx_timeout = e1000_tx_timeout,
0e7614bc
SH		 858 .ndo_change_mtu = e1000_change_mtu,
859 .ndo_do_ioctl = e1000_ioctl,
860 .ndo_validate_addr = eth_validate_addr,
0e7614bc
SH		 861 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
862 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
863#ifdef CONFIG_NET_POLL_CONTROLLER
864 .ndo_poll_controller = e1000_netpoll,
865#endif
5622e404
JP		 866 .ndo_fix_features = e1000_fix_features,
867 .ndo_set_features = e1000_set_features,
0e7614bc
SH		 868};
869
e508be17
JB		 870/**
871 * e1000_init_hw_struct - initialize members of hw struct
872 * @adapter: board private struct
873 * @hw: structure used by e1000_hw.c
874 *
875 * Factors out initialization of the e1000_hw struct to its own function
876 * that can be called very early at init (just after struct allocation).
877 * Fields are initialized based on PCI device information and
878 * OS network device settings (MTU size).
879 * Returns negative error codes if MAC type setup fails.
880 */
881static int e1000_init_hw_struct(struct e1000_adapter *adapter,
882 struct e1000_hw *hw)
883{
884 struct pci_dev *pdev = adapter->pdev;
885
886 /* PCI config space info */
887 hw->vendor_id = pdev->vendor;
888 hw->device_id = pdev->device;
889 hw->subsystem_vendor_id = pdev->subsystem_vendor;
890 hw->subsystem_id = pdev->subsystem_device;
891 hw->revision_id = pdev->revision;
892
893 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
894
895 hw->max_frame_size = adapter->netdev->mtu +
896 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
897 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
898
899 /* identify the MAC */
900 if (e1000_set_mac_type(hw)) {
901 e_err(probe, "Unknown MAC Type\n");
902 return -EIO;
903 }
904
905 switch (hw->mac_type) {
906 default:
907 break;
908 case e1000_82541:
909 case e1000_82547:
910 case e1000_82541_rev_2:
911 case e1000_82547_rev_2:
912 hw->phy_init_script = 1;
913 break;
914 }
915
916 e1000_set_media_type(hw);
917 e1000_get_bus_info(hw);
918
919 hw->wait_autoneg_complete = false;
920 hw->tbi_compatibility_en = true;
921 hw->adaptive_ifs = true;
922
923 /* Copper options */
924
925 if (hw->media_type == e1000_media_type_copper) {
926 hw->mdix = AUTO_ALL_MODES;
927 hw->disable_polarity_correction = false;
928 hw->master_slave = E1000_MASTER_SLAVE;
929 }
930
931 return 0;
932}
933
1da177e4
LT		 934/**
935 * e1000_probe - Device Initialization Routine
936 * @pdev: PCI device information struct
937 * @ent: entry in e1000_pci_tbl
938 *
939 * Returns 0 on success, negative on failure
940 *
941 * e1000_probe initializes an adapter identified by a pci_dev structure.
942 * The OS initialization, configuring of the adapter private structure,
943 * and a hardware reset occur.
944 **/
1dd06ae8 945static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1da177e4
LT		 946{
947 struct net_device *netdev;
0b76aae7 948 struct e1000_adapter *adapter = NULL;
1dc32918 949 struct e1000_hw *hw;
2d7edb92 950
a48954c8
JW		 951 static int cards_found;
952 static int global_quad_port_a; /* global ksp3 port a indication */
2d7edb92 953 int i, err, pci_using_dac;
406874a7 954 u16 eeprom_data = 0;
5377a416 955 u16 tmp = 0;
406874a7 956 u16 eeprom_apme_mask = E1000_EEPROM_APME;
81250297 957 int bars, need_ioport;
0b76aae7 958 bool disable_dev = false;
0795af57 959
81250297
TI		 960 /* do not allocate ioport bars when not needed */
961 need_ioport = e1000_is_need_ioport(pdev);
962 if (need_ioport) {
963 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
964 err = pci_enable_device(pdev);
965 } else {
966 bars = pci_select_bars(pdev, IORESOURCE_MEM);
4d7155b9 967 err = pci_enable_device_mem(pdev);
81250297 968 }
c7be73bc 969 if (err)
1da177e4
LT		 970 return err;
971
81250297 972 err = pci_request_selected_regions(pdev, bars, e1000_driver_name);
c7be73bc 973 if (err)
6dd62ab0 974 goto err_pci_reg;
1da177e4
LT		 975
976 pci_set_master(pdev);
dbb5aaeb
NN		 977 err = pci_save_state(pdev);
978 if (err)
979 goto err_alloc_etherdev;
1da177e4 980
6dd62ab0 981 err = -ENOMEM;
1da177e4 982 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6dd62ab0 983 if (!netdev)
1da177e4 984 goto err_alloc_etherdev;
1da177e4 985
1da177e4
LT		 986 SET_NETDEV_DEV(netdev, &pdev->dev);
987
988 pci_set_drvdata(pdev, netdev);
60490fe0 989 adapter = netdev_priv(netdev);
1da177e4
LT		 990 adapter->netdev = netdev;
991 adapter->pdev = pdev;
b3f4d599 992 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
81250297
TI		 993 adapter->bars = bars;
994 adapter->need_ioport = need_ioport;
1da177e4 995
1dc32918
JP		 996 hw = &adapter->hw;
997 hw->back = adapter;
998
6dd62ab0 999 err = -EIO;
275f165f 1000 hw->hw_addr = pci_ioremap_bar(pdev, BAR_0);
1dc32918 1001 if (!hw->hw_addr)
1da177e4 1002 goto err_ioremap;
1da177e4 1003
81250297
TI		 1004 if (adapter->need_ioport) {
1005 for (i = BAR_1; i <= BAR_5; i++) {
1006 if (pci_resource_len(pdev, i) == 0)
1007 continue;
1008 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1009 hw->io_base = pci_resource_start(pdev, i);
1010 break;
1011 }
1da177e4
LT		 1012 }
1013 }
1014
e508be17
JB		 1015 /* make ready for any if (hw->...) below */
1016 err = e1000_init_hw_struct(adapter, hw);
1017 if (err)
1018 goto err_sw_init;
1019
6cfbd97b 1020 /* there is a workaround being applied below that limits
e508be17
JB		 1021 * 64-bit DMA addresses to 64-bit hardware. There are some
1022 * 32-bit adapters that Tx hang when given 64-bit DMA addresses
1023 */
1024 pci_using_dac = 0;
1025 if ((hw->bus_type == e1000_bus_type_pcix) &&
9931a26e 1026 !dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
e508be17 1027 pci_using_dac = 1;
e508be17 1028 } else {
9931a26e 1029 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
19a0b67a
DN		 1030 if (err) {
1031 pr_err("No usable DMA config, aborting\n");
1032 goto err_dma;
1033 }
e508be17
JB		 1034 }
1035
0e7614bc 1036 netdev->netdev_ops = &e1000_netdev_ops;
1da177e4 1037 e1000_set_ethtool_ops(netdev);
1da177e4 1038 netdev->watchdog_timeo = 5 * HZ;
bea3348e 1039 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
0e7614bc 1040
0eb5a34c 1041 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1da177e4 1042
1da177e4
LT		 1043 adapter->bd_number = cards_found;
1044
1045 /* setup the private structure */
1046
c7be73bc
JP		 1047 err = e1000_sw_init(adapter);
1048 if (err)
1da177e4
LT		 1049 goto err_sw_init;
1050
6dd62ab0 1051 err = -EIO;
5377a416 1052 if (hw->mac_type == e1000_ce4100) {
13acde8f
FF		 1053 hw->ce4100_gbe_mdio_base_virt =
1054 ioremap(pci_resource_start(pdev, BAR_1),
a48954c8 1055 pci_resource_len(pdev, BAR_1));
5377a416 1056
13acde8f 1057 if (!hw->ce4100_gbe_mdio_base_virt)
5377a416
DB		 1058 goto err_mdio_ioremap;
1059 }
2d7edb92 1060
1dc32918 1061 if (hw->mac_type >= e1000_82543) {
e97d3207 1062 netdev->hw_features = NETIF_F_SG |
5622e404 1063 NETIF_F_HW_CSUM |
f646968f
PM		 1064 NETIF_F_HW_VLAN_CTAG_RX;
1065 netdev->features = NETIF_F_HW_VLAN_CTAG_TX |
1066 NETIF_F_HW_VLAN_CTAG_FILTER;
1da177e4
LT		 1067 }
1068
1dc32918
JP		 1069 if ((hw->mac_type >= e1000_82544) &&
1070 (hw->mac_type != e1000_82547))
e97d3207
MM		 1071 netdev->hw_features |= NETIF_F_TSO;
1072
11a78dcf
BG		 1073 netdev->priv_flags |= IFF_SUPP_NOFCS;
1074
e97d3207 1075 netdev->features |= netdev->hw_features;
7500673b
TD		 1076 netdev->hw_features |= (NETIF_F_RXCSUM |
1077 NETIF_F_RXALL |
1078 NETIF_F_RXFCS);
2d7edb92 1079
7b872a55 1080 if (pci_using_dac) {
1da177e4 1081 netdev->features |= NETIF_F_HIGHDMA;
7b872a55
YZ		 1082 netdev->vlan_features |= NETIF_F_HIGHDMA;
1083 }
1da177e4 1084
7500673b
TD		 1085 netdev->vlan_features |= (NETIF_F_TSO |
1086 NETIF_F_HW_CSUM |
1087 NETIF_F_SG);
20501a69 1088
a22bb0b9
FR		 1089 /* Do not set IFF_UNICAST_FLT for VMWare's 82545EM */
1090 if (hw->device_id != E1000_DEV_ID_82545EM_COPPER ||
1091 hw->subsystem_vendor_id != PCI_VENDOR_ID_VMWARE)
1092 netdev->priv_flags |= IFF_UNICAST_FLT;
01789349 1093
91c527a5
JW		 1094 /* MTU range: 46 - 16110 */
1095 netdev->min_mtu = ETH_ZLEN - ETH_HLEN;
1096 netdev->max_mtu = MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN);
1097
1dc32918 1098 adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
2d7edb92 1099
cd94dd0b 1100 /* initialize eeprom parameters */
1dc32918 1101 if (e1000_init_eeprom_params(hw)) {
feb8f478 1102 e_err(probe, "EEPROM initialization failed\n");
6dd62ab0 1103 goto err_eeprom;
cd94dd0b
AK		 1104 }
1105
96838a40 1106 /* before reading the EEPROM, reset the controller to
6cfbd97b
JK		 1107 * put the device in a known good starting state
1108 */
96838a40 1109
1dc32918 1110 e1000_reset_hw(hw);
1da177e4
LT		 1111
1112 /* make sure the EEPROM is good */
1dc32918 1113 if (e1000_validate_eeprom_checksum(hw) < 0) {
feb8f478 1114 e_err(probe, "The EEPROM Checksum Is Not Valid\n");
67b3c27c 1115 e1000_dump_eeprom(adapter);
6cfbd97b 1116 /* set MAC address to all zeroes to invalidate and temporary
67b3c27c
AK		 1117 * disable this device for the user. This blocks regular
1118 * traffic while still permitting ethtool ioctls from reaching
1119 * the hardware as well as allowing the user to run the
1120 * interface after manually setting a hw addr using
1121 * `ip set address`
1122 */
1dc32918 1123 memset(hw->mac_addr, 0, netdev->addr_len);
67b3c27c
AK		 1124 } else {
1125 /* copy the MAC address out of the EEPROM */
1dc32918 1126 if (e1000_read_mac_addr(hw))
feb8f478 1127 e_err(probe, "EEPROM Read Error\n");
1da177e4 1128 }
dbedd44e 1129 /* don't block initialization here due to bad MAC address */
1dc32918 1130 memcpy(netdev->dev_addr, hw->mac_addr, netdev->addr_len);
1da177e4 1131
aaeb6cdf 1132 if (!is_valid_ether_addr(netdev->dev_addr))
feb8f478 1133 e_err(probe, "Invalid MAC Address\n");
1da177e4 1134
1da177e4 1135
a4010afe
JB		 1136 INIT_DELAYED_WORK(&adapter->watchdog_task, e1000_watchdog);
1137 INIT_DELAYED_WORK(&adapter->fifo_stall_task,
1138 e1000_82547_tx_fifo_stall_task);
1139 INIT_DELAYED_WORK(&adapter->phy_info_task, e1000_update_phy_info_task);
65f27f38 1140 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1da177e4 1141
1da177e4
LT		 1142 e1000_check_options(adapter);
1143
1144 /* Initial Wake on LAN setting
1145 * If APM wake is enabled in the EEPROM,
1146 * enable the ACPI Magic Packet filter
1147 */
1148
1dc32918 1149 switch (hw->mac_type) {
1da177e4
LT		 1150 case e1000_82542_rev2_0:
1151 case e1000_82542_rev2_1:
1152 case e1000_82543:
1153 break;
1154 case e1000_82544:
1dc32918 1155 e1000_read_eeprom(hw,
1da177e4
LT		 1156 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
1157 eeprom_apme_mask = E1000_EEPROM_82544_APM;
1158 break;
1159 case e1000_82546:
1160 case e1000_82546_rev_3:
a48954c8 1161 if (er32(STATUS) & E1000_STATUS_FUNC_1) {
1dc32918 1162 e1000_read_eeprom(hw,
1da177e4
LT		 1163 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1164 break;
1165 }
1166 /* Fall Through */
1167 default:
1dc32918 1168 e1000_read_eeprom(hw,
1da177e4
LT		 1169 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1170 break;
1171 }
96838a40 1172 if (eeprom_data & eeprom_apme_mask)
120cd576
JB		 1173 adapter->eeprom_wol |= E1000_WUFC_MAG;
1174
1175 /* now that we have the eeprom settings, apply the special cases
1176 * where the eeprom may be wrong or the board simply won't support
6cfbd97b
JK		 1177 * wake on lan on a particular port
1178 */
120cd576
JB		 1179 switch (pdev->device) {
1180 case E1000_DEV_ID_82546GB_PCIE:
1181 adapter->eeprom_wol = 0;
1182 break;
1183 case E1000_DEV_ID_82546EB_FIBER:
1184 case E1000_DEV_ID_82546GB_FIBER:
120cd576 1185 /* Wake events only supported on port A for dual fiber
6cfbd97b
JK		 1186 * regardless of eeprom setting
1187 */
1dc32918 1188 if (er32(STATUS) & E1000_STATUS_FUNC_1)
120cd576
JB		 1189 adapter->eeprom_wol = 0;
1190 break;
1191 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1192 /* if quad port adapter, disable WoL on all but port A */
1193 if (global_quad_port_a != 0)
1194 adapter->eeprom_wol = 0;
1195 else
3db1cd5c 1196 adapter->quad_port_a = true;
120cd576
JB		 1197 /* Reset for multiple quad port adapters */
1198 if (++global_quad_port_a == 4)
1199 global_quad_port_a = 0;
1200 break;
1201 }
1202
1203 /* initialize the wol settings based on the eeprom settings */
1204 adapter->wol = adapter->eeprom_wol;
de126489 1205 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1da177e4 1206
5377a416
DB		 1207 /* Auto detect PHY address */
1208 if (hw->mac_type == e1000_ce4100) {
1209 for (i = 0; i < 32; i++) {
1210 hw->phy_addr = i;
1211 e1000_read_phy_reg(hw, PHY_ID2, &tmp);
4e01f3a8
JS		 1212
1213 if (tmp != 0 && tmp != 0xFF)
5377a416
DB		 1214 break;
1215 }
4e01f3a8
JS		 1216
1217 if (i >= 32)
1218 goto err_eeprom;
5377a416
DB		 1219 }
1220
675ad473
ET		 1221 /* reset the hardware with the new settings */
1222 e1000_reset(adapter);
1223
1224 strcpy(netdev->name, "eth%d");
1225 err = register_netdev(netdev);
1226 if (err)
1227 goto err_register;
1228
52f5509f 1229 e1000_vlan_filter_on_off(adapter, false);
5622e404 1230
fb3d47d4 1231 /* print bus type/speed/width info */
feb8f478 1232 e_info(probe, "(PCI%s:%dMHz:%d-bit) %pM\n",
7837e58c
JP		 1233 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" : ""),
1234 ((hw->bus_speed == e1000_bus_speed_133) ? 133 :
1235 (hw->bus_speed == e1000_bus_speed_120) ? 120 :
1236 (hw->bus_speed == e1000_bus_speed_100) ? 100 :
1237 (hw->bus_speed == e1000_bus_speed_66) ? 66 : 33),
1238 ((hw->bus_width == e1000_bus_width_64) ? 64 : 32),
1239 netdev->dev_addr);
1314bbf3 1240
eb62efd2
JB		 1241 /* carrier off reporting is important to ethtool even BEFORE open */
1242 netif_carrier_off(netdev);
1243
feb8f478 1244 e_info(probe, "Intel(R) PRO/1000 Network Connection\n");
1da177e4
LT		 1245
1246 cards_found++;
1247 return 0;
1248
1249err_register:
6dd62ab0 1250err_eeprom:
1532ecea 1251 e1000_phy_hw_reset(hw);
6dd62ab0 1252
1dc32918
JP		 1253 if (hw->flash_address)
1254 iounmap(hw->flash_address);
6dd62ab0
VA		 1255 kfree(adapter->tx_ring);
1256 kfree(adapter->rx_ring);
e508be17 1257err_dma:
1da177e4 1258err_sw_init:
5377a416 1259err_mdio_ioremap:
13acde8f 1260 iounmap(hw->ce4100_gbe_mdio_base_virt);
1dc32918 1261 iounmap(hw->hw_addr);
1da177e4 1262err_ioremap:
0b76aae7 1263 disable_dev = !test_and_set_bit(__E1000_DISABLED, &adapter->flags);
1da177e4
LT		 1264 free_netdev(netdev);
1265err_alloc_etherdev:
81250297 1266 pci_release_selected_regions(pdev, bars);
6dd62ab0 1267err_pci_reg:
0b76aae7
TD		 1268 if (!adapter || disable_dev)
1269 pci_disable_device(pdev);
1da177e4
LT		 1270 return err;
1271}
1272
1273/**
1274 * e1000_remove - Device Removal Routine
1275 * @pdev: PCI device information struct
1276 *
1277 * e1000_remove is called by the PCI subsystem to alert the driver
b6fad9f9 1278 * that it should release a PCI device. That could be caused by a
1da177e4
LT		 1279 * Hot-Plug event, or because the driver is going to be removed from
1280 * memory.
1281 **/
9f9a12f8 1282static void e1000_remove(struct pci_dev *pdev)
1da177e4
LT		 1283{
1284 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 1285 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1286 struct e1000_hw *hw = &adapter->hw;
0b76aae7 1287 bool disable_dev;
1da177e4 1288
a4010afe 1289 e1000_down_and_stop(adapter);
0fccd0e9 1290 e1000_release_manageability(adapter);
1da177e4 1291
bea3348e
SH		 1292 unregister_netdev(netdev);
1293
1532ecea 1294 e1000_phy_hw_reset(hw);
1da177e4 1295
24025e4e
MC		 1296 kfree(adapter->tx_ring);
1297 kfree(adapter->rx_ring);
24025e4e 1298
1c26750c 1299 if (hw->mac_type == e1000_ce4100)
13acde8f 1300 iounmap(hw->ce4100_gbe_mdio_base_virt);
1dc32918
JP		 1301 iounmap(hw->hw_addr);
1302 if (hw->flash_address)
1303 iounmap(hw->flash_address);
81250297 1304 pci_release_selected_regions(pdev, adapter->bars);
1da177e4 1305
0b76aae7 1306 disable_dev = !test_and_set_bit(__E1000_DISABLED, &adapter->flags);
1da177e4
LT		 1307 free_netdev(netdev);
1308
0b76aae7
TD		 1309 if (disable_dev)
1310 pci_disable_device(pdev);
1da177e4
LT		 1311}
1312
1313/**
1314 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1315 * @adapter: board private structure to initialize
1316 *
1317 * e1000_sw_init initializes the Adapter private data structure.
e508be17 1318 * e1000_init_hw_struct MUST be called before this function
1da177e4 1319 **/
9f9a12f8 1320static int e1000_sw_init(struct e1000_adapter *adapter)
1da177e4 1321{
eb0f8054 1322 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1da177e4 1323
f56799ea
JK		 1324 adapter->num_tx_queues = 1;
1325 adapter->num_rx_queues = 1;
581d708e
MC		 1326
1327 if (e1000_alloc_queues(adapter)) {
feb8f478 1328 e_err(probe, "Unable to allocate memory for queues\n");
581d708e
MC		 1329 return -ENOMEM;
1330 }
1331
47313054 1332 /* Explicitly disable IRQ since the NIC can be in any state. */
47313054
HX		 1333 e1000_irq_disable(adapter);
1334
1da177e4 1335 spin_lock_init(&adapter->stats_lock);
1da177e4 1336
1314bbf3
AK		 1337 set_bit(__E1000_DOWN, &adapter->flags);
1338
1da177e4
LT		 1339 return 0;
1340}
1341
581d708e
MC		 1342/**
1343 * e1000_alloc_queues - Allocate memory for all rings
1344 * @adapter: board private structure to initialize
1345 *
1346 * We allocate one ring per queue at run-time since we don't know the
3e1d7cd2 1347 * number of queues at compile-time.
581d708e 1348 **/
9f9a12f8 1349static int e1000_alloc_queues(struct e1000_adapter *adapter)
581d708e 1350{
1c7e5b12 1351 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
a48954c8 1352 sizeof(struct e1000_tx_ring), GFP_KERNEL);
581d708e
MC		 1353 if (!adapter->tx_ring)
1354 return -ENOMEM;
581d708e 1355
1c7e5b12 1356 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
a48954c8 1357 sizeof(struct e1000_rx_ring), GFP_KERNEL);
581d708e
MC		 1358 if (!adapter->rx_ring) {
1359 kfree(adapter->tx_ring);
1360 return -ENOMEM;
1361 }
581d708e 1362
581d708e
MC		 1363 return E1000_SUCCESS;
1364}
1365
1da177e4
LT		 1366/**
1367 * e1000_open - Called when a network interface is made active
1368 * @netdev: network interface device structure
1369 *
1370 * Returns 0 on success, negative value on failure
1371 *
1372 * The open entry point is called when a network interface is made
1373 * active by the system (IFF_UP). At this point all resources needed
1374 * for transmit and receive operations are allocated, the interrupt
a4010afe 1375 * handler is registered with the OS, the watchdog task is started,
1da177e4
LT		 1376 * and the stack is notified that the interface is ready.
1377 **/
1f2f83f8 1378int e1000_open(struct net_device *netdev)
1da177e4 1379{
60490fe0 1380 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1381 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1382 int err;
1383
2db10a08 1384 /* disallow open during test */
1314bbf3 1385 if (test_bit(__E1000_TESTING, &adapter->flags))
2db10a08
AK		 1386 return -EBUSY;
1387
eb62efd2
JB		 1388 netif_carrier_off(netdev);
1389
1da177e4 1390 /* allocate transmit descriptors */
e0aac5a2
AK		 1391 err = e1000_setup_all_tx_resources(adapter);
1392 if (err)
1da177e4
LT		 1393 goto err_setup_tx;
1394
1395 /* allocate receive descriptors */
e0aac5a2 1396 err = e1000_setup_all_rx_resources(adapter);
b5bf28cd 1397 if (err)
e0aac5a2 1398 goto err_setup_rx;
b5bf28cd 1399
79f05bf0
AK		 1400 e1000_power_up_phy(adapter);
1401
2d7edb92 1402 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1dc32918 1403 if ((hw->mng_cookie.status &
2d7edb92
MC		 1404 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1405 e1000_update_mng_vlan(adapter);
1406 }
1da177e4 1407
e0aac5a2
AK		 1408 /* before we allocate an interrupt, we must be ready to handle it.
1409 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1410 * as soon as we call pci_request_irq, so we have to setup our
6cfbd97b
JK		 1411 * clean_rx handler before we do so.
1412 */
e0aac5a2
AK		 1413 e1000_configure(adapter);
1414
1415 err = e1000_request_irq(adapter);
1416 if (err)
1417 goto err_req_irq;
1418
1419 /* From here on the code is the same as e1000_up() */
1420 clear_bit(__E1000_DOWN, &adapter->flags);
1421
bea3348e 1422 napi_enable(&adapter->napi);
47313054 1423
e0aac5a2
AK		 1424 e1000_irq_enable(adapter);
1425
076152d5
BH		 1426 netif_start_queue(netdev);
1427
e0aac5a2 1428 /* fire a link status change interrupt to start the watchdog */
1dc32918 1429 ew32(ICS, E1000_ICS_LSC);
e0aac5a2 1430
1da177e4
LT		 1431 return E1000_SUCCESS;
1432
b5bf28cd 1433err_req_irq:
e0aac5a2 1434 e1000_power_down_phy(adapter);
581d708e 1435 e1000_free_all_rx_resources(adapter);
1da177e4 1436err_setup_rx:
581d708e 1437 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1438err_setup_tx:
1439 e1000_reset(adapter);
1440
1441 return err;
1442}
1443
1444/**
1445 * e1000_close - Disables a network interface
1446 * @netdev: network interface device structure
1447 *
1448 * Returns 0, this is not allowed to fail
1449 *
1450 * The close entry point is called when an interface is de-activated
1451 * by the OS. The hardware is still under the drivers control, but
1452 * needs to be disabled. A global MAC reset is issued to stop the
1453 * hardware, and all transmit and receive resources are freed.
1454 **/
1f2f83f8 1455int e1000_close(struct net_device *netdev)
1da177e4 1456{
60490fe0 1457 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1458 struct e1000_hw *hw = &adapter->hw;
6a7d64e3 1459 int count = E1000_CHECK_RESET_COUNT;
1460
1461 while (test_bit(__E1000_RESETTING, &adapter->flags) && count--)
1462 usleep_range(10000, 20000);
1da177e4 1463
2db10a08 1464 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 1465 e1000_down(adapter);
79f05bf0 1466 e1000_power_down_phy(adapter);
2db10a08 1467 e1000_free_irq(adapter);
1da177e4 1468
581d708e
MC		 1469 e1000_free_all_tx_resources(adapter);
1470 e1000_free_all_rx_resources(adapter);
1da177e4 1471
4666560a 1472 /* kill manageability vlan ID if supported, but not if a vlan with
6cfbd97b
JK		 1473 * the same ID is registered on the host OS (let 8021q kill it)
1474 */
1dc32918 1475 if ((hw->mng_cookie.status &
6cfbd97b
JK		 1476 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1477 !test_bit(adapter->mng_vlan_id, adapter->active_vlans)) {
80d5c368
PM		 1478 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
1479 adapter->mng_vlan_id);
2d7edb92 1480 }
b55ccb35 1481
1da177e4
LT		 1482 return 0;
1483}
1484
1485/**
1486 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1487 * @adapter: address of board private structure
2d7edb92
MC		 1488 * @start: address of beginning of memory
1489 * @len: length of memory
1da177e4 1490 **/
64798845
JP		 1491static bool e1000_check_64k_bound(struct e1000_adapter *adapter, void *start,
1492 unsigned long len)
1da177e4 1493{
1dc32918 1494 struct e1000_hw *hw = &adapter->hw;
e982f17c 1495 unsigned long begin = (unsigned long)start;
1da177e4
LT		 1496 unsigned long end = begin + len;
1497
2648345f 1498 /* First rev 82545 and 82546 need to not allow any memory
6cfbd97b
JK		 1499 * write location to cross 64k boundary due to errata 23
1500 */
1dc32918 1501 if (hw->mac_type == e1000_82545 ||
5377a416 1502 hw->mac_type == e1000_ce4100 ||
1dc32918 1503 hw->mac_type == e1000_82546) {
c3033b01 1504 return ((begin ^ (end - 1)) >> 16) != 0 ? false : true;
1da177e4
LT		 1505 }
1506
c3033b01 1507 return true;
1da177e4
LT		 1508}
1509
1510/**
1511 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1512 * @adapter: board private structure
581d708e 1513 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1514 *
1515 * Return 0 on success, negative on failure
1516 **/
64798845
JP		 1517static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
1518 struct e1000_tx_ring *txdr)
1da177e4 1519{
1da177e4
LT		 1520 struct pci_dev *pdev = adapter->pdev;
1521 int size;
1522
580f321d 1523 size = sizeof(struct e1000_tx_buffer) * txdr->count;
89bf67f1 1524 txdr->buffer_info = vzalloc(size);
14f8dc49 1525 if (!txdr->buffer_info)
1da177e4 1526 return -ENOMEM;
1da177e4
LT		 1527
1528 /* round up to nearest 4K */
1529
1530 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
9099cfb9 1531 txdr->size = ALIGN(txdr->size, 4096);
1da177e4 1532
b16f53be
NN		 1533 txdr->desc = dma_alloc_coherent(&pdev->dev, txdr->size, &txdr->dma,
1534 GFP_KERNEL);
96838a40 1535 if (!txdr->desc) {
1da177e4 1536setup_tx_desc_die:
1da177e4
LT		 1537 vfree(txdr->buffer_info);
1538 return -ENOMEM;
1539 }
1540
2648345f 1541 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1542 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1543 void *olddesc = txdr->desc;
1544 dma_addr_t olddma = txdr->dma;
feb8f478 1545 e_err(tx_err, "txdr align check failed: %u bytes at %p\n",
675ad473 1546 txdr->size, txdr->desc);
2648345f 1547 /* Try again, without freeing the previous */
b16f53be
NN		 1548 txdr->desc = dma_alloc_coherent(&pdev->dev, txdr->size,
1549 &txdr->dma, GFP_KERNEL);
2648345f 1550 /* Failed allocation, critical failure */
96838a40 1551 if (!txdr->desc) {
b16f53be
NN		 1552 dma_free_coherent(&pdev->dev, txdr->size, olddesc,
1553 olddma);
1da177e4
LT		 1554 goto setup_tx_desc_die;
1555 }
1556
1557 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1558 /* give up */
b16f53be
NN		 1559 dma_free_coherent(&pdev->dev, txdr->size, txdr->desc,
1560 txdr->dma);
1561 dma_free_coherent(&pdev->dev, txdr->size, olddesc,
1562 olddma);
feb8f478 1563 e_err(probe, "Unable to allocate aligned memory "
675ad473 1564 "for the transmit descriptor ring\n");
1da177e4
LT		 1565 vfree(txdr->buffer_info);
1566 return -ENOMEM;
1567 } else {
2648345f 1568 /* Free old allocation, new allocation was successful */
b16f53be
NN		 1569 dma_free_coherent(&pdev->dev, txdr->size, olddesc,
1570 olddma);
1da177e4
LT		 1571 }
1572 }
1573 memset(txdr->desc, 0, txdr->size);
1574
1575 txdr->next_to_use = 0;
1576 txdr->next_to_clean = 0;
1577
1578 return 0;
1579}
1580
581d708e
MC		 1581/**
1582 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1583 * (Descriptors) for all queues
1584 * @adapter: board private structure
1585 *
581d708e
MC		 1586 * Return 0 on success, negative on failure
1587 **/
64798845 1588int e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1589{
1590 int i, err = 0;
1591
f56799ea 1592 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1593 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1594 if (err) {
feb8f478 1595 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
3fbbc72e
VA		 1596 for (i-- ; i >= 0; i--)
1597 e1000_free_tx_resources(adapter,
1598 &adapter->tx_ring[i]);
581d708e
MC		 1599 break;
1600 }
1601 }
1602
1603 return err;
1604}
1605
1da177e4
LT		 1606/**
1607 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1608 * @adapter: board private structure
1609 *
1610 * Configure the Tx unit of the MAC after a reset.
1611 **/
64798845 1612static void e1000_configure_tx(struct e1000_adapter *adapter)
1da177e4 1613{
406874a7 1614 u64 tdba;
581d708e 1615 struct e1000_hw *hw = &adapter->hw;
1532ecea 1616 u32 tdlen, tctl, tipg;
406874a7 1617 u32 ipgr1, ipgr2;
1da177e4
LT		 1618
1619 /* Setup the HW Tx Head and Tail descriptor pointers */
1620
f56799ea 1621 switch (adapter->num_tx_queues) {
24025e4e
MC		 1622 case 1:
1623 default:
581d708e
MC		 1624 tdba = adapter->tx_ring[0].dma;
1625 tdlen = adapter->tx_ring[0].count *
1626 sizeof(struct e1000_tx_desc);
1dc32918
JP		 1627 ew32(TDLEN, tdlen);
1628 ew32(TDBAH, (tdba >> 32));
1629 ew32(TDBAL, (tdba & 0x00000000ffffffffULL));
1630 ew32(TDT, 0);
1631 ew32(TDH, 0);
6cfbd97b
JK		 1632 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ?
1633 E1000_TDH : E1000_82542_TDH);
1634 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ?
1635 E1000_TDT : E1000_82542_TDT);
24025e4e
MC		 1636 break;
1637 }
1da177e4
LT		 1638
1639 /* Set the default values for the Tx Inter Packet Gap timer */
1532ecea 1640 if ((hw->media_type == e1000_media_type_fiber ||
d89b6c67 1641 hw->media_type == e1000_media_type_internal_serdes))
0fadb059
JK		 1642 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1643 else
1644 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1645
581d708e 1646 switch (hw->mac_type) {
1da177e4
LT		 1647 case e1000_82542_rev2_0:
1648 case e1000_82542_rev2_1:
1649 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1650 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1651 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4
LT		 1652 break;
1653 default:
0fadb059
JK		 1654 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1655 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1656 break;
1da177e4 1657 }
0fadb059
JK		 1658 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1659 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1dc32918 1660 ew32(TIPG, tipg);
1da177e4
LT		 1661
1662 /* Set the Tx Interrupt Delay register */
1663
1dc32918 1664 ew32(TIDV, adapter->tx_int_delay);
581d708e 1665 if (hw->mac_type >= e1000_82540)
1dc32918 1666 ew32(TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1667
1668 /* Program the Transmit Control Register */
1669
1dc32918 1670 tctl = er32(TCTL);
1da177e4 1671 tctl &= ~E1000_TCTL_CT;
7e6c9861 1672 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1673 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1674
581d708e 1675 e1000_config_collision_dist(hw);
1da177e4
LT		 1676
1677 /* Setup Transmit Descriptor Settings for eop descriptor */
6a042dab
JB		 1678 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1679
1680 /* only set IDE if we are delaying interrupts using the timers */
1681 if (adapter->tx_int_delay)
1682 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1da177e4 1683
581d708e 1684 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1685 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1686 else
1687 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1688
1689 /* Cache if we're 82544 running in PCI-X because we'll
6cfbd97b
JK		 1690 * need this to apply a workaround later in the send path.
1691 */
581d708e
MC		 1692 if (hw->mac_type == e1000_82544 &&
1693 hw->bus_type == e1000_bus_type_pcix)
3db1cd5c 1694 adapter->pcix_82544 = true;
7e6c9861 1695
1dc32918 1696 ew32(TCTL, tctl);
7e6c9861 1697
1da177e4
LT		 1698}
1699
1700/**
1701 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1702 * @adapter: board private structure
581d708e 1703 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1704 *
1705 * Returns 0 on success, negative on failure
1706 **/
64798845
JP		 1707static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
1708 struct e1000_rx_ring *rxdr)
1da177e4 1709{
1da177e4 1710 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1711 int size, desc_len;
1da177e4 1712
93f0afe9 1713 size = sizeof(struct e1000_rx_buffer) * rxdr->count;
89bf67f1 1714 rxdr->buffer_info = vzalloc(size);
14f8dc49 1715 if (!rxdr->buffer_info)
1da177e4 1716 return -ENOMEM;
1da177e4 1717
1532ecea 1718 desc_len = sizeof(struct e1000_rx_desc);
2d7edb92 1719
1da177e4
LT		 1720 /* Round up to nearest 4K */
1721
2d7edb92 1722 rxdr->size = rxdr->count * desc_len;
9099cfb9 1723 rxdr->size = ALIGN(rxdr->size, 4096);
1da177e4 1724
b16f53be
NN		 1725 rxdr->desc = dma_alloc_coherent(&pdev->dev, rxdr->size, &rxdr->dma,
1726 GFP_KERNEL);
581d708e 1727 if (!rxdr->desc) {
1da177e4 1728setup_rx_desc_die:
1da177e4
LT		 1729 vfree(rxdr->buffer_info);
1730 return -ENOMEM;
1731 }
1732
2648345f 1733 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1734 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1735 void *olddesc = rxdr->desc;
1736 dma_addr_t olddma = rxdr->dma;
feb8f478 1737 e_err(rx_err, "rxdr align check failed: %u bytes at %p\n",
675ad473 1738 rxdr->size, rxdr->desc);
2648345f 1739 /* Try again, without freeing the previous */
b16f53be
NN		 1740 rxdr->desc = dma_alloc_coherent(&pdev->dev, rxdr->size,
1741 &rxdr->dma, GFP_KERNEL);
2648345f 1742 /* Failed allocation, critical failure */
581d708e 1743 if (!rxdr->desc) {
b16f53be
NN		 1744 dma_free_coherent(&pdev->dev, rxdr->size, olddesc,
1745 olddma);
1da177e4
LT		 1746 goto setup_rx_desc_die;
1747 }
1748
1749 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1750 /* give up */
b16f53be
NN		 1751 dma_free_coherent(&pdev->dev, rxdr->size, rxdr->desc,
1752 rxdr->dma);
1753 dma_free_coherent(&pdev->dev, rxdr->size, olddesc,
1754 olddma);
feb8f478
ET		 1755 e_err(probe, "Unable to allocate aligned memory for "
1756 "the Rx descriptor ring\n");
581d708e 1757 goto setup_rx_desc_die;
1da177e4 1758 } else {
2648345f 1759 /* Free old allocation, new allocation was successful */
b16f53be
NN		 1760 dma_free_coherent(&pdev->dev, rxdr->size, olddesc,
1761 olddma);
1da177e4
LT		 1762 }
1763 }
1764 memset(rxdr->desc, 0, rxdr->size);
1765
1766 rxdr->next_to_clean = 0;
1767 rxdr->next_to_use = 0;
edbbb3ca 1768 rxdr->rx_skb_top = NULL;
1da177e4
LT		 1769
1770 return 0;
1771}
1772
581d708e
MC		 1773/**
1774 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1775 * (Descriptors) for all queues
1776 * @adapter: board private structure
1777 *
581d708e
MC		 1778 * Return 0 on success, negative on failure
1779 **/
64798845 1780int e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1781{
1782 int i, err = 0;
1783
f56799ea 1784 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1785 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1786 if (err) {
feb8f478 1787 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
3fbbc72e
VA		 1788 for (i-- ; i >= 0; i--)
1789 e1000_free_rx_resources(adapter,
1790 &adapter->rx_ring[i]);
581d708e
MC		 1791 break;
1792 }
1793 }
1794
1795 return err;
1796}
1797
1da177e4 1798/**
2648345f 1799 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1800 * @adapter: Board private structure
1801 **/
64798845 1802static void e1000_setup_rctl(struct e1000_adapter *adapter)
1da177e4 1803{
1dc32918 1804 struct e1000_hw *hw = &adapter->hw;
630b25cd 1805 u32 rctl;
1da177e4 1806
1dc32918 1807 rctl = er32(RCTL);
1da177e4
LT		 1808
1809 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1810
d5bc77a2
DN		 1811 rctl |= E1000_RCTL_BAM | E1000_RCTL_LBM_NO |
1812 E1000_RCTL_RDMTS_HALF |
1dc32918 1813 (hw->mc_filter_type << E1000_RCTL_MO_SHIFT);
1da177e4 1814
1dc32918 1815 if (hw->tbi_compatibility_on == 1)
1da177e4
LT		 1816 rctl |= E1000_RCTL_SBP;
1817 else
1818 rctl &= ~E1000_RCTL_SBP;
1819
2d7edb92
MC		 1820 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1821 rctl &= ~E1000_RCTL_LPE;
1822 else
1823 rctl |= E1000_RCTL_LPE;
1824
1da177e4 1825 /* Setup buffer sizes */
9e2feace
AK		 1826 rctl &= ~E1000_RCTL_SZ_4096;
1827 rctl |= E1000_RCTL_BSEX;
1828 switch (adapter->rx_buffer_len) {
a48954c8
JW		 1829 case E1000_RXBUFFER_2048:
1830 default:
1831 rctl |= E1000_RCTL_SZ_2048;
1832 rctl &= ~E1000_RCTL_BSEX;
1833 break;
1834 case E1000_RXBUFFER_4096:
1835 rctl |= E1000_RCTL_SZ_4096;
1836 break;
1837 case E1000_RXBUFFER_8192:
1838 rctl |= E1000_RCTL_SZ_8192;
1839 break;
1840 case E1000_RXBUFFER_16384:
1841 rctl |= E1000_RCTL_SZ_16384;
1842 break;
2d7edb92
MC		 1843 }
1844
e825b731
BG		 1845 /* This is useful for sniffing bad packets. */
1846 if (adapter->netdev->features & NETIF_F_RXALL) {
1847 /* UPE and MPE will be handled by normal PROMISC logic
6cfbd97b
JK		 1848 * in e1000e_set_rx_mode
1849 */
e825b731
BG		 1850 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
1851 E1000_RCTL_BAM | /* RX All Bcast Pkts */
1852 E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
1853
1854 rctl &= ~(E1000_RCTL_VFE | /* Disable VLAN filter */
1855 E1000_RCTL_DPF | /* Allow filtered pause */
1856 E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
1857 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
1858 * and that breaks VLANs.
1859 */
1860 }
1861
1dc32918 1862 ew32(RCTL, rctl);
1da177e4
LT		 1863}
1864
1865/**
1866 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1867 * @adapter: board private structure
1868 *
1869 * Configure the Rx unit of the MAC after a reset.
1870 **/
64798845 1871static void e1000_configure_rx(struct e1000_adapter *adapter)
1da177e4 1872{
406874a7 1873 u64 rdba;
581d708e 1874 struct e1000_hw *hw = &adapter->hw;
1532ecea 1875 u32 rdlen, rctl, rxcsum;
2d7edb92 1876
edbbb3ca
JB		 1877 if (adapter->netdev->mtu > ETH_DATA_LEN) {
1878 rdlen = adapter->rx_ring[0].count *
a48954c8 1879 sizeof(struct e1000_rx_desc);
edbbb3ca
JB		 1880 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
1881 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
1882 } else {
1883 rdlen = adapter->rx_ring[0].count *
a48954c8 1884 sizeof(struct e1000_rx_desc);
edbbb3ca
JB		 1885 adapter->clean_rx = e1000_clean_rx_irq;
1886 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1887 }
1da177e4
LT		 1888
1889 /* disable receives while setting up the descriptors */
1dc32918
JP		 1890 rctl = er32(RCTL);
1891 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1892
1893 /* set the Receive Delay Timer Register */
1dc32918 1894 ew32(RDTR, adapter->rx_int_delay);
1da177e4 1895
581d708e 1896 if (hw->mac_type >= e1000_82540) {
1dc32918 1897 ew32(RADV, adapter->rx_abs_int_delay);
835bb129 1898 if (adapter->itr_setting != 0)
1dc32918 1899 ew32(ITR, 1000000000 / (adapter->itr * 256));
1da177e4
LT		 1900 }
1901
581d708e 1902 /* Setup the HW Rx Head and Tail Descriptor Pointers and
6cfbd97b
JK		 1903 * the Base and Length of the Rx Descriptor Ring
1904 */
f56799ea 1905 switch (adapter->num_rx_queues) {
24025e4e
MC		 1906 case 1:
1907 default:
581d708e 1908 rdba = adapter->rx_ring[0].dma;
1dc32918
JP		 1909 ew32(RDLEN, rdlen);
1910 ew32(RDBAH, (rdba >> 32));
1911 ew32(RDBAL, (rdba & 0x00000000ffffffffULL));
1912 ew32(RDT, 0);
1913 ew32(RDH, 0);
6cfbd97b
JK		 1914 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ?
1915 E1000_RDH : E1000_82542_RDH);
1916 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ?
1917 E1000_RDT : E1000_82542_RDT);
581d708e 1918 break;
24025e4e
MC		 1919 }
1920
1da177e4 1921 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e 1922 if (hw->mac_type >= e1000_82543) {
1dc32918 1923 rxcsum = er32(RXCSUM);
630b25cd 1924 if (adapter->rx_csum)
2d7edb92 1925 rxcsum |= E1000_RXCSUM_TUOFL;
630b25cd 1926 else
2d7edb92 1927 /* don't need to clear IPPCSE as it defaults to 0 */
630b25cd 1928 rxcsum &= ~E1000_RXCSUM_TUOFL;
1dc32918 1929 ew32(RXCSUM, rxcsum);
1da177e4
LT		 1930 }
1931
1932 /* Enable Receives */
d5bc77a2 1933 ew32(RCTL, rctl | E1000_RCTL_EN);
1da177e4
LT		 1934}
1935
1936/**
581d708e 1937 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 1938 * @adapter: board private structure
581d708e 1939 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 1940 *
1941 * Free all transmit software resources
1942 **/
64798845
JP		 1943static void e1000_free_tx_resources(struct e1000_adapter *adapter,
1944 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 1945{
1946 struct pci_dev *pdev = adapter->pdev;
1947
581d708e 1948 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 1949
581d708e
MC		 1950 vfree(tx_ring->buffer_info);
1951 tx_ring->buffer_info = NULL;
1da177e4 1952
b16f53be
NN		 1953 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
1954 tx_ring->dma);
1da177e4 1955
581d708e
MC		 1956 tx_ring->desc = NULL;
1957}
1958
1959/**
1960 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1961 * @adapter: board private structure
1962 *
1963 * Free all transmit software resources
1964 **/
64798845 1965void e1000_free_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1966{
1967 int i;
1968
f56799ea 1969 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1970 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1971}
1972
580f321d
FW		 1973static void
1974e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1975 struct e1000_tx_buffer *buffer_info)
1da177e4 1976{
602c0554
AD		 1977 if (buffer_info->dma) {
1978 if (buffer_info->mapped_as_page)
b16f53be
NN		 1979 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
1980 buffer_info->length, DMA_TO_DEVICE);
602c0554 1981 else
b16f53be 1982 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
602c0554 1983 buffer_info->length,
b16f53be 1984 DMA_TO_DEVICE);
602c0554
AD		 1985 buffer_info->dma = 0;
1986 }
a9ebadd6 1987 if (buffer_info->skb) {
1da177e4 1988 dev_kfree_skb_any(buffer_info->skb);
a9ebadd6
JB		 1989 buffer_info->skb = NULL;
1990 }
37e73df8 1991 buffer_info->time_stamp = 0;
a9ebadd6 1992 /* buffer_info must be completely set up in the transmit path */
1da177e4
LT		 1993}
1994
1995/**
1996 * e1000_clean_tx_ring - Free Tx Buffers
1997 * @adapter: board private structure
581d708e 1998 * @tx_ring: ring to be cleaned
1da177e4 1999 **/
64798845
JP		 2000static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
2001 struct e1000_tx_ring *tx_ring)
1da177e4 2002{
1dc32918 2003 struct e1000_hw *hw = &adapter->hw;
580f321d 2004 struct e1000_tx_buffer *buffer_info;
1da177e4
LT		 2005 unsigned long size;
2006 unsigned int i;
2007
2008 /* Free all the Tx ring sk_buffs */
2009
96838a40 2010 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 2011 buffer_info = &tx_ring->buffer_info[i];
2012 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2013 }
2014
2f66fd36 2015 netdev_reset_queue(adapter->netdev);
580f321d 2016 size = sizeof(struct e1000_tx_buffer) * tx_ring->count;
1da177e4
LT		 2017 memset(tx_ring->buffer_info, 0, size);
2018
2019 /* Zero out the descriptor ring */
2020
2021 memset(tx_ring->desc, 0, tx_ring->size);
2022
2023 tx_ring->next_to_use = 0;
2024 tx_ring->next_to_clean = 0;
3db1cd5c 2025 tx_ring->last_tx_tso = false;
1da177e4 2026
1dc32918
JP		 2027 writel(0, hw->hw_addr + tx_ring->tdh);
2028 writel(0, hw->hw_addr + tx_ring->tdt);
581d708e
MC		 2029}
2030
2031/**
2032 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2033 * @adapter: board private structure
2034 **/
64798845 2035static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
581d708e
MC		 2036{
2037 int i;
2038
f56799ea 2039 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2040 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2041}
2042
2043/**
2044 * e1000_free_rx_resources - Free Rx Resources
2045 * @adapter: board private structure
581d708e 2046 * @rx_ring: ring to clean the resources from
1da177e4
LT		 2047 *
2048 * Free all receive software resources
2049 **/
64798845
JP		 2050static void e1000_free_rx_resources(struct e1000_adapter *adapter,
2051 struct e1000_rx_ring *rx_ring)
1da177e4 2052{
1da177e4
LT		 2053 struct pci_dev *pdev = adapter->pdev;
2054
581d708e 2055 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 2056
2057 vfree(rx_ring->buffer_info);
2058 rx_ring->buffer_info = NULL;
2059
b16f53be
NN		 2060 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2061 rx_ring->dma);
1da177e4
LT		 2062
2063 rx_ring->desc = NULL;
2064}
2065
2066/**
581d708e 2067 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 2068 * @adapter: board private structure
581d708e
MC		 2069 *
2070 * Free all receive software resources
2071 **/
64798845 2072void e1000_free_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 2073{
2074 int i;
2075
f56799ea 2076 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 2077 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2078}
2079
13809609
FW		 2080#define E1000_HEADROOM (NET_SKB_PAD + NET_IP_ALIGN)
2081static unsigned int e1000_frag_len(const struct e1000_adapter *a)
2082{
2083 return SKB_DATA_ALIGN(a->rx_buffer_len + E1000_HEADROOM) +
2084 SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
2085}
2086
2087static void *e1000_alloc_frag(const struct e1000_adapter *a)
2088{
2089 unsigned int len = e1000_frag_len(a);
2090 u8 *data = netdev_alloc_frag(len);
2091
2092 if (likely(data))
2093 data += E1000_HEADROOM;
2094 return data;
2095}
2096
581d708e
MC		 2097/**
2098 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2099 * @adapter: board private structure
2100 * @rx_ring: ring to free buffers from
1da177e4 2101 **/
64798845
JP		 2102static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
2103 struct e1000_rx_ring *rx_ring)
1da177e4 2104{
1dc32918 2105 struct e1000_hw *hw = &adapter->hw;
93f0afe9 2106 struct e1000_rx_buffer *buffer_info;
1da177e4
LT		 2107 struct pci_dev *pdev = adapter->pdev;
2108 unsigned long size;
630b25cd 2109 unsigned int i;
1da177e4 2110
13809609 2111 /* Free all the Rx netfrags */
96838a40 2112 for (i = 0; i < rx_ring->count; i++) {
1da177e4 2113 buffer_info = &rx_ring->buffer_info[i];
13809609
FW		 2114 if (adapter->clean_rx == e1000_clean_rx_irq) {
2115 if (buffer_info->dma)
2116 dma_unmap_single(&pdev->dev, buffer_info->dma,
2117 adapter->rx_buffer_len,
2118 DMA_FROM_DEVICE);
2119 if (buffer_info->rxbuf.data) {
6bf93ba8 2120 skb_free_frag(buffer_info->rxbuf.data);
13809609
FW		 2121 buffer_info->rxbuf.data = NULL;
2122 }
2123 } else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq) {
2124 if (buffer_info->dma)
2125 dma_unmap_page(&pdev->dev, buffer_info->dma,
2126 adapter->rx_buffer_len,
2127 DMA_FROM_DEVICE);
2128 if (buffer_info->rxbuf.page) {
2129 put_page(buffer_info->rxbuf.page);
2130 buffer_info->rxbuf.page = NULL;
2131 }
679be3ba 2132 }
1da177e4 2133
679be3ba 2134 buffer_info->dma = 0;
1da177e4
LT		 2135 }
2136
edbbb3ca 2137 /* there also may be some cached data from a chained receive */
de591c78
FW		 2138 napi_free_frags(&adapter->napi);
2139 rx_ring->rx_skb_top = NULL;
edbbb3ca 2140
93f0afe9 2141 size = sizeof(struct e1000_rx_buffer) * rx_ring->count;
1da177e4
LT		 2142 memset(rx_ring->buffer_info, 0, size);
2143
2144 /* Zero out the descriptor ring */
1da177e4
LT		 2145 memset(rx_ring->desc, 0, rx_ring->size);
2146
2147 rx_ring->next_to_clean = 0;
2148 rx_ring->next_to_use = 0;
2149
1dc32918
JP		 2150 writel(0, hw->hw_addr + rx_ring->rdh);
2151 writel(0, hw->hw_addr + rx_ring->rdt);
581d708e
MC		 2152}
2153
2154/**
2155 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2156 * @adapter: board private structure
2157 **/
64798845 2158static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
581d708e
MC		 2159{
2160 int i;
2161
f56799ea 2162 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2163 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2164}
2165
2166/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2167 * and memory write and invalidate disabled for certain operations
2168 */
64798845 2169static void e1000_enter_82542_rst(struct e1000_adapter *adapter)
1da177e4 2170{
1dc32918 2171 struct e1000_hw *hw = &adapter->hw;
1da177e4 2172 struct net_device *netdev = adapter->netdev;
406874a7 2173 u32 rctl;
1da177e4 2174
1dc32918 2175 e1000_pci_clear_mwi(hw);
1da177e4 2176
1dc32918 2177 rctl = er32(RCTL);
1da177e4 2178 rctl |= E1000_RCTL_RST;
1dc32918
JP		 2179 ew32(RCTL, rctl);
2180 E1000_WRITE_FLUSH();
1da177e4
LT		 2181 mdelay(5);
2182
96838a40 2183 if (netif_running(netdev))
581d708e 2184 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2185}
2186
64798845 2187static void e1000_leave_82542_rst(struct e1000_adapter *adapter)
1da177e4 2188{
1dc32918 2189 struct e1000_hw *hw = &adapter->hw;
1da177e4 2190 struct net_device *netdev = adapter->netdev;
406874a7 2191 u32 rctl;
1da177e4 2192
1dc32918 2193 rctl = er32(RCTL);
1da177e4 2194 rctl &= ~E1000_RCTL_RST;
1dc32918
JP		 2195 ew32(RCTL, rctl);
2196 E1000_WRITE_FLUSH();
1da177e4
LT		 2197 mdelay(5);
2198
1dc32918
JP		 2199 if (hw->pci_cmd_word & PCI_COMMAND_INVALIDATE)
2200 e1000_pci_set_mwi(hw);
1da177e4 2201
96838a40 2202 if (netif_running(netdev)) {
72d64a43
JK		 2203 /* No need to loop, because 82542 supports only 1 queue */
2204 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2205 e1000_configure_rx(adapter);
72d64a43 2206 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2207 }
2208}
2209
2210/**
2211 * e1000_set_mac - Change the Ethernet Address of the NIC
2212 * @netdev: network interface device structure
2213 * @p: pointer to an address structure
2214 *
2215 * Returns 0 on success, negative on failure
2216 **/
64798845 2217static int e1000_set_mac(struct net_device *netdev, void *p)
1da177e4 2218{
60490fe0 2219 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 2220 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2221 struct sockaddr *addr = p;
2222
96838a40 2223 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2224 return -EADDRNOTAVAIL;
2225
2226 /* 82542 2.0 needs to be in reset to write receive address registers */
2227
1dc32918 2228 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2229 e1000_enter_82542_rst(adapter);
2230
2231 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1dc32918 2232 memcpy(hw->mac_addr, addr->sa_data, netdev->addr_len);
1da177e4 2233
1dc32918 2234 e1000_rar_set(hw, hw->mac_addr, 0);
1da177e4 2235
1dc32918 2236 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2237 e1000_leave_82542_rst(adapter);
2238
2239 return 0;
2240}
2241
2242/**
db0ce50d 2243 * e1000_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
1da177e4
LT		 2244 * @netdev: network interface device structure
2245 *
db0ce50d
PM		 2246 * The set_rx_mode entry point is called whenever the unicast or multicast
2247 * address lists or the network interface flags are updated. This routine is
2248 * responsible for configuring the hardware for proper unicast, multicast,
1da177e4
LT		 2249 * promiscuous mode, and all-multi behavior.
2250 **/
64798845 2251static void e1000_set_rx_mode(struct net_device *netdev)
1da177e4 2252{
60490fe0 2253 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 2254 struct e1000_hw *hw = &adapter->hw;
ccffad25
JP		 2255 struct netdev_hw_addr *ha;
2256 bool use_uc = false;
406874a7
JP		 2257 u32 rctl;
2258 u32 hash_value;
868d5309 2259 int i, rar_entries = E1000_RAR_ENTRIES;
1532ecea 2260 int mta_reg_count = E1000_NUM_MTA_REGISTERS;
81c52285
JB		 2261 u32 *mcarray = kcalloc(mta_reg_count, sizeof(u32), GFP_ATOMIC);
2262
14f8dc49 2263 if (!mcarray)
81c52285 2264 return;
cd94dd0b 2265
2648345f
MC		 2266 /* Check for Promiscuous and All Multicast modes */
2267
1dc32918 2268 rctl = er32(RCTL);
1da177e4 2269
96838a40 2270 if (netdev->flags & IFF_PROMISC) {
1da177e4 2271 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2272 rctl &= ~E1000_RCTL_VFE;
1da177e4 2273 } else {
1532ecea 2274 if (netdev->flags & IFF_ALLMULTI)
746b9f02 2275 rctl |= E1000_RCTL_MPE;
1532ecea 2276 else
746b9f02 2277 rctl &= ~E1000_RCTL_MPE;
1532ecea 2278 /* Enable VLAN filter if there is a VLAN */
5622e404 2279 if (e1000_vlan_used(adapter))
1532ecea 2280 rctl |= E1000_RCTL_VFE;
db0ce50d
PM		 2281 }
2282
32e7bfc4 2283 if (netdev_uc_count(netdev) > rar_entries - 1) {
db0ce50d
PM		 2284 rctl |= E1000_RCTL_UPE;
2285 } else if (!(netdev->flags & IFF_PROMISC)) {
2286 rctl &= ~E1000_RCTL_UPE;
ccffad25 2287 use_uc = true;
1da177e4
LT		 2288 }
2289
1dc32918 2290 ew32(RCTL, rctl);
1da177e4
LT		 2291
2292 /* 82542 2.0 needs to be in reset to write receive address registers */
2293
96838a40 2294 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2295 e1000_enter_82542_rst(adapter);
2296
db0ce50d
PM		 2297 /* load the first 14 addresses into the exact filters 1-14. Unicast
2298 * addresses take precedence to avoid disabling unicast filtering
2299 * when possible.
2300 *
b595076a 2301 * RAR 0 is used for the station MAC address
1da177e4
LT		 2302 * if there are not 14 addresses, go ahead and clear the filters
2303 */
ccffad25
JP		 2304 i = 1;
2305 if (use_uc)
32e7bfc4 2306 netdev_for_each_uc_addr(ha, netdev) {
ccffad25
JP		 2307 if (i == rar_entries)
2308 break;
2309 e1000_rar_set(hw, ha->addr, i++);
2310 }
2311
22bedad3 2312 netdev_for_each_mc_addr(ha, netdev) {
7a81e9f3
JP		 2313 if (i == rar_entries) {
2314 /* load any remaining addresses into the hash table */
2315 u32 hash_reg, hash_bit, mta;
22bedad3 2316 hash_value = e1000_hash_mc_addr(hw, ha->addr);
7a81e9f3
JP		 2317 hash_reg = (hash_value >> 5) & 0x7F;
2318 hash_bit = hash_value & 0x1F;
2319 mta = (1 << hash_bit);
2320 mcarray[hash_reg] |= mta;
10886af5 2321 } else {
22bedad3 2322 e1000_rar_set(hw, ha->addr, i++);
1da177e4
LT		 2323 }
2324 }
2325
7a81e9f3
JP		 2326 for (; i < rar_entries; i++) {
2327 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2328 E1000_WRITE_FLUSH();
2329 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2330 E1000_WRITE_FLUSH();
1da177e4
LT		 2331 }
2332
81c52285 2333 /* write the hash table completely, write from bottom to avoid
6cfbd97b
JK		 2334 * both stupid write combining chipsets, and flushing each write
2335 */
81c52285 2336 for (i = mta_reg_count - 1; i >= 0 ; i--) {
6cfbd97b 2337 /* If we are on an 82544 has an errata where writing odd
81c52285
JB		 2338 * offsets overwrites the previous even offset, but writing
2339 * backwards over the range solves the issue by always
2340 * writing the odd offset first
2341 */
2342 E1000_WRITE_REG_ARRAY(hw, MTA, i, mcarray[i]);
2343 }
2344 E1000_WRITE_FLUSH();
2345
96838a40 2346 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2347 e1000_leave_82542_rst(adapter);
81c52285
JB		 2348
2349 kfree(mcarray);
1da177e4
LT		 2350}
2351
a4010afe
JB		 2352/**
2353 * e1000_update_phy_info_task - get phy info
2354 * @work: work struct contained inside adapter struct
2355 *
2356 * Need to wait a few seconds after link up to get diagnostic information from
2357 * the phy
2358 */
5cf42fcd
JB		 2359static void e1000_update_phy_info_task(struct work_struct *work)
2360{
2361 struct e1000_adapter *adapter = container_of(work,
a4010afe
JB		 2362 struct e1000_adapter,
2363 phy_info_task.work);
b2f963bf 2364
a4010afe 2365 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
1da177e4
LT		 2366}
2367
5cf42fcd
JB		 2368/**
2369 * e1000_82547_tx_fifo_stall_task - task to complete work
2370 * @work: work struct contained inside adapter struct
2371 **/
2372static void e1000_82547_tx_fifo_stall_task(struct work_struct *work)
2373{
2374 struct e1000_adapter *adapter = container_of(work,
a4010afe
JB		 2375 struct e1000_adapter,
2376 fifo_stall_task.work);
1dc32918 2377 struct e1000_hw *hw = &adapter->hw;
1da177e4 2378 struct net_device *netdev = adapter->netdev;
406874a7 2379 u32 tctl;
1da177e4 2380
96838a40 2381 if (atomic_read(&adapter->tx_fifo_stall)) {
1dc32918
JP		 2382 if ((er32(TDT) == er32(TDH)) &&
2383 (er32(TDFT) == er32(TDFH)) &&
2384 (er32(TDFTS) == er32(TDFHS))) {
2385 tctl = er32(TCTL);
2386 ew32(TCTL, tctl & ~E1000_TCTL_EN);
2387 ew32(TDFT, adapter->tx_head_addr);
2388 ew32(TDFH, adapter->tx_head_addr);
2389 ew32(TDFTS, adapter->tx_head_addr);
2390 ew32(TDFHS, adapter->tx_head_addr);
2391 ew32(TCTL, tctl);
2392 E1000_WRITE_FLUSH();
1da177e4
LT		 2393
2394 adapter->tx_fifo_head = 0;
2395 atomic_set(&adapter->tx_fifo_stall, 0);
2396 netif_wake_queue(netdev);
baa34745 2397 } else if (!test_bit(__E1000_DOWN, &adapter->flags)) {
a4010afe 2398 schedule_delayed_work(&adapter->fifo_stall_task, 1);
1da177e4
LT		 2399 }
2400 }
2401}
2402
b548192a 2403bool e1000_has_link(struct e1000_adapter *adapter)
be0f0719
JB		 2404{
2405 struct e1000_hw *hw = &adapter->hw;
2406 bool link_active = false;
be0f0719 2407
6d9e5130
NS		 2408 /* get_link_status is set on LSC (link status) interrupt or rx
2409 * sequence error interrupt (except on intel ce4100).
2410 * get_link_status will stay false until the
2411 * e1000_check_for_link establishes link for copper adapters
2412 * ONLY
be0f0719
JB		 2413 */
2414 switch (hw->media_type) {
2415 case e1000_media_type_copper:
6d9e5130
NS		 2416 if (hw->mac_type == e1000_ce4100)
2417 hw->get_link_status = 1;
be0f0719 2418 if (hw->get_link_status) {
120a5d0d 2419 e1000_check_for_link(hw);
be0f0719
JB		 2420 link_active = !hw->get_link_status;
2421 } else {
2422 link_active = true;
2423 }
2424 break;
2425 case e1000_media_type_fiber:
120a5d0d 2426 e1000_check_for_link(hw);
be0f0719
JB		 2427 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
2428 break;
2429 case e1000_media_type_internal_serdes:
120a5d0d 2430 e1000_check_for_link(hw);
be0f0719
JB		 2431 link_active = hw->serdes_has_link;
2432 break;
2433 default:
2434 break;
2435 }
2436
2437 return link_active;
2438}
2439
1da177e4 2440/**
a4010afe
JB		 2441 * e1000_watchdog - work function
2442 * @work: work struct contained inside adapter struct
1da177e4 2443 **/
a4010afe 2444static void e1000_watchdog(struct work_struct *work)
1da177e4 2445{
a4010afe
JB		 2446 struct e1000_adapter *adapter = container_of(work,
2447 struct e1000_adapter,
2448 watchdog_task.work);
1dc32918 2449 struct e1000_hw *hw = &adapter->hw;
1da177e4 2450 struct net_device *netdev = adapter->netdev;
545c67c0 2451 struct e1000_tx_ring *txdr = adapter->tx_ring;
406874a7 2452 u32 link, tctl;
90fb5135 2453
be0f0719
JB		 2454 link = e1000_has_link(adapter);
2455 if ((netif_carrier_ok(netdev)) && link)
2456 goto link_up;
1da177e4 2457
96838a40
JB		 2458 if (link) {
2459 if (!netif_carrier_ok(netdev)) {
406874a7 2460 u32 ctrl;
c3033b01 2461 bool txb2b = true;
be0f0719 2462 /* update snapshot of PHY registers on LSC */
1dc32918 2463 e1000_get_speed_and_duplex(hw,
6cfbd97b
JK		 2464 &adapter->link_speed,
2465 &adapter->link_duplex);
1da177e4 2466
1dc32918 2467 ctrl = er32(CTRL);
675ad473
ET		 2468 pr_info("%s NIC Link is Up %d Mbps %s, "
2469 "Flow Control: %s\n",
2470 netdev->name,
2471 adapter->link_speed,
2472 adapter->link_duplex == FULL_DUPLEX ?
2473 "Full Duplex" : "Half Duplex",
2474 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2475 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2476 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2477 E1000_CTRL_TFCE) ? "TX" : "None")));
1da177e4 2478
39ca5f03 2479 /* adjust timeout factor according to speed/duplex */
66a2b0a3 2480 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2481 switch (adapter->link_speed) {
2482 case SPEED_10:
c3033b01 2483 txb2b = false;
be0f0719 2484 adapter->tx_timeout_factor = 16;
7e6c9861
JK		 2485 break;
2486 case SPEED_100:
c3033b01 2487 txb2b = false;
7e6c9861
JK		 2488 /* maybe add some timeout factor ? */
2489 break;
2490 }
2491
1532ecea 2492 /* enable transmits in the hardware */
1dc32918 2493 tctl = er32(TCTL);
7e6c9861 2494 tctl |= E1000_TCTL_EN;
1dc32918 2495 ew32(TCTL, tctl);
66a2b0a3 2496
1da177e4 2497 netif_carrier_on(netdev);
baa34745 2498 if (!test_bit(__E1000_DOWN, &adapter->flags))
a4010afe
JB		 2499 schedule_delayed_work(&adapter->phy_info_task,
2500 2 * HZ);
1da177e4
LT		 2501 adapter->smartspeed = 0;
2502 }
2503 } else {
96838a40 2504 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2505 adapter->link_speed = 0;
2506 adapter->link_duplex = 0;
675ad473
ET		 2507 pr_info("%s NIC Link is Down\n",
2508 netdev->name);
1da177e4 2509 netif_carrier_off(netdev);
baa34745
JB		 2510
2511 if (!test_bit(__E1000_DOWN, &adapter->flags))
a4010afe
JB		 2512 schedule_delayed_work(&adapter->phy_info_task,
2513 2 * HZ);
1da177e4
LT		 2514 }
2515
2516 e1000_smartspeed(adapter);
2517 }
2518
be0f0719 2519link_up:
1da177e4
LT		 2520 e1000_update_stats(adapter);
2521
1dc32918 2522 hw->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
1da177e4 2523 adapter->tpt_old = adapter->stats.tpt;
1dc32918 2524 hw->collision_delta = adapter->stats.colc - adapter->colc_old;
1da177e4
LT		 2525 adapter->colc_old = adapter->stats.colc;
2526
2527 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2528 adapter->gorcl_old = adapter->stats.gorcl;
2529 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2530 adapter->gotcl_old = adapter->stats.gotcl;
2531
1dc32918 2532 e1000_update_adaptive(hw);
1da177e4 2533
f56799ea 2534 if (!netif_carrier_ok(netdev)) {
581d708e 2535 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2536 /* We've lost link, so the controller stops DMA,
2537 * but we've got queued Tx work that's never going
2538 * to get done, so reset controller to flush Tx.
6cfbd97b
JK		 2539 * (Do the reset outside of interrupt context).
2540 */
87041639
JK		 2541 adapter->tx_timeout_count++;
2542 schedule_work(&adapter->reset_task);
0ef4eedc 2543 /* exit immediately since reset is imminent */
b2f963bf 2544 return;
1da177e4
LT		 2545 }
2546 }
2547
eab2abf5
JB		 2548 /* Simple mode for Interrupt Throttle Rate (ITR) */
2549 if (hw->mac_type >= e1000_82540 && adapter->itr_setting == 4) {
6cfbd97b 2550 /* Symmetric Tx/Rx gets a reduced ITR=2000;
eab2abf5
JB		 2551 * Total asymmetrical Tx or Rx gets ITR=8000;
2552 * everyone else is between 2000-8000.
2553 */
2554 u32 goc = (adapter->gotcl + adapter->gorcl) / 10000;
2555 u32 dif = (adapter->gotcl > adapter->gorcl ?
2556 adapter->gotcl - adapter->gorcl :
2557 adapter->gorcl - adapter->gotcl) / 10000;
2558 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2559
2560 ew32(ITR, 1000000000 / (itr * 256));
2561 }
2562
1da177e4 2563 /* Cause software interrupt to ensure rx ring is cleaned */
1dc32918 2564 ew32(ICS, E1000_ICS_RXDMT0);
1da177e4 2565
2648345f 2566 /* Force detection of hung controller every watchdog period */
c3033b01 2567 adapter->detect_tx_hung = true;
1da177e4 2568
a4010afe 2569 /* Reschedule the task */
baa34745 2570 if (!test_bit(__E1000_DOWN, &adapter->flags))
a4010afe 2571 schedule_delayed_work(&adapter->watchdog_task, 2 * HZ);
1da177e4
LT		 2572}
2573
835bb129
JB		 2574enum latency_range {
2575 lowest_latency = 0,
2576 low_latency = 1,
2577 bulk_latency = 2,
2578 latency_invalid = 255
2579};
2580
2581/**
2582 * e1000_update_itr - update the dynamic ITR value based on statistics
8fce4731
JB		 2583 * @adapter: pointer to adapter
2584 * @itr_setting: current adapter->itr
2585 * @packets: the number of packets during this measurement interval
2586 * @bytes: the number of bytes during this measurement interval
2587 *
835bb129
JB		 2588 * Stores a new ITR value based on packets and byte
2589 * counts during the last interrupt. The advantage of per interrupt
2590 * computation is faster updates and more accurate ITR for the current
2591 * traffic pattern. Constants in this function were computed
2592 * based on theoretical maximum wire speed and thresholds were set based
2593 * on testing data as well as attempting to minimize response time
2594 * while increasing bulk throughput.
2595 * this functionality is controlled by the InterruptThrottleRate module
2596 * parameter (see e1000_param.c)
835bb129
JB		 2597 **/
2598static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
64798845 2599 u16 itr_setting, int packets, int bytes)
835bb129
JB		 2600{
2601 unsigned int retval = itr_setting;
2602 struct e1000_hw *hw = &adapter->hw;
2603
2604 if (unlikely(hw->mac_type < e1000_82540))
2605 goto update_itr_done;
2606
2607 if (packets == 0)
2608 goto update_itr_done;
2609
835bb129
JB		 2610 switch (itr_setting) {
2611 case lowest_latency:
2b65326e
JB		 2612 /* jumbo frames get bulk treatment*/
2613 if (bytes/packets > 8000)
2614 retval = bulk_latency;
2615 else if ((packets < 5) && (bytes > 512))
835bb129
JB		 2616 retval = low_latency;
2617 break;
2618 case low_latency: /* 50 usec aka 20000 ints/s */
2619 if (bytes > 10000) {
2b65326e
JB		 2620 /* jumbo frames need bulk latency setting */
2621 if (bytes/packets > 8000)
2622 retval = bulk_latency;
2623 else if ((packets < 10) || ((bytes/packets) > 1200))
835bb129
JB		 2624 retval = bulk_latency;
2625 else if ((packets > 35))
2626 retval = lowest_latency;
2b65326e
JB		 2627 } else if (bytes/packets > 2000)
2628 retval = bulk_latency;
2629 else if (packets <= 2 && bytes < 512)
835bb129
JB		 2630 retval = lowest_latency;
2631 break;
2632 case bulk_latency: /* 250 usec aka 4000 ints/s */
2633 if (bytes > 25000) {
2634 if (packets > 35)
2635 retval = low_latency;
2b65326e
JB		 2636 } else if (bytes < 6000) {
2637 retval = low_latency;
835bb129
JB		 2638 }
2639 break;
2640 }
2641
2642update_itr_done:
2643 return retval;
2644}
2645
2646static void e1000_set_itr(struct e1000_adapter *adapter)
2647{
2648 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 2649 u16 current_itr;
2650 u32 new_itr = adapter->itr;
835bb129
JB		 2651
2652 if (unlikely(hw->mac_type < e1000_82540))
2653 return;
2654
2655 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2656 if (unlikely(adapter->link_speed != SPEED_1000)) {
2657 current_itr = 0;
2658 new_itr = 4000;
2659 goto set_itr_now;
2660 }
2661
6cfbd97b
JK		 2662 adapter->tx_itr = e1000_update_itr(adapter, adapter->tx_itr,
2663 adapter->total_tx_packets,
2664 adapter->total_tx_bytes);
2b65326e
JB		 2665 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2666 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2667 adapter->tx_itr = low_latency;
2668
6cfbd97b
JK		 2669 adapter->rx_itr = e1000_update_itr(adapter, adapter->rx_itr,
2670 adapter->total_rx_packets,
2671 adapter->total_rx_bytes);
2b65326e
JB		 2672 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2673 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2674 adapter->rx_itr = low_latency;
835bb129
JB		 2675
2676 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2677
835bb129
JB		 2678 switch (current_itr) {
2679 /* counts and packets in update_itr are dependent on these numbers */
2680 case lowest_latency:
2681 new_itr = 70000;
2682 break;
2683 case low_latency:
2684 new_itr = 20000; /* aka hwitr = ~200 */
2685 break;
2686 case bulk_latency:
2687 new_itr = 4000;
2688 break;
2689 default:
2690 break;
2691 }
2692
2693set_itr_now:
2694 if (new_itr != adapter->itr) {
2695 /* this attempts to bias the interrupt rate towards Bulk
2696 * by adding intermediate steps when interrupt rate is
6cfbd97b
JK		 2697 * increasing
2698 */
835bb129 2699 new_itr = new_itr > adapter->itr ?
6cfbd97b
JK		 2700 min(adapter->itr + (new_itr >> 2), new_itr) :
2701 new_itr;
835bb129 2702 adapter->itr = new_itr;
1dc32918 2703 ew32(ITR, 1000000000 / (new_itr * 256));
835bb129 2704 }
835bb129
JB		 2705}
2706
1da177e4
LT		 2707#define E1000_TX_FLAGS_CSUM 0x00000001
2708#define E1000_TX_FLAGS_VLAN 0x00000002
2709#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2710#define E1000_TX_FLAGS_IPV4 0x00000008
11a78dcf 2711#define E1000_TX_FLAGS_NO_FCS 0x00000010
1da177e4
LT		 2712#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2713#define E1000_TX_FLAGS_VLAN_SHIFT 16
2714
64798845 2715static int e1000_tso(struct e1000_adapter *adapter,
06f4d033
VY		 2716 struct e1000_tx_ring *tx_ring, struct sk_buff *skb,
2717 __be16 protocol)
1da177e4 2718{
1da177e4 2719 struct e1000_context_desc *context_desc;
580f321d 2720 struct e1000_tx_buffer *buffer_info;
1da177e4 2721 unsigned int i;
406874a7
JP		 2722 u32 cmd_length = 0;
2723 u16 ipcse = 0, tucse, mss;
2724 u8 ipcss, ipcso, tucss, tucso, hdr_len;
1da177e4 2725
89114afd 2726 if (skb_is_gso(skb)) {
4a54b1e5
FR		 2727 int err;
2728
2729 err = skb_cow_head(skb, 0);
2730 if (err < 0)
2731 return err;
1da177e4 2732
ab6a5bb6 2733 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
7967168c 2734 mss = skb_shinfo(skb)->gso_size;
06f4d033 2735 if (protocol == htons(ETH_P_IP)) {
eddc9ec5
ACM		 2736 struct iphdr *iph = ip_hdr(skb);
2737 iph->tot_len = 0;
2738 iph->check = 0;
aa8223c7
ACM		 2739 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2740 iph->daddr, 0,
2741 IPPROTO_TCP,
2742 0);
2d7edb92 2743 cmd_length = E1000_TXD_CMD_IP;
ea2ae17d 2744 ipcse = skb_transport_offset(skb) - 1;
06f4d033 2745 } else if (skb_is_gso_v6(skb)) {
0660e03f 2746 ipv6_hdr(skb)->payload_len = 0;
aa8223c7 2747 tcp_hdr(skb)->check =
0660e03f
ACM		 2748 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2749 &ipv6_hdr(skb)->daddr,
2750 0, IPPROTO_TCP, 0);
2d7edb92 2751 ipcse = 0;
2d7edb92 2752 }
bbe735e4 2753 ipcss = skb_network_offset(skb);
eddc9ec5 2754 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
ea2ae17d 2755 tucss = skb_transport_offset(skb);
aa8223c7 2756 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
1da177e4
LT		 2757 tucse = 0;
2758
2759 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2760 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2761
581d708e
MC		 2762 i = tx_ring->next_to_use;
2763 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2764 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2765
2766 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2767 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2768 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2769 context_desc->upper_setup.tcp_fields.tucss = tucss;
2770 context_desc->upper_setup.tcp_fields.tucso = tucso;
2771 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2772 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2773 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2774 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2775
545c67c0 2776 buffer_info->time_stamp = jiffies;
a9ebadd6 2777 buffer_info->next_to_watch = i;
545c67c0 2778
a48954c8
JW		 2779 if (++i == tx_ring->count)
2780 i = 0;
2781
581d708e 2782 tx_ring->next_to_use = i;
1da177e4 2783
c3033b01 2784 return true;
1da177e4 2785 }
c3033b01 2786 return false;
1da177e4
LT		 2787}
2788
64798845 2789static bool e1000_tx_csum(struct e1000_adapter *adapter,
06f4d033
VY		 2790 struct e1000_tx_ring *tx_ring, struct sk_buff *skb,
2791 __be16 protocol)
1da177e4
LT		 2792{
2793 struct e1000_context_desc *context_desc;
580f321d 2794 struct e1000_tx_buffer *buffer_info;
1da177e4 2795 unsigned int i;
406874a7 2796 u8 css;
3ed30676 2797 u32 cmd_len = E1000_TXD_CMD_DEXT;
1da177e4 2798
3ed30676
DG		 2799 if (skb->ip_summed != CHECKSUM_PARTIAL)
2800 return false;
1da177e4 2801
06f4d033 2802 switch (protocol) {
09640e63 2803 case cpu_to_be16(ETH_P_IP):
3ed30676
DG		 2804 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2805 cmd_len |= E1000_TXD_CMD_TCP;
2806 break;
09640e63 2807 case cpu_to_be16(ETH_P_IPV6):
3ed30676
DG		 2808 /* XXX not handling all IPV6 headers */
2809 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2810 cmd_len |= E1000_TXD_CMD_TCP;
2811 break;
2812 default:
2813 if (unlikely(net_ratelimit()))
feb8f478
ET		 2814 e_warn(drv, "checksum_partial proto=%x!\n",
2815 skb->protocol);
3ed30676
DG		 2816 break;
2817 }
1da177e4 2818
0d0b1672 2819 css = skb_checksum_start_offset(skb);
1da177e4 2820
3ed30676
DG		 2821 i = tx_ring->next_to_use;
2822 buffer_info = &tx_ring->buffer_info[i];
2823 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2824
3ed30676
DG		 2825 context_desc->lower_setup.ip_config = 0;
2826 context_desc->upper_setup.tcp_fields.tucss = css;
2827 context_desc->upper_setup.tcp_fields.tucso =
2828 css + skb->csum_offset;
2829 context_desc->upper_setup.tcp_fields.tucse = 0;
2830 context_desc->tcp_seg_setup.data = 0;
2831 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
1da177e4 2832
3ed30676
DG		 2833 buffer_info->time_stamp = jiffies;
2834 buffer_info->next_to_watch = i;
1da177e4 2835
a48954c8
JW		 2836 if (unlikely(++i == tx_ring->count))
2837 i = 0;
2838
3ed30676
DG		 2839 tx_ring->next_to_use = i;
2840
2841 return true;
1da177e4
LT		 2842}
2843
2844#define E1000_MAX_TXD_PWR 12
2845#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2846
64798845
JP		 2847static int e1000_tx_map(struct e1000_adapter *adapter,
2848 struct e1000_tx_ring *tx_ring,
2849 struct sk_buff *skb, unsigned int first,
2850 unsigned int max_per_txd, unsigned int nr_frags,
2851 unsigned int mss)
1da177e4 2852{
1dc32918 2853 struct e1000_hw *hw = &adapter->hw;
602c0554 2854 struct pci_dev *pdev = adapter->pdev;
580f321d 2855 struct e1000_tx_buffer *buffer_info;
d20b606c 2856 unsigned int len = skb_headlen(skb);
602c0554 2857 unsigned int offset = 0, size, count = 0, i;
31c15a2f 2858 unsigned int f, bytecount, segs;
1da177e4
LT		 2859
2860 i = tx_ring->next_to_use;
2861
96838a40 2862 while (len) {
37e73df8 2863 buffer_info = &tx_ring->buffer_info[i];
1da177e4 2864 size = min(len, max_per_txd);
fd803241
JK		 2865 /* Workaround for Controller erratum --
2866 * descriptor for non-tso packet in a linear SKB that follows a
2867 * tso gets written back prematurely before the data is fully
6cfbd97b
JK		 2868 * DMA'd to the controller
2869 */
fd803241 2870 if (!skb->data_len && tx_ring->last_tx_tso &&
89114afd 2871 !skb_is_gso(skb)) {
3db1cd5c 2872 tx_ring->last_tx_tso = false;
fd803241
JK		 2873 size -= 4;
2874 }
2875
1da177e4 2876 /* Workaround for premature desc write-backs
6cfbd97b
JK		 2877 * in TSO mode. Append 4-byte sentinel desc
2878 */
96838a40 2879 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4 2880 size -= 4;
97338bde
MC		 2881 /* work-around for errata 10 and it applies
2882 * to all controllers in PCI-X mode
2883 * The fix is to make sure that the first descriptor of a
2884 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2885 */
1dc32918 2886 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
a48954c8
JW		 2887 (size > 2015) && count == 0))
2888 size = 2015;
96838a40 2889
1da177e4 2890 /* Workaround for potential 82544 hang in PCI-X. Avoid
6cfbd97b
JK		 2891 * terminating buffers within evenly-aligned dwords.
2892 */
96838a40 2893 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2894 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2895 size > 4))
2896 size -= 4;
2897
2898 buffer_info->length = size;
cdd7549e 2899 /* set time_stamp *before* dma to help avoid a possible race */
1da177e4 2900 buffer_info->time_stamp = jiffies;
602c0554 2901 buffer_info->mapped_as_page = false;
b16f53be
NN		 2902 buffer_info->dma = dma_map_single(&pdev->dev,
2903 skb->data + offset,
6cfbd97b 2904 size, DMA_TO_DEVICE);
b16f53be 2905 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
602c0554 2906 goto dma_error;
a9ebadd6 2907 buffer_info->next_to_watch = i;
1da177e4
LT		 2908
2909 len -= size;
2910 offset += size;
2911 count++;
37e73df8
AD		 2912 if (len) {
2913 i++;
2914 if (unlikely(i == tx_ring->count))
2915 i = 0;
2916 }
1da177e4
LT		 2917 }
2918
96838a40 2919 for (f = 0; f < nr_frags; f++) {
9e903e08 2920 const struct skb_frag_struct *frag;
1da177e4
LT		 2921
2922 frag = &skb_shinfo(skb)->frags[f];
9e903e08 2923 len = skb_frag_size(frag);
877749bf 2924 offset = 0;
1da177e4 2925
96838a40 2926 while (len) {
877749bf 2927 unsigned long bufend;
37e73df8
AD		 2928 i++;
2929 if (unlikely(i == tx_ring->count))
2930 i = 0;
2931
1da177e4
LT		 2932 buffer_info = &tx_ring->buffer_info[i];
2933 size = min(len, max_per_txd);
1da177e4 2934 /* Workaround for premature desc write-backs
6cfbd97b
JK		 2935 * in TSO mode. Append 4-byte sentinel desc
2936 */
2937 if (unlikely(mss && f == (nr_frags-1) &&
2938 size == len && size > 8))
1da177e4 2939 size -= 4;
1da177e4
LT		 2940 /* Workaround for potential 82544 hang in PCI-X.
2941 * Avoid terminating buffers within evenly-aligned
6cfbd97b
JK		 2942 * dwords.
2943 */
877749bf
IC		 2944 bufend = (unsigned long)
2945 page_to_phys(skb_frag_page(frag));
2946 bufend += offset + size - 1;
96838a40 2947 if (unlikely(adapter->pcix_82544 &&
877749bf
IC		 2948 !(bufend & 4) &&
2949 size > 4))
1da177e4
LT		 2950 size -= 4;
2951
2952 buffer_info->length = size;
1da177e4 2953 buffer_info->time_stamp = jiffies;
602c0554 2954 buffer_info->mapped_as_page = true;
877749bf
IC		 2955 buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag,
2956 offset, size, DMA_TO_DEVICE);
b16f53be 2957 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
602c0554 2958 goto dma_error;
a9ebadd6 2959 buffer_info->next_to_watch = i;
1da177e4
LT		 2960
2961 len -= size;
2962 offset += size;
2963 count++;
1da177e4
LT		 2964 }
2965 }
2966
31c15a2f
DN		 2967 segs = skb_shinfo(skb)->gso_segs ?: 1;
2968 /* multiply data chunks by size of headers */
2969 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
2970
1da177e4 2971 tx_ring->buffer_info[i].skb = skb;
31c15a2f
DN		 2972 tx_ring->buffer_info[i].segs = segs;
2973 tx_ring->buffer_info[i].bytecount = bytecount;
1da177e4
LT		 2974 tx_ring->buffer_info[first].next_to_watch = i;
2975
2976 return count;
602c0554
AD		 2977
2978dma_error:
2979 dev_err(&pdev->dev, "TX DMA map failed\n");
2980 buffer_info->dma = 0;
c1fa347f 2981 if (count)
602c0554 2982 count--;
c1fa347f
RK		 2983
2984 while (count--) {
a48954c8 2985 if (i == 0)
602c0554 2986 i += tx_ring->count;
c1fa347f 2987 i--;
602c0554
AD		 2988 buffer_info = &tx_ring->buffer_info[i];
2989 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2990 }
2991
2992 return 0;
1da177e4
LT		 2993}
2994
64798845
JP		 2995static void e1000_tx_queue(struct e1000_adapter *adapter,
2996 struct e1000_tx_ring *tx_ring, int tx_flags,
2997 int count)
1da177e4 2998{
1da177e4 2999 struct e1000_tx_desc *tx_desc = NULL;
580f321d 3000 struct e1000_tx_buffer *buffer_info;
406874a7 3001 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
1da177e4
LT		 3002 unsigned int i;
3003
96838a40 3004 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4 3005 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
6cfbd97b 3006 E1000_TXD_CMD_TSE;
2d7edb92
MC		 3007 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3008
96838a40 3009 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 3010 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 3011 }
3012
96838a40 3013 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 3014 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3015 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3016 }
3017
96838a40 3018 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 3019 txd_lower |= E1000_TXD_CMD_VLE;
3020 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3021 }
3022
11a78dcf
BG		 3023 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
3024 txd_lower &= ~(E1000_TXD_CMD_IFCS);
3025
1da177e4
LT		 3026 i = tx_ring->next_to_use;
3027
96838a40 3028 while (count--) {
1da177e4
LT		 3029 buffer_info = &tx_ring->buffer_info[i];
3030 tx_desc = E1000_TX_DESC(*tx_ring, i);
3031 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3032 tx_desc->lower.data =
3033 cpu_to_le32(txd_lower | buffer_info->length);
3034 tx_desc->upper.data = cpu_to_le32(txd_upper);
a48954c8
JW		 3035 if (unlikely(++i == tx_ring->count))
3036 i = 0;
1da177e4
LT		 3037 }
3038
3039 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3040
11a78dcf
BG		 3041 /* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */
3042 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
3043 tx_desc->lower.data &= ~(cpu_to_le32(E1000_TXD_CMD_IFCS));
3044
1da177e4
LT		 3045 /* Force memory writes to complete before letting h/w
3046 * know there are new descriptors to fetch. (Only
3047 * applicable for weak-ordered memory model archs,
6cfbd97b
JK		 3048 * such as IA-64).
3049 */
1da177e4
LT		 3050 wmb();
3051
3052 tx_ring->next_to_use = i;
1da177e4
LT		 3053}
3054
1aa8b471 3055/* 82547 workaround to avoid controller hang in half-duplex environment.
1da177e4
LT		 3056 * The workaround is to avoid queuing a large packet that would span
3057 * the internal Tx FIFO ring boundary by notifying the stack to resend
3058 * the packet at a later time. This gives the Tx FIFO an opportunity to
3059 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3060 * to the beginning of the Tx FIFO.
1aa8b471 3061 */
1da177e4
LT		 3062
3063#define E1000_FIFO_HDR 0x10
3064#define E1000_82547_PAD_LEN 0x3E0
3065
64798845
JP		 3066static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
3067 struct sk_buff *skb)
1da177e4 3068{
406874a7
JP		 3069 u32 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3070 u32 skb_fifo_len = skb->len + E1000_FIFO_HDR;
1da177e4 3071
9099cfb9 3072 skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
1da177e4 3073
96838a40 3074 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 3075 goto no_fifo_stall_required;
3076
96838a40 3077 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 3078 return 1;
3079
96838a40 3080 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 3081 atomic_set(&adapter->tx_fifo_stall, 1);
3082 return 1;
3083 }
3084
3085no_fifo_stall_required:
3086 adapter->tx_fifo_head += skb_fifo_len;
96838a40 3087 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 3088 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3089 return 0;
3090}
3091
65c7973f
JB		 3092static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3093{
3094 struct e1000_adapter *adapter = netdev_priv(netdev);
3095 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3096
3097 netif_stop_queue(netdev);
3098 /* Herbert's original patch had:
3099 * smp_mb__after_netif_stop_queue();
6cfbd97b
JK		 3100 * but since that doesn't exist yet, just open code it.
3101 */
65c7973f
JB		 3102 smp_mb();
3103
3104 /* We need to check again in a case another CPU has just
6cfbd97b
JK		 3105 * made room available.
3106 */
65c7973f
JB		 3107 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3108 return -EBUSY;
3109
3110 /* A reprieve! */
3111 netif_start_queue(netdev);
fcfb1224 3112 ++adapter->restart_queue;
65c7973f
JB		 3113 return 0;
3114}
3115
3116static int e1000_maybe_stop_tx(struct net_device *netdev,
6cfbd97b 3117 struct e1000_tx_ring *tx_ring, int size)
65c7973f
JB		 3118{
3119 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3120 return 0;
3121 return __e1000_maybe_stop_tx(netdev, size);
3122}
3123
847a1d67 3124#define TXD_USE_COUNT(S, X) (((S) + ((1 << (X)) - 1)) >> (X))
3b29a56d
SH		 3125static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
3126 struct net_device *netdev)
1da177e4 3127{
60490fe0 3128 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 3129 struct e1000_hw *hw = &adapter->hw;
581d708e 3130 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 3131 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3132 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3133 unsigned int tx_flags = 0;
e743d313 3134 unsigned int len = skb_headlen(skb);
6d1e3aa7
KK		 3135 unsigned int nr_frags;
3136 unsigned int mss;
1da177e4 3137 int count = 0;
76c224bc 3138 int tso;
1da177e4 3139 unsigned int f;
06f4d033 3140 __be16 protocol = vlan_get_protocol(skb);
1da177e4 3141
6cfbd97b 3142 /* This goes back to the question of how to logically map a Tx queue
65c7973f 3143 * to a flow. Right now, performance is impacted slightly negatively
6cfbd97b
JK		 3144 * if using multiple Tx queues. If the stack breaks away from a
3145 * single qdisc implementation, we can look at this again.
3146 */
581d708e 3147 tx_ring = adapter->tx_ring;
24025e4e 3148
59d86c76
TD		 3149 /* On PCI/PCI-X HW, if packet size is less than ETH_ZLEN,
3150 * packets may get corrupted during padding by HW.
3151 * To WA this issue, pad all small packets manually.
3152 */
a94d9e22
AD		 3153 if (eth_skb_pad(skb))
3154 return NETDEV_TX_OK;
59d86c76 3155
7967168c 3156 mss = skb_shinfo(skb)->gso_size;
76c224bc 3157 /* The controller does a simple calculation to
1da177e4
LT		 3158 * make sure there is enough room in the FIFO before
3159 * initiating the DMA for each buffer. The calc is:
3160 * 4 = ceil(buffer len/mss). To make sure we don't
3161 * overrun the FIFO, adjust the max buffer len if mss
6cfbd97b
JK		 3162 * drops.
3163 */
96838a40 3164 if (mss) {
406874a7 3165 u8 hdr_len;
1da177e4
LT		 3166 max_per_txd = min(mss << 2, max_per_txd);
3167 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 3168
ab6a5bb6 3169 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
6d1e3aa7 3170 if (skb->data_len && hdr_len == len) {
1dc32918 3171 switch (hw->mac_type) {
9f687888 3172 unsigned int pull_size;
683a2aa3
HX		 3173 case e1000_82544:
3174 /* Make sure we have room to chop off 4 bytes,
3175 * and that the end alignment will work out to
3176 * this hardware's requirements
3177 * NOTE: this is a TSO only workaround
3178 * if end byte alignment not correct move us
6cfbd97b
JK		 3179 * into the next dword
3180 */
3181 if ((unsigned long)(skb_tail_pointer(skb) - 1)
3182 & 4)
683a2aa3
HX		 3183 break;
3184 /* fall through */
9f687888
JK		 3185 pull_size = min((unsigned int)4, skb->data_len);
3186 if (!__pskb_pull_tail(skb, pull_size)) {
feb8f478
ET		 3187 e_err(drv, "__pskb_pull_tail "
3188 "failed.\n");
9f687888 3189 dev_kfree_skb_any(skb);
749dfc70 3190 return NETDEV_TX_OK;
9f687888 3191 }
e743d313 3192 len = skb_headlen(skb);
9f687888
JK		 3193 break;
3194 default:
3195 /* do nothing */
3196 break;
d74bbd3b 3197 }
9a3056da 3198 }
1da177e4
LT		 3199 }
3200
9a3056da 3201 /* reserve a descriptor for the offload context */
84fa7933 3202 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
1da177e4 3203 count++;
2648345f 3204 count++;
fd803241 3205
fd803241 3206 /* Controller Erratum workaround */
89114afd 3207 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
fd803241 3208 count++;
fd803241 3209
1da177e4
LT		 3210 count += TXD_USE_COUNT(len, max_txd_pwr);
3211
96838a40 3212 if (adapter->pcix_82544)
1da177e4
LT		 3213 count++;
3214
96838a40 3215 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 3216 * in PCI-X mode, so add one more descriptor to the count
3217 */
1dc32918 3218 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 3219 (len > 2015)))
3220 count++;
3221
1da177e4 3222 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 3223 for (f = 0; f < nr_frags; f++)
9e903e08 3224 count += TXD_USE_COUNT(skb_frag_size(&skb_shinfo(skb)->frags[f]),
1da177e4 3225 max_txd_pwr);
96838a40 3226 if (adapter->pcix_82544)
1da177e4
LT		 3227 count += nr_frags;
3228
1da177e4 3229 /* need: count + 2 desc gap to keep tail from touching
6cfbd97b
JK		 3230 * head, otherwise try next time
3231 */
8017943e 3232 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2)))
1da177e4 3233 return NETDEV_TX_BUSY;
1da177e4 3234
a4010afe
JB		 3235 if (unlikely((hw->mac_type == e1000_82547) &&
3236 (e1000_82547_fifo_workaround(adapter, skb)))) {
3237 netif_stop_queue(netdev);
3238 if (!test_bit(__E1000_DOWN, &adapter->flags))
3239 schedule_delayed_work(&adapter->fifo_stall_task, 1);
3240 return NETDEV_TX_BUSY;
1da177e4
LT		 3241 }
3242
df8a39de 3243 if (skb_vlan_tag_present(skb)) {
1da177e4 3244 tx_flags |= E1000_TX_FLAGS_VLAN;
df8a39de
JP		 3245 tx_flags |= (skb_vlan_tag_get(skb) <<
3246 E1000_TX_FLAGS_VLAN_SHIFT);
1da177e4
LT		 3247 }
3248
581d708e 3249 first = tx_ring->next_to_use;
96838a40 3250
06f4d033 3251 tso = e1000_tso(adapter, tx_ring, skb, protocol);
1da177e4
LT		 3252 if (tso < 0) {
3253 dev_kfree_skb_any(skb);
3254 return NETDEV_TX_OK;
3255 }
3256
fd803241 3257 if (likely(tso)) {
8fce4731 3258 if (likely(hw->mac_type != e1000_82544))
3db1cd5c 3259 tx_ring->last_tx_tso = true;
1da177e4 3260 tx_flags |= E1000_TX_FLAGS_TSO;
06f4d033 3261 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb, protocol)))
1da177e4
LT		 3262 tx_flags |= E1000_TX_FLAGS_CSUM;
3263
06f4d033 3264 if (protocol == htons(ETH_P_IP))
2d7edb92
MC		 3265 tx_flags |= E1000_TX_FLAGS_IPV4;
3266
11a78dcf
BG		 3267 if (unlikely(skb->no_fcs))
3268 tx_flags |= E1000_TX_FLAGS_NO_FCS;
3269
37e73df8 3270 count = e1000_tx_map(adapter, tx_ring, skb, first, max_per_txd,
6cfbd97b 3271 nr_frags, mss);
1da177e4 3272
37e73df8 3273 if (count) {
a4605fef
AD		 3274 /* The descriptors needed is higher than other Intel drivers
3275 * due to a number of workarounds. The breakdown is below:
3276 * Data descriptors: MAX_SKB_FRAGS + 1
3277 * Context Descriptor: 1
3278 * Keep head from touching tail: 2
3279 * Workarounds: 3
3280 */
3281 int desc_needed = MAX_SKB_FRAGS + 7;
3282
2f66fd36 3283 netdev_sent_queue(netdev, skb->len);
eab467f5
WB		 3284 skb_tx_timestamp(skb);
3285
37e73df8 3286 e1000_tx_queue(adapter, tx_ring, tx_flags, count);
a4605fef
AD		 3287
3288 /* 82544 potentially requires twice as many data descriptors
3289 * in order to guarantee buffers don't end on evenly-aligned
3290 * dwords
3291 */
3292 if (adapter->pcix_82544)
3293 desc_needed += MAX_SKB_FRAGS + 1;
3294
37e73df8 3295 /* Make sure there is space in the ring for the next send. */
a4605fef 3296 e1000_maybe_stop_tx(netdev, tx_ring, desc_needed);
1da177e4 3297
8a4d0b93
FW		 3298 if (!skb->xmit_more ||
3299 netif_xmit_stopped(netdev_get_tx_queue(netdev, 0))) {
3300 writel(tx_ring->next_to_use, hw->hw_addr + tx_ring->tdt);
3301 /* we need this if more than one processor can write to
3302 * our tail at a time, it synchronizes IO on IA64/Altix
3303 * systems
3304 */
3305 mmiowb();
3306 }
37e73df8
AD		 3307 } else {
3308 dev_kfree_skb_any(skb);
3309 tx_ring->buffer_info[first].time_stamp = 0;
3310 tx_ring->next_to_use = first;
3311 }
1da177e4 3312
1da177e4
LT		 3313 return NETDEV_TX_OK;
3314}
3315
b04e36ba
TD		 3316#define NUM_REGS 38 /* 1 based count */
3317static void e1000_regdump(struct e1000_adapter *adapter)
3318{
3319 struct e1000_hw *hw = &adapter->hw;
3320 u32 regs[NUM_REGS];
3321 u32 *regs_buff = regs;
3322 int i = 0;
3323
e29b5d8f
TD		 3324 static const char * const reg_name[] = {
3325 "CTRL", "STATUS",
3326 "RCTL", "RDLEN", "RDH", "RDT", "RDTR",
3327 "TCTL", "TDBAL", "TDBAH", "TDLEN", "TDH", "TDT",
3328 "TIDV", "TXDCTL", "TADV", "TARC0",
3329 "TDBAL1", "TDBAH1", "TDLEN1", "TDH1", "TDT1",
3330 "TXDCTL1", "TARC1",
3331 "CTRL_EXT", "ERT", "RDBAL", "RDBAH",
3332 "TDFH", "TDFT", "TDFHS", "TDFTS", "TDFPC",
3333 "RDFH", "RDFT", "RDFHS", "RDFTS", "RDFPC"
b04e36ba
TD		 3334 };
3335
3336 regs_buff[0] = er32(CTRL);
3337 regs_buff[1] = er32(STATUS);
3338
3339 regs_buff[2] = er32(RCTL);
3340 regs_buff[3] = er32(RDLEN);
3341 regs_buff[4] = er32(RDH);
3342 regs_buff[5] = er32(RDT);
3343 regs_buff[6] = er32(RDTR);
3344
3345 regs_buff[7] = er32(TCTL);
3346 regs_buff[8] = er32(TDBAL);
3347 regs_buff[9] = er32(TDBAH);
3348 regs_buff[10] = er32(TDLEN);
3349 regs_buff[11] = er32(TDH);
3350 regs_buff[12] = er32(TDT);
3351 regs_buff[13] = er32(TIDV);
3352 regs_buff[14] = er32(TXDCTL);
3353 regs_buff[15] = er32(TADV);
3354 regs_buff[16] = er32(TARC0);
3355
3356 regs_buff[17] = er32(TDBAL1);
3357 regs_buff[18] = er32(TDBAH1);
3358 regs_buff[19] = er32(TDLEN1);
3359 regs_buff[20] = er32(TDH1);
3360 regs_buff[21] = er32(TDT1);
3361 regs_buff[22] = er32(TXDCTL1);
3362 regs_buff[23] = er32(TARC1);
3363 regs_buff[24] = er32(CTRL_EXT);
3364 regs_buff[25] = er32(ERT);
3365 regs_buff[26] = er32(RDBAL0);
3366 regs_buff[27] = er32(RDBAH0);
3367 regs_buff[28] = er32(TDFH);
3368 regs_buff[29] = er32(TDFT);
3369 regs_buff[30] = er32(TDFHS);
3370 regs_buff[31] = er32(TDFTS);
3371 regs_buff[32] = er32(TDFPC);
3372 regs_buff[33] = er32(RDFH);
3373 regs_buff[34] = er32(RDFT);
3374 regs_buff[35] = er32(RDFHS);
3375 regs_buff[36] = er32(RDFTS);
3376 regs_buff[37] = er32(RDFPC);
3377
3378 pr_info("Register dump\n");
e29b5d8f
TD		 3379 for (i = 0; i < NUM_REGS; i++)
3380 pr_info("%-15s %08x\n", reg_name[i], regs_buff[i]);
b04e36ba
TD		 3381}
3382
3383/*
3384 * e1000_dump: Print registers, tx ring and rx ring
3385 */
3386static void e1000_dump(struct e1000_adapter *adapter)
3387{
3388 /* this code doesn't handle multiple rings */
3389 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3390 struct e1000_rx_ring *rx_ring = adapter->rx_ring;
3391 int i;
3392
3393 if (!netif_msg_hw(adapter))
3394 return;
3395
3396 /* Print Registers */
3397 e1000_regdump(adapter);
3398
6cfbd97b 3399 /* transmit dump */
b04e36ba
TD		 3400 pr_info("TX Desc ring0 dump\n");
3401
3402 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
3403 *
3404 * Legacy Transmit Descriptor
3405 * +--------------------------------------------------------------+
3406 * 0 | Buffer Address [63:0] (Reserved on Write Back) |
3407 * +--------------------------------------------------------------+
3408 * 8 | Special | CSS | Status | CMD | CSO | Length |
3409 * +--------------------------------------------------------------+
3410 * 63 48 47 36 35 32 31 24 23 16 15 0
3411 *
3412 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
3413 * 63 48 47 40 39 32 31 16 15 8 7 0
3414 * +----------------------------------------------------------------+
3415 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS |
3416 * +----------------------------------------------------------------+
3417 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN |
3418 * +----------------------------------------------------------------+
3419 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
3420 *
3421 * Extended Data Descriptor (DTYP=0x1)
3422 * +----------------------------------------------------------------+
3423 * 0 | Buffer Address [63:0] |
3424 * +----------------------------------------------------------------+
3425 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN |
3426 * +----------------------------------------------------------------+
3427 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
3428 */
e29b5d8f
TD		 3429 pr_info("Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma ] leng ntw timestmp bi->skb\n");
3430 pr_info("Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen] [bi->dma ] leng ntw timestmp bi->skb\n");
b04e36ba
TD		 3431
3432 if (!netif_msg_tx_done(adapter))
3433 goto rx_ring_summary;
3434
3435 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
3436 struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*tx_ring, i);
580f321d 3437 struct e1000_tx_buffer *buffer_info = &tx_ring->buffer_info[i];
dd7f5c9e 3438 struct my_u { __le64 a; __le64 b; };
b04e36ba 3439 struct my_u *u = (struct my_u *)tx_desc;
e29b5d8f
TD		 3440 const char *type;
3441
b04e36ba 3442 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
e29b5d8f 3443 type = "NTC/U";
b04e36ba 3444 else if (i == tx_ring->next_to_use)
e29b5d8f 3445 type = "NTU";
b04e36ba 3446 else if (i == tx_ring->next_to_clean)
e29b5d8f 3447 type = "NTC";
b04e36ba 3448 else
e29b5d8f 3449 type = "";
b04e36ba 3450
e29b5d8f
TD		 3451 pr_info("T%c[0x%03X] %016llX %016llX %016llX %04X %3X %016llX %p %s\n",
3452 ((le64_to_cpu(u->b) & (1<<20)) ? 'd' : 'c'), i,
3453 le64_to_cpu(u->a), le64_to_cpu(u->b),
3454 (u64)buffer_info->dma, buffer_info->length,
3455 buffer_info->next_to_watch,
3456 (u64)buffer_info->time_stamp, buffer_info->skb, type);
b04e36ba
TD		 3457 }
3458
3459rx_ring_summary:
6cfbd97b 3460 /* receive dump */
b04e36ba
TD		 3461 pr_info("\nRX Desc ring dump\n");
3462
3463 /* Legacy Receive Descriptor Format
3464 *
3465 * +-----------------------------------------------------+
3466 * | Buffer Address [63:0] |
3467 * +-----------------------------------------------------+
3468 * | VLAN Tag | Errors | Status 0 | Packet csum | Length |
3469 * +-----------------------------------------------------+
3470 * 63 48 47 40 39 32 31 16 15 0
3471 */
e29b5d8f 3472 pr_info("R[desc] [address 63:0 ] [vl er S cks ln] [bi->dma ] [bi->skb]\n");
b04e36ba
TD		 3473
3474 if (!netif_msg_rx_status(adapter))
3475 goto exit;
3476
3477 for (i = 0; rx_ring->desc && (i < rx_ring->count); i++) {
3478 struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rx_ring, i);
93f0afe9 3479 struct e1000_rx_buffer *buffer_info = &rx_ring->buffer_info[i];
dd7f5c9e 3480 struct my_u { __le64 a; __le64 b; };
b04e36ba 3481 struct my_u *u = (struct my_u *)rx_desc;
e29b5d8f
TD		 3482 const char *type;
3483
b04e36ba 3484 if (i == rx_ring->next_to_use)
e29b5d8f 3485 type = "NTU";
b04e36ba 3486 else if (i == rx_ring->next_to_clean)
e29b5d8f 3487 type = "NTC";
b04e36ba 3488 else
e29b5d8f 3489 type = "";
b04e36ba 3490
e29b5d8f
TD		 3491 pr_info("R[0x%03X] %016llX %016llX %016llX %p %s\n",
3492 i, le64_to_cpu(u->a), le64_to_cpu(u->b),
13809609 3493 (u64)buffer_info->dma, buffer_info->rxbuf.data, type);
b04e36ba
TD		 3494 } /* for */
3495
3496 /* dump the descriptor caches */
3497 /* rx */
e29b5d8f 3498 pr_info("Rx descriptor cache in 64bit format\n");
b04e36ba 3499 for (i = 0x6000; i <= 0x63FF ; i += 0x10) {
e29b5d8f
TD		 3500 pr_info("R%04X: %08X|%08X %08X|%08X\n",
3501 i,
3502 readl(adapter->hw.hw_addr + i+4),
3503 readl(adapter->hw.hw_addr + i),
3504 readl(adapter->hw.hw_addr + i+12),
3505 readl(adapter->hw.hw_addr + i+8));
b04e36ba
TD		 3506 }
3507 /* tx */
e29b5d8f 3508 pr_info("Tx descriptor cache in 64bit format\n");
b04e36ba 3509 for (i = 0x7000; i <= 0x73FF ; i += 0x10) {
e29b5d8f
TD		 3510 pr_info("T%04X: %08X|%08X %08X|%08X\n",
3511 i,
3512 readl(adapter->hw.hw_addr + i+4),
3513 readl(adapter->hw.hw_addr + i),
3514 readl(adapter->hw.hw_addr + i+12),
3515 readl(adapter->hw.hw_addr + i+8));
b04e36ba
TD		 3516 }
3517exit:
3518 return;
3519}
3520
1da177e4
LT		 3521/**
3522 * e1000_tx_timeout - Respond to a Tx Hang
3523 * @netdev: network interface device structure
3524 **/
64798845 3525static void e1000_tx_timeout(struct net_device *netdev)
1da177e4 3526{
60490fe0 3527 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3528
3529 /* Do the reset outside of interrupt context */
87041639
JK		 3530 adapter->tx_timeout_count++;
3531 schedule_work(&adapter->reset_task);
1da177e4
LT		 3532}
3533
64798845 3534static void e1000_reset_task(struct work_struct *work)
1da177e4 3535{
65f27f38
DH		 3536 struct e1000_adapter *adapter =
3537 container_of(work, struct e1000_adapter, reset_task);
1da177e4 3538
b04e36ba 3539 e_err(drv, "Reset adapter\n");
b2f963bf 3540 e1000_reinit_locked(adapter);
1da177e4
LT		 3541}
3542
1da177e4
LT		 3543/**
3544 * e1000_change_mtu - Change the Maximum Transfer Unit
3545 * @netdev: network interface device structure
3546 * @new_mtu: new value for maximum frame size
3547 *
3548 * Returns 0 on success, negative on failure
3549 **/
64798845 3550static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
1da177e4 3551{
60490fe0 3552 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 3553 struct e1000_hw *hw = &adapter->hw;
91c527a5 3554 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
1da177e4 3555
997f5cbd 3556 /* Adapter-specific max frame size limits. */
1dc32918 3557 switch (hw->mac_type) {
9e2feace 3558 case e1000_undefined ... e1000_82542_rev2_1:
b7cb8c2c 3559 if (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)) {
feb8f478 3560 e_err(probe, "Jumbo Frames not supported.\n");
2d7edb92 3561 return -EINVAL;
2d7edb92 3562 }
997f5cbd 3563 break;
997f5cbd
JK		 3564 default:
3565 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3566 break;
1da177e4
LT		 3567 }
3568
3d6114e7
JB		 3569 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
3570 msleep(1);
3571 /* e1000_down has a dependency on max_frame_size */
3572 hw->max_frame_size = max_frame;
08e83316
SD		 3573 if (netif_running(netdev)) {
3574 /* prevent buffers from being reallocated */
3575 adapter->alloc_rx_buf = e1000_alloc_dummy_rx_buffers;
3d6114e7 3576 e1000_down(adapter);
08e83316 3577 }
3d6114e7 3578
87f5032e 3579 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
9e2feace 3580 * means we reserve 2 more, this pushes us to allocate from the next
edbbb3ca
JB		 3581 * larger slab size.
3582 * i.e. RXBUFFER_2048 --> size-4096 slab
6cfbd97b
JK		 3583 * however with the new *_jumbo_rx* routines, jumbo receives will use
3584 * fragmented skbs
3585 */
9e2feace 3586
9926146b 3587 if (max_frame <= E1000_RXBUFFER_2048)
9e2feace 3588 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
edbbb3ca
JB		 3589 else
3590#if (PAGE_SIZE >= E1000_RXBUFFER_16384)
9e2feace 3591 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
edbbb3ca
JB		 3592#elif (PAGE_SIZE >= E1000_RXBUFFER_4096)
3593 adapter->rx_buffer_len = PAGE_SIZE;
3594#endif
9e2feace
AK		 3595
3596 /* adjust allocation if LPE protects us, and we aren't using SBP */
1dc32918 3597 if (!hw->tbi_compatibility_on &&
b7cb8c2c 3598 ((max_frame == (ETH_FRAME_LEN + ETH_FCS_LEN)) ||
9e2feace
AK		 3599 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3600 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
997f5cbd 3601
675ad473
ET		 3602 pr_info("%s changing MTU from %d to %d\n",
3603 netdev->name, netdev->mtu, new_mtu);
2d7edb92
MC		 3604 netdev->mtu = new_mtu;
3605
2db10a08 3606 if (netif_running(netdev))
3d6114e7
JB		 3607 e1000_up(adapter);
3608 else
3609 e1000_reset(adapter);
3610
3611 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4 3612
1da177e4
LT		 3613 return 0;
3614}
3615
3616/**
3617 * e1000_update_stats - Update the board statistics counters
3618 * @adapter: board private structure
3619 **/
64798845 3620void e1000_update_stats(struct e1000_adapter *adapter)
1da177e4 3621{
5fe31def 3622 struct net_device *netdev = adapter->netdev;
1da177e4 3623 struct e1000_hw *hw = &adapter->hw;
282f33c9 3624 struct pci_dev *pdev = adapter->pdev;
1da177e4 3625 unsigned long flags;
406874a7 3626 u16 phy_tmp;
1da177e4
LT		 3627
3628#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3629
6cfbd97b 3630 /* Prevent stats update while adapter is being reset, or if the pci
282f33c9
LV		 3631 * connection is down.
3632 */
9026729b 3633 if (adapter->link_speed == 0)
282f33c9 3634 return;
81b1955e 3635 if (pci_channel_offline(pdev))
9026729b
AK		 3636 return;
3637
1da177e4
LT		 3638 spin_lock_irqsave(&adapter->stats_lock, flags);
3639
828d055f 3640 /* these counters are modified from e1000_tbi_adjust_stats,
1da177e4
LT		 3641 * called from the interrupt context, so they must only
3642 * be written while holding adapter->stats_lock
3643 */
3644
1dc32918
JP		 3645 adapter->stats.crcerrs += er32(CRCERRS);
3646 adapter->stats.gprc += er32(GPRC);
3647 adapter->stats.gorcl += er32(GORCL);
3648 adapter->stats.gorch += er32(GORCH);
3649 adapter->stats.bprc += er32(BPRC);
3650 adapter->stats.mprc += er32(MPRC);
3651 adapter->stats.roc += er32(ROC);
3652
1532ecea
JB		 3653 adapter->stats.prc64 += er32(PRC64);
3654 adapter->stats.prc127 += er32(PRC127);
3655 adapter->stats.prc255 += er32(PRC255);
3656 adapter->stats.prc511 += er32(PRC511);
3657 adapter->stats.prc1023 += er32(PRC1023);
3658 adapter->stats.prc1522 += er32(PRC1522);
1dc32918
JP		 3659
3660 adapter->stats.symerrs += er32(SYMERRS);
3661 adapter->stats.mpc += er32(MPC);
3662 adapter->stats.scc += er32(SCC);
3663 adapter->stats.ecol += er32(ECOL);
3664 adapter->stats.mcc += er32(MCC);
3665 adapter->stats.latecol += er32(LATECOL);
3666 adapter->stats.dc += er32(DC);
3667 adapter->stats.sec += er32(SEC);
3668 adapter->stats.rlec += er32(RLEC);
3669 adapter->stats.xonrxc += er32(XONRXC);
3670 adapter->stats.xontxc += er32(XONTXC);
3671 adapter->stats.xoffrxc += er32(XOFFRXC);
3672 adapter->stats.xofftxc += er32(XOFFTXC);
3673 adapter->stats.fcruc += er32(FCRUC);
3674 adapter->stats.gptc += er32(GPTC);
3675 adapter->stats.gotcl += er32(GOTCL);
3676 adapter->stats.gotch += er32(GOTCH);
3677 adapter->stats.rnbc += er32(RNBC);
3678 adapter->stats.ruc += er32(RUC);
3679 adapter->stats.rfc += er32(RFC);
3680 adapter->stats.rjc += er32(RJC);
3681 adapter->stats.torl += er32(TORL);
3682 adapter->stats.torh += er32(TORH);
3683 adapter->stats.totl += er32(TOTL);
3684 adapter->stats.toth += er32(TOTH);
3685 adapter->stats.tpr += er32(TPR);
3686
1532ecea
JB		 3687 adapter->stats.ptc64 += er32(PTC64);
3688 adapter->stats.ptc127 += er32(PTC127);
3689 adapter->stats.ptc255 += er32(PTC255);
3690 adapter->stats.ptc511 += er32(PTC511);
3691 adapter->stats.ptc1023 += er32(PTC1023);
3692 adapter->stats.ptc1522 += er32(PTC1522);
1dc32918
JP		 3693
3694 adapter->stats.mptc += er32(MPTC);
3695 adapter->stats.bptc += er32(BPTC);
1da177e4
LT		 3696
3697 /* used for adaptive IFS */
3698
1dc32918 3699 hw->tx_packet_delta = er32(TPT);
1da177e4 3700 adapter->stats.tpt += hw->tx_packet_delta;
1dc32918 3701 hw->collision_delta = er32(COLC);
1da177e4
LT		 3702 adapter->stats.colc += hw->collision_delta;
3703
96838a40 3704 if (hw->mac_type >= e1000_82543) {
1dc32918
JP		 3705 adapter->stats.algnerrc += er32(ALGNERRC);
3706 adapter->stats.rxerrc += er32(RXERRC);
3707 adapter->stats.tncrs += er32(TNCRS);
3708 adapter->stats.cexterr += er32(CEXTERR);
3709 adapter->stats.tsctc += er32(TSCTC);
3710 adapter->stats.tsctfc += er32(TSCTFC);
1da177e4
LT		 3711 }
3712
3713 /* Fill out the OS statistics structure */
5fe31def
AK		 3714 netdev->stats.multicast = adapter->stats.mprc;
3715 netdev->stats.collisions = adapter->stats.colc;
1da177e4
LT		 3716
3717 /* Rx Errors */
3718
87041639 3719 /* RLEC on some newer hardware can be incorrect so build
6cfbd97b
JK		 3720 * our own version based on RUC and ROC
3721 */
5fe31def 3722 netdev->stats.rx_errors = adapter->stats.rxerrc +
1da177e4 3723 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK		 3724 adapter->stats.ruc + adapter->stats.roc +
3725 adapter->stats.cexterr;
49559854 3726 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
5fe31def
AK		 3727 netdev->stats.rx_length_errors = adapter->stats.rlerrc;
3728 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
3729 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
3730 netdev->stats.rx_missed_errors = adapter->stats.mpc;
1da177e4
LT		 3731
3732 /* Tx Errors */
49559854 3733 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
5fe31def
AK		 3734 netdev->stats.tx_errors = adapter->stats.txerrc;
3735 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
3736 netdev->stats.tx_window_errors = adapter->stats.latecol;
3737 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
1dc32918 3738 if (hw->bad_tx_carr_stats_fd &&
167fb284 3739 adapter->link_duplex == FULL_DUPLEX) {
5fe31def 3740 netdev->stats.tx_carrier_errors = 0;
167fb284
JG		 3741 adapter->stats.tncrs = 0;
3742 }
1da177e4
LT		 3743
3744 /* Tx Dropped needs to be maintained elsewhere */
3745
3746 /* Phy Stats */
96838a40
JB		 3747 if (hw->media_type == e1000_media_type_copper) {
3748 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3749 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3750 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3751 adapter->phy_stats.idle_errors += phy_tmp;
3752 }
3753
96838a40 3754 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3755 (hw->phy_type == e1000_phy_m88) &&
3756 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3757 adapter->phy_stats.receive_errors += phy_tmp;
3758 }
3759
15e376b4 3760 /* Management Stats */
1dc32918
JP		 3761 if (hw->has_smbus) {
3762 adapter->stats.mgptc += er32(MGTPTC);
3763 adapter->stats.mgprc += er32(MGTPRC);
3764 adapter->stats.mgpdc += er32(MGTPDC);
15e376b4
JG		 3765 }
3766
1da177e4
LT		 3767 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3768}
9ac98284 3769
1da177e4
LT		 3770/**
3771 * e1000_intr - Interrupt Handler
3772 * @irq: interrupt number
3773 * @data: pointer to a network interface device structure
1da177e4 3774 **/
64798845 3775static irqreturn_t e1000_intr(int irq, void *data)
1da177e4
LT		 3776{
3777 struct net_device *netdev = data;
60490fe0 3778 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3779 struct e1000_hw *hw = &adapter->hw;
1532ecea 3780 u32 icr = er32(ICR);
c3570acb 3781
4c11b8ad 3782 if (unlikely((!icr)))
835bb129
JB		 3783 return IRQ_NONE; /* Not our interrupt */
3784
6cfbd97b 3785 /* we might have caused the interrupt, but the above
4c11b8ad
JB		 3786 * read cleared it, and just in case the driver is
3787 * down there is nothing to do so return handled
3788 */
3789 if (unlikely(test_bit(__E1000_DOWN, &adapter->flags)))
3790 return IRQ_HANDLED;
3791
96838a40 3792 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3793 hw->get_link_status = 1;
1314bbf3
AK		 3794 /* guard against interrupt when we're going down */
3795 if (!test_bit(__E1000_DOWN, &adapter->flags))
a4010afe 3796 schedule_delayed_work(&adapter->watchdog_task, 1);
1da177e4
LT		 3797 }
3798
1532ecea
JB		 3799 /* disable interrupts, without the synchronize_irq bit */
3800 ew32(IMC, ~0);
3801 E1000_WRITE_FLUSH();
3802
288379f0 3803 if (likely(napi_schedule_prep(&adapter->napi))) {
835bb129
JB		 3804 adapter->total_tx_bytes = 0;
3805 adapter->total_tx_packets = 0;
3806 adapter->total_rx_bytes = 0;
3807 adapter->total_rx_packets = 0;
288379f0 3808 __napi_schedule(&adapter->napi);
a6c42322 3809 } else {
90fb5135 3810 /* this really should not happen! if it does it is basically a
6cfbd97b
JK		 3811 * bug, but not a hard error, so enable ints and continue
3812 */
a6c42322
JB		 3813 if (!test_bit(__E1000_DOWN, &adapter->flags))
3814 e1000_irq_enable(adapter);
3815 }
1da177e4 3816
1da177e4
LT		 3817 return IRQ_HANDLED;
3818}
3819
1da177e4
LT		 3820/**
3821 * e1000_clean - NAPI Rx polling callback
3822 * @adapter: board private structure
3823 **/
64798845 3824static int e1000_clean(struct napi_struct *napi, int budget)
1da177e4 3825{
6cfbd97b
JK		 3826 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter,
3827 napi);
650b5a5c 3828 int tx_clean_complete = 0, work_done = 0;
581d708e 3829
650b5a5c 3830 tx_clean_complete = e1000_clean_tx_irq(adapter, &adapter->tx_ring[0]);
581d708e 3831
650b5a5c 3832 adapter->clean_rx(adapter, &adapter->rx_ring[0], &work_done, budget);
581d708e 3833
650b5a5c 3834 if (!tx_clean_complete)
d2c7ddd6
DM		 3835 work_done = budget;
3836
53e52c72
DM		 3837 /* If budget not fully consumed, exit the polling mode */
3838 if (work_done < budget) {
835bb129
JB		 3839 if (likely(adapter->itr_setting & 3))
3840 e1000_set_itr(adapter);
32b3e08f 3841 napi_complete_done(napi, work_done);
a6c42322
JB		 3842 if (!test_bit(__E1000_DOWN, &adapter->flags))
3843 e1000_irq_enable(adapter);
1da177e4
LT		 3844 }
3845
bea3348e 3846 return work_done;
1da177e4
LT		 3847}
3848
1da177e4
LT		 3849/**
3850 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3851 * @adapter: board private structure
3852 **/
64798845
JP		 3853static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
3854 struct e1000_tx_ring *tx_ring)
1da177e4 3855{
1dc32918 3856 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3857 struct net_device *netdev = adapter->netdev;
3858 struct e1000_tx_desc *tx_desc, *eop_desc;
580f321d 3859 struct e1000_tx_buffer *buffer_info;
1da177e4 3860 unsigned int i, eop;
2a1af5d7 3861 unsigned int count = 0;
a48954c8 3862 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
2f66fd36 3863 unsigned int bytes_compl = 0, pkts_compl = 0;
1da177e4
LT		 3864
3865 i = tx_ring->next_to_clean;
3866 eop = tx_ring->buffer_info[i].next_to_watch;
3867 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3868
ccfb342c
AD		 3869 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
3870 (count < tx_ring->count)) {
843f4267 3871 bool cleaned = false;
837a1dba 3872 dma_rmb(); /* read buffer_info after eop_desc */
843f4267 3873 for ( ; !cleaned; count++) {
1da177e4
LT		 3874 tx_desc = E1000_TX_DESC(*tx_ring, i);
3875 buffer_info = &tx_ring->buffer_info[i];
3876 cleaned = (i == eop);
3877
835bb129 3878 if (cleaned) {
31c15a2f
DN		 3879 total_tx_packets += buffer_info->segs;
3880 total_tx_bytes += buffer_info->bytecount;
2f66fd36
OESC		 3881 if (buffer_info->skb) {
3882 bytes_compl += buffer_info->skb->len;
3883 pkts_compl++;
3884 }
3885
835bb129 3886 }
fd803241 3887 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
a9ebadd6 3888 tx_desc->upper.data = 0;
1da177e4 3889
a48954c8
JW		 3890 if (unlikely(++i == tx_ring->count))
3891 i = 0;
1da177e4 3892 }
581d708e 3893
1da177e4
LT		 3894 eop = tx_ring->buffer_info[i].next_to_watch;
3895 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3896 }
3897
9eab46b7
DV		 3898 /* Synchronize with E1000_DESC_UNUSED called from e1000_xmit_frame,
3899 * which will reuse the cleaned buffers.
3900 */
3901 smp_store_release(&tx_ring->next_to_clean, i);
1da177e4 3902
2f66fd36
OESC		 3903 netdev_completed_queue(netdev, pkts_compl, bytes_compl);
3904
77b2aad5 3905#define TX_WAKE_THRESHOLD 32
843f4267 3906 if (unlikely(count && netif_carrier_ok(netdev) &&
65c7973f
JB		 3907 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
3908 /* Make sure that anybody stopping the queue after this
3909 * sees the new next_to_clean.
3910 */
3911 smp_mb();
cdd7549e
JB		 3912
3913 if (netif_queue_stopped(netdev) &&
3914 !(test_bit(__E1000_DOWN, &adapter->flags))) {
77b2aad5 3915 netif_wake_queue(netdev);
fcfb1224
JB		 3916 ++adapter->restart_queue;
3917 }
77b2aad5 3918 }
2648345f 3919
581d708e 3920 if (adapter->detect_tx_hung) {
2648345f 3921 /* Detect a transmit hang in hardware, this serializes the
6cfbd97b
JK		 3922 * check with the clearing of time_stamp and movement of i
3923 */
c3033b01 3924 adapter->detect_tx_hung = false;
cdd7549e
JB		 3925 if (tx_ring->buffer_info[eop].time_stamp &&
3926 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
6cfbd97b 3927 (adapter->tx_timeout_factor * HZ)) &&
8e95a202 3928 !(er32(STATUS) & E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 3929
3930 /* detected Tx unit hang */
feb8f478 3931 e_err(drv, "Detected Tx Unit Hang\n"
675ad473
ET		 3932 " Tx Queue <%lu>\n"
3933 " TDH <%x>\n"
3934 " TDT <%x>\n"
3935 " next_to_use <%x>\n"
3936 " next_to_clean <%x>\n"
3937 "buffer_info[next_to_clean]\n"
3938 " time_stamp <%lx>\n"
3939 " next_to_watch <%x>\n"
3940 " jiffies <%lx>\n"
3941 " next_to_watch.status <%x>\n",
49a45a06 3942 (unsigned long)(tx_ring - adapter->tx_ring),
1dc32918
JP		 3943 readl(hw->hw_addr + tx_ring->tdh),
3944 readl(hw->hw_addr + tx_ring->tdt),
70b8f1e1 3945 tx_ring->next_to_use,
392137fa 3946 tx_ring->next_to_clean,
cdd7549e 3947 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC		 3948 eop,
3949 jiffies,
3950 eop_desc->upper.fields.status);
b04e36ba 3951 e1000_dump(adapter);
1da177e4 3952 netif_stop_queue(netdev);
70b8f1e1 3953 }
1da177e4 3954 }
835bb129
JB		 3955 adapter->total_tx_bytes += total_tx_bytes;
3956 adapter->total_tx_packets += total_tx_packets;
5fe31def
AK		 3957 netdev->stats.tx_bytes += total_tx_bytes;
3958 netdev->stats.tx_packets += total_tx_packets;
807540ba 3959 return count < tx_ring->count;
1da177e4
LT		 3960}
3961
3962/**
3963 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3964 * @adapter: board private structure
3965 * @status_err: receive descriptor status and error fields
3966 * @csum: receive descriptor csum field
3967 * @sk_buff: socket buffer with received data
1da177e4 3968 **/
64798845
JP		 3969static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
3970 u32 csum, struct sk_buff *skb)
1da177e4 3971{
1dc32918 3972 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 3973 u16 status = (u16)status_err;
3974 u8 errors = (u8)(status_err >> 24);
bc8acf2c
ED		 3975
3976 skb_checksum_none_assert(skb);
2d7edb92 3977
1da177e4 3978 /* 82543 or newer only */
a48954c8
JW		 3979 if (unlikely(hw->mac_type < e1000_82543))
3980 return;
1da177e4 3981 /* Ignore Checksum bit is set */
a48954c8
JW		 3982 if (unlikely(status & E1000_RXD_STAT_IXSM))
3983 return;
2d7edb92 3984 /* TCP/UDP checksum error bit is set */
96838a40 3985 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3986 /* let the stack verify checksum errors */
1da177e4 3987 adapter->hw_csum_err++;
2d7edb92
MC		 3988 return;
3989 }
3990 /* TCP/UDP Checksum has not been calculated */
1532ecea
JB		 3991 if (!(status & E1000_RXD_STAT_TCPCS))
3992 return;
3993
2d7edb92
MC		 3994 /* It must be a TCP or UDP packet with a valid checksum */
3995 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3996 /* TCP checksum is good */
3997 skb->ip_summed = CHECKSUM_UNNECESSARY;
1da177e4 3998 }
2d7edb92 3999 adapter->hw_csum_good++;
1da177e4
LT		 4000}
4001
edbbb3ca 4002/**
13809609 4003 * e1000_consume_page - helper function for jumbo Rx path
edbbb3ca 4004 **/
93f0afe9 4005static void e1000_consume_page(struct e1000_rx_buffer *bi, struct sk_buff *skb,
6cfbd97b 4006 u16 length)
edbbb3ca 4007{
13809609 4008 bi->rxbuf.page = NULL;
edbbb3ca
JB		 4009 skb->len += length;
4010 skb->data_len += length;
ed64b3cc 4011 skb->truesize += PAGE_SIZE;
edbbb3ca
JB		 4012}
4013
4014/**
4015 * e1000_receive_skb - helper function to handle rx indications
4016 * @adapter: board private structure
4017 * @status: descriptor status field as written by hardware
4018 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
4019 * @skb: pointer to sk_buff to be indicated to stack
4020 */
4021static void e1000_receive_skb(struct e1000_adapter *adapter, u8 status,
4022 __le16 vlan, struct sk_buff *skb)
4023{
6a08d194
JB		 4024 skb->protocol = eth_type_trans(skb, adapter->netdev);
4025
5622e404
JP		 4026 if (status & E1000_RXD_STAT_VP) {
4027 u16 vid = le16_to_cpu(vlan) & E1000_RXD_SPC_VLAN_MASK;
4028
86a9bad3 4029 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
5622e404
JP		 4030 }
4031 napi_gro_receive(&adapter->napi, skb);
edbbb3ca
JB		 4032}
4033
4f0aeb1e
FW		 4034/**
4035 * e1000_tbi_adjust_stats
4036 * @hw: Struct containing variables accessed by shared code
4037 * @frame_len: The length of the frame in question
4038 * @mac_addr: The Ethernet destination address of the frame in question
4039 *
4040 * Adjusts the statistic counters when a frame is accepted by TBI_ACCEPT
4041 */
4042static void e1000_tbi_adjust_stats(struct e1000_hw *hw,
4043 struct e1000_hw_stats *stats,
4044 u32 frame_len, const u8 *mac_addr)
4045{
4046 u64 carry_bit;
4047
4048 /* First adjust the frame length. */
4049 frame_len--;
4050 /* We need to adjust the statistics counters, since the hardware
4051 * counters overcount this packet as a CRC error and undercount
4052 * the packet as a good packet
4053 */
4054 /* This packet should not be counted as a CRC error. */
4055 stats->crcerrs--;
4056 /* This packet does count as a Good Packet Received. */
4057 stats->gprc++;
4058
4059 /* Adjust the Good Octets received counters */
4060 carry_bit = 0x80000000 & stats->gorcl;
4061 stats->gorcl += frame_len;
4062 /* If the high bit of Gorcl (the low 32 bits of the Good Octets
4063 * Received Count) was one before the addition,
4064 * AND it is zero after, then we lost the carry out,
4065 * need to add one to Gorch (Good Octets Received Count High).
4066 * This could be simplified if all environments supported
4067 * 64-bit integers.
4068 */
4069 if (carry_bit && ((stats->gorcl & 0x80000000) == 0))
4070 stats->gorch++;
4071 /* Is this a broadcast or multicast? Check broadcast first,
4072 * since the test for a multicast frame will test positive on
4073 * a broadcast frame.
4074 */
4075 if (is_broadcast_ether_addr(mac_addr))
4076 stats->bprc++;
4077 else if (is_multicast_ether_addr(mac_addr))
4078 stats->mprc++;
4079
4080 if (frame_len == hw->max_frame_size) {
4081 /* In this case, the hardware has overcounted the number of
4082 * oversize frames.
4083 */
4084 if (stats->roc > 0)
4085 stats->roc--;
4086 }
4087
4088 /* Adjust the bin counters when the extra byte put the frame in the
4089 * wrong bin. Remember that the frame_len was adjusted above.
4090 */
4091 if (frame_len == 64) {
4092 stats->prc64++;
4093 stats->prc127--;
4094 } else if (frame_len == 127) {
4095 stats->prc127++;
4096 stats->prc255--;
4097 } else if (frame_len == 255) {
4098 stats->prc255++;
4099 stats->prc511--;
4100 } else if (frame_len == 511) {
4101 stats->prc511++;
4102 stats->prc1023--;
4103 } else if (frame_len == 1023) {
4104 stats->prc1023++;
4105 stats->prc1522--;
4106 } else if (frame_len == 1522) {
4107 stats->prc1522++;
4108 }
4109}
4110
2037110c
FW		 4111static bool e1000_tbi_should_accept(struct e1000_adapter *adapter,
4112 u8 status, u8 errors,
4113 u32 length, const u8 *data)
4114{
4115 struct e1000_hw *hw = &adapter->hw;
4116 u8 last_byte = *(data + length - 1);
4117
4118 if (TBI_ACCEPT(hw, status, errors, length, last_byte)) {
4119 unsigned long irq_flags;
4120
4121 spin_lock_irqsave(&adapter->stats_lock, irq_flags);
4122 e1000_tbi_adjust_stats(hw, &adapter->stats, length, data);
4123 spin_unlock_irqrestore(&adapter->stats_lock, irq_flags);
4124
4125 return true;
4126 }
4127
4128 return false;
4129}
4130
2b294b18
FW		 4131static struct sk_buff *e1000_alloc_rx_skb(struct e1000_adapter *adapter,
4132 unsigned int bufsz)
4133{
67fd893e 4134 struct sk_buff *skb = napi_alloc_skb(&adapter->napi, bufsz);
2b294b18
FW		 4135
4136 if (unlikely(!skb))
4137 adapter->alloc_rx_buff_failed++;
4138 return skb;
4139}
4140
edbbb3ca
JB		 4141/**
4142 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
4143 * @adapter: board private structure
4144 * @rx_ring: ring to clean
4145 * @work_done: amount of napi work completed this call
4146 * @work_to_do: max amount of work allowed for this call to do
4147 *
4148 * the return value indicates whether actual cleaning was done, there
4149 * is no guarantee that everything was cleaned
4150 */
4151static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
4152 struct e1000_rx_ring *rx_ring,
4153 int *work_done, int work_to_do)
4154{
edbbb3ca
JB		 4155 struct net_device *netdev = adapter->netdev;
4156 struct pci_dev *pdev = adapter->pdev;
4157 struct e1000_rx_desc *rx_desc, *next_rxd;
93f0afe9 4158 struct e1000_rx_buffer *buffer_info, *next_buffer;
edbbb3ca
JB		 4159 u32 length;
4160 unsigned int i;
4161 int cleaned_count = 0;
4162 bool cleaned = false;
a48954c8 4163 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
edbbb3ca
JB		 4164
4165 i = rx_ring->next_to_clean;
4166 rx_desc = E1000_RX_DESC(*rx_ring, i);
4167 buffer_info = &rx_ring->buffer_info[i];
4168
4169 while (rx_desc->status & E1000_RXD_STAT_DD) {
4170 struct sk_buff *skb;
4171 u8 status;
4172
4173 if (*work_done >= work_to_do)
4174 break;
4175 (*work_done)++;
837a1dba 4176 dma_rmb(); /* read descriptor and rx_buffer_info after status DD */
edbbb3ca
JB		 4177
4178 status = rx_desc->status;
edbbb3ca 4179
a48954c8
JW		 4180 if (++i == rx_ring->count)
4181 i = 0;
4182
edbbb3ca
JB		 4183 next_rxd = E1000_RX_DESC(*rx_ring, i);
4184 prefetch(next_rxd);
4185
4186 next_buffer = &rx_ring->buffer_info[i];
4187
4188 cleaned = true;
4189 cleaned_count++;
b16f53be 4190 dma_unmap_page(&pdev->dev, buffer_info->dma,
93f0afe9 4191 adapter->rx_buffer_len, DMA_FROM_DEVICE);
edbbb3ca
JB		 4192 buffer_info->dma = 0;
4193
4194 length = le16_to_cpu(rx_desc->length);
4195
4196 /* errors is only valid for DD + EOP descriptors */
4197 if (unlikely((status & E1000_RXD_STAT_EOP) &&
4198 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
13809609 4199 u8 *mapped = page_address(buffer_info->rxbuf.page);
2037110c
FW		 4200
4201 if (e1000_tbi_should_accept(adapter, status,
4202 rx_desc->errors,
4203 length, mapped)) {
edbbb3ca 4204 length--;
2037110c
FW		 4205 } else if (netdev->features & NETIF_F_RXALL) {
4206 goto process_skb;
edbbb3ca 4207 } else {
edbbb3ca 4208 /* an error means any chain goes out the window
6cfbd97b
JK		 4209 * too
4210 */
edbbb3ca
JB		 4211 if (rx_ring->rx_skb_top)
4212 dev_kfree_skb(rx_ring->rx_skb_top);
4213 rx_ring->rx_skb_top = NULL;
4214 goto next_desc;
4215 }
4216 }
4217
4218#define rxtop rx_ring->rx_skb_top
e825b731 4219process_skb:
edbbb3ca
JB		 4220 if (!(status & E1000_RXD_STAT_EOP)) {
4221 /* this descriptor is only the beginning (or middle) */
4222 if (!rxtop) {
4223 /* this is the beginning of a chain */
de591c78 4224 rxtop = napi_get_frags(&adapter->napi);
13809609
FW		 4225 if (!rxtop)
4226 break;
4227
4228 skb_fill_page_desc(rxtop, 0,
4229 buffer_info->rxbuf.page,
6cfbd97b 4230 0, length);
edbbb3ca
JB		 4231 } else {
4232 /* this is the middle of a chain */
4233 skb_fill_page_desc(rxtop,
4234 skb_shinfo(rxtop)->nr_frags,
13809609 4235 buffer_info->rxbuf.page, 0, length);
edbbb3ca
JB		 4236 }
4237 e1000_consume_page(buffer_info, rxtop, length);
4238 goto next_desc;
4239 } else {
4240 if (rxtop) {
4241 /* end of the chain */
4242 skb_fill_page_desc(rxtop,
4243 skb_shinfo(rxtop)->nr_frags,
13809609 4244 buffer_info->rxbuf.page, 0, length);
edbbb3ca
JB		 4245 skb = rxtop;
4246 rxtop = NULL;
4247 e1000_consume_page(buffer_info, skb, length);
4248 } else {
13809609 4249 struct page *p;
edbbb3ca 4250 /* no chain, got EOP, this buf is the packet
6cfbd97b
JK		 4251 * copybreak to save the put_page/alloc_page
4252 */
13809609 4253 p = buffer_info->rxbuf.page;
de591c78 4254 if (length <= copybreak) {
edbbb3ca 4255 u8 *vaddr;
13809609 4256
de591c78
FW		 4257 if (likely(!(netdev->features & NETIF_F_RXFCS)))
4258 length -= 4;
4259 skb = e1000_alloc_rx_skb(adapter,
4260 length);
4261 if (!skb)
4262 break;
4263
13809609 4264 vaddr = kmap_atomic(p);
6cfbd97b
JK		 4265 memcpy(skb_tail_pointer(skb), vaddr,
4266 length);
4679026d 4267 kunmap_atomic(vaddr);
edbbb3ca 4268 /* re-use the page, so don't erase
13809609 4269 * buffer_info->rxbuf.page
6cfbd97b 4270 */
edbbb3ca 4271 skb_put(skb, length);
de591c78
FW		 4272 e1000_rx_checksum(adapter,
4273 status | rx_desc->errors << 24,
4274 le16_to_cpu(rx_desc->csum), skb);
4275
4276 total_rx_bytes += skb->len;
4277 total_rx_packets++;
4278
4279 e1000_receive_skb(adapter, status,
4280 rx_desc->special, skb);
4281 goto next_desc;
edbbb3ca 4282 } else {
de591c78
FW		 4283 skb = napi_get_frags(&adapter->napi);
4284 if (!skb) {
4285 adapter->alloc_rx_buff_failed++;
4286 break;
4287 }
13809609 4288 skb_fill_page_desc(skb, 0, p, 0,
6cfbd97b 4289 length);
edbbb3ca 4290 e1000_consume_page(buffer_info, skb,
6cfbd97b 4291 length);
edbbb3ca
JB		 4292 }
4293 }
4294 }
4295
4296 /* Receive Checksum Offload XXX recompute due to CRC strip? */
4297 e1000_rx_checksum(adapter,
6cfbd97b
JK		 4298 (u32)(status) |
4299 ((u32)(rx_desc->errors) << 24),
4300 le16_to_cpu(rx_desc->csum), skb);
edbbb3ca 4301
b0d1562c
BG		 4302 total_rx_bytes += (skb->len - 4); /* don't count FCS */
4303 if (likely(!(netdev->features & NETIF_F_RXFCS)))
4304 pskb_trim(skb, skb->len - 4);
edbbb3ca
JB		 4305 total_rx_packets++;
4306
de591c78
FW		 4307 if (status & E1000_RXD_STAT_VP) {
4308 __le16 vlan = rx_desc->special;
4309 u16 vid = le16_to_cpu(vlan) & E1000_RXD_SPC_VLAN_MASK;
4310
4311 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
edbbb3ca
JB		 4312 }
4313
de591c78 4314 napi_gro_frags(&adapter->napi);
edbbb3ca
JB		 4315
4316next_desc:
4317 rx_desc->status = 0;
4318
4319 /* return some buffers to hardware, one at a time is too slow */
4320 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4321 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4322 cleaned_count = 0;
4323 }
4324
4325 /* use prefetched values */
4326 rx_desc = next_rxd;
4327 buffer_info = next_buffer;
4328 }
4329 rx_ring->next_to_clean = i;
4330
4331 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4332 if (cleaned_count)
4333 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4334
4335 adapter->total_rx_packets += total_rx_packets;
4336 adapter->total_rx_bytes += total_rx_bytes;
5fe31def
AK		 4337 netdev->stats.rx_bytes += total_rx_bytes;
4338 netdev->stats.rx_packets += total_rx_packets;
edbbb3ca
JB		 4339 return cleaned;
4340}
4341
6cfbd97b 4342/* this should improve performance for small packets with large amounts
57bf6eef
JP		 4343 * of reassembly being done in the stack
4344 */
2b294b18 4345static struct sk_buff *e1000_copybreak(struct e1000_adapter *adapter,
93f0afe9 4346 struct e1000_rx_buffer *buffer_info,
2b294b18 4347 u32 length, const void *data)
57bf6eef 4348{
2b294b18 4349 struct sk_buff *skb;
57bf6eef
JP		 4350
4351 if (length > copybreak)
2b294b18 4352 return NULL;
57bf6eef 4353
2b294b18
FW		 4354 skb = e1000_alloc_rx_skb(adapter, length);
4355 if (!skb)
4356 return NULL;
4357
4358 dma_sync_single_for_cpu(&adapter->pdev->dev, buffer_info->dma,
4359 length, DMA_FROM_DEVICE);
4360
59ae1d12 4361 skb_put_data(skb, data, length);
57bf6eef 4362
2b294b18 4363 return skb;
57bf6eef
JP		 4364}
4365
1da177e4 4366/**
2d7edb92 4367 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4 4368 * @adapter: board private structure
edbbb3ca
JB		 4369 * @rx_ring: ring to clean
4370 * @work_done: amount of napi work completed this call
4371 * @work_to_do: max amount of work allowed for this call to do
4372 */
64798845
JP		 4373static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
4374 struct e1000_rx_ring *rx_ring,
4375 int *work_done, int work_to_do)
1da177e4 4376{
1da177e4
LT		 4377 struct net_device *netdev = adapter->netdev;
4378 struct pci_dev *pdev = adapter->pdev;
86c3d59f 4379 struct e1000_rx_desc *rx_desc, *next_rxd;
93f0afe9 4380 struct e1000_rx_buffer *buffer_info, *next_buffer;
406874a7 4381 u32 length;
1da177e4 4382 unsigned int i;
72d64a43 4383 int cleaned_count = 0;
c3033b01 4384 bool cleaned = false;
a48954c8 4385 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1da177e4
LT		 4386
4387 i = rx_ring->next_to_clean;
4388 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 4389 buffer_info = &rx_ring->buffer_info[i];
1da177e4 4390
b92ff8ee 4391 while (rx_desc->status & E1000_RXD_STAT_DD) {
24f476ee 4392 struct sk_buff *skb;
13809609 4393 u8 *data;
a292ca6e 4394 u8 status;
90fb5135 4395
96838a40 4396 if (*work_done >= work_to_do)
1da177e4
LT		 4397 break;
4398 (*work_done)++;
837a1dba 4399 dma_rmb(); /* read descriptor and rx_buffer_info after status DD */
c3570acb 4400
a292ca6e 4401 status = rx_desc->status;
2b294b18 4402 length = le16_to_cpu(rx_desc->length);
86c3d59f 4403
13809609
FW		 4404 data = buffer_info->rxbuf.data;
4405 prefetch(data);
4406 skb = e1000_copybreak(adapter, buffer_info, length, data);
2b294b18 4407 if (!skb) {
13809609
FW		 4408 unsigned int frag_len = e1000_frag_len(adapter);
4409
4410 skb = build_skb(data - E1000_HEADROOM, frag_len);
4411 if (!skb) {
4412 adapter->alloc_rx_buff_failed++;
4413 break;
4414 }
4415
4416 skb_reserve(skb, E1000_HEADROOM);
2b294b18 4417 dma_unmap_single(&pdev->dev, buffer_info->dma,
93f0afe9
FW		 4418 adapter->rx_buffer_len,
4419 DMA_FROM_DEVICE);
2b294b18 4420 buffer_info->dma = 0;
13809609 4421 buffer_info->rxbuf.data = NULL;
2b294b18 4422 }
30320be8 4423
a48954c8
JW		 4424 if (++i == rx_ring->count)
4425 i = 0;
4426
86c3d59f 4427 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK		 4428 prefetch(next_rxd);
4429
86c3d59f 4430 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 4431
c3033b01 4432 cleaned = true;
72d64a43 4433 cleaned_count++;
1da177e4 4434
ea30e119 4435 /* !EOP means multiple descriptors were used to store a single
40a14dea
JB		 4436 * packet, if thats the case we need to toss it. In fact, we
4437 * to toss every packet with the EOP bit clear and the next
4438 * frame that _does_ have the EOP bit set, as it is by
4439 * definition only a frame fragment
4440 */
4441 if (unlikely(!(status & E1000_RXD_STAT_EOP)))
4442 adapter->discarding = true;
4443
4444 if (adapter->discarding) {
a1415ee6 4445 /* All receives must fit into a single buffer */
2037110c 4446 netdev_dbg(netdev, "Receive packet consumed multiple buffers\n");
2b294b18 4447 dev_kfree_skb(skb);
40a14dea
JB		 4448 if (status & E1000_RXD_STAT_EOP)
4449 adapter->discarding = false;
1da177e4
LT		 4450 goto next_desc;
4451 }
4452
96838a40 4453 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
2037110c
FW		 4454 if (e1000_tbi_should_accept(adapter, status,
4455 rx_desc->errors,
13809609 4456 length, data)) {
1da177e4 4457 length--;
2037110c
FW		 4458 } else if (netdev->features & NETIF_F_RXALL) {
4459 goto process_skb;
1da177e4 4460 } else {
2b294b18 4461 dev_kfree_skb(skb);
1da177e4
LT		 4462 goto next_desc;
4463 }
1cb5821f 4464 }
1da177e4 4465
e825b731 4466process_skb:
b0d1562c 4467 total_rx_bytes += (length - 4); /* don't count FCS */
835bb129
JB		 4468 total_rx_packets++;
4469
b0d1562c
BG		 4470 if (likely(!(netdev->features & NETIF_F_RXFCS)))
4471 /* adjust length to remove Ethernet CRC, this must be
4472 * done after the TBI_ACCEPT workaround above
4473 */
4474 length -= 4;
4475
13809609 4476 if (buffer_info->rxbuf.data == NULL)
2b294b18
FW		 4477 skb_put(skb, length);
4478 else /* copybreak skb */
4479 skb_trim(skb, length);
1da177e4
LT		 4480
4481 /* Receive Checksum Offload */
a292ca6e 4482 e1000_rx_checksum(adapter,
406874a7
JP		 4483 (u32)(status) |
4484 ((u32)(rx_desc->errors) << 24),
c3d7a3a4 4485 le16_to_cpu(rx_desc->csum), skb);
96838a40 4486
edbbb3ca 4487 e1000_receive_skb(adapter, status, rx_desc->special, skb);
c3570acb 4488
1da177e4
LT		 4489next_desc:
4490 rx_desc->status = 0;
1da177e4 4491
72d64a43
JK		 4492 /* return some buffers to hardware, one at a time is too slow */
4493 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4494 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4495 cleaned_count = 0;
4496 }
4497
30320be8 4498 /* use prefetched values */
86c3d59f
JB		 4499 rx_desc = next_rxd;
4500 buffer_info = next_buffer;
1da177e4 4501 }
1da177e4 4502 rx_ring->next_to_clean = i;
72d64a43
JK		 4503
4504 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4505 if (cleaned_count)
4506 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92 4507
835bb129
JB		 4508 adapter->total_rx_packets += total_rx_packets;
4509 adapter->total_rx_bytes += total_rx_bytes;
5fe31def
AK		 4510 netdev->stats.rx_bytes += total_rx_bytes;
4511 netdev->stats.rx_packets += total_rx_packets;
2d7edb92
MC		 4512 return cleaned;
4513}
4514
edbbb3ca
JB		 4515/**
4516 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
4517 * @adapter: address of board private structure
4518 * @rx_ring: pointer to receive ring structure
4519 * @cleaned_count: number of buffers to allocate this pass
4520 **/
edbbb3ca
JB		 4521static void
4522e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
6cfbd97b 4523 struct e1000_rx_ring *rx_ring, int cleaned_count)
edbbb3ca 4524{
edbbb3ca
JB		 4525 struct pci_dev *pdev = adapter->pdev;
4526 struct e1000_rx_desc *rx_desc;
93f0afe9 4527 struct e1000_rx_buffer *buffer_info;
edbbb3ca 4528 unsigned int i;
edbbb3ca
JB		 4529
4530 i = rx_ring->next_to_use;
4531 buffer_info = &rx_ring->buffer_info[i];
4532
4533 while (cleaned_count--) {
edbbb3ca 4534 /* allocate a new page if necessary */
13809609
FW		 4535 if (!buffer_info->rxbuf.page) {
4536 buffer_info->rxbuf.page = alloc_page(GFP_ATOMIC);
4537 if (unlikely(!buffer_info->rxbuf.page)) {
edbbb3ca
JB		 4538 adapter->alloc_rx_buff_failed++;
4539 break;
4540 }
4541 }
4542
b5abb028 4543 if (!buffer_info->dma) {
b16f53be 4544 buffer_info->dma = dma_map_page(&pdev->dev,
13809609
FW		 4545 buffer_info->rxbuf.page, 0,
4546 adapter->rx_buffer_len,
b16f53be
NN		 4547 DMA_FROM_DEVICE);
4548 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
13809609
FW		 4549 put_page(buffer_info->rxbuf.page);
4550 buffer_info->rxbuf.page = NULL;
b5abb028
AB		 4551 buffer_info->dma = 0;
4552 adapter->alloc_rx_buff_failed++;
13809609 4553 break;
b5abb028
AB		 4554 }
4555 }
edbbb3ca
JB		 4556
4557 rx_desc = E1000_RX_DESC(*rx_ring, i);
4558 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4559
4560 if (unlikely(++i == rx_ring->count))
4561 i = 0;
4562 buffer_info = &rx_ring->buffer_info[i];
4563 }
4564
4565 if (likely(rx_ring->next_to_use != i)) {
4566 rx_ring->next_to_use = i;
4567 if (unlikely(i-- == 0))
4568 i = (rx_ring->count - 1);
4569
4570 /* Force memory writes to complete before letting h/w
4571 * know there are new descriptors to fetch. (Only
4572 * applicable for weak-ordered memory model archs,
6cfbd97b
JK		 4573 * such as IA-64).
4574 */
edbbb3ca
JB		 4575 wmb();
4576 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4577 }
4578}
4579
1da177e4 4580/**
2d7edb92 4581 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 4582 * @adapter: address of board private structure
4583 **/
64798845
JP		 4584static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4585 struct e1000_rx_ring *rx_ring,
4586 int cleaned_count)
1da177e4 4587{
1dc32918 4588 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4589 struct pci_dev *pdev = adapter->pdev;
4590 struct e1000_rx_desc *rx_desc;
93f0afe9 4591 struct e1000_rx_buffer *buffer_info;
2648345f 4592 unsigned int i;
89d71a66 4593 unsigned int bufsz = adapter->rx_buffer_len;
1da177e4
LT		 4594
4595 i = rx_ring->next_to_use;
4596 buffer_info = &rx_ring->buffer_info[i];
4597
a292ca6e 4598 while (cleaned_count--) {
13809609
FW		 4599 void *data;
4600
4601 if (buffer_info->rxbuf.data)
2b294b18 4602 goto skip;
a292ca6e 4603
13809609
FW		 4604 data = e1000_alloc_frag(adapter);
4605 if (!data) {
1da177e4 4606 /* Better luck next round */
72d64a43 4607 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4608 break;
4609 }
4610
2648345f 4611 /* Fix for errata 23, can't cross 64kB boundary */
13809609
FW		 4612 if (!e1000_check_64k_bound(adapter, data, bufsz)) {
4613 void *olddata = data;
feb8f478 4614 e_err(rx_err, "skb align check failed: %u bytes at "
13809609 4615 "%p\n", bufsz, data);
2648345f 4616 /* Try again, without freeing the previous */
13809609 4617 data = e1000_alloc_frag(adapter);
2648345f 4618 /* Failed allocation, critical failure */
13809609 4619 if (!data) {
6bf93ba8 4620 skb_free_frag(olddata);
edbbb3ca 4621 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4622 break;
4623 }
2648345f 4624
13809609 4625 if (!e1000_check_64k_bound(adapter, data, bufsz)) {
1da177e4 4626 /* give up */
6bf93ba8
AD		 4627 skb_free_frag(data);
4628 skb_free_frag(olddata);
edbbb3ca 4629 adapter->alloc_rx_buff_failed++;
13809609 4630 break;
1da177e4 4631 }
ca6f7224
CH		 4632
4633 /* Use new allocation */
6bf93ba8 4634 skb_free_frag(olddata);
1da177e4 4635 }
b16f53be 4636 buffer_info->dma = dma_map_single(&pdev->dev,
13809609 4637 data,
93f0afe9 4638 adapter->rx_buffer_len,
b16f53be
NN		 4639 DMA_FROM_DEVICE);
4640 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
6bf93ba8 4641 skb_free_frag(data);
b5abb028
AB		 4642 buffer_info->dma = 0;
4643 adapter->alloc_rx_buff_failed++;
13809609 4644 break;
b5abb028 4645 }
1da177e4 4646
6cfbd97b 4647 /* XXX if it was allocated cleanly it will never map to a
edbbb3ca
JB		 4648 * boundary crossing
4649 */
4650
2648345f
MC		 4651 /* Fix for errata 23, can't cross 64kB boundary */
4652 if (!e1000_check_64k_bound(adapter,
4653 (void *)(unsigned long)buffer_info->dma,
4654 adapter->rx_buffer_len)) {
feb8f478
ET		 4655 e_err(rx_err, "dma align check failed: %u bytes at "
4656 "%p\n", adapter->rx_buffer_len,
675ad473 4657 (void *)(unsigned long)buffer_info->dma);
1da177e4 4658
b16f53be 4659 dma_unmap_single(&pdev->dev, buffer_info->dma,
1da177e4 4660 adapter->rx_buffer_len,
b16f53be 4661 DMA_FROM_DEVICE);
13809609 4662
6bf93ba8 4663 skb_free_frag(data);
13809609 4664 buffer_info->rxbuf.data = NULL;
679be3ba 4665 buffer_info->dma = 0;
1da177e4 4666
edbbb3ca 4667 adapter->alloc_rx_buff_failed++;
13809609 4668 break;
1da177e4 4669 }
13809609
FW		 4670 buffer_info->rxbuf.data = data;
4671 skip:
1da177e4
LT		 4672 rx_desc = E1000_RX_DESC(*rx_ring, i);
4673 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4674
96838a40
JB		 4675 if (unlikely(++i == rx_ring->count))
4676 i = 0;
1da177e4
LT		 4677 buffer_info = &rx_ring->buffer_info[i];
4678 }
4679
b92ff8ee
JB		 4680 if (likely(rx_ring->next_to_use != i)) {
4681 rx_ring->next_to_use = i;
4682 if (unlikely(i-- == 0))
4683 i = (rx_ring->count - 1);
4684
4685 /* Force memory writes to complete before letting h/w
4686 * know there are new descriptors to fetch. (Only
4687 * applicable for weak-ordered memory model archs,
6cfbd97b
JK		 4688 * such as IA-64).
4689 */
b92ff8ee 4690 wmb();
1dc32918 4691 writel(i, hw->hw_addr + rx_ring->rdt);
b92ff8ee 4692 }
1da177e4
LT		 4693}
4694
4695/**
4696 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4697 * @adapter:
4698 **/
64798845 4699static void e1000_smartspeed(struct e1000_adapter *adapter)
1da177e4 4700{
1dc32918 4701 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 4702 u16 phy_status;
4703 u16 phy_ctrl;
1da177e4 4704
1dc32918
JP		 4705 if ((hw->phy_type != e1000_phy_igp) || !hw->autoneg ||
4706 !(hw->autoneg_advertised & ADVERTISE_1000_FULL))
1da177e4
LT		 4707 return;
4708
96838a40 4709 if (adapter->smartspeed == 0) {
1da177e4 4710 /* If Master/Slave config fault is asserted twice,
6cfbd97b
JK		 4711 * we assume back-to-back
4712 */
1dc32918 4713 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
a48954c8
JW		 4714 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT))
4715 return;
1dc32918 4716 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
a48954c8
JW		 4717 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT))
4718 return;
1dc32918 4719 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4720 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4 4721 phy_ctrl &= ~CR_1000T_MS_ENABLE;
1dc32918 4722 e1000_write_phy_reg(hw, PHY_1000T_CTRL,
1da177e4
LT		 4723 phy_ctrl);
4724 adapter->smartspeed++;
1dc32918
JP		 4725 if (!e1000_phy_setup_autoneg(hw) &&
4726 !e1000_read_phy_reg(hw, PHY_CTRL,
6cfbd97b 4727 &phy_ctrl)) {
1da177e4
LT		 4728 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4729 MII_CR_RESTART_AUTO_NEG);
1dc32918 4730 e1000_write_phy_reg(hw, PHY_CTRL,
1da177e4
LT		 4731 phy_ctrl);
4732 }
4733 }
4734 return;
96838a40 4735 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4 4736 /* If still no link, perhaps using 2/3 pair cable */
1dc32918 4737 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
1da177e4 4738 phy_ctrl |= CR_1000T_MS_ENABLE;
1dc32918
JP		 4739 e1000_write_phy_reg(hw, PHY_1000T_CTRL, phy_ctrl);
4740 if (!e1000_phy_setup_autoneg(hw) &&
4741 !e1000_read_phy_reg(hw, PHY_CTRL, &phy_ctrl)) {
1da177e4
LT		 4742 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4743 MII_CR_RESTART_AUTO_NEG);
1dc32918 4744 e1000_write_phy_reg(hw, PHY_CTRL, phy_ctrl);
1da177e4
LT		 4745 }
4746 }
4747 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4748 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4749 adapter->smartspeed = 0;
4750}
4751
4752/**
4753 * e1000_ioctl -
4754 * @netdev:
4755 * @ifreq:
4756 * @cmd:
4757 **/
64798845 4758static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1da177e4
LT		 4759{
4760 switch (cmd) {
4761 case SIOCGMIIPHY:
4762 case SIOCGMIIREG:
4763 case SIOCSMIIREG:
4764 return e1000_mii_ioctl(netdev, ifr, cmd);
4765 default:
4766 return -EOPNOTSUPP;
4767 }
4768}
4769
4770/**
4771 * e1000_mii_ioctl -
4772 * @netdev:
4773 * @ifreq:
4774 * @cmd:
4775 **/
64798845
JP		 4776static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4777 int cmd)
1da177e4 4778{
60490fe0 4779 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4780 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4781 struct mii_ioctl_data *data = if_mii(ifr);
4782 int retval;
406874a7 4783 u16 mii_reg;
97876fc6 4784 unsigned long flags;
1da177e4 4785
1dc32918 4786 if (hw->media_type != e1000_media_type_copper)
1da177e4
LT		 4787 return -EOPNOTSUPP;
4788
4789 switch (cmd) {
4790 case SIOCGMIIPHY:
1dc32918 4791 data->phy_id = hw->phy_addr;
1da177e4
LT		 4792 break;
4793 case SIOCGMIIREG:
97876fc6 4794 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4795 if (e1000_read_phy_reg(hw, data->reg_num & 0x1F,
97876fc6
MC		 4796 &data->val_out)) {
4797 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4798 return -EIO;
97876fc6
MC		 4799 }
4800 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4801 break;
4802 case SIOCSMIIREG:
96838a40 4803 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4804 return -EFAULT;
4805 mii_reg = data->val_in;
97876fc6 4806 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4807 if (e1000_write_phy_reg(hw, data->reg_num,
97876fc6
MC		 4808 mii_reg)) {
4809 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4810 return -EIO;
97876fc6 4811 }
f0163ac4 4812 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1dc32918 4813 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 4814 switch (data->reg_num) {
4815 case PHY_CTRL:
96838a40 4816 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4817 break;
96838a40 4818 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1dc32918
JP		 4819 hw->autoneg = 1;
4820 hw->autoneg_advertised = 0x2F;
1da177e4 4821 } else {
14ad2513 4822 u32 speed;
1da177e4 4823 if (mii_reg & 0x40)
14ad2513 4824 speed = SPEED_1000;
1da177e4 4825 else if (mii_reg & 0x2000)
14ad2513 4826 speed = SPEED_100;
1da177e4 4827 else
14ad2513
DD		 4828 speed = SPEED_10;
4829 retval = e1000_set_spd_dplx(
4830 adapter, speed,
4831 ((mii_reg & 0x100)
4832 ? DUPLEX_FULL :
4833 DUPLEX_HALF));
f0163ac4 4834 if (retval)
1da177e4
LT		 4835 return retval;
4836 }
2db10a08
AK		 4837 if (netif_running(adapter->netdev))
4838 e1000_reinit_locked(adapter);
4839 else
1da177e4
LT		 4840 e1000_reset(adapter);
4841 break;
4842 case M88E1000_PHY_SPEC_CTRL:
4843 case M88E1000_EXT_PHY_SPEC_CTRL:
1dc32918 4844 if (e1000_phy_reset(hw))
1da177e4
LT		 4845 return -EIO;
4846 break;
4847 }
4848 } else {
4849 switch (data->reg_num) {
4850 case PHY_CTRL:
96838a40 4851 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4852 break;
2db10a08
AK		 4853 if (netif_running(adapter->netdev))
4854 e1000_reinit_locked(adapter);
4855 else
1da177e4
LT		 4856 e1000_reset(adapter);
4857 break;
4858 }
4859 }
4860 break;
4861 default:
4862 return -EOPNOTSUPP;
4863 }
4864 return E1000_SUCCESS;
4865}
4866
64798845 4867void e1000_pci_set_mwi(struct e1000_hw *hw)
1da177e4
LT		 4868{
4869 struct e1000_adapter *adapter = hw->back;
2648345f 4870 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4871
96838a40 4872 if (ret_val)
feb8f478 4873 e_err(probe, "Error in setting MWI\n");
1da177e4
LT		 4874}
4875
64798845 4876void e1000_pci_clear_mwi(struct e1000_hw *hw)
1da177e4
LT		 4877{
4878 struct e1000_adapter *adapter = hw->back;
4879
4880 pci_clear_mwi(adapter->pdev);
4881}
4882
64798845 4883int e1000_pcix_get_mmrbc(struct e1000_hw *hw)
007755eb
PO		 4884{
4885 struct e1000_adapter *adapter = hw->back;
4886 return pcix_get_mmrbc(adapter->pdev);
4887}
4888
64798845 4889void e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc)
007755eb
PO		 4890{
4891 struct e1000_adapter *adapter = hw->back;
4892 pcix_set_mmrbc(adapter->pdev, mmrbc);
4893}
4894
64798845 4895void e1000_io_write(struct e1000_hw *hw, unsigned long port, u32 value)
1da177e4
LT		 4896{
4897 outl(value, port);
4898}
4899
5622e404
JP		 4900static bool e1000_vlan_used(struct e1000_adapter *adapter)
4901{
4902 u16 vid;
4903
4904 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
4905 return true;
4906 return false;
4907}
4908
52f5509f
JP		 4909static void __e1000_vlan_mode(struct e1000_adapter *adapter,
4910 netdev_features_t features)
4911{
4912 struct e1000_hw *hw = &adapter->hw;
4913 u32 ctrl;
4914
4915 ctrl = er32(CTRL);
f646968f 4916 if (features & NETIF_F_HW_VLAN_CTAG_RX) {
52f5509f
JP		 4917 /* enable VLAN tag insert/strip */
4918 ctrl |= E1000_CTRL_VME;
4919 } else {
4920 /* disable VLAN tag insert/strip */
4921 ctrl &= ~E1000_CTRL_VME;
4922 }
4923 ew32(CTRL, ctrl);
4924}
5622e404
JP		 4925static void e1000_vlan_filter_on_off(struct e1000_adapter *adapter,
4926 bool filter_on)
1da177e4 4927{
1dc32918 4928 struct e1000_hw *hw = &adapter->hw;
5622e404 4929 u32 rctl;
1da177e4 4930
9150b76a
JB		 4931 if (!test_bit(__E1000_DOWN, &adapter->flags))
4932 e1000_irq_disable(adapter);
1da177e4 4933
52f5509f 4934 __e1000_vlan_mode(adapter, adapter->netdev->features);
5622e404 4935 if (filter_on) {
1532ecea
JB		 4936 /* enable VLAN receive filtering */
4937 rctl = er32(RCTL);
4938 rctl &= ~E1000_RCTL_CFIEN;
5622e404 4939 if (!(adapter->netdev->flags & IFF_PROMISC))
1532ecea
JB		 4940 rctl |= E1000_RCTL_VFE;
4941 ew32(RCTL, rctl);
4942 e1000_update_mng_vlan(adapter);
1da177e4 4943 } else {
1532ecea
JB		 4944 /* disable VLAN receive filtering */
4945 rctl = er32(RCTL);
4946 rctl &= ~E1000_RCTL_VFE;
4947 ew32(RCTL, rctl);
5622e404 4948 }
fd38d7a0 4949
5622e404
JP		 4950 if (!test_bit(__E1000_DOWN, &adapter->flags))
4951 e1000_irq_enable(adapter);
4952}
4953
c8f44aff 4954static void e1000_vlan_mode(struct net_device *netdev,
52f5509f 4955 netdev_features_t features)
5622e404
JP		 4956{
4957 struct e1000_adapter *adapter = netdev_priv(netdev);
5622e404
JP		 4958
4959 if (!test_bit(__E1000_DOWN, &adapter->flags))
4960 e1000_irq_disable(adapter);
4961
52f5509f 4962 __e1000_vlan_mode(adapter, features);
1da177e4 4963
9150b76a
JB		 4964 if (!test_bit(__E1000_DOWN, &adapter->flags))
4965 e1000_irq_enable(adapter);
1da177e4
LT		 4966}
4967
80d5c368
PM		 4968static int e1000_vlan_rx_add_vid(struct net_device *netdev,
4969 __be16 proto, u16 vid)
1da177e4 4970{
60490fe0 4971 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4972 struct e1000_hw *hw = &adapter->hw;
406874a7 4973 u32 vfta, index;
96838a40 4974
1dc32918 4975 if ((hw->mng_cookie.status &
96838a40
JB		 4976 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4977 (vid == adapter->mng_vlan_id))
8e586137 4978 return 0;
5622e404
JP		 4979
4980 if (!e1000_vlan_used(adapter))
4981 e1000_vlan_filter_on_off(adapter, true);
4982
1da177e4
LT		 4983 /* add VID to filter table */
4984 index = (vid >> 5) & 0x7F;
1dc32918 4985 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4986 vfta |= (1 << (vid & 0x1F));
1dc32918 4987 e1000_write_vfta(hw, index, vfta);
5622e404
JP		 4988
4989 set_bit(vid, adapter->active_vlans);
8e586137
JP		 4990
4991 return 0;
1da177e4
LT		 4992}
4993
80d5c368
PM		 4994static int e1000_vlan_rx_kill_vid(struct net_device *netdev,
4995 __be16 proto, u16 vid)
1da177e4 4996{
60490fe0 4997 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4998 struct e1000_hw *hw = &adapter->hw;
406874a7 4999 u32 vfta, index;
1da177e4 5000
9150b76a
JB		 5001 if (!test_bit(__E1000_DOWN, &adapter->flags))
5002 e1000_irq_disable(adapter);
9150b76a
JB		 5003 if (!test_bit(__E1000_DOWN, &adapter->flags))
5004 e1000_irq_enable(adapter);
1da177e4
LT		 5005
5006 /* remove VID from filter table */
5007 index = (vid >> 5) & 0x7F;
1dc32918 5008 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 5009 vfta &= ~(1 << (vid & 0x1F));
1dc32918 5010 e1000_write_vfta(hw, index, vfta);
5622e404
JP		 5011
5012 clear_bit(vid, adapter->active_vlans);
5013
5014 if (!e1000_vlan_used(adapter))
5015 e1000_vlan_filter_on_off(adapter, false);
8e586137
JP		 5016
5017 return 0;
1da177e4
LT		 5018}
5019
64798845 5020static void e1000_restore_vlan(struct e1000_adapter *adapter)
1da177e4 5021{
5622e404 5022 u16 vid;
1da177e4 5023
5622e404
JP		 5024 if (!e1000_vlan_used(adapter))
5025 return;
5026
5027 e1000_vlan_filter_on_off(adapter, true);
5028 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
80d5c368 5029 e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
1da177e4
LT		 5030}
5031
14ad2513 5032int e1000_set_spd_dplx(struct e1000_adapter *adapter, u32 spd, u8 dplx)
1da177e4 5033{
1dc32918
JP		 5034 struct e1000_hw *hw = &adapter->hw;
5035
5036 hw->autoneg = 0;
1da177e4 5037
14ad2513 5038 /* Make sure dplx is at most 1 bit and lsb of speed is not set
6cfbd97b
JK		 5039 * for the switch() below to work
5040 */
14ad2513
DD		 5041 if ((spd & 1) || (dplx & ~1))
5042 goto err_inval;
5043
6921368f 5044 /* Fiber NICs only allow 1000 gbps Full duplex */
1dc32918 5045 if ((hw->media_type == e1000_media_type_fiber) &&
14ad2513
DD		 5046 spd != SPEED_1000 &&
5047 dplx != DUPLEX_FULL)
5048 goto err_inval;
6921368f 5049
14ad2513 5050 switch (spd + dplx) {
1da177e4 5051 case SPEED_10 + DUPLEX_HALF:
1dc32918 5052 hw->forced_speed_duplex = e1000_10_half;
1da177e4
LT		 5053 break;
5054 case SPEED_10 + DUPLEX_FULL:
1dc32918 5055 hw->forced_speed_duplex = e1000_10_full;
1da177e4
LT		 5056 break;
5057 case SPEED_100 + DUPLEX_HALF:
1dc32918 5058 hw->forced_speed_duplex = e1000_100_half;
1da177e4
LT		 5059 break;
5060 case SPEED_100 + DUPLEX_FULL:
1dc32918 5061 hw->forced_speed_duplex = e1000_100_full;
1da177e4
LT		 5062 break;
5063 case SPEED_1000 + DUPLEX_FULL:
1dc32918
JP		 5064 hw->autoneg = 1;
5065 hw->autoneg_advertised = ADVERTISE_1000_FULL;
1da177e4
LT		 5066 break;
5067 case SPEED_1000 + DUPLEX_HALF: /* not supported */
5068 default:
14ad2513 5069 goto err_inval;
1da177e4 5070 }
c819bbd5
JB		 5071
5072 /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
5073 hw->mdix = AUTO_ALL_MODES;
5074
1da177e4 5075 return 0;
14ad2513
DD		 5076
5077err_inval:
5078 e_err(probe, "Unsupported Speed/Duplex configuration\n");
5079 return -EINVAL;
1da177e4
LT		 5080}
5081
b43fcd7d 5082static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake)
1da177e4
LT		 5083{
5084 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 5085 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 5086 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 5087 u32 ctrl, ctrl_ext, rctl, status;
5088 u32 wufc = adapter->wol;
6fdfef16 5089#ifdef CONFIG_PM
240b1710 5090 int retval = 0;
6fdfef16 5091#endif
1da177e4
LT		 5092
5093 netif_device_detach(netdev);
5094
2db10a08 5095 if (netif_running(netdev)) {
6a7d64e3 5096 int count = E1000_CHECK_RESET_COUNT;
5097
5098 while (test_bit(__E1000_RESETTING, &adapter->flags) && count--)
5099 usleep_range(10000, 20000);
5100
2db10a08 5101 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 5102 e1000_down(adapter);
2db10a08 5103 }
1da177e4 5104
2f82665f 5105#ifdef CONFIG_PM
1d33e9c6 5106 retval = pci_save_state(pdev);
3a3847e0 5107 if (retval)
2f82665f
JB		 5108 return retval;
5109#endif
5110
1dc32918 5111 status = er32(STATUS);
96838a40 5112 if (status & E1000_STATUS_LU)
1da177e4
LT		 5113 wufc &= ~E1000_WUFC_LNKC;
5114
96838a40 5115 if (wufc) {
1da177e4 5116 e1000_setup_rctl(adapter);
db0ce50d 5117 e1000_set_rx_mode(netdev);
1da177e4 5118
b868179c
DN		 5119 rctl = er32(RCTL);
5120
1da177e4 5121 /* turn on all-multi mode if wake on multicast is enabled */
b868179c 5122 if (wufc & E1000_WUFC_MC)
1da177e4 5123 rctl |= E1000_RCTL_MPE;
b868179c
DN		 5124
5125 /* enable receives in the hardware */
5126 ew32(RCTL, rctl | E1000_RCTL_EN);
1da177e4 5127
1dc32918
JP		 5128 if (hw->mac_type >= e1000_82540) {
5129 ctrl = er32(CTRL);
1da177e4
LT		 5130 /* advertise wake from D3Cold */
5131 #define E1000_CTRL_ADVD3WUC 0x00100000
5132 /* phy power management enable */
5133 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
5134 ctrl |= E1000_CTRL_ADVD3WUC |
5135 E1000_CTRL_EN_PHY_PWR_MGMT;
1dc32918 5136 ew32(CTRL, ctrl);
1da177e4
LT		 5137 }
5138
1dc32918 5139 if (hw->media_type == e1000_media_type_fiber ||
1532ecea 5140 hw->media_type == e1000_media_type_internal_serdes) {
1da177e4 5141 /* keep the laser running in D3 */
1dc32918 5142 ctrl_ext = er32(CTRL_EXT);
1da177e4 5143 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
1dc32918 5144 ew32(CTRL_EXT, ctrl_ext);
1da177e4
LT		 5145 }
5146
1dc32918
JP		 5147 ew32(WUC, E1000_WUC_PME_EN);
5148 ew32(WUFC, wufc);
1da177e4 5149 } else {
1dc32918
JP		 5150 ew32(WUC, 0);
5151 ew32(WUFC, 0);
1da177e4
LT		 5152 }
5153
0fccd0e9
JG		 5154 e1000_release_manageability(adapter);
5155
b43fcd7d
RW		 5156 *enable_wake = !!wufc;
5157
0fccd0e9 5158 /* make sure adapter isn't asleep if manageability is enabled */
b43fcd7d
RW		 5159 if (adapter->en_mng_pt)
5160 *enable_wake = true;
1da177e4 5161
edd106fc
AK		 5162 if (netif_running(netdev))
5163 e1000_free_irq(adapter);
5164
0b76aae7
TD		 5165 if (!test_and_set_bit(__E1000_DISABLED, &adapter->flags))
5166 pci_disable_device(pdev);
240b1710 5167
1da177e4
LT		 5168 return 0;
5169}
5170
2f82665f 5171#ifdef CONFIG_PM
b43fcd7d
RW		 5172static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
5173{
5174 int retval;
5175 bool wake;
5176
5177 retval = __e1000_shutdown(pdev, &wake);
5178 if (retval)
5179 return retval;
5180
5181 if (wake) {
5182 pci_prepare_to_sleep(pdev);
5183 } else {
5184 pci_wake_from_d3(pdev, false);
5185 pci_set_power_state(pdev, PCI_D3hot);
5186 }
5187
5188 return 0;
5189}
5190
64798845 5191static int e1000_resume(struct pci_dev *pdev)
1da177e4
LT		 5192{
5193 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 5194 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 5195 struct e1000_hw *hw = &adapter->hw;
406874a7 5196 u32 err;
1da177e4 5197
d0e027db 5198 pci_set_power_state(pdev, PCI_D0);
1d33e9c6 5199 pci_restore_state(pdev);
dbb5aaeb 5200 pci_save_state(pdev);
81250297
TI		 5201
5202 if (adapter->need_ioport)
5203 err = pci_enable_device(pdev);
5204 else
5205 err = pci_enable_device_mem(pdev);
c7be73bc 5206 if (err) {
675ad473 5207 pr_err("Cannot enable PCI device from suspend\n");
3d1dd8cb
AK		 5208 return err;
5209 }
0b76aae7
TD		 5210
5211 /* flush memory to make sure state is correct */
5212 smp_mb__before_atomic();
5213 clear_bit(__E1000_DISABLED, &adapter->flags);
a4cb847d 5214 pci_set_master(pdev);
1da177e4 5215
d0e027db
AK		 5216 pci_enable_wake(pdev, PCI_D3hot, 0);
5217 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4 5218
c7be73bc
JP		 5219 if (netif_running(netdev)) {
5220 err = e1000_request_irq(adapter);
5221 if (err)
5222 return err;
5223 }
edd106fc
AK		 5224
5225 e1000_power_up_phy(adapter);
1da177e4 5226 e1000_reset(adapter);
1dc32918 5227 ew32(WUS, ~0);
1da177e4 5228
0fccd0e9
JG		 5229 e1000_init_manageability(adapter);
5230
96838a40 5231 if (netif_running(netdev))
1da177e4
LT		 5232 e1000_up(adapter);
5233
5234 netif_device_attach(netdev);
5235
1da177e4
LT		 5236 return 0;
5237}
5238#endif
c653e635
AK		 5239
5240static void e1000_shutdown(struct pci_dev *pdev)
5241{
b43fcd7d
RW		 5242 bool wake;
5243
5244 __e1000_shutdown(pdev, &wake);
5245
5246 if (system_state == SYSTEM_POWER_OFF) {
5247 pci_wake_from_d3(pdev, wake);
5248 pci_set_power_state(pdev, PCI_D3hot);
5249 }
c653e635
AK		 5250}
5251
1da177e4 5252#ifdef CONFIG_NET_POLL_CONTROLLER
6cfbd97b 5253/* Polling 'interrupt' - used by things like netconsole to send skbs
1da177e4
LT		 5254 * without having to re-enable interrupts. It's not called while
5255 * the interrupt routine is executing.
5256 */
64798845 5257static void e1000_netpoll(struct net_device *netdev)
1da177e4 5258{
60490fe0 5259 struct e1000_adapter *adapter = netdev_priv(netdev);
d3d9e484 5260
31119129
WC		 5261 if (disable_hardirq(adapter->pdev->irq))
5262 e1000_intr(adapter->pdev->irq, netdev);
1da177e4
LT		 5263 enable_irq(adapter->pdev->irq);
5264}
5265#endif
5266
9026729b
AK		 5267/**
5268 * e1000_io_error_detected - called when PCI error is detected
5269 * @pdev: Pointer to PCI device
120a5d0d 5270 * @state: The current pci connection state
9026729b
AK		 5271 *
5272 * This function is called after a PCI bus error affecting
5273 * this device has been detected.
5274 */
64798845
JP		 5275static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
5276 pci_channel_state_t state)
9026729b
AK		 5277{
5278 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 5279 struct e1000_adapter *adapter = netdev_priv(netdev);
9026729b
AK		 5280
5281 netif_device_detach(netdev);
5282
eab63302
AD		 5283 if (state == pci_channel_io_perm_failure)
5284 return PCI_ERS_RESULT_DISCONNECT;
5285
9026729b
AK		 5286 if (netif_running(netdev))
5287 e1000_down(adapter);
0b76aae7
TD		 5288
5289 if (!test_and_set_bit(__E1000_DISABLED, &adapter->flags))
5290 pci_disable_device(pdev);
9026729b
AK		 5291
5292 /* Request a slot slot reset. */
5293 return PCI_ERS_RESULT_NEED_RESET;
5294}
5295
5296/**
5297 * e1000_io_slot_reset - called after the pci bus has been reset.
5298 * @pdev: Pointer to PCI device
5299 *
5300 * Restart the card from scratch, as if from a cold-boot. Implementation
5301 * resembles the first-half of the e1000_resume routine.
5302 */
5303static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5304{
5305 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 5306 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 5307 struct e1000_hw *hw = &adapter->hw;
81250297 5308 int err;
9026729b 5309
81250297
TI		 5310 if (adapter->need_ioport)
5311 err = pci_enable_device(pdev);
5312 else
5313 err = pci_enable_device_mem(pdev);
5314 if (err) {
675ad473 5315 pr_err("Cannot re-enable PCI device after reset.\n");
9026729b
AK		 5316 return PCI_ERS_RESULT_DISCONNECT;
5317 }
0b76aae7
TD		 5318
5319 /* flush memory to make sure state is correct */
5320 smp_mb__before_atomic();
5321 clear_bit(__E1000_DISABLED, &adapter->flags);
9026729b
AK		 5322 pci_set_master(pdev);
5323
dbf38c94
LV		 5324 pci_enable_wake(pdev, PCI_D3hot, 0);
5325 pci_enable_wake(pdev, PCI_D3cold, 0);
9026729b 5326
9026729b 5327 e1000_reset(adapter);
1dc32918 5328 ew32(WUS, ~0);
9026729b
AK		 5329
5330 return PCI_ERS_RESULT_RECOVERED;
5331}
5332
5333/**
5334 * e1000_io_resume - called when traffic can start flowing again.
5335 * @pdev: Pointer to PCI device
5336 *
5337 * This callback is called when the error recovery driver tells us that
5338 * its OK to resume normal operation. Implementation resembles the
5339 * second-half of the e1000_resume routine.
5340 */
5341static void e1000_io_resume(struct pci_dev *pdev)
5342{
5343 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 5344 struct e1000_adapter *adapter = netdev_priv(netdev);
0fccd0e9
JG		 5345
5346 e1000_init_manageability(adapter);
9026729b
AK		 5347
5348 if (netif_running(netdev)) {
5349 if (e1000_up(adapter)) {
675ad473 5350 pr_info("can't bring device back up after reset\n");
9026729b
AK		 5351 return;
5352 }
5353 }
5354
5355 netif_device_attach(netdev);
9026729b
AK		 5356}
5357
1da177e4 5358/* e1000_main.c */
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