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fm10k: Add support for debugfs
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1/* Intel Ethernet Switch Host Interface Driver
2 * Copyright(c) 2013 - 2014 Intel Corporation.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * The full GNU General Public License is included in this distribution in
14 * the file called "COPYING".
15 *
16 * Contact Information:
17 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
18 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
19 */
20
21#ifndef _FM10K_H_
22#define _FM10K_H_
23
24#include <linux/types.h>
25#include <linux/etherdevice.h>
26#include <linux/rtnetlink.h>
27#include <linux/if_vlan.h>
28#include <linux/pci.h>
29
0e7b3644 30#include "fm10k_pf.h"
5cb8db4a 31#include "fm10k_vf.h"
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32
33#define FM10K_MAX_JUMBO_FRAME_SIZE 15358 /* Maximum supported size 15K */
34
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35#define MAX_QUEUES FM10K_MAX_QUEUES_PF
36
37#define FM10K_MIN_RXD 128
38#define FM10K_MAX_RXD 4096
39#define FM10K_DEFAULT_RXD 256
40
41#define FM10K_MIN_TXD 128
42#define FM10K_MAX_TXD 4096
43#define FM10K_DEFAULT_TXD 256
44#define FM10K_DEFAULT_TX_WORK 256
45
46#define FM10K_RXBUFFER_256 256
47#define FM10K_RXBUFFER_16384 16384
48#define FM10K_RX_HDR_LEN FM10K_RXBUFFER_256
49#if PAGE_SIZE <= FM10K_RXBUFFER_16384
50#define FM10K_RX_BUFSZ (PAGE_SIZE / 2)
51#else
52#define FM10K_RX_BUFSZ FM10K_RXBUFFER_16384
53#endif
54
55/* How many Rx Buffers do we bundle into one write to the hardware ? */
56#define FM10K_RX_BUFFER_WRITE 16 /* Must be power of 2 */
57
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58#define FM10K_MAX_STATIONS 63
59struct fm10k_l2_accel {
60 int size;
61 u16 count;
62 u16 dglort;
63 struct rcu_head rcu;
64 struct net_device *macvlan[0];
65};
66
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67enum fm10k_ring_state_t {
68 __FM10K_TX_DETECT_HANG,
69 __FM10K_HANG_CHECK_ARMED,
70};
71
72#define check_for_tx_hang(ring) \
73 test_bit(__FM10K_TX_DETECT_HANG, &(ring)->state)
74#define set_check_for_tx_hang(ring) \
75 set_bit(__FM10K_TX_DETECT_HANG, &(ring)->state)
76#define clear_check_for_tx_hang(ring) \
77 clear_bit(__FM10K_TX_DETECT_HANG, &(ring)->state)
78
79struct fm10k_tx_buffer {
80 struct fm10k_tx_desc *next_to_watch;
81 struct sk_buff *skb;
82 unsigned int bytecount;
83 u16 gso_segs;
84 u16 tx_flags;
85 DEFINE_DMA_UNMAP_ADDR(dma);
86 DEFINE_DMA_UNMAP_LEN(len);
87};
88
89struct fm10k_rx_buffer {
90 dma_addr_t dma;
91 struct page *page;
92 u32 page_offset;
93};
94
95struct fm10k_queue_stats {
96 u64 packets;
97 u64 bytes;
98};
99
100struct fm10k_tx_queue_stats {
101 u64 restart_queue;
102 u64 csum_err;
103 u64 tx_busy;
104 u64 tx_done_old;
105};
106
107struct fm10k_rx_queue_stats {
108 u64 alloc_failed;
109 u64 csum_err;
110 u64 errors;
111};
112
113struct fm10k_ring {
114 struct fm10k_q_vector *q_vector;/* backpointer to host q_vector */
115 struct net_device *netdev; /* netdev ring belongs to */
116 struct device *dev; /* device for DMA mapping */
5cd5e2e9 117 struct fm10k_l2_accel __rcu *l2_accel; /* L2 acceleration list */
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118 void *desc; /* descriptor ring memory */
119 union {
120 struct fm10k_tx_buffer *tx_buffer;
121 struct fm10k_rx_buffer *rx_buffer;
122 };
123 u32 __iomem *tail;
124 unsigned long state;
125 dma_addr_t dma; /* phys. address of descriptor ring */
126 unsigned int size; /* length in bytes */
127
128 u8 queue_index; /* needed for queue management */
129 u8 reg_idx; /* holds the special value that gets
130 * the hardware register offset
131 * associated with this ring, which is
132 * different for DCB and RSS modes
133 */
134 u8 qos_pc; /* priority class of queue */
135 u16 vid; /* default vlan ID of queue */
136 u16 count; /* amount of descriptors */
137
138 u16 next_to_alloc;
139 u16 next_to_use;
140 u16 next_to_clean;
141
142 struct fm10k_queue_stats stats;
143 struct u64_stats_sync syncp;
144 union {
145 /* Tx */
146 struct fm10k_tx_queue_stats tx_stats;
147 /* Rx */
148 struct {
149 struct fm10k_rx_queue_stats rx_stats;
150 struct sk_buff *skb;
151 };
152 };
153} ____cacheline_internodealigned_in_smp;
154
18283cad 155struct fm10k_ring_container {
e27ef599 156 struct fm10k_ring *ring; /* pointer to linked list of rings */
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157 unsigned int total_bytes; /* total bytes processed this int */
158 unsigned int total_packets; /* total packets processed this int */
159 u16 work_limit; /* total work allowed per interrupt */
160 u16 itr; /* interrupt throttle rate value */
161 u8 count; /* total number of rings in vector */
162};
163
164#define FM10K_ITR_MAX 0x0FFF /* maximum value for ITR */
165#define FM10K_ITR_10K 100 /* 100us */
166#define FM10K_ITR_20K 50 /* 50us */
167#define FM10K_ITR_ADAPTIVE 0x8000 /* adaptive interrupt moderation flag */
168
169#define FM10K_ITR_ENABLE (FM10K_ITR_AUTOMASK | FM10K_ITR_MASK_CLEAR)
170
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171static inline struct netdev_queue *txring_txq(const struct fm10k_ring *ring)
172{
173 return &ring->netdev->_tx[ring->queue_index];
174}
175
176/* iterator for handling rings in ring container */
177#define fm10k_for_each_ring(pos, head) \
178 for (pos = &(head).ring[(head).count]; (--pos) >= (head).ring;)
179
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180#define MAX_Q_VECTORS 256
181#define MIN_Q_VECTORS 1
182enum fm10k_non_q_vectors {
183 FM10K_MBX_VECTOR,
5cb8db4a 184#define NON_Q_VECTORS_VF NON_Q_VECTORS_PF
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185 NON_Q_VECTORS_PF
186};
187
188#define NON_Q_VECTORS(hw) (((hw)->mac.type == fm10k_mac_pf) ? \
189 NON_Q_VECTORS_PF : \
5cb8db4a 190 NON_Q_VECTORS_VF)
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191#define MIN_MSIX_COUNT(hw) (MIN_Q_VECTORS + NON_Q_VECTORS(hw))
192
193struct fm10k_q_vector {
194 struct fm10k_intfc *interface;
195 u32 __iomem *itr; /* pointer to ITR register for this vector */
196 u16 v_idx; /* index of q_vector within interface array */
197 struct fm10k_ring_container rx, tx;
198
199 struct napi_struct napi;
200 char name[IFNAMSIZ + 9];
201
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202#ifdef CONFIG_DEBUG_FS
203 struct dentry *dbg_q_vector;
204#endif /* CONFIG_DEBUG_FS */
18283cad 205 struct rcu_head rcu; /* to avoid race with update stats on free */
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206
207 /* for dynamic allocation of rings associated with this q_vector */
208 struct fm10k_ring ring[0] ____cacheline_internodealigned_in_smp;
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209};
210
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211enum fm10k_ring_f_enum {
212 RING_F_RSS,
213 RING_F_QOS,
214 RING_F_ARRAY_SIZE /* must be last in enum set */
215};
216
217struct fm10k_ring_feature {
218 u16 limit; /* upper limit on feature indices */
219 u16 indices; /* current value of indices */
220 u16 mask; /* Mask used for feature to ring mapping */
221 u16 offset; /* offset to start of feature */
222};
223
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224struct fm10k_iov_data {
225 unsigned int num_vfs;
226 unsigned int next_vf_mbx;
227 struct rcu_head rcu;
228 struct fm10k_vf_info vf_info[0];
229};
230
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231#define fm10k_vxlan_port_for_each(vp, intfc) \
232 list_for_each_entry(vp, &(intfc)->vxlan_port, list)
233struct fm10k_vxlan_port {
234 struct list_head list;
235 sa_family_t sa_family;
236 __be16 port;
237};
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238
239struct fm10k_intfc {
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240 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
241 struct net_device *netdev;
5cd5e2e9 242 struct fm10k_l2_accel *l2_accel; /* pointer to L2 acceleration list */
04a5aefb 243 struct pci_dev *pdev;
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244 unsigned long state;
245
246 u32 flags;
247#define FM10K_FLAG_RESET_REQUESTED (u32)(1 << 0)
248#define FM10K_FLAG_RSS_FIELD_IPV4_UDP (u32)(1 << 1)
249#define FM10K_FLAG_RSS_FIELD_IPV6_UDP (u32)(1 << 2)
250#define FM10K_FLAG_RX_TS_ENABLED (u32)(1 << 3)
251#define FM10K_FLAG_SWPRI_CONFIG (u32)(1 << 4)
252 int xcast_mode;
253
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254 /* Tx fast path data */
255 int num_tx_queues;
256 u16 tx_itr;
257
258 /* Rx fast path data */
259 int num_rx_queues;
260 u16 rx_itr;
261
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262 /* TX */
263 struct fm10k_ring *tx_ring[MAX_QUEUES] ____cacheline_aligned_in_smp;
264
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265 u64 restart_queue;
266 u64 tx_busy;
267 u64 tx_csum_errors;
268 u64 alloc_failed;
269 u64 rx_csum_errors;
270 u64 rx_errors;
271
272 u64 tx_bytes_nic;
273 u64 tx_packets_nic;
274 u64 rx_bytes_nic;
275 u64 rx_packets_nic;
276 u64 rx_drops_nic;
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277 u64 rx_overrun_pf;
278 u64 rx_overrun_vf;
b7d8514c 279 u32 tx_timeout_count;
04a5aefb 280
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281 /* RX */
282 struct fm10k_ring *rx_ring[MAX_QUEUES];
283
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284 /* Queueing vectors */
285 struct fm10k_q_vector *q_vector[MAX_Q_VECTORS];
286 struct msix_entry *msix_entries;
287 int num_q_vectors; /* current number of q_vectors for device */
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288 struct fm10k_ring_feature ring_feature[RING_F_ARRAY_SIZE];
289
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290 /* SR-IOV information management structure */
291 struct fm10k_iov_data *iov_data;
292
0e7b3644 293 struct fm10k_hw_stats stats;
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294 struct fm10k_hw hw;
295 u32 __iomem *uc_addr;
0e7b3644 296 u16 msg_enable;
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297 u16 tx_ring_count;
298 u16 rx_ring_count;
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299 struct timer_list service_timer;
300 struct work_struct service_task;
301 unsigned long next_stats_update;
302 unsigned long next_tx_hang_check;
303 unsigned long last_reset;
304 unsigned long link_down_event;
305 bool host_ready;
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306
307 u32 reta[FM10K_RETA_SIZE];
308 u32 rssrk[FM10K_RSSRK_SIZE];
309
310 /* VXLAN port tracking information */
311 struct list_head vxlan_port;
312
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313#ifdef CONFIG_DEBUG_FS
314 struct dentry *dbg_intfc;
315
316#endif /* CONFIG_DEBUG_FS */
9f801abc 317#ifdef CONFIG_DCB
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318 u8 pfc_en;
319#endif
320 u8 rx_pause;
321
322 /* GLORT resources in use by PF */
323 u16 glort;
324 u16 glort_count;
325
326 /* VLAN ID for updating multicast/unicast lists */
327 u16 vid;
328};
329
330enum fm10k_state_t {
331 __FM10K_RESETTING,
332 __FM10K_DOWN,
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333 __FM10K_SERVICE_SCHED,
334 __FM10K_SERVICE_DISABLE,
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335 __FM10K_MBX_LOCK,
336 __FM10K_LINK_DOWN,
04a5aefb 337};
b3890e30 338
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339static inline void fm10k_mbx_lock(struct fm10k_intfc *interface)
340{
341 /* busy loop if we cannot obtain the lock as some calls
342 * such as ndo_set_rx_mode may be made in atomic context
343 */
344 while (test_and_set_bit(__FM10K_MBX_LOCK, &interface->state))
345 udelay(20);
346}
347
348static inline void fm10k_mbx_unlock(struct fm10k_intfc *interface)
349{
350 /* flush memory to make sure state is correct */
351 smp_mb__before_atomic();
352 clear_bit(__FM10K_MBX_LOCK, &interface->state);
353}
354
355static inline int fm10k_mbx_trylock(struct fm10k_intfc *interface)
356{
357 return !test_and_set_bit(__FM10K_MBX_LOCK, &interface->state);
358}
359
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360/* fm10k_test_staterr - test bits in Rx descriptor status and error fields */
361static inline __le32 fm10k_test_staterr(union fm10k_rx_desc *rx_desc,
362 const u32 stat_err_bits)
363{
364 return rx_desc->d.staterr & cpu_to_le32(stat_err_bits);
365}
366
367/* fm10k_desc_unused - calculate if we have unused descriptors */
368static inline u16 fm10k_desc_unused(struct fm10k_ring *ring)
369{
370 s16 unused = ring->next_to_clean - ring->next_to_use - 1;
371
372 return likely(unused < 0) ? unused + ring->count : unused;
373}
374
375#define FM10K_TX_DESC(R, i) \
376 (&(((struct fm10k_tx_desc *)((R)->desc))[i]))
377#define FM10K_RX_DESC(R, i) \
378 (&(((union fm10k_rx_desc *)((R)->desc))[i]))
379
380#define FM10K_MAX_TXD_PWR 14
381#define FM10K_MAX_DATA_PER_TXD (1 << FM10K_MAX_TXD_PWR)
382
383/* Tx Descriptors needed, worst case */
384#define TXD_USE_COUNT(S) DIV_ROUND_UP((S), FM10K_MAX_DATA_PER_TXD)
385#define DESC_NEEDED (MAX_SKB_FRAGS + 4)
386
387enum fm10k_tx_flags {
388 /* Tx offload flags */
389 FM10K_TX_FLAGS_CSUM = 0x01,
390};
391
392/* This structure is stored as little endian values as that is the native
393 * format of the Rx descriptor. The ordering of these fields is reversed
394 * from the actual ftag header to allow for a single bswap to take care
395 * of placing all of the values in network order
396 */
397union fm10k_ftag_info {
398 __le64 ftag;
399 struct {
400 /* dglort and sglort combined into a single 32bit desc read */
401 __le32 glort;
402 /* upper 16 bits of vlan are reserved 0 for swpri_type_user */
403 __le32 vlan;
404 } d;
405 struct {
406 __le16 dglort;
407 __le16 sglort;
408 __le16 vlan;
409 __le16 swpri_type_user;
410 } w;
411};
412
413struct fm10k_cb {
414 union fm10k_ftag_info fi;
415};
416
417#define FM10K_CB(skb) ((struct fm10k_cb *)(skb)->cb)
418
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419/* main */
420extern char fm10k_driver_name[];
421extern const char fm10k_driver_version[];
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422int fm10k_init_queueing_scheme(struct fm10k_intfc *interface);
423void fm10k_clear_queueing_scheme(struct fm10k_intfc *interface);
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424netdev_tx_t fm10k_xmit_frame_ring(struct sk_buff *skb,
425 struct fm10k_ring *tx_ring);
426void fm10k_tx_timeout_reset(struct fm10k_intfc *interface);
427bool fm10k_check_tx_hang(struct fm10k_ring *tx_ring);
428void fm10k_alloc_rx_buffers(struct fm10k_ring *rx_ring, u16 cleaned_count);
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429
430/* PCI */
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431void fm10k_mbx_free_irq(struct fm10k_intfc *);
432int fm10k_mbx_request_irq(struct fm10k_intfc *);
433void fm10k_qv_free_irq(struct fm10k_intfc *interface);
434int fm10k_qv_request_irq(struct fm10k_intfc *interface);
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435int fm10k_register_pci_driver(void);
436void fm10k_unregister_pci_driver(void);
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437void fm10k_up(struct fm10k_intfc *interface);
438void fm10k_down(struct fm10k_intfc *interface);
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439void fm10k_update_stats(struct fm10k_intfc *interface);
440void fm10k_service_event_schedule(struct fm10k_intfc *interface);
441void fm10k_update_rx_drop_en(struct fm10k_intfc *interface);
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442
443/* Netdev */
444struct net_device *fm10k_alloc_netdev(void);
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445int fm10k_setup_rx_resources(struct fm10k_ring *);
446int fm10k_setup_tx_resources(struct fm10k_ring *);
447void fm10k_free_rx_resources(struct fm10k_ring *);
448void fm10k_free_tx_resources(struct fm10k_ring *);
449void fm10k_clean_all_rx_rings(struct fm10k_intfc *);
450void fm10k_clean_all_tx_rings(struct fm10k_intfc *);
451void fm10k_unmap_and_free_tx_resource(struct fm10k_ring *,
452 struct fm10k_tx_buffer *);
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453void fm10k_restore_rx_state(struct fm10k_intfc *);
454void fm10k_reset_rx_state(struct fm10k_intfc *);
aa3ac822 455int fm10k_setup_tc(struct net_device *dev, u8 tc);
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456int fm10k_open(struct net_device *netdev);
457int fm10k_close(struct net_device *netdev);
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458
459/* Ethtool */
460void fm10k_set_ethtool_ops(struct net_device *dev);
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461
462/* IOV */
463s32 fm10k_iov_event(struct fm10k_intfc *interface);
464s32 fm10k_iov_mbx(struct fm10k_intfc *interface);
465void fm10k_iov_suspend(struct pci_dev *pdev);
466int fm10k_iov_resume(struct pci_dev *pdev);
467void fm10k_iov_disable(struct pci_dev *pdev);
468int fm10k_iov_configure(struct pci_dev *pdev, int num_vfs);
469s32 fm10k_iov_update_pvid(struct fm10k_intfc *interface, u16 glort, u16 pvid);
470int fm10k_ndo_set_vf_mac(struct net_device *netdev, int vf_idx, u8 *mac);
471int fm10k_ndo_set_vf_vlan(struct net_device *netdev,
472 int vf_idx, u16 vid, u8 qos);
473int fm10k_ndo_set_vf_bw(struct net_device *netdev, int vf_idx, int rate,
474 int unused);
475int fm10k_ndo_get_vf_config(struct net_device *netdev,
476 int vf_idx, struct ifla_vf_info *ivi);
9f801abc 477
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478/* DebugFS */
479#ifdef CONFIG_DEBUG_FS
480void fm10k_dbg_q_vector_init(struct fm10k_q_vector *q_vector);
481void fm10k_dbg_q_vector_exit(struct fm10k_q_vector *q_vector);
482void fm10k_dbg_intfc_init(struct fm10k_intfc *interface);
483void fm10k_dbg_intfc_exit(struct fm10k_intfc *interface);
484void fm10k_dbg_init(void);
485void fm10k_dbg_exit(void);
486#else
487static inline void fm10k_dbg_q_vector_init(struct fm10k_q_vector *q_vector) {}
488static inline void fm10k_dbg_q_vector_exit(struct fm10k_q_vector *q_vector) {}
489static inline void fm10k_dbg_intfc_init(struct fm10k_intfc *interface) {}
490static inline void fm10k_dbg_intfc_exit(struct fm10k_intfc *interface) {}
491static inline void fm10k_dbg_init(void) {}
492static inline void fm10k_dbg_exit(void) {}
493#endif /* CONFIG_DEBUG_FS */
494
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495/* DCB */
496void fm10k_dcbnl_set_ops(struct net_device *dev);
b3890e30 497#endif /* _FM10K_H_ */