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Merge tag 'asoc-v3.17-rc4' into asoc-linus
[mirror_ubuntu-artful-kernel.git] / drivers / net / ethernet / intel / i40e / i40e.h
CommitLineData
7daa6bf3
JB		 1/*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
dc641b73 4 * Copyright(c) 2013 - 2014 Intel Corporation.
7daa6bf3
JB		 5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
dc641b73
GR		 15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
7daa6bf3
JB		 17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27#ifndef _I40E_H_
28#define _I40E_H_
29
30#include <net/tcp.h>
8144f0f7 31#include <net/udp.h>
7daa6bf3
JB		 32#include <linux/types.h>
33#include <linux/errno.h>
34#include <linux/module.h>
35#include <linux/pci.h>
36#include <linux/aer.h>
37#include <linux/netdevice.h>
38#include <linux/ioport.h>
39#include <linux/slab.h>
40#include <linux/list.h>
41#include <linux/string.h>
42#include <linux/in.h>
43#include <linux/ip.h>
44#include <linux/tcp.h>
45#include <linux/sctp.h>
46#include <linux/pkt_sched.h>
47#include <linux/ipv6.h>
7daa6bf3
JB		 48#include <net/checksum.h>
49#include <net/ip6_checksum.h>
50#include <linux/ethtool.h>
51#include <linux/if_vlan.h>
beb0dff1
JK		 52#include <linux/clocksource.h>
53#include <linux/net_tstamp.h>
54#include <linux/ptp_clock_kernel.h>
7daa6bf3
JB		 55#include "i40e_type.h"
56#include "i40e_prototype.h"
38e00438
VD		 57#ifdef I40E_FCOE
58#include "i40e_fcoe.h"
59#endif
7daa6bf3
JB		 60#include "i40e_virtchnl.h"
61#include "i40e_virtchnl_pf.h"
62#include "i40e_txrx.h"
4e3b35b0 63#include "i40e_dcb.h"
7daa6bf3
JB		 64
65/* Useful i40e defaults */
66#define I40E_BASE_PF_SEID 16
67#define I40E_BASE_VSI_SEID 512
68#define I40E_BASE_VEB_SEID 288
69#define I40E_MAX_VEB 16
70
71#define I40E_MAX_NUM_DESCRIPTORS 4096
a45e88c9 72#define I40E_MAX_REGISTER 0x800000
7daa6bf3
JB		 73#define I40E_DEFAULT_NUM_DESCRIPTORS 512
74#define I40E_REQ_DESCRIPTOR_MULTIPLE 32
75#define I40E_MIN_NUM_DESCRIPTORS 64
76#define I40E_MIN_MSIX 2
77#define I40E_DEFAULT_NUM_VMDQ_VSI 8 /* max 256 VSIs */
505682cd 78#define I40E_MIN_VSI_ALLOC 51 /* LAN, ATR, FCOE, 32 VF, 16 VMDQ */
7daa6bf3
JB		 79#define I40E_DEFAULT_QUEUES_PER_VMDQ 2 /* max 16 qps */
80#define I40E_DEFAULT_QUEUES_PER_VF 4
81#define I40E_DEFAULT_QUEUES_PER_TC 1 /* should be a power of 2 */
4e3b35b0 82#define I40E_MAX_QUEUES_PER_TC 64 /* should be a power of 2 */
7daa6bf3
JB		 83#define I40E_FDIR_RING 0
84#define I40E_FDIR_RING_COUNT 32
38e00438
VD		 85#ifdef I40E_FCOE
86#define I40E_DEFAULT_FCOE 8 /* default number of QPs for FCoE */
87#define I40E_MINIMUM_FCOE 1 /* minimum number of QPs for FCoE */
88#endif /* I40E_FCOE */
7daa6bf3
JB		 89#define I40E_MAX_AQ_BUF_SIZE 4096
90#define I40E_AQ_LEN 32
91#define I40E_AQ_WORK_LIMIT 16
92#define I40E_MAX_USER_PRIORITY 8
93#define I40E_DEFAULT_MSG_ENABLE 4
23527308 94#define I40E_QUEUE_WAIT_RETRY_LIMIT 10
7daa6bf3
JB		 95
96#define I40E_NVM_VERSION_LO_SHIFT 0
fe310704 97#define I40E_NVM_VERSION_LO_MASK (0xff << I40E_NVM_VERSION_LO_SHIFT)
ff80301e
JB		 98#define I40E_NVM_VERSION_HI_SHIFT 12
99#define I40E_NVM_VERSION_HI_MASK (0xf << I40E_NVM_VERSION_HI_SHIFT)
fe310704
AS		 100
101/* The values in here are decimal coded as hex as is the case in the NVM map*/
102#define I40E_CURRENT_NVM_VERSION_HI 0x2
ff80301e 103#define I40E_CURRENT_NVM_VERSION_LO 0x40
fe310704 104
7daa6bf3
JB		 105/* magic for getting defines into strings */
106#define STRINGIFY(foo) #foo
107#define XSTRINGIFY(bar) STRINGIFY(bar)
108
7daa6bf3
JB		 109#define I40E_RX_DESC(R, i) \
110 ((ring_is_16byte_desc_enabled(R)) \
111 ? (union i40e_32byte_rx_desc *) \
112 (&(((union i40e_16byte_rx_desc *)((R)->desc))[i])) \
113 : (&(((union i40e_32byte_rx_desc *)((R)->desc))[i])))
114#define I40E_TX_DESC(R, i) \
115 (&(((struct i40e_tx_desc *)((R)->desc))[i]))
116#define I40E_TX_CTXTDESC(R, i) \
117 (&(((struct i40e_tx_context_desc *)((R)->desc))[i]))
118#define I40E_TX_FDIRDESC(R, i) \
119 (&(((struct i40e_filter_program_desc *)((R)->desc))[i]))
120
121/* default to trying for four seconds */
122#define I40E_TRY_LINK_TIMEOUT (4 * HZ)
123
124/* driver state flags */
125enum i40e_state_t {
126 __I40E_TESTING,
127 __I40E_CONFIG_BUSY,
128 __I40E_CONFIG_DONE,
129 __I40E_DOWN,
130 __I40E_NEEDS_RESTART,
131 __I40E_SERVICE_SCHED,
132 __I40E_ADMINQ_EVENT_PENDING,
133 __I40E_MDD_EVENT_PENDING,
134 __I40E_VFLR_EVENT_PENDING,
135 __I40E_RESET_RECOVERY_PENDING,
136 __I40E_RESET_INTR_RECEIVED,
137 __I40E_REINIT_REQUESTED,
138 __I40E_PF_RESET_REQUESTED,
139 __I40E_CORE_RESET_REQUESTED,
140 __I40E_GLOBAL_RESET_REQUESTED,
7823fe34 141 __I40E_EMP_RESET_REQUESTED,
7daa6bf3 142 __I40E_FILTER_OVERFLOW_PROMISC,
9007bccd 143 __I40E_SUSPENDED,
9ce34f02 144 __I40E_PTP_TX_IN_PROGRESS,
4eb3f768 145 __I40E_BAD_EEPROM,
b5d06f05 146 __I40E_DOWN_REQUESTED,
7daa6bf3
JB		 147};
148
149enum i40e_interrupt_policy {
150 I40E_INTERRUPT_BEST_CASE,
151 I40E_INTERRUPT_MEDIUM,
152 I40E_INTERRUPT_LOWEST
153};
154
155struct i40e_lump_tracking {
156 u16 num_entries;
157 u16 search_hint;
158 u16 list[0];
159#define I40E_PILE_VALID_BIT 0x8000
160};
161
162#define I40E_DEFAULT_ATR_SAMPLE_RATE 20
55a5e60b
ASJ		 163#define I40E_FDIR_MAX_RAW_PACKET_SIZE 512
164#define I40E_FDIR_BUFFER_FULL_MARGIN 10
12957388 165#define I40E_FDIR_BUFFER_HEAD_ROOM 32
55a5e60b 166
433c47de
ASJ		 167enum i40e_fd_stat_idx {
168 I40E_FD_STAT_ATR,
169 I40E_FD_STAT_SB,
170 I40E_FD_STAT_PF_COUNT
171};
172#define I40E_FD_STAT_PF_IDX(pf_id) ((pf_id) * I40E_FD_STAT_PF_COUNT)
173#define I40E_FD_ATR_STAT_IDX(pf_id) \
174 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_ATR)
175#define I40E_FD_SB_STAT_IDX(pf_id) \
176 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_SB)
177
17a73f6b
JG		 178struct i40e_fdir_filter {
179 struct hlist_node fdir_node;
180 /* filter ipnut set */
181 u8 flow_type;
182 u8 ip4_proto;
04b73bd7 183 /* TX packet view of src and dst */
17a73f6b
JG		 184 __be32 dst_ip[4];
185 __be32 src_ip[4];
186 __be16 src_port;
187 __be16 dst_port;
188 __be32 sctp_v_tag;
189 /* filter control */
7daa6bf3
JB		 190 u16 q_index;
191 u8 flex_off;
192 u8 pctype;
193 u16 dest_vsi;
194 u8 dest_ctl;
195 u8 fd_status;
196 u16 cnt_index;
197 u32 fd_id;
7daa6bf3
JB		 198};
199
4e3b35b0
NP		 200#define I40E_ETH_P_LLDP 0x88cc
201
7daa6bf3
JB		 202#define I40E_DCB_PRIO_TYPE_STRICT 0
203#define I40E_DCB_PRIO_TYPE_ETS 1
204#define I40E_DCB_STRICT_PRIO_CREDITS 127
205#define I40E_MAX_USER_PRIORITY 8
206/* DCB per TC information data structure */
207struct i40e_tc_info {
208 u16 qoffset; /* Queue offset from base queue */
209 u16 qcount; /* Total Queues */
210 u8 netdev_tc; /* Netdev TC index if netdev associated */
211};
212
213/* TC configuration data structure */
214struct i40e_tc_configuration {
215 u8 numtc; /* Total number of enabled TCs */
216 u8 enabled_tc; /* TC map */
217 struct i40e_tc_info tc_info[I40E_MAX_TRAFFIC_CLASS];
218};
219
220/* struct that defines the Ethernet device */
221struct i40e_pf {
222 struct pci_dev *pdev;
223 struct i40e_hw hw;
224 unsigned long state;
225 unsigned long link_check_timeout;
226 struct msix_entry *msix_entries;
7daa6bf3
JB		 227 bool fc_autoneg_status;
228
229 u16 eeprom_version;
6c167f58 230 u16 num_vmdq_vsis; /* num vmdq vsis this pf has set up */
7daa6bf3
JB		 231 u16 num_vmdq_qps; /* num queue pairs per vmdq pool */
232 u16 num_vmdq_msix; /* num queue vectors per vmdq pool */
233 u16 num_req_vfs; /* num vfs requested for this vf */
234 u16 num_vf_qps; /* num queue pairs per vf */
38e00438
VD		 235#ifdef I40E_FCOE
236 u16 num_fcoe_qps; /* num fcoe queues this pf has set up */
237 u16 num_fcoe_msix; /* num queue vectors per fcoe pool */
238#endif /* I40E_FCOE */
7daa6bf3
JB		 239 u16 num_lan_qps; /* num lan queues this pf has set up */
240 u16 num_lan_msix; /* num queue vectors for the base pf vsi */
f8ff1464 241 int queues_left; /* queues left unclaimed */
7daa6bf3
JB		 242 u16 rss_size; /* num queues in the RSS array */
243 u16 rss_size_max; /* HW defined max RSS queues */
244 u16 fdir_pf_filter_count; /* num of guaranteed filters for this PF */
505682cd 245 u16 num_alloc_vsi; /* num VSIs this driver supports */
7daa6bf3 246 u8 atr_sample_rate;
8e2773ae 247 bool wol_en;
7daa6bf3 248
17a73f6b
JG		 249 struct hlist_head fdir_filter_list;
250 u16 fdir_pf_active_filters;
433c47de
ASJ		 251 u16 fd_sb_cnt_idx;
252 u16 fd_atr_cnt_idx;
17a73f6b 253
a1c9a9d9
JK		 254#ifdef CONFIG_I40E_VXLAN
255 __be16 vxlan_ports[I40E_MAX_PF_UDP_OFFLOAD_PORTS];
256 u16 pending_vxlan_bitmap;
257
258#endif
7daa6bf3
JB		 259 enum i40e_interrupt_policy int_policy;
260 u16 rx_itr_default;
261 u16 tx_itr_default;
262 u16 msg_enable;
263 char misc_int_name[IFNAMSIZ + 9];
264 u16 adminq_work_limit; /* num of admin receive queue desc to process */
265 int service_timer_period;
266 struct timer_list service_timer;
267 struct work_struct service_task;
268
269 u64 flags;
270#define I40E_FLAG_RX_CSUM_ENABLED (u64)(1 << 1)
271#define I40E_FLAG_MSI_ENABLED (u64)(1 << 2)
272#define I40E_FLAG_MSIX_ENABLED (u64)(1 << 3)
273#define I40E_FLAG_RX_1BUF_ENABLED (u64)(1 << 4)
274#define I40E_FLAG_RX_PS_ENABLED (u64)(1 << 5)
275#define I40E_FLAG_RSS_ENABLED (u64)(1 << 6)
9f52987b
NP		 276#define I40E_FLAG_VMDQ_ENABLED (u64)(1 << 7)
277#define I40E_FLAG_FDIR_REQUIRES_REINIT (u64)(1 << 8)
278#define I40E_FLAG_NEED_LINK_UPDATE (u64)(1 << 9)
38e00438
VD		 279#ifdef I40E_FCOE
280#define I40E_FLAG_FCOE_ENABLED (u64)(1 << 11)
281#endif /* I40E_FCOE */
9f52987b
NP		 282#define I40E_FLAG_IN_NETPOLL (u64)(1 << 12)
283#define I40E_FLAG_16BYTE_RX_DESC_ENABLED (u64)(1 << 13)
284#define I40E_FLAG_CLEAN_ADMINQ (u64)(1 << 14)
285#define I40E_FLAG_FILTER_SYNC (u64)(1 << 15)
286#define I40E_FLAG_PROCESS_MDD_EVENT (u64)(1 << 17)
287#define I40E_FLAG_PROCESS_VFLR_EVENT (u64)(1 << 18)
288#define I40E_FLAG_SRIOV_ENABLED (u64)(1 << 19)
289#define I40E_FLAG_DCB_ENABLED (u64)(1 << 20)
60ea5f83
JB		 290#define I40E_FLAG_FD_SB_ENABLED (u64)(1 << 21)
291#define I40E_FLAG_FD_ATR_ENABLED (u64)(1 << 22)
beb0dff1 292#define I40E_FLAG_PTP (u64)(1 << 25)
a1c9a9d9
JK		 293#define I40E_FLAG_MFP_ENABLED (u64)(1 << 26)
294#ifdef CONFIG_I40E_VXLAN
295#define I40E_FLAG_VXLAN_FILTER_SYNC (u64)(1 << 27)
296#endif
1f224ad2 297#define I40E_FLAG_PORT_ID_VALID (u64)(1 << 28)
4d9b6043 298#define I40E_FLAG_DCB_CAPABLE (u64)(1 << 29)
7daa6bf3 299
61dade7e
ASJ		 300 /* tracks features that get auto disabled by errors */
301 u64 auto_disable_flags;
302
38e00438
VD		 303#ifdef I40E_FCOE
304 struct i40e_fcoe fcoe;
305
306#endif /* I40E_FCOE */
7daa6bf3
JB		 307 bool stat_offsets_loaded;
308 struct i40e_hw_port_stats stats;
309 struct i40e_hw_port_stats stats_offsets;
310 u32 tx_timeout_count;
311 u32 tx_timeout_recovery_level;
312 unsigned long tx_timeout_last_recovery;
313 u32 hw_csum_rx_error;
314 u32 led_status;
315 u16 corer_count; /* Core reset count */
316 u16 globr_count; /* Global reset count */
317 u16 empr_count; /* EMP reset count */
318 u16 pfr_count; /* PF reset count */
cd92e72f 319 u16 sw_int_count; /* SW interrupt count */
7daa6bf3
JB		 320
321 struct mutex switch_mutex;
322 u16 lan_vsi; /* our default LAN VSI */
323 u16 lan_veb; /* initial relay, if exists */
324#define I40E_NO_VEB 0xffff
325#define I40E_NO_VSI 0xffff
326 u16 next_vsi; /* Next unallocated VSI - 0-based! */
327 struct i40e_vsi **vsi;
328 struct i40e_veb *veb[I40E_MAX_VEB];
329
330 struct i40e_lump_tracking *qp_pile;
331 struct i40e_lump_tracking *irq_pile;
332
333 /* switch config info */
334 u16 pf_seid;
335 u16 main_vsi_seid;
336 u16 mac_seid;
7daa6bf3
JB		 337 struct kobject *switch_kobj;
338#ifdef CONFIG_DEBUG_FS
339 struct dentry *i40e_dbg_pf;
340#endif /* CONFIG_DEBUG_FS */
341
93cd765b
ASJ		 342 u16 instance; /* A unique number per i40e_pf instance in the system */
343
7daa6bf3
JB		 344 /* sr-iov config info */
345 struct i40e_vf *vf;
346 int num_alloc_vfs; /* actual number of VFs allocated */
347 u32 vf_aq_requests;
348
349 /* DCBx/DCBNL capability for PF that indicates
350 * whether DCBx is managed by firmware or host
351 * based agent (LLDPAD). Also, indicates what
352 * flavor of DCBx protocol (IEEE/CEE) is supported
353 * by the device. For now we're supporting IEEE
354 * mode only.
355 */
356 u16 dcbx_cap;
357
358 u32 fcoe_hmc_filt_num;
359 u32 fcoe_hmc_cntx_num;
360 struct i40e_filter_control_settings filter_settings;
beb0dff1
JK		 361
362 struct ptp_clock *ptp_clock;
363 struct ptp_clock_info ptp_caps;
364 struct sk_buff *ptp_tx_skb;
beb0dff1 365 struct hwtstamp_config tstamp_config;
beb0dff1
JK		 366 unsigned long last_rx_ptp_check;
367 spinlock_t tmreg_lock; /* Used to protect the device time registers. */
368 u64 ptp_base_adj;
369 u32 tx_hwtstamp_timeouts;
370 u32 rx_hwtstamp_cleared;
371 bool ptp_tx;
372 bool ptp_rx;
e157ea30 373 u16 rss_table_size;
7daa6bf3
JB		 374};
375
376struct i40e_mac_filter {
377 struct list_head list;
378 u8 macaddr[ETH_ALEN];
379#define I40E_VLAN_ANY -1
380 s16 vlan;
381 u8 counter; /* number of instances of this filter */
382 bool is_vf; /* filter belongs to a VF */
383 bool is_netdev; /* filter belongs to a netdev */
384 bool changed; /* filter needs to be sync'd to the HW */
6252c7e4 385 bool is_laa; /* filter is a Locally Administered Address */
7daa6bf3
JB		 386};
387
388struct i40e_veb {
389 struct i40e_pf *pf;
390 u16 idx;
391 u16 veb_idx; /* index of VEB parent */
392 u16 seid;
393 u16 uplink_seid;
394 u16 stats_idx; /* index of VEB parent */
395 u8 enabled_tc;
396 u16 flags;
397 u16 bw_limit;
398 u8 bw_max_quanta;
399 bool is_abs_credits;
400 u8 bw_tc_share_credits[I40E_MAX_TRAFFIC_CLASS];
401 u16 bw_tc_limit_credits[I40E_MAX_TRAFFIC_CLASS];
402 u8 bw_tc_max_quanta[I40E_MAX_TRAFFIC_CLASS];
403 struct kobject *kobj;
404 bool stat_offsets_loaded;
405 struct i40e_eth_stats stats;
406 struct i40e_eth_stats stats_offsets;
407};
408
409/* struct that defines a VSI, associated with a dev */
410struct i40e_vsi {
411 struct net_device *netdev;
412 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
413 bool netdev_registered;
414 bool stat_offsets_loaded;
415
416 u32 current_netdev_flags;
417 unsigned long state;
418#define I40E_VSI_FLAG_FILTER_CHANGED (1<<0)
419#define I40E_VSI_FLAG_VEB_OWNER (1<<1)
420 unsigned long flags;
421
422 struct list_head mac_filter_list;
423
424 /* VSI stats */
425 struct rtnl_link_stats64 net_stats;
426 struct rtnl_link_stats64 net_stats_offsets;
427 struct i40e_eth_stats eth_stats;
428 struct i40e_eth_stats eth_stats_offsets;
38e00438
VD		 429#ifdef I40E_FCOE
430 struct i40e_fcoe_stats fcoe_stats;
431 struct i40e_fcoe_stats fcoe_stats_offsets;
432 bool fcoe_stat_offsets_loaded;
433#endif
7daa6bf3
JB		 434 u32 tx_restart;
435 u32 tx_busy;
436 u32 rx_buf_failed;
437 u32 rx_page_failed;
438
9f65e15b
AD		 439 /* These are containers of ring pointers, allocated at run-time */
440 struct i40e_ring **rx_rings;
441 struct i40e_ring **tx_rings;
7daa6bf3
JB		 442
443 u16 work_limit;
444 /* high bit set means dynamic, use accessor routines to read/write.
445 * hardware only supports 2us resolution for the ITR registers.
446 * these values always store the USER setting, and must be converted
447 * before programming to a register.
448 */
449 u16 rx_itr_setting;
450 u16 tx_itr_setting;
451
452 u16 max_frame;
453 u16 rx_hdr_len;
454 u16 rx_buf_len;
455 u8 dtype;
456
457 /* List of q_vectors allocated to this VSI */
493fb300 458 struct i40e_q_vector **q_vectors;
7daa6bf3
JB		 459 int num_q_vectors;
460 int base_vector;
63741846 461 bool irqs_ready;
7daa6bf3
JB		 462
463 u16 seid; /* HW index of this VSI (absolute index) */
464 u16 id; /* VSI number */
465 u16 uplink_seid;
466
467 u16 base_queue; /* vsi's first queue in hw array */
468 u16 alloc_queue_pairs; /* Allocated Tx/Rx queues */
469 u16 num_queue_pairs; /* Used tx and rx pairs */
470 u16 num_desc;
471 enum i40e_vsi_type type; /* VSI type, e.g., LAN, FCoE, etc */
472 u16 vf_id; /* Virtual function ID for SRIOV VSIs */
473
474 struct i40e_tc_configuration tc_config;
475 struct i40e_aqc_vsi_properties_data info;
476
477 /* VSI BW limit (absolute across all TCs) */
478 u16 bw_limit; /* VSI BW Limit (0 = disabled) */
479 u8 bw_max_quanta; /* Max Quanta when BW limit is enabled */
480
481 /* Relative TC credits across VSIs */
482 u8 bw_ets_share_credits[I40E_MAX_TRAFFIC_CLASS];
483 /* TC BW limit credits within VSI */
484 u16 bw_ets_limit_credits[I40E_MAX_TRAFFIC_CLASS];
485 /* TC BW limit max quanta within VSI */
486 u8 bw_ets_max_quanta[I40E_MAX_TRAFFIC_CLASS];
487
488 struct i40e_pf *back; /* Backreference to associated PF */
489 u16 idx; /* index in pf->vsi[] */
490 u16 veb_idx; /* index of VEB parent */
491 struct kobject *kobj; /* sysfs object */
492
493 /* VSI specific handlers */
494 irqreturn_t (*irq_handler)(int irq, void *data);
495} ____cacheline_internodealigned_in_smp;
496
497struct i40e_netdev_priv {
498 struct i40e_vsi *vsi;
499};
500
501/* struct that defines an interrupt vector */
502struct i40e_q_vector {
503 struct i40e_vsi *vsi;
504
505 u16 v_idx; /* index in the vsi->q_vector array. */
506 u16 reg_idx; /* register index of the interrupt */
507
508 struct napi_struct napi;
509
510 struct i40e_ring_container rx;
511 struct i40e_ring_container tx;
512
513 u8 num_ringpairs; /* total number of ring pairs in vector */
514
7daa6bf3 515 cpumask_t affinity_mask;
493fb300
AD		 516 struct rcu_head rcu; /* to avoid race with update stats on free */
517 char name[IFNAMSIZ + 9];
7daa6bf3
JB		 518} ____cacheline_internodealigned_in_smp;
519
520/* lan device */
521struct i40e_device {
522 struct list_head list;
523 struct i40e_pf *pf;
524};
525
526/**
527 * i40e_fw_version_str - format the FW and NVM version strings
528 * @hw: ptr to the hardware info
529 **/
530static inline char *i40e_fw_version_str(struct i40e_hw *hw)
531{
532 static char buf[32];
533
534 snprintf(buf, sizeof(buf),
fe310704 535 "f%d.%d a%d.%d n%02x.%02x e%08x",
7daa6bf3
JB		 536 hw->aq.fw_maj_ver, hw->aq.fw_min_ver,
537 hw->aq.api_maj_ver, hw->aq.api_min_ver,
ff80301e
JB		 538 (hw->nvm.version & I40E_NVM_VERSION_HI_MASK) >>
539 I40E_NVM_VERSION_HI_SHIFT,
540 (hw->nvm.version & I40E_NVM_VERSION_LO_MASK) >>
541 I40E_NVM_VERSION_LO_SHIFT,
7daa6bf3
JB		 542 hw->nvm.eetrack);
543
544 return buf;
545}
546
547/**
548 * i40e_netdev_to_pf: Retrieve the PF struct for given netdev
549 * @netdev: the corresponding netdev
550 *
551 * Return the PF struct for the given netdev
552 **/
553static inline struct i40e_pf *i40e_netdev_to_pf(struct net_device *netdev)
554{
555 struct i40e_netdev_priv *np = netdev_priv(netdev);
556 struct i40e_vsi *vsi = np->vsi;
557
558 return vsi->back;
559}
560
561static inline void i40e_vsi_setup_irqhandler(struct i40e_vsi *vsi,
562 irqreturn_t (*irq_handler)(int, void *))
563{
564 vsi->irq_handler = irq_handler;
565}
566
567/**
568 * i40e_rx_is_programming_status - check for programming status descriptor
569 * @qw: the first quad word of the program status descriptor
570 *
571 * The value of in the descriptor length field indicate if this
572 * is a programming status descriptor for flow director or FCoE
573 * by the value of I40E_RX_PROG_STATUS_DESC_LENGTH, otherwise
574 * it is a packet descriptor.
575 **/
576static inline bool i40e_rx_is_programming_status(u64 qw)
577{
578 return I40E_RX_PROG_STATUS_DESC_LENGTH ==
579 (qw >> I40E_RX_PROG_STATUS_DESC_LENGTH_SHIFT);
580}
581
082def10
ASJ		 582/**
583 * i40e_get_fd_cnt_all - get the total FD filter space available
584 * @pf: pointer to the pf struct
585 **/
586static inline int i40e_get_fd_cnt_all(struct i40e_pf *pf)
587{
588 return pf->hw.fdir_shared_filter_count + pf->fdir_pf_filter_count;
589}
590
7daa6bf3
JB		 591/* needed by i40e_ethtool.c */
592int i40e_up(struct i40e_vsi *vsi);
593void i40e_down(struct i40e_vsi *vsi);
594extern const char i40e_driver_name[];
595extern const char i40e_driver_version_str[];
23326186 596void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags);
7daa6bf3
JB		 597void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags);
598void i40e_update_stats(struct i40e_vsi *vsi);
599void i40e_update_eth_stats(struct i40e_vsi *vsi);
600struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi);
601int i40e_fetch_switch_configuration(struct i40e_pf *pf,
602 bool printconfig);
603
17a73f6b 604int i40e_program_fdir_filter(struct i40e_fdir_filter *fdir_data, u8 *raw_packet,
7daa6bf3 605 struct i40e_pf *pf, bool add);
17a73f6b
JG		 606int i40e_add_del_fdir(struct i40e_vsi *vsi,
607 struct i40e_fdir_filter *input, bool add);
55a5e60b
ASJ		 608void i40e_fdir_check_and_reenable(struct i40e_pf *pf);
609int i40e_get_current_fd_count(struct i40e_pf *pf);
12957388 610int i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf);
7c3c288b 611bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features);
7daa6bf3
JB		 612void i40e_set_ethtool_ops(struct net_device *netdev);
613struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
614 u8 *macaddr, s16 vlan,
615 bool is_vf, bool is_netdev);
616void i40e_del_filter(struct i40e_vsi *vsi, u8 *macaddr, s16 vlan,
617 bool is_vf, bool is_netdev);
618int i40e_sync_vsi_filters(struct i40e_vsi *vsi);
619struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
620 u16 uplink, u32 param1);
621int i40e_vsi_release(struct i40e_vsi *vsi);
622struct i40e_vsi *i40e_vsi_lookup(struct i40e_pf *pf, enum i40e_vsi_type type,
623 struct i40e_vsi *start_vsi);
38e00438
VD		 624#ifdef I40E_FCOE
625void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
626 struct i40e_vsi_context *ctxt,
627 u8 enabled_tc, bool is_add);
628#endif
fc18eaa0 629int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool enable);
f8ff1464 630int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count);
7daa6bf3
JB		 631struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags, u16 uplink_seid,
632 u16 downlink_seid, u8 enabled_tc);
633void i40e_veb_release(struct i40e_veb *veb);
634
4e3b35b0 635int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc);
7daa6bf3
JB		 636i40e_status i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid);
637void i40e_vsi_remove_pvid(struct i40e_vsi *vsi);
638void i40e_vsi_reset_stats(struct i40e_vsi *vsi);
639void i40e_pf_reset_stats(struct i40e_pf *pf);
640#ifdef CONFIG_DEBUG_FS
641void i40e_dbg_pf_init(struct i40e_pf *pf);
642void i40e_dbg_pf_exit(struct i40e_pf *pf);
643void i40e_dbg_init(void);
644void i40e_dbg_exit(void);
645#else
646static inline void i40e_dbg_pf_init(struct i40e_pf *pf) {}
647static inline void i40e_dbg_pf_exit(struct i40e_pf *pf) {}
648static inline void i40e_dbg_init(void) {}
649static inline void i40e_dbg_exit(void) {}
650#endif /* CONFIG_DEBUG_FS*/
651void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector);
5c2cebda 652void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector);
2ef28cfb 653void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf);
116a57d4 654void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf);
38e00438
VD		 655#ifdef I40E_FCOE
656struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
657 struct net_device *netdev,
658 struct rtnl_link_stats64 *storage);
659int i40e_set_mac(struct net_device *netdev, void *p);
660void i40e_set_rx_mode(struct net_device *netdev);
661#endif
7daa6bf3 662int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
38e00438
VD		 663#ifdef I40E_FCOE
664void i40e_tx_timeout(struct net_device *netdev);
665int i40e_vlan_rx_add_vid(struct net_device *netdev,
666 __always_unused __be16 proto, u16 vid);
667int i40e_vlan_rx_kill_vid(struct net_device *netdev,
668 __always_unused __be16 proto, u16 vid);
669#endif
6c167f58 670int i40e_vsi_open(struct i40e_vsi *vsi);
7daa6bf3
JB		 671void i40e_vlan_stripping_disable(struct i40e_vsi *vsi);
672int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid);
673int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid);
674struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
675 bool is_vf, bool is_netdev);
676bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi);
677struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
678 bool is_vf, bool is_netdev);
38e00438
VD		 679#ifdef I40E_FCOE
680int i40e_open(struct net_device *netdev);
681int i40e_close(struct net_device *netdev);
682int i40e_setup_tc(struct net_device *netdev, u8 tc);
683void i40e_netpoll(struct net_device *netdev);
684int i40e_fcoe_enable(struct net_device *netdev);
685int i40e_fcoe_disable(struct net_device *netdev);
686int i40e_fcoe_vsi_init(struct i40e_vsi *vsi, struct i40e_vsi_context *ctxt);
687u8 i40e_get_fcoe_tc_map(struct i40e_pf *pf);
688void i40e_fcoe_config_netdev(struct net_device *netdev, struct i40e_vsi *vsi);
689void i40e_fcoe_vsi_setup(struct i40e_pf *pf);
690int i40e_init_pf_fcoe(struct i40e_pf *pf);
691int i40e_fcoe_setup_ddp_resources(struct i40e_vsi *vsi);
692void i40e_fcoe_free_ddp_resources(struct i40e_vsi *vsi);
693int i40e_fcoe_handle_offload(struct i40e_ring *rx_ring,
694 union i40e_rx_desc *rx_desc,
695 struct sk_buff *skb);
696void i40e_fcoe_handle_status(struct i40e_ring *rx_ring,
697 union i40e_rx_desc *rx_desc, u8 prog_id);
698#endif /* I40E_FCOE */
7daa6bf3 699void i40e_vlan_stripping_enable(struct i40e_vsi *vsi);
4e3b35b0
NP		 700#ifdef CONFIG_I40E_DCB
701void i40e_dcbnl_flush_apps(struct i40e_pf *pf,
702 struct i40e_dcbx_config *new_cfg);
703void i40e_dcbnl_set_all(struct i40e_vsi *vsi);
704void i40e_dcbnl_setup(struct i40e_vsi *vsi);
705bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
706 struct i40e_dcbx_config *old_cfg,
707 struct i40e_dcbx_config *new_cfg);
708#endif /* CONFIG_I40E_DCB */
beb0dff1
JK		 709void i40e_ptp_rx_hang(struct i40e_vsi *vsi);
710void i40e_ptp_tx_hwtstamp(struct i40e_pf *pf);
711void i40e_ptp_rx_hwtstamp(struct i40e_pf *pf, struct sk_buff *skb, u8 index);
712void i40e_ptp_set_increment(struct i40e_pf *pf);
713int i40e_ptp_set_ts_config(struct i40e_pf *pf, struct ifreq *ifr);
714int i40e_ptp_get_ts_config(struct i40e_pf *pf, struct ifreq *ifr);
715void i40e_ptp_init(struct i40e_pf *pf);
716void i40e_ptp_stop(struct i40e_pf *pf);
7daa6bf3 717#endif /* _I40E_H_ */
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