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7daa6bf3 JB |
1 | /******************************************************************************* |
2 | * | |
3 | * Intel Ethernet Controller XL710 Family Linux Driver | |
88eee9bc | 4 | * Copyright(c) 2013 - 2015 Intel Corporation. |
7daa6bf3 JB |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms and conditions of the GNU General Public License, | |
8 | * version 2, as published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope it will be useful, but WITHOUT | |
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
13 | * more details. | |
14 | * | |
dc641b73 GR |
15 | * You should have received a copy of the GNU General Public License along |
16 | * with this program. If not, see <http://www.gnu.org/licenses/>. | |
7daa6bf3 JB |
17 | * |
18 | * The full GNU General Public License is included in this distribution in | |
19 | * the file called "COPYING". | |
20 | * | |
21 | * Contact Information: | |
22 | * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | |
23 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
24 | * | |
25 | ******************************************************************************/ | |
26 | ||
27 | #ifndef _I40E_H_ | |
28 | #define _I40E_H_ | |
29 | ||
30 | #include <net/tcp.h> | |
8144f0f7 | 31 | #include <net/udp.h> |
7daa6bf3 JB |
32 | #include <linux/types.h> |
33 | #include <linux/errno.h> | |
34 | #include <linux/module.h> | |
35 | #include <linux/pci.h> | |
36 | #include <linux/aer.h> | |
37 | #include <linux/netdevice.h> | |
38 | #include <linux/ioport.h> | |
2bc7ee8a | 39 | #include <linux/iommu.h> |
7daa6bf3 JB |
40 | #include <linux/slab.h> |
41 | #include <linux/list.h> | |
42 | #include <linux/string.h> | |
43 | #include <linux/in.h> | |
44 | #include <linux/ip.h> | |
45 | #include <linux/tcp.h> | |
46 | #include <linux/sctp.h> | |
47 | #include <linux/pkt_sched.h> | |
48 | #include <linux/ipv6.h> | |
7daa6bf3 JB |
49 | #include <net/checksum.h> |
50 | #include <net/ip6_checksum.h> | |
51 | #include <linux/ethtool.h> | |
52 | #include <linux/if_vlan.h> | |
51616018 | 53 | #include <linux/if_bridge.h> |
beb0dff1 JK |
54 | #include <linux/clocksource.h> |
55 | #include <linux/net_tstamp.h> | |
56 | #include <linux/ptp_clock_kernel.h> | |
7daa6bf3 JB |
57 | #include "i40e_type.h" |
58 | #include "i40e_prototype.h" | |
38e00438 VD |
59 | #ifdef I40E_FCOE |
60 | #include "i40e_fcoe.h" | |
61 | #endif | |
7daa6bf3 JB |
62 | #include "i40e_virtchnl.h" |
63 | #include "i40e_virtchnl_pf.h" | |
64 | #include "i40e_txrx.h" | |
4e3b35b0 | 65 | #include "i40e_dcb.h" |
7daa6bf3 JB |
66 | |
67 | /* Useful i40e defaults */ | |
68 | #define I40E_BASE_PF_SEID 16 | |
69 | #define I40E_BASE_VSI_SEID 512 | |
70 | #define I40E_BASE_VEB_SEID 288 | |
71 | #define I40E_MAX_VEB 16 | |
72 | ||
73 | #define I40E_MAX_NUM_DESCRIPTORS 4096 | |
a45e88c9 | 74 | #define I40E_MAX_REGISTER 0x800000 |
7daa6bf3 JB |
75 | #define I40E_DEFAULT_NUM_DESCRIPTORS 512 |
76 | #define I40E_REQ_DESCRIPTOR_MULTIPLE 32 | |
77 | #define I40E_MIN_NUM_DESCRIPTORS 64 | |
78 | #define I40E_MIN_MSIX 2 | |
79 | #define I40E_DEFAULT_NUM_VMDQ_VSI 8 /* max 256 VSIs */ | |
505682cd | 80 | #define I40E_MIN_VSI_ALLOC 51 /* LAN, ATR, FCOE, 32 VF, 16 VMDQ */ |
7daa6bf3 JB |
81 | #define I40E_DEFAULT_QUEUES_PER_VMDQ 2 /* max 16 qps */ |
82 | #define I40E_DEFAULT_QUEUES_PER_VF 4 | |
83 | #define I40E_DEFAULT_QUEUES_PER_TC 1 /* should be a power of 2 */ | |
4e3b35b0 | 84 | #define I40E_MAX_QUEUES_PER_TC 64 /* should be a power of 2 */ |
7daa6bf3 JB |
85 | #define I40E_FDIR_RING 0 |
86 | #define I40E_FDIR_RING_COUNT 32 | |
38e00438 VD |
87 | #ifdef I40E_FCOE |
88 | #define I40E_DEFAULT_FCOE 8 /* default number of QPs for FCoE */ | |
89 | #define I40E_MINIMUM_FCOE 1 /* minimum number of QPs for FCoE */ | |
90 | #endif /* I40E_FCOE */ | |
7daa6bf3 | 91 | #define I40E_MAX_AQ_BUF_SIZE 4096 |
07574897 MW |
92 | #define I40E_AQ_LEN 256 |
93 | #define I40E_AQ_WORK_LIMIT 32 | |
7daa6bf3 JB |
94 | #define I40E_MAX_USER_PRIORITY 8 |
95 | #define I40E_DEFAULT_MSG_ENABLE 4 | |
23527308 | 96 | #define I40E_QUEUE_WAIT_RETRY_LIMIT 10 |
b294ac70 | 97 | #define I40E_INT_NAME_STR_LEN (IFNAMSIZ + 9) |
7daa6bf3 JB |
98 | |
99 | #define I40E_NVM_VERSION_LO_SHIFT 0 | |
fe310704 | 100 | #define I40E_NVM_VERSION_LO_MASK (0xff << I40E_NVM_VERSION_LO_SHIFT) |
ff80301e JB |
101 | #define I40E_NVM_VERSION_HI_SHIFT 12 |
102 | #define I40E_NVM_VERSION_HI_MASK (0xf << I40E_NVM_VERSION_HI_SHIFT) | |
fe310704 AS |
103 | |
104 | /* The values in here are decimal coded as hex as is the case in the NVM map*/ | |
105 | #define I40E_CURRENT_NVM_VERSION_HI 0x2 | |
ff80301e | 106 | #define I40E_CURRENT_NVM_VERSION_LO 0x40 |
fe310704 | 107 | |
7daa6bf3 JB |
108 | /* magic for getting defines into strings */ |
109 | #define STRINGIFY(foo) #foo | |
110 | #define XSTRINGIFY(bar) STRINGIFY(bar) | |
111 | ||
7daa6bf3 JB |
112 | #define I40E_RX_DESC(R, i) \ |
113 | ((ring_is_16byte_desc_enabled(R)) \ | |
114 | ? (union i40e_32byte_rx_desc *) \ | |
115 | (&(((union i40e_16byte_rx_desc *)((R)->desc))[i])) \ | |
116 | : (&(((union i40e_32byte_rx_desc *)((R)->desc))[i]))) | |
117 | #define I40E_TX_DESC(R, i) \ | |
118 | (&(((struct i40e_tx_desc *)((R)->desc))[i])) | |
119 | #define I40E_TX_CTXTDESC(R, i) \ | |
120 | (&(((struct i40e_tx_context_desc *)((R)->desc))[i])) | |
121 | #define I40E_TX_FDIRDESC(R, i) \ | |
122 | (&(((struct i40e_filter_program_desc *)((R)->desc))[i])) | |
123 | ||
124 | /* default to trying for four seconds */ | |
125 | #define I40E_TRY_LINK_TIMEOUT (4 * HZ) | |
126 | ||
127 | /* driver state flags */ | |
128 | enum i40e_state_t { | |
129 | __I40E_TESTING, | |
130 | __I40E_CONFIG_BUSY, | |
131 | __I40E_CONFIG_DONE, | |
132 | __I40E_DOWN, | |
133 | __I40E_NEEDS_RESTART, | |
134 | __I40E_SERVICE_SCHED, | |
135 | __I40E_ADMINQ_EVENT_PENDING, | |
136 | __I40E_MDD_EVENT_PENDING, | |
137 | __I40E_VFLR_EVENT_PENDING, | |
138 | __I40E_RESET_RECOVERY_PENDING, | |
139 | __I40E_RESET_INTR_RECEIVED, | |
140 | __I40E_REINIT_REQUESTED, | |
141 | __I40E_PF_RESET_REQUESTED, | |
142 | __I40E_CORE_RESET_REQUESTED, | |
143 | __I40E_GLOBAL_RESET_REQUESTED, | |
7823fe34 | 144 | __I40E_EMP_RESET_REQUESTED, |
9df42d1a | 145 | __I40E_EMP_RESET_INTR_RECEIVED, |
7daa6bf3 | 146 | __I40E_FILTER_OVERFLOW_PROMISC, |
9007bccd | 147 | __I40E_SUSPENDED, |
9ce34f02 | 148 | __I40E_PTP_TX_IN_PROGRESS, |
4eb3f768 | 149 | __I40E_BAD_EEPROM, |
b5d06f05 | 150 | __I40E_DOWN_REQUESTED, |
1e1be8f6 | 151 | __I40E_FD_FLUSH_REQUESTED, |
a316f651 | 152 | __I40E_RESET_FAILED, |
69129dc3 | 153 | __I40E_PORT_TX_SUSPENDED, |
3ba9bcb4 | 154 | __I40E_VF_DISABLE, |
7daa6bf3 JB |
155 | }; |
156 | ||
157 | enum i40e_interrupt_policy { | |
158 | I40E_INTERRUPT_BEST_CASE, | |
159 | I40E_INTERRUPT_MEDIUM, | |
160 | I40E_INTERRUPT_LOWEST | |
161 | }; | |
162 | ||
163 | struct i40e_lump_tracking { | |
164 | u16 num_entries; | |
165 | u16 search_hint; | |
166 | u16 list[0]; | |
167 | #define I40E_PILE_VALID_BIT 0x8000 | |
168 | }; | |
169 | ||
170 | #define I40E_DEFAULT_ATR_SAMPLE_RATE 20 | |
55a5e60b ASJ |
171 | #define I40E_FDIR_MAX_RAW_PACKET_SIZE 512 |
172 | #define I40E_FDIR_BUFFER_FULL_MARGIN 10 | |
12957388 | 173 | #define I40E_FDIR_BUFFER_HEAD_ROOM 32 |
55a5e60b | 174 | |
433c47de ASJ |
175 | enum i40e_fd_stat_idx { |
176 | I40E_FD_STAT_ATR, | |
177 | I40E_FD_STAT_SB, | |
178 | I40E_FD_STAT_PF_COUNT | |
179 | }; | |
180 | #define I40E_FD_STAT_PF_IDX(pf_id) ((pf_id) * I40E_FD_STAT_PF_COUNT) | |
181 | #define I40E_FD_ATR_STAT_IDX(pf_id) \ | |
182 | (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_ATR) | |
183 | #define I40E_FD_SB_STAT_IDX(pf_id) \ | |
184 | (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_SB) | |
185 | ||
17a73f6b JG |
186 | struct i40e_fdir_filter { |
187 | struct hlist_node fdir_node; | |
188 | /* filter ipnut set */ | |
189 | u8 flow_type; | |
190 | u8 ip4_proto; | |
04b73bd7 | 191 | /* TX packet view of src and dst */ |
17a73f6b JG |
192 | __be32 dst_ip[4]; |
193 | __be32 src_ip[4]; | |
194 | __be16 src_port; | |
195 | __be16 dst_port; | |
196 | __be32 sctp_v_tag; | |
197 | /* filter control */ | |
7daa6bf3 JB |
198 | u16 q_index; |
199 | u8 flex_off; | |
200 | u8 pctype; | |
201 | u16 dest_vsi; | |
202 | u8 dest_ctl; | |
203 | u8 fd_status; | |
204 | u16 cnt_index; | |
205 | u32 fd_id; | |
7daa6bf3 JB |
206 | }; |
207 | ||
4e3b35b0 NP |
208 | #define I40E_ETH_P_LLDP 0x88cc |
209 | ||
7daa6bf3 JB |
210 | #define I40E_DCB_PRIO_TYPE_STRICT 0 |
211 | #define I40E_DCB_PRIO_TYPE_ETS 1 | |
212 | #define I40E_DCB_STRICT_PRIO_CREDITS 127 | |
213 | #define I40E_MAX_USER_PRIORITY 8 | |
214 | /* DCB per TC information data structure */ | |
215 | struct i40e_tc_info { | |
216 | u16 qoffset; /* Queue offset from base queue */ | |
217 | u16 qcount; /* Total Queues */ | |
218 | u8 netdev_tc; /* Netdev TC index if netdev associated */ | |
219 | }; | |
220 | ||
221 | /* TC configuration data structure */ | |
222 | struct i40e_tc_configuration { | |
223 | u8 numtc; /* Total number of enabled TCs */ | |
224 | u8 enabled_tc; /* TC map */ | |
225 | struct i40e_tc_info tc_info[I40E_MAX_TRAFFIC_CLASS]; | |
226 | }; | |
227 | ||
228 | /* struct that defines the Ethernet device */ | |
229 | struct i40e_pf { | |
230 | struct pci_dev *pdev; | |
231 | struct i40e_hw hw; | |
232 | unsigned long state; | |
233 | unsigned long link_check_timeout; | |
234 | struct msix_entry *msix_entries; | |
7daa6bf3 JB |
235 | bool fc_autoneg_status; |
236 | ||
237 | u16 eeprom_version; | |
6c167f58 | 238 | u16 num_vmdq_vsis; /* num vmdq vsis this pf has set up */ |
7daa6bf3 JB |
239 | u16 num_vmdq_qps; /* num queue pairs per vmdq pool */ |
240 | u16 num_vmdq_msix; /* num queue vectors per vmdq pool */ | |
241 | u16 num_req_vfs; /* num vfs requested for this vf */ | |
242 | u16 num_vf_qps; /* num queue pairs per vf */ | |
38e00438 VD |
243 | #ifdef I40E_FCOE |
244 | u16 num_fcoe_qps; /* num fcoe queues this pf has set up */ | |
245 | u16 num_fcoe_msix; /* num queue vectors per fcoe pool */ | |
246 | #endif /* I40E_FCOE */ | |
7daa6bf3 JB |
247 | u16 num_lan_qps; /* num lan queues this pf has set up */ |
248 | u16 num_lan_msix; /* num queue vectors for the base pf vsi */ | |
f8ff1464 | 249 | int queues_left; /* queues left unclaimed */ |
7daa6bf3 JB |
250 | u16 rss_size; /* num queues in the RSS array */ |
251 | u16 rss_size_max; /* HW defined max RSS queues */ | |
252 | u16 fdir_pf_filter_count; /* num of guaranteed filters for this PF */ | |
505682cd | 253 | u16 num_alloc_vsi; /* num VSIs this driver supports */ |
7daa6bf3 | 254 | u8 atr_sample_rate; |
8e2773ae | 255 | bool wol_en; |
7daa6bf3 | 256 | |
17a73f6b JG |
257 | struct hlist_head fdir_filter_list; |
258 | u16 fdir_pf_active_filters; | |
433c47de ASJ |
259 | u16 fd_sb_cnt_idx; |
260 | u16 fd_atr_cnt_idx; | |
1e1be8f6 | 261 | unsigned long fd_flush_timestamp; |
60793f4a | 262 | u32 fd_flush_cnt; |
1e1be8f6 ASJ |
263 | u32 fd_add_err; |
264 | u32 fd_atr_cnt; | |
265 | u32 fd_tcp_rule; | |
17a73f6b | 266 | |
a1c9a9d9 JK |
267 | #ifdef CONFIG_I40E_VXLAN |
268 | __be16 vxlan_ports[I40E_MAX_PF_UDP_OFFLOAD_PORTS]; | |
269 | u16 pending_vxlan_bitmap; | |
270 | ||
271 | #endif | |
7daa6bf3 JB |
272 | enum i40e_interrupt_policy int_policy; |
273 | u16 rx_itr_default; | |
274 | u16 tx_itr_default; | |
275 | u16 msg_enable; | |
b294ac70 | 276 | char int_name[I40E_INT_NAME_STR_LEN]; |
7daa6bf3 | 277 | u16 adminq_work_limit; /* num of admin receive queue desc to process */ |
21536717 SN |
278 | unsigned long service_timer_period; |
279 | unsigned long service_timer_previous; | |
7daa6bf3 JB |
280 | struct timer_list service_timer; |
281 | struct work_struct service_task; | |
282 | ||
283 | u64 flags; | |
284 | #define I40E_FLAG_RX_CSUM_ENABLED (u64)(1 << 1) | |
285 | #define I40E_FLAG_MSI_ENABLED (u64)(1 << 2) | |
286 | #define I40E_FLAG_MSIX_ENABLED (u64)(1 << 3) | |
287 | #define I40E_FLAG_RX_1BUF_ENABLED (u64)(1 << 4) | |
288 | #define I40E_FLAG_RX_PS_ENABLED (u64)(1 << 5) | |
289 | #define I40E_FLAG_RSS_ENABLED (u64)(1 << 6) | |
9f52987b NP |
290 | #define I40E_FLAG_VMDQ_ENABLED (u64)(1 << 7) |
291 | #define I40E_FLAG_FDIR_REQUIRES_REINIT (u64)(1 << 8) | |
292 | #define I40E_FLAG_NEED_LINK_UPDATE (u64)(1 << 9) | |
38e00438 VD |
293 | #ifdef I40E_FCOE |
294 | #define I40E_FLAG_FCOE_ENABLED (u64)(1 << 11) | |
295 | #endif /* I40E_FCOE */ | |
9f52987b NP |
296 | #define I40E_FLAG_IN_NETPOLL (u64)(1 << 12) |
297 | #define I40E_FLAG_16BYTE_RX_DESC_ENABLED (u64)(1 << 13) | |
298 | #define I40E_FLAG_CLEAN_ADMINQ (u64)(1 << 14) | |
299 | #define I40E_FLAG_FILTER_SYNC (u64)(1 << 15) | |
300 | #define I40E_FLAG_PROCESS_MDD_EVENT (u64)(1 << 17) | |
301 | #define I40E_FLAG_PROCESS_VFLR_EVENT (u64)(1 << 18) | |
302 | #define I40E_FLAG_SRIOV_ENABLED (u64)(1 << 19) | |
303 | #define I40E_FLAG_DCB_ENABLED (u64)(1 << 20) | |
60ea5f83 JB |
304 | #define I40E_FLAG_FD_SB_ENABLED (u64)(1 << 21) |
305 | #define I40E_FLAG_FD_ATR_ENABLED (u64)(1 << 22) | |
beb0dff1 | 306 | #define I40E_FLAG_PTP (u64)(1 << 25) |
a1c9a9d9 JK |
307 | #define I40E_FLAG_MFP_ENABLED (u64)(1 << 26) |
308 | #ifdef CONFIG_I40E_VXLAN | |
309 | #define I40E_FLAG_VXLAN_FILTER_SYNC (u64)(1 << 27) | |
310 | #endif | |
1f224ad2 | 311 | #define I40E_FLAG_PORT_ID_VALID (u64)(1 << 28) |
4d9b6043 | 312 | #define I40E_FLAG_DCB_CAPABLE (u64)(1 << 29) |
7daa6bf3 | 313 | |
61dade7e ASJ |
314 | /* tracks features that get auto disabled by errors */ |
315 | u64 auto_disable_flags; | |
316 | ||
38e00438 VD |
317 | #ifdef I40E_FCOE |
318 | struct i40e_fcoe fcoe; | |
319 | ||
320 | #endif /* I40E_FCOE */ | |
7daa6bf3 JB |
321 | bool stat_offsets_loaded; |
322 | struct i40e_hw_port_stats stats; | |
323 | struct i40e_hw_port_stats stats_offsets; | |
324 | u32 tx_timeout_count; | |
325 | u32 tx_timeout_recovery_level; | |
326 | unsigned long tx_timeout_last_recovery; | |
810b3ae4 | 327 | u32 tx_sluggish_count; |
7daa6bf3 JB |
328 | u32 hw_csum_rx_error; |
329 | u32 led_status; | |
330 | u16 corer_count; /* Core reset count */ | |
331 | u16 globr_count; /* Global reset count */ | |
332 | u16 empr_count; /* EMP reset count */ | |
333 | u16 pfr_count; /* PF reset count */ | |
cd92e72f | 334 | u16 sw_int_count; /* SW interrupt count */ |
7daa6bf3 JB |
335 | |
336 | struct mutex switch_mutex; | |
337 | u16 lan_vsi; /* our default LAN VSI */ | |
338 | u16 lan_veb; /* initial relay, if exists */ | |
339 | #define I40E_NO_VEB 0xffff | |
340 | #define I40E_NO_VSI 0xffff | |
341 | u16 next_vsi; /* Next unallocated VSI - 0-based! */ | |
342 | struct i40e_vsi **vsi; | |
343 | struct i40e_veb *veb[I40E_MAX_VEB]; | |
344 | ||
345 | struct i40e_lump_tracking *qp_pile; | |
346 | struct i40e_lump_tracking *irq_pile; | |
347 | ||
348 | /* switch config info */ | |
349 | u16 pf_seid; | |
350 | u16 main_vsi_seid; | |
351 | u16 mac_seid; | |
7daa6bf3 JB |
352 | struct kobject *switch_kobj; |
353 | #ifdef CONFIG_DEBUG_FS | |
354 | struct dentry *i40e_dbg_pf; | |
355 | #endif /* CONFIG_DEBUG_FS */ | |
356 | ||
93cd765b ASJ |
357 | u16 instance; /* A unique number per i40e_pf instance in the system */ |
358 | ||
7daa6bf3 JB |
359 | /* sr-iov config info */ |
360 | struct i40e_vf *vf; | |
361 | int num_alloc_vfs; /* actual number of VFs allocated */ | |
362 | u32 vf_aq_requests; | |
363 | ||
364 | /* DCBx/DCBNL capability for PF that indicates | |
365 | * whether DCBx is managed by firmware or host | |
366 | * based agent (LLDPAD). Also, indicates what | |
367 | * flavor of DCBx protocol (IEEE/CEE) is supported | |
368 | * by the device. For now we're supporting IEEE | |
369 | * mode only. | |
370 | */ | |
371 | u16 dcbx_cap; | |
372 | ||
373 | u32 fcoe_hmc_filt_num; | |
374 | u32 fcoe_hmc_cntx_num; | |
375 | struct i40e_filter_control_settings filter_settings; | |
beb0dff1 JK |
376 | |
377 | struct ptp_clock *ptp_clock; | |
378 | struct ptp_clock_info ptp_caps; | |
379 | struct sk_buff *ptp_tx_skb; | |
beb0dff1 | 380 | struct hwtstamp_config tstamp_config; |
beb0dff1 JK |
381 | unsigned long last_rx_ptp_check; |
382 | spinlock_t tmreg_lock; /* Used to protect the device time registers. */ | |
383 | u64 ptp_base_adj; | |
384 | u32 tx_hwtstamp_timeouts; | |
385 | u32 rx_hwtstamp_cleared; | |
386 | bool ptp_tx; | |
387 | bool ptp_rx; | |
e157ea30 | 388 | u16 rss_table_size; |
f4492db1 GR |
389 | /* These are only valid in NPAR modes */ |
390 | u32 npar_max_bw; | |
391 | u32 npar_min_bw; | |
7daa6bf3 JB |
392 | }; |
393 | ||
394 | struct i40e_mac_filter { | |
395 | struct list_head list; | |
396 | u8 macaddr[ETH_ALEN]; | |
397 | #define I40E_VLAN_ANY -1 | |
398 | s16 vlan; | |
399 | u8 counter; /* number of instances of this filter */ | |
400 | bool is_vf; /* filter belongs to a VF */ | |
401 | bool is_netdev; /* filter belongs to a netdev */ | |
402 | bool changed; /* filter needs to be sync'd to the HW */ | |
6252c7e4 | 403 | bool is_laa; /* filter is a Locally Administered Address */ |
7daa6bf3 JB |
404 | }; |
405 | ||
406 | struct i40e_veb { | |
407 | struct i40e_pf *pf; | |
408 | u16 idx; | |
409 | u16 veb_idx; /* index of VEB parent */ | |
410 | u16 seid; | |
411 | u16 uplink_seid; | |
412 | u16 stats_idx; /* index of VEB parent */ | |
413 | u8 enabled_tc; | |
51616018 | 414 | u16 bridge_mode; /* Bridge Mode (VEB/VEPA) */ |
7daa6bf3 JB |
415 | u16 flags; |
416 | u16 bw_limit; | |
417 | u8 bw_max_quanta; | |
418 | bool is_abs_credits; | |
419 | u8 bw_tc_share_credits[I40E_MAX_TRAFFIC_CLASS]; | |
420 | u16 bw_tc_limit_credits[I40E_MAX_TRAFFIC_CLASS]; | |
421 | u8 bw_tc_max_quanta[I40E_MAX_TRAFFIC_CLASS]; | |
422 | struct kobject *kobj; | |
423 | bool stat_offsets_loaded; | |
424 | struct i40e_eth_stats stats; | |
425 | struct i40e_eth_stats stats_offsets; | |
426 | }; | |
427 | ||
428 | /* struct that defines a VSI, associated with a dev */ | |
429 | struct i40e_vsi { | |
430 | struct net_device *netdev; | |
431 | unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)]; | |
432 | bool netdev_registered; | |
433 | bool stat_offsets_loaded; | |
434 | ||
435 | u32 current_netdev_flags; | |
436 | unsigned long state; | |
437 | #define I40E_VSI_FLAG_FILTER_CHANGED (1<<0) | |
438 | #define I40E_VSI_FLAG_VEB_OWNER (1<<1) | |
439 | unsigned long flags; | |
440 | ||
441 | struct list_head mac_filter_list; | |
442 | ||
443 | /* VSI stats */ | |
444 | struct rtnl_link_stats64 net_stats; | |
445 | struct rtnl_link_stats64 net_stats_offsets; | |
446 | struct i40e_eth_stats eth_stats; | |
447 | struct i40e_eth_stats eth_stats_offsets; | |
38e00438 VD |
448 | #ifdef I40E_FCOE |
449 | struct i40e_fcoe_stats fcoe_stats; | |
450 | struct i40e_fcoe_stats fcoe_stats_offsets; | |
451 | bool fcoe_stat_offsets_loaded; | |
452 | #endif | |
7daa6bf3 JB |
453 | u32 tx_restart; |
454 | u32 tx_busy; | |
455 | u32 rx_buf_failed; | |
456 | u32 rx_page_failed; | |
457 | ||
9f65e15b AD |
458 | /* These are containers of ring pointers, allocated at run-time */ |
459 | struct i40e_ring **rx_rings; | |
460 | struct i40e_ring **tx_rings; | |
7daa6bf3 JB |
461 | |
462 | u16 work_limit; | |
463 | /* high bit set means dynamic, use accessor routines to read/write. | |
464 | * hardware only supports 2us resolution for the ITR registers. | |
465 | * these values always store the USER setting, and must be converted | |
466 | * before programming to a register. | |
467 | */ | |
468 | u16 rx_itr_setting; | |
469 | u16 tx_itr_setting; | |
470 | ||
471 | u16 max_frame; | |
472 | u16 rx_hdr_len; | |
473 | u16 rx_buf_len; | |
474 | u8 dtype; | |
475 | ||
476 | /* List of q_vectors allocated to this VSI */ | |
493fb300 | 477 | struct i40e_q_vector **q_vectors; |
7daa6bf3 JB |
478 | int num_q_vectors; |
479 | int base_vector; | |
63741846 | 480 | bool irqs_ready; |
7daa6bf3 JB |
481 | |
482 | u16 seid; /* HW index of this VSI (absolute index) */ | |
483 | u16 id; /* VSI number */ | |
484 | u16 uplink_seid; | |
485 | ||
486 | u16 base_queue; /* vsi's first queue in hw array */ | |
487 | u16 alloc_queue_pairs; /* Allocated Tx/Rx queues */ | |
488 | u16 num_queue_pairs; /* Used tx and rx pairs */ | |
489 | u16 num_desc; | |
490 | enum i40e_vsi_type type; /* VSI type, e.g., LAN, FCoE, etc */ | |
491 | u16 vf_id; /* Virtual function ID for SRIOV VSIs */ | |
492 | ||
493 | struct i40e_tc_configuration tc_config; | |
494 | struct i40e_aqc_vsi_properties_data info; | |
495 | ||
496 | /* VSI BW limit (absolute across all TCs) */ | |
497 | u16 bw_limit; /* VSI BW Limit (0 = disabled) */ | |
498 | u8 bw_max_quanta; /* Max Quanta when BW limit is enabled */ | |
499 | ||
500 | /* Relative TC credits across VSIs */ | |
501 | u8 bw_ets_share_credits[I40E_MAX_TRAFFIC_CLASS]; | |
502 | /* TC BW limit credits within VSI */ | |
503 | u16 bw_ets_limit_credits[I40E_MAX_TRAFFIC_CLASS]; | |
504 | /* TC BW limit max quanta within VSI */ | |
505 | u8 bw_ets_max_quanta[I40E_MAX_TRAFFIC_CLASS]; | |
506 | ||
507 | struct i40e_pf *back; /* Backreference to associated PF */ | |
508 | u16 idx; /* index in pf->vsi[] */ | |
509 | u16 veb_idx; /* index of VEB parent */ | |
510 | struct kobject *kobj; /* sysfs object */ | |
511 | ||
512 | /* VSI specific handlers */ | |
513 | irqreturn_t (*irq_handler)(int irq, void *data); | |
88eee9bc CW |
514 | |
515 | /* current rxnfc data */ | |
516 | struct ethtool_rxnfc rxnfc; /* current rss hash opts */ | |
7daa6bf3 JB |
517 | } ____cacheline_internodealigned_in_smp; |
518 | ||
519 | struct i40e_netdev_priv { | |
520 | struct i40e_vsi *vsi; | |
521 | }; | |
522 | ||
523 | /* struct that defines an interrupt vector */ | |
524 | struct i40e_q_vector { | |
525 | struct i40e_vsi *vsi; | |
526 | ||
527 | u16 v_idx; /* index in the vsi->q_vector array. */ | |
528 | u16 reg_idx; /* register index of the interrupt */ | |
529 | ||
530 | struct napi_struct napi; | |
531 | ||
532 | struct i40e_ring_container rx; | |
533 | struct i40e_ring_container tx; | |
534 | ||
535 | u8 num_ringpairs; /* total number of ring pairs in vector */ | |
536 | ||
7daa6bf3 | 537 | cpumask_t affinity_mask; |
493fb300 | 538 | struct rcu_head rcu; /* to avoid race with update stats on free */ |
b294ac70 | 539 | char name[I40E_INT_NAME_STR_LEN]; |
7daa6bf3 JB |
540 | } ____cacheline_internodealigned_in_smp; |
541 | ||
542 | /* lan device */ | |
543 | struct i40e_device { | |
544 | struct list_head list; | |
545 | struct i40e_pf *pf; | |
546 | }; | |
547 | ||
548 | /** | |
549 | * i40e_fw_version_str - format the FW and NVM version strings | |
550 | * @hw: ptr to the hardware info | |
551 | **/ | |
552 | static inline char *i40e_fw_version_str(struct i40e_hw *hw) | |
553 | { | |
554 | static char buf[32]; | |
555 | ||
556 | snprintf(buf, sizeof(buf), | |
fe310704 | 557 | "f%d.%d a%d.%d n%02x.%02x e%08x", |
7daa6bf3 JB |
558 | hw->aq.fw_maj_ver, hw->aq.fw_min_ver, |
559 | hw->aq.api_maj_ver, hw->aq.api_min_ver, | |
ff80301e JB |
560 | (hw->nvm.version & I40E_NVM_VERSION_HI_MASK) >> |
561 | I40E_NVM_VERSION_HI_SHIFT, | |
562 | (hw->nvm.version & I40E_NVM_VERSION_LO_MASK) >> | |
563 | I40E_NVM_VERSION_LO_SHIFT, | |
7daa6bf3 JB |
564 | hw->nvm.eetrack); |
565 | ||
566 | return buf; | |
567 | } | |
568 | ||
569 | /** | |
570 | * i40e_netdev_to_pf: Retrieve the PF struct for given netdev | |
571 | * @netdev: the corresponding netdev | |
572 | * | |
573 | * Return the PF struct for the given netdev | |
574 | **/ | |
575 | static inline struct i40e_pf *i40e_netdev_to_pf(struct net_device *netdev) | |
576 | { | |
577 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
578 | struct i40e_vsi *vsi = np->vsi; | |
579 | ||
580 | return vsi->back; | |
581 | } | |
582 | ||
583 | static inline void i40e_vsi_setup_irqhandler(struct i40e_vsi *vsi, | |
584 | irqreturn_t (*irq_handler)(int, void *)) | |
585 | { | |
586 | vsi->irq_handler = irq_handler; | |
587 | } | |
588 | ||
589 | /** | |
590 | * i40e_rx_is_programming_status - check for programming status descriptor | |
591 | * @qw: the first quad word of the program status descriptor | |
592 | * | |
593 | * The value of in the descriptor length field indicate if this | |
594 | * is a programming status descriptor for flow director or FCoE | |
595 | * by the value of I40E_RX_PROG_STATUS_DESC_LENGTH, otherwise | |
596 | * it is a packet descriptor. | |
597 | **/ | |
598 | static inline bool i40e_rx_is_programming_status(u64 qw) | |
599 | { | |
600 | return I40E_RX_PROG_STATUS_DESC_LENGTH == | |
601 | (qw >> I40E_RX_PROG_STATUS_DESC_LENGTH_SHIFT); | |
602 | } | |
603 | ||
082def10 ASJ |
604 | /** |
605 | * i40e_get_fd_cnt_all - get the total FD filter space available | |
606 | * @pf: pointer to the pf struct | |
607 | **/ | |
608 | static inline int i40e_get_fd_cnt_all(struct i40e_pf *pf) | |
609 | { | |
610 | return pf->hw.fdir_shared_filter_count + pf->fdir_pf_filter_count; | |
611 | } | |
612 | ||
7daa6bf3 JB |
613 | /* needed by i40e_ethtool.c */ |
614 | int i40e_up(struct i40e_vsi *vsi); | |
615 | void i40e_down(struct i40e_vsi *vsi); | |
616 | extern const char i40e_driver_name[]; | |
617 | extern const char i40e_driver_version_str[]; | |
23326186 | 618 | void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags); |
7daa6bf3 JB |
619 | void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags); |
620 | void i40e_update_stats(struct i40e_vsi *vsi); | |
621 | void i40e_update_eth_stats(struct i40e_vsi *vsi); | |
622 | struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi); | |
623 | int i40e_fetch_switch_configuration(struct i40e_pf *pf, | |
624 | bool printconfig); | |
625 | ||
17a73f6b | 626 | int i40e_program_fdir_filter(struct i40e_fdir_filter *fdir_data, u8 *raw_packet, |
7daa6bf3 | 627 | struct i40e_pf *pf, bool add); |
17a73f6b JG |
628 | int i40e_add_del_fdir(struct i40e_vsi *vsi, |
629 | struct i40e_fdir_filter *input, bool add); | |
55a5e60b ASJ |
630 | void i40e_fdir_check_and_reenable(struct i40e_pf *pf); |
631 | int i40e_get_current_fd_count(struct i40e_pf *pf); | |
12957388 | 632 | int i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf); |
1e1be8f6 | 633 | int i40e_get_current_atr_cnt(struct i40e_pf *pf); |
7c3c288b | 634 | bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features); |
7daa6bf3 JB |
635 | void i40e_set_ethtool_ops(struct net_device *netdev); |
636 | struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi, | |
637 | u8 *macaddr, s16 vlan, | |
638 | bool is_vf, bool is_netdev); | |
639 | void i40e_del_filter(struct i40e_vsi *vsi, u8 *macaddr, s16 vlan, | |
640 | bool is_vf, bool is_netdev); | |
641 | int i40e_sync_vsi_filters(struct i40e_vsi *vsi); | |
642 | struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type, | |
643 | u16 uplink, u32 param1); | |
644 | int i40e_vsi_release(struct i40e_vsi *vsi); | |
645 | struct i40e_vsi *i40e_vsi_lookup(struct i40e_pf *pf, enum i40e_vsi_type type, | |
646 | struct i40e_vsi *start_vsi); | |
38e00438 VD |
647 | #ifdef I40E_FCOE |
648 | void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi, | |
649 | struct i40e_vsi_context *ctxt, | |
650 | u8 enabled_tc, bool is_add); | |
651 | #endif | |
fc18eaa0 | 652 | int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool enable); |
f8ff1464 | 653 | int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count); |
7daa6bf3 JB |
654 | struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags, u16 uplink_seid, |
655 | u16 downlink_seid, u8 enabled_tc); | |
656 | void i40e_veb_release(struct i40e_veb *veb); | |
657 | ||
4e3b35b0 | 658 | int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc); |
7daa6bf3 JB |
659 | i40e_status i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid); |
660 | void i40e_vsi_remove_pvid(struct i40e_vsi *vsi); | |
661 | void i40e_vsi_reset_stats(struct i40e_vsi *vsi); | |
662 | void i40e_pf_reset_stats(struct i40e_pf *pf); | |
663 | #ifdef CONFIG_DEBUG_FS | |
664 | void i40e_dbg_pf_init(struct i40e_pf *pf); | |
665 | void i40e_dbg_pf_exit(struct i40e_pf *pf); | |
666 | void i40e_dbg_init(void); | |
667 | void i40e_dbg_exit(void); | |
668 | #else | |
669 | static inline void i40e_dbg_pf_init(struct i40e_pf *pf) {} | |
670 | static inline void i40e_dbg_pf_exit(struct i40e_pf *pf) {} | |
671 | static inline void i40e_dbg_init(void) {} | |
672 | static inline void i40e_dbg_exit(void) {} | |
673 | #endif /* CONFIG_DEBUG_FS*/ | |
674 | void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector); | |
5c2cebda | 675 | void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector); |
2ef28cfb | 676 | void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf); |
116a57d4 | 677 | void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf); |
38e00438 VD |
678 | #ifdef I40E_FCOE |
679 | struct rtnl_link_stats64 *i40e_get_netdev_stats_struct( | |
680 | struct net_device *netdev, | |
681 | struct rtnl_link_stats64 *storage); | |
682 | int i40e_set_mac(struct net_device *netdev, void *p); | |
683 | void i40e_set_rx_mode(struct net_device *netdev); | |
684 | #endif | |
7daa6bf3 | 685 | int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd); |
38e00438 VD |
686 | #ifdef I40E_FCOE |
687 | void i40e_tx_timeout(struct net_device *netdev); | |
688 | int i40e_vlan_rx_add_vid(struct net_device *netdev, | |
689 | __always_unused __be16 proto, u16 vid); | |
690 | int i40e_vlan_rx_kill_vid(struct net_device *netdev, | |
691 | __always_unused __be16 proto, u16 vid); | |
692 | #endif | |
96664483 | 693 | int i40e_open(struct net_device *netdev); |
6c167f58 | 694 | int i40e_vsi_open(struct i40e_vsi *vsi); |
7daa6bf3 JB |
695 | void i40e_vlan_stripping_disable(struct i40e_vsi *vsi); |
696 | int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid); | |
697 | int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid); | |
698 | struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr, | |
699 | bool is_vf, bool is_netdev); | |
700 | bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi); | |
701 | struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr, | |
702 | bool is_vf, bool is_netdev); | |
38e00438 | 703 | #ifdef I40E_FCOE |
38e00438 VD |
704 | int i40e_close(struct net_device *netdev); |
705 | int i40e_setup_tc(struct net_device *netdev, u8 tc); | |
706 | void i40e_netpoll(struct net_device *netdev); | |
707 | int i40e_fcoe_enable(struct net_device *netdev); | |
708 | int i40e_fcoe_disable(struct net_device *netdev); | |
709 | int i40e_fcoe_vsi_init(struct i40e_vsi *vsi, struct i40e_vsi_context *ctxt); | |
710 | u8 i40e_get_fcoe_tc_map(struct i40e_pf *pf); | |
711 | void i40e_fcoe_config_netdev(struct net_device *netdev, struct i40e_vsi *vsi); | |
712 | void i40e_fcoe_vsi_setup(struct i40e_pf *pf); | |
713 | int i40e_init_pf_fcoe(struct i40e_pf *pf); | |
714 | int i40e_fcoe_setup_ddp_resources(struct i40e_vsi *vsi); | |
715 | void i40e_fcoe_free_ddp_resources(struct i40e_vsi *vsi); | |
716 | int i40e_fcoe_handle_offload(struct i40e_ring *rx_ring, | |
717 | union i40e_rx_desc *rx_desc, | |
718 | struct sk_buff *skb); | |
719 | void i40e_fcoe_handle_status(struct i40e_ring *rx_ring, | |
720 | union i40e_rx_desc *rx_desc, u8 prog_id); | |
721 | #endif /* I40E_FCOE */ | |
7daa6bf3 | 722 | void i40e_vlan_stripping_enable(struct i40e_vsi *vsi); |
4e3b35b0 NP |
723 | #ifdef CONFIG_I40E_DCB |
724 | void i40e_dcbnl_flush_apps(struct i40e_pf *pf, | |
725 | struct i40e_dcbx_config *new_cfg); | |
726 | void i40e_dcbnl_set_all(struct i40e_vsi *vsi); | |
727 | void i40e_dcbnl_setup(struct i40e_vsi *vsi); | |
728 | bool i40e_dcb_need_reconfig(struct i40e_pf *pf, | |
729 | struct i40e_dcbx_config *old_cfg, | |
730 | struct i40e_dcbx_config *new_cfg); | |
731 | #endif /* CONFIG_I40E_DCB */ | |
beb0dff1 JK |
732 | void i40e_ptp_rx_hang(struct i40e_vsi *vsi); |
733 | void i40e_ptp_tx_hwtstamp(struct i40e_pf *pf); | |
734 | void i40e_ptp_rx_hwtstamp(struct i40e_pf *pf, struct sk_buff *skb, u8 index); | |
735 | void i40e_ptp_set_increment(struct i40e_pf *pf); | |
736 | int i40e_ptp_set_ts_config(struct i40e_pf *pf, struct ifreq *ifr); | |
737 | int i40e_ptp_get_ts_config(struct i40e_pf *pf, struct ifreq *ifr); | |
738 | void i40e_ptp_init(struct i40e_pf *pf); | |
739 | void i40e_ptp_stop(struct i40e_pf *pf); | |
51616018 | 740 | int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi); |
96664483 GR |
741 | #if IS_ENABLED(CONFIG_CONFIGFS_FS) |
742 | int i40e_configfs_init(void); | |
743 | void i40e_configfs_exit(void); | |
744 | #endif /* CONFIG_CONFIGFS_FS */ | |
f4492db1 GR |
745 | i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf); |
746 | i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf); | |
747 | i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf); | |
7daa6bf3 | 748 | #endif /* _I40E_H_ */ |