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i40e: Fix dangling ring pointers upon driver removal
[mirror_ubuntu-artful-kernel.git] / drivers / net / ethernet / intel / i40e / i40e.h
CommitLineData
7daa6bf3
JB		 1/*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
dc641b73 4 * Copyright(c) 2013 - 2014 Intel Corporation.
7daa6bf3
JB		 5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
dc641b73
GR		 15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
7daa6bf3
JB		 17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27#ifndef _I40E_H_
28#define _I40E_H_
29
30#include <net/tcp.h>
8144f0f7 31#include <net/udp.h>
7daa6bf3
JB		 32#include <linux/types.h>
33#include <linux/errno.h>
34#include <linux/module.h>
35#include <linux/pci.h>
36#include <linux/aer.h>
37#include <linux/netdevice.h>
38#include <linux/ioport.h>
39#include <linux/slab.h>
40#include <linux/list.h>
41#include <linux/string.h>
42#include <linux/in.h>
43#include <linux/ip.h>
44#include <linux/tcp.h>
45#include <linux/sctp.h>
46#include <linux/pkt_sched.h>
47#include <linux/ipv6.h>
7daa6bf3
JB		 48#include <net/checksum.h>
49#include <net/ip6_checksum.h>
50#include <linux/ethtool.h>
51#include <linux/if_vlan.h>
beb0dff1
JK		 52#include <linux/clocksource.h>
53#include <linux/net_tstamp.h>
54#include <linux/ptp_clock_kernel.h>
7daa6bf3
JB		 55#include "i40e_type.h"
56#include "i40e_prototype.h"
57#include "i40e_virtchnl.h"
58#include "i40e_virtchnl_pf.h"
59#include "i40e_txrx.h"
4e3b35b0 60#include "i40e_dcb.h"
7daa6bf3
JB		 61
62/* Useful i40e defaults */
63#define I40E_BASE_PF_SEID 16
64#define I40E_BASE_VSI_SEID 512
65#define I40E_BASE_VEB_SEID 288
66#define I40E_MAX_VEB 16
67
68#define I40E_MAX_NUM_DESCRIPTORS 4096
a45e88c9 69#define I40E_MAX_REGISTER 0x800000
7daa6bf3
JB		 70#define I40E_DEFAULT_NUM_DESCRIPTORS 512
71#define I40E_REQ_DESCRIPTOR_MULTIPLE 32
72#define I40E_MIN_NUM_DESCRIPTORS 64
73#define I40E_MIN_MSIX 2
74#define I40E_DEFAULT_NUM_VMDQ_VSI 8 /* max 256 VSIs */
505682cd 75#define I40E_MIN_VSI_ALLOC 51 /* LAN, ATR, FCOE, 32 VF, 16 VMDQ */
7daa6bf3
JB		 76#define I40E_DEFAULT_QUEUES_PER_VMDQ 2 /* max 16 qps */
77#define I40E_DEFAULT_QUEUES_PER_VF 4
78#define I40E_DEFAULT_QUEUES_PER_TC 1 /* should be a power of 2 */
4e3b35b0 79#define I40E_MAX_QUEUES_PER_TC 64 /* should be a power of 2 */
7daa6bf3
JB		 80#define I40E_FDIR_RING 0
81#define I40E_FDIR_RING_COUNT 32
82#define I40E_MAX_AQ_BUF_SIZE 4096
83#define I40E_AQ_LEN 32
84#define I40E_AQ_WORK_LIMIT 16
85#define I40E_MAX_USER_PRIORITY 8
86#define I40E_DEFAULT_MSG_ENABLE 4
87
88#define I40E_NVM_VERSION_LO_SHIFT 0
fe310704 89#define I40E_NVM_VERSION_LO_MASK (0xff << I40E_NVM_VERSION_LO_SHIFT)
ff80301e
JB		 90#define I40E_NVM_VERSION_HI_SHIFT 12
91#define I40E_NVM_VERSION_HI_MASK (0xf << I40E_NVM_VERSION_HI_SHIFT)
fe310704
AS		 92
93/* The values in here are decimal coded as hex as is the case in the NVM map*/
94#define I40E_CURRENT_NVM_VERSION_HI 0x2
ff80301e 95#define I40E_CURRENT_NVM_VERSION_LO 0x40
fe310704 96
7daa6bf3
JB		 97/* magic for getting defines into strings */
98#define STRINGIFY(foo) #foo
99#define XSTRINGIFY(bar) STRINGIFY(bar)
100
7daa6bf3
JB		 101#define I40E_RX_DESC(R, i) \
102 ((ring_is_16byte_desc_enabled(R)) \
103 ? (union i40e_32byte_rx_desc *) \
104 (&(((union i40e_16byte_rx_desc *)((R)->desc))[i])) \
105 : (&(((union i40e_32byte_rx_desc *)((R)->desc))[i])))
106#define I40E_TX_DESC(R, i) \
107 (&(((struct i40e_tx_desc *)((R)->desc))[i]))
108#define I40E_TX_CTXTDESC(R, i) \
109 (&(((struct i40e_tx_context_desc *)((R)->desc))[i]))
110#define I40E_TX_FDIRDESC(R, i) \
111 (&(((struct i40e_filter_program_desc *)((R)->desc))[i]))
112
113/* default to trying for four seconds */
114#define I40E_TRY_LINK_TIMEOUT (4 * HZ)
115
116/* driver state flags */
117enum i40e_state_t {
118 __I40E_TESTING,
119 __I40E_CONFIG_BUSY,
120 __I40E_CONFIG_DONE,
121 __I40E_DOWN,
122 __I40E_NEEDS_RESTART,
123 __I40E_SERVICE_SCHED,
124 __I40E_ADMINQ_EVENT_PENDING,
125 __I40E_MDD_EVENT_PENDING,
126 __I40E_VFLR_EVENT_PENDING,
127 __I40E_RESET_RECOVERY_PENDING,
128 __I40E_RESET_INTR_RECEIVED,
129 __I40E_REINIT_REQUESTED,
130 __I40E_PF_RESET_REQUESTED,
131 __I40E_CORE_RESET_REQUESTED,
132 __I40E_GLOBAL_RESET_REQUESTED,
7823fe34 133 __I40E_EMP_RESET_REQUESTED,
7daa6bf3 134 __I40E_FILTER_OVERFLOW_PROMISC,
9007bccd 135 __I40E_SUSPENDED,
4eb3f768 136 __I40E_BAD_EEPROM,
7daa6bf3
JB		 137};
138
139enum i40e_interrupt_policy {
140 I40E_INTERRUPT_BEST_CASE,
141 I40E_INTERRUPT_MEDIUM,
142 I40E_INTERRUPT_LOWEST
143};
144
145struct i40e_lump_tracking {
146 u16 num_entries;
147 u16 search_hint;
148 u16 list[0];
149#define I40E_PILE_VALID_BIT 0x8000
150};
151
152#define I40E_DEFAULT_ATR_SAMPLE_RATE 20
55a5e60b
ASJ		 153#define I40E_FDIR_MAX_RAW_PACKET_SIZE 512
154#define I40E_FDIR_BUFFER_FULL_MARGIN 10
155#define I40E_FDIR_BUFFER_HEAD_ROOM 200
156
433c47de
ASJ		 157enum i40e_fd_stat_idx {
158 I40E_FD_STAT_ATR,
159 I40E_FD_STAT_SB,
160 I40E_FD_STAT_PF_COUNT
161};
162#define I40E_FD_STAT_PF_IDX(pf_id) ((pf_id) * I40E_FD_STAT_PF_COUNT)
163#define I40E_FD_ATR_STAT_IDX(pf_id) \
164 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_ATR)
165#define I40E_FD_SB_STAT_IDX(pf_id) \
166 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_SB)
167
17a73f6b
JG		 168struct i40e_fdir_filter {
169 struct hlist_node fdir_node;
170 /* filter ipnut set */
171 u8 flow_type;
172 u8 ip4_proto;
04b73bd7 173 /* TX packet view of src and dst */
17a73f6b
JG		 174 __be32 dst_ip[4];
175 __be32 src_ip[4];
176 __be16 src_port;
177 __be16 dst_port;
178 __be32 sctp_v_tag;
179 /* filter control */
7daa6bf3
JB		 180 u16 q_index;
181 u8 flex_off;
182 u8 pctype;
183 u16 dest_vsi;
184 u8 dest_ctl;
185 u8 fd_status;
186 u16 cnt_index;
187 u32 fd_id;
7daa6bf3
JB		 188};
189
4e3b35b0
NP		 190#define I40E_ETH_P_LLDP 0x88cc
191
7daa6bf3
JB		 192#define I40E_DCB_PRIO_TYPE_STRICT 0
193#define I40E_DCB_PRIO_TYPE_ETS 1
194#define I40E_DCB_STRICT_PRIO_CREDITS 127
195#define I40E_MAX_USER_PRIORITY 8
196/* DCB per TC information data structure */
197struct i40e_tc_info {
198 u16 qoffset; /* Queue offset from base queue */
199 u16 qcount; /* Total Queues */
200 u8 netdev_tc; /* Netdev TC index if netdev associated */
201};
202
203/* TC configuration data structure */
204struct i40e_tc_configuration {
205 u8 numtc; /* Total number of enabled TCs */
206 u8 enabled_tc; /* TC map */
207 struct i40e_tc_info tc_info[I40E_MAX_TRAFFIC_CLASS];
208};
209
210/* struct that defines the Ethernet device */
211struct i40e_pf {
212 struct pci_dev *pdev;
213 struct i40e_hw hw;
214 unsigned long state;
215 unsigned long link_check_timeout;
216 struct msix_entry *msix_entries;
7daa6bf3
JB		 217 bool fc_autoneg_status;
218
219 u16 eeprom_version;
6c167f58 220 u16 num_vmdq_vsis; /* num vmdq vsis this pf has set up */
7daa6bf3
JB		 221 u16 num_vmdq_qps; /* num queue pairs per vmdq pool */
222 u16 num_vmdq_msix; /* num queue vectors per vmdq pool */
223 u16 num_req_vfs; /* num vfs requested for this vf */
224 u16 num_vf_qps; /* num queue pairs per vf */
7daa6bf3
JB		 225 u16 num_lan_qps; /* num lan queues this pf has set up */
226 u16 num_lan_msix; /* num queue vectors for the base pf vsi */
f8ff1464 227 int queues_left; /* queues left unclaimed */
7daa6bf3
JB		 228 u16 rss_size; /* num queues in the RSS array */
229 u16 rss_size_max; /* HW defined max RSS queues */
230 u16 fdir_pf_filter_count; /* num of guaranteed filters for this PF */
505682cd 231 u16 num_alloc_vsi; /* num VSIs this driver supports */
7daa6bf3 232 u8 atr_sample_rate;
8e2773ae 233 bool wol_en;
7daa6bf3 234
17a73f6b
JG		 235 struct hlist_head fdir_filter_list;
236 u16 fdir_pf_active_filters;
433c47de
ASJ		 237 u16 fd_sb_cnt_idx;
238 u16 fd_atr_cnt_idx;
17a73f6b 239
a1c9a9d9
JK		 240#ifdef CONFIG_I40E_VXLAN
241 __be16 vxlan_ports[I40E_MAX_PF_UDP_OFFLOAD_PORTS];
242 u16 pending_vxlan_bitmap;
243
244#endif
7daa6bf3
JB		 245 enum i40e_interrupt_policy int_policy;
246 u16 rx_itr_default;
247 u16 tx_itr_default;
248 u16 msg_enable;
249 char misc_int_name[IFNAMSIZ + 9];
250 u16 adminq_work_limit; /* num of admin receive queue desc to process */
251 int service_timer_period;
252 struct timer_list service_timer;
253 struct work_struct service_task;
254
255 u64 flags;
256#define I40E_FLAG_RX_CSUM_ENABLED (u64)(1 << 1)
257#define I40E_FLAG_MSI_ENABLED (u64)(1 << 2)
258#define I40E_FLAG_MSIX_ENABLED (u64)(1 << 3)
259#define I40E_FLAG_RX_1BUF_ENABLED (u64)(1 << 4)
260#define I40E_FLAG_RX_PS_ENABLED (u64)(1 << 5)
261#define I40E_FLAG_RSS_ENABLED (u64)(1 << 6)
9f52987b
NP		 262#define I40E_FLAG_VMDQ_ENABLED (u64)(1 << 7)
263#define I40E_FLAG_FDIR_REQUIRES_REINIT (u64)(1 << 8)
264#define I40E_FLAG_NEED_LINK_UPDATE (u64)(1 << 9)
265#define I40E_FLAG_IN_NETPOLL (u64)(1 << 12)
266#define I40E_FLAG_16BYTE_RX_DESC_ENABLED (u64)(1 << 13)
267#define I40E_FLAG_CLEAN_ADMINQ (u64)(1 << 14)
268#define I40E_FLAG_FILTER_SYNC (u64)(1 << 15)
269#define I40E_FLAG_PROCESS_MDD_EVENT (u64)(1 << 17)
270#define I40E_FLAG_PROCESS_VFLR_EVENT (u64)(1 << 18)
271#define I40E_FLAG_SRIOV_ENABLED (u64)(1 << 19)
272#define I40E_FLAG_DCB_ENABLED (u64)(1 << 20)
60ea5f83
JB		 273#define I40E_FLAG_FD_SB_ENABLED (u64)(1 << 21)
274#define I40E_FLAG_FD_ATR_ENABLED (u64)(1 << 22)
beb0dff1 275#define I40E_FLAG_PTP (u64)(1 << 25)
a1c9a9d9
JK		 276#define I40E_FLAG_MFP_ENABLED (u64)(1 << 26)
277#ifdef CONFIG_I40E_VXLAN
278#define I40E_FLAG_VXLAN_FILTER_SYNC (u64)(1 << 27)
279#endif
4d9b6043 280#define I40E_FLAG_DCB_CAPABLE (u64)(1 << 29)
7daa6bf3 281
61dade7e
ASJ		 282 /* tracks features that get auto disabled by errors */
283 u64 auto_disable_flags;
284
7daa6bf3
JB		 285 bool stat_offsets_loaded;
286 struct i40e_hw_port_stats stats;
287 struct i40e_hw_port_stats stats_offsets;
288 u32 tx_timeout_count;
289 u32 tx_timeout_recovery_level;
290 unsigned long tx_timeout_last_recovery;
291 u32 hw_csum_rx_error;
292 u32 led_status;
293 u16 corer_count; /* Core reset count */
294 u16 globr_count; /* Global reset count */
295 u16 empr_count; /* EMP reset count */
296 u16 pfr_count; /* PF reset count */
cd92e72f 297 u16 sw_int_count; /* SW interrupt count */
7daa6bf3
JB		 298
299 struct mutex switch_mutex;
300 u16 lan_vsi; /* our default LAN VSI */
301 u16 lan_veb; /* initial relay, if exists */
302#define I40E_NO_VEB 0xffff
303#define I40E_NO_VSI 0xffff
304 u16 next_vsi; /* Next unallocated VSI - 0-based! */
305 struct i40e_vsi **vsi;
306 struct i40e_veb *veb[I40E_MAX_VEB];
307
308 struct i40e_lump_tracking *qp_pile;
309 struct i40e_lump_tracking *irq_pile;
310
311 /* switch config info */
312 u16 pf_seid;
313 u16 main_vsi_seid;
314 u16 mac_seid;
7daa6bf3
JB		 315 struct kobject *switch_kobj;
316#ifdef CONFIG_DEBUG_FS
317 struct dentry *i40e_dbg_pf;
318#endif /* CONFIG_DEBUG_FS */
319
93cd765b
ASJ		 320 u16 instance; /* A unique number per i40e_pf instance in the system */
321
7daa6bf3
JB		 322 /* sr-iov config info */
323 struct i40e_vf *vf;
324 int num_alloc_vfs; /* actual number of VFs allocated */
325 u32 vf_aq_requests;
326
327 /* DCBx/DCBNL capability for PF that indicates
328 * whether DCBx is managed by firmware or host
329 * based agent (LLDPAD). Also, indicates what
330 * flavor of DCBx protocol (IEEE/CEE) is supported
331 * by the device. For now we're supporting IEEE
332 * mode only.
333 */
334 u16 dcbx_cap;
335
336 u32 fcoe_hmc_filt_num;
337 u32 fcoe_hmc_cntx_num;
338 struct i40e_filter_control_settings filter_settings;
beb0dff1
JK		 339
340 struct ptp_clock *ptp_clock;
341 struct ptp_clock_info ptp_caps;
342 struct sk_buff *ptp_tx_skb;
beb0dff1 343 struct hwtstamp_config tstamp_config;
beb0dff1
JK		 344 unsigned long last_rx_ptp_check;
345 spinlock_t tmreg_lock; /* Used to protect the device time registers. */
346 u64 ptp_base_adj;
347 u32 tx_hwtstamp_timeouts;
348 u32 rx_hwtstamp_cleared;
349 bool ptp_tx;
350 bool ptp_rx;
7daa6bf3
JB		 351};
352
353struct i40e_mac_filter {
354 struct list_head list;
355 u8 macaddr[ETH_ALEN];
356#define I40E_VLAN_ANY -1
357 s16 vlan;
358 u8 counter; /* number of instances of this filter */
359 bool is_vf; /* filter belongs to a VF */
360 bool is_netdev; /* filter belongs to a netdev */
361 bool changed; /* filter needs to be sync'd to the HW */
362};
363
364struct i40e_veb {
365 struct i40e_pf *pf;
366 u16 idx;
367 u16 veb_idx; /* index of VEB parent */
368 u16 seid;
369 u16 uplink_seid;
370 u16 stats_idx; /* index of VEB parent */
371 u8 enabled_tc;
372 u16 flags;
373 u16 bw_limit;
374 u8 bw_max_quanta;
375 bool is_abs_credits;
376 u8 bw_tc_share_credits[I40E_MAX_TRAFFIC_CLASS];
377 u16 bw_tc_limit_credits[I40E_MAX_TRAFFIC_CLASS];
378 u8 bw_tc_max_quanta[I40E_MAX_TRAFFIC_CLASS];
379 struct kobject *kobj;
380 bool stat_offsets_loaded;
381 struct i40e_eth_stats stats;
382 struct i40e_eth_stats stats_offsets;
383};
384
385/* struct that defines a VSI, associated with a dev */
386struct i40e_vsi {
387 struct net_device *netdev;
388 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
389 bool netdev_registered;
390 bool stat_offsets_loaded;
391
392 u32 current_netdev_flags;
393 unsigned long state;
394#define I40E_VSI_FLAG_FILTER_CHANGED (1<<0)
395#define I40E_VSI_FLAG_VEB_OWNER (1<<1)
396 unsigned long flags;
397
398 struct list_head mac_filter_list;
399
400 /* VSI stats */
401 struct rtnl_link_stats64 net_stats;
402 struct rtnl_link_stats64 net_stats_offsets;
403 struct i40e_eth_stats eth_stats;
404 struct i40e_eth_stats eth_stats_offsets;
405 u32 tx_restart;
406 u32 tx_busy;
407 u32 rx_buf_failed;
408 u32 rx_page_failed;
409
9f65e15b
AD		 410 /* These are containers of ring pointers, allocated at run-time */
411 struct i40e_ring **rx_rings;
412 struct i40e_ring **tx_rings;
7daa6bf3
JB		 413
414 u16 work_limit;
415 /* high bit set means dynamic, use accessor routines to read/write.
416 * hardware only supports 2us resolution for the ITR registers.
417 * these values always store the USER setting, and must be converted
418 * before programming to a register.
419 */
420 u16 rx_itr_setting;
421 u16 tx_itr_setting;
422
423 u16 max_frame;
424 u16 rx_hdr_len;
425 u16 rx_buf_len;
426 u8 dtype;
427
428 /* List of q_vectors allocated to this VSI */
493fb300 429 struct i40e_q_vector **q_vectors;
7daa6bf3
JB		 430 int num_q_vectors;
431 int base_vector;
63741846 432 bool irqs_ready;
7daa6bf3
JB		 433
434 u16 seid; /* HW index of this VSI (absolute index) */
435 u16 id; /* VSI number */
436 u16 uplink_seid;
437
438 u16 base_queue; /* vsi's first queue in hw array */
439 u16 alloc_queue_pairs; /* Allocated Tx/Rx queues */
440 u16 num_queue_pairs; /* Used tx and rx pairs */
441 u16 num_desc;
442 enum i40e_vsi_type type; /* VSI type, e.g., LAN, FCoE, etc */
443 u16 vf_id; /* Virtual function ID for SRIOV VSIs */
444
445 struct i40e_tc_configuration tc_config;
446 struct i40e_aqc_vsi_properties_data info;
447
448 /* VSI BW limit (absolute across all TCs) */
449 u16 bw_limit; /* VSI BW Limit (0 = disabled) */
450 u8 bw_max_quanta; /* Max Quanta when BW limit is enabled */
451
452 /* Relative TC credits across VSIs */
453 u8 bw_ets_share_credits[I40E_MAX_TRAFFIC_CLASS];
454 /* TC BW limit credits within VSI */
455 u16 bw_ets_limit_credits[I40E_MAX_TRAFFIC_CLASS];
456 /* TC BW limit max quanta within VSI */
457 u8 bw_ets_max_quanta[I40E_MAX_TRAFFIC_CLASS];
458
459 struct i40e_pf *back; /* Backreference to associated PF */
460 u16 idx; /* index in pf->vsi[] */
461 u16 veb_idx; /* index of VEB parent */
462 struct kobject *kobj; /* sysfs object */
463
464 /* VSI specific handlers */
465 irqreturn_t (*irq_handler)(int irq, void *data);
466} ____cacheline_internodealigned_in_smp;
467
468struct i40e_netdev_priv {
469 struct i40e_vsi *vsi;
470};
471
472/* struct that defines an interrupt vector */
473struct i40e_q_vector {
474 struct i40e_vsi *vsi;
475
476 u16 v_idx; /* index in the vsi->q_vector array. */
477 u16 reg_idx; /* register index of the interrupt */
478
479 struct napi_struct napi;
480
481 struct i40e_ring_container rx;
482 struct i40e_ring_container tx;
483
484 u8 num_ringpairs; /* total number of ring pairs in vector */
485
7daa6bf3 486 cpumask_t affinity_mask;
493fb300
AD		 487 struct rcu_head rcu; /* to avoid race with update stats on free */
488 char name[IFNAMSIZ + 9];
7daa6bf3
JB		 489} ____cacheline_internodealigned_in_smp;
490
491/* lan device */
492struct i40e_device {
493 struct list_head list;
494 struct i40e_pf *pf;
495};
496
497/**
498 * i40e_fw_version_str - format the FW and NVM version strings
499 * @hw: ptr to the hardware info
500 **/
501static inline char *i40e_fw_version_str(struct i40e_hw *hw)
502{
503 static char buf[32];
504
505 snprintf(buf, sizeof(buf),
fe310704 506 "f%d.%d a%d.%d n%02x.%02x e%08x",
7daa6bf3
JB		 507 hw->aq.fw_maj_ver, hw->aq.fw_min_ver,
508 hw->aq.api_maj_ver, hw->aq.api_min_ver,
ff80301e
JB		 509 (hw->nvm.version & I40E_NVM_VERSION_HI_MASK) >>
510 I40E_NVM_VERSION_HI_SHIFT,
511 (hw->nvm.version & I40E_NVM_VERSION_LO_MASK) >>
512 I40E_NVM_VERSION_LO_SHIFT,
7daa6bf3
JB		 513 hw->nvm.eetrack);
514
515 return buf;
516}
517
518/**
519 * i40e_netdev_to_pf: Retrieve the PF struct for given netdev
520 * @netdev: the corresponding netdev
521 *
522 * Return the PF struct for the given netdev
523 **/
524static inline struct i40e_pf *i40e_netdev_to_pf(struct net_device *netdev)
525{
526 struct i40e_netdev_priv *np = netdev_priv(netdev);
527 struct i40e_vsi *vsi = np->vsi;
528
529 return vsi->back;
530}
531
532static inline void i40e_vsi_setup_irqhandler(struct i40e_vsi *vsi,
533 irqreturn_t (*irq_handler)(int, void *))
534{
535 vsi->irq_handler = irq_handler;
536}
537
538/**
539 * i40e_rx_is_programming_status - check for programming status descriptor
540 * @qw: the first quad word of the program status descriptor
541 *
542 * The value of in the descriptor length field indicate if this
543 * is a programming status descriptor for flow director or FCoE
544 * by the value of I40E_RX_PROG_STATUS_DESC_LENGTH, otherwise
545 * it is a packet descriptor.
546 **/
547static inline bool i40e_rx_is_programming_status(u64 qw)
548{
549 return I40E_RX_PROG_STATUS_DESC_LENGTH ==
550 (qw >> I40E_RX_PROG_STATUS_DESC_LENGTH_SHIFT);
551}
552
082def10
ASJ		 553/**
554 * i40e_get_fd_cnt_all - get the total FD filter space available
555 * @pf: pointer to the pf struct
556 **/
557static inline int i40e_get_fd_cnt_all(struct i40e_pf *pf)
558{
559 return pf->hw.fdir_shared_filter_count + pf->fdir_pf_filter_count;
560}
561
7daa6bf3
JB		 562/* needed by i40e_ethtool.c */
563int i40e_up(struct i40e_vsi *vsi);
564void i40e_down(struct i40e_vsi *vsi);
565extern const char i40e_driver_name[];
566extern const char i40e_driver_version_str[];
23326186 567void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags);
7daa6bf3
JB		 568void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags);
569void i40e_update_stats(struct i40e_vsi *vsi);
570void i40e_update_eth_stats(struct i40e_vsi *vsi);
571struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi);
572int i40e_fetch_switch_configuration(struct i40e_pf *pf,
573 bool printconfig);
574
17a73f6b 575int i40e_program_fdir_filter(struct i40e_fdir_filter *fdir_data, u8 *raw_packet,
7daa6bf3 576 struct i40e_pf *pf, bool add);
17a73f6b
JG		 577int i40e_add_del_fdir(struct i40e_vsi *vsi,
578 struct i40e_fdir_filter *input, bool add);
55a5e60b
ASJ		 579void i40e_fdir_check_and_reenable(struct i40e_pf *pf);
580int i40e_get_current_fd_count(struct i40e_pf *pf);
7c3c288b 581bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features);
7daa6bf3
JB		 582void i40e_set_ethtool_ops(struct net_device *netdev);
583struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
584 u8 *macaddr, s16 vlan,
585 bool is_vf, bool is_netdev);
586void i40e_del_filter(struct i40e_vsi *vsi, u8 *macaddr, s16 vlan,
587 bool is_vf, bool is_netdev);
588int i40e_sync_vsi_filters(struct i40e_vsi *vsi);
589struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
590 u16 uplink, u32 param1);
591int i40e_vsi_release(struct i40e_vsi *vsi);
592struct i40e_vsi *i40e_vsi_lookup(struct i40e_pf *pf, enum i40e_vsi_type type,
593 struct i40e_vsi *start_vsi);
fc18eaa0 594int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool enable);
f8ff1464 595int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count);
7daa6bf3
JB		 596struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags, u16 uplink_seid,
597 u16 downlink_seid, u8 enabled_tc);
598void i40e_veb_release(struct i40e_veb *veb);
599
4e3b35b0 600int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc);
7daa6bf3
JB		 601i40e_status i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid);
602void i40e_vsi_remove_pvid(struct i40e_vsi *vsi);
603void i40e_vsi_reset_stats(struct i40e_vsi *vsi);
604void i40e_pf_reset_stats(struct i40e_pf *pf);
605#ifdef CONFIG_DEBUG_FS
606void i40e_dbg_pf_init(struct i40e_pf *pf);
607void i40e_dbg_pf_exit(struct i40e_pf *pf);
608void i40e_dbg_init(void);
609void i40e_dbg_exit(void);
610#else
611static inline void i40e_dbg_pf_init(struct i40e_pf *pf) {}
612static inline void i40e_dbg_pf_exit(struct i40e_pf *pf) {}
613static inline void i40e_dbg_init(void) {}
614static inline void i40e_dbg_exit(void) {}
615#endif /* CONFIG_DEBUG_FS*/
616void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector);
2ef28cfb 617void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf);
116a57d4 618void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf);
7daa6bf3 619int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
6c167f58 620int i40e_vsi_open(struct i40e_vsi *vsi);
7daa6bf3
JB		 621void i40e_vlan_stripping_disable(struct i40e_vsi *vsi);
622int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid);
623int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid);
624struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
625 bool is_vf, bool is_netdev);
626bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi);
627struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
628 bool is_vf, bool is_netdev);
629void i40e_vlan_stripping_enable(struct i40e_vsi *vsi);
4e3b35b0
NP		 630#ifdef CONFIG_I40E_DCB
631void i40e_dcbnl_flush_apps(struct i40e_pf *pf,
632 struct i40e_dcbx_config *new_cfg);
633void i40e_dcbnl_set_all(struct i40e_vsi *vsi);
634void i40e_dcbnl_setup(struct i40e_vsi *vsi);
635bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
636 struct i40e_dcbx_config *old_cfg,
637 struct i40e_dcbx_config *new_cfg);
638#endif /* CONFIG_I40E_DCB */
beb0dff1
JK		 639void i40e_ptp_rx_hang(struct i40e_vsi *vsi);
640void i40e_ptp_tx_hwtstamp(struct i40e_pf *pf);
641void i40e_ptp_rx_hwtstamp(struct i40e_pf *pf, struct sk_buff *skb, u8 index);
642void i40e_ptp_set_increment(struct i40e_pf *pf);
643int i40e_ptp_set_ts_config(struct i40e_pf *pf, struct ifreq *ifr);
644int i40e_ptp_get_ts_config(struct i40e_pf *pf, struct ifreq *ifr);
645void i40e_ptp_init(struct i40e_pf *pf);
646void i40e_ptp_stop(struct i40e_pf *pf);
7daa6bf3 647#endif /* _I40E_H_ */
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