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Merge tag 'socfpga_updates_for_v4.20_part3' of git://git.kernel.org/pub/scm/linux...
[mirror_ubuntu-focal-kernel.git] / drivers / net / ethernet / intel / i40e / i40e_ethtool.c
CommitLineData
ae06c70b 1// SPDX-License-Identifier: GPL-2.0
51dce24b 2/* Copyright(c) 2013 - 2018 Intel Corporation. */
c7d05ca8
JB		 3
4/* ethtool support for i40e */
5
6#include "i40e.h"
7#include "i40e_diag.h"
8
9struct i40e_stats {
1510ae0b
JK		 10 /* The stat_string is expected to be a format string formatted using
11 * vsnprintf by i40e_add_stat_strings. Every member of a stats array
12 * should use the same format specifiers as they will be formatted
13 * using the same variadic arguments.
14 */
c7d05ca8
JB		 15 char stat_string[ETH_GSTRING_LEN];
16 int sizeof_stat;
17 int stat_offset;
18};
19
20#define I40E_STAT(_type, _name, _stat) { \
21 .stat_string = _name, \
22 .sizeof_stat = FIELD_SIZEOF(_type, _stat), \
23 .stat_offset = offsetof(_type, _stat) \
24}
fad177dc 25
c7d05ca8 26#define I40E_NETDEV_STAT(_net_stat) \
132ee00e 27 I40E_STAT(struct rtnl_link_stats64, #_net_stat, _net_stat)
c7d05ca8 28#define I40E_PF_STAT(_name, _stat) \
132ee00e 29 I40E_STAT(struct i40e_pf, _name, _stat)
c7d05ca8 30#define I40E_VSI_STAT(_name, _stat) \
132ee00e 31 I40E_STAT(struct i40e_vsi, _name, _stat)
8eab9cfd 32#define I40E_VEB_STAT(_name, _stat) \
132ee00e 33 I40E_STAT(struct i40e_veb, _name, _stat)
f25848d4
JK		 34#define I40E_PFC_STAT(_name, _stat) \
35 I40E_STAT(struct i40e_pfc_stats, _name, _stat)
c7d05ca8
JB		 36
37static const struct i40e_stats i40e_gstrings_net_stats[] = {
38 I40E_NETDEV_STAT(rx_packets),
39 I40E_NETDEV_STAT(tx_packets),
40 I40E_NETDEV_STAT(rx_bytes),
41 I40E_NETDEV_STAT(tx_bytes),
42 I40E_NETDEV_STAT(rx_errors),
43 I40E_NETDEV_STAT(tx_errors),
44 I40E_NETDEV_STAT(rx_dropped),
45 I40E_NETDEV_STAT(tx_dropped),
c7d05ca8
JB		 46 I40E_NETDEV_STAT(collisions),
47 I40E_NETDEV_STAT(rx_length_errors),
48 I40E_NETDEV_STAT(rx_crc_errors),
49};
50
8eab9cfd 51static const struct i40e_stats i40e_gstrings_veb_stats[] = {
bf1c39e6
JK		 52 I40E_VEB_STAT("veb.rx_bytes", stats.rx_bytes),
53 I40E_VEB_STAT("veb.tx_bytes", stats.tx_bytes),
54 I40E_VEB_STAT("veb.rx_unicast", stats.rx_unicast),
55 I40E_VEB_STAT("veb.tx_unicast", stats.tx_unicast),
56 I40E_VEB_STAT("veb.rx_multicast", stats.rx_multicast),
57 I40E_VEB_STAT("veb.tx_multicast", stats.tx_multicast),
58 I40E_VEB_STAT("veb.rx_broadcast", stats.rx_broadcast),
59 I40E_VEB_STAT("veb.tx_broadcast", stats.tx_broadcast),
60 I40E_VEB_STAT("veb.rx_discards", stats.rx_discards),
61 I40E_VEB_STAT("veb.tx_discards", stats.tx_discards),
62 I40E_VEB_STAT("veb.tx_errors", stats.tx_errors),
63 I40E_VEB_STAT("veb.rx_unknown_protocol", stats.rx_unknown_protocol),
8eab9cfd
SN		 64};
65
1510ae0b
JK		 66static const struct i40e_stats i40e_gstrings_veb_tc_stats[] = {
67 I40E_VEB_STAT("veb.tc_%u_tx_packets", tc_stats.tc_tx_packets),
68 I40E_VEB_STAT("veb.tc_%u_tx_bytes", tc_stats.tc_tx_bytes),
69 I40E_VEB_STAT("veb.tc_%u_rx_packets", tc_stats.tc_rx_packets),
70 I40E_VEB_STAT("veb.tc_%u_rx_bytes", tc_stats.tc_rx_bytes),
71};
72
41a9e55c 73static const struct i40e_stats i40e_gstrings_misc_stats[] = {
418631d4
SN		 74 I40E_VSI_STAT("rx_unicast", eth_stats.rx_unicast),
75 I40E_VSI_STAT("tx_unicast", eth_stats.tx_unicast),
76 I40E_VSI_STAT("rx_multicast", eth_stats.rx_multicast),
77 I40E_VSI_STAT("tx_multicast", eth_stats.tx_multicast),
41a9e55c
SN		 78 I40E_VSI_STAT("rx_broadcast", eth_stats.rx_broadcast),
79 I40E_VSI_STAT("tx_broadcast", eth_stats.tx_broadcast),
418631d4 80 I40E_VSI_STAT("rx_unknown_protocol", eth_stats.rx_unknown_protocol),
2fc3d715 81 I40E_VSI_STAT("tx_linearize", tx_linearize),
164c9f54 82 I40E_VSI_STAT("tx_force_wb", tx_force_wb),
3f76d01f 83 I40E_VSI_STAT("tx_busy", tx_busy),
c40918c3
JB		 84 I40E_VSI_STAT("rx_alloc_fail", rx_buf_failed),
85 I40E_VSI_STAT("rx_pg_alloc_fail", rx_page_failed),
41a9e55c
SN		 86};
87
c7d05ca8
JB		 88/* These PF_STATs might look like duplicates of some NETDEV_STATs,
89 * but they are separate. This device supports Virtualization, and
90 * as such might have several netdevs supporting VMDq and FCoE going
91 * through a single port. The NETDEV_STATs are for individual netdevs
92 * seen at the top of the stack, and the PF_STATs are for the physical
93 * function at the bottom of the stack hosting those netdevs.
94 *
95 * The PF_STATs are appended to the netdev stats only when ethtool -S
96 * is queried on the base PF netdev, not on the VMDq or FCoE netdev.
97 */
fe180a5e 98static const struct i40e_stats i40e_gstrings_stats[] = {
bf1c39e6
JK		 99 I40E_PF_STAT("port.rx_bytes", stats.eth.rx_bytes),
100 I40E_PF_STAT("port.tx_bytes", stats.eth.tx_bytes),
101 I40E_PF_STAT("port.rx_unicast", stats.eth.rx_unicast),
102 I40E_PF_STAT("port.tx_unicast", stats.eth.tx_unicast),
103 I40E_PF_STAT("port.rx_multicast", stats.eth.rx_multicast),
104 I40E_PF_STAT("port.tx_multicast", stats.eth.tx_multicast),
105 I40E_PF_STAT("port.rx_broadcast", stats.eth.rx_broadcast),
106 I40E_PF_STAT("port.tx_broadcast", stats.eth.tx_broadcast),
107 I40E_PF_STAT("port.tx_errors", stats.eth.tx_errors),
108 I40E_PF_STAT("port.rx_dropped", stats.eth.rx_discards),
109 I40E_PF_STAT("port.tx_dropped_link_down", stats.tx_dropped_link_down),
110 I40E_PF_STAT("port.rx_crc_errors", stats.crc_errors),
111 I40E_PF_STAT("port.illegal_bytes", stats.illegal_bytes),
112 I40E_PF_STAT("port.mac_local_faults", stats.mac_local_faults),
113 I40E_PF_STAT("port.mac_remote_faults", stats.mac_remote_faults),
114 I40E_PF_STAT("port.tx_timeout", tx_timeout_count),
115 I40E_PF_STAT("port.rx_csum_bad", hw_csum_rx_error),
116 I40E_PF_STAT("port.rx_length_errors", stats.rx_length_errors),
117 I40E_PF_STAT("port.link_xon_rx", stats.link_xon_rx),
118 I40E_PF_STAT("port.link_xoff_rx", stats.link_xoff_rx),
119 I40E_PF_STAT("port.link_xon_tx", stats.link_xon_tx),
120 I40E_PF_STAT("port.link_xoff_tx", stats.link_xoff_tx),
121 I40E_PF_STAT("port.rx_size_64", stats.rx_size_64),
122 I40E_PF_STAT("port.rx_size_127", stats.rx_size_127),
123 I40E_PF_STAT("port.rx_size_255", stats.rx_size_255),
124 I40E_PF_STAT("port.rx_size_511", stats.rx_size_511),
125 I40E_PF_STAT("port.rx_size_1023", stats.rx_size_1023),
126 I40E_PF_STAT("port.rx_size_1522", stats.rx_size_1522),
127 I40E_PF_STAT("port.rx_size_big", stats.rx_size_big),
128 I40E_PF_STAT("port.tx_size_64", stats.tx_size_64),
129 I40E_PF_STAT("port.tx_size_127", stats.tx_size_127),
130 I40E_PF_STAT("port.tx_size_255", stats.tx_size_255),
131 I40E_PF_STAT("port.tx_size_511", stats.tx_size_511),
132 I40E_PF_STAT("port.tx_size_1023", stats.tx_size_1023),
133 I40E_PF_STAT("port.tx_size_1522", stats.tx_size_1522),
134 I40E_PF_STAT("port.tx_size_big", stats.tx_size_big),
135 I40E_PF_STAT("port.rx_undersize", stats.rx_undersize),
136 I40E_PF_STAT("port.rx_fragments", stats.rx_fragments),
137 I40E_PF_STAT("port.rx_oversize", stats.rx_oversize),
138 I40E_PF_STAT("port.rx_jabber", stats.rx_jabber),
139 I40E_PF_STAT("port.VF_admin_queue_requests", vf_aq_requests),
140 I40E_PF_STAT("port.arq_overflows", arq_overflows),
141 I40E_PF_STAT("port.tx_hwtstamp_timeouts", tx_hwtstamp_timeouts),
142 I40E_PF_STAT("port.rx_hwtstamp_cleared", rx_hwtstamp_cleared),
143 I40E_PF_STAT("port.tx_hwtstamp_skipped", tx_hwtstamp_skipped),
144 I40E_PF_STAT("port.fdir_flush_cnt", fd_flush_cnt),
145 I40E_PF_STAT("port.fdir_atr_match", stats.fd_atr_match),
146 I40E_PF_STAT("port.fdir_atr_tunnel_match", stats.fd_atr_tunnel_match),
147 I40E_PF_STAT("port.fdir_atr_status", stats.fd_atr_status),
148 I40E_PF_STAT("port.fdir_sb_match", stats.fd_sb_match),
149 I40E_PF_STAT("port.fdir_sb_status", stats.fd_sb_status),
433c47de 150
bee5af7e 151 /* LPI stats */
bf1c39e6
JK		 152 I40E_PF_STAT("port.tx_lpi_status", stats.tx_lpi_status),
153 I40E_PF_STAT("port.rx_lpi_status", stats.rx_lpi_status),
154 I40E_PF_STAT("port.tx_lpi_count", stats.tx_lpi_count),
155 I40E_PF_STAT("port.rx_lpi_count", stats.rx_lpi_count),
c7d05ca8
JB		 156};
157
f25848d4
JK		 158struct i40e_pfc_stats {
159 u64 priority_xon_rx;
160 u64 priority_xoff_rx;
161 u64 priority_xon_tx;
162 u64 priority_xoff_tx;
163 u64 priority_xon_2_xoff;
164};
165
166static const struct i40e_stats i40e_gstrings_pfc_stats[] = {
167 I40E_PFC_STAT("port.tx_priority_%u_xon_tx", priority_xon_tx),
168 I40E_PFC_STAT("port.tx_priority_%u_xoff_tx", priority_xoff_tx),
169 I40E_PFC_STAT("port.rx_priority_%u_xon_rx", priority_xon_rx),
170 I40E_PFC_STAT("port.rx_priority_%u_xoff_rx", priority_xoff_rx),
171 I40E_PFC_STAT("port.rx_priority_%u_xon_2_xoff", priority_xon_2_xoff),
172};
173
b8312365
JK		 174/* We use num_tx_queues here as a proxy for the maximum number of queues
175 * available because we always allocate queues symmetrically.
176 */
177#define I40E_MAX_NUM_QUEUES(n) ((n)->num_tx_queues)
178#define I40E_QUEUE_STATS_LEN(n) \
179 (I40E_MAX_NUM_QUEUES(n) \
31cd840e
SN		 180 * 2 /* Tx and Rx together */ \
181 * (sizeof(struct i40e_queue_stats) / sizeof(u64)))
c7d05ca8 182#define I40E_GLOBAL_STATS_LEN ARRAY_SIZE(i40e_gstrings_stats)
132ee00e 183#define I40E_NETDEV_STATS_LEN ARRAY_SIZE(i40e_gstrings_net_stats)
41a9e55c 184#define I40E_MISC_STATS_LEN ARRAY_SIZE(i40e_gstrings_misc_stats)
132ee00e 185#define I40E_VSI_STATS_LEN(n) (I40E_NETDEV_STATS_LEN + \
41a9e55c 186 I40E_MISC_STATS_LEN + \
c7d05ca8 187 I40E_QUEUE_STATS_LEN((n)))
f25848d4
JK		 188
189#define I40E_PFC_STATS_LEN (ARRAY_SIZE(i40e_gstrings_pfc_stats) * \
190 I40E_MAX_USER_PRIORITY)
1510ae0b
JK		 191
192#define I40E_VEB_STATS_LEN (ARRAY_SIZE(i40e_gstrings_veb_stats) + \
193 (ARRAY_SIZE(i40e_gstrings_veb_tc_stats) * \
194 I40E_MAX_TRAFFIC_CLASS))
195
c7d05ca8
JB		 196#define I40E_PF_STATS_LEN(n) (I40E_GLOBAL_STATS_LEN + \
197 I40E_PFC_STATS_LEN + \
1510ae0b 198 I40E_VEB_STATS_LEN + \
c7d05ca8
JB		 199 I40E_VSI_STATS_LEN((n)))
200
201enum i40e_ethtool_test_id {
202 I40E_ETH_TEST_REG = 0,
203 I40E_ETH_TEST_EEPROM,
204 I40E_ETH_TEST_INTR,
c7d05ca8
JB		 205 I40E_ETH_TEST_LINK,
206};
207
208static const char i40e_gstrings_test[][ETH_GSTRING_LEN] = {
209 "Register test (offline)",
210 "Eeprom test (offline)",
211 "Interrupt test (offline)",
c7d05ca8
JB		 212 "Link test (on/offline)"
213};
214
215#define I40E_TEST_LEN (sizeof(i40e_gstrings_test) / ETH_GSTRING_LEN)
216
aca955d8
AD		 217struct i40e_priv_flags {
218 char flag_string[ETH_GSTRING_LEN];
219 u64 flag;
220 bool read_only;
b5569892
ASJ		 221};
222
aca955d8
AD		 223#define I40E_PRIV_FLAG(_name, _flag, _read_only) { \
224 .flag_string = _name, \
225 .flag = _flag, \
226 .read_only = _read_only, \
227}
228
229static const struct i40e_priv_flags i40e_gstrings_priv_flags[] = {
230 /* NOTE: MFP setting cannot be changed */
231 I40E_PRIV_FLAG("MFP", I40E_FLAG_MFP_ENABLED, 1),
232 I40E_PRIV_FLAG("LinkPolling", I40E_FLAG_LINK_POLLING_ENABLED, 0),
233 I40E_PRIV_FLAG("flow-director-atr", I40E_FLAG_FD_ATR_ENABLED, 0),
234 I40E_PRIV_FLAG("veb-stats", I40E_FLAG_VEB_STATS_ENABLED, 0),
6964e53f 235 I40E_PRIV_FLAG("hw-atr-eviction", I40E_FLAG_HW_ATR_EVICT_ENABLED, 0),
c3880bd1
MS		 236 I40E_PRIV_FLAG("link-down-on-close",
237 I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED, 0),
c424d4a3 238 I40E_PRIV_FLAG("legacy-rx", I40E_FLAG_LEGACY_RX, 0),
64615b54
MW		 239 I40E_PRIV_FLAG("disable-source-pruning",
240 I40E_FLAG_SOURCE_PRUNING_DISABLED, 0),
c61c8fe1 241 I40E_PRIV_FLAG("disable-fw-lldp", I40E_FLAG_DISABLE_FW_LLDP, 0),
aca955d8
AD		 242};
243
244#define I40E_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gstrings_priv_flags)
b5569892 245
d182a5ca 246/* Private flags with a global effect, restricted to PF 0 */
aca955d8
AD		 247static const struct i40e_priv_flags i40e_gl_gstrings_priv_flags[] = {
248 I40E_PRIV_FLAG("vf-true-promisc-support",
249 I40E_FLAG_TRUE_PROMISC_SUPPORT, 0),
7e45ab44
GR		 250};
251
aca955d8 252#define I40E_GL_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gl_gstrings_priv_flags)
7e45ab44 253
f0d8c733
SN		 254/**
255 * i40e_partition_setting_complaint - generic complaint for MFP restriction
256 * @pf: the PF struct
257 **/
258static void i40e_partition_setting_complaint(struct i40e_pf *pf)
259{
260 dev_info(&pf->pdev->dev,
261 "The link settings are allowed to be changed only from the first partition of a given port. Please switch to the first partition in order to change the setting.\n");
262}
263
06566e5d
CS		 264/**
265 * i40e_phy_type_to_ethtool - convert the phy_types to ethtool link modes
52e2d02e 266 * @pf: PF struct with phy_types
1eaae519 267 * @ks: ethtool link ksettings struct to fill out
06566e5d
CS		 268 *
269 **/
1eaae519
AB		 270static void i40e_phy_type_to_ethtool(struct i40e_pf *pf,
271 struct ethtool_link_ksettings *ks)
06566e5d 272{
2853704f 273 struct i40e_link_status *hw_link_info = &pf->hw.phy.link_info;
3123237a
CW		 274 u64 phy_types = pf->hw.phy.phy_types;
275
1eaae519
AB		 276 ethtool_link_ksettings_zero_link_mode(ks, supported);
277 ethtool_link_ksettings_zero_link_mode(ks, advertising);
06566e5d
CS		 278
279 if (phy_types & I40E_CAP_PHY_TYPE_SGMII) {
1eaae519
AB		 280 ethtool_link_ksettings_add_link_mode(ks, supported,
281 1000baseT_Full);
2853704f 282 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
1eaae519
AB		 283 ethtool_link_ksettings_add_link_mode(ks, advertising,
284 1000baseT_Full);
d36e41dc 285 if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) {
1eaae519
AB		 286 ethtool_link_ksettings_add_link_mode(ks, supported,
287 100baseT_Full);
288 ethtool_link_ksettings_add_link_mode(ks, advertising,
289 100baseT_Full);
06566e5d
CS		 290 }
291 }
292 if (phy_types & I40E_CAP_PHY_TYPE_XAUI ||
293 phy_types & I40E_CAP_PHY_TYPE_XFI ||
294 phy_types & I40E_CAP_PHY_TYPE_SFI ||
295 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SFPP_CU ||
1eaae519
AB		 296 phy_types & I40E_CAP_PHY_TYPE_10GBASE_AOC) {
297 ethtool_link_ksettings_add_link_mode(ks, supported,
298 10000baseT_Full);
2853704f 299 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
1eaae519
AB		 300 ethtool_link_ksettings_add_link_mode(ks, advertising,
301 10000baseT_Full);
302 }
303 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_T) {
304 ethtool_link_ksettings_add_link_mode(ks, supported,
305 10000baseT_Full);
2853704f 306 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
1eaae519
AB		 307 ethtool_link_ksettings_add_link_mode(ks, advertising,
308 10000baseT_Full);
06566e5d
CS		 309 }
310 if (phy_types & I40E_CAP_PHY_TYPE_XLAUI ||
311 phy_types & I40E_CAP_PHY_TYPE_XLPPI ||
312 phy_types & I40E_CAP_PHY_TYPE_40GBASE_AOC)
1eaae519
AB		 313 ethtool_link_ksettings_add_link_mode(ks, supported,
314 40000baseCR4_Full);
06566e5d
CS		 315 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU ||
316 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4) {
1eaae519
AB		 317 ethtool_link_ksettings_add_link_mode(ks, supported,
318 40000baseCR4_Full);
2853704f 319 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_40GB)
1eaae519
AB		 320 ethtool_link_ksettings_add_link_mode(ks, advertising,
321 40000baseCR4_Full);
06566e5d 322 }
01a7a9fe 323 if (phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) {
1eaae519
AB		 324 ethtool_link_ksettings_add_link_mode(ks, supported,
325 100baseT_Full);
2853704f 326 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB)
1eaae519
AB		 327 ethtool_link_ksettings_add_link_mode(ks, advertising,
328 100baseT_Full);
06566e5d 329 }
1eaae519
AB		 330 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_T) {
331 ethtool_link_ksettings_add_link_mode(ks, supported,
332 1000baseT_Full);
2853704f 333 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
1eaae519
AB		 334 ethtool_link_ksettings_add_link_mode(ks, advertising,
335 1000baseT_Full);
06566e5d
CS		 336 }
337 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_SR4)
1eaae519
AB		 338 ethtool_link_ksettings_add_link_mode(ks, supported,
339 40000baseSR4_Full);
06566e5d 340 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_LR4)
1eaae519
AB		 341 ethtool_link_ksettings_add_link_mode(ks, supported,
342 40000baseLR4_Full);
06566e5d 343 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4) {
1eaae519
AB		 344 ethtool_link_ksettings_add_link_mode(ks, supported,
345 40000baseLR4_Full);
346 ethtool_link_ksettings_add_link_mode(ks, advertising,
347 40000baseLR4_Full);
06566e5d
CS		 348 }
349 if (phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2) {
1eaae519
AB		 350 ethtool_link_ksettings_add_link_mode(ks, supported,
351 20000baseKR2_Full);
2853704f 352 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_20GB)
1eaae519
AB		 353 ethtool_link_ksettings_add_link_mode(ks, advertising,
354 20000baseKR2_Full);
06566e5d 355 }
06566e5d 356 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4) {
1eaae519
AB		 357 ethtool_link_ksettings_add_link_mode(ks, supported,
358 10000baseKX4_Full);
2853704f 359 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
1eaae519
AB		 360 ethtool_link_ksettings_add_link_mode(ks, advertising,
361 10000baseKX4_Full);
06566e5d 362 }
6987bd25
AB		 363 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR &&
364 !(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER)) {
1eaae519
AB		 365 ethtool_link_ksettings_add_link_mode(ks, supported,
366 10000baseKR_Full);
2853704f 367 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
1eaae519
AB		 368 ethtool_link_ksettings_add_link_mode(ks, advertising,
369 10000baseKR_Full);
06566e5d 370 }
6987bd25
AB		 371 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX &&
372 !(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER)) {
1eaae519
AB		 373 ethtool_link_ksettings_add_link_mode(ks, supported,
374 1000baseKX_Full);
2853704f 375 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
1eaae519
AB		 376 ethtool_link_ksettings_add_link_mode(ks, advertising,
377 1000baseKX_Full);
06566e5d 378 }
1eaae519
AB		 379 /* need to add 25G PHY types */
380 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR) {
381 ethtool_link_ksettings_add_link_mode(ks, supported,
382 25000baseKR_Full);
383 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB)
384 ethtool_link_ksettings_add_link_mode(ks, advertising,
385 25000baseKR_Full);
386 }
387 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR) {
388 ethtool_link_ksettings_add_link_mode(ks, supported,
389 25000baseCR_Full);
390 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB)
391 ethtool_link_ksettings_add_link_mode(ks, advertising,
392 25000baseCR_Full);
393 }
394 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR ||
3123237a 395 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR) {
1eaae519
AB		 396 ethtool_link_ksettings_add_link_mode(ks, supported,
397 25000baseSR_Full);
398 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB)
399 ethtool_link_ksettings_add_link_mode(ks, advertising,
400 25000baseSR_Full);
401 }
402 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_AOC ||
403 phy_types & I40E_CAP_PHY_TYPE_25GBASE_ACC) {
404 ethtool_link_ksettings_add_link_mode(ks, supported,
405 25000baseCR_Full);
406 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB)
407 ethtool_link_ksettings_add_link_mode(ks, advertising,
408 25000baseCR_Full);
409 }
410 /* need to add new 10G PHY types */
411 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 ||
412 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU) {
413 ethtool_link_ksettings_add_link_mode(ks, supported,
414 10000baseCR_Full);
415 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
416 ethtool_link_ksettings_add_link_mode(ks, advertising,
417 10000baseCR_Full);
418 }
419 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR) {
420 ethtool_link_ksettings_add_link_mode(ks, supported,
421 10000baseSR_Full);
422 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
423 ethtool_link_ksettings_add_link_mode(ks, advertising,
424 10000baseSR_Full);
425 }
426 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR) {
427 ethtool_link_ksettings_add_link_mode(ks, supported,
428 10000baseLR_Full);
429 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
430 ethtool_link_ksettings_add_link_mode(ks, advertising,
431 10000baseLR_Full);
432 }
433 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX ||
434 phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX ||
435 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL) {
436 ethtool_link_ksettings_add_link_mode(ks, supported,
437 1000baseX_Full);
438 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
439 ethtool_link_ksettings_add_link_mode(ks, advertising,
440 1000baseX_Full);
06566e5d 441 }
6987bd25
AB		 442 /* Autoneg PHY types */
443 if (phy_types & I40E_CAP_PHY_TYPE_SGMII ||
444 phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4 ||
445 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU ||
446 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4 ||
3123237a 447 phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR ||
6987bd25
AB		 448 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR ||
449 phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR ||
450 phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR ||
451 phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2 ||
452 phy_types & I40E_CAP_PHY_TYPE_10GBASE_T ||
453 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR ||
454 phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR ||
455 phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4 ||
456 phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR ||
457 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU ||
458 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 ||
459 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL ||
460 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T ||
461 phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX ||
462 phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX ||
463 phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX ||
464 phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) {
1eaae519
AB		 465 ethtool_link_ksettings_add_link_mode(ks, supported,
466 Autoneg);
467 ethtool_link_ksettings_add_link_mode(ks, advertising,
468 Autoneg);
3123237a 469 }
06566e5d
CS		 470}
471
c7d05ca8 472/**
e827845c
CS		 473 * i40e_get_settings_link_up - Get the Link settings for when link is up
474 * @hw: hw structure
1c142e1c 475 * @ks: ethtool ksettings to fill in
c7d05ca8 476 * @netdev: network interface device structure
1c142e1c 477 * @pf: pointer to physical function struct
c7d05ca8 478 **/
e827845c 479static void i40e_get_settings_link_up(struct i40e_hw *hw,
1c142e1c 480 struct ethtool_link_ksettings *ks,
3b6c2179
CS		 481 struct net_device *netdev,
482 struct i40e_pf *pf)
c7d05ca8 483{
c7d05ca8 484 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
1eaae519 485 struct ethtool_link_ksettings cap_ksettings;
c7d05ca8
JB		 486 u32 link_speed = hw_link_info->link_speed;
487
e827845c 488 /* Initialize supported and advertised settings based on phy settings */
c7d05ca8
JB		 489 switch (hw_link_info->phy_type) {
490 case I40E_PHY_TYPE_40GBASE_CR4:
491 case I40E_PHY_TYPE_40GBASE_CR4_CU:
79f04a3a
AB		 492 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
493 ethtool_link_ksettings_add_link_mode(ks, supported,
494 40000baseCR4_Full);
495 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
496 ethtool_link_ksettings_add_link_mode(ks, advertising,
497 40000baseCR4_Full);
c7d05ca8 498 break;
e827845c
CS		 499 case I40E_PHY_TYPE_XLAUI:
500 case I40E_PHY_TYPE_XLPPI:
180204c7 501 case I40E_PHY_TYPE_40GBASE_AOC:
79f04a3a
AB		 502 ethtool_link_ksettings_add_link_mode(ks, supported,
503 40000baseCR4_Full);
e827845c 504 break;
c7d05ca8 505 case I40E_PHY_TYPE_40GBASE_SR4:
79f04a3a
AB		 506 ethtool_link_ksettings_add_link_mode(ks, supported,
507 40000baseSR4_Full);
c7d05ca8
JB		 508 break;
509 case I40E_PHY_TYPE_40GBASE_LR4:
79f04a3a
AB		 510 ethtool_link_ksettings_add_link_mode(ks, supported,
511 40000baseLR4_Full);
c7d05ca8 512 break;
79f04a3a
AB		 513 case I40E_PHY_TYPE_25GBASE_SR:
514 case I40E_PHY_TYPE_25GBASE_LR:
4e91bcd5
JB		 515 case I40E_PHY_TYPE_10GBASE_SR:
516 case I40E_PHY_TYPE_10GBASE_LR:
124ed15b
CS		 517 case I40E_PHY_TYPE_1000BASE_SX:
518 case I40E_PHY_TYPE_1000BASE_LX:
79f04a3a
AB		 519 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
520 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
521 ethtool_link_ksettings_add_link_mode(ks, supported,
522 25000baseSR_Full);
523 ethtool_link_ksettings_add_link_mode(ks, advertising,
524 25000baseSR_Full);
525 ethtool_link_ksettings_add_link_mode(ks, supported,
526 10000baseSR_Full);
527 ethtool_link_ksettings_add_link_mode(ks, advertising,
528 10000baseSR_Full);
529 ethtool_link_ksettings_add_link_mode(ks, supported,
530 10000baseLR_Full);
531 ethtool_link_ksettings_add_link_mode(ks, advertising,
532 10000baseLR_Full);
533 ethtool_link_ksettings_add_link_mode(ks, supported,
534 1000baseX_Full);
535 ethtool_link_ksettings_add_link_mode(ks, advertising,
536 1000baseX_Full);
537 ethtool_link_ksettings_add_link_mode(ks, supported,
538 10000baseT_Full);
0a862b43
CS		 539 if (hw_link_info->module_type[2] &
540 I40E_MODULE_TYPE_1000BASE_SX ||
541 hw_link_info->module_type[2] &
542 I40E_MODULE_TYPE_1000BASE_LX) {
79f04a3a
AB		 543 ethtool_link_ksettings_add_link_mode(ks, supported,
544 1000baseT_Full);
0a862b43
CS		 545 if (hw_link_info->requested_speeds &
546 I40E_LINK_SPEED_1GB)
79f04a3a
AB		 547 ethtool_link_ksettings_add_link_mode(
548 ks, advertising, 1000baseT_Full);
0a862b43 549 }
e827845c 550 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
79f04a3a
AB		 551 ethtool_link_ksettings_add_link_mode(ks, advertising,
552 10000baseT_Full);
e827845c 553 break;
4e91bcd5 554 case I40E_PHY_TYPE_10GBASE_T:
e827845c 555 case I40E_PHY_TYPE_1000BASE_T:
06566e5d 556 case I40E_PHY_TYPE_100BASE_TX:
79f04a3a
AB		 557 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
558 ethtool_link_ksettings_add_link_mode(ks, supported,
559 10000baseT_Full);
560 ethtool_link_ksettings_add_link_mode(ks, supported,
561 1000baseT_Full);
562 ethtool_link_ksettings_add_link_mode(ks, supported,
563 100baseT_Full);
564 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
e827845c 565 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
79f04a3a
AB		 566 ethtool_link_ksettings_add_link_mode(ks, advertising,
567 10000baseT_Full);
e827845c 568 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
79f04a3a
AB		 569 ethtool_link_ksettings_add_link_mode(ks, advertising,
570 1000baseT_Full);
06566e5d 571 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB)
79f04a3a
AB		 572 ethtool_link_ksettings_add_link_mode(ks, advertising,
573 100baseT_Full);
3b6c2179 574 break;
48becae6 575 case I40E_PHY_TYPE_1000BASE_T_OPTICAL:
79f04a3a
AB		 576 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
577 ethtool_link_ksettings_add_link_mode(ks, supported,
578 1000baseT_Full);
579 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
580 ethtool_link_ksettings_add_link_mode(ks, advertising,
581 1000baseT_Full);
48becae6 582 break;
e827845c
CS		 583 case I40E_PHY_TYPE_10GBASE_CR1_CU:
584 case I40E_PHY_TYPE_10GBASE_CR1:
79f04a3a
AB		 585 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
586 ethtool_link_ksettings_add_link_mode(ks, supported,
587 10000baseT_Full);
588 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
589 ethtool_link_ksettings_add_link_mode(ks, advertising,
590 10000baseT_Full);
4e91bcd5
JB		 591 break;
592 case I40E_PHY_TYPE_XAUI:
593 case I40E_PHY_TYPE_XFI:
594 case I40E_PHY_TYPE_SFI:
595 case I40E_PHY_TYPE_10GBASE_SFPP_CU:
180204c7 596 case I40E_PHY_TYPE_10GBASE_AOC:
79f04a3a
AB		 597 ethtool_link_ksettings_add_link_mode(ks, supported,
598 10000baseT_Full);
599 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
600 ethtool_link_ksettings_add_link_mode(ks, advertising,
601 10000baseT_Full);
4e91bcd5 602 break;
4e91bcd5 603 case I40E_PHY_TYPE_SGMII:
79f04a3a
AB		 604 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
605 ethtool_link_ksettings_add_link_mode(ks, supported,
606 1000baseT_Full);
e827845c 607 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
79f04a3a
AB		 608 ethtool_link_ksettings_add_link_mode(ks, advertising,
609 1000baseT_Full);
d36e41dc 610 if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) {
79f04a3a
AB		 611 ethtool_link_ksettings_add_link_mode(ks, supported,
612 100baseT_Full);
3b6c2179
CS		 613 if (hw_link_info->requested_speeds &
614 I40E_LINK_SPEED_100MB)
79f04a3a
AB		 615 ethtool_link_ksettings_add_link_mode(
616 ks, advertising, 100baseT_Full);
3b6c2179 617 }
4e91bcd5 618 break;
fc72dbce 619 case I40E_PHY_TYPE_40GBASE_KR4:
79f04a3a 620 case I40E_PHY_TYPE_25GBASE_KR:
fc72dbce
CS		 621 case I40E_PHY_TYPE_20GBASE_KR2:
622 case I40E_PHY_TYPE_10GBASE_KR:
623 case I40E_PHY_TYPE_10GBASE_KX4:
624 case I40E_PHY_TYPE_1000BASE_KX:
79f04a3a
AB		 625 ethtool_link_ksettings_add_link_mode(ks, supported,
626 40000baseKR4_Full);
627 ethtool_link_ksettings_add_link_mode(ks, supported,
628 25000baseKR_Full);
629 ethtool_link_ksettings_add_link_mode(ks, supported,
630 20000baseKR2_Full);
631 ethtool_link_ksettings_add_link_mode(ks, supported,
632 10000baseKR_Full);
633 ethtool_link_ksettings_add_link_mode(ks, supported,
634 10000baseKX4_Full);
635 ethtool_link_ksettings_add_link_mode(ks, supported,
636 1000baseKX_Full);
637 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
638 ethtool_link_ksettings_add_link_mode(ks, advertising,
639 40000baseKR4_Full);
640 ethtool_link_ksettings_add_link_mode(ks, advertising,
641 25000baseKR_Full);
642 ethtool_link_ksettings_add_link_mode(ks, advertising,
643 20000baseKR2_Full);
644 ethtool_link_ksettings_add_link_mode(ks, advertising,
645 10000baseKR_Full);
646 ethtool_link_ksettings_add_link_mode(ks, advertising,
647 10000baseKX4_Full);
648 ethtool_link_ksettings_add_link_mode(ks, advertising,
649 1000baseKX_Full);
650 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
fc72dbce 651 break;
3123237a 652 case I40E_PHY_TYPE_25GBASE_CR:
79f04a3a
AB		 653 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
654 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
655 ethtool_link_ksettings_add_link_mode(ks, supported,
656 25000baseCR_Full);
657 ethtool_link_ksettings_add_link_mode(ks, advertising,
658 25000baseCR_Full);
659 break;
211b4c14
SM		 660 case I40E_PHY_TYPE_25GBASE_AOC:
661 case I40E_PHY_TYPE_25GBASE_ACC:
79f04a3a
AB		 662 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
663 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
664 ethtool_link_ksettings_add_link_mode(ks, supported,
665 25000baseCR_Full);
666
667 ethtool_link_ksettings_add_link_mode(ks, advertising,
668 25000baseCR_Full);
669 ethtool_link_ksettings_add_link_mode(ks, supported,
670 10000baseCR_Full);
671 ethtool_link_ksettings_add_link_mode(ks, advertising,
672 10000baseCR_Full);
3123237a 673 break;
4e91bcd5
JB		 674 default:
675 /* if we got here and link is up something bad is afoot */
a03af69f
AB		 676 netdev_info(netdev,
677 "WARNING: Link is up but PHY type 0x%x is not recognized.\n",
124ed15b 678 hw_link_info->phy_type);
c7d05ca8
JB		 679 }
680
06566e5d 681 /* Now that we've worked out everything that could be supported by the
91a5c447
AB		 682 * current PHY type, get what is supported by the NVM and intersect
683 * them to get what is truly supported
06566e5d 684 */
1eaae519
AB		 685 memset(&cap_ksettings, 0, sizeof(struct ethtool_link_ksettings));
686 i40e_phy_type_to_ethtool(pf, &cap_ksettings);
687 ethtool_intersect_link_masks(ks, &cap_ksettings);
06566e5d 688
e827845c
CS		 689 /* Set speed and duplex */
690 switch (link_speed) {
691 case I40E_LINK_SPEED_40GB:
1c142e1c 692 ks->base.speed = SPEED_40000;
e827845c 693 break;
3123237a 694 case I40E_LINK_SPEED_25GB:
1c142e1c 695 ks->base.speed = SPEED_25000;
3123237a 696 break;
ae24b409 697 case I40E_LINK_SPEED_20GB:
1c142e1c 698 ks->base.speed = SPEED_20000;
ae24b409 699 break;
e827845c 700 case I40E_LINK_SPEED_10GB:
1c142e1c 701 ks->base.speed = SPEED_10000;
e827845c
CS		 702 break;
703 case I40E_LINK_SPEED_1GB:
1c142e1c 704 ks->base.speed = SPEED_1000;
e827845c
CS		 705 break;
706 case I40E_LINK_SPEED_100MB:
1c142e1c 707 ks->base.speed = SPEED_100;
e827845c
CS		 708 break;
709 default:
710 break;
711 }
1c142e1c 712 ks->base.duplex = DUPLEX_FULL;
e827845c
CS		 713}
714
715/**
716 * i40e_get_settings_link_down - Get the Link settings for when link is down
717 * @hw: hw structure
1c142e1c
AB		 718 * @ks: ethtool ksettings to fill in
719 * @pf: pointer to physical function struct
e827845c
CS		 720 *
721 * Reports link settings that can be determined when link is down
722 **/
723static void i40e_get_settings_link_down(struct i40e_hw *hw,
1c142e1c 724 struct ethtool_link_ksettings *ks,
3b6c2179 725 struct i40e_pf *pf)
e827845c 726{
e827845c 727 /* link is down and the driver needs to fall back on
fc72dbce 728 * supported phy types to figure out what info to display
e827845c 729 */
1eaae519 730 i40e_phy_type_to_ethtool(pf, ks);
e827845c
CS		 731
732 /* With no link speed and duplex are unknown */
1c142e1c
AB		 733 ks->base.speed = SPEED_UNKNOWN;
734 ks->base.duplex = DUPLEX_UNKNOWN;
e827845c
CS		 735}
736
737/**
1c142e1c 738 * i40e_get_link_ksettings - Get Link Speed and Duplex settings
e827845c 739 * @netdev: network interface device structure
1c142e1c 740 * @ks: ethtool ksettings
e827845c
CS		 741 *
742 * Reports speed/duplex settings based on media_type
743 **/
a7f90940 744static int i40e_get_link_ksettings(struct net_device *netdev,
1c142e1c 745 struct ethtool_link_ksettings *ks)
e827845c
CS		 746{
747 struct i40e_netdev_priv *np = netdev_priv(netdev);
748 struct i40e_pf *pf = np->vsi->back;
749 struct i40e_hw *hw = &pf->hw;
750 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
751 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP;
5f434994
AB		 752
753 ethtool_link_ksettings_zero_link_mode(ks, supported);
754 ethtool_link_ksettings_zero_link_mode(ks, advertising);
e827845c
CS		 755
756 if (link_up)
1c142e1c 757 i40e_get_settings_link_up(hw, ks, netdev, pf);
e827845c 758 else
1c142e1c 759 i40e_get_settings_link_down(hw, ks, pf);
e827845c
CS		 760
761 /* Now set the settings that don't rely on link being up/down */
e827845c 762 /* Set autoneg settings */
1c142e1c
AB		 763 ks->base.autoneg = ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ?
764 AUTONEG_ENABLE : AUTONEG_DISABLE);
c7d05ca8 765
a03af69f 766 /* Set media type settings */
c9a3d471
JB		 767 switch (hw->phy.media_type) {
768 case I40E_MEDIA_TYPE_BACKPLANE:
a03af69f
AB		 769 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
770 ethtool_link_ksettings_add_link_mode(ks, supported, Backplane);
771 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
1c142e1c 772 ethtool_link_ksettings_add_link_mode(ks, advertising,
a7f90940 773 Backplane);
1c142e1c 774 ks->base.port = PORT_NONE;
c9a3d471
JB		 775 break;
776 case I40E_MEDIA_TYPE_BASET:
1c142e1c
AB		 777 ethtool_link_ksettings_add_link_mode(ks, supported, TP);
778 ethtool_link_ksettings_add_link_mode(ks, advertising, TP);
779 ks->base.port = PORT_TP;
c9a3d471
JB		 780 break;
781 case I40E_MEDIA_TYPE_DA:
782 case I40E_MEDIA_TYPE_CX4:
1c142e1c
AB		 783 ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE);
784 ethtool_link_ksettings_add_link_mode(ks, advertising, FIBRE);
785 ks->base.port = PORT_DA;
c9a3d471
JB		 786 break;
787 case I40E_MEDIA_TYPE_FIBER:
1c142e1c
AB		 788 ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE);
789 ks->base.port = PORT_FIBRE;
c9a3d471
JB		 790 break;
791 case I40E_MEDIA_TYPE_UNKNOWN:
792 default:
1c142e1c 793 ks->base.port = PORT_OTHER;
c9a3d471 794 break;
c7d05ca8
JB		 795 }
796
e827845c 797 /* Set flow control settings */
1c142e1c 798 ethtool_link_ksettings_add_link_mode(ks, supported, Pause);
4e91bcd5 799
e827845c 800 switch (hw->fc.requested_mode) {
4e91bcd5 801 case I40E_FC_FULL:
a03af69f 802 ethtool_link_ksettings_add_link_mode(ks, advertising, Pause);
4e91bcd5
JB		 803 break;
804 case I40E_FC_TX_PAUSE:
1c142e1c 805 ethtool_link_ksettings_add_link_mode(ks, advertising,
a7f90940 806 Asym_Pause);
4e91bcd5
JB		 807 break;
808 case I40E_FC_RX_PAUSE:
a03af69f 809 ethtool_link_ksettings_add_link_mode(ks, advertising, Pause);
1c142e1c 810 ethtool_link_ksettings_add_link_mode(ks, advertising,
a7f90940 811 Asym_Pause);
4e91bcd5
JB		 812 break;
813 default:
5f434994
AB		 814 ethtool_link_ksettings_del_link_mode(ks, advertising, Pause);
815 ethtool_link_ksettings_del_link_mode(ks, advertising,
816 Asym_Pause);
4e91bcd5
JB		 817 break;
818 }
819
c7d05ca8
JB		 820 return 0;
821}
822
bf9c7141 823/**
1c142e1c 824 * i40e_set_link_ksettings - Set Speed and Duplex
bf9c7141 825 * @netdev: network interface device structure
1c142e1c 826 * @ks: ethtool ksettings
bf9c7141
CS		 827 *
828 * Set speed/duplex per media_types advertised/forced
829 **/
a7f90940 830static int i40e_set_link_ksettings(struct net_device *netdev,
1c142e1c 831 const struct ethtool_link_ksettings *ks)
bf9c7141
CS		 832{
833 struct i40e_netdev_priv *np = netdev_priv(netdev);
834 struct i40e_aq_get_phy_abilities_resp abilities;
636b62d7
AB		 835 struct ethtool_link_ksettings safe_ks;
836 struct ethtool_link_ksettings copy_ks;
bf9c7141
CS		 837 struct i40e_aq_set_phy_config config;
838 struct i40e_pf *pf = np->vsi->back;
839 struct i40e_vsi *vsi = np->vsi;
840 struct i40e_hw *hw = &pf->hw;
636b62d7 841 bool autoneg_changed = false;
bf9c7141 842 i40e_status status = 0;
e8d2f4c6 843 int timeout = 50;
bf9c7141 844 int err = 0;
cee91995 845 u8 autoneg;
bf9c7141 846
f0d8c733
SN		 847 /* Changing port settings is not supported if this isn't the
848 * port's controlling PF
849 */
850 if (hw->partition_id != 1) {
851 i40e_partition_setting_complaint(pf);
852 return -EOPNOTSUPP;
853 }
bf9c7141
CS		 854 if (vsi != pf->vsi[pf->lan_vsi])
855 return -EOPNOTSUPP;
bf9c7141
CS		 856 if (hw->phy.media_type != I40E_MEDIA_TYPE_BASET &&
857 hw->phy.media_type != I40E_MEDIA_TYPE_FIBER &&
c57e9f17 858 hw->phy.media_type != I40E_MEDIA_TYPE_BACKPLANE &&
6536227d 859 hw->phy.media_type != I40E_MEDIA_TYPE_DA &&
c57e9f17 860 hw->phy.link_info.link_info & I40E_AQ_LINK_UP)
bf9c7141 861 return -EOPNOTSUPP;
fc72dbce
CS		 862 if (hw->device_id == I40E_DEV_ID_KX_B ||
863 hw->device_id == I40E_DEV_ID_KX_C ||
864 hw->device_id == I40E_DEV_ID_20G_KR2 ||
88244a48 865 hw->device_id == I40E_DEV_ID_20G_KR2_A ||
3f8c8437 866 hw->device_id == I40E_DEV_ID_25G_B ||
88244a48 867 hw->device_id == I40E_DEV_ID_KX_X722) {
fc72dbce
CS		 868 netdev_info(netdev, "Changing settings is not supported on backplane.\n");
869 return -EOPNOTSUPP;
870 }
871
1c142e1c
AB		 872 /* copy the ksettings to copy_ks to avoid modifying the origin */
873 memcpy(&copy_ks, ks, sizeof(struct ethtool_link_ksettings));
a7f90940 874
cee91995
AB		 875 /* save autoneg out of ksettings */
876 autoneg = copy_ks.base.autoneg;
bf9c7141 877
32c23b47
JS		 878 /* get our own copy of the bits to check against */
879 memset(&safe_ks, 0, sizeof(struct ethtool_link_ksettings));
880 safe_ks.base.cmd = copy_ks.base.cmd;
881 safe_ks.base.link_mode_masks_nwords =
882 copy_ks.base.link_mode_masks_nwords;
883 i40e_get_link_ksettings(netdev, &safe_ks);
884
cee91995
AB		 885 /* Get link modes supported by hardware and check against modes
886 * requested by the user. Return an error if unsupported mode was set.
887 */
cee91995
AB		 888 if (!bitmap_subset(copy_ks.link_modes.advertising,
889 safe_ks.link_modes.supported,
890 __ETHTOOL_LINK_MODE_MASK_NBITS))
891 return -EINVAL;
bf9c7141 892
cee91995 893 /* set autoneg back to what it currently is */
1c142e1c 894 copy_ks.base.autoneg = safe_ks.base.autoneg;
bf9c7141 895
cee91995
AB		 896 /* If copy_ks.base and safe_ks.base are not the same now, then they are
897 * trying to set something that we do not support.
bf9c7141 898 */
cee91995
AB		 899 if (memcmp(&copy_ks.base, &safe_ks.base,
900 sizeof(struct ethtool_link_settings)))
bf9c7141
CS		 901 return -EOPNOTSUPP;
902
0da36b97 903 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) {
e8d2f4c6
JK		 904 timeout--;
905 if (!timeout)
906 return -EBUSY;
bf9c7141 907 usleep_range(1000, 2000);
e8d2f4c6 908 }
bf9c7141
CS		 909
910 /* Get the current phy config */
911 status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,
912 NULL);
e8d2f4c6
JK		 913 if (status) {
914 err = -EAGAIN;
915 goto done;
916 }
bf9c7141 917
124ed15b 918 /* Copy abilities to config in case autoneg is not
bf9c7141
CS		 919 * set below
920 */
921 memset(&config, 0, sizeof(struct i40e_aq_set_phy_config));
bf9c7141
CS		 922 config.abilities = abilities.abilities;
923
924 /* Check autoneg */
925 if (autoneg == AUTONEG_ENABLE) {
bf9c7141
CS		 926 /* If autoneg was not already enabled */
927 if (!(hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED)) {
3ce12ee9 928 /* If autoneg is not supported, return error */
1c142e1c
AB		 929 if (!ethtool_link_ksettings_test_link_mode(&safe_ks,
930 supported,
931 Autoneg)) {
3ce12ee9 932 netdev_info(netdev, "Autoneg not supported on this phy\n");
e8d2f4c6
JK		 933 err = -EINVAL;
934 goto done;
3ce12ee9
CS		 935 }
936 /* Autoneg is allowed to change */
bf9c7141
CS		 937 config.abilities = abilities.abilities |
938 I40E_AQ_PHY_ENABLE_AN;
636b62d7 939 autoneg_changed = true;
bf9c7141
CS		 940 }
941 } else {
bf9c7141
CS		 942 /* If autoneg is currently enabled */
943 if (hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED) {
3ce12ee9
CS		 944 /* If autoneg is supported 10GBASE_T is the only PHY
945 * that can disable it, so otherwise return error
946 */
1c142e1c
AB		 947 if (ethtool_link_ksettings_test_link_mode(&safe_ks,
948 supported,
949 Autoneg) &&
3ce12ee9
CS		 950 hw->phy.link_info.phy_type !=
951 I40E_PHY_TYPE_10GBASE_T) {
952 netdev_info(netdev, "Autoneg cannot be disabled on this phy\n");
e8d2f4c6
JK		 953 err = -EINVAL;
954 goto done;
3ce12ee9
CS		 955 }
956 /* Autoneg is allowed to change */
5960d33f 957 config.abilities = abilities.abilities &
bf9c7141 958 ~I40E_AQ_PHY_ENABLE_AN;
636b62d7 959 autoneg_changed = true;
bf9c7141
CS		 960 }
961 }
962
cee91995
AB		 963 if (ethtool_link_ksettings_test_link_mode(ks, advertising,
964 100baseT_Full))
124ed15b 965 config.link_speed |= I40E_LINK_SPEED_100MB;
cee91995
AB		 966 if (ethtool_link_ksettings_test_link_mode(ks, advertising,
967 1000baseT_Full) ||
968 ethtool_link_ksettings_test_link_mode(ks, advertising,
969 1000baseX_Full) ||
970 ethtool_link_ksettings_test_link_mode(ks, advertising,
971 1000baseKX_Full))
124ed15b 972 config.link_speed |= I40E_LINK_SPEED_1GB;
cee91995
AB		 973 if (ethtool_link_ksettings_test_link_mode(ks, advertising,
974 10000baseT_Full) ||
975 ethtool_link_ksettings_test_link_mode(ks, advertising,
976 10000baseKX4_Full) ||
977 ethtool_link_ksettings_test_link_mode(ks, advertising,
978 10000baseKR_Full) ||
979 ethtool_link_ksettings_test_link_mode(ks, advertising,
980 10000baseCR_Full) ||
981 ethtool_link_ksettings_test_link_mode(ks, advertising,
6ee4d322
JP		 982 10000baseSR_Full) ||
983 ethtool_link_ksettings_test_link_mode(ks, advertising,
984 10000baseLR_Full))
124ed15b 985 config.link_speed |= I40E_LINK_SPEED_10GB;
cee91995
AB		 986 if (ethtool_link_ksettings_test_link_mode(ks, advertising,
987 20000baseKR2_Full))
ae24b409 988 config.link_speed |= I40E_LINK_SPEED_20GB;
cee91995
AB		 989 if (ethtool_link_ksettings_test_link_mode(ks, advertising,
990 25000baseCR_Full) ||
991 ethtool_link_ksettings_test_link_mode(ks, advertising,
992 25000baseKR_Full) ||
993 ethtool_link_ksettings_test_link_mode(ks, advertising,
994 25000baseSR_Full))
995 config.link_speed |= I40E_LINK_SPEED_25GB;
996 if (ethtool_link_ksettings_test_link_mode(ks, advertising,
997 40000baseKR4_Full) ||
998 ethtool_link_ksettings_test_link_mode(ks, advertising,
999 40000baseCR4_Full) ||
1000 ethtool_link_ksettings_test_link_mode(ks, advertising,
1001 40000baseSR4_Full) ||
1002 ethtool_link_ksettings_test_link_mode(ks, advertising,
1003 40000baseLR4_Full))
124ed15b 1004 config.link_speed |= I40E_LINK_SPEED_40GB;
bf9c7141 1005
0002e118
CS		 1006 /* If speed didn't get set, set it to what it currently is.
1007 * This is needed because if advertise is 0 (as it is when autoneg
1008 * is disabled) then speed won't get set.
1009 */
1010 if (!config.link_speed)
1011 config.link_speed = abilities.link_speed;
636b62d7 1012 if (autoneg_changed || abilities.link_speed != config.link_speed) {
bf9c7141
CS		 1013 /* copy over the rest of the abilities */
1014 config.phy_type = abilities.phy_type;
b7eaf8f1 1015 config.phy_type_ext = abilities.phy_type_ext;
bf9c7141
CS		 1016 config.eee_capability = abilities.eee_capability;
1017 config.eeer = abilities.eeer_val;
1018 config.low_power_ctrl = abilities.d3_lpan;
b7eaf8f1
HT		 1019 config.fec_config = abilities.fec_cfg_curr_mod_ext_info &
1020 I40E_AQ_PHY_FEC_CONFIG_MASK;
bf9c7141 1021
e827845c
CS		 1022 /* save the requested speeds */
1023 hw->phy.link_info.requested_speeds = config.link_speed;
94128516
CS		 1024 /* set link and auto negotiation so changes take effect */
1025 config.abilities |= I40E_AQ_PHY_ENABLE_ATOMIC_LINK;
1026 /* If link is up put link down */
1027 if (hw->phy.link_info.link_info & I40E_AQ_LINK_UP) {
1028 /* Tell the OS link is going down, the link will go
1029 * back up when fw says it is ready asynchronously
1030 */
c156f856 1031 i40e_print_link_message(vsi, false);
94128516
CS		 1032 netif_carrier_off(netdev);
1033 netif_tx_stop_all_queues(netdev);
1034 }
bf9c7141
CS		 1035
1036 /* make the aq call */
1037 status = i40e_aq_set_phy_config(hw, &config, NULL);
1038 if (status) {
a03af69f
AB		 1039 netdev_info(netdev,
1040 "Set phy config failed, err %s aq_err %s\n",
f1c7e72e
SN		 1041 i40e_stat_str(hw, status),
1042 i40e_aq_str(hw, hw->aq.asq_last_status));
e8d2f4c6
JK		 1043 err = -EAGAIN;
1044 goto done;
bf9c7141
CS		 1045 }
1046
0a862b43 1047 status = i40e_update_link_info(hw);
bf9c7141 1048 if (status)
a03af69f
AB		 1049 netdev_dbg(netdev,
1050 "Updating link info failed with err %s aq_err %s\n",
52e9689e
CS		 1051 i40e_stat_str(hw, status),
1052 i40e_aq_str(hw, hw->aq.asq_last_status));
bf9c7141
CS		 1053
1054 } else {
1055 netdev_info(netdev, "Nothing changed, exiting without setting anything.\n");
1056 }
1057
e8d2f4c6 1058done:
0da36b97 1059 clear_bit(__I40E_CONFIG_BUSY, pf->state);
e8d2f4c6 1060
bf9c7141
CS		 1061 return err;
1062}
1063
a6599721
JB		 1064static int i40e_nway_reset(struct net_device *netdev)
1065{
1066 /* restart autonegotiation */
1067 struct i40e_netdev_priv *np = netdev_priv(netdev);
1068 struct i40e_pf *pf = np->vsi->back;
1069 struct i40e_hw *hw = &pf->hw;
1070 bool link_up = hw->phy.link_info.link_info & I40E_AQ_LINK_UP;
1071 i40e_status ret = 0;
1072
1073 ret = i40e_aq_set_link_restart_an(hw, link_up, NULL);
1074 if (ret) {
f1c7e72e
SN		 1075 netdev_info(netdev, "link restart failed, err %s aq_err %s\n",
1076 i40e_stat_str(hw, ret),
1077 i40e_aq_str(hw, hw->aq.asq_last_status));
a6599721
JB		 1078 return -EIO;
1079 }
1080
1081 return 0;
1082}
1083
c7d05ca8
JB		 1084/**
1085 * i40e_get_pauseparam - Get Flow Control status
f5254429
JK		 1086 * @netdev: netdevice structure
1087 * @pause: buffer to return pause parameters
1088 *
c7d05ca8
JB		 1089 * Return tx/rx-pause status
1090 **/
1091static void i40e_get_pauseparam(struct net_device *netdev,
1092 struct ethtool_pauseparam *pause)
1093{
1094 struct i40e_netdev_priv *np = netdev_priv(netdev);
1095 struct i40e_pf *pf = np->vsi->back;
1096 struct i40e_hw *hw = &pf->hw;
1097 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
4b7698cb 1098 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config;
c7d05ca8
JB		 1099
1100 pause->autoneg =
1101 ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ?
1102 AUTONEG_ENABLE : AUTONEG_DISABLE);
1103
4b7698cb
NP		 1104 /* PFC enabled so report LFC as off */
1105 if (dcbx_cfg->pfc.pfcenable) {
1106 pause->rx_pause = 0;
1107 pause->tx_pause = 0;
1108 return;
1109 }
1110
d52c20b7 1111 if (hw->fc.current_mode == I40E_FC_RX_PAUSE) {
c7d05ca8 1112 pause->rx_pause = 1;
d52c20b7 1113 } else if (hw->fc.current_mode == I40E_FC_TX_PAUSE) {
c7d05ca8 1114 pause->tx_pause = 1;
d52c20b7
JB		 1115 } else if (hw->fc.current_mode == I40E_FC_FULL) {
1116 pause->rx_pause = 1;
1117 pause->tx_pause = 1;
1118 }
c7d05ca8
JB		 1119}
1120
2becc35a
CS		 1121/**
1122 * i40e_set_pauseparam - Set Flow Control parameter
1123 * @netdev: network interface device structure
1124 * @pause: return tx/rx flow control status
1125 **/
1126static int i40e_set_pauseparam(struct net_device *netdev,
1127 struct ethtool_pauseparam *pause)
1128{
1129 struct i40e_netdev_priv *np = netdev_priv(netdev);
1130 struct i40e_pf *pf = np->vsi->back;
1131 struct i40e_vsi *vsi = np->vsi;
1132 struct i40e_hw *hw = &pf->hw;
1133 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
4b7698cb 1134 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config;
2becc35a
CS		 1135 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP;
1136 i40e_status status;
1137 u8 aq_failures;
7d62dac6 1138 int err = 0;
2becc35a 1139
f0d8c733
SN		 1140 /* Changing the port's flow control is not supported if this isn't the
1141 * port's controlling PF
1142 */
1143 if (hw->partition_id != 1) {
1144 i40e_partition_setting_complaint(pf);
1145 return -EOPNOTSUPP;
1146 }
1147
2becc35a
CS		 1148 if (vsi != pf->vsi[pf->lan_vsi])
1149 return -EOPNOTSUPP;
1150
1151 if (pause->autoneg != ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ?
1152 AUTONEG_ENABLE : AUTONEG_DISABLE)) {
1153 netdev_info(netdev, "To change autoneg please use: ethtool -s <dev> autoneg <on|off>\n");
1154 return -EOPNOTSUPP;
1155 }
1156
1157 /* If we have link and don't have autoneg */
0da36b97 1158 if (!test_bit(__I40E_DOWN, pf->state) &&
2becc35a
CS		 1159 !(hw_link_info->an_info & I40E_AQ_AN_COMPLETED)) {
1160 /* Send message that it might not necessarily work*/
1161 netdev_info(netdev, "Autoneg did not complete so changing settings may not result in an actual change.\n");
1162 }
1163
4b7698cb
NP		 1164 if (dcbx_cfg->pfc.pfcenable) {
1165 netdev_info(netdev,
1166 "Priority flow control enabled. Cannot set link flow control.\n");
2becc35a
CS		 1167 return -EOPNOTSUPP;
1168 }
1169
1170 if (pause->rx_pause && pause->tx_pause)
1171 hw->fc.requested_mode = I40E_FC_FULL;
1172 else if (pause->rx_pause && !pause->tx_pause)
1173 hw->fc.requested_mode = I40E_FC_RX_PAUSE;
1174 else if (!pause->rx_pause && pause->tx_pause)
1175 hw->fc.requested_mode = I40E_FC_TX_PAUSE;
1176 else if (!pause->rx_pause && !pause->tx_pause)
1177 hw->fc.requested_mode = I40E_FC_NONE;
1178 else
1179 return -EINVAL;
1180
94128516
CS		 1181 /* Tell the OS link is going down, the link will go back up when fw
1182 * says it is ready asynchronously
1183 */
c156f856 1184 i40e_print_link_message(vsi, false);
94128516
CS		 1185 netif_carrier_off(netdev);
1186 netif_tx_stop_all_queues(netdev);
1187
2becc35a
CS		 1188 /* Set the fc mode and only restart an if link is up*/
1189 status = i40e_set_fc(hw, &aq_failures, link_up);
1190
1191 if (aq_failures & I40E_SET_FC_AQ_FAIL_GET) {
f1c7e72e
SN		 1192 netdev_info(netdev, "Set fc failed on the get_phy_capabilities call with err %s aq_err %s\n",
1193 i40e_stat_str(hw, status),
1194 i40e_aq_str(hw, hw->aq.asq_last_status));
2becc35a
CS		 1195 err = -EAGAIN;
1196 }
1197 if (aq_failures & I40E_SET_FC_AQ_FAIL_SET) {
f1c7e72e
SN		 1198 netdev_info(netdev, "Set fc failed on the set_phy_config call with err %s aq_err %s\n",
1199 i40e_stat_str(hw, status),
1200 i40e_aq_str(hw, hw->aq.asq_last_status));
2becc35a
CS		 1201 err = -EAGAIN;
1202 }
1203 if (aq_failures & I40E_SET_FC_AQ_FAIL_UPDATE) {
f1c7e72e
SN		 1204 netdev_info(netdev, "Set fc failed on the get_link_info call with err %s aq_err %s\n",
1205 i40e_stat_str(hw, status),
1206 i40e_aq_str(hw, hw->aq.asq_last_status));
2becc35a
CS		 1207 err = -EAGAIN;
1208 }
1209
0da36b97 1210 if (!test_bit(__I40E_DOWN, pf->state)) {
7d62dac6
CS		 1211 /* Give it a little more time to try to come back */
1212 msleep(75);
0da36b97 1213 if (!test_bit(__I40E_DOWN, pf->state))
7d62dac6
CS		 1214 return i40e_nway_reset(netdev);
1215 }
2becc35a
CS		 1216
1217 return err;
1218}
1219
c7d05ca8
JB		 1220static u32 i40e_get_msglevel(struct net_device *netdev)
1221{
1222 struct i40e_netdev_priv *np = netdev_priv(netdev);
1223 struct i40e_pf *pf = np->vsi->back;
5d4ca23e
AD		 1224 u32 debug_mask = pf->hw.debug_mask;
1225
1226 if (debug_mask)
1227 netdev_info(netdev, "i40e debug_mask: 0x%08X\n", debug_mask);
c7d05ca8
JB		 1228
1229 return pf->msg_enable;
1230}
1231
1232static void i40e_set_msglevel(struct net_device *netdev, u32 data)
1233{
1234 struct i40e_netdev_priv *np = netdev_priv(netdev);
1235 struct i40e_pf *pf = np->vsi->back;
1236
1237 if (I40E_DEBUG_USER & data)
1238 pf->hw.debug_mask = data;
5d4ca23e
AD		 1239 else
1240 pf->msg_enable = data;
c7d05ca8
JB		 1241}
1242
1243static int i40e_get_regs_len(struct net_device *netdev)
1244{
1245 int reg_count = 0;
1246 int i;
1247
1248 for (i = 0; i40e_reg_list[i].offset != 0; i++)
1249 reg_count += i40e_reg_list[i].elements;
1250
1251 return reg_count * sizeof(u32);
1252}
1253
1254static void i40e_get_regs(struct net_device *netdev, struct ethtool_regs *regs,
1255 void *p)
1256{
1257 struct i40e_netdev_priv *np = netdev_priv(netdev);
1258 struct i40e_pf *pf = np->vsi->back;
1259 struct i40e_hw *hw = &pf->hw;
1260 u32 *reg_buf = p;
b85c94b6 1261 unsigned int i, j, ri;
c7d05ca8
JB		 1262 u32 reg;
1263
1264 /* Tell ethtool which driver-version-specific regs output we have.
1265 *
1266 * At some point, if we have ethtool doing special formatting of
1267 * this data, it will rely on this version number to know how to
1268 * interpret things. Hence, this needs to be updated if/when the
1269 * diags register table is changed.
1270 */
1271 regs->version = 1;
1272
1273 /* loop through the diags reg table for what to print */
1274 ri = 0;
1275 for (i = 0; i40e_reg_list[i].offset != 0; i++) {
1276 for (j = 0; j < i40e_reg_list[i].elements; j++) {
1277 reg = i40e_reg_list[i].offset
1278 + (j * i40e_reg_list[i].stride);
1279 reg_buf[ri++] = rd32(hw, reg);
1280 }
1281 }
1282
1283}
1284
1285static int i40e_get_eeprom(struct net_device *netdev,
1286 struct ethtool_eeprom *eeprom, u8 *bytes)
1287{
1288 struct i40e_netdev_priv *np = netdev_priv(netdev);
1289 struct i40e_hw *hw = &np->vsi->back->hw;
e5e0a5db 1290 struct i40e_pf *pf = np->vsi->back;
c150a502 1291 int ret_val = 0, len, offset;
e5e0a5db
ASJ		 1292 u8 *eeprom_buff;
1293 u16 i, sectors;
1294 bool last;
cd552cb4
SN		 1295 u32 magic;
1296
e5e0a5db 1297#define I40E_NVM_SECTOR_SIZE 4096
c7d05ca8
JB		 1298 if (eeprom->len == 0)
1299 return -EINVAL;
1300
cd552cb4
SN		 1301 /* check for NVMUpdate access method */
1302 magic = hw->vendor_id | (hw->device_id << 16);
1303 if (eeprom->magic && eeprom->magic != magic) {
6e93d0c9
SN		 1304 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom;
1305 int errno = 0;
cd552cb4
SN		 1306
1307 /* make sure it is the right magic for NVMUpdate */
1308 if ((eeprom->magic >> 16) != hw->device_id)
6e93d0c9 1309 errno = -EINVAL;
0da36b97
JK		 1310 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
1311 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
6e93d0c9
SN		 1312 errno = -EBUSY;
1313 else
1314 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno);
1315
1316 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM))
cd552cb4 1317 dev_info(&pf->pdev->dev,
c150a502
SN		 1318 "NVMUpdate read failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n",
1319 ret_val, hw->aq.asq_last_status, errno,
1320 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK),
1321 cmd->offset, cmd->data_size);
cd552cb4
SN		 1322
1323 return errno;
1324 }
1325
1326 /* normal ethtool get_eeprom support */
c7d05ca8
JB		 1327 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
1328
e5e0a5db 1329 eeprom_buff = kzalloc(eeprom->len, GFP_KERNEL);
c7d05ca8
JB		 1330 if (!eeprom_buff)
1331 return -ENOMEM;
1332
e5e0a5db
ASJ		 1333 ret_val = i40e_acquire_nvm(hw, I40E_RESOURCE_READ);
1334 if (ret_val) {
1335 dev_info(&pf->pdev->dev,
1336 "Failed Acquiring NVM resource for read err=%d status=0x%x\n",
1337 ret_val, hw->aq.asq_last_status);
1338 goto free_buff;
c7d05ca8
JB		 1339 }
1340
e5e0a5db
ASJ		 1341 sectors = eeprom->len / I40E_NVM_SECTOR_SIZE;
1342 sectors += (eeprom->len % I40E_NVM_SECTOR_SIZE) ? 1 : 0;
1343 len = I40E_NVM_SECTOR_SIZE;
1344 last = false;
1345 for (i = 0; i < sectors; i++) {
1346 if (i == (sectors - 1)) {
1347 len = eeprom->len - (I40E_NVM_SECTOR_SIZE * i);
1348 last = true;
1349 }
c150a502
SN		 1350 offset = eeprom->offset + (I40E_NVM_SECTOR_SIZE * i),
1351 ret_val = i40e_aq_read_nvm(hw, 0x0, offset, len,
cd552cb4 1352 (u8 *)eeprom_buff + (I40E_NVM_SECTOR_SIZE * i),
e5e0a5db 1353 last, NULL);
c150a502 1354 if (ret_val && hw->aq.asq_last_status == I40E_AQ_RC_EPERM) {
e5e0a5db 1355 dev_info(&pf->pdev->dev,
c150a502
SN		 1356 "read NVM failed, invalid offset 0x%x\n",
1357 offset);
1358 break;
1359 } else if (ret_val &&
1360 hw->aq.asq_last_status == I40E_AQ_RC_EACCES) {
1361 dev_info(&pf->pdev->dev,
1362 "read NVM failed, access, offset 0x%x\n",
1363 offset);
1364 break;
1365 } else if (ret_val) {
1366 dev_info(&pf->pdev->dev,
1367 "read NVM failed offset %d err=%d status=0x%x\n",
1368 offset, ret_val, hw->aq.asq_last_status);
1369 break;
e5e0a5db
ASJ		 1370 }
1371 }
c7d05ca8 1372
e5e0a5db 1373 i40e_release_nvm(hw);
cd552cb4 1374 memcpy(bytes, (u8 *)eeprom_buff, eeprom->len);
e5e0a5db 1375free_buff:
c7d05ca8 1376 kfree(eeprom_buff);
c7d05ca8
JB		 1377 return ret_val;
1378}
1379
1380static int i40e_get_eeprom_len(struct net_device *netdev)
1381{
1382 struct i40e_netdev_priv *np = netdev_priv(netdev);
1383 struct i40e_hw *hw = &np->vsi->back->hw;
e5e0a5db
ASJ		 1384 u32 val;
1385
c271dd6c
LY		 1386#define X722_EEPROM_SCOPE_LIMIT 0x5B9FFF
1387 if (hw->mac.type == I40E_MAC_X722) {
1388 val = X722_EEPROM_SCOPE_LIMIT + 1;
1389 return val;
1390 }
e5e0a5db
ASJ		 1391 val = (rd32(hw, I40E_GLPCI_LBARCTRL)
1392 & I40E_GLPCI_LBARCTRL_FL_SIZE_MASK)
1393 >> I40E_GLPCI_LBARCTRL_FL_SIZE_SHIFT;
1394 /* register returns value in power of 2, 64Kbyte chunks. */
41a1d04b 1395 val = (64 * 1024) * BIT(val);
e5e0a5db 1396 return val;
c7d05ca8
JB		 1397}
1398
cd552cb4
SN		 1399static int i40e_set_eeprom(struct net_device *netdev,
1400 struct ethtool_eeprom *eeprom, u8 *bytes)
1401{
1402 struct i40e_netdev_priv *np = netdev_priv(netdev);
1403 struct i40e_hw *hw = &np->vsi->back->hw;
1404 struct i40e_pf *pf = np->vsi->back;
6e93d0c9 1405 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom;
cd552cb4 1406 int ret_val = 0;
6e93d0c9 1407 int errno = 0;
cd552cb4
SN		 1408 u32 magic;
1409
1410 /* normal ethtool set_eeprom is not supported */
1411 magic = hw->vendor_id | (hw->device_id << 16);
1412 if (eeprom->magic == magic)
6e93d0c9 1413 errno = -EOPNOTSUPP;
cd552cb4 1414 /* check for NVMUpdate access method */
6e93d0c9
SN		 1415 else if (!eeprom->magic || (eeprom->magic >> 16) != hw->device_id)
1416 errno = -EINVAL;
0da36b97
JK		 1417 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
1418 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
6e93d0c9
SN		 1419 errno = -EBUSY;
1420 else
1421 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno);
cd552cb4 1422
6e93d0c9 1423 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM))
cd552cb4 1424 dev_info(&pf->pdev->dev,
c150a502
SN		 1425 "NVMUpdate write failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n",
1426 ret_val, hw->aq.asq_last_status, errno,
1427 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK),
1428 cmd->offset, cmd->data_size);
cd552cb4
SN		 1429
1430 return errno;
1431}
1432
c7d05ca8
JB		 1433static void i40e_get_drvinfo(struct net_device *netdev,
1434 struct ethtool_drvinfo *drvinfo)
1435{
1436 struct i40e_netdev_priv *np = netdev_priv(netdev);
1437 struct i40e_vsi *vsi = np->vsi;
1438 struct i40e_pf *pf = vsi->back;
1439
1440 strlcpy(drvinfo->driver, i40e_driver_name, sizeof(drvinfo->driver));
1441 strlcpy(drvinfo->version, i40e_driver_version_str,
1442 sizeof(drvinfo->version));
6dec1017 1443 strlcpy(drvinfo->fw_version, i40e_nvm_version_str(&pf->hw),
c7d05ca8
JB		 1444 sizeof(drvinfo->fw_version));
1445 strlcpy(drvinfo->bus_info, pci_name(pf->pdev),
1446 sizeof(drvinfo->bus_info));
d182a5ca 1447 drvinfo->n_priv_flags = I40E_PRIV_FLAGS_STR_LEN;
b5569892 1448 if (pf->hw.pf_id == 0)
d182a5ca 1449 drvinfo->n_priv_flags += I40E_GL_PRIV_FLAGS_STR_LEN;
c7d05ca8
JB		 1450}
1451
1452static void i40e_get_ringparam(struct net_device *netdev,
1453 struct ethtool_ringparam *ring)
1454{
1455 struct i40e_netdev_priv *np = netdev_priv(netdev);
1456 struct i40e_pf *pf = np->vsi->back;
1457 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
1458
1459 ring->rx_max_pending = I40E_MAX_NUM_DESCRIPTORS;
1460 ring->tx_max_pending = I40E_MAX_NUM_DESCRIPTORS;
1461 ring->rx_mini_max_pending = 0;
1462 ring->rx_jumbo_max_pending = 0;
9f65e15b
AD		 1463 ring->rx_pending = vsi->rx_rings[0]->count;
1464 ring->tx_pending = vsi->tx_rings[0]->count;
c7d05ca8
JB		 1465 ring->rx_mini_pending = 0;
1466 ring->rx_jumbo_pending = 0;
1467}
1468
74608d17
BT		 1469static bool i40e_active_tx_ring_index(struct i40e_vsi *vsi, u16 index)
1470{
1471 if (i40e_enabled_xdp_vsi(vsi)) {
1472 return index < vsi->num_queue_pairs ||
1473 (index >= vsi->alloc_queue_pairs &&
1474 index < vsi->alloc_queue_pairs + vsi->num_queue_pairs);
1475 }
1476
1477 return index < vsi->num_queue_pairs;
1478}
1479
c7d05ca8
JB		 1480static int i40e_set_ringparam(struct net_device *netdev,
1481 struct ethtool_ringparam *ring)
1482{
1483 struct i40e_ring *tx_rings = NULL, *rx_rings = NULL;
1484 struct i40e_netdev_priv *np = netdev_priv(netdev);
2f7679ee 1485 struct i40e_hw *hw = &np->vsi->back->hw;
c7d05ca8
JB		 1486 struct i40e_vsi *vsi = np->vsi;
1487 struct i40e_pf *pf = vsi->back;
1488 u32 new_rx_count, new_tx_count;
74608d17 1489 u16 tx_alloc_queue_pairs;
e8d2f4c6 1490 int timeout = 50;
c7d05ca8
JB		 1491 int i, err = 0;
1492
1493 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
1494 return -EINVAL;
1495
1fa18370
SN		 1496 if (ring->tx_pending > I40E_MAX_NUM_DESCRIPTORS ||
1497 ring->tx_pending < I40E_MIN_NUM_DESCRIPTORS ||
1498 ring->rx_pending > I40E_MAX_NUM_DESCRIPTORS ||
1499 ring->rx_pending < I40E_MIN_NUM_DESCRIPTORS) {
1500 netdev_info(netdev,
1501 "Descriptors requested (Tx: %d / Rx: %d) out of range [%d-%d]\n",
1502 ring->tx_pending, ring->rx_pending,
1503 I40E_MIN_NUM_DESCRIPTORS, I40E_MAX_NUM_DESCRIPTORS);
1504 return -EINVAL;
1505 }
1506
1507 new_tx_count = ALIGN(ring->tx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE);
1508 new_rx_count = ALIGN(ring->rx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE);
c7d05ca8
JB		 1509
1510 /* if nothing to do return success */
9f65e15b
AD		 1511 if ((new_tx_count == vsi->tx_rings[0]->count) &&
1512 (new_rx_count == vsi->rx_rings[0]->count))
c7d05ca8
JB		 1513 return 0;
1514
0da36b97 1515 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) {
e8d2f4c6
JK		 1516 timeout--;
1517 if (!timeout)
1518 return -EBUSY;
c7d05ca8 1519 usleep_range(1000, 2000);
e8d2f4c6 1520 }
c7d05ca8
JB		 1521
1522 if (!netif_running(vsi->netdev)) {
1523 /* simple case - set for the next time the netdev is started */
1524 for (i = 0; i < vsi->num_queue_pairs; i++) {
9f65e15b
AD		 1525 vsi->tx_rings[i]->count = new_tx_count;
1526 vsi->rx_rings[i]->count = new_rx_count;
74608d17
BT		 1527 if (i40e_enabled_xdp_vsi(vsi))
1528 vsi->xdp_rings[i]->count = new_tx_count;
c7d05ca8
JB		 1529 }
1530 goto done;
1531 }
1532
1533 /* We can't just free everything and then setup again,
1534 * because the ISRs in MSI-X mode get passed pointers
1535 * to the Tx and Rx ring structs.
1536 */
1537
74608d17
BT		 1538 /* alloc updated Tx and XDP Tx resources */
1539 tx_alloc_queue_pairs = vsi->alloc_queue_pairs *
1540 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1);
9f65e15b 1541 if (new_tx_count != vsi->tx_rings[0]->count) {
c7d05ca8
JB		 1542 netdev_info(netdev,
1543 "Changing Tx descriptor count from %d to %d.\n",
9f65e15b 1544 vsi->tx_rings[0]->count, new_tx_count);
74608d17 1545 tx_rings = kcalloc(tx_alloc_queue_pairs,
c7d05ca8
JB		 1546 sizeof(struct i40e_ring), GFP_KERNEL);
1547 if (!tx_rings) {
1548 err = -ENOMEM;
1549 goto done;
1550 }
1551
74608d17
BT		 1552 for (i = 0; i < tx_alloc_queue_pairs; i++) {
1553 if (!i40e_active_tx_ring_index(vsi, i))
1554 continue;
1555
9f65e15b 1556 tx_rings[i] = *vsi->tx_rings[i];
c7d05ca8 1557 tx_rings[i].count = new_tx_count;
1e8efb42
JB		 1558 /* the desc and bi pointers will be reallocated in the
1559 * setup call
1560 */
1561 tx_rings[i].desc = NULL;
1562 tx_rings[i].rx_bi = NULL;
c7d05ca8
JB		 1563 err = i40e_setup_tx_descriptors(&tx_rings[i]);
1564 if (err) {
1565 while (i) {
1566 i--;
74608d17
BT		 1567 if (!i40e_active_tx_ring_index(vsi, i))
1568 continue;
c7d05ca8
JB		 1569 i40e_free_tx_resources(&tx_rings[i]);
1570 }
1571 kfree(tx_rings);
1572 tx_rings = NULL;
1573
1574 goto done;
1575 }
1576 }
1577 }
1578
1579 /* alloc updated Rx resources */
9f65e15b 1580 if (new_rx_count != vsi->rx_rings[0]->count) {
c7d05ca8
JB		 1581 netdev_info(netdev,
1582 "Changing Rx descriptor count from %d to %d\n",
9f65e15b 1583 vsi->rx_rings[0]->count, new_rx_count);
c7d05ca8
JB		 1584 rx_rings = kcalloc(vsi->alloc_queue_pairs,
1585 sizeof(struct i40e_ring), GFP_KERNEL);
1586 if (!rx_rings) {
1587 err = -ENOMEM;
1588 goto free_tx;
1589 }
1590
1591 for (i = 0; i < vsi->num_queue_pairs; i++) {
147e81ec
JB		 1592 u16 unused;
1593
c7d05ca8 1594 /* clone ring and setup updated count */
9f65e15b 1595 rx_rings[i] = *vsi->rx_rings[i];
c7d05ca8 1596 rx_rings[i].count = new_rx_count;
1e8efb42
JB		 1597 /* the desc and bi pointers will be reallocated in the
1598 * setup call
1599 */
1600 rx_rings[i].desc = NULL;
1601 rx_rings[i].rx_bi = NULL;
87128824
JDB		 1602 /* Clear cloned XDP RX-queue info before setup call */
1603 memset(&rx_rings[i].xdp_rxq, 0, sizeof(rx_rings[i].xdp_rxq));
2f7679ee
TD		 1604 /* this is to allow wr32 to have something to write to
1605 * during early allocation of Rx buffers
1606 */
1607 rx_rings[i].tail = hw->hw_addr + I40E_PRTGEN_STATUS;
c7d05ca8 1608 err = i40e_setup_rx_descriptors(&rx_rings[i]);
147e81ec
JB		 1609 if (err)
1610 goto rx_unwind;
1611
1612 /* now allocate the Rx buffers to make sure the OS
1613 * has enough memory, any failure here means abort
1614 */
6e2feaa3
JK		 1615 unused = I40E_DESC_UNUSED(&rx_rings[i]);
1616 err = i40e_alloc_rx_buffers(&rx_rings[i], unused);
147e81ec 1617rx_unwind:
c7d05ca8 1618 if (err) {
147e81ec 1619 do {
c7d05ca8 1620 i40e_free_rx_resources(&rx_rings[i]);
147e81ec 1621 } while (i--);
c7d05ca8
JB		 1622 kfree(rx_rings);
1623 rx_rings = NULL;
1624
1625 goto free_tx;
1626 }
1627 }
1628 }
1629
1630 /* Bring interface down, copy in the new ring info,
1631 * then restore the interface
1632 */
1633 i40e_down(vsi);
1634
1635 if (tx_rings) {
74608d17
BT		 1636 for (i = 0; i < tx_alloc_queue_pairs; i++) {
1637 if (i40e_active_tx_ring_index(vsi, i)) {
1638 i40e_free_tx_resources(vsi->tx_rings[i]);
1639 *vsi->tx_rings[i] = tx_rings[i];
1640 }
c7d05ca8
JB		 1641 }
1642 kfree(tx_rings);
1643 tx_rings = NULL;
1644 }
1645
1646 if (rx_rings) {
1647 for (i = 0; i < vsi->num_queue_pairs; i++) {
9f65e15b 1648 i40e_free_rx_resources(vsi->rx_rings[i]);
147e81ec
JB		 1649 /* get the real tail offset */
1650 rx_rings[i].tail = vsi->rx_rings[i]->tail;
1651 /* this is to fake out the allocation routine
1652 * into thinking it has to realloc everything
1653 * but the recycling logic will let us re-use
1654 * the buffers allocated above
1655 */
1656 rx_rings[i].next_to_use = 0;
1657 rx_rings[i].next_to_clean = 0;
1658 rx_rings[i].next_to_alloc = 0;
1659 /* do a struct copy */
9f65e15b 1660 *vsi->rx_rings[i] = rx_rings[i];
c7d05ca8
JB		 1661 }
1662 kfree(rx_rings);
1663 rx_rings = NULL;
1664 }
1665
1666 i40e_up(vsi);
1667
1668free_tx:
1669 /* error cleanup if the Rx allocations failed after getting Tx */
1670 if (tx_rings) {
74608d17
BT		 1671 for (i = 0; i < tx_alloc_queue_pairs; i++) {
1672 if (i40e_active_tx_ring_index(vsi, i))
1673 i40e_free_tx_resources(vsi->tx_rings[i]);
1674 }
c7d05ca8
JB		 1675 kfree(tx_rings);
1676 tx_rings = NULL;
1677 }
1678
1679done:
0da36b97 1680 clear_bit(__I40E_CONFIG_BUSY, pf->state);
c7d05ca8
JB		 1681
1682 return err;
1683}
1684
ec29bbf8
JK		 1685/**
1686 * i40e_get_stats_count - return the stats count for a device
1687 * @netdev: the netdev to return the count for
1688 *
1689 * Returns the total number of statistics for this netdev. Note that even
1690 * though this is a function, it is required that the count for a specific
1691 * netdev must never change. Basing the count on static values such as the
1692 * maximum number of queues or the device type is ok. However, the API for
1693 * obtaining stats is *not* safe against changes based on non-static
1694 * values such as the *current* number of queues, or runtime flags.
1695 *
1696 * If a statistic is not always enabled, return it as part of the count
1697 * anyways, always return its string, and report its value as zero.
1698 **/
0ded9c61
JK		 1699static int i40e_get_stats_count(struct net_device *netdev)
1700{
1701 struct i40e_netdev_priv *np = netdev_priv(netdev);
1702 struct i40e_vsi *vsi = np->vsi;
1703 struct i40e_pf *pf = vsi->back;
1704
9955d494 1705 if (vsi == pf->vsi[pf->lan_vsi] && pf->hw.partition_id == 1)
1510ae0b 1706 return I40E_PF_STATS_LEN(netdev);
9955d494 1707 else
0ded9c61 1708 return I40E_VSI_STATS_LEN(netdev);
0ded9c61
JK		 1709}
1710
c7d05ca8
JB		 1711static int i40e_get_sset_count(struct net_device *netdev, int sset)
1712{
1713 struct i40e_netdev_priv *np = netdev_priv(netdev);
1714 struct i40e_vsi *vsi = np->vsi;
1715 struct i40e_pf *pf = vsi->back;
1716
1717 switch (sset) {
1718 case ETH_SS_TEST:
1719 return I40E_TEST_LEN;
1720 case ETH_SS_STATS:
0ded9c61 1721 return i40e_get_stats_count(netdev);
7e45ab44 1722 case ETH_SS_PRIV_FLAGS:
d182a5ca
JK		 1723 return I40E_PRIV_FLAGS_STR_LEN +
1724 (pf->hw.pf_id == 0 ? I40E_GL_PRIV_FLAGS_STR_LEN : 0);
c7d05ca8
JB		 1725 default:
1726 return -EOPNOTSUPP;
1727 }
1728}
1729
f3030480
JK		 1730/**
1731 * i40e_add_one_ethtool_stat - copy the stat into the supplied buffer
1732 * @data: location to store the stat value
1733 * @pointer: basis for where to copy from
1734 * @stat: the stat definition
1735 *
1736 * Copies the stat data defined by the pointer and stat structure pair into
1737 * the memory supplied as data. Used to implement i40e_add_ethtool_stats.
1738 * If the pointer is null, data will be zero'd.
1739 */
1740static inline void
1741i40e_add_one_ethtool_stat(u64 *data, void *pointer,
1742 const struct i40e_stats *stat)
1743{
1744 char *p;
1745
1746 if (!pointer) {
1747 /* ensure that the ethtool data buffer is zero'd for any stats
1748 * which don't have a valid pointer.
1749 */
1750 *data = 0;
1751 return;
1752 }
1753
1754 p = (char *)pointer + stat->stat_offset;
1755 switch (stat->sizeof_stat) {
1756 case sizeof(u64):
1757 *data = *((u64 *)p);
1758 break;
1759 case sizeof(u32):
1760 *data = *((u32 *)p);
1761 break;
1762 case sizeof(u16):
1763 *data = *((u16 *)p);
1764 break;
1765 case sizeof(u8):
1766 *data = *((u8 *)p);
1767 break;
1768 default:
1769 WARN_ONCE(1, "unexpected stat size for %s",
1770 stat->stat_string);
1771 *data = 0;
1772 }
1773}
1774
1775/**
1776 * __i40e_add_ethtool_stats - copy stats into the ethtool supplied buffer
1777 * @data: ethtool stats buffer
1778 * @pointer: location to copy stats from
1779 * @stats: array of stats to copy
1780 * @size: the size of the stats definition
1781 *
1782 * Copy the stats defined by the stats array using the pointer as a base into
1783 * the data buffer supplied by ethtool. Updates the data pointer to point to
1784 * the next empty location for successive calls to __i40e_add_ethtool_stats.
1785 * If pointer is null, set the data values to zero and update the pointer to
1786 * skip these stats.
1787 **/
1788static inline void
1789__i40e_add_ethtool_stats(u64 **data, void *pointer,
1790 const struct i40e_stats stats[],
1791 const unsigned int size)
1792{
1793 unsigned int i;
1794
1795 for (i = 0; i < size; i++)
1796 i40e_add_one_ethtool_stat((*data)++, pointer, &stats[i]);
1797}
1798
1799/**
1800 * i40e_add_ethtool_stats - copy stats into ethtool supplied buffer
1801 * @data: ethtool stats buffer
1802 * @pointer: location where stats are stored
1803 * @stats: static const array of stat definitions
1804 *
1805 * Macro to ease the use of __i40e_add_ethtool_stats by taking a static
1806 * constant stats array and passing the ARRAY_SIZE(). This avoids typos by
1807 * ensuring that we pass the size associated with the given stats array.
1808 * Assumes that stats is an array.
1809 **/
1810#define i40e_add_ethtool_stats(data, pointer, stats) \
1811 __i40e_add_ethtool_stats(data, pointer, stats, ARRAY_SIZE(stats))
1812
f25848d4
JK		 1813/**
1814 * i40e_get_pfc_stats - copy HW PFC statistics to formatted structure
1815 * @pf: the PF device structure
1816 * @i: the priority value to copy
1817 *
1818 * The PFC stats are found as arrays in pf->stats, which is not easy to pass
1819 * into i40e_add_ethtool_stats. Produce a formatted i40e_pfc_stats structure
1820 * of the PFC stats for the given priority.
1821 **/
1822static inline struct i40e_pfc_stats
1823i40e_get_pfc_stats(struct i40e_pf *pf, unsigned int i)
1824{
1825#define I40E_GET_PFC_STAT(stat, priority) \
1826 .stat = pf->stats.stat[priority]
1827
1828 struct i40e_pfc_stats pfc = {
1829 I40E_GET_PFC_STAT(priority_xon_rx, i),
1830 I40E_GET_PFC_STAT(priority_xoff_rx, i),
1831 I40E_GET_PFC_STAT(priority_xon_tx, i),
1832 I40E_GET_PFC_STAT(priority_xoff_tx, i),
1833 I40E_GET_PFC_STAT(priority_xon_2_xoff, i),
1834 };
1835 return pfc;
1836}
1837
ec29bbf8
JK		 1838/**
1839 * i40e_get_ethtool_stats - copy stat values into supplied buffer
1840 * @netdev: the netdev to collect stats for
1841 * @stats: ethtool stats command structure
1842 * @data: ethtool supplied buffer
1843 *
1844 * Copy the stats values for this netdev into the buffer. Expects data to be
1845 * pre-allocated to the size returned by i40e_get_stats_count.. Note that all
1846 * statistics must be copied in a static order, and the count must not change
1847 * for a given netdev. See i40e_get_stats_count for more details.
1848 *
1849 * If a statistic is not currently valid (such as a disabled queue), this
1850 * function reports its value as zero.
1851 **/
c7d05ca8
JB		 1852static void i40e_get_ethtool_stats(struct net_device *netdev,
1853 struct ethtool_stats *stats, u64 *data)
1854{
1855 struct i40e_netdev_priv *np = netdev_priv(netdev);
e7046ee1 1856 struct i40e_ring *tx_ring, *rx_ring;
c7d05ca8
JB		 1857 struct i40e_vsi *vsi = np->vsi;
1858 struct i40e_pf *pf = vsi->back;
1510ae0b 1859 struct i40e_veb *veb = pf->veb[pf->lan_veb];
3f76bdb4 1860 unsigned int i;
980e9b11 1861 unsigned int start;
1510ae0b 1862 bool veb_stats;
333e2f2c 1863 u64 *p = data;
c7d05ca8
JB		 1864
1865 i40e_update_stats(vsi);
1866
f3030480
JK		 1867 i40e_add_ethtool_stats(&data, i40e_get_vsi_stats_struct(vsi),
1868 i40e_gstrings_net_stats);
1869
1870 i40e_add_ethtool_stats(&data, vsi, i40e_gstrings_misc_stats);
1871
980e9b11 1872 rcu_read_lock();
3f76bdb4
JK		 1873 for (i = 0; i < I40E_MAX_NUM_QUEUES(netdev) ; i++) {
1874 tx_ring = READ_ONCE(vsi->tx_rings[i]);
980e9b11 1875
b8312365
JK		 1876 if (!tx_ring) {
1877 /* Bump the stat counter to skip these stats, and make
1878 * sure the memory is zero'd
1879 */
e08696dc
JK		 1880 *(data++) = 0;
1881 *(data++) = 0;
1882 *(data++) = 0;
1883 *(data++) = 0;
980e9b11 1884 continue;
b8312365 1885 }
980e9b11
AD		 1886
1887 /* process Tx ring statistics */
1888 do {
57a7744e 1889 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
e08696dc
JK		 1890 data[0] = tx_ring->stats.packets;
1891 data[1] = tx_ring->stats.bytes;
57a7744e 1892 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
e08696dc 1893 data += 2;
980e9b11
AD		 1894
1895 /* Rx ring is the 2nd half of the queue pair */
1896 rx_ring = &tx_ring[1];
1897 do {
57a7744e 1898 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
e08696dc
JK		 1899 data[0] = rx_ring->stats.packets;
1900 data[1] = rx_ring->stats.bytes;
57a7744e 1901 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
e08696dc 1902 data += 2;
c7d05ca8 1903 }
980e9b11 1904 rcu_read_unlock();
58ce5175 1905 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1)
333e2f2c 1906 goto check_data_pointer;
8eab9cfd 1907
1510ae0b
JK		 1908 veb_stats = ((pf->lan_veb != I40E_NO_VEB) &&
1909 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED));
6995b36c 1910
1510ae0b
JK		 1911 /* If veb stats aren't enabled, pass NULL instead of the veb so that
1912 * we initialize stats to zero and update the data pointer
1913 * intelligently
1914 */
1915 i40e_add_ethtool_stats(&data, veb_stats ? veb : NULL,
1916 i40e_gstrings_veb_stats);
f3030480 1917
1510ae0b
JK		 1918 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
1919 i40e_add_ethtool_stats(&data, veb_stats ? veb : NULL,
1920 i40e_gstrings_veb_tc_stats);
f3030480
JK		 1921
1922 i40e_add_ethtool_stats(&data, pf, i40e_gstrings_stats);
1923
3f76bdb4 1924 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
f25848d4
JK		 1925 struct i40e_pfc_stats pfc = i40e_get_pfc_stats(pf, i);
1926
1927 i40e_add_ethtool_stats(&data, &pfc, i40e_gstrings_pfc_stats);
8eab9cfd 1928 }
333e2f2c
JK		 1929
1930check_data_pointer:
1931 WARN_ONCE(data - p != i40e_get_stats_count(netdev),
1932 "ethtool stats count mismatch!");
c7d05ca8
JB		 1933}
1934
91f06544
JK		 1935/**
1936 * __i40e_add_stat_strings - copy stat strings into ethtool buffer
1937 * @p: ethtool supplied buffer
1938 * @stats: stat definitions array
1939 * @size: size of the stats array
1940 *
1510ae0b
JK		 1941 * Format and copy the strings described by stats into the buffer pointed at
1942 * by p.
91f06544
JK		 1943 **/
1944static void __i40e_add_stat_strings(u8 **p, const struct i40e_stats stats[],
1510ae0b 1945 const unsigned int size, ...)
91f06544
JK		 1946{
1947 unsigned int i;
1948
1949 for (i = 0; i < size; i++) {
1510ae0b
JK		 1950 va_list args;
1951
1952 va_start(args, size);
1953 vsnprintf(*p, ETH_GSTRING_LEN, stats[i].stat_string, args);
91f06544 1954 *p += ETH_GSTRING_LEN;
1510ae0b 1955 va_end(args);
91f06544
JK		 1956 }
1957}
1958
1959/**
1960 * 40e_add_stat_strings - copy stat strings into ethtool buffer
1961 * @p: ethtool supplied buffer
1962 * @stats: stat definitions array
1963 *
1964 * Format and copy the strings described by the const static stats value into
1965 * the buffer pointed at by p. Assumes that stats can have ARRAY_SIZE called
1966 * for it.
1967 **/
1968#define i40e_add_stat_strings(p, stats, ...) \
1510ae0b 1969 __i40e_add_stat_strings(p, stats, ARRAY_SIZE(stats), ## __VA_ARGS__)
91f06544 1970
ec29bbf8
JK		 1971/**
1972 * i40e_get_stat_strings - copy stat strings into supplied buffer
1973 * @netdev: the netdev to collect strings for
1974 * @data: supplied buffer to copy strings into
1975 *
1976 * Copy the strings related to stats for this netdev. Expects data to be
1977 * pre-allocated with the size reported by i40e_get_stats_count. Note that the
1978 * strings must be copied in a static order and the total count must not
1979 * change for a given netdev. See i40e_get_stats_count for more details.
1980 **/
019b9cd4
JK		 1981static void i40e_get_stat_strings(struct net_device *netdev, u8 *data)
1982{
1983 struct i40e_netdev_priv *np = netdev_priv(netdev);
1984 struct i40e_vsi *vsi = np->vsi;
1985 struct i40e_pf *pf = vsi->back;
019b9cd4 1986 unsigned int i;
9b10df59 1987 u8 *p = data;
019b9cd4 1988
91f06544
JK		 1989 i40e_add_stat_strings(&data, i40e_gstrings_net_stats);
1990
1991 i40e_add_stat_strings(&data, i40e_gstrings_misc_stats);
1992
019b9cd4 1993 for (i = 0; i < I40E_MAX_NUM_QUEUES(netdev); i++) {
e08696dc
JK		 1994 snprintf(data, ETH_GSTRING_LEN, "tx-%u.tx_packets", i);
1995 data += ETH_GSTRING_LEN;
1996 snprintf(data, ETH_GSTRING_LEN, "tx-%u.tx_bytes", i);
1997 data += ETH_GSTRING_LEN;
1998 snprintf(data, ETH_GSTRING_LEN, "rx-%u.rx_packets", i);
1999 data += ETH_GSTRING_LEN;
2000 snprintf(data, ETH_GSTRING_LEN, "rx-%u.rx_bytes", i);
2001 data += ETH_GSTRING_LEN;
019b9cd4
JK		 2002 }
2003 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1)
2004 return;
2005
91f06544
JK		 2006 i40e_add_stat_strings(&data, i40e_gstrings_veb_stats);
2007
1510ae0b
JK		 2008 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
2009 i40e_add_stat_strings(&data, i40e_gstrings_veb_tc_stats, i);
019b9cd4 2010
91f06544
JK		 2011 i40e_add_stat_strings(&data, i40e_gstrings_stats);
2012
f25848d4
JK		 2013 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++)
2014 i40e_add_stat_strings(&data, i40e_gstrings_pfc_stats, i);
9b10df59 2015
07f37013 2016 WARN_ONCE(data - p != i40e_get_stats_count(netdev) * ETH_GSTRING_LEN,
9b10df59 2017 "stat strings count mismatch!");
019b9cd4
JK		 2018}
2019
2020static void i40e_get_priv_flag_strings(struct net_device *netdev, u8 *data)
c7d05ca8
JB		 2021{
2022 struct i40e_netdev_priv *np = netdev_priv(netdev);
2023 struct i40e_vsi *vsi = np->vsi;
2024 struct i40e_pf *pf = vsi->back;
2025 char *p = (char *)data;
b85c94b6 2026 unsigned int i;
c7d05ca8 2027
019b9cd4
JK		 2028 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) {
2029 snprintf(p, ETH_GSTRING_LEN, "%s",
2030 i40e_gstrings_priv_flags[i].flag_string);
2031 p += ETH_GSTRING_LEN;
2032 }
2033 if (pf->hw.pf_id != 0)
2034 return;
2035 for (i = 0; i < I40E_GL_PRIV_FLAGS_STR_LEN; i++) {
2036 snprintf(p, ETH_GSTRING_LEN, "%s",
2037 i40e_gl_gstrings_priv_flags[i].flag_string);
2038 p += ETH_GSTRING_LEN;
2039 }
2040}
2041
2042static void i40e_get_strings(struct net_device *netdev, u32 stringset,
2043 u8 *data)
2044{
c7d05ca8
JB		 2045 switch (stringset) {
2046 case ETH_SS_TEST:
e5d32205
JK		 2047 memcpy(data, i40e_gstrings_test,
2048 I40E_TEST_LEN * ETH_GSTRING_LEN);
c7d05ca8
JB		 2049 break;
2050 case ETH_SS_STATS:
019b9cd4 2051 i40e_get_stat_strings(netdev, data);
c7d05ca8 2052 break;
7e45ab44 2053 case ETH_SS_PRIV_FLAGS:
019b9cd4 2054 i40e_get_priv_flag_strings(netdev, data);
7e45ab44 2055 break;
579b23d8
AA		 2056 default:
2057 break;
c7d05ca8
JB		 2058 }
2059}
2060
2061static int i40e_get_ts_info(struct net_device *dev,
2062 struct ethtool_ts_info *info)
2063{
beb0dff1
JK		 2064 struct i40e_pf *pf = i40e_netdev_to_pf(dev);
2065
fe88bda9
JK		 2066 /* only report HW timestamping if PTP is enabled */
2067 if (!(pf->flags & I40E_FLAG_PTP))
2068 return ethtool_op_get_ts_info(dev, info);
2069
beb0dff1
JK		 2070 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
2071 SOF_TIMESTAMPING_RX_SOFTWARE |
2072 SOF_TIMESTAMPING_SOFTWARE |
2073 SOF_TIMESTAMPING_TX_HARDWARE |
2074 SOF_TIMESTAMPING_RX_HARDWARE |
2075 SOF_TIMESTAMPING_RAW_HARDWARE;
2076
2077 if (pf->ptp_clock)
2078 info->phc_index = ptp_clock_index(pf->ptp_clock);
2079 else
2080 info->phc_index = -1;
2081
41a1d04b 2082 info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON);
beb0dff1 2083
41a1d04b 2084 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
1e28e861
JK		 2085 BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT) |
2086 BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |
2087 BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ);
2088
d36e41dc 2089 if (pf->hw_features & I40E_HW_PTP_L4_CAPABLE)
1e28e861
JK		 2090 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
2091 BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
2092 BIT(HWTSTAMP_FILTER_PTP_V2_EVENT) |
2093 BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |
2094 BIT(HWTSTAMP_FILTER_PTP_V2_SYNC) |
2095 BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
2096 BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) |
2097 BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ);
beb0dff1
JK		 2098
2099 return 0;
c7d05ca8
JB		 2100}
2101
7b086397 2102static int i40e_link_test(struct net_device *netdev, u64 *data)
c7d05ca8 2103{
7b086397
SN		 2104 struct i40e_netdev_priv *np = netdev_priv(netdev);
2105 struct i40e_pf *pf = np->vsi->back;
a72a5abc
JB		 2106 i40e_status status;
2107 bool link_up = false;
7b086397 2108
b03aaa9c 2109 netif_info(pf, hw, netdev, "link test\n");
a72a5abc
JB		 2110 status = i40e_get_link_status(&pf->hw, &link_up);
2111 if (status) {
2112 netif_err(pf, drv, netdev, "link query timed out, please retry test\n");
2113 *data = 1;
2114 return *data;
2115 }
2116
2117 if (link_up)
c7d05ca8
JB		 2118 *data = 0;
2119 else
2120 *data = 1;
2121
2122 return *data;
2123}
2124
7b086397 2125static int i40e_reg_test(struct net_device *netdev, u64 *data)
c7d05ca8 2126{
7b086397
SN		 2127 struct i40e_netdev_priv *np = netdev_priv(netdev);
2128 struct i40e_pf *pf = np->vsi->back;
c7d05ca8 2129
b03aaa9c 2130 netif_info(pf, hw, netdev, "register test\n");
7b086397 2131 *data = i40e_diag_reg_test(&pf->hw);
c7d05ca8 2132
7b086397 2133 return *data;
c7d05ca8
JB		 2134}
2135
7b086397 2136static int i40e_eeprom_test(struct net_device *netdev, u64 *data)
c7d05ca8 2137{
7b086397
SN		 2138 struct i40e_netdev_priv *np = netdev_priv(netdev);
2139 struct i40e_pf *pf = np->vsi->back;
c7d05ca8 2140
b03aaa9c 2141 netif_info(pf, hw, netdev, "eeprom test\n");
7b086397 2142 *data = i40e_diag_eeprom_test(&pf->hw);
c7d05ca8 2143
4443ec94
SN		 2144 /* forcebly clear the NVM Update state machine */
2145 pf->hw.nvmupd_state = I40E_NVMUPD_STATE_INIT;
2146
7b086397 2147 return *data;
c7d05ca8
JB		 2148}
2149
7b086397 2150static int i40e_intr_test(struct net_device *netdev, u64 *data)
c7d05ca8 2151{
7b086397
SN		 2152 struct i40e_netdev_priv *np = netdev_priv(netdev);
2153 struct i40e_pf *pf = np->vsi->back;
cd92e72f
SN		 2154 u16 swc_old = pf->sw_int_count;
2155
b03aaa9c 2156 netif_info(pf, hw, netdev, "interrupt test\n");
cd92e72f
SN		 2157 wr32(&pf->hw, I40E_PFINT_DYN_CTL0,
2158 (I40E_PFINT_DYN_CTL0_INTENA_MASK |
5d1ff106
SN		 2159 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK |
2160 I40E_PFINT_DYN_CTL0_ITR_INDX_MASK |
2161 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK |
2162 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK));
cd92e72f
SN		 2163 usleep_range(1000, 2000);
2164 *data = (swc_old == pf->sw_int_count);
c7d05ca8
JB		 2165
2166 return *data;
2167}
2168
e17bc411
GR		 2169static inline bool i40e_active_vfs(struct i40e_pf *pf)
2170{
2171 struct i40e_vf *vfs = pf->vf;
2172 int i;
2173
2174 for (i = 0; i < pf->num_alloc_vfs; i++)
6322e63c 2175 if (test_bit(I40E_VF_STATE_ACTIVE, &vfs[i].vf_states))
e17bc411
GR		 2176 return true;
2177 return false;
2178}
2179
510efb26
GR		 2180static inline bool i40e_active_vmdqs(struct i40e_pf *pf)
2181{
4b816446 2182 return !!i40e_find_vsi_by_type(pf, I40E_VSI_VMDQ2);
510efb26
GR		 2183}
2184
c7d05ca8
JB		 2185static void i40e_diag_test(struct net_device *netdev,
2186 struct ethtool_test *eth_test, u64 *data)
2187{
2188 struct i40e_netdev_priv *np = netdev_priv(netdev);
5b86c5cf 2189 bool if_running = netif_running(netdev);
c7d05ca8
JB		 2190 struct i40e_pf *pf = np->vsi->back;
2191
c7d05ca8
JB		 2192 if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
2193 /* Offline tests */
b03aaa9c 2194 netif_info(pf, drv, netdev, "offline testing starting\n");
c7d05ca8 2195
0da36b97 2196 set_bit(__I40E_TESTING, pf->state);
e17bc411 2197
510efb26 2198 if (i40e_active_vfs(pf) || i40e_active_vmdqs(pf)) {
e17bc411 2199 dev_warn(&pf->pdev->dev,
510efb26 2200 "Please take active VFs and Netqueues offline and restart the adapter before running NIC diagnostics\n");
e17bc411
GR		 2201 data[I40E_ETH_TEST_REG] = 1;
2202 data[I40E_ETH_TEST_EEPROM] = 1;
2203 data[I40E_ETH_TEST_INTR] = 1;
e17bc411
GR		 2204 data[I40E_ETH_TEST_LINK] = 1;
2205 eth_test->flags |= ETH_TEST_FL_FAILED;
0da36b97 2206 clear_bit(__I40E_TESTING, pf->state);
e17bc411
GR		 2207 goto skip_ol_tests;
2208 }
2209
5b86c5cf
GR		 2210 /* If the device is online then take it offline */
2211 if (if_running)
2212 /* indicate we're in test mode */
08ca3874 2213 i40e_close(netdev);
5b86c5cf 2214 else
b4e53f02
GR		 2215 /* This reset does not affect link - if it is
2216 * changed to a type of reset that does affect
2217 * link then the following link test would have
2218 * to be moved to before the reset
2219 */
373149fc 2220 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true);
f551b438 2221
7b086397 2222 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK]))
c7d05ca8
JB		 2223 eth_test->flags |= ETH_TEST_FL_FAILED;
2224
7b086397 2225 if (i40e_eeprom_test(netdev, &data[I40E_ETH_TEST_EEPROM]))
c7d05ca8
JB		 2226 eth_test->flags |= ETH_TEST_FL_FAILED;
2227
7b086397 2228 if (i40e_intr_test(netdev, &data[I40E_ETH_TEST_INTR]))
c7d05ca8
JB		 2229 eth_test->flags |= ETH_TEST_FL_FAILED;
2230
f551b438
SN		 2231 /* run reg test last, a reset is required after it */
2232 if (i40e_reg_test(netdev, &data[I40E_ETH_TEST_REG]))
2233 eth_test->flags |= ETH_TEST_FL_FAILED;
2234
0da36b97 2235 clear_bit(__I40E_TESTING, pf->state);
373149fc 2236 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true);
5b86c5cf
GR		 2237
2238 if (if_running)
08ca3874 2239 i40e_open(netdev);
c7d05ca8 2240 } else {
c7d05ca8 2241 /* Online tests */
b03aaa9c
SN		 2242 netif_info(pf, drv, netdev, "online testing starting\n");
2243
7b086397 2244 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK]))
c7d05ca8
JB		 2245 eth_test->flags |= ETH_TEST_FL_FAILED;
2246
2247 /* Offline only tests, not run in online; pass by default */
2248 data[I40E_ETH_TEST_REG] = 0;
2249 data[I40E_ETH_TEST_EEPROM] = 0;
2250 data[I40E_ETH_TEST_INTR] = 0;
c7d05ca8 2251 }
c140c17b 2252
e17bc411
GR		 2253skip_ol_tests:
2254
b03aaa9c 2255 netif_info(pf, drv, netdev, "testing finished\n");
c7d05ca8
JB		 2256}
2257
2258static void i40e_get_wol(struct net_device *netdev,
2259 struct ethtool_wolinfo *wol)
2260{
8e2773ae
SN		 2261 struct i40e_netdev_priv *np = netdev_priv(netdev);
2262 struct i40e_pf *pf = np->vsi->back;
2263 struct i40e_hw *hw = &pf->hw;
2264 u16 wol_nvm_bits;
2265
2266 /* NVM bit on means WoL disabled for the port */
2267 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
41a1d04b 2268 if ((BIT(hw->port) & wol_nvm_bits) || (hw->partition_id != 1)) {
8e2773ae
SN		 2269 wol->supported = 0;
2270 wol->wolopts = 0;
2271 } else {
2272 wol->supported = WAKE_MAGIC;
2273 wol->wolopts = (pf->wol_en ? WAKE_MAGIC : 0);
2274 }
2275}
2276
f0d8c733
SN		 2277/**
2278 * i40e_set_wol - set the WakeOnLAN configuration
2279 * @netdev: the netdev in question
2280 * @wol: the ethtool WoL setting data
2281 **/
8e2773ae
SN		 2282static int i40e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
2283{
2284 struct i40e_netdev_priv *np = netdev_priv(netdev);
2285 struct i40e_pf *pf = np->vsi->back;
f0d8c733 2286 struct i40e_vsi *vsi = np->vsi;
8e2773ae
SN		 2287 struct i40e_hw *hw = &pf->hw;
2288 u16 wol_nvm_bits;
2289
f0d8c733
SN		 2290 /* WoL not supported if this isn't the controlling PF on the port */
2291 if (hw->partition_id != 1) {
2292 i40e_partition_setting_complaint(pf);
2293 return -EOPNOTSUPP;
2294 }
2295
2296 if (vsi != pf->vsi[pf->lan_vsi])
2297 return -EOPNOTSUPP;
2298
8e2773ae
SN		 2299 /* NVM bit on means WoL disabled for the port */
2300 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
41a1d04b 2301 if (BIT(hw->port) & wol_nvm_bits)
8e2773ae
SN		 2302 return -EOPNOTSUPP;
2303
2304 /* only magic packet is supported */
2305 if (wol->wolopts && (wol->wolopts != WAKE_MAGIC))
2306 return -EOPNOTSUPP;
2307
2308 /* is this a new value? */
2309 if (pf->wol_en != !!wol->wolopts) {
2310 pf->wol_en = !!wol->wolopts;
2311 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
2312 }
2313
c7d05ca8
JB		 2314 return 0;
2315}
2316
2317static int i40e_set_phys_id(struct net_device *netdev,
2318 enum ethtool_phys_id_state state)
2319{
2320 struct i40e_netdev_priv *np = netdev_priv(netdev);
31b606d0 2321 i40e_status ret = 0;
c7d05ca8
JB		 2322 struct i40e_pf *pf = np->vsi->back;
2323 struct i40e_hw *hw = &pf->hw;
2324 int blink_freq = 2;
31b606d0 2325 u16 temp_status;
c7d05ca8
JB		 2326
2327 switch (state) {
2328 case ETHTOOL_ID_ACTIVE:
d36e41dc 2329 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) {
31b606d0
CW		 2330 pf->led_status = i40e_led_get(hw);
2331 } else {
052b93d0
MS		 2332 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE))
2333 i40e_aq_set_phy_debug(hw, I40E_PHY_DEBUG_ALL,
2334 NULL);
31b606d0
CW		 2335 ret = i40e_led_get_phy(hw, &temp_status,
2336 &pf->phy_led_val);
2337 pf->led_status = temp_status;
2338 }
c7d05ca8
JB		 2339 return blink_freq;
2340 case ETHTOOL_ID_ON:
d36e41dc 2341 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS))
31b606d0
CW		 2342 i40e_led_set(hw, 0xf, false);
2343 else
2344 ret = i40e_led_set_phy(hw, true, pf->led_status, 0);
c7d05ca8
JB		 2345 break;
2346 case ETHTOOL_ID_OFF:
d36e41dc 2347 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS))
31b606d0
CW		 2348 i40e_led_set(hw, 0x0, false);
2349 else
2350 ret = i40e_led_set_phy(hw, false, pf->led_status, 0);
c7d05ca8
JB		 2351 break;
2352 case ETHTOOL_ID_INACTIVE:
d36e41dc 2353 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) {
4f9b4307 2354 i40e_led_set(hw, pf->led_status, false);
31b606d0
CW		 2355 } else {
2356 ret = i40e_led_set_phy(hw, false, pf->led_status,
2357 (pf->phy_led_val |
2358 I40E_PHY_LED_MODE_ORIG));
052b93d0
MS		 2359 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE))
2360 i40e_aq_set_phy_debug(hw, 0, NULL);
31b606d0 2361 }
c7d05ca8 2362 break;
579b23d8
AA		 2363 default:
2364 break;
c7d05ca8 2365 }
31b606d0
CW		 2366 if (ret)
2367 return -ENOENT;
2368 else
2369 return 0;
c7d05ca8
JB		 2370}
2371
2372/* NOTE: i40e hardware uses a conversion factor of 2 for Interrupt
2373 * Throttle Rate (ITR) ie. ITR(1) = 2us ITR(10) = 20 us, and also
2374 * 125us (8000 interrupts per second) == ITR(62)
2375 */
2376
65e87c03
JK		 2377/**
2378 * __i40e_get_coalesce - get per-queue coalesce settings
2379 * @netdev: the netdev to check
2380 * @ec: ethtool coalesce data structure
2381 * @queue: which queue to pick
2382 *
2383 * Gets the per-queue settings for coalescence. Specifically Rx and Tx usecs
2384 * are per queue. If queue is <0 then we default to queue 0 as the
2385 * representative value.
2386 **/
a75e8005
KL		 2387static int __i40e_get_coalesce(struct net_device *netdev,
2388 struct ethtool_coalesce *ec,
2389 int queue)
c7d05ca8
JB		 2390{
2391 struct i40e_netdev_priv *np = netdev_priv(netdev);
65e87c03 2392 struct i40e_ring *rx_ring, *tx_ring;
c7d05ca8
JB		 2393 struct i40e_vsi *vsi = np->vsi;
2394
2395 ec->tx_max_coalesced_frames_irq = vsi->work_limit;
2396 ec->rx_max_coalesced_frames_irq = vsi->work_limit;
2397
a03af69f
AB		 2398 /* rx and tx usecs has per queue value. If user doesn't specify the
2399 * queue, return queue 0's value to represent.
a75e8005 2400 */
a03af69f 2401 if (queue < 0)
a75e8005 2402 queue = 0;
a03af69f 2403 else if (queue >= vsi->num_queue_pairs)
a75e8005 2404 return -EINVAL;
a75e8005 2405
65e87c03
JK		 2406 rx_ring = vsi->rx_rings[queue];
2407 tx_ring = vsi->tx_rings[queue];
2408
40588ca6 2409 if (ITR_IS_DYNAMIC(rx_ring->itr_setting))
32f5f54a 2410 ec->use_adaptive_rx_coalesce = 1;
c7d05ca8 2411
40588ca6 2412 if (ITR_IS_DYNAMIC(tx_ring->itr_setting))
32f5f54a
MW		 2413 ec->use_adaptive_tx_coalesce = 1;
2414
40588ca6
AD		 2415 ec->rx_coalesce_usecs = rx_ring->itr_setting & ~I40E_ITR_DYNAMIC;
2416 ec->tx_coalesce_usecs = tx_ring->itr_setting & ~I40E_ITR_DYNAMIC;
65e87c03 2417
ac26fc13
JB		 2418 /* we use the _usecs_high to store/set the interrupt rate limit
2419 * that the hardware supports, that almost but not quite
2420 * fits the original intent of the ethtool variable,
2421 * the rx_coalesce_usecs_high limits total interrupts
2422 * per second from both tx/rx sources.
2423 */
2424 ec->rx_coalesce_usecs_high = vsi->int_rate_limit;
2425 ec->tx_coalesce_usecs_high = vsi->int_rate_limit;
c7d05ca8
JB		 2426
2427 return 0;
2428}
2429
65e87c03
JK		 2430/**
2431 * i40e_get_coalesce - get a netdev's coalesce settings
2432 * @netdev: the netdev to check
2433 * @ec: ethtool coalesce data structure
2434 *
2435 * Gets the coalesce settings for a particular netdev. Note that if user has
2436 * modified per-queue settings, this only guarantees to represent queue 0. See
2437 * __i40e_get_coalesce for more details.
2438 **/
a75e8005 2439static int i40e_get_coalesce(struct net_device *netdev,
c7d05ca8
JB		 2440 struct ethtool_coalesce *ec)
2441{
a75e8005
KL		 2442 return __i40e_get_coalesce(netdev, ec, -1);
2443}
2444
65e87c03
JK		 2445/**
2446 * i40e_get_per_queue_coalesce - gets coalesce settings for particular queue
2447 * @netdev: netdev structure
2448 * @ec: ethtool's coalesce settings
2449 * @queue: the particular queue to read
2450 *
2451 * Will read a specific queue's coalesce settings
2452 **/
be280bad
KL		 2453static int i40e_get_per_queue_coalesce(struct net_device *netdev, u32 queue,
2454 struct ethtool_coalesce *ec)
2455{
2456 return __i40e_get_coalesce(netdev, ec, queue);
2457}
2458
65e87c03
JK		 2459/**
2460 * i40e_set_itr_per_queue - set ITR values for specific queue
2461 * @vsi: the VSI to set values for
2462 * @ec: coalesce settings from ethtool
2463 * @queue: the queue to modify
2464 *
2465 * Change the ITR settings for a specific queue.
2466 **/
a75e8005
KL		 2467static void i40e_set_itr_per_queue(struct i40e_vsi *vsi,
2468 struct ethtool_coalesce *ec,
2469 int queue)
2470{
b5b5f370
AD		 2471 struct i40e_ring *rx_ring = vsi->rx_rings[queue];
2472 struct i40e_ring *tx_ring = vsi->tx_rings[queue];
a75e8005
KL		 2473 struct i40e_pf *pf = vsi->back;
2474 struct i40e_hw *hw = &pf->hw;
c7d05ca8 2475 struct i40e_q_vector *q_vector;
8b99b117 2476 u16 intrl;
a75e8005 2477
1c0e6a36 2478 intrl = i40e_intrl_usec_to_reg(vsi->int_rate_limit);
a75e8005 2479
92418fb1
AD		 2480 rx_ring->itr_setting = ITR_REG_ALIGN(ec->rx_coalesce_usecs);
2481 tx_ring->itr_setting = ITR_REG_ALIGN(ec->tx_coalesce_usecs);
a75e8005
KL		 2482
2483 if (ec->use_adaptive_rx_coalesce)
40588ca6 2484 rx_ring->itr_setting |= I40E_ITR_DYNAMIC;
a75e8005 2485 else
40588ca6 2486 rx_ring->itr_setting &= ~I40E_ITR_DYNAMIC;
a75e8005
KL		 2487
2488 if (ec->use_adaptive_tx_coalesce)
40588ca6 2489 tx_ring->itr_setting |= I40E_ITR_DYNAMIC;
a75e8005 2490 else
40588ca6 2491 tx_ring->itr_setting &= ~I40E_ITR_DYNAMIC;
a75e8005 2492
b5b5f370 2493 q_vector = rx_ring->q_vector;
556fdfd6 2494 q_vector->rx.target_itr = ITR_TO_REG(rx_ring->itr_setting);
a75e8005 2495
b5b5f370 2496 q_vector = tx_ring->q_vector;
556fdfd6
AD		 2497 q_vector->tx.target_itr = ITR_TO_REG(tx_ring->itr_setting);
2498
2499 /* The interrupt handler itself will take care of programming
2500 * the Tx and Rx ITR values based on the values we have entered
2501 * into the q_vector, no need to write the values now.
2502 */
a75e8005 2503
8b99b117 2504 wr32(hw, I40E_PFINT_RATEN(q_vector->reg_idx), intrl);
a75e8005
KL		 2505 i40e_flush(hw);
2506}
2507
65e87c03
JK		 2508/**
2509 * __i40e_set_coalesce - set coalesce settings for particular queue
2510 * @netdev: the netdev to change
2511 * @ec: ethtool coalesce settings
2512 * @queue: the queue to change
2513 *
2514 * Sets the coalesce settings for a particular queue.
2515 **/
a75e8005
KL		 2516static int __i40e_set_coalesce(struct net_device *netdev,
2517 struct ethtool_coalesce *ec,
2518 int queue)
2519{
2520 struct i40e_netdev_priv *np = netdev_priv(netdev);
06b2decd 2521 u16 intrl_reg, cur_rx_itr, cur_tx_itr;
c7d05ca8
JB		 2522 struct i40e_vsi *vsi = np->vsi;
2523 struct i40e_pf *pf = vsi->back;
c7d05ca8
JB		 2524 int i;
2525
2526 if (ec->tx_max_coalesced_frames_irq || ec->rx_max_coalesced_frames_irq)
2527 vsi->work_limit = ec->tx_max_coalesced_frames_irq;
2528
06b2decd 2529 if (queue < 0) {
40588ca6
AD		 2530 cur_rx_itr = vsi->rx_rings[0]->itr_setting;
2531 cur_tx_itr = vsi->tx_rings[0]->itr_setting;
06b2decd 2532 } else if (queue < vsi->num_queue_pairs) {
40588ca6
AD		 2533 cur_rx_itr = vsi->rx_rings[queue]->itr_setting;
2534 cur_tx_itr = vsi->tx_rings[queue]->itr_setting;
06b2decd
AB		 2535 } else {
2536 netif_info(pf, drv, netdev, "Invalid queue value, queue range is 0 - %d\n",
2537 vsi->num_queue_pairs - 1);
2538 return -EINVAL;
2539 }
2540
2541 cur_tx_itr &= ~I40E_ITR_DYNAMIC;
2542 cur_rx_itr &= ~I40E_ITR_DYNAMIC;
2543
ac26fc13
JB		 2544 /* tx_coalesce_usecs_high is ignored, use rx-usecs-high instead */
2545 if (ec->tx_coalesce_usecs_high != vsi->int_rate_limit) {
2546 netif_info(pf, drv, netdev, "tx-usecs-high is not used, please program rx-usecs-high\n");
2547 return -EINVAL;
2548 }
2549
33084060
AB		 2550 if (ec->rx_coalesce_usecs_high > INTRL_REG_TO_USEC(I40E_MAX_INTRL)) {
2551 netif_info(pf, drv, netdev, "Invalid value, rx-usecs-high range is 0-%lu\n",
2552 INTRL_REG_TO_USEC(I40E_MAX_INTRL));
ac26fc13
JB		 2553 return -EINVAL;
2554 }
2555
06b2decd
AB		 2556 if (ec->rx_coalesce_usecs != cur_rx_itr &&
2557 ec->use_adaptive_rx_coalesce) {
2558 netif_info(pf, drv, netdev, "RX interrupt moderation cannot be changed if adaptive-rx is enabled.\n");
2559 return -EINVAL;
5c2cebda 2560 }
c7d05ca8 2561
92418fb1 2562 if (ec->rx_coalesce_usecs > I40E_MAX_ITR) {
06b2decd
AB		 2563 netif_info(pf, drv, netdev, "Invalid value, rx-usecs range is 0-8160\n");
2564 return -EINVAL;
2565 }
2566
2567 if (ec->tx_coalesce_usecs != cur_tx_itr &&
2568 ec->use_adaptive_tx_coalesce) {
2569 netif_info(pf, drv, netdev, "TX interrupt moderation cannot be changed if adaptive-tx is enabled.\n");
2570 return -EINVAL;
2571 }
2572
92418fb1 2573 if (ec->tx_coalesce_usecs > I40E_MAX_ITR) {
06b2decd
AB		 2574 netif_info(pf, drv, netdev, "Invalid value, tx-usecs range is 0-8160\n");
2575 return -EINVAL;
2576 }
2577
2578 if (ec->use_adaptive_rx_coalesce && !cur_rx_itr)
92418fb1 2579 ec->rx_coalesce_usecs = I40E_MIN_ITR;
06b2decd
AB		 2580
2581 if (ec->use_adaptive_tx_coalesce && !cur_tx_itr)
92418fb1 2582 ec->tx_coalesce_usecs = I40E_MIN_ITR;
06b2decd 2583
33084060
AB		 2584 intrl_reg = i40e_intrl_usec_to_reg(ec->rx_coalesce_usecs_high);
2585 vsi->int_rate_limit = INTRL_REG_TO_USEC(intrl_reg);
2586 if (vsi->int_rate_limit != ec->rx_coalesce_usecs_high) {
2587 netif_info(pf, drv, netdev, "Interrupt rate limit rounded down to %d\n",
2588 vsi->int_rate_limit);
2589 }
ac26fc13 2590
a03af69f
AB		 2591 /* rx and tx usecs has per queue value. If user doesn't specify the
2592 * queue, apply to all queues.
a75e8005
KL		 2593 */
2594 if (queue < 0) {
2595 for (i = 0; i < vsi->num_queue_pairs; i++)
2596 i40e_set_itr_per_queue(vsi, ec, i);
a75e8005 2597 } else {
06b2decd 2598 i40e_set_itr_per_queue(vsi, ec, queue);
c7d05ca8
JB		 2599 }
2600
2601 return 0;
2602}
2603
65e87c03
JK		 2604/**
2605 * i40e_set_coalesce - set coalesce settings for every queue on the netdev
2606 * @netdev: the netdev to change
2607 * @ec: ethtool coalesce settings
2608 *
2609 * This will set each queue to the same coalesce settings.
2610 **/
a75e8005
KL		 2611static int i40e_set_coalesce(struct net_device *netdev,
2612 struct ethtool_coalesce *ec)
2613{
2614 return __i40e_set_coalesce(netdev, ec, -1);
2615}
2616
65e87c03
JK		 2617/**
2618 * i40e_set_per_queue_coalesce - set specific queue's coalesce settings
2619 * @netdev: the netdev to change
2620 * @ec: ethtool's coalesce settings
2621 * @queue: the queue to change
2622 *
2623 * Sets the specified queue's coalesce settings.
2624 **/
f3757a4d
KL		 2625static int i40e_set_per_queue_coalesce(struct net_device *netdev, u32 queue,
2626 struct ethtool_coalesce *ec)
2627{
2628 return __i40e_set_coalesce(netdev, ec, queue);
2629}
2630
c7d05ca8
JB		 2631/**
2632 * i40e_get_rss_hash_opts - Get RSS hash Input Set for each flow type
2633 * @pf: pointer to the physical function struct
2634 * @cmd: ethtool rxnfc command
2635 *
2636 * Returns Success if the flow is supported, else Invalid Input.
2637 **/
2638static int i40e_get_rss_hash_opts(struct i40e_pf *pf, struct ethtool_rxnfc *cmd)
2639{
eb0dd6e4
CW		 2640 struct i40e_hw *hw = &pf->hw;
2641 u8 flow_pctype = 0;
2642 u64 i_set = 0;
2643
c7d05ca8
JB		 2644 cmd->data = 0;
2645
c7d05ca8
JB		 2646 switch (cmd->flow_type) {
2647 case TCP_V4_FLOW:
eb0dd6e4
CW		 2648 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
2649 break;
c7d05ca8 2650 case UDP_V4_FLOW:
eb0dd6e4
CW		 2651 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
2652 break;
2653 case TCP_V6_FLOW:
2654 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP;
2655 break;
2656 case UDP_V6_FLOW:
2657 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP;
2658 break;
c7d05ca8
JB		 2659 case SCTP_V4_FLOW:
2660 case AH_ESP_V4_FLOW:
2661 case AH_V4_FLOW:
2662 case ESP_V4_FLOW:
2663 case IPV4_FLOW:
c7d05ca8
JB		 2664 case SCTP_V6_FLOW:
2665 case AH_ESP_V6_FLOW:
2666 case AH_V6_FLOW:
2667 case ESP_V6_FLOW:
2668 case IPV6_FLOW:
eb0dd6e4 2669 /* Default is src/dest for IP, no matter the L4 hashing */
c7d05ca8
JB		 2670 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2671 break;
2672 default:
2673 return -EINVAL;
2674 }
2675
eb0dd6e4
CW		 2676 /* Read flow based hash input set register */
2677 if (flow_pctype) {
2678 i_set = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0,
2679 flow_pctype)) |
2680 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1,
2681 flow_pctype)) << 32);
2682 }
2683
2684 /* Process bits of hash input set */
2685 if (i_set) {
2686 if (i_set & I40E_L4_SRC_MASK)
2687 cmd->data |= RXH_L4_B_0_1;
2688 if (i_set & I40E_L4_DST_MASK)
2689 cmd->data |= RXH_L4_B_2_3;
2690
2691 if (cmd->flow_type == TCP_V4_FLOW ||
2692 cmd->flow_type == UDP_V4_FLOW) {
2693 if (i_set & I40E_L3_SRC_MASK)
2694 cmd->data |= RXH_IP_SRC;
2695 if (i_set & I40E_L3_DST_MASK)
2696 cmd->data |= RXH_IP_DST;
2697 } else if (cmd->flow_type == TCP_V6_FLOW ||
2698 cmd->flow_type == UDP_V6_FLOW) {
2699 if (i_set & I40E_L3_V6_SRC_MASK)
2700 cmd->data |= RXH_IP_SRC;
2701 if (i_set & I40E_L3_V6_DST_MASK)
2702 cmd->data |= RXH_IP_DST;
2703 }
2704 }
2705
c7d05ca8
JB		 2706 return 0;
2707}
2708
e793095e
JK		 2709/**
2710 * i40e_check_mask - Check whether a mask field is set
2711 * @mask: the full mask value
f5254429 2712 * @field: mask of the field to check
e793095e
JK		 2713 *
2714 * If the given mask is fully set, return positive value. If the mask for the
2715 * field is fully unset, return zero. Otherwise return a negative error code.
2716 **/
2717static int i40e_check_mask(u64 mask, u64 field)
2718{
2719 u64 value = mask & field;
2720
2721 if (value == field)
2722 return 1;
2723 else if (!value)
2724 return 0;
2725 else
2726 return -1;
2727}
2728
2729/**
2730 * i40e_parse_rx_flow_user_data - Deconstruct user-defined data
2731 * @fsp: pointer to rx flow specification
2732 * @data: pointer to userdef data structure for storage
2733 *
2734 * Read the user-defined data and deconstruct the value into a structure. No
2735 * other code should read the user-defined data, so as to ensure that every
2736 * place consistently reads the value correctly.
2737 *
2738 * The user-defined field is a 64bit Big Endian format value, which we
2739 * deconstruct by reading bits or bit fields from it. Single bit flags shall
2740 * be defined starting from the highest bits, while small bit field values
2741 * shall be defined starting from the lowest bits.
2742 *
2743 * Returns 0 if the data is valid, and non-zero if the userdef data is invalid
2744 * and the filter should be rejected. The data structure will always be
2745 * modified even if FLOW_EXT is not set.
2746 *
2747 **/
2748static int i40e_parse_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp,
2749 struct i40e_rx_flow_userdef *data)
2750{
2751 u64 value, mask;
2752 int valid;
2753
2754 /* Zero memory first so it's always consistent. */
2755 memset(data, 0, sizeof(*data));
2756
2757 if (!(fsp->flow_type & FLOW_EXT))
2758 return 0;
2759
2760 value = be64_to_cpu(*((__be64 *)fsp->h_ext.data));
2761 mask = be64_to_cpu(*((__be64 *)fsp->m_ext.data));
2762
2763#define I40E_USERDEF_FLEX_WORD GENMASK_ULL(15, 0)
2764#define I40E_USERDEF_FLEX_OFFSET GENMASK_ULL(31, 16)
2765#define I40E_USERDEF_FLEX_FILTER GENMASK_ULL(31, 0)
2766
2767 valid = i40e_check_mask(mask, I40E_USERDEF_FLEX_FILTER);
2768 if (valid < 0) {
2769 return -EINVAL;
2770 } else if (valid) {
2771 data->flex_word = value & I40E_USERDEF_FLEX_WORD;
2772 data->flex_offset =
2773 (value & I40E_USERDEF_FLEX_OFFSET) >> 16;
2774 data->flex_filter = true;
2775 }
2776
2777 return 0;
2778}
2779
2780/**
2781 * i40e_fill_rx_flow_user_data - Fill in user-defined data field
2782 * @fsp: pointer to rx_flow specification
f5254429 2783 * @data: pointer to return userdef data
e793095e
JK		 2784 *
2785 * Reads the userdef data structure and properly fills in the user defined
2786 * fields of the rx_flow_spec.
2787 **/
2788static void i40e_fill_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp,
2789 struct i40e_rx_flow_userdef *data)
2790{
2791 u64 value = 0, mask = 0;
2792
2793 if (data->flex_filter) {
2794 value |= data->flex_word;
2795 value |= (u64)data->flex_offset << 16;
2796 mask |= I40E_USERDEF_FLEX_FILTER;
2797 }
2798
2799 if (value || mask)
2800 fsp->flow_type |= FLOW_EXT;
2801
2802 *((__be64 *)fsp->h_ext.data) = cpu_to_be64(value);
2803 *((__be64 *)fsp->m_ext.data) = cpu_to_be64(mask);
2804}
2805
17a73f6b
JG		 2806/**
2807 * i40e_get_ethtool_fdir_all - Populates the rule count of a command
2808 * @pf: Pointer to the physical function struct
2809 * @cmd: The command to get or set Rx flow classification rules
2810 * @rule_locs: Array of used rule locations
2811 *
2812 * This function populates both the total and actual rule count of
2813 * the ethtool flow classification command
2814 *
2815 * Returns 0 on success or -EMSGSIZE if entry not found
2816 **/
2817static int i40e_get_ethtool_fdir_all(struct i40e_pf *pf,
2818 struct ethtool_rxnfc *cmd,
2819 u32 *rule_locs)
2820{
2821 struct i40e_fdir_filter *rule;
2822 struct hlist_node *node2;
2823 int cnt = 0;
2824
2825 /* report total rule count */
082def10 2826 cmd->data = i40e_get_fd_cnt_all(pf);
17a73f6b
JG		 2827
2828 hlist_for_each_entry_safe(rule, node2,
2829 &pf->fdir_filter_list, fdir_node) {
2830 if (cnt == cmd->rule_cnt)
2831 return -EMSGSIZE;
2832
2833 rule_locs[cnt] = rule->fd_id;
2834 cnt++;
2835 }
2836
2837 cmd->rule_cnt = cnt;
2838
2839 return 0;
2840}
2841
2842/**
2843 * i40e_get_ethtool_fdir_entry - Look up a filter based on Rx flow
2844 * @pf: Pointer to the physical function struct
2845 * @cmd: The command to get or set Rx flow classification rules
2846 *
2847 * This function looks up a filter based on the Rx flow classification
2848 * command and fills the flow spec info for it if found
2849 *
2850 * Returns 0 on success or -EINVAL if filter not found
2851 **/
2852static int i40e_get_ethtool_fdir_entry(struct i40e_pf *pf,
2853 struct ethtool_rxnfc *cmd)
2854{
2855 struct ethtool_rx_flow_spec *fsp =
2856 (struct ethtool_rx_flow_spec *)&cmd->fs;
e793095e 2857 struct i40e_rx_flow_userdef userdef = {0};
17a73f6b
JG		 2858 struct i40e_fdir_filter *rule = NULL;
2859 struct hlist_node *node2;
36777d9f
JK		 2860 u64 input_set;
2861 u16 index;
17a73f6b 2862
17a73f6b
JG		 2863 hlist_for_each_entry_safe(rule, node2,
2864 &pf->fdir_filter_list, fdir_node) {
2865 if (fsp->location <= rule->fd_id)
2866 break;
2867 }
2868
2869 if (!rule || fsp->location != rule->fd_id)
2870 return -EINVAL;
2871
2872 fsp->flow_type = rule->flow_type;
7d54eb2c
ASJ		 2873 if (fsp->flow_type == IP_USER_FLOW) {
2874 fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4;
2875 fsp->h_u.usr_ip4_spec.proto = 0;
2876 fsp->m_u.usr_ip4_spec.proto = 0;
2877 }
2878
04b73bd7
ASJ		 2879 /* Reverse the src and dest notion, since the HW views them from
2880 * Tx perspective where as the user expects it from Rx filter view.
2881 */
2882 fsp->h_u.tcp_ip4_spec.psrc = rule->dst_port;
2883 fsp->h_u.tcp_ip4_spec.pdst = rule->src_port;
8ce43dce
JK		 2884 fsp->h_u.tcp_ip4_spec.ip4src = rule->dst_ip;
2885 fsp->h_u.tcp_ip4_spec.ip4dst = rule->src_ip;
387ce1a9 2886
36777d9f 2887 switch (rule->flow_type) {
f223c875
JK		 2888 case SCTP_V4_FLOW:
2889 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP;
2890 break;
36777d9f
JK		 2891 case TCP_V4_FLOW:
2892 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
2893 break;
2894 case UDP_V4_FLOW:
2895 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
2896 break;
2897 case IP_USER_FLOW:
2898 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER;
2899 break;
2900 default:
2901 /* If we have stored a filter with a flow type not listed here
2902 * it is almost certainly a driver bug. WARN(), and then
2903 * assign the input_set as if all fields are enabled to avoid
2904 * reading unassigned memory.
2905 */
2906 WARN(1, "Missing input set index for flow_type %d\n",
2907 rule->flow_type);
2908 input_set = 0xFFFFFFFFFFFFFFFFULL;
2909 goto no_input_set;
2910 }
2911
2912 input_set = i40e_read_fd_input_set(pf, index);
2913
2914no_input_set:
2915 if (input_set & I40E_L3_SRC_MASK)
40339af3 2916 fsp->m_u.tcp_ip4_spec.ip4src = htonl(0xFFFFFFFF);
36777d9f
JK		 2917
2918 if (input_set & I40E_L3_DST_MASK)
40339af3 2919 fsp->m_u.tcp_ip4_spec.ip4dst = htonl(0xFFFFFFFF);
36777d9f
JK		 2920
2921 if (input_set & I40E_L4_SRC_MASK)
40339af3 2922 fsp->m_u.tcp_ip4_spec.psrc = htons(0xFFFF);
36777d9f
JK		 2923
2924 if (input_set & I40E_L4_DST_MASK)
40339af3 2925 fsp->m_u.tcp_ip4_spec.pdst = htons(0xFFFF);
faa16e0f 2926
387ce1a9
ASJ		 2927 if (rule->dest_ctl == I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET)
2928 fsp->ring_cookie = RX_CLS_FLOW_DISC;
2929 else
2930 fsp->ring_cookie = rule->q_index;
17a73f6b 2931
e7c8c60b
ASJ		 2932 if (rule->dest_vsi != pf->vsi[pf->lan_vsi]->id) {
2933 struct i40e_vsi *vsi;
2934
2935 vsi = i40e_find_vsi_from_id(pf, rule->dest_vsi);
2936 if (vsi && vsi->type == I40E_VSI_SRIOV) {
43b15697
JK		 2937 /* VFs are zero-indexed by the driver, but ethtool
2938 * expects them to be one-indexed, so add one here
2939 */
2940 u64 ring_vf = vsi->vf_id + 1;
2941
2942 ring_vf <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF;
2943 fsp->ring_cookie |= ring_vf;
e7c8c60b
ASJ		 2944 }
2945 }
2946
0e588de1
JK		 2947 if (rule->flex_filter) {
2948 userdef.flex_filter = true;
2949 userdef.flex_word = be16_to_cpu(rule->flex_word);
2950 userdef.flex_offset = rule->flex_offset;
2951 }
2952
e793095e
JK		 2953 i40e_fill_rx_flow_user_data(fsp, &userdef);
2954
17a73f6b
JG		 2955 return 0;
2956}
2957
c7d05ca8
JB		 2958/**
2959 * i40e_get_rxnfc - command to get RX flow classification rules
2960 * @netdev: network interface device structure
2961 * @cmd: ethtool rxnfc command
f5254429 2962 * @rule_locs: pointer to store rule data
c7d05ca8
JB		 2963 *
2964 * Returns Success if the command is supported.
2965 **/
2966static int i40e_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd,
2967 u32 *rule_locs)
2968{
2969 struct i40e_netdev_priv *np = netdev_priv(netdev);
2970 struct i40e_vsi *vsi = np->vsi;
2971 struct i40e_pf *pf = vsi->back;
2972 int ret = -EOPNOTSUPP;
2973
2974 switch (cmd->cmd) {
2975 case ETHTOOL_GRXRINGS:
a9ce82f7 2976 cmd->data = vsi->rss_size;
c7d05ca8
JB		 2977 ret = 0;
2978 break;
2979 case ETHTOOL_GRXFH:
2980 ret = i40e_get_rss_hash_opts(pf, cmd);
2981 break;
2982 case ETHTOOL_GRXCLSRLCNT:
17a73f6b 2983 cmd->rule_cnt = pf->fdir_pf_active_filters;
082def10
ASJ		 2984 /* report total rule count */
2985 cmd->data = i40e_get_fd_cnt_all(pf);
c7d05ca8
JB		 2986 ret = 0;
2987 break;
2988 case ETHTOOL_GRXCLSRULE:
17a73f6b 2989 ret = i40e_get_ethtool_fdir_entry(pf, cmd);
c7d05ca8
JB		 2990 break;
2991 case ETHTOOL_GRXCLSRLALL:
17a73f6b
JG		 2992 ret = i40e_get_ethtool_fdir_all(pf, cmd, rule_locs);
2993 break;
c7d05ca8
JB		 2994 default:
2995 break;
2996 }
2997
2998 return ret;
2999}
3000
eb0dd6e4
CW		 3001/**
3002 * i40e_get_rss_hash_bits - Read RSS Hash bits from register
3003 * @nfc: pointer to user request
f5254429 3004 * @i_setc: bits currently set
eb0dd6e4
CW		 3005 *
3006 * Returns value of bits to be set per user request
3007 **/
3008static u64 i40e_get_rss_hash_bits(struct ethtool_rxnfc *nfc, u64 i_setc)
3009{
3010 u64 i_set = i_setc;
3011 u64 src_l3 = 0, dst_l3 = 0;
3012
3013 if (nfc->data & RXH_L4_B_0_1)
3014 i_set |= I40E_L4_SRC_MASK;
3015 else
3016 i_set &= ~I40E_L4_SRC_MASK;
3017 if (nfc->data & RXH_L4_B_2_3)
3018 i_set |= I40E_L4_DST_MASK;
3019 else
3020 i_set &= ~I40E_L4_DST_MASK;
3021
3022 if (nfc->flow_type == TCP_V6_FLOW || nfc->flow_type == UDP_V6_FLOW) {
3023 src_l3 = I40E_L3_V6_SRC_MASK;
3024 dst_l3 = I40E_L3_V6_DST_MASK;
3025 } else if (nfc->flow_type == TCP_V4_FLOW ||
3026 nfc->flow_type == UDP_V4_FLOW) {
3027 src_l3 = I40E_L3_SRC_MASK;
3028 dst_l3 = I40E_L3_DST_MASK;
3029 } else {
3030 /* Any other flow type are not supported here */
3031 return i_set;
3032 }
3033
3034 if (nfc->data & RXH_IP_SRC)
3035 i_set |= src_l3;
3036 else
3037 i_set &= ~src_l3;
3038 if (nfc->data & RXH_IP_DST)
3039 i_set |= dst_l3;
3040 else
3041 i_set &= ~dst_l3;
3042
3043 return i_set;
3044}
3045
c7d05ca8
JB		 3046/**
3047 * i40e_set_rss_hash_opt - Enable/Disable flow types for RSS hash
3048 * @pf: pointer to the physical function struct
f5254429 3049 * @nfc: ethtool rxnfc command
c7d05ca8
JB		 3050 *
3051 * Returns Success if the flow input set is supported.
3052 **/
3053static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc)
3054{
3055 struct i40e_hw *hw = &pf->hw;
272cdaf2
SN		 3056 u64 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) |
3057 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32);
eb0dd6e4
CW		 3058 u8 flow_pctype = 0;
3059 u64 i_set, i_setc;
c7d05ca8 3060
83d14c59
CW		 3061 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
3062 dev_err(&pf->pdev->dev,
3063 "Change of RSS hash input set is not supported when MFP mode is enabled\n");
3064 return -EOPNOTSUPP;
3065 }
3066
c7d05ca8
JB		 3067 /* RSS does not support anything other than hashing
3068 * to queues on src and dst IPs and ports
3069 */
3070 if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST |
3071 RXH_L4_B_0_1 | RXH_L4_B_2_3))
3072 return -EINVAL;
3073
c7d05ca8
JB		 3074 switch (nfc->flow_type) {
3075 case TCP_V4_FLOW:
eb0dd6e4 3076 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
d36e41dc 3077 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE)
eb0dd6e4
CW		 3078 hena |=
3079 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK);
c7d05ca8
JB		 3080 break;
3081 case TCP_V6_FLOW:
eb0dd6e4 3082 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP;
d36e41dc 3083 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE)
eb0dd6e4
CW		 3084 hena |=
3085 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK);
d36e41dc 3086 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE)
eb0dd6e4
CW		 3087 hena |=
3088 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK);
c7d05ca8
JB		 3089 break;
3090 case UDP_V4_FLOW:
eb0dd6e4 3091 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
d36e41dc 3092 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE)
eb0dd6e4
CW		 3093 hena |=
3094 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) |
3095 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP);
3096
3097 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4);
c7d05ca8
JB		 3098 break;
3099 case UDP_V6_FLOW:
eb0dd6e4 3100 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP;
d36e41dc 3101 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE)
eb0dd6e4
CW		 3102 hena |=
3103 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) |
3104 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP);
3105
3106 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6);
c7d05ca8
JB		 3107 break;
3108 case AH_ESP_V4_FLOW:
3109 case AH_V4_FLOW:
3110 case ESP_V4_FLOW:
3111 case SCTP_V4_FLOW:
3112 if ((nfc->data & RXH_L4_B_0_1) ||
3113 (nfc->data & RXH_L4_B_2_3))
3114 return -EINVAL;
41a1d04b 3115 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER);
c7d05ca8
JB		 3116 break;
3117 case AH_ESP_V6_FLOW:
3118 case AH_V6_FLOW:
3119 case ESP_V6_FLOW:
3120 case SCTP_V6_FLOW:
3121 if ((nfc->data & RXH_L4_B_0_1) ||
3122 (nfc->data & RXH_L4_B_2_3))
3123 return -EINVAL;
41a1d04b 3124 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER);
c7d05ca8
JB		 3125 break;
3126 case IPV4_FLOW:
41a1d04b
JB		 3127 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) |
3128 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4);
c7d05ca8
JB		 3129 break;
3130 case IPV6_FLOW:
41a1d04b
JB		 3131 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) |
3132 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6);
c7d05ca8
JB		 3133 break;
3134 default:
3135 return -EINVAL;
3136 }
3137
eb0dd6e4
CW		 3138 if (flow_pctype) {
3139 i_setc = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0,
3140 flow_pctype)) |
3141 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1,
3142 flow_pctype)) << 32);
3143 i_set = i40e_get_rss_hash_bits(nfc, i_setc);
3144 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, flow_pctype),
3145 (u32)i_set);
3146 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_pctype),
3147 (u32)(i_set >> 32));
3148 hena |= BIT_ULL(flow_pctype);
3149 }
3150
272cdaf2
SN		 3151 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena);
3152 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
c7d05ca8
JB		 3153 i40e_flush(hw);
3154
3155 return 0;
3156}
3157
c7d05ca8 3158/**
17a73f6b
JG		 3159 * i40e_update_ethtool_fdir_entry - Updates the fdir filter entry
3160 * @vsi: Pointer to the targeted VSI
3161 * @input: The filter to update or NULL to indicate deletion
3162 * @sw_idx: Software index to the filter
3163 * @cmd: The command to get or set Rx flow classification rules
c7d05ca8 3164 *
17a73f6b
JG		 3165 * This function updates (or deletes) a Flow Director entry from
3166 * the hlist of the corresponding PF
3167 *
3168 * Returns 0 on success
c7d05ca8 3169 **/
17a73f6b
JG		 3170static int i40e_update_ethtool_fdir_entry(struct i40e_vsi *vsi,
3171 struct i40e_fdir_filter *input,
3172 u16 sw_idx,
3173 struct ethtool_rxnfc *cmd)
c7d05ca8 3174{
17a73f6b 3175 struct i40e_fdir_filter *rule, *parent;
c7d05ca8 3176 struct i40e_pf *pf = vsi->back;
17a73f6b
JG		 3177 struct hlist_node *node2;
3178 int err = -EINVAL;
c7d05ca8 3179
17a73f6b
JG		 3180 parent = NULL;
3181 rule = NULL;
c7d05ca8 3182
17a73f6b
JG		 3183 hlist_for_each_entry_safe(rule, node2,
3184 &pf->fdir_filter_list, fdir_node) {
3185 /* hash found, or no matching entry */
3186 if (rule->fd_id >= sw_idx)
3187 break;
3188 parent = rule;
c7d05ca8
JB		 3189 }
3190
17a73f6b
JG		 3191 /* if there is an old rule occupying our place remove it */
3192 if (rule && (rule->fd_id == sw_idx)) {
c6da525d
JK		 3193 /* Remove this rule, since we're either deleting it, or
3194 * replacing it.
3195 */
3196 err = i40e_add_del_fdir(vsi, rule, false);
17a73f6b
JG		 3197 hlist_del(&rule->fdir_node);
3198 kfree(rule);
3199 pf->fdir_pf_active_filters--;
cbf61325
ASJ		 3200 }
3201
c6da525d
JK		 3202 /* If we weren't given an input, this is a delete, so just return the
3203 * error code indicating if there was an entry at the requested slot
17a73f6b
JG		 3204 */
3205 if (!input)
3206 return err;
c7d05ca8 3207
c6da525d 3208 /* Otherwise, install the new rule as requested */
17a73f6b 3209 INIT_HLIST_NODE(&input->fdir_node);
c7d05ca8 3210
17a73f6b
JG		 3211 /* add filter to the list */
3212 if (parent)
1d023284 3213 hlist_add_behind(&input->fdir_node, &parent->fdir_node);
17a73f6b
JG		 3214 else
3215 hlist_add_head(&input->fdir_node,
3216 &pf->fdir_filter_list);
c7d05ca8 3217
17a73f6b
JG		 3218 /* update counts */
3219 pf->fdir_pf_active_filters++;
c7d05ca8 3220
17a73f6b 3221 return 0;
c7d05ca8
JB		 3222}
3223
0e588de1
JK		 3224/**
3225 * i40e_prune_flex_pit_list - Cleanup unused entries in FLX_PIT table
3226 * @pf: pointer to PF structure
3227 *
3228 * This function searches the list of filters and determines which FLX_PIT
3229 * entries are still required. It will prune any entries which are no longer
3230 * in use after the deletion.
3231 **/
3232static void i40e_prune_flex_pit_list(struct i40e_pf *pf)
3233{
3234 struct i40e_flex_pit *entry, *tmp;
3235 struct i40e_fdir_filter *rule;
3236
3237 /* First, we'll check the l3 table */
3238 list_for_each_entry_safe(entry, tmp, &pf->l3_flex_pit_list, list) {
3239 bool found = false;
3240
3241 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) {
3242 if (rule->flow_type != IP_USER_FLOW)
3243 continue;
3244 if (rule->flex_filter &&
3245 rule->flex_offset == entry->src_offset) {
3246 found = true;
3247 break;
3248 }
3249 }
3250
3251 /* If we didn't find the filter, then we can prune this entry
3252 * from the list.
3253 */
3254 if (!found) {
3255 list_del(&entry->list);
3256 kfree(entry);
3257 }
3258 }
3259
3260 /* Followed by the L4 table */
3261 list_for_each_entry_safe(entry, tmp, &pf->l4_flex_pit_list, list) {
3262 bool found = false;
3263
3264 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) {
3265 /* Skip this filter if it's L3, since we already
3266 * checked those in the above loop
3267 */
3268 if (rule->flow_type == IP_USER_FLOW)
3269 continue;
3270 if (rule->flex_filter &&
3271 rule->flex_offset == entry->src_offset) {
3272 found = true;
3273 break;
3274 }
3275 }
3276
3277 /* If we didn't find the filter, then we can prune this entry
3278 * from the list.
3279 */
3280 if (!found) {
3281 list_del(&entry->list);
3282 kfree(entry);
3283 }
3284 }
3285}
3286
c7d05ca8 3287/**
17a73f6b
JG		 3288 * i40e_del_fdir_entry - Deletes a Flow Director filter entry
3289 * @vsi: Pointer to the targeted VSI
3290 * @cmd: The command to get or set Rx flow classification rules
c7d05ca8 3291 *
17a73f6b
JG		 3292 * The function removes a Flow Director filter entry from the
3293 * hlist of the corresponding PF
c7d05ca8 3294 *
17a73f6b
JG		 3295 * Returns 0 on success
3296 */
3297static int i40e_del_fdir_entry(struct i40e_vsi *vsi,
3298 struct ethtool_rxnfc *cmd)
c7d05ca8 3299{
17a73f6b
JG		 3300 struct ethtool_rx_flow_spec *fsp =
3301 (struct ethtool_rx_flow_spec *)&cmd->fs;
c7d05ca8 3302 struct i40e_pf *pf = vsi->back;
17a73f6b 3303 int ret = 0;
c7d05ca8 3304
0da36b97
JK		 3305 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
3306 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
60793f4a
ASJ		 3307 return -EBUSY;
3308
0da36b97 3309 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
1e1be8f6
ASJ		 3310 return -EBUSY;
3311
17a73f6b 3312 ret = i40e_update_ethtool_fdir_entry(vsi, NULL, fsp->location, cmd);
c7d05ca8 3313
0e588de1
JK		 3314 i40e_prune_flex_pit_list(pf);
3315
55a5e60b 3316 i40e_fdir_check_and_reenable(pf);
17a73f6b 3317 return ret;
c7d05ca8
JB		 3318}
3319
0e588de1
JK		 3320/**
3321 * i40e_unused_pit_index - Find an unused PIT index for given list
3322 * @pf: the PF data structure
3323 *
3324 * Find the first unused flexible PIT index entry. We search both the L3 and
3325 * L4 flexible PIT lists so that the returned index is unique and unused by
3326 * either currently programmed L3 or L4 filters. We use a bit field as storage
3327 * to track which indexes are already used.
3328 **/
3329static u8 i40e_unused_pit_index(struct i40e_pf *pf)
3330{
3331 unsigned long available_index = 0xFF;
3332 struct i40e_flex_pit *entry;
3333
3334 /* We need to make sure that the new index isn't in use by either L3
3335 * or L4 filters so that IP_USER_FLOW filters can program both L3 and
3336 * L4 to use the same index.
3337 */
3338
3339 list_for_each_entry(entry, &pf->l4_flex_pit_list, list)
3340 clear_bit(entry->pit_index, &available_index);
3341
3342 list_for_each_entry(entry, &pf->l3_flex_pit_list, list)
3343 clear_bit(entry->pit_index, &available_index);
3344
3345 return find_first_bit(&available_index, 8);
3346}
3347
3348/**
3349 * i40e_find_flex_offset - Find an existing flex src_offset
3350 * @flex_pit_list: L3 or L4 flex PIT list
3351 * @src_offset: new src_offset to find
3352 *
3353 * Searches the flex_pit_list for an existing offset. If no offset is
3354 * currently programmed, then this will return an ERR_PTR if there is no space
3355 * to add a new offset, otherwise it returns NULL.
3356 **/
3357static
3358struct i40e_flex_pit *i40e_find_flex_offset(struct list_head *flex_pit_list,
3359 u16 src_offset)
3360{
3361 struct i40e_flex_pit *entry;
3362 int size = 0;
3363
3364 /* Search for the src_offset first. If we find a matching entry
3365 * already programmed, we can simply re-use it.
3366 */
3367 list_for_each_entry(entry, flex_pit_list, list) {
3368 size++;
3369 if (entry->src_offset == src_offset)
3370 return entry;
3371 }
3372
3373 /* If we haven't found an entry yet, then the provided src offset has
3374 * not yet been programmed. We will program the src offset later on,
3375 * but we need to indicate whether there is enough space to do so
3376 * here. We'll make use of ERR_PTR for this purpose.
3377 */
3378 if (size >= I40E_FLEX_PIT_TABLE_SIZE)
3379 return ERR_PTR(-ENOSPC);
3380
3381 return NULL;
3382}
3383
3384/**
3385 * i40e_add_flex_offset - Add src_offset to flex PIT table list
3386 * @flex_pit_list: L3 or L4 flex PIT list
3387 * @src_offset: new src_offset to add
3388 * @pit_index: the PIT index to program
3389 *
3390 * This function programs the new src_offset to the list. It is expected that
3391 * i40e_find_flex_offset has already been tried and returned NULL, indicating
3392 * that this offset is not programmed, and that the list has enough space to
3393 * store another offset.
3394 *
3395 * Returns 0 on success, and negative value on error.
3396 **/
3397static int i40e_add_flex_offset(struct list_head *flex_pit_list,
3398 u16 src_offset,
3399 u8 pit_index)
3400{
3401 struct i40e_flex_pit *new_pit, *entry;
3402
3403 new_pit = kzalloc(sizeof(*entry), GFP_KERNEL);
3404 if (!new_pit)
3405 return -ENOMEM;
3406
3407 new_pit->src_offset = src_offset;
3408 new_pit->pit_index = pit_index;
3409
3410 /* We need to insert this item such that the list is sorted by
3411 * src_offset in ascending order.
3412 */
3413 list_for_each_entry(entry, flex_pit_list, list) {
3414 if (new_pit->src_offset < entry->src_offset) {
3415 list_add_tail(&new_pit->list, &entry->list);
3416 return 0;
3417 }
3418
3419 /* If we found an entry with our offset already programmed we
3420 * can simply return here, after freeing the memory. However,
3421 * if the pit_index does not match we need to report an error.
3422 */
3423 if (new_pit->src_offset == entry->src_offset) {
3424 int err = 0;
3425
3426 /* If the PIT index is not the same we can't re-use
3427 * the entry, so we must report an error.
3428 */
3429 if (new_pit->pit_index != entry->pit_index)
3430 err = -EINVAL;
3431
3432 kfree(new_pit);
3433 return err;
3434 }
3435 }
3436
3437 /* If we reached here, then we haven't yet added the item. This means
3438 * that we should add the item at the end of the list.
3439 */
3440 list_add_tail(&new_pit->list, flex_pit_list);
3441 return 0;
3442}
3443
3444/**
3445 * __i40e_reprogram_flex_pit - Re-program specific FLX_PIT table
3446 * @pf: Pointer to the PF structure
3447 * @flex_pit_list: list of flexible src offsets in use
f5254429 3448 * @flex_pit_start: index to first entry for this section of the table
0e588de1
JK		 3449 *
3450 * In order to handle flexible data, the hardware uses a table of values
3451 * called the FLX_PIT table. This table is used to indicate which sections of
3452 * the input correspond to what PIT index values. Unfortunately, hardware is
3453 * very restrictive about programming this table. Entries must be ordered by
3454 * src_offset in ascending order, without duplicates. Additionally, unused
3455 * entries must be set to the unused index value, and must have valid size and
3456 * length according to the src_offset ordering.
3457 *
3458 * This function will reprogram the FLX_PIT register from a book-keeping
3459 * structure that we guarantee is already ordered correctly, and has no more
3460 * than 3 entries.
3461 *
3462 * To make things easier, we only support flexible values of one word length,
3463 * rather than allowing variable length flexible values.
3464 **/
3465static void __i40e_reprogram_flex_pit(struct i40e_pf *pf,
3466 struct list_head *flex_pit_list,
3467 int flex_pit_start)
3468{
3469 struct i40e_flex_pit *entry = NULL;
3470 u16 last_offset = 0;
3471 int i = 0, j = 0;
3472
3473 /* First, loop over the list of flex PIT entries, and reprogram the
3474 * registers.
3475 */
3476 list_for_each_entry(entry, flex_pit_list, list) {
3477 /* We have to be careful when programming values for the
3478 * largest SRC_OFFSET value. It is possible that adding
3479 * additional empty values at the end would overflow the space
3480 * for the SRC_OFFSET in the FLX_PIT register. To avoid this,
3481 * we check here and add the empty values prior to adding the
3482 * largest value.
3483 *
3484 * To determine this, we will use a loop from i+1 to 3, which
3485 * will determine whether the unused entries would have valid
3486 * SRC_OFFSET. Note that there cannot be extra entries past
3487 * this value, because the only valid values would have been
3488 * larger than I40E_MAX_FLEX_SRC_OFFSET, and thus would not
3489 * have been added to the list in the first place.
3490 */
3491 for (j = i + 1; j < 3; j++) {
3492 u16 offset = entry->src_offset + j;
3493 int index = flex_pit_start + i;
3494 u32 value = I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED,
3495 1,
3496 offset - 3);
3497
3498 if (offset > I40E_MAX_FLEX_SRC_OFFSET) {
3499 i40e_write_rx_ctl(&pf->hw,
3500 I40E_PRTQF_FLX_PIT(index),
3501 value);
3502 i++;
3503 }
3504 }
3505
3506 /* Now, we can program the actual value into the table */
3507 i40e_write_rx_ctl(&pf->hw,
3508 I40E_PRTQF_FLX_PIT(flex_pit_start + i),
3509 I40E_FLEX_PREP_VAL(entry->pit_index + 50,
3510 1,
3511 entry->src_offset));
3512 i++;
3513 }
3514
3515 /* In order to program the last entries in the table, we need to
3516 * determine the valid offset. If the list is empty, we'll just start
3517 * with 0. Otherwise, we'll start with the last item offset and add 1.
3518 * This ensures that all entries have valid sizes. If we don't do this
3519 * correctly, the hardware will disable flexible field parsing.
3520 */
3521 if (!list_empty(flex_pit_list))
3522 last_offset = list_prev_entry(entry, list)->src_offset + 1;
3523
3524 for (; i < 3; i++, last_offset++) {
3525 i40e_write_rx_ctl(&pf->hw,
3526 I40E_PRTQF_FLX_PIT(flex_pit_start + i),
3527 I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED,
3528 1,
3529 last_offset));
3530 }
3531}
3532
3533/**
3534 * i40e_reprogram_flex_pit - Reprogram all FLX_PIT tables after input set change
3535 * @pf: pointer to the PF structure
3536 *
3537 * This function reprograms both the L3 and L4 FLX_PIT tables. See the
3538 * internal helper function for implementation details.
3539 **/
3540static void i40e_reprogram_flex_pit(struct i40e_pf *pf)
3541{
3542 __i40e_reprogram_flex_pit(pf, &pf->l3_flex_pit_list,
3543 I40E_FLEX_PIT_IDX_START_L3);
3544
3545 __i40e_reprogram_flex_pit(pf, &pf->l4_flex_pit_list,
3546 I40E_FLEX_PIT_IDX_START_L4);
3547
3548 /* We also need to program the L3 and L4 GLQF ORT register */
3549 i40e_write_rx_ctl(&pf->hw,
3550 I40E_GLQF_ORT(I40E_L3_GLQF_ORT_IDX),
3551 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L3,
3552 3, 1));
3553
3554 i40e_write_rx_ctl(&pf->hw,
3555 I40E_GLQF_ORT(I40E_L4_GLQF_ORT_IDX),
3556 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L4,
3557 3, 1));
3558}
3559
9229e993
JK		 3560/**
3561 * i40e_flow_str - Converts a flow_type into a human readable string
f5254429 3562 * @fsp: the flow specification
9229e993
JK		 3563 *
3564 * Currently only flow types we support are included here, and the string
3565 * value attempts to match what ethtool would use to configure this flow type.
3566 **/
3567static const char *i40e_flow_str(struct ethtool_rx_flow_spec *fsp)
3568{
3569 switch (fsp->flow_type & ~FLOW_EXT) {
3570 case TCP_V4_FLOW:
3571 return "tcp4";
3572 case UDP_V4_FLOW:
3573 return "udp4";
3574 case SCTP_V4_FLOW:
3575 return "sctp4";
3576 case IP_USER_FLOW:
3577 return "ip4";
3578 default:
3579 return "unknown";
3580 }
3581}
3582
0e588de1
JK		 3583/**
3584 * i40e_pit_index_to_mask - Return the FLEX mask for a given PIT index
3585 * @pit_index: PIT index to convert
3586 *
3587 * Returns the mask for a given PIT index. Will return 0 if the pit_index is
3588 * of range.
3589 **/
3590static u64 i40e_pit_index_to_mask(int pit_index)
3591{
3592 switch (pit_index) {
3593 case 0:
3594 return I40E_FLEX_50_MASK;
3595 case 1:
3596 return I40E_FLEX_51_MASK;
3597 case 2:
3598 return I40E_FLEX_52_MASK;
3599 case 3:
3600 return I40E_FLEX_53_MASK;
3601 case 4:
3602 return I40E_FLEX_54_MASK;
3603 case 5:
3604 return I40E_FLEX_55_MASK;
3605 case 6:
3606 return I40E_FLEX_56_MASK;
3607 case 7:
3608 return I40E_FLEX_57_MASK;
3609 default:
3610 return 0;
3611 }
3612}
3613
9229e993
JK		 3614/**
3615 * i40e_print_input_set - Show changes between two input sets
3616 * @vsi: the vsi being configured
3617 * @old: the old input set
3618 * @new: the new input set
3619 *
3620 * Print the difference between old and new input sets by showing which series
3621 * of words are toggled on or off. Only displays the bits we actually support
3622 * changing.
3623 **/
3624static void i40e_print_input_set(struct i40e_vsi *vsi, u64 old, u64 new)
3625{
3626 struct i40e_pf *pf = vsi->back;
3627 bool old_value, new_value;
0e588de1 3628 int i;
9229e993
JK		 3629
3630 old_value = !!(old & I40E_L3_SRC_MASK);
3631 new_value = !!(new & I40E_L3_SRC_MASK);
3632 if (old_value != new_value)
3633 netif_info(pf, drv, vsi->netdev, "L3 source address: %s -> %s\n",
3634 old_value ? "ON" : "OFF",
3635 new_value ? "ON" : "OFF");
3636
3637 old_value = !!(old & I40E_L3_DST_MASK);
3638 new_value = !!(new & I40E_L3_DST_MASK);
3639 if (old_value != new_value)
3640 netif_info(pf, drv, vsi->netdev, "L3 destination address: %s -> %s\n",
3641 old_value ? "ON" : "OFF",
3642 new_value ? "ON" : "OFF");
3643
3644 old_value = !!(old & I40E_L4_SRC_MASK);
3645 new_value = !!(new & I40E_L4_SRC_MASK);
3646 if (old_value != new_value)
3647 netif_info(pf, drv, vsi->netdev, "L4 source port: %s -> %s\n",
3648 old_value ? "ON" : "OFF",
3649 new_value ? "ON" : "OFF");
3650
3651 old_value = !!(old & I40E_L4_DST_MASK);
3652 new_value = !!(new & I40E_L4_DST_MASK);
3653 if (old_value != new_value)
3654 netif_info(pf, drv, vsi->netdev, "L4 destination port: %s -> %s\n",
3655 old_value ? "ON" : "OFF",
3656 new_value ? "ON" : "OFF");
3657
3658 old_value = !!(old & I40E_VERIFY_TAG_MASK);
3659 new_value = !!(new & I40E_VERIFY_TAG_MASK);
3660 if (old_value != new_value)
3661 netif_info(pf, drv, vsi->netdev, "SCTP verification tag: %s -> %s\n",
3662 old_value ? "ON" : "OFF",
3663 new_value ? "ON" : "OFF");
3664
0e588de1
JK		 3665 /* Show change of flexible filter entries */
3666 for (i = 0; i < I40E_FLEX_INDEX_ENTRIES; i++) {
3667 u64 flex_mask = i40e_pit_index_to_mask(i);
3668
3669 old_value = !!(old & flex_mask);
3670 new_value = !!(new & flex_mask);
3671 if (old_value != new_value)
3672 netif_info(pf, drv, vsi->netdev, "FLEX index %d: %s -> %s\n",
3673 i,
3674 old_value ? "ON" : "OFF",
3675 new_value ? "ON" : "OFF");
3676 }
3677
9229e993
JK		 3678 netif_info(pf, drv, vsi->netdev, " Current input set: %0llx\n",
3679 old);
3680 netif_info(pf, drv, vsi->netdev, "Requested input set: %0llx\n",
3681 new);
3682}
3683
faa16e0f
JK		 3684/**
3685 * i40e_check_fdir_input_set - Check that a given rx_flow_spec mask is valid
36777d9f 3686 * @vsi: pointer to the targeted VSI
faa16e0f 3687 * @fsp: pointer to Rx flow specification
0e588de1 3688 * @userdef: userdefined data from flow specification
faa16e0f 3689 *
9229e993
JK		 3690 * Ensures that a given ethtool_rx_flow_spec has a valid mask. Some support
3691 * for partial matches exists with a few limitations. First, hardware only
3692 * supports masking by word boundary (2 bytes) and not per individual bit.
3693 * Second, hardware is limited to using one mask for a flow type and cannot
3694 * use a separate mask for each filter.
3695 *
3696 * To support these limitations, if we already have a configured filter for
3697 * the specified type, this function enforces that new filters of the type
3698 * match the configured input set. Otherwise, if we do not have a filter of
3699 * the specified type, we allow the input set to be updated to match the
3700 * desired filter.
3701 *
3702 * To help ensure that administrators understand why filters weren't displayed
3703 * as supported, we print a diagnostic message displaying how the input set
3704 * would change and warning to delete the preexisting filters if required.
3705 *
3706 * Returns 0 on successful input set match, and a negative return code on
3707 * failure.
faa16e0f 3708 **/
36777d9f 3709static int i40e_check_fdir_input_set(struct i40e_vsi *vsi,
0e588de1
JK		 3710 struct ethtool_rx_flow_spec *fsp,
3711 struct i40e_rx_flow_userdef *userdef)
faa16e0f 3712{
36777d9f 3713 struct i40e_pf *pf = vsi->back;
faa16e0f
JK		 3714 struct ethtool_tcpip4_spec *tcp_ip4_spec;
3715 struct ethtool_usrip4_spec *usr_ip4_spec;
36777d9f 3716 u64 current_mask, new_mask;
0e588de1
JK		 3717 bool new_flex_offset = false;
3718 bool flex_l3 = false;
9229e993 3719 u16 *fdir_filter_count;
0e588de1
JK		 3720 u16 index, src_offset = 0;
3721 u8 pit_index = 0;
3722 int err;
36777d9f
JK		 3723
3724 switch (fsp->flow_type & ~FLOW_EXT) {
f223c875
JK		 3725 case SCTP_V4_FLOW:
3726 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP;
3727 fdir_filter_count = &pf->fd_sctp4_filter_cnt;
3728 break;
36777d9f
JK		 3729 case TCP_V4_FLOW:
3730 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
9229e993 3731 fdir_filter_count = &pf->fd_tcp4_filter_cnt;
36777d9f
JK		 3732 break;
3733 case UDP_V4_FLOW:
3734 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
9229e993 3735 fdir_filter_count = &pf->fd_udp4_filter_cnt;
36777d9f
JK		 3736 break;
3737 case IP_USER_FLOW:
3738 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER;
9229e993 3739 fdir_filter_count = &pf->fd_ip4_filter_cnt;
0e588de1 3740 flex_l3 = true;
36777d9f
JK		 3741 break;
3742 default:
3743 return -EOPNOTSUPP;
3744 }
3745
3746 /* Read the current input set from register memory. */
3747 current_mask = i40e_read_fd_input_set(pf, index);
3748 new_mask = current_mask;
faa16e0f 3749
9229e993
JK		 3750 /* Determine, if any, the required changes to the input set in order
3751 * to support the provided mask.
3752 *
3753 * Hardware only supports masking at word (2 byte) granularity and does
3754 * not support full bitwise masking. This implementation simplifies
3755 * even further and only supports fully enabled or fully disabled
3756 * masks for each field, even though we could split the ip4src and
3757 * ip4dst fields.
3758 */
faa16e0f 3759 switch (fsp->flow_type & ~FLOW_EXT) {
f223c875
JK		 3760 case SCTP_V4_FLOW:
3761 new_mask &= ~I40E_VERIFY_TAG_MASK;
3762 /* Fall through */
faa16e0f
JK		 3763 case TCP_V4_FLOW:
3764 case UDP_V4_FLOW:
3765 tcp_ip4_spec = &fsp->m_u.tcp_ip4_spec;
3766
3767 /* IPv4 source address */
36777d9f
JK		 3768 if (tcp_ip4_spec->ip4src == htonl(0xFFFFFFFF))
3769 new_mask |= I40E_L3_SRC_MASK;
3770 else if (!tcp_ip4_spec->ip4src)
3771 new_mask &= ~I40E_L3_SRC_MASK;
3772 else
faa16e0f
JK		 3773 return -EOPNOTSUPP;
3774
3775 /* IPv4 destination address */
36777d9f
JK		 3776 if (tcp_ip4_spec->ip4dst == htonl(0xFFFFFFFF))
3777 new_mask |= I40E_L3_DST_MASK;
3778 else if (!tcp_ip4_spec->ip4dst)
3779 new_mask &= ~I40E_L3_DST_MASK;
3780 else
faa16e0f
JK		 3781 return -EOPNOTSUPP;
3782
3783 /* L4 source port */
36777d9f
JK		 3784 if (tcp_ip4_spec->psrc == htons(0xFFFF))
3785 new_mask |= I40E_L4_SRC_MASK;
3786 else if (!tcp_ip4_spec->psrc)
3787 new_mask &= ~I40E_L4_SRC_MASK;
3788 else
faa16e0f
JK		 3789 return -EOPNOTSUPP;
3790
3791 /* L4 destination port */
36777d9f
JK		 3792 if (tcp_ip4_spec->pdst == htons(0xFFFF))
3793 new_mask |= I40E_L4_DST_MASK;
3794 else if (!tcp_ip4_spec->pdst)
3795 new_mask &= ~I40E_L4_DST_MASK;
3796 else
faa16e0f
JK		 3797 return -EOPNOTSUPP;
3798
3799 /* Filtering on Type of Service is not supported. */
3800 if (tcp_ip4_spec->tos)
3801 return -EOPNOTSUPP;
3802
3803 break;
3804 case IP_USER_FLOW:
3805 usr_ip4_spec = &fsp->m_u.usr_ip4_spec;
3806
3807 /* IPv4 source address */
36777d9f
JK		 3808 if (usr_ip4_spec->ip4src == htonl(0xFFFFFFFF))
3809 new_mask |= I40E_L3_SRC_MASK;
3810 else if (!usr_ip4_spec->ip4src)
3811 new_mask &= ~I40E_L3_SRC_MASK;
3812 else
faa16e0f
JK		 3813 return -EOPNOTSUPP;
3814
3815 /* IPv4 destination address */
36777d9f
JK		 3816 if (usr_ip4_spec->ip4dst == htonl(0xFFFFFFFF))
3817 new_mask |= I40E_L3_DST_MASK;
3818 else if (!usr_ip4_spec->ip4dst)
3819 new_mask &= ~I40E_L3_DST_MASK;
3820 else
faa16e0f
JK		 3821 return -EOPNOTSUPP;
3822
3823 /* First 4 bytes of L4 header */
36777d9f
JK		 3824 if (usr_ip4_spec->l4_4_bytes == htonl(0xFFFFFFFF))
3825 new_mask |= I40E_L4_SRC_MASK | I40E_L4_DST_MASK;
3826 else if (!usr_ip4_spec->l4_4_bytes)
3827 new_mask &= ~(I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
3828 else
faa16e0f
JK		 3829 return -EOPNOTSUPP;
3830
3831 /* Filtering on Type of Service is not supported. */
3832 if (usr_ip4_spec->tos)
3833 return -EOPNOTSUPP;
3834
0e588de1 3835 /* Filtering on IP version is not supported */
faa16e0f
JK		 3836 if (usr_ip4_spec->ip_ver)
3837 return -EINVAL;
3838
0e588de1 3839 /* Filtering on L4 protocol is not supported */
faa16e0f
JK		 3840 if (usr_ip4_spec->proto)
3841 return -EINVAL;
36777d9f 3842
faa16e0f
JK		 3843 break;
3844 default:
3845 return -EOPNOTSUPP;
3846 }
3847
0e588de1
JK		 3848 /* First, clear all flexible filter entries */
3849 new_mask &= ~I40E_FLEX_INPUT_MASK;
3850
3851 /* If we have a flexible filter, try to add this offset to the correct
3852 * flexible filter PIT list. Once finished, we can update the mask.
3853 * If the src_offset changed, we will get a new mask value which will
3854 * trigger an input set change.
3855 */
3856 if (userdef->flex_filter) {
3857 struct i40e_flex_pit *l3_flex_pit = NULL, *flex_pit = NULL;
3858
3859 /* Flexible offset must be even, since the flexible payload
3860 * must be aligned on 2-byte boundary.
3861 */
3862 if (userdef->flex_offset & 0x1) {
3863 dev_warn(&pf->pdev->dev,
3864 "Flexible data offset must be 2-byte aligned\n");
3865 return -EINVAL;
3866 }
3867
3868 src_offset = userdef->flex_offset >> 1;
3869
3870 /* FLX_PIT source offset value is only so large */
3871 if (src_offset > I40E_MAX_FLEX_SRC_OFFSET) {
3872 dev_warn(&pf->pdev->dev,
3873 "Flexible data must reside within first 64 bytes of the packet payload\n");
3874 return -EINVAL;
3875 }
3876
3877 /* See if this offset has already been programmed. If we get
3878 * an ERR_PTR, then the filter is not safe to add. Otherwise,
3879 * if we get a NULL pointer, this means we will need to add
3880 * the offset.
3881 */
3882 flex_pit = i40e_find_flex_offset(&pf->l4_flex_pit_list,
3883 src_offset);
3884 if (IS_ERR(flex_pit))
3885 return PTR_ERR(flex_pit);
3886
3887 /* IP_USER_FLOW filters match both L4 (ICMP) and L3 (unknown)
3888 * packet types, and thus we need to program both L3 and L4
3889 * flexible values. These must have identical flexible index,
3890 * as otherwise we can't correctly program the input set. So
3891 * we'll find both an L3 and L4 index and make sure they are
3892 * the same.
3893 */
3894 if (flex_l3) {
3895 l3_flex_pit =
3896 i40e_find_flex_offset(&pf->l3_flex_pit_list,
3897 src_offset);
3898 if (IS_ERR(l3_flex_pit))
3899 return PTR_ERR(l3_flex_pit);
3900
3901 if (flex_pit) {
3902 /* If we already had a matching L4 entry, we
3903 * need to make sure that the L3 entry we
3904 * obtained uses the same index.
3905 */
3906 if (l3_flex_pit) {
3907 if (l3_flex_pit->pit_index !=
3908 flex_pit->pit_index) {
3909 return -EINVAL;
3910 }
3911 } else {
3912 new_flex_offset = true;
3913 }
3914 } else {
3915 flex_pit = l3_flex_pit;
3916 }
3917 }
3918
3919 /* If we didn't find an existing flex offset, we need to
3920 * program a new one. However, we don't immediately program it
3921 * here because we will wait to program until after we check
3922 * that it is safe to change the input set.
3923 */
3924 if (!flex_pit) {
3925 new_flex_offset = true;
3926 pit_index = i40e_unused_pit_index(pf);
3927 } else {
3928 pit_index = flex_pit->pit_index;
3929 }
3930
3931 /* Update the mask with the new offset */
3932 new_mask |= i40e_pit_index_to_mask(pit_index);
3933 }
3934
3935 /* If the mask and flexible filter offsets for this filter match the
3936 * currently programmed values we don't need any input set change, so
3937 * this filter is safe to install.
9229e993 3938 */
0e588de1 3939 if (new_mask == current_mask && !new_flex_offset)
9229e993
JK		 3940 return 0;
3941
3942 netif_info(pf, drv, vsi->netdev, "Input set change requested for %s flows:\n",
3943 i40e_flow_str(fsp));
3944 i40e_print_input_set(vsi, current_mask, new_mask);
0e588de1
JK		 3945 if (new_flex_offset) {
3946 netif_info(pf, drv, vsi->netdev, "FLEX index %d: Offset -> %d",
3947 pit_index, src_offset);
3948 }
9229e993
JK		 3949
3950 /* Hardware input sets are global across multiple ports, so even the
3951 * main port cannot change them when in MFP mode as this would impact
3952 * any filters on the other ports.
3953 */
3954 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
3955 netif_err(pf, drv, vsi->netdev, "Cannot change Flow Director input sets while MFP is enabled\n");
3956 return -EOPNOTSUPP;
3957 }
3958
3959 /* This filter requires us to update the input set. However, hardware
3960 * only supports one input set per flow type, and does not support
3961 * separate masks for each filter. This means that we can only support
3962 * a single mask for all filters of a specific type.
3963 *
3964 * If we have preexisting filters, they obviously depend on the
3965 * current programmed input set. Display a diagnostic message in this
3966 * case explaining why the filter could not be accepted.
3967 */
3968 if (*fdir_filter_count) {
3969 netif_err(pf, drv, vsi->netdev, "Cannot change input set for %s flows until %d preexisting filters are removed\n",
3970 i40e_flow_str(fsp),
3971 *fdir_filter_count);
36777d9f 3972 return -EOPNOTSUPP;
9229e993
JK		 3973 }
3974
3975 i40e_write_fd_input_set(pf, index, new_mask);
36777d9f 3976
02b4016b
JK		 3977 /* IP_USER_FLOW filters match both IPv4/Other and IPv4/Fragmented
3978 * frames. If we're programming the input set for IPv4/Other, we also
3979 * need to program the IPv4/Fragmented input set. Since we don't have
3980 * separate support, we'll always assume and enforce that the two flow
3981 * types must have matching input sets.
3982 */
3983 if (index == I40E_FILTER_PCTYPE_NONF_IPV4_OTHER)
3984 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV4,
3985 new_mask);
3986
0e588de1
JK		 3987 /* Add the new offset and update table, if necessary */
3988 if (new_flex_offset) {
3989 err = i40e_add_flex_offset(&pf->l4_flex_pit_list, src_offset,
3990 pit_index);
3991 if (err)
3992 return err;
3993
3994 if (flex_l3) {
3995 err = i40e_add_flex_offset(&pf->l3_flex_pit_list,
3996 src_offset,
3997 pit_index);
3998 if (err)
3999 return err;
4000 }
4001
4002 i40e_reprogram_flex_pit(pf);
4003 }
4004
faa16e0f
JK		 4005 return 0;
4006}
4007
443ee71a
JK		 4008/**
4009 * i40e_match_fdir_filter - Return true of two filters match
4010 * @a: pointer to filter struct
4011 * @b: pointer to filter struct
4012 *
4013 * Returns true if the two filters match exactly the same criteria. I.e. they
4014 * match the same flow type and have the same parameters. We don't need to
4015 * check any input-set since all filters of the same flow type must use the
4016 * same input set.
4017 **/
4018static bool i40e_match_fdir_filter(struct i40e_fdir_filter *a,
4019 struct i40e_fdir_filter *b)
4020{
4021 /* The filters do not much if any of these criteria differ. */
4022 if (a->dst_ip != b->dst_ip ||
4023 a->src_ip != b->src_ip ||
4024 a->dst_port != b->dst_port ||
4025 a->src_port != b->src_port ||
4026 a->flow_type != b->flow_type ||
4027 a->ip4_proto != b->ip4_proto)
4028 return false;
4029
4030 return true;
4031}
4032
4033/**
4034 * i40e_disallow_matching_filters - Check that new filters differ
4035 * @vsi: pointer to the targeted VSI
4036 * @input: new filter to check
4037 *
4038 * Due to hardware limitations, it is not possible for two filters that match
4039 * similar criteria to be programmed at the same time. This is true for a few
4040 * reasons:
4041 *
4042 * (a) all filters matching a particular flow type must use the same input
4043 * set, that is they must match the same criteria.
4044 * (b) different flow types will never match the same packet, as the flow type
4045 * is decided by hardware before checking which rules apply.
4046 * (c) hardware has no way to distinguish which order filters apply in.
4047 *
4048 * Due to this, we can't really support using the location data to order
4049 * filters in the hardware parsing. It is technically possible for the user to
4050 * request two filters matching the same criteria but which select different
4051 * queues. In this case, rather than keep both filters in the list, we reject
4052 * the 2nd filter when the user requests adding it.
4053 *
4054 * This avoids needing to track location for programming the filter to
4055 * hardware, and ensures that we avoid some strange scenarios involving
4056 * deleting filters which match the same criteria.
4057 **/
4058static int i40e_disallow_matching_filters(struct i40e_vsi *vsi,
4059 struct i40e_fdir_filter *input)
4060{
4061 struct i40e_pf *pf = vsi->back;
4062 struct i40e_fdir_filter *rule;
4063 struct hlist_node *node2;
4064
4065 /* Loop through every filter, and check that it doesn't match */
4066 hlist_for_each_entry_safe(rule, node2,
4067 &pf->fdir_filter_list, fdir_node) {
4068 /* Don't check the filters match if they share the same fd_id,
4069 * since the new filter is actually just updating the target
4070 * of the old filter.
4071 */
4072 if (rule->fd_id == input->fd_id)
4073 continue;
4074
4075 /* If any filters match, then print a warning message to the
4076 * kernel message buffer and bail out.
4077 */
4078 if (i40e_match_fdir_filter(rule, input)) {
4079 dev_warn(&pf->pdev->dev,
4080 "Existing user defined filter %d already matches this flow.\n",
4081 rule->fd_id);
4082 return -EINVAL;
4083 }
4084 }
4085
4086 return 0;
4087}
4088
c7d05ca8 4089/**
1eaa3840 4090 * i40e_add_fdir_ethtool - Add/Remove Flow Director filters
c7d05ca8
JB		 4091 * @vsi: pointer to the targeted VSI
4092 * @cmd: command to get or set RX flow classification rules
c7d05ca8 4093 *
1eaa3840
ASJ		 4094 * Add Flow Director filters for a specific flow spec based on their
4095 * protocol. Returns 0 if the filters were successfully added.
c7d05ca8 4096 **/
1eaa3840
ASJ		 4097static int i40e_add_fdir_ethtool(struct i40e_vsi *vsi,
4098 struct ethtool_rxnfc *cmd)
c7d05ca8 4099{
e793095e 4100 struct i40e_rx_flow_userdef userdef;
17a73f6b
JG		 4101 struct ethtool_rx_flow_spec *fsp;
4102 struct i40e_fdir_filter *input;
43b15697 4103 u16 dest_vsi = 0, q_index = 0;
c7d05ca8 4104 struct i40e_pf *pf;
17a73f6b 4105 int ret = -EINVAL;
43b15697 4106 u8 dest_ctl;
c7d05ca8
JB		 4107
4108 if (!vsi)
4109 return -EINVAL;
c7d05ca8
JB		 4110 pf = vsi->back;
4111
55a5e60b
ASJ		 4112 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
4113 return -EOPNOTSUPP;
4114
134201ae 4115 if (test_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state))
55a5e60b
ASJ		 4116 return -ENOSPC;
4117
0da36b97
JK		 4118 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
4119 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
60793f4a
ASJ		 4120 return -EBUSY;
4121
0da36b97 4122 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
1e1be8f6
ASJ		 4123 return -EBUSY;
4124
55a5e60b
ASJ		 4125 fsp = (struct ethtool_rx_flow_spec *)&cmd->fs;
4126
e793095e
JK		 4127 /* Parse the user-defined field */
4128 if (i40e_parse_rx_flow_user_data(fsp, &userdef))
4129 return -EINVAL;
4130
1ec8deac
JK		 4131 /* Extended MAC field is not supported */
4132 if (fsp->flow_type & FLOW_MAC_EXT)
4133 return -EINVAL;
4134
0e588de1 4135 ret = i40e_check_fdir_input_set(vsi, fsp, &userdef);
faa16e0f
JK		 4136 if (ret)
4137 return ret;
4138
17a73f6b
JG		 4139 if (fsp->location >= (pf->hw.func_caps.fd_filters_best_effort +
4140 pf->hw.func_caps.fd_filters_guaranteed)) {
c7d05ca8 4141 return -EINVAL;
17a73f6b 4142 }
c7d05ca8 4143
43b15697
JK		 4144 /* ring_cookie is either the drop index, or is a mask of the queue
4145 * index and VF id we wish to target.
4146 */
4147 if (fsp->ring_cookie == RX_CLS_FLOW_DISC) {
4148 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET;
4149 } else {
4150 u32 ring = ethtool_get_flow_spec_ring(fsp->ring_cookie);
4151 u8 vf = ethtool_get_flow_spec_ring_vf(fsp->ring_cookie);
4152
4153 if (!vf) {
4154 if (ring >= vsi->num_queue_pairs)
4155 return -EINVAL;
4156 dest_vsi = vsi->id;
4157 } else {
4158 /* VFs are zero-indexed, so we subtract one here */
4159 vf--;
4160
4161 if (vf >= pf->num_alloc_vfs)
4162 return -EINVAL;
4163 if (ring >= pf->vf[vf].num_queue_pairs)
4164 return -EINVAL;
4165 dest_vsi = pf->vf[vf].lan_vsi_id;
4166 }
4167 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DIRECT_PACKET_QINDEX;
4168 q_index = ring;
4169 }
c7d05ca8 4170
17a73f6b 4171 input = kzalloc(sizeof(*input), GFP_KERNEL);
c7d05ca8 4172
17a73f6b
JG		 4173 if (!input)
4174 return -ENOMEM;
c7d05ca8 4175
17a73f6b 4176 input->fd_id = fsp->location;
43b15697
JK		 4177 input->q_index = q_index;
4178 input->dest_vsi = dest_vsi;
4179 input->dest_ctl = dest_ctl;
17a73f6b 4180 input->fd_status = I40E_FILTER_PROGRAM_DESC_FD_STATUS_FD_ID;
0bf4b1b0 4181 input->cnt_index = I40E_FD_SB_STAT_IDX(pf->hw.pf_id);
43b15697
JK		 4182 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src;
4183 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst;
e793095e 4184 input->flow_type = fsp->flow_type & ~FLOW_EXT;
17a73f6b 4185 input->ip4_proto = fsp->h_u.usr_ip4_spec.proto;
04b73bd7
ASJ		 4186
4187 /* Reverse the src and dest notion, since the HW expects them to be from
4188 * Tx perspective where as the input from user is from Rx filter view.
4189 */
4190 input->dst_port = fsp->h_u.tcp_ip4_spec.psrc;
4191 input->src_port = fsp->h_u.tcp_ip4_spec.pdst;
8ce43dce
JK		 4192 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src;
4193 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst;
17a73f6b 4194
0e588de1
JK		 4195 if (userdef.flex_filter) {
4196 input->flex_filter = true;
4197 input->flex_word = cpu_to_be16(userdef.flex_word);
4198 input->flex_offset = userdef.flex_offset;
4199 }
4200
443ee71a
JK		 4201 /* Avoid programming two filters with identical match criteria. */
4202 ret = i40e_disallow_matching_filters(vsi, input);
4203 if (ret)
4204 goto free_filter_memory;
4205
01016da1
JK		 4206 /* Add the input filter to the fdir_input_list, possibly replacing
4207 * a previous filter. Do not free the input structure after adding it
4208 * to the list as this would cause a use-after-free bug.
4209 */
4210 i40e_update_ethtool_fdir_entry(vsi, input, fsp->location, NULL);
ca6e1d0a
PM		 4211 ret = i40e_add_del_fdir(vsi, input, true);
4212 if (ret)
4213 goto remove_sw_rule;
01016da1
JK		 4214 return 0;
4215
ca6e1d0a
PM		 4216remove_sw_rule:
4217 hlist_del(&input->fdir_node);
4218 pf->fdir_pf_active_filters--;
443ee71a 4219free_filter_memory:
01016da1 4220 kfree(input);
c7d05ca8
JB		 4221 return ret;
4222}
8fb905b3 4223
c7d05ca8
JB		 4224/**
4225 * i40e_set_rxnfc - command to set RX flow classification rules
4226 * @netdev: network interface device structure
4227 * @cmd: ethtool rxnfc command
4228 *
4229 * Returns Success if the command is supported.
4230 **/
4231static int i40e_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd)
4232{
4233 struct i40e_netdev_priv *np = netdev_priv(netdev);
4234 struct i40e_vsi *vsi = np->vsi;
4235 struct i40e_pf *pf = vsi->back;
4236 int ret = -EOPNOTSUPP;
4237
4238 switch (cmd->cmd) {
4239 case ETHTOOL_SRXFH:
4240 ret = i40e_set_rss_hash_opt(pf, cmd);
4241 break;
4242 case ETHTOOL_SRXCLSRLINS:
1eaa3840 4243 ret = i40e_add_fdir_ethtool(vsi, cmd);
c7d05ca8
JB		 4244 break;
4245 case ETHTOOL_SRXCLSRLDEL:
17a73f6b 4246 ret = i40e_del_fdir_entry(vsi, cmd);
c7d05ca8
JB		 4247 break;
4248 default:
4249 break;
4250 }
4251
4252 return ret;
4253}
4254
4b7820ca
ASJ		 4255/**
4256 * i40e_max_channels - get Max number of combined channels supported
4257 * @vsi: vsi pointer
4258 **/
4259static unsigned int i40e_max_channels(struct i40e_vsi *vsi)
4260{
4261 /* TODO: This code assumes DCB and FD is disabled for now. */
4262 return vsi->alloc_queue_pairs;
4263}
4264
4265/**
4266 * i40e_get_channels - Get the current channels enabled and max supported etc.
f5254429 4267 * @dev: network interface device structure
4b7820ca
ASJ		 4268 * @ch: ethtool channels structure
4269 *
4270 * We don't support separate tx and rx queues as channels. The other count
4271 * represents how many queues are being used for control. max_combined counts
4272 * how many queue pairs we can support. They may not be mapped 1 to 1 with
4273 * q_vectors since we support a lot more queue pairs than q_vectors.
4274 **/
4275static void i40e_get_channels(struct net_device *dev,
f5254429 4276 struct ethtool_channels *ch)
4b7820ca
ASJ		 4277{
4278 struct i40e_netdev_priv *np = netdev_priv(dev);
4279 struct i40e_vsi *vsi = np->vsi;
4280 struct i40e_pf *pf = vsi->back;
4281
4282 /* report maximum channels */
4283 ch->max_combined = i40e_max_channels(vsi);
4284
4285 /* report info for other vector */
60ea5f83 4286 ch->other_count = (pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0;
4b7820ca
ASJ		 4287 ch->max_other = ch->other_count;
4288
4289 /* Note: This code assumes DCB is disabled for now. */
4290 ch->combined_count = vsi->num_queue_pairs;
4291}
4292
4293/**
4294 * i40e_set_channels - Set the new channels count.
f5254429 4295 * @dev: network interface device structure
4b7820ca
ASJ		 4296 * @ch: ethtool channels structure
4297 *
4298 * The new channels count may not be the same as requested by the user
4299 * since it gets rounded down to a power of 2 value.
4300 **/
4301static int i40e_set_channels(struct net_device *dev,
f5254429 4302 struct ethtool_channels *ch)
4b7820ca 4303{
59826d9b 4304 const u8 drop = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET;
4b7820ca
ASJ		 4305 struct i40e_netdev_priv *np = netdev_priv(dev);
4306 unsigned int count = ch->combined_count;
4307 struct i40e_vsi *vsi = np->vsi;
4308 struct i40e_pf *pf = vsi->back;
59826d9b
JK		 4309 struct i40e_fdir_filter *rule;
4310 struct hlist_node *node2;
4b7820ca 4311 int new_count;
59826d9b 4312 int err = 0;
4b7820ca
ASJ		 4313
4314 /* We do not support setting channels for any other VSI at present */
4315 if (vsi->type != I40E_VSI_MAIN)
4316 return -EINVAL;
4317
a9ce82f7
AN		 4318 /* We do not support setting channels via ethtool when TCs are
4319 * configured through mqprio
4320 */
4321 if (pf->flags & I40E_FLAG_TC_MQPRIO)
4322 return -EINVAL;
4323
4b7820ca
ASJ		 4324 /* verify they are not requesting separate vectors */
4325 if (!count || ch->rx_count || ch->tx_count)
4326 return -EINVAL;
4327
4328 /* verify other_count has not changed */
60ea5f83 4329 if (ch->other_count != ((pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0))
4b7820ca
ASJ		 4330 return -EINVAL;
4331
4332 /* verify the number of channels does not exceed hardware limits */
4333 if (count > i40e_max_channels(vsi))
4334 return -EINVAL;
4335
59826d9b
JK		 4336 /* verify that the number of channels does not invalidate any current
4337 * flow director rules
4338 */
4339 hlist_for_each_entry_safe(rule, node2,
4340 &pf->fdir_filter_list, fdir_node) {
4341 if (rule->dest_ctl != drop && count <= rule->q_index) {
4342 dev_warn(&pf->pdev->dev,
4343 "Existing user defined filter %d assigns flow to queue %d\n",
4344 rule->fd_id, rule->q_index);
4345 err = -EINVAL;
4346 }
4347 }
4348
4349 if (err) {
4350 dev_err(&pf->pdev->dev,
4351 "Existing filter rules must be deleted to reduce combined channel count to %d\n",
4352 count);
4353 return err;
4354 }
4355
4b7820ca
ASJ		 4356 /* update feature limits from largest to smallest supported values */
4357 /* TODO: Flow director limit, DCB etc */
4358
4b7820ca
ASJ		 4359 /* use rss_reconfig to rebuild with new queue count and update traffic
4360 * class queue mapping
4361 */
4362 new_count = i40e_reconfig_rss_queues(pf, count);
5f90f422 4363 if (new_count > 0)
4b7820ca
ASJ		 4364 return 0;
4365 else
4366 return -EINVAL;
4367}
4368
b29e13bb
MW		 4369/**
4370 * i40e_get_rxfh_key_size - get the RSS hash key size
4371 * @netdev: network interface device structure
4372 *
4373 * Returns the table size.
4374 **/
4375static u32 i40e_get_rxfh_key_size(struct net_device *netdev)
4376{
4377 return I40E_HKEY_ARRAY_SIZE;
4378}
4379
4380/**
4381 * i40e_get_rxfh_indir_size - get the rx flow hash indirection table size
4382 * @netdev: network interface device structure
4383 *
4384 * Returns the table size.
4385 **/
4386static u32 i40e_get_rxfh_indir_size(struct net_device *netdev)
4387{
4388 return I40E_HLUT_ARRAY_SIZE;
4389}
4390
21675bdc
AB		 4391/**
4392 * i40e_get_rxfh - get the rx flow hash indirection table
4393 * @netdev: network interface device structure
4394 * @indir: indirection table
4395 * @key: hash key
4396 * @hfunc: hash function
4397 *
4398 * Reads the indirection table directly from the hardware. Returns 0 on
4399 * success.
4400 **/
b29e13bb
MW		 4401static int i40e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
4402 u8 *hfunc)
4403{
4404 struct i40e_netdev_priv *np = netdev_priv(netdev);
4405 struct i40e_vsi *vsi = np->vsi;
043dd650
HZ		 4406 u8 *lut, *seed = NULL;
4407 int ret;
4408 u16 i;
b29e13bb
MW		 4409
4410 if (hfunc)
4411 *hfunc = ETH_RSS_HASH_TOP;
4412
4413 if (!indir)
4414 return 0;
4415
043dd650
HZ		 4416 seed = key;
4417 lut = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL);
4418 if (!lut)
4419 return -ENOMEM;
4420 ret = i40e_get_rss(vsi, seed, lut, I40E_HLUT_ARRAY_SIZE);
4421 if (ret)
4422 goto out;
4423 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++)
4424 indir[i] = (u32)(lut[i]);
b29e13bb 4425
043dd650
HZ		 4426out:
4427 kfree(lut);
4428
4429 return ret;
b29e13bb
MW		 4430}
4431
4432/**
4433 * i40e_set_rxfh - set the rx flow hash indirection table
4434 * @netdev: network interface device structure
4435 * @indir: indirection table
4436 * @key: hash key
f5254429 4437 * @hfunc: hash function to use
b29e13bb 4438 *
cd494fb4 4439 * Returns -EINVAL if the table specifies an invalid queue id, otherwise
b29e13bb
MW		 4440 * returns 0 after programming the table.
4441 **/
4442static int i40e_set_rxfh(struct net_device *netdev, const u32 *indir,
4443 const u8 *key, const u8 hfunc)
4444{
4445 struct i40e_netdev_priv *np = netdev_priv(netdev);
4446 struct i40e_vsi *vsi = np->vsi;
f1582351 4447 struct i40e_pf *pf = vsi->back;
28c5869f 4448 u8 *seed = NULL;
043dd650 4449 u16 i;
b29e13bb
MW		 4450
4451 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP)
4452 return -EOPNOTSUPP;
4453
b29e13bb 4454 if (key) {
28c5869f
HZ		 4455 if (!vsi->rss_hkey_user) {
4456 vsi->rss_hkey_user = kzalloc(I40E_HKEY_ARRAY_SIZE,
4457 GFP_KERNEL);
4458 if (!vsi->rss_hkey_user)
4459 return -ENOMEM;
4460 }
4461 memcpy(vsi->rss_hkey_user, key, I40E_HKEY_ARRAY_SIZE);
4462 seed = vsi->rss_hkey_user;
b29e13bb 4463 }
28c5869f
HZ		 4464 if (!vsi->rss_lut_user) {
4465 vsi->rss_lut_user = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL);
4466 if (!vsi->rss_lut_user)
4467 return -ENOMEM;
4468 }
4469
4470 /* Each 32 bits pointed by 'indir' is stored with a lut entry */
f1582351
AB		 4471 if (indir)
4472 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++)
4473 vsi->rss_lut_user[i] = (u8)(indir[i]);
4474 else
4475 i40e_fill_rss_lut(pf, vsi->rss_lut_user, I40E_HLUT_ARRAY_SIZE,
4476 vsi->rss_size);
043dd650 4477
28c5869f
HZ		 4478 return i40e_config_rss(vsi, seed, vsi->rss_lut_user,
4479 I40E_HLUT_ARRAY_SIZE);
b29e13bb
MW		 4480}
4481
7e45ab44
GR		 4482/**
4483 * i40e_get_priv_flags - report device private flags
4484 * @dev: network interface device structure
4485 *
4486 * The get string set count and the string set should be matched for each
aca955d8 4487 * flag returned. Add new strings for each flag to the i40e_gstrings_priv_flags
7e45ab44
GR		 4488 * array.
4489 *
4490 * Returns a u32 bitmap of flags.
4491 **/
5bbc3301 4492static u32 i40e_get_priv_flags(struct net_device *dev)
7e45ab44
GR		 4493{
4494 struct i40e_netdev_priv *np = netdev_priv(dev);
4495 struct i40e_vsi *vsi = np->vsi;
4496 struct i40e_pf *pf = vsi->back;
aca955d8
AD		 4497 u32 i, j, ret_flags = 0;
4498
4499 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) {
4500 const struct i40e_priv_flags *priv_flags;
7e45ab44 4501
aca955d8
AD		 4502 priv_flags = &i40e_gstrings_priv_flags[i];
4503
4504 if (priv_flags->flag & pf->flags)
4505 ret_flags |= BIT(i);
4506 }
4507
4508 if (pf->hw.pf_id != 0)
4509 return ret_flags;
4510
4511 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) {
4512 const struct i40e_priv_flags *priv_flags;
4513
4514 priv_flags = &i40e_gl_gstrings_priv_flags[j];
4515
4516 if (priv_flags->flag & pf->flags)
4517 ret_flags |= BIT(i + j);
b5569892 4518 }
7e45ab44
GR		 4519
4520 return ret_flags;
4521}
4522
9ac77266
SN		 4523/**
4524 * i40e_set_priv_flags - set private flags
4525 * @dev: network interface device structure
4526 * @flags: bit flags to be set
4527 **/
4528static int i40e_set_priv_flags(struct net_device *dev, u32 flags)
4529{
4530 struct i40e_netdev_priv *np = netdev_priv(dev);
4531 struct i40e_vsi *vsi = np->vsi;
4532 struct i40e_pf *pf = vsi->back;
60f481b9 4533 u64 orig_flags, new_flags, changed_flags;
aca955d8 4534 u32 i, j;
827de392 4535
841c950d
JK		 4536 orig_flags = READ_ONCE(pf->flags);
4537 new_flags = orig_flags;
827de392 4538
aca955d8
AD		 4539 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) {
4540 const struct i40e_priv_flags *priv_flags;
4541
4542 priv_flags = &i40e_gstrings_priv_flags[i];
4543
aca955d8 4544 if (flags & BIT(i))
841c950d 4545 new_flags |= priv_flags->flag;
aca955d8 4546 else
841c950d
JK		 4547 new_flags &= ~(priv_flags->flag);
4548
4549 /* If this is a read-only flag, it can't be changed */
4550 if (priv_flags->read_only &&
4551 ((orig_flags ^ new_flags) & ~BIT(i)))
4552 return -EOPNOTSUPP;
aca955d8
AD		 4553 }
4554
4555 if (pf->hw.pf_id != 0)
4556 goto flags_complete;
4557
4558 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) {
4559 const struct i40e_priv_flags *priv_flags;
4560
4561 priv_flags = &i40e_gl_gstrings_priv_flags[j];
4562
aca955d8 4563 if (flags & BIT(i + j))
841c950d 4564 new_flags |= priv_flags->flag;
aca955d8 4565 else
841c950d
JK		 4566 new_flags &= ~(priv_flags->flag);
4567
4568 /* If this is a read-only flag, it can't be changed */
4569 if (priv_flags->read_only &&
4570 ((orig_flags ^ new_flags) & ~BIT(i)))
4571 return -EOPNOTSUPP;
aca955d8
AD		 4572 }
4573
4574flags_complete:
fe09ed0e
AB		 4575 changed_flags = orig_flags ^ new_flags;
4576
841c950d
JK		 4577 /* Before we finalize any flag changes, we need to perform some
4578 * checks to ensure that the changes are supported and safe.
4579 */
4580
4581 /* ATR eviction is not supported on all devices */
4582 if ((new_flags & I40E_FLAG_HW_ATR_EVICT_ENABLED) &&
4583 !(pf->hw_features & I40E_HW_ATR_EVICT_CAPABLE))
4584 return -EOPNOTSUPP;
4585
fe09ed0e
AB		 4586 /* If the driver detected FW LLDP was disabled on init, this flag could
4587 * be set, however we do not support _changing_ the flag if NPAR is
4588 * enabled or FW API version < 1.7. There are situations where older
4589 * FW versions/NPAR enabled PFs could disable LLDP, however we _must_
4590 * not allow the user to enable/disable LLDP with this flag on
4591 * unsupported FW versions.
c61c8fe1 4592 */
fe09ed0e 4593 if (changed_flags & I40E_FLAG_DISABLE_FW_LLDP) {
7b63435a 4594 if (!(pf->hw_features & I40E_HW_STOPPABLE_FW_LLDP)) {
c61c8fe1 4595 dev_warn(&pf->pdev->dev,
7b63435a 4596 "Device does not support changing FW LLDP\n");
c61c8fe1
DE		 4597 return -EOPNOTSUPP;
4598 }
4599 }
4600
886ff146
JK		 4601 /* Now that we've checked to ensure that the new flags are valid, load
4602 * them into place. Since we only modify flags either (a) during
4603 * initialization or (b) while holding the RTNL lock, we don't need
4604 * anything fancy here.
841c950d 4605 */
886ff146 4606 pf->flags = new_flags;
841c950d 4607
aca955d8
AD		 4608 /* Process any additional changes needed as a result of flag changes.
4609 * The changed_flags value reflects the list of bits that were
4610 * changed in the code above.
ef17178c 4611 */
234dc4e6 4612
aca955d8
AD		 4613 /* Flush current ATR settings if ATR was disabled */
4614 if ((changed_flags & I40E_FLAG_FD_ATR_ENABLED) &&
4615 !(pf->flags & I40E_FLAG_FD_ATR_ENABLED)) {
134201ae 4616 set_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state);
0da36b97 4617 set_bit(__I40E_FD_FLUSH_REQUESTED, pf->state);
ef17178c
JB		 4618 }
4619
aca955d8
AD		 4620 if (changed_flags & I40E_FLAG_TRUE_PROMISC_SUPPORT) {
4621 u16 sw_flags = 0, valid_flags = 0;
4622 int ret;
4623
b5569892
ASJ		 4624 if (!(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT))
4625 sw_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
4626 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
4627 ret = i40e_aq_set_switch_config(&pf->hw, sw_flags, valid_flags,
5efe0c6c 4628 0, NULL);
b5569892
ASJ		 4629 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) {
4630 dev_info(&pf->pdev->dev,
4631 "couldn't set switch config bits, err %s aq_err %s\n",
4632 i40e_stat_str(&pf->hw, ret),
4633 i40e_aq_str(&pf->hw,
4634 pf->hw.aq.asq_last_status));
4635 /* not a fatal problem, just keep going */
4636 }
4637 }
4638
17b4d25c
PJ		 4639 if ((changed_flags & pf->flags &
4640 I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED) &&
4641 (pf->flags & I40E_FLAG_MFP_ENABLED))
4642 dev_warn(&pf->pdev->dev,
4643 "Turning on link-down-on-close flag may affect other partitions\n");
4644
c61c8fe1
DE		 4645 if (changed_flags & I40E_FLAG_DISABLE_FW_LLDP) {
4646 if (pf->flags & I40E_FLAG_DISABLE_FW_LLDP) {
4647 struct i40e_dcbx_config *dcbcfg;
c61c8fe1
DE		 4648
4649 i40e_aq_stop_lldp(&pf->hw, true, NULL);
4650 i40e_aq_set_dcb_parameters(&pf->hw, true, NULL);
4651 /* reset local_dcbx_config to default */
4652 dcbcfg = &pf->hw.local_dcbx_config;
4653 dcbcfg->etscfg.willing = 1;
4654 dcbcfg->etscfg.maxtcs = 0;
4655 dcbcfg->etscfg.tcbwtable[0] = 100;
4656 for (i = 1; i < I40E_MAX_TRAFFIC_CLASS; i++)
4657 dcbcfg->etscfg.tcbwtable[i] = 0;
4658 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++)
4659 dcbcfg->etscfg.prioritytable[i] = 0;
4660 dcbcfg->etscfg.tsatable[0] = I40E_IEEE_TSA_ETS;
4661 dcbcfg->pfc.willing = 1;
4662 dcbcfg->pfc.pfccap = I40E_MAX_TRAFFIC_CLASS;
4663 } else {
4664 i40e_aq_start_lldp(&pf->hw, NULL);
4665 }
4666 }
4667
aca955d8
AD		 4668 /* Issue reset to cause things to take effect, as additional bits
4669 * are added we will need to create a mask of bits requiring reset
4670 */
64615b54
MW		 4671 if (changed_flags & (I40E_FLAG_VEB_STATS_ENABLED |
4672 I40E_FLAG_LEGACY_RX |
c61c8fe1
DE		 4673 I40E_FLAG_SOURCE_PRUNING_DISABLED |
4674 I40E_FLAG_DISABLE_FW_LLDP))
373149fc 4675 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true);
827de392 4676
9ac77266
SN		 4677 return 0;
4678}
4679
9c0e5caf
FS		 4680/**
4681 * i40e_get_module_info - get (Q)SFP+ module type info
4682 * @netdev: network interface device structure
4683 * @modinfo: module EEPROM size and layout information structure
4684 **/
4685static int i40e_get_module_info(struct net_device *netdev,
4686 struct ethtool_modinfo *modinfo)
4687{
4688 struct i40e_netdev_priv *np = netdev_priv(netdev);
4689 struct i40e_vsi *vsi = np->vsi;
4690 struct i40e_pf *pf = vsi->back;
4691 struct i40e_hw *hw = &pf->hw;
4692 u32 sff8472_comp = 0;
4693 u32 sff8472_swap = 0;
4694 u32 sff8636_rev = 0;
4695 i40e_status status;
4696 u32 type = 0;
4697
4698 /* Check if firmware supports reading module EEPROM. */
4699 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) {
4700 netdev_err(vsi->netdev, "Module EEPROM memory read not supported. Please update the NVM image.\n");
4701 return -EINVAL;
4702 }
4703
4704 status = i40e_update_link_info(hw);
4705 if (status)
4706 return -EIO;
4707
4708 if (hw->phy.link_info.phy_type == I40E_PHY_TYPE_EMPTY) {
4709 netdev_err(vsi->netdev, "Cannot read module EEPROM memory. No module connected.\n");
4710 return -EINVAL;
4711 }
4712
4713 type = hw->phy.link_info.module_type[0];
4714
4715 switch (type) {
4716 case I40E_MODULE_TYPE_SFP:
4717 status = i40e_aq_get_phy_register(hw,
4718 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE,
4719 I40E_I2C_EEPROM_DEV_ADDR,
4720 I40E_MODULE_SFF_8472_COMP,
4721 &sff8472_comp, NULL);
4722 if (status)
4723 return -EIO;
4724
4725 status = i40e_aq_get_phy_register(hw,
4726 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE,
4727 I40E_I2C_EEPROM_DEV_ADDR,
4728 I40E_MODULE_SFF_8472_SWAP,
4729 &sff8472_swap, NULL);
4730 if (status)
4731 return -EIO;
4732
4733 /* Check if the module requires address swap to access
4734 * the other EEPROM memory page.
4735 */
4736 if (sff8472_swap & I40E_MODULE_SFF_ADDR_MODE) {
4737 netdev_warn(vsi->netdev, "Module address swap to access page 0xA2 is not supported.\n");
4738 modinfo->type = ETH_MODULE_SFF_8079;
4739 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
4740 } else if (sff8472_comp == 0x00) {
4741 /* Module is not SFF-8472 compliant */
4742 modinfo->type = ETH_MODULE_SFF_8079;
4743 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
4744 } else {
4745 modinfo->type = ETH_MODULE_SFF_8472;
4746 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
4747 }
4748 break;
4749 case I40E_MODULE_TYPE_QSFP_PLUS:
4750 /* Read from memory page 0. */
4751 status = i40e_aq_get_phy_register(hw,
4752 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE,
4753 0,
4754 I40E_MODULE_REVISION_ADDR,
4755 &sff8636_rev, NULL);
4756 if (status)
4757 return -EIO;
4758 /* Determine revision compliance byte */
4759 if (sff8636_rev > 0x02) {
4760 /* Module is SFF-8636 compliant */
4761 modinfo->type = ETH_MODULE_SFF_8636;
4762 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN;
4763 } else {
4764 modinfo->type = ETH_MODULE_SFF_8436;
4765 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN;
4766 }
4767 break;
4768 case I40E_MODULE_TYPE_QSFP28:
4769 modinfo->type = ETH_MODULE_SFF_8636;
4770 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN;
4771 break;
4772 default:
4773 netdev_err(vsi->netdev, "Module type unrecognized\n");
4774 return -EINVAL;
4775 }
4776 return 0;
4777}
4778
4779/**
4780 * i40e_get_module_eeprom - fills buffer with (Q)SFP+ module memory contents
4781 * @netdev: network interface device structure
4782 * @ee: EEPROM dump request structure
4783 * @data: buffer to be filled with EEPROM contents
4784 **/
4785static int i40e_get_module_eeprom(struct net_device *netdev,
4786 struct ethtool_eeprom *ee,
4787 u8 *data)
4788{
4789 struct i40e_netdev_priv *np = netdev_priv(netdev);
4790 struct i40e_vsi *vsi = np->vsi;
4791 struct i40e_pf *pf = vsi->back;
4792 struct i40e_hw *hw = &pf->hw;
4793 bool is_sfp = false;
4794 i40e_status status;
4795 u32 value = 0;
4796 int i;
4797
4798 if (!ee || !ee->len || !data)
4799 return -EINVAL;
4800
4801 if (hw->phy.link_info.module_type[0] == I40E_MODULE_TYPE_SFP)
4802 is_sfp = true;
4803
4804 for (i = 0; i < ee->len; i++) {
4805 u32 offset = i + ee->offset;
4806 u32 addr = is_sfp ? I40E_I2C_EEPROM_DEV_ADDR : 0;
4807
4808 /* Check if we need to access the other memory page */
4809 if (is_sfp) {
4810 if (offset >= ETH_MODULE_SFF_8079_LEN) {
4811 offset -= ETH_MODULE_SFF_8079_LEN;
4812 addr = I40E_I2C_EEPROM_DEV_ADDR2;
4813 }
4814 } else {
4815 while (offset >= ETH_MODULE_SFF_8436_LEN) {
4816 /* Compute memory page number and offset. */
4817 offset -= ETH_MODULE_SFF_8436_LEN / 2;
4818 addr++;
4819 }
4820 }
4821
4822 status = i40e_aq_get_phy_register(hw,
4823 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE,
4824 addr, offset, &value, NULL);
4825 if (status)
4826 return -EIO;
4827 data[i] = value;
4828 }
4829 return 0;
4830}
4831
c7d05ca8 4832static const struct ethtool_ops i40e_ethtool_ops = {
c7d05ca8
JB		 4833 .get_drvinfo = i40e_get_drvinfo,
4834 .get_regs_len = i40e_get_regs_len,
4835 .get_regs = i40e_get_regs,
4836 .nway_reset = i40e_nway_reset,
4837 .get_link = ethtool_op_get_link,
4838 .get_wol = i40e_get_wol,
8e2773ae 4839 .set_wol = i40e_set_wol,
cd552cb4 4840 .set_eeprom = i40e_set_eeprom,
c7d05ca8
JB		 4841 .get_eeprom_len = i40e_get_eeprom_len,
4842 .get_eeprom = i40e_get_eeprom,
4843 .get_ringparam = i40e_get_ringparam,
4844 .set_ringparam = i40e_set_ringparam,
4845 .get_pauseparam = i40e_get_pauseparam,
2becc35a 4846 .set_pauseparam = i40e_set_pauseparam,
c7d05ca8
JB		 4847 .get_msglevel = i40e_get_msglevel,
4848 .set_msglevel = i40e_set_msglevel,
4849 .get_rxnfc = i40e_get_rxnfc,
4850 .set_rxnfc = i40e_set_rxnfc,
4851 .self_test = i40e_diag_test,
4852 .get_strings = i40e_get_strings,
4853 .set_phys_id = i40e_set_phys_id,
4854 .get_sset_count = i40e_get_sset_count,
4855 .get_ethtool_stats = i40e_get_ethtool_stats,
4856 .get_coalesce = i40e_get_coalesce,
4857 .set_coalesce = i40e_set_coalesce,
b29e13bb
MW		 4858 .get_rxfh_key_size = i40e_get_rxfh_key_size,
4859 .get_rxfh_indir_size = i40e_get_rxfh_indir_size,
4860 .get_rxfh = i40e_get_rxfh,
4861 .set_rxfh = i40e_set_rxfh,
4b7820ca
ASJ		 4862 .get_channels = i40e_get_channels,
4863 .set_channels = i40e_set_channels,
9c0e5caf
FS		 4864 .get_module_info = i40e_get_module_info,
4865 .get_module_eeprom = i40e_get_module_eeprom,
c7d05ca8 4866 .get_ts_info = i40e_get_ts_info,
7e45ab44 4867 .get_priv_flags = i40e_get_priv_flags,
9ac77266 4868 .set_priv_flags = i40e_set_priv_flags,
be280bad 4869 .get_per_queue_coalesce = i40e_get_per_queue_coalesce,
f3757a4d 4870 .set_per_queue_coalesce = i40e_set_per_queue_coalesce,
a7f90940
PR		 4871 .get_link_ksettings = i40e_get_link_ksettings,
4872 .set_link_ksettings = i40e_set_link_ksettings,
c7d05ca8
JB		 4873};
4874
4875void i40e_set_ethtool_ops(struct net_device *netdev)
4876{
7ad24ea4 4877 netdev->ethtool_ops = &i40e_ethtool_ops;
c7d05ca8 4878}
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