projects / mirror_ubuntu-artful-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| 56a62fc8 JB |
1 | /******************************************************************************* |
| 2 | * | |
| 3 | * Intel Ethernet Controller XL710 Family Linux Driver | |
| dc641b73 | 4 | * Copyright(c) 2013 - 2014 Intel Corporation. |
| 56a62fc8 JB |
5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify it | |
| 7 | * under the terms and conditions of the GNU General Public License, | |
| 8 | * version 2, as published by the Free Software Foundation. | |
| 9 | * | |
| 10 | * This program is distributed in the hope it will be useful, but WITHOUT | |
| 11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
| 13 | * more details. | |
| 14 | * | |
| dc641b73 GR |
15 | * You should have received a copy of the GNU General Public License along |
| 16 | * with this program. If not, see <http://www.gnu.org/licenses/>. | |
| 56a62fc8 JB |
17 | * |
| 18 | * The full GNU General Public License is included in this distribution in | |
| 19 | * the file called "COPYING". | |
| 20 | * | |
| 21 | * Contact Information: | |
| 22 | * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | |
| 23 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
| 24 | * | |
| 25 | ******************************************************************************/ | |
| 26 | ||
| 27 | #ifndef _I40E_PROTOTYPE_H_ | |
| 28 | #define _I40E_PROTOTYPE_H_ | |
| 29 | ||
| 30 | #include "i40e_type.h" | |
| 31 | #include "i40e_alloc.h" | |
| 32 | #include "i40e_virtchnl.h" | |
| 33 | ||
| 34 | /* Prototypes for shared code functions that are not in | |
| 35 | * the standard function pointer structures. These are | |
| 36 | * mostly because they are needed even before the init | |
| 37 | * has happened and will assist in the early SW and FW | |
| 38 | * setup. | |
| 39 | */ | |
| 40 | ||
| 41 | /* adminq functions */ | |
| 42 | i40e_status i40e_init_adminq(struct i40e_hw *hw); | |
| 43 | i40e_status i40e_shutdown_adminq(struct i40e_hw *hw); | |
| 44 | void i40e_adminq_init_ring_data(struct i40e_hw *hw); | |
| 45 | i40e_status i40e_clean_arq_element(struct i40e_hw *hw, | |
| 46 | struct i40e_arq_event_info *e, | |
| 47 | u16 *events_pending); | |
| 48 | i40e_status i40e_asq_send_command(struct i40e_hw *hw, | |
| 49 | struct i40e_aq_desc *desc, | |
| 50 | void *buff, /* can be NULL */ | |
| 51 | u16 buff_size, | |
| 52 | struct i40e_asq_cmd_details *cmd_details); | |
| 56a62fc8 JB |
53 | |
| 54 | /* debug function for adminq */ | |
| f905dd62 SN |
55 | void i40e_debug_aq(struct i40e_hw *hw, enum i40e_debug_mask mask, |
| 56 | void *desc, void *buffer, u16 buf_len); | |
| 56a62fc8 JB |
57 | |
| 58 | void i40e_idle_aq(struct i40e_hw *hw); | |
| e1860d8f | 59 | bool i40e_check_asq_alive(struct i40e_hw *hw); |
| 8fb905b3 | 60 | i40e_status i40e_aq_queue_shutdown(struct i40e_hw *hw, bool unloading); |
| 56a62fc8 JB |
61 | |
| 62 | u32 i40e_led_get(struct i40e_hw *hw); | |
| 0556a9e3 | 63 | void i40e_led_set(struct i40e_hw *hw, u32 mode, bool blink); |
| 56a62fc8 JB |
64 | |
| 65 | /* admin send queue commands */ | |
| 66 | ||
| 67 | i40e_status i40e_aq_get_firmware_version(struct i40e_hw *hw, | |
| 68 | u16 *fw_major_version, u16 *fw_minor_version, | |
| 69 | u16 *api_major_version, u16 *api_minor_version, | |
| 70 | struct i40e_asq_cmd_details *cmd_details); | |
| 53db45cd SN |
71 | i40e_status i40e_aq_debug_write_register(struct i40e_hw *hw, |
| 72 | u32 reg_addr, u64 reg_val, | |
| 73 | struct i40e_asq_cmd_details *cmd_details); | |
| f94234ee | 74 | i40e_status i40e_aq_set_phy_debug(struct i40e_hw *hw, u8 cmd_flags, |
| 56a62fc8 JB |
75 | struct i40e_asq_cmd_details *cmd_details); |
| 76 | i40e_status i40e_aq_set_default_vsi(struct i40e_hw *hw, u16 vsi_id, | |
| 77 | struct i40e_asq_cmd_details *cmd_details); | |
| c56999f9 CS |
78 | enum i40e_status_code i40e_aq_get_phy_capabilities(struct i40e_hw *hw, |
| 79 | bool qualified_modules, bool report_init, | |
| 80 | struct i40e_aq_get_phy_abilities_resp *abilities, | |
| 81 | struct i40e_asq_cmd_details *cmd_details); | |
| 82 | enum i40e_status_code i40e_aq_set_phy_config(struct i40e_hw *hw, | |
| 83 | struct i40e_aq_set_phy_config *config, | |
| 84 | struct i40e_asq_cmd_details *cmd_details); | |
| 85 | enum i40e_status_code i40e_set_fc(struct i40e_hw *hw, u8 *aq_failures, | |
| 86 | bool atomic_reset); | |
| c9b9b0ae SN |
87 | i40e_status i40e_aq_clear_pxe_mode(struct i40e_hw *hw, |
| 88 | struct i40e_asq_cmd_details *cmd_details); | |
| 56a62fc8 | 89 | i40e_status i40e_aq_set_link_restart_an(struct i40e_hw *hw, |
| 1ac978af CS |
90 | bool enable_link, |
| 91 | struct i40e_asq_cmd_details *cmd_details); | |
| 56a62fc8 JB |
92 | i40e_status i40e_aq_get_link_info(struct i40e_hw *hw, |
| 93 | bool enable_lse, struct i40e_link_status *link, | |
| 94 | struct i40e_asq_cmd_details *cmd_details); | |
| 8109e123 | 95 | i40e_status i40e_update_link_info(struct i40e_hw *hw, bool enable_lse); |
| 56a62fc8 JB |
96 | i40e_status i40e_aq_set_local_advt_reg(struct i40e_hw *hw, |
| 97 | u64 advt_reg, | |
| 98 | struct i40e_asq_cmd_details *cmd_details); | |
| 99 | i40e_status i40e_aq_send_driver_version(struct i40e_hw *hw, | |
| 100 | struct i40e_driver_version *dv, | |
| 101 | struct i40e_asq_cmd_details *cmd_details); | |
| 102 | i40e_status i40e_aq_add_vsi(struct i40e_hw *hw, | |
| 103 | struct i40e_vsi_context *vsi_ctx, | |
| 104 | struct i40e_asq_cmd_details *cmd_details); | |
| 105 | i40e_status i40e_aq_set_vsi_broadcast(struct i40e_hw *hw, | |
| 106 | u16 vsi_id, bool set_filter, | |
| 107 | struct i40e_asq_cmd_details *cmd_details); | |
| 108 | i40e_status i40e_aq_set_vsi_unicast_promiscuous(struct i40e_hw *hw, | |
| 885552a2 | 109 | u16 vsi_id, bool set, struct i40e_asq_cmd_details *cmd_details); |
| 56a62fc8 | 110 | i40e_status i40e_aq_set_vsi_multicast_promiscuous(struct i40e_hw *hw, |
| 885552a2 | 111 | u16 vsi_id, bool set, struct i40e_asq_cmd_details *cmd_details); |
| 56a62fc8 JB |
112 | i40e_status i40e_aq_get_vsi_params(struct i40e_hw *hw, |
| 113 | struct i40e_vsi_context *vsi_ctx, | |
| 114 | struct i40e_asq_cmd_details *cmd_details); | |
| 115 | i40e_status i40e_aq_update_vsi_params(struct i40e_hw *hw, | |
| 116 | struct i40e_vsi_context *vsi_ctx, | |
| 117 | struct i40e_asq_cmd_details *cmd_details); | |
| 118 | i40e_status i40e_aq_add_veb(struct i40e_hw *hw, u16 uplink_seid, | |
| 119 | u16 downlink_seid, u8 enabled_tc, | |
| e1c51b95 KS |
120 | bool default_port, bool enable_l2_filtering, |
| 121 | u16 *pveb_seid, | |
| 56a62fc8 JB |
122 | struct i40e_asq_cmd_details *cmd_details); |
| 123 | i40e_status i40e_aq_get_veb_parameters(struct i40e_hw *hw, | |
| 124 | u16 veb_seid, u16 *switch_id, bool *floating, | |
| 125 | u16 *statistic_index, u16 *vebs_used, | |
| 126 | u16 *vebs_free, | |
| 127 | struct i40e_asq_cmd_details *cmd_details); | |
| 128 | i40e_status i40e_aq_add_macvlan(struct i40e_hw *hw, u16 vsi_id, | |
| 129 | struct i40e_aqc_add_macvlan_element_data *mv_list, | |
| 130 | u16 count, struct i40e_asq_cmd_details *cmd_details); | |
| 131 | i40e_status i40e_aq_remove_macvlan(struct i40e_hw *hw, u16 vsi_id, | |
| 132 | struct i40e_aqc_remove_macvlan_element_data *mv_list, | |
| 133 | u16 count, struct i40e_asq_cmd_details *cmd_details); | |
| 56a62fc8 JB |
134 | i40e_status i40e_aq_send_msg_to_vf(struct i40e_hw *hw, u16 vfid, |
| 135 | u32 v_opcode, u32 v_retval, u8 *msg, u16 msglen, | |
| 136 | struct i40e_asq_cmd_details *cmd_details); | |
| 137 | i40e_status i40e_aq_get_switch_config(struct i40e_hw *hw, | |
| 138 | struct i40e_aqc_get_switch_config_resp *buf, | |
| 139 | u16 buf_size, u16 *start_seid, | |
| 140 | struct i40e_asq_cmd_details *cmd_details); | |
| 141 | i40e_status i40e_aq_request_resource(struct i40e_hw *hw, | |
| 142 | enum i40e_aq_resources_ids resource, | |
| 143 | enum i40e_aq_resource_access_type access, | |
| 144 | u8 sdp_number, u64 *timeout, | |
| 145 | struct i40e_asq_cmd_details *cmd_details); | |
| 146 | i40e_status i40e_aq_release_resource(struct i40e_hw *hw, | |
| 147 | enum i40e_aq_resources_ids resource, | |
| 148 | u8 sdp_number, | |
| 149 | struct i40e_asq_cmd_details *cmd_details); | |
| 150 | i40e_status i40e_aq_read_nvm(struct i40e_hw *hw, u8 module_pointer, | |
| 151 | u32 offset, u16 length, void *data, | |
| 152 | bool last_command, | |
| 153 | struct i40e_asq_cmd_details *cmd_details); | |
| cd552cb4 SN |
154 | i40e_status i40e_aq_erase_nvm(struct i40e_hw *hw, u8 module_pointer, |
| 155 | u32 offset, u16 length, bool last_command, | |
| 156 | struct i40e_asq_cmd_details *cmd_details); | |
| 56a62fc8 JB |
157 | i40e_status i40e_aq_discover_capabilities(struct i40e_hw *hw, |
| 158 | void *buff, u16 buff_size, u16 *data_size, | |
| 159 | enum i40e_admin_queue_opc list_type_opc, | |
| 160 | struct i40e_asq_cmd_details *cmd_details); | |
| 161 | i40e_status i40e_aq_update_nvm(struct i40e_hw *hw, u8 module_pointer, | |
| 162 | u32 offset, u16 length, void *data, | |
| 163 | bool last_command, | |
| 164 | struct i40e_asq_cmd_details *cmd_details); | |
| 165 | i40e_status i40e_aq_get_lldp_mib(struct i40e_hw *hw, u8 bridge_type, | |
| 166 | u8 mib_type, void *buff, u16 buff_size, | |
| 167 | u16 *local_len, u16 *remote_len, | |
| 168 | struct i40e_asq_cmd_details *cmd_details); | |
| 169 | i40e_status i40e_aq_cfg_lldp_mib_change_event(struct i40e_hw *hw, | |
| 170 | bool enable_update, | |
| 171 | struct i40e_asq_cmd_details *cmd_details); | |
| 172 | i40e_status i40e_aq_stop_lldp(struct i40e_hw *hw, bool shutdown_agent, | |
| 173 | struct i40e_asq_cmd_details *cmd_details); | |
| 174 | i40e_status i40e_aq_start_lldp(struct i40e_hw *hw, | |
| 175 | struct i40e_asq_cmd_details *cmd_details); | |
| a1c9a9d9 | 176 | i40e_status i40e_aq_add_udp_tunnel(struct i40e_hw *hw, |
| f4f94b94 KS |
177 | u16 udp_port, u8 protocol_index, |
| 178 | u8 *filter_index, | |
| a1c9a9d9 JK |
179 | struct i40e_asq_cmd_details *cmd_details); |
| 180 | i40e_status i40e_aq_del_udp_tunnel(struct i40e_hw *hw, u8 index, | |
| 181 | struct i40e_asq_cmd_details *cmd_details); | |
| 56a62fc8 JB |
182 | i40e_status i40e_aq_delete_element(struct i40e_hw *hw, u16 seid, |
| 183 | struct i40e_asq_cmd_details *cmd_details); | |
| 184 | i40e_status i40e_aq_mac_address_write(struct i40e_hw *hw, | |
| 185 | u16 flags, u8 *mac_addr, | |
| 186 | struct i40e_asq_cmd_details *cmd_details); | |
| 6b192891 MW |
187 | i40e_status i40e_aq_config_vsi_bw_limit(struct i40e_hw *hw, |
| 188 | u16 seid, u16 credit, u8 max_credit, | |
| 189 | struct i40e_asq_cmd_details *cmd_details); | |
| afb3ff0d NP |
190 | i40e_status i40e_aq_dcb_updated(struct i40e_hw *hw, |
| 191 | struct i40e_asq_cmd_details *cmd_details); | |
| 56a62fc8 JB |
192 | i40e_status i40e_aq_set_hmc_resource_profile(struct i40e_hw *hw, |
| 193 | enum i40e_aq_hmc_profile profile, | |
| 194 | u8 pe_vf_enabled_count, | |
| 195 | struct i40e_asq_cmd_details *cmd_details); | |
| 196 | i40e_status i40e_aq_config_switch_comp_bw_limit(struct i40e_hw *hw, | |
| 197 | u16 seid, u16 credit, u8 max_bw, | |
| 198 | struct i40e_asq_cmd_details *cmd_details); | |
| 199 | i40e_status i40e_aq_config_vsi_tc_bw(struct i40e_hw *hw, u16 seid, | |
| 200 | struct i40e_aqc_configure_vsi_tc_bw_data *bw_data, | |
| 201 | struct i40e_asq_cmd_details *cmd_details); | |
| afb3ff0d NP |
202 | i40e_status i40e_aq_config_switch_comp_ets(struct i40e_hw *hw, |
| 203 | u16 seid, | |
| 204 | struct i40e_aqc_configure_switching_comp_ets_data *ets_data, | |
| 205 | enum i40e_admin_queue_opc opcode, | |
| 206 | struct i40e_asq_cmd_details *cmd_details); | |
| 207 | i40e_status i40e_aq_config_switch_comp_bw_config(struct i40e_hw *hw, | |
| 208 | u16 seid, | |
| 209 | struct i40e_aqc_configure_switching_comp_bw_config_data *bw_data, | |
| 210 | struct i40e_asq_cmd_details *cmd_details); | |
| 56a62fc8 JB |
211 | i40e_status i40e_aq_query_vsi_bw_config(struct i40e_hw *hw, |
| 212 | u16 seid, | |
| 213 | struct i40e_aqc_query_vsi_bw_config_resp *bw_data, | |
| 214 | struct i40e_asq_cmd_details *cmd_details); | |
| 215 | i40e_status i40e_aq_query_vsi_ets_sla_config(struct i40e_hw *hw, | |
| 216 | u16 seid, | |
| 217 | struct i40e_aqc_query_vsi_ets_sla_config_resp *bw_data, | |
| 218 | struct i40e_asq_cmd_details *cmd_details); | |
| 219 | i40e_status i40e_aq_query_switch_comp_ets_config(struct i40e_hw *hw, | |
| 220 | u16 seid, | |
| 221 | struct i40e_aqc_query_switching_comp_ets_config_resp *bw_data, | |
| 222 | struct i40e_asq_cmd_details *cmd_details); | |
| 223 | i40e_status i40e_aq_query_port_ets_config(struct i40e_hw *hw, | |
| 224 | u16 seid, | |
| 225 | struct i40e_aqc_query_port_ets_config_resp *bw_data, | |
| 226 | struct i40e_asq_cmd_details *cmd_details); | |
| 227 | i40e_status i40e_aq_query_switch_comp_bw_config(struct i40e_hw *hw, | |
| 228 | u16 seid, | |
| 229 | struct i40e_aqc_query_switching_comp_bw_config_resp *bw_data, | |
| 230 | struct i40e_asq_cmd_details *cmd_details); | |
| 231 | /* i40e_common */ | |
| 232 | i40e_status i40e_init_shared_code(struct i40e_hw *hw); | |
| 233 | i40e_status i40e_pf_reset(struct i40e_hw *hw); | |
| 838d41d9 | 234 | void i40e_clear_hw(struct i40e_hw *hw); |
| 56a62fc8 JB |
235 | void i40e_clear_pxe_mode(struct i40e_hw *hw); |
| 236 | bool i40e_get_link_status(struct i40e_hw *hw); | |
| 1f224ad2 NP |
237 | i40e_status i40e_get_mac_addr(struct i40e_hw *hw, u8 *mac_addr); |
| 238 | i40e_status i40e_get_port_mac_addr(struct i40e_hw *hw, u8 *mac_addr); | |
| afb3ff0d | 239 | i40e_status i40e_validate_mac_addr(u8 *mac_addr); |
| 351499ab | 240 | void i40e_pre_tx_queue_cfg(struct i40e_hw *hw, u32 queue, bool enable); |
| 38e00438 VD |
241 | #ifdef I40E_FCOE |
| 242 | i40e_status i40e_get_san_mac_addr(struct i40e_hw *hw, u8 *mac_addr); | |
| 243 | #endif | |
| 56a62fc8 JB |
244 | /* prototype for functions used for NVM access */ |
| 245 | i40e_status i40e_init_nvm(struct i40e_hw *hw); | |
| 246 | i40e_status i40e_acquire_nvm(struct i40e_hw *hw, | |
| 247 | enum i40e_aq_resource_access_type access); | |
| 248 | void i40e_release_nvm(struct i40e_hw *hw); | |
| 249 | i40e_status i40e_read_nvm_srrd(struct i40e_hw *hw, u16 offset, | |
| 250 | u16 *data); | |
| 251 | i40e_status i40e_read_nvm_word(struct i40e_hw *hw, u16 offset, | |
| 252 | u16 *data); | |
| 253 | i40e_status i40e_read_nvm_buffer(struct i40e_hw *hw, u16 offset, | |
| 254 | u16 *words, u16 *data); | |
| cd552cb4 | 255 | i40e_status i40e_update_nvm_checksum(struct i40e_hw *hw); |
| 56a62fc8 JB |
256 | i40e_status i40e_validate_nvm_checksum(struct i40e_hw *hw, |
| 257 | u16 *checksum); | |
| cd552cb4 SN |
258 | i40e_status i40e_nvmupd_command(struct i40e_hw *hw, |
| 259 | struct i40e_nvm_access *cmd, | |
| 260 | u8 *bytes, int *); | |
| d4dfb81a | 261 | void i40e_set_pci_config_data(struct i40e_hw *hw, u16 link_status); |
| 56a62fc8 | 262 | |
| 206812b5 JB |
263 | extern struct i40e_rx_ptype_decoded i40e_ptype_lookup[]; |
| 264 | ||
| 265 | static inline struct i40e_rx_ptype_decoded decode_rx_desc_ptype(u8 ptype) | |
| 266 | { | |
| 267 | return i40e_ptype_lookup[ptype]; | |
| 268 | } | |
| 269 | ||
| 56a62fc8 JB |
270 | /* prototype for functions used for SW locks */ |
| 271 | ||
| 272 | /* i40e_common for VF drivers*/ | |
| 273 | void i40e_vf_parse_hw_config(struct i40e_hw *hw, | |
| 274 | struct i40e_virtchnl_vf_resource *msg); | |
| 275 | i40e_status i40e_vf_reset(struct i40e_hw *hw); | |
| 276 | i40e_status i40e_aq_send_msg_to_pf(struct i40e_hw *hw, | |
| 277 | enum i40e_virtchnl_ops v_opcode, | |
| 278 | i40e_status v_retval, | |
| 279 | u8 *msg, u16 msglen, | |
| 280 | struct i40e_asq_cmd_details *cmd_details); | |
| 281 | i40e_status i40e_set_filter_control(struct i40e_hw *hw, | |
| 282 | struct i40e_filter_control_settings *settings); | |
| afb3ff0d NP |
283 | i40e_status i40e_aq_add_rem_control_packet_filter(struct i40e_hw *hw, |
| 284 | u8 *mac_addr, u16 ethtype, u16 flags, | |
| 285 | u16 vsi_seid, u16 queue, bool is_add, | |
| 286 | struct i40e_control_filter_stats *stats, | |
| 287 | struct i40e_asq_cmd_details *cmd_details); | |
| 56a62fc8 | 288 | #endif /* _I40E_PROTOTYPE_H_ */ |