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Commit | Line | Data |
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ae06c70b | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
51dce24b | 2 | /* Copyright(c) 2013 - 2018 Intel Corporation. */ |
56a62fc8 JB |
3 | |
4 | #ifndef _I40E_PROTOTYPE_H_ | |
5 | #define _I40E_PROTOTYPE_H_ | |
6 | ||
7 | #include "i40e_type.h" | |
8 | #include "i40e_alloc.h" | |
55cdfd48 | 9 | #include <linux/avf/virtchnl.h> |
56a62fc8 JB |
10 | |
11 | /* Prototypes for shared code functions that are not in | |
12 | * the standard function pointer structures. These are | |
13 | * mostly because they are needed even before the init | |
14 | * has happened and will assist in the early SW and FW | |
15 | * setup. | |
16 | */ | |
17 | ||
18 | /* adminq functions */ | |
19 | i40e_status i40e_init_adminq(struct i40e_hw *hw); | |
20 | i40e_status i40e_shutdown_adminq(struct i40e_hw *hw); | |
21 | void i40e_adminq_init_ring_data(struct i40e_hw *hw); | |
22 | i40e_status i40e_clean_arq_element(struct i40e_hw *hw, | |
23 | struct i40e_arq_event_info *e, | |
24 | u16 *events_pending); | |
25 | i40e_status i40e_asq_send_command(struct i40e_hw *hw, | |
26 | struct i40e_aq_desc *desc, | |
27 | void *buff, /* can be NULL */ | |
28 | u16 buff_size, | |
29 | struct i40e_asq_cmd_details *cmd_details); | |
56a62fc8 JB |
30 | |
31 | /* debug function for adminq */ | |
f905dd62 SN |
32 | void i40e_debug_aq(struct i40e_hw *hw, enum i40e_debug_mask mask, |
33 | void *desc, void *buffer, u16 buf_len); | |
56a62fc8 JB |
34 | |
35 | void i40e_idle_aq(struct i40e_hw *hw); | |
e1860d8f | 36 | bool i40e_check_asq_alive(struct i40e_hw *hw); |
8fb905b3 | 37 | i40e_status i40e_aq_queue_shutdown(struct i40e_hw *hw, bool unloading); |
4e68adfe JW |
38 | const char *i40e_aq_str(struct i40e_hw *hw, enum i40e_admin_queue_err aq_err); |
39 | const char *i40e_stat_str(struct i40e_hw *hw, i40e_status stat_err); | |
56a62fc8 | 40 | |
e50c8d6d ASJ |
41 | i40e_status i40e_aq_get_rss_lut(struct i40e_hw *hw, u16 seid, |
42 | bool pf_lut, u8 *lut, u16 lut_size); | |
43 | i40e_status i40e_aq_set_rss_lut(struct i40e_hw *hw, u16 seid, | |
44 | bool pf_lut, u8 *lut, u16 lut_size); | |
45 | i40e_status i40e_aq_get_rss_key(struct i40e_hw *hw, | |
46 | u16 seid, | |
47 | struct i40e_aqc_get_set_rss_key_data *key); | |
48 | i40e_status i40e_aq_set_rss_key(struct i40e_hw *hw, | |
49 | u16 seid, | |
50 | struct i40e_aqc_get_set_rss_key_data *key); | |
51 | ||
56a62fc8 | 52 | u32 i40e_led_get(struct i40e_hw *hw); |
0556a9e3 | 53 | void i40e_led_set(struct i40e_hw *hw, u32 mode, bool blink); |
fd077cd3 CW |
54 | i40e_status i40e_led_set_phy(struct i40e_hw *hw, bool on, |
55 | u16 led_addr, u32 mode); | |
56 | i40e_status i40e_led_get_phy(struct i40e_hw *hw, u16 *led_addr, | |
57 | u16 *val); | |
58 | i40e_status i40e_blink_phy_link_led(struct i40e_hw *hw, | |
59 | u32 time, u32 interval); | |
56a62fc8 JB |
60 | |
61 | /* admin send queue commands */ | |
62 | ||
63 | i40e_status i40e_aq_get_firmware_version(struct i40e_hw *hw, | |
64 | u16 *fw_major_version, u16 *fw_minor_version, | |
7edf810c | 65 | u32 *fw_build, |
56a62fc8 JB |
66 | u16 *api_major_version, u16 *api_minor_version, |
67 | struct i40e_asq_cmd_details *cmd_details); | |
53db45cd SN |
68 | i40e_status i40e_aq_debug_write_register(struct i40e_hw *hw, |
69 | u32 reg_addr, u64 reg_val, | |
70 | struct i40e_asq_cmd_details *cmd_details); | |
9fee9db5 SN |
71 | i40e_status i40e_aq_debug_read_register(struct i40e_hw *hw, |
72 | u32 reg_addr, u64 *reg_val, | |
73 | struct i40e_asq_cmd_details *cmd_details); | |
f94234ee | 74 | i40e_status i40e_aq_set_phy_debug(struct i40e_hw *hw, u8 cmd_flags, |
56a62fc8 JB |
75 | struct i40e_asq_cmd_details *cmd_details); |
76 | i40e_status i40e_aq_set_default_vsi(struct i40e_hw *hw, u16 vsi_id, | |
77 | struct i40e_asq_cmd_details *cmd_details); | |
fb70faba MW |
78 | i40e_status i40e_aq_clear_default_vsi(struct i40e_hw *hw, u16 vsi_id, |
79 | struct i40e_asq_cmd_details *cmd_details); | |
c56999f9 CS |
80 | enum i40e_status_code i40e_aq_get_phy_capabilities(struct i40e_hw *hw, |
81 | bool qualified_modules, bool report_init, | |
82 | struct i40e_aq_get_phy_abilities_resp *abilities, | |
83 | struct i40e_asq_cmd_details *cmd_details); | |
84 | enum i40e_status_code i40e_aq_set_phy_config(struct i40e_hw *hw, | |
85 | struct i40e_aq_set_phy_config *config, | |
86 | struct i40e_asq_cmd_details *cmd_details); | |
87 | enum i40e_status_code i40e_set_fc(struct i40e_hw *hw, u8 *aq_failures, | |
88 | bool atomic_reset); | |
7e2453fe JB |
89 | i40e_status i40e_aq_set_phy_int_mask(struct i40e_hw *hw, u16 mask, |
90 | struct i40e_asq_cmd_details *cmd_details); | |
c9b9b0ae SN |
91 | i40e_status i40e_aq_clear_pxe_mode(struct i40e_hw *hw, |
92 | struct i40e_asq_cmd_details *cmd_details); | |
56a62fc8 | 93 | i40e_status i40e_aq_set_link_restart_an(struct i40e_hw *hw, |
1ac978af CS |
94 | bool enable_link, |
95 | struct i40e_asq_cmd_details *cmd_details); | |
56a62fc8 JB |
96 | i40e_status i40e_aq_get_link_info(struct i40e_hw *hw, |
97 | bool enable_lse, struct i40e_link_status *link, | |
98 | struct i40e_asq_cmd_details *cmd_details); | |
99 | i40e_status i40e_aq_set_local_advt_reg(struct i40e_hw *hw, | |
100 | u64 advt_reg, | |
101 | struct i40e_asq_cmd_details *cmd_details); | |
102 | i40e_status i40e_aq_send_driver_version(struct i40e_hw *hw, | |
103 | struct i40e_driver_version *dv, | |
104 | struct i40e_asq_cmd_details *cmd_details); | |
105 | i40e_status i40e_aq_add_vsi(struct i40e_hw *hw, | |
106 | struct i40e_vsi_context *vsi_ctx, | |
107 | struct i40e_asq_cmd_details *cmd_details); | |
108 | i40e_status i40e_aq_set_vsi_broadcast(struct i40e_hw *hw, | |
109 | u16 vsi_id, bool set_filter, | |
110 | struct i40e_asq_cmd_details *cmd_details); | |
111 | i40e_status i40e_aq_set_vsi_unicast_promiscuous(struct i40e_hw *hw, | |
b5569892 ASJ |
112 | u16 vsi_id, bool set, struct i40e_asq_cmd_details *cmd_details, |
113 | bool rx_only_promisc); | |
56a62fc8 | 114 | i40e_status i40e_aq_set_vsi_multicast_promiscuous(struct i40e_hw *hw, |
885552a2 | 115 | u16 vsi_id, bool set, struct i40e_asq_cmd_details *cmd_details); |
6c41a760 GR |
116 | enum i40e_status_code i40e_aq_set_vsi_mc_promisc_on_vlan(struct i40e_hw *hw, |
117 | u16 seid, bool enable, | |
118 | u16 vid, | |
119 | struct i40e_asq_cmd_details *cmd_details); | |
120 | enum i40e_status_code i40e_aq_set_vsi_uc_promisc_on_vlan(struct i40e_hw *hw, | |
121 | u16 seid, bool enable, | |
122 | u16 vid, | |
123 | struct i40e_asq_cmd_details *cmd_details); | |
435c084a JK |
124 | i40e_status i40e_aq_set_vsi_bc_promisc_on_vlan(struct i40e_hw *hw, |
125 | u16 seid, bool enable, u16 vid, | |
126 | struct i40e_asq_cmd_details *cmd_details); | |
7bd6875b KP |
127 | i40e_status i40e_aq_set_vsi_vlan_promisc(struct i40e_hw *hw, |
128 | u16 seid, bool enable, | |
129 | struct i40e_asq_cmd_details *cmd_details); | |
56a62fc8 JB |
130 | i40e_status i40e_aq_get_vsi_params(struct i40e_hw *hw, |
131 | struct i40e_vsi_context *vsi_ctx, | |
132 | struct i40e_asq_cmd_details *cmd_details); | |
133 | i40e_status i40e_aq_update_vsi_params(struct i40e_hw *hw, | |
134 | struct i40e_vsi_context *vsi_ctx, | |
135 | struct i40e_asq_cmd_details *cmd_details); | |
136 | i40e_status i40e_aq_add_veb(struct i40e_hw *hw, u16 uplink_seid, | |
137 | u16 downlink_seid, u8 enabled_tc, | |
8a187f44 SN |
138 | bool default_port, u16 *pveb_seid, |
139 | bool enable_stats, | |
56a62fc8 JB |
140 | struct i40e_asq_cmd_details *cmd_details); |
141 | i40e_status i40e_aq_get_veb_parameters(struct i40e_hw *hw, | |
142 | u16 veb_seid, u16 *switch_id, bool *floating, | |
143 | u16 *statistic_index, u16 *vebs_used, | |
144 | u16 *vebs_free, | |
145 | struct i40e_asq_cmd_details *cmd_details); | |
146 | i40e_status i40e_aq_add_macvlan(struct i40e_hw *hw, u16 vsi_id, | |
147 | struct i40e_aqc_add_macvlan_element_data *mv_list, | |
148 | u16 count, struct i40e_asq_cmd_details *cmd_details); | |
149 | i40e_status i40e_aq_remove_macvlan(struct i40e_hw *hw, u16 vsi_id, | |
150 | struct i40e_aqc_remove_macvlan_element_data *mv_list, | |
151 | u16 count, struct i40e_asq_cmd_details *cmd_details); | |
7bd6875b KP |
152 | i40e_status i40e_aq_add_mirrorrule(struct i40e_hw *hw, u16 sw_seid, |
153 | u16 rule_type, u16 dest_vsi, u16 count, __le16 *mr_list, | |
154 | struct i40e_asq_cmd_details *cmd_details, | |
155 | u16 *rule_id, u16 *rules_used, u16 *rules_free); | |
156 | i40e_status i40e_aq_delete_mirrorrule(struct i40e_hw *hw, u16 sw_seid, | |
157 | u16 rule_type, u16 rule_id, u16 count, __le16 *mr_list, | |
158 | struct i40e_asq_cmd_details *cmd_details, | |
159 | u16 *rules_used, u16 *rules_free); | |
160 | ||
56a62fc8 JB |
161 | i40e_status i40e_aq_send_msg_to_vf(struct i40e_hw *hw, u16 vfid, |
162 | u32 v_opcode, u32 v_retval, u8 *msg, u16 msglen, | |
163 | struct i40e_asq_cmd_details *cmd_details); | |
164 | i40e_status i40e_aq_get_switch_config(struct i40e_hw *hw, | |
165 | struct i40e_aqc_get_switch_config_resp *buf, | |
166 | u16 buf_size, u16 *start_seid, | |
167 | struct i40e_asq_cmd_details *cmd_details); | |
f3d58497 SN |
168 | enum i40e_status_code i40e_aq_set_switch_config(struct i40e_hw *hw, |
169 | u16 flags, | |
5efe0c6c | 170 | u16 valid_flags, u8 mode, |
f3d58497 | 171 | struct i40e_asq_cmd_details *cmd_details); |
56a62fc8 JB |
172 | i40e_status i40e_aq_request_resource(struct i40e_hw *hw, |
173 | enum i40e_aq_resources_ids resource, | |
174 | enum i40e_aq_resource_access_type access, | |
175 | u8 sdp_number, u64 *timeout, | |
176 | struct i40e_asq_cmd_details *cmd_details); | |
177 | i40e_status i40e_aq_release_resource(struct i40e_hw *hw, | |
178 | enum i40e_aq_resources_ids resource, | |
179 | u8 sdp_number, | |
180 | struct i40e_asq_cmd_details *cmd_details); | |
181 | i40e_status i40e_aq_read_nvm(struct i40e_hw *hw, u8 module_pointer, | |
182 | u32 offset, u16 length, void *data, | |
183 | bool last_command, | |
184 | struct i40e_asq_cmd_details *cmd_details); | |
cd552cb4 SN |
185 | i40e_status i40e_aq_erase_nvm(struct i40e_hw *hw, u8 module_pointer, |
186 | u32 offset, u16 length, bool last_command, | |
187 | struct i40e_asq_cmd_details *cmd_details); | |
56a62fc8 JB |
188 | i40e_status i40e_aq_discover_capabilities(struct i40e_hw *hw, |
189 | void *buff, u16 buff_size, u16 *data_size, | |
190 | enum i40e_admin_queue_opc list_type_opc, | |
191 | struct i40e_asq_cmd_details *cmd_details); | |
192 | i40e_status i40e_aq_update_nvm(struct i40e_hw *hw, u8 module_pointer, | |
193 | u32 offset, u16 length, void *data, | |
e3a5d6e6 | 194 | bool last_command, u8 preservation_flags, |
56a62fc8 | 195 | struct i40e_asq_cmd_details *cmd_details); |
f05798b4 PA |
196 | i40e_status i40e_aq_rearrange_nvm(struct i40e_hw *hw, |
197 | u8 rearrange_nvm, | |
198 | struct i40e_asq_cmd_details *cmd_details); | |
56a62fc8 JB |
199 | i40e_status i40e_aq_get_lldp_mib(struct i40e_hw *hw, u8 bridge_type, |
200 | u8 mib_type, void *buff, u16 buff_size, | |
201 | u16 *local_len, u16 *remote_len, | |
202 | struct i40e_asq_cmd_details *cmd_details); | |
203 | i40e_status i40e_aq_cfg_lldp_mib_change_event(struct i40e_hw *hw, | |
204 | bool enable_update, | |
205 | struct i40e_asq_cmd_details *cmd_details); | |
c65e78f8 AL |
206 | enum i40e_status_code |
207 | i40e_aq_restore_lldp(struct i40e_hw *hw, u8 *setting, bool restore, | |
208 | struct i40e_asq_cmd_details *cmd_details); | |
56a62fc8 | 209 | i40e_status i40e_aq_stop_lldp(struct i40e_hw *hw, bool shutdown_agent, |
c65e78f8 | 210 | bool persist, |
56a62fc8 | 211 | struct i40e_asq_cmd_details *cmd_details); |
b6a02a6f UM |
212 | i40e_status i40e_aq_set_dcb_parameters(struct i40e_hw *hw, |
213 | bool dcb_enable, | |
214 | struct i40e_asq_cmd_details | |
215 | *cmd_details); | |
c65e78f8 AL |
216 | i40e_status i40e_aq_start_lldp(struct i40e_hw *hw, bool persist, |
217 | struct i40e_asq_cmd_details *cmd_details); | |
9fa61dd2 NP |
218 | i40e_status i40e_aq_get_cee_dcb_config(struct i40e_hw *hw, |
219 | void *buff, u16 buff_size, | |
220 | struct i40e_asq_cmd_details *cmd_details); | |
a1c9a9d9 | 221 | i40e_status i40e_aq_add_udp_tunnel(struct i40e_hw *hw, |
f4f94b94 KS |
222 | u16 udp_port, u8 protocol_index, |
223 | u8 *filter_index, | |
a1c9a9d9 JK |
224 | struct i40e_asq_cmd_details *cmd_details); |
225 | i40e_status i40e_aq_del_udp_tunnel(struct i40e_hw *hw, u8 index, | |
226 | struct i40e_asq_cmd_details *cmd_details); | |
56a62fc8 JB |
227 | i40e_status i40e_aq_delete_element(struct i40e_hw *hw, u16 seid, |
228 | struct i40e_asq_cmd_details *cmd_details); | |
229 | i40e_status i40e_aq_mac_address_write(struct i40e_hw *hw, | |
230 | u16 flags, u8 *mac_addr, | |
231 | struct i40e_asq_cmd_details *cmd_details); | |
6b192891 MW |
232 | i40e_status i40e_aq_config_vsi_bw_limit(struct i40e_hw *hw, |
233 | u16 seid, u16 credit, u8 max_credit, | |
234 | struct i40e_asq_cmd_details *cmd_details); | |
afb3ff0d NP |
235 | i40e_status i40e_aq_dcb_updated(struct i40e_hw *hw, |
236 | struct i40e_asq_cmd_details *cmd_details); | |
56a62fc8 JB |
237 | i40e_status i40e_aq_config_switch_comp_bw_limit(struct i40e_hw *hw, |
238 | u16 seid, u16 credit, u8 max_bw, | |
239 | struct i40e_asq_cmd_details *cmd_details); | |
240 | i40e_status i40e_aq_config_vsi_tc_bw(struct i40e_hw *hw, u16 seid, | |
241 | struct i40e_aqc_configure_vsi_tc_bw_data *bw_data, | |
242 | struct i40e_asq_cmd_details *cmd_details); | |
afb3ff0d NP |
243 | i40e_status i40e_aq_config_switch_comp_ets(struct i40e_hw *hw, |
244 | u16 seid, | |
245 | struct i40e_aqc_configure_switching_comp_ets_data *ets_data, | |
246 | enum i40e_admin_queue_opc opcode, | |
247 | struct i40e_asq_cmd_details *cmd_details); | |
248 | i40e_status i40e_aq_config_switch_comp_bw_config(struct i40e_hw *hw, | |
249 | u16 seid, | |
250 | struct i40e_aqc_configure_switching_comp_bw_config_data *bw_data, | |
251 | struct i40e_asq_cmd_details *cmd_details); | |
56a62fc8 JB |
252 | i40e_status i40e_aq_query_vsi_bw_config(struct i40e_hw *hw, |
253 | u16 seid, | |
254 | struct i40e_aqc_query_vsi_bw_config_resp *bw_data, | |
255 | struct i40e_asq_cmd_details *cmd_details); | |
256 | i40e_status i40e_aq_query_vsi_ets_sla_config(struct i40e_hw *hw, | |
257 | u16 seid, | |
258 | struct i40e_aqc_query_vsi_ets_sla_config_resp *bw_data, | |
259 | struct i40e_asq_cmd_details *cmd_details); | |
260 | i40e_status i40e_aq_query_switch_comp_ets_config(struct i40e_hw *hw, | |
261 | u16 seid, | |
262 | struct i40e_aqc_query_switching_comp_ets_config_resp *bw_data, | |
263 | struct i40e_asq_cmd_details *cmd_details); | |
264 | i40e_status i40e_aq_query_port_ets_config(struct i40e_hw *hw, | |
265 | u16 seid, | |
266 | struct i40e_aqc_query_port_ets_config_resp *bw_data, | |
267 | struct i40e_asq_cmd_details *cmd_details); | |
268 | i40e_status i40e_aq_query_switch_comp_bw_config(struct i40e_hw *hw, | |
269 | u16 seid, | |
270 | struct i40e_aqc_query_switching_comp_bw_config_resp *bw_data, | |
271 | struct i40e_asq_cmd_details *cmd_details); | |
2fd75f31 NP |
272 | i40e_status i40e_aq_resume_port_tx(struct i40e_hw *hw, |
273 | struct i40e_asq_cmd_details *cmd_details); | |
85925cd0 | 274 | enum i40e_status_code |
2f4b411a AN |
275 | i40e_aq_add_cloud_filters_bb(struct i40e_hw *hw, u16 seid, |
276 | struct i40e_aqc_cloud_filters_element_bb *filters, | |
277 | u8 filter_count); | |
278 | enum i40e_status_code | |
279 | i40e_aq_add_cloud_filters(struct i40e_hw *hw, u16 vsi, | |
280 | struct i40e_aqc_cloud_filters_element_data *filters, | |
281 | u8 filter_count); | |
282 | enum i40e_status_code | |
283 | i40e_aq_rem_cloud_filters(struct i40e_hw *hw, u16 vsi, | |
284 | struct i40e_aqc_cloud_filters_element_data *filters, | |
285 | u8 filter_count); | |
85925cd0 | 286 | enum i40e_status_code |
2f4b411a AN |
287 | i40e_aq_rem_cloud_filters_bb(struct i40e_hw *hw, u16 seid, |
288 | struct i40e_aqc_cloud_filters_element_bb *filters, | |
289 | u8 filter_count); | |
e1c4751e NP |
290 | i40e_status i40e_read_lldp_cfg(struct i40e_hw *hw, |
291 | struct i40e_lldp_variables *lldp_cfg); | |
56a62fc8 JB |
292 | /* i40e_common */ |
293 | i40e_status i40e_init_shared_code(struct i40e_hw *hw); | |
294 | i40e_status i40e_pf_reset(struct i40e_hw *hw); | |
838d41d9 | 295 | void i40e_clear_hw(struct i40e_hw *hw); |
56a62fc8 | 296 | void i40e_clear_pxe_mode(struct i40e_hw *hw); |
a72a5abc | 297 | i40e_status i40e_get_link_status(struct i40e_hw *hw, bool *link_up); |
0a862b43 | 298 | i40e_status i40e_update_link_info(struct i40e_hw *hw); |
1f224ad2 | 299 | i40e_status i40e_get_mac_addr(struct i40e_hw *hw, u8 *mac_addr); |
f4492db1 GR |
300 | i40e_status i40e_read_bw_from_alt_ram(struct i40e_hw *hw, |
301 | u32 *max_bw, u32 *min_bw, bool *min_valid, | |
302 | bool *max_valid); | |
303 | i40e_status i40e_aq_configure_partition_bw(struct i40e_hw *hw, | |
304 | struct i40e_aqc_configure_partition_bw_data *bw_data, | |
305 | struct i40e_asq_cmd_details *cmd_details); | |
1f224ad2 | 306 | i40e_status i40e_get_port_mac_addr(struct i40e_hw *hw, u8 *mac_addr); |
18f680c6 KK |
307 | i40e_status i40e_read_pba_string(struct i40e_hw *hw, u8 *pba_num, |
308 | u32 pba_num_size); | |
afb3ff0d | 309 | i40e_status i40e_validate_mac_addr(u8 *mac_addr); |
351499ab | 310 | void i40e_pre_tx_queue_cfg(struct i40e_hw *hw, u32 queue, bool enable); |
56a62fc8 JB |
311 | /* prototype for functions used for NVM access */ |
312 | i40e_status i40e_init_nvm(struct i40e_hw *hw); | |
313 | i40e_status i40e_acquire_nvm(struct i40e_hw *hw, | |
314 | enum i40e_aq_resource_access_type access); | |
315 | void i40e_release_nvm(struct i40e_hw *hw); | |
56a62fc8 JB |
316 | i40e_status i40e_read_nvm_word(struct i40e_hw *hw, u16 offset, |
317 | u16 *data); | |
ff924657 SW |
318 | enum i40e_status_code i40e_read_nvm_module_data(struct i40e_hw *hw, |
319 | u8 module_ptr, | |
320 | u16 module_offset, | |
321 | u16 data_offset, | |
322 | u16 words_data_size, | |
323 | u16 *data_ptr); | |
65c275e4 SW |
324 | i40e_status i40e_read_nvm_buffer(struct i40e_hw *hw, u16 offset, |
325 | u16 *words, u16 *data); | |
cd552cb4 | 326 | i40e_status i40e_update_nvm_checksum(struct i40e_hw *hw); |
56a62fc8 JB |
327 | i40e_status i40e_validate_nvm_checksum(struct i40e_hw *hw, |
328 | u16 *checksum); | |
cd552cb4 SN |
329 | i40e_status i40e_nvmupd_command(struct i40e_hw *hw, |
330 | struct i40e_nvm_access *cmd, | |
331 | u8 *bytes, int *); | |
e3a5d6e6 PJ |
332 | void i40e_nvmupd_check_wait_event(struct i40e_hw *hw, u16 opcode, |
333 | struct i40e_aq_desc *desc); | |
334 | void i40e_nvmupd_clear_wait_state(struct i40e_hw *hw); | |
d4dfb81a | 335 | void i40e_set_pci_config_data(struct i40e_hw *hw, u16 link_status); |
56a62fc8 | 336 | |
a39f165d PK |
337 | i40e_status i40e_set_mac_type(struct i40e_hw *hw); |
338 | ||
206812b5 JB |
339 | extern struct i40e_rx_ptype_decoded i40e_ptype_lookup[]; |
340 | ||
341 | static inline struct i40e_rx_ptype_decoded decode_rx_desc_ptype(u8 ptype) | |
342 | { | |
343 | return i40e_ptype_lookup[ptype]; | |
344 | } | |
345 | ||
5b643479 JK |
346 | /** |
347 | * i40e_virtchnl_link_speed - Convert AdminQ link_speed to virtchnl definition | |
348 | * @link_speed: the speed to convert | |
349 | * | |
350 | * Returns the link_speed in terms of the virtchnl interface, for use in | |
351 | * converting link_speed as reported by the AdminQ into the format used for | |
352 | * talking to virtchnl devices. If we can't represent the link speed properly, | |
353 | * report LINK_SPEED_UNKNOWN. | |
354 | **/ | |
355 | static inline enum virtchnl_link_speed | |
356 | i40e_virtchnl_link_speed(enum i40e_aq_link_speed link_speed) | |
357 | { | |
358 | switch (link_speed) { | |
359 | case I40E_LINK_SPEED_100MB: | |
360 | return VIRTCHNL_LINK_SPEED_100MB; | |
361 | case I40E_LINK_SPEED_1GB: | |
362 | return VIRTCHNL_LINK_SPEED_1GB; | |
4ae4916b AL |
363 | case I40E_LINK_SPEED_2_5GB: |
364 | return VIRTCHNL_LINK_SPEED_2_5GB; | |
365 | case I40E_LINK_SPEED_5GB: | |
366 | return VIRTCHNL_LINK_SPEED_5GB; | |
5b643479 JK |
367 | case I40E_LINK_SPEED_10GB: |
368 | return VIRTCHNL_LINK_SPEED_10GB; | |
369 | case I40E_LINK_SPEED_40GB: | |
370 | return VIRTCHNL_LINK_SPEED_40GB; | |
371 | case I40E_LINK_SPEED_20GB: | |
372 | return VIRTCHNL_LINK_SPEED_20GB; | |
373 | case I40E_LINK_SPEED_25GB: | |
374 | return VIRTCHNL_LINK_SPEED_25GB; | |
375 | case I40E_LINK_SPEED_UNKNOWN: | |
376 | default: | |
377 | return VIRTCHNL_LINK_SPEED_UNKNOWN; | |
378 | } | |
379 | } | |
380 | ||
56a62fc8 JB |
381 | /* prototype for functions used for SW locks */ |
382 | ||
383 | /* i40e_common for VF drivers*/ | |
384 | void i40e_vf_parse_hw_config(struct i40e_hw *hw, | |
310a2ad9 | 385 | struct virtchnl_vf_resource *msg); |
56a62fc8 JB |
386 | i40e_status i40e_vf_reset(struct i40e_hw *hw); |
387 | i40e_status i40e_aq_send_msg_to_pf(struct i40e_hw *hw, | |
310a2ad9 | 388 | enum virtchnl_ops v_opcode, |
56a62fc8 JB |
389 | i40e_status v_retval, |
390 | u8 *msg, u16 msglen, | |
391 | struct i40e_asq_cmd_details *cmd_details); | |
392 | i40e_status i40e_set_filter_control(struct i40e_hw *hw, | |
393 | struct i40e_filter_control_settings *settings); | |
afb3ff0d NP |
394 | i40e_status i40e_aq_add_rem_control_packet_filter(struct i40e_hw *hw, |
395 | u8 *mac_addr, u16 ethtype, u16 flags, | |
396 | u16 vsi_seid, u16 queue, bool is_add, | |
397 | struct i40e_control_filter_stats *stats, | |
398 | struct i40e_asq_cmd_details *cmd_details); | |
3169c323 JB |
399 | i40e_status i40e_aq_debug_dump(struct i40e_hw *hw, u8 cluster_id, |
400 | u8 table_id, u32 start_index, u16 buff_size, | |
401 | void *buff, u16 *ret_buff_size, | |
402 | u8 *ret_next_table, u32 *ret_next_index, | |
403 | struct i40e_asq_cmd_details *cmd_details); | |
e7358f54 ASJ |
404 | void i40e_add_filter_to_drop_tx_flow_control_frames(struct i40e_hw *hw, |
405 | u16 vsi_seid); | |
f658137c SN |
406 | i40e_status i40e_aq_rx_ctl_read_register(struct i40e_hw *hw, |
407 | u32 reg_addr, u32 *reg_val, | |
408 | struct i40e_asq_cmd_details *cmd_details); | |
409 | u32 i40e_read_rx_ctl(struct i40e_hw *hw, u32 reg_addr); | |
410 | i40e_status i40e_aq_rx_ctl_write_register(struct i40e_hw *hw, | |
411 | u32 reg_addr, u32 reg_val, | |
412 | struct i40e_asq_cmd_details *cmd_details); | |
413 | void i40e_write_rx_ctl(struct i40e_hw *hw, u32 reg_addr, u32 reg_val); | |
0514db37 PA |
414 | enum i40e_status_code |
415 | i40e_aq_set_phy_register_ext(struct i40e_hw *hw, | |
416 | u8 phy_select, u8 dev_addr, bool page_change, | |
417 | bool set_mdio, u8 mdio_num, | |
418 | u32 reg_addr, u32 reg_val, | |
419 | struct i40e_asq_cmd_details *cmd_details); | |
420 | enum i40e_status_code | |
421 | i40e_aq_get_phy_register_ext(struct i40e_hw *hw, | |
422 | u8 phy_select, u8 dev_addr, bool page_change, | |
423 | bool set_mdio, u8 mdio_num, | |
424 | u32 reg_addr, u32 *reg_val, | |
425 | struct i40e_asq_cmd_details *cmd_details); | |
426 | ||
427 | /* Convenience wrappers for most common use case */ | |
428 | #define i40e_aq_set_phy_register(hw, ps, da, pc, ra, rv, cd) \ | |
429 | i40e_aq_set_phy_register_ext(hw, ps, da, pc, false, 0, ra, rv, cd) | |
430 | #define i40e_aq_get_phy_register(hw, ps, da, pc, ra, rv, cd) \ | |
431 | i40e_aq_get_phy_register_ext(hw, ps, da, pc, false, 0, ra, rv, cd) | |
9c0e5caf | 432 | |
91dc1e5d MK |
433 | i40e_status i40e_read_phy_register_clause22(struct i40e_hw *hw, |
434 | u16 reg, u8 phy_addr, u16 *value); | |
435 | i40e_status i40e_write_phy_register_clause22(struct i40e_hw *hw, | |
436 | u16 reg, u8 phy_addr, u16 value); | |
437 | i40e_status i40e_read_phy_register_clause45(struct i40e_hw *hw, | |
438 | u8 page, u16 reg, u8 phy_addr, u16 *value); | |
439 | i40e_status i40e_write_phy_register_clause45(struct i40e_hw *hw, | |
440 | u8 page, u16 reg, u8 phy_addr, u16 value); | |
f62ba914 MK |
441 | i40e_status i40e_read_phy_register(struct i40e_hw *hw, u8 page, u16 reg, |
442 | u8 phy_addr, u16 *value); | |
443 | i40e_status i40e_write_phy_register(struct i40e_hw *hw, u8 page, u16 reg, | |
444 | u8 phy_addr, u16 value); | |
fd077cd3 CW |
445 | u8 i40e_get_phy_address(struct i40e_hw *hw, u8 dev_num); |
446 | i40e_status i40e_blink_phy_link_led(struct i40e_hw *hw, | |
447 | u32 time, u32 interval); | |
329e5983 | 448 | i40e_status i40e_aq_write_ddp(struct i40e_hw *hw, void *buff, |
1d5c960c JW |
449 | u16 buff_size, u32 track_id, |
450 | u32 *error_offset, u32 *error_info, | |
329e5983 JW |
451 | struct i40e_asq_cmd_details * |
452 | cmd_details); | |
453 | i40e_status i40e_aq_get_ddp_list(struct i40e_hw *hw, void *buff, | |
1d5c960c | 454 | u16 buff_size, u8 flags, |
329e5983 JW |
455 | struct i40e_asq_cmd_details * |
456 | cmd_details); | |
1d5c960c JW |
457 | struct i40e_generic_seg_header * |
458 | i40e_find_segment_in_package(u32 segment_type, | |
459 | struct i40e_package_header *pkg_header); | |
cdc594e0 AL |
460 | struct i40e_profile_section_header * |
461 | i40e_find_section_in_profile(u32 section_type, | |
462 | struct i40e_profile_segment *profile); | |
1d5c960c JW |
463 | enum i40e_status_code |
464 | i40e_write_profile(struct i40e_hw *hw, struct i40e_profile_segment *i40e_seg, | |
465 | u32 track_id); | |
466 | enum i40e_status_code | |
cdc594e0 AL |
467 | i40e_rollback_profile(struct i40e_hw *hw, struct i40e_profile_segment *i40e_seg, |
468 | u32 track_id); | |
469 | enum i40e_status_code | |
1d5c960c JW |
470 | i40e_add_pinfo_to_list(struct i40e_hw *hw, |
471 | struct i40e_profile_segment *profile, | |
472 | u8 *profile_info_sec, u32 track_id); | |
56a62fc8 | 473 | #endif /* _I40E_PROTOTYPE_H_ */ |