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Merge remote-tracking branch 'regulator/fix/max77802' into regulator-linus
[mirror_ubuntu-artful-kernel.git] / drivers / net / ethernet / intel / i40e / i40e_virtchnl_pf.c
CommitLineData
5c3c48ac
JB		 1/*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
40d72a50 4 * Copyright(c) 2013 - 2016 Intel Corporation.
5c3c48ac
JB		 5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
dc641b73
GR		 15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
5c3c48ac
JB		 17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27#include "i40e.h"
28
532b0455
MW		 29/*********************notification routines***********************/
30
31/**
32 * i40e_vc_vf_broadcast
33 * @pf: pointer to the PF structure
34 * @opcode: operation code
35 * @retval: return value
36 * @msg: pointer to the msg buffer
37 * @msglen: msg length
38 *
39 * send a message to all VFs on a given PF
40 **/
41static void i40e_vc_vf_broadcast(struct i40e_pf *pf,
42 enum i40e_virtchnl_ops v_opcode,
43 i40e_status v_retval, u8 *msg,
44 u16 msglen)
45{
46 struct i40e_hw *hw = &pf->hw;
47 struct i40e_vf *vf = pf->vf;
48 int i;
49
50 for (i = 0; i < pf->num_alloc_vfs; i++, vf++) {
a1b5a24f 51 int abs_vf_id = vf->vf_id + (int)hw->func_caps.vf_base_id;
532b0455 52 /* Not all vfs are enabled so skip the ones that are not */
6322e63c
JK		 53 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states) &&
54 !test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states))
532b0455
MW		 55 continue;
56
57 /* Ignore return value on purpose - a given VF may fail, but
58 * we need to keep going and send to all of them
59 */
60 i40e_aq_send_msg_to_vf(hw, abs_vf_id, v_opcode, v_retval,
61 msg, msglen, NULL);
62 }
63}
64
65/**
55f7d723 66 * i40e_vc_notify_vf_link_state
532b0455
MW		 67 * @vf: pointer to the VF structure
68 *
69 * send a link status message to a single VF
70 **/
71static void i40e_vc_notify_vf_link_state(struct i40e_vf *vf)
72{
73 struct i40e_virtchnl_pf_event pfe;
74 struct i40e_pf *pf = vf->pf;
75 struct i40e_hw *hw = &pf->hw;
76 struct i40e_link_status *ls = &pf->hw.phy.link_info;
a1b5a24f 77 int abs_vf_id = vf->vf_id + (int)hw->func_caps.vf_base_id;
532b0455
MW		 78
79 pfe.event = I40E_VIRTCHNL_EVENT_LINK_CHANGE;
80 pfe.severity = I40E_PF_EVENT_SEVERITY_INFO;
81 if (vf->link_forced) {
82 pfe.event_data.link_event.link_status = vf->link_up;
83 pfe.event_data.link_event.link_speed =
84 (vf->link_up ? I40E_LINK_SPEED_40GB : 0);
85 } else {
86 pfe.event_data.link_event.link_status =
87 ls->link_info & I40E_AQ_LINK_UP;
88 pfe.event_data.link_event.link_speed = ls->link_speed;
89 }
90 i40e_aq_send_msg_to_vf(hw, abs_vf_id, I40E_VIRTCHNL_OP_EVENT,
91 0, (u8 *)&pfe, sizeof(pfe), NULL);
92}
93
94/**
95 * i40e_vc_notify_link_state
96 * @pf: pointer to the PF structure
97 *
98 * send a link status message to all VFs on a given PF
99 **/
100void i40e_vc_notify_link_state(struct i40e_pf *pf)
101{
102 int i;
103
104 for (i = 0; i < pf->num_alloc_vfs; i++)
105 i40e_vc_notify_vf_link_state(&pf->vf[i]);
106}
107
108/**
109 * i40e_vc_notify_reset
110 * @pf: pointer to the PF structure
111 *
112 * indicate a pending reset to all VFs on a given PF
113 **/
114void i40e_vc_notify_reset(struct i40e_pf *pf)
115{
116 struct i40e_virtchnl_pf_event pfe;
117
118 pfe.event = I40E_VIRTCHNL_EVENT_RESET_IMPENDING;
119 pfe.severity = I40E_PF_EVENT_SEVERITY_CERTAIN_DOOM;
120 i40e_vc_vf_broadcast(pf, I40E_VIRTCHNL_OP_EVENT, 0,
121 (u8 *)&pfe, sizeof(struct i40e_virtchnl_pf_event));
122}
123
124/**
125 * i40e_vc_notify_vf_reset
126 * @vf: pointer to the VF structure
127 *
128 * indicate a pending reset to the given VF
129 **/
130void i40e_vc_notify_vf_reset(struct i40e_vf *vf)
131{
132 struct i40e_virtchnl_pf_event pfe;
133 int abs_vf_id;
134
135 /* validate the request */
136 if (!vf || vf->vf_id >= vf->pf->num_alloc_vfs)
137 return;
138
139 /* verify if the VF is in either init or active before proceeding */
6322e63c
JK		 140 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states) &&
141 !test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states))
532b0455
MW		 142 return;
143
a1b5a24f 144 abs_vf_id = vf->vf_id + (int)vf->pf->hw.func_caps.vf_base_id;
532b0455
MW		 145
146 pfe.event = I40E_VIRTCHNL_EVENT_RESET_IMPENDING;
147 pfe.severity = I40E_PF_EVENT_SEVERITY_CERTAIN_DOOM;
148 i40e_aq_send_msg_to_vf(&vf->pf->hw, abs_vf_id, I40E_VIRTCHNL_OP_EVENT,
149 0, (u8 *)&pfe,
150 sizeof(struct i40e_virtchnl_pf_event), NULL);
151}
5c3c48ac
JB		 152/***********************misc routines*****************************/
153
f9b4b627
GR		 154/**
155 * i40e_vc_disable_vf
b40c82e6
JK		 156 * @pf: pointer to the PF info
157 * @vf: pointer to the VF info
f9b4b627
GR		 158 *
159 * Disable the VF through a SW reset
160 **/
161static inline void i40e_vc_disable_vf(struct i40e_pf *pf, struct i40e_vf *vf)
162{
54f455ee
MW		 163 i40e_vc_notify_vf_reset(vf);
164 i40e_reset_vf(vf, false);
f9b4b627
GR		 165}
166
5c3c48ac
JB		 167/**
168 * i40e_vc_isvalid_vsi_id
b40c82e6
JK		 169 * @vf: pointer to the VF info
170 * @vsi_id: VF relative VSI id
5c3c48ac 171 *
b40c82e6 172 * check for the valid VSI id
5c3c48ac 173 **/
fdf0e0bf 174static inline bool i40e_vc_isvalid_vsi_id(struct i40e_vf *vf, u16 vsi_id)
5c3c48ac
JB		 175{
176 struct i40e_pf *pf = vf->pf;
fdf0e0bf 177 struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id);
5c3c48ac 178
fdf0e0bf 179 return (vsi && (vsi->vf_id == vf->vf_id));
5c3c48ac
JB		 180}
181
182/**
183 * i40e_vc_isvalid_queue_id
b40c82e6 184 * @vf: pointer to the VF info
5c3c48ac
JB		 185 * @vsi_id: vsi id
186 * @qid: vsi relative queue id
187 *
188 * check for the valid queue id
189 **/
fdf0e0bf 190static inline bool i40e_vc_isvalid_queue_id(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac
JB		 191 u8 qid)
192{
193 struct i40e_pf *pf = vf->pf;
fdf0e0bf 194 struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id);
5c3c48ac 195
fdf0e0bf 196 return (vsi && (qid < vsi->alloc_queue_pairs));
5c3c48ac
JB		 197}
198
199/**
200 * i40e_vc_isvalid_vector_id
b40c82e6
JK		 201 * @vf: pointer to the VF info
202 * @vector_id: VF relative vector id
5c3c48ac
JB		 203 *
204 * check for the valid vector id
205 **/
206static inline bool i40e_vc_isvalid_vector_id(struct i40e_vf *vf, u8 vector_id)
207{
208 struct i40e_pf *pf = vf->pf;
209
9347eb77 210 return vector_id < pf->hw.func_caps.num_msix_vectors_vf;
5c3c48ac
JB		 211}
212
213/***********************vf resource mgmt routines*****************/
214
215/**
216 * i40e_vc_get_pf_queue_id
b40c82e6 217 * @vf: pointer to the VF info
fdf0e0bf 218 * @vsi_id: id of VSI as provided by the FW
5c3c48ac
JB		 219 * @vsi_queue_id: vsi relative queue id
220 *
b40c82e6 221 * return PF relative queue id
5c3c48ac 222 **/
fdf0e0bf 223static u16 i40e_vc_get_pf_queue_id(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac
JB		 224 u8 vsi_queue_id)
225{
226 struct i40e_pf *pf = vf->pf;
fdf0e0bf 227 struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id);
5c3c48ac
JB		 228 u16 pf_queue_id = I40E_QUEUE_END_OF_LIST;
229
fdf0e0bf
ASJ		 230 if (!vsi)
231 return pf_queue_id;
232
5c3c48ac
JB		 233 if (le16_to_cpu(vsi->info.mapping_flags) &
234 I40E_AQ_VSI_QUE_MAP_NONCONTIG)
235 pf_queue_id =
236 le16_to_cpu(vsi->info.queue_mapping[vsi_queue_id]);
237 else
238 pf_queue_id = le16_to_cpu(vsi->info.queue_mapping[0]) +
239 vsi_queue_id;
240
241 return pf_queue_id;
242}
243
5c3c48ac
JB		 244/**
245 * i40e_config_irq_link_list
b40c82e6 246 * @vf: pointer to the VF info
fdf0e0bf 247 * @vsi_id: id of VSI as given by the FW
5c3c48ac
JB		 248 * @vecmap: irq map info
249 *
250 * configure irq link list from the map
251 **/
fdf0e0bf 252static void i40e_config_irq_link_list(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac
JB		 253 struct i40e_virtchnl_vector_map *vecmap)
254{
255 unsigned long linklistmap = 0, tempmap;
256 struct i40e_pf *pf = vf->pf;
257 struct i40e_hw *hw = &pf->hw;
258 u16 vsi_queue_id, pf_queue_id;
259 enum i40e_queue_type qtype;
260 u16 next_q, vector_id;
261 u32 reg, reg_idx;
262 u16 itr_idx = 0;
263
264 vector_id = vecmap->vector_id;
265 /* setup the head */
266 if (0 == vector_id)
267 reg_idx = I40E_VPINT_LNKLST0(vf->vf_id);
268 else
269 reg_idx = I40E_VPINT_LNKLSTN(
9347eb77
MW		 270 ((pf->hw.func_caps.num_msix_vectors_vf - 1) * vf->vf_id) +
271 (vector_id - 1));
5c3c48ac
JB		 272
273 if (vecmap->rxq_map == 0 && vecmap->txq_map == 0) {
274 /* Special case - No queues mapped on this vector */
275 wr32(hw, reg_idx, I40E_VPINT_LNKLST0_FIRSTQ_INDX_MASK);
276 goto irq_list_done;
277 }
278 tempmap = vecmap->rxq_map;
4836650b 279 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
41a1d04b
JB		 280 linklistmap |= (BIT(I40E_VIRTCHNL_SUPPORTED_QTYPES *
281 vsi_queue_id));
5c3c48ac
JB		 282 }
283
284 tempmap = vecmap->txq_map;
4836650b 285 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
41a1d04b
JB		 286 linklistmap |= (BIT(I40E_VIRTCHNL_SUPPORTED_QTYPES *
287 vsi_queue_id + 1));
5c3c48ac
JB		 288 }
289
290 next_q = find_first_bit(&linklistmap,
291 (I40E_MAX_VSI_QP *
292 I40E_VIRTCHNL_SUPPORTED_QTYPES));
b82bc49e
MW		 293 vsi_queue_id = next_q / I40E_VIRTCHNL_SUPPORTED_QTYPES;
294 qtype = next_q % I40E_VIRTCHNL_SUPPORTED_QTYPES;
fdf0e0bf 295 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id, vsi_queue_id);
5c3c48ac
JB		 296 reg = ((qtype << I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT) | pf_queue_id);
297
298 wr32(hw, reg_idx, reg);
299
300 while (next_q < (I40E_MAX_VSI_QP * I40E_VIRTCHNL_SUPPORTED_QTYPES)) {
301 switch (qtype) {
302 case I40E_QUEUE_TYPE_RX:
303 reg_idx = I40E_QINT_RQCTL(pf_queue_id);
304 itr_idx = vecmap->rxitr_idx;
305 break;
306 case I40E_QUEUE_TYPE_TX:
307 reg_idx = I40E_QINT_TQCTL(pf_queue_id);
308 itr_idx = vecmap->txitr_idx;
309 break;
310 default:
311 break;
312 }
313
314 next_q = find_next_bit(&linklistmap,
315 (I40E_MAX_VSI_QP *
316 I40E_VIRTCHNL_SUPPORTED_QTYPES),
317 next_q + 1);
829af3ac
MW		 318 if (next_q <
319 (I40E_MAX_VSI_QP * I40E_VIRTCHNL_SUPPORTED_QTYPES)) {
5c3c48ac
JB		 320 vsi_queue_id = next_q / I40E_VIRTCHNL_SUPPORTED_QTYPES;
321 qtype = next_q % I40E_VIRTCHNL_SUPPORTED_QTYPES;
fdf0e0bf 322 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id,
5c3c48ac
JB		 323 vsi_queue_id);
324 } else {
325 pf_queue_id = I40E_QUEUE_END_OF_LIST;
326 qtype = 0;
327 }
328
329 /* format for the RQCTL & TQCTL regs is same */
330 reg = (vector_id) |
331 (qtype << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT) |
332 (pf_queue_id << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) |
41a1d04b 333 BIT(I40E_QINT_RQCTL_CAUSE_ENA_SHIFT) |
5c3c48ac
JB		 334 (itr_idx << I40E_QINT_RQCTL_ITR_INDX_SHIFT);
335 wr32(hw, reg_idx, reg);
336 }
337
b8262a6d
ASJ		 338 /* if the vf is running in polling mode and using interrupt zero,
339 * need to disable auto-mask on enabling zero interrupt for VFs.
340 */
341 if ((vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_RX_POLLING) &&
342 (vector_id == 0)) {
343 reg = rd32(hw, I40E_GLINT_CTL);
344 if (!(reg & I40E_GLINT_CTL_DIS_AUTOMASK_VF0_MASK)) {
345 reg |= I40E_GLINT_CTL_DIS_AUTOMASK_VF0_MASK;
346 wr32(hw, I40E_GLINT_CTL, reg);
347 }
348 }
349
5c3c48ac
JB		 350irq_list_done:
351 i40e_flush(hw);
352}
353
e3219ce6
ASJ		 354/**
355 * i40e_release_iwarp_qvlist
356 * @vf: pointer to the VF.
357 *
358 **/
359static void i40e_release_iwarp_qvlist(struct i40e_vf *vf)
360{
361 struct i40e_pf *pf = vf->pf;
362 struct i40e_virtchnl_iwarp_qvlist_info *qvlist_info = vf->qvlist_info;
363 u32 msix_vf;
364 u32 i;
365
366 if (!vf->qvlist_info)
367 return;
368
369 msix_vf = pf->hw.func_caps.num_msix_vectors_vf;
370 for (i = 0; i < qvlist_info->num_vectors; i++) {
371 struct i40e_virtchnl_iwarp_qv_info *qv_info;
372 u32 next_q_index, next_q_type;
373 struct i40e_hw *hw = &pf->hw;
374 u32 v_idx, reg_idx, reg;
375
376 qv_info = &qvlist_info->qv_info[i];
377 if (!qv_info)
378 continue;
379 v_idx = qv_info->v_idx;
380 if (qv_info->ceq_idx != I40E_QUEUE_INVALID_IDX) {
381 /* Figure out the queue after CEQ and make that the
382 * first queue.
383 */
384 reg_idx = (msix_vf - 1) * vf->vf_id + qv_info->ceq_idx;
385 reg = rd32(hw, I40E_VPINT_CEQCTL(reg_idx));
386 next_q_index = (reg & I40E_VPINT_CEQCTL_NEXTQ_INDX_MASK)
387 >> I40E_VPINT_CEQCTL_NEXTQ_INDX_SHIFT;
388 next_q_type = (reg & I40E_VPINT_CEQCTL_NEXTQ_TYPE_MASK)
389 >> I40E_VPINT_CEQCTL_NEXTQ_TYPE_SHIFT;
390
391 reg_idx = ((msix_vf - 1) * vf->vf_id) + (v_idx - 1);
392 reg = (next_q_index &
393 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK) |
394 (next_q_type <<
395 I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT);
396
397 wr32(hw, I40E_VPINT_LNKLSTN(reg_idx), reg);
398 }
399 }
400 kfree(vf->qvlist_info);
401 vf->qvlist_info = NULL;
402}
403
404/**
405 * i40e_config_iwarp_qvlist
406 * @vf: pointer to the VF info
407 * @qvlist_info: queue and vector list
408 *
409 * Return 0 on success or < 0 on error
410 **/
411static int i40e_config_iwarp_qvlist(struct i40e_vf *vf,
412 struct i40e_virtchnl_iwarp_qvlist_info *qvlist_info)
413{
414 struct i40e_pf *pf = vf->pf;
415 struct i40e_hw *hw = &pf->hw;
416 struct i40e_virtchnl_iwarp_qv_info *qv_info;
417 u32 v_idx, i, reg_idx, reg;
418 u32 next_q_idx, next_q_type;
419 u32 msix_vf, size;
420
421 size = sizeof(struct i40e_virtchnl_iwarp_qvlist_info) +
422 (sizeof(struct i40e_virtchnl_iwarp_qv_info) *
423 (qvlist_info->num_vectors - 1));
424 vf->qvlist_info = kzalloc(size, GFP_KERNEL);
425 vf->qvlist_info->num_vectors = qvlist_info->num_vectors;
426
427 msix_vf = pf->hw.func_caps.num_msix_vectors_vf;
428 for (i = 0; i < qvlist_info->num_vectors; i++) {
429 qv_info = &qvlist_info->qv_info[i];
430 if (!qv_info)
431 continue;
432 v_idx = qv_info->v_idx;
433
434 /* Validate vector id belongs to this vf */
435 if (!i40e_vc_isvalid_vector_id(vf, v_idx))
436 goto err;
437
438 vf->qvlist_info->qv_info[i] = *qv_info;
439
440 reg_idx = ((msix_vf - 1) * vf->vf_id) + (v_idx - 1);
441 /* We might be sharing the interrupt, so get the first queue
442 * index and type, push it down the list by adding the new
443 * queue on top. Also link it with the new queue in CEQCTL.
444 */
445 reg = rd32(hw, I40E_VPINT_LNKLSTN(reg_idx));
446 next_q_idx = ((reg & I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK) >>
447 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_SHIFT);
448 next_q_type = ((reg & I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_MASK) >>
449 I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT);
450
451 if (qv_info->ceq_idx != I40E_QUEUE_INVALID_IDX) {
452 reg_idx = (msix_vf - 1) * vf->vf_id + qv_info->ceq_idx;
453 reg = (I40E_VPINT_CEQCTL_CAUSE_ENA_MASK |
454 (v_idx << I40E_VPINT_CEQCTL_MSIX_INDX_SHIFT) |
455 (qv_info->itr_idx << I40E_VPINT_CEQCTL_ITR_INDX_SHIFT) |
456 (next_q_type << I40E_VPINT_CEQCTL_NEXTQ_TYPE_SHIFT) |
457 (next_q_idx << I40E_VPINT_CEQCTL_NEXTQ_INDX_SHIFT));
458 wr32(hw, I40E_VPINT_CEQCTL(reg_idx), reg);
459
460 reg_idx = ((msix_vf - 1) * vf->vf_id) + (v_idx - 1);
461 reg = (qv_info->ceq_idx &
462 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK) |
463 (I40E_QUEUE_TYPE_PE_CEQ <<
464 I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT);
465 wr32(hw, I40E_VPINT_LNKLSTN(reg_idx), reg);
466 }
467
468 if (qv_info->aeq_idx != I40E_QUEUE_INVALID_IDX) {
469 reg = (I40E_VPINT_AEQCTL_CAUSE_ENA_MASK |
470 (v_idx << I40E_VPINT_AEQCTL_MSIX_INDX_SHIFT) |
471 (qv_info->itr_idx << I40E_VPINT_AEQCTL_ITR_INDX_SHIFT));
472
473 wr32(hw, I40E_VPINT_AEQCTL(vf->vf_id), reg);
474 }
475 }
476
477 return 0;
478err:
479 kfree(vf->qvlist_info);
480 vf->qvlist_info = NULL;
481 return -EINVAL;
482}
483
5c3c48ac
JB		 484/**
485 * i40e_config_vsi_tx_queue
b40c82e6 486 * @vf: pointer to the VF info
fdf0e0bf 487 * @vsi_id: id of VSI as provided by the FW
5c3c48ac
JB		 488 * @vsi_queue_id: vsi relative queue index
489 * @info: config. info
490 *
491 * configure tx queue
492 **/
fdf0e0bf 493static int i40e_config_vsi_tx_queue(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac
JB		 494 u16 vsi_queue_id,
495 struct i40e_virtchnl_txq_info *info)
496{
497 struct i40e_pf *pf = vf->pf;
498 struct i40e_hw *hw = &pf->hw;
499 struct i40e_hmc_obj_txq tx_ctx;
fdf0e0bf 500 struct i40e_vsi *vsi;
5c3c48ac
JB		 501 u16 pf_queue_id;
502 u32 qtx_ctl;
503 int ret = 0;
504
d4a0658d
CW		 505 if (!i40e_vc_isvalid_vsi_id(vf, info->vsi_id)) {
506 ret = -ENOENT;
507 goto error_context;
508 }
fdf0e0bf
ASJ		 509 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id, vsi_queue_id);
510 vsi = i40e_find_vsi_from_id(pf, vsi_id);
d4a0658d
CW		 511 if (!vsi) {
512 ret = -ENOENT;
513 goto error_context;
514 }
5c3c48ac
JB		 515
516 /* clear the context structure first */
517 memset(&tx_ctx, 0, sizeof(struct i40e_hmc_obj_txq));
518
519 /* only set the required fields */
520 tx_ctx.base = info->dma_ring_addr / 128;
521 tx_ctx.qlen = info->ring_len;
fdf0e0bf 522 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[0]);
5c3c48ac 523 tx_ctx.rdylist_act = 0;
5d29896a
AS		 524 tx_ctx.head_wb_ena = info->headwb_enabled;
525 tx_ctx.head_wb_addr = info->dma_headwb_addr;
5c3c48ac
JB		 526
527 /* clear the context in the HMC */
528 ret = i40e_clear_lan_tx_queue_context(hw, pf_queue_id);
529 if (ret) {
530 dev_err(&pf->pdev->dev,
531 "Failed to clear VF LAN Tx queue context %d, error: %d\n",
532 pf_queue_id, ret);
533 ret = -ENOENT;
534 goto error_context;
535 }
536
537 /* set the context in the HMC */
538 ret = i40e_set_lan_tx_queue_context(hw, pf_queue_id, &tx_ctx);
539 if (ret) {
540 dev_err(&pf->pdev->dev,
541 "Failed to set VF LAN Tx queue context %d error: %d\n",
542 pf_queue_id, ret);
543 ret = -ENOENT;
544 goto error_context;
545 }
546
547 /* associate this queue with the PCI VF function */
548 qtx_ctl = I40E_QTX_CTL_VF_QUEUE;
13fd9774 549 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT)
5c3c48ac
JB		 550 & I40E_QTX_CTL_PF_INDX_MASK);
551 qtx_ctl |= (((vf->vf_id + hw->func_caps.vf_base_id)
552 << I40E_QTX_CTL_VFVM_INDX_SHIFT)
553 & I40E_QTX_CTL_VFVM_INDX_MASK);
554 wr32(hw, I40E_QTX_CTL(pf_queue_id), qtx_ctl);
555 i40e_flush(hw);
556
557error_context:
558 return ret;
559}
560
561/**
562 * i40e_config_vsi_rx_queue
b40c82e6 563 * @vf: pointer to the VF info
fdf0e0bf 564 * @vsi_id: id of VSI as provided by the FW
5c3c48ac
JB		 565 * @vsi_queue_id: vsi relative queue index
566 * @info: config. info
567 *
568 * configure rx queue
569 **/
fdf0e0bf 570static int i40e_config_vsi_rx_queue(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac
JB		 571 u16 vsi_queue_id,
572 struct i40e_virtchnl_rxq_info *info)
573{
574 struct i40e_pf *pf = vf->pf;
575 struct i40e_hw *hw = &pf->hw;
576 struct i40e_hmc_obj_rxq rx_ctx;
577 u16 pf_queue_id;
578 int ret = 0;
579
fdf0e0bf 580 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id, vsi_queue_id);
5c3c48ac
JB		 581
582 /* clear the context structure first */
583 memset(&rx_ctx, 0, sizeof(struct i40e_hmc_obj_rxq));
584
585 /* only set the required fields */
586 rx_ctx.base = info->dma_ring_addr / 128;
587 rx_ctx.qlen = info->ring_len;
588
589 if (info->splithdr_enabled) {
590 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
591 I40E_RX_SPLIT_IP |
592 I40E_RX_SPLIT_TCP_UDP |
593 I40E_RX_SPLIT_SCTP;
594 /* header length validation */
595 if (info->hdr_size > ((2 * 1024) - 64)) {
596 ret = -EINVAL;
597 goto error_param;
598 }
599 rx_ctx.hbuff = info->hdr_size >> I40E_RXQ_CTX_HBUFF_SHIFT;
600
19b85e67 601 /* set split mode 10b */
d6b3bca1 602 rx_ctx.dtype = I40E_RX_DTYPE_HEADER_SPLIT;
5c3c48ac
JB		 603 }
604
605 /* databuffer length validation */
606 if (info->databuffer_size > ((16 * 1024) - 128)) {
607 ret = -EINVAL;
608 goto error_param;
609 }
610 rx_ctx.dbuff = info->databuffer_size >> I40E_RXQ_CTX_DBUFF_SHIFT;
611
612 /* max pkt. length validation */
613 if (info->max_pkt_size >= (16 * 1024) || info->max_pkt_size < 64) {
614 ret = -EINVAL;
615 goto error_param;
616 }
617 rx_ctx.rxmax = info->max_pkt_size;
618
619 /* enable 32bytes desc always */
620 rx_ctx.dsize = 1;
621
622 /* default values */
5c3c48ac
JB		 623 rx_ctx.lrxqthresh = 2;
624 rx_ctx.crcstrip = 1;
50d41659 625 rx_ctx.prefena = 1;
c1d11cef 626 rx_ctx.l2tsel = 1;
5c3c48ac
JB		 627
628 /* clear the context in the HMC */
629 ret = i40e_clear_lan_rx_queue_context(hw, pf_queue_id);
630 if (ret) {
631 dev_err(&pf->pdev->dev,
632 "Failed to clear VF LAN Rx queue context %d, error: %d\n",
633 pf_queue_id, ret);
634 ret = -ENOENT;
635 goto error_param;
636 }
637
638 /* set the context in the HMC */
639 ret = i40e_set_lan_rx_queue_context(hw, pf_queue_id, &rx_ctx);
640 if (ret) {
641 dev_err(&pf->pdev->dev,
642 "Failed to set VF LAN Rx queue context %d error: %d\n",
643 pf_queue_id, ret);
644 ret = -ENOENT;
645 goto error_param;
646 }
647
648error_param:
649 return ret;
650}
651
652/**
653 * i40e_alloc_vsi_res
b40c82e6 654 * @vf: pointer to the VF info
5c3c48ac
JB		 655 * @type: type of VSI to allocate
656 *
b40c82e6 657 * alloc VF vsi context & resources
5c3c48ac
JB		 658 **/
659static int i40e_alloc_vsi_res(struct i40e_vf *vf, enum i40e_vsi_type type)
660{
661 struct i40e_mac_filter *f = NULL;
662 struct i40e_pf *pf = vf->pf;
5c3c48ac
JB		 663 struct i40e_vsi *vsi;
664 int ret = 0;
665
666 vsi = i40e_vsi_setup(pf, type, pf->vsi[pf->lan_vsi]->seid, vf->vf_id);
667
668 if (!vsi) {
669 dev_err(&pf->pdev->dev,
b40c82e6 670 "add vsi failed for VF %d, aq_err %d\n",
5c3c48ac
JB		 671 vf->vf_id, pf->hw.aq.asq_last_status);
672 ret = -ENOENT;
673 goto error_alloc_vsi_res;
674 }
675 if (type == I40E_VSI_SRIOV) {
bb360717 676 u64 hena = i40e_pf_get_default_rss_hena(pf);
435c084a 677 u8 broadcast[ETH_ALEN];
bb360717 678
fdf0e0bf 679 vf->lan_vsi_idx = vsi->idx;
5c3c48ac 680 vf->lan_vsi_id = vsi->id;
6c12fcbf
GR		 681 /* If the port VLAN has been configured and then the
682 * VF driver was removed then the VSI port VLAN
683 * configuration was destroyed. Check if there is
684 * a port VLAN and restore the VSI configuration if
685 * needed.
686 */
687 if (vf->port_vlan_id)
688 i40e_vsi_add_pvid(vsi, vf->port_vlan_id);
21659035 689
278e7d0b 690 spin_lock_bh(&vsi->mac_filter_hash_lock);
b7b713a8 691 if (is_valid_ether_addr(vf->default_lan_addr.addr)) {
9569a9a4
JK		 692 f = i40e_add_mac_filter(vsi,
693 vf->default_lan_addr.addr);
b7b713a8
MW		 694 if (!f)
695 dev_info(&pf->pdev->dev,
696 "Could not add MAC filter %pM for VF %d\n",
697 vf->default_lan_addr.addr, vf->vf_id);
698 }
435c084a 699 eth_broadcast_addr(broadcast);
9569a9a4 700 f = i40e_add_mac_filter(vsi, broadcast);
435c084a
JK		 701 if (!f)
702 dev_info(&pf->pdev->dev,
703 "Could not allocate VF broadcast filter\n");
278e7d0b 704 spin_unlock_bh(&vsi->mac_filter_hash_lock);
26f77e53
LY		 705 wr32(&pf->hw, I40E_VFQF_HENA1(0, vf->vf_id), (u32)hena);
706 wr32(&pf->hw, I40E_VFQF_HENA1(1, vf->vf_id), (u32)(hena >> 32));
5c3c48ac 707 }
6dbbbfb2 708
5c3c48ac 709 /* program mac filter */
17652c63 710 ret = i40e_sync_vsi_filters(vsi);
fd1646ee 711 if (ret)
5c3c48ac 712 dev_err(&pf->pdev->dev, "Unable to program ucast filters\n");
5c3c48ac 713
6b192891
MW		 714 /* Set VF bandwidth if specified */
715 if (vf->tx_rate) {
716 ret = i40e_aq_config_vsi_bw_limit(&pf->hw, vsi->seid,
717 vf->tx_rate / 50, 0, NULL);
718 if (ret)
719 dev_err(&pf->pdev->dev, "Unable to set tx rate, VF %d, error code %d.\n",
720 vf->vf_id, ret);
721 }
722
5c3c48ac
JB		 723error_alloc_vsi_res:
724 return ret;
725}
726
805bd5bd
MW		 727/**
728 * i40e_enable_vf_mappings
b40c82e6 729 * @vf: pointer to the VF info
805bd5bd 730 *
b40c82e6 731 * enable VF mappings
805bd5bd
MW		 732 **/
733static void i40e_enable_vf_mappings(struct i40e_vf *vf)
734{
735 struct i40e_pf *pf = vf->pf;
736 struct i40e_hw *hw = &pf->hw;
737 u32 reg, total_queue_pairs = 0;
738 int j;
739
740 /* Tell the hardware we're using noncontiguous mapping. HW requires
741 * that VF queues be mapped using this method, even when they are
742 * contiguous in real life
743 */
272cdaf2
SN		 744 i40e_write_rx_ctl(hw, I40E_VSILAN_QBASE(vf->lan_vsi_id),
745 I40E_VSILAN_QBASE_VSIQTABLE_ENA_MASK);
805bd5bd
MW		 746
747 /* enable VF vplan_qtable mappings */
748 reg = I40E_VPLAN_MAPENA_TXRX_ENA_MASK;
749 wr32(hw, I40E_VPLAN_MAPENA(vf->vf_id), reg);
750
751 /* map PF queues to VF queues */
fdf0e0bf
ASJ		 752 for (j = 0; j < pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs; j++) {
753 u16 qid = i40e_vc_get_pf_queue_id(vf, vf->lan_vsi_id, j);
6995b36c 754
805bd5bd
MW		 755 reg = (qid & I40E_VPLAN_QTABLE_QINDEX_MASK);
756 wr32(hw, I40E_VPLAN_QTABLE(total_queue_pairs, vf->vf_id), reg);
757 total_queue_pairs++;
758 }
759
760 /* map PF queues to VSI */
761 for (j = 0; j < 7; j++) {
fdf0e0bf 762 if (j * 2 >= pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs) {
805bd5bd
MW		 763 reg = 0x07FF07FF; /* unused */
764 } else {
fdf0e0bf 765 u16 qid = i40e_vc_get_pf_queue_id(vf, vf->lan_vsi_id,
805bd5bd
MW		 766 j * 2);
767 reg = qid;
fdf0e0bf 768 qid = i40e_vc_get_pf_queue_id(vf, vf->lan_vsi_id,
805bd5bd
MW		 769 (j * 2) + 1);
770 reg |= qid << 16;
771 }
272cdaf2
SN		 772 i40e_write_rx_ctl(hw, I40E_VSILAN_QTABLE(j, vf->lan_vsi_id),
773 reg);
805bd5bd
MW		 774 }
775
776 i40e_flush(hw);
777}
778
779/**
780 * i40e_disable_vf_mappings
b40c82e6 781 * @vf: pointer to the VF info
805bd5bd 782 *
b40c82e6 783 * disable VF mappings
805bd5bd
MW		 784 **/
785static void i40e_disable_vf_mappings(struct i40e_vf *vf)
786{
787 struct i40e_pf *pf = vf->pf;
788 struct i40e_hw *hw = &pf->hw;
789 int i;
790
791 /* disable qp mappings */
792 wr32(hw, I40E_VPLAN_MAPENA(vf->vf_id), 0);
793 for (i = 0; i < I40E_MAX_VSI_QP; i++)
794 wr32(hw, I40E_VPLAN_QTABLE(i, vf->vf_id),
795 I40E_QUEUE_END_OF_LIST);
796 i40e_flush(hw);
797}
798
799/**
800 * i40e_free_vf_res
b40c82e6 801 * @vf: pointer to the VF info
805bd5bd 802 *
b40c82e6 803 * free VF resources
805bd5bd
MW		 804 **/
805static void i40e_free_vf_res(struct i40e_vf *vf)
806{
807 struct i40e_pf *pf = vf->pf;
fc18eaa0
MW		 808 struct i40e_hw *hw = &pf->hw;
809 u32 reg_idx, reg;
810 int i, msix_vf;
805bd5bd 811
beff3e9d
RK		 812 /* Start by disabling VF's configuration API to prevent the OS from
813 * accessing the VF's VSI after it's freed / invalidated.
814 */
6322e63c 815 clear_bit(I40E_VF_STATE_INIT, &vf->vf_states);
beff3e9d 816
805bd5bd 817 /* free vsi & disconnect it from the parent uplink */
fdf0e0bf
ASJ		 818 if (vf->lan_vsi_idx) {
819 i40e_vsi_release(pf->vsi[vf->lan_vsi_idx]);
820 vf->lan_vsi_idx = 0;
805bd5bd 821 vf->lan_vsi_id = 0;
13fd3f9c 822 vf->num_mac = 0;
805bd5bd 823 }
9347eb77
MW		 824 msix_vf = pf->hw.func_caps.num_msix_vectors_vf;
825
fc18eaa0
MW		 826 /* disable interrupts so the VF starts in a known state */
827 for (i = 0; i < msix_vf; i++) {
828 /* format is same for both registers */
829 if (0 == i)
830 reg_idx = I40E_VFINT_DYN_CTL0(vf->vf_id);
831 else
832 reg_idx = I40E_VFINT_DYN_CTLN(((msix_vf - 1) *
833 (vf->vf_id))
834 + (i - 1));
835 wr32(hw, reg_idx, I40E_VFINT_DYN_CTLN_CLEARPBA_MASK);
836 i40e_flush(hw);
837 }
805bd5bd 838
fc18eaa0
MW		 839 /* clear the irq settings */
840 for (i = 0; i < msix_vf; i++) {
841 /* format is same for both registers */
842 if (0 == i)
843 reg_idx = I40E_VPINT_LNKLST0(vf->vf_id);
844 else
845 reg_idx = I40E_VPINT_LNKLSTN(((msix_vf - 1) *
846 (vf->vf_id))
847 + (i - 1));
848 reg = (I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_MASK |
849 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK);
850 wr32(hw, reg_idx, reg);
851 i40e_flush(hw);
852 }
b564d62e 853 /* reset some of the state variables keeping track of the resources */
805bd5bd
MW		 854 vf->num_queue_pairs = 0;
855 vf->vf_states = 0;
856}
857
858/**
859 * i40e_alloc_vf_res
b40c82e6 860 * @vf: pointer to the VF info
805bd5bd 861 *
b40c82e6 862 * allocate VF resources
805bd5bd
MW		 863 **/
864static int i40e_alloc_vf_res(struct i40e_vf *vf)
865{
866 struct i40e_pf *pf = vf->pf;
867 int total_queue_pairs = 0;
868 int ret;
869
870 /* allocate hw vsi context & associated resources */
871 ret = i40e_alloc_vsi_res(vf, I40E_VSI_SRIOV);
872 if (ret)
873 goto error_alloc;
fdf0e0bf 874 total_queue_pairs += pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs;
692fb0a7
ASJ		 875
876 if (vf->trusted)
877 set_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps);
878 else
879 clear_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps);
805bd5bd
MW		 880
881 /* store the total qps number for the runtime
b40c82e6 882 * VF req validation
805bd5bd
MW		 883 */
884 vf->num_queue_pairs = total_queue_pairs;
885
b40c82e6 886 /* VF is now completely initialized */
6322e63c 887 set_bit(I40E_VF_STATE_INIT, &vf->vf_states);
805bd5bd
MW		 888
889error_alloc:
890 if (ret)
891 i40e_free_vf_res(vf);
892
893 return ret;
894}
895
fc18eaa0
MW		 896#define VF_DEVICE_STATUS 0xAA
897#define VF_TRANS_PENDING_MASK 0x20
898/**
899 * i40e_quiesce_vf_pci
b40c82e6 900 * @vf: pointer to the VF structure
fc18eaa0
MW		 901 *
902 * Wait for VF PCI transactions to be cleared after reset. Returns -EIO
903 * if the transactions never clear.
904 **/
905static int i40e_quiesce_vf_pci(struct i40e_vf *vf)
906{
907 struct i40e_pf *pf = vf->pf;
908 struct i40e_hw *hw = &pf->hw;
909 int vf_abs_id, i;
910 u32 reg;
911
b141d619 912 vf_abs_id = vf->vf_id + hw->func_caps.vf_base_id;
fc18eaa0
MW		 913
914 wr32(hw, I40E_PF_PCI_CIAA,
915 VF_DEVICE_STATUS | (vf_abs_id << I40E_PF_PCI_CIAA_VF_NUM_SHIFT));
916 for (i = 0; i < 100; i++) {
917 reg = rd32(hw, I40E_PF_PCI_CIAD);
918 if ((reg & VF_TRANS_PENDING_MASK) == 0)
919 return 0;
920 udelay(1);
921 }
922 return -EIO;
923}
924
5c3c48ac 925/**
9dc2e417 926 * i40e_trigger_vf_reset
b40c82e6 927 * @vf: pointer to the VF structure
5c3c48ac
JB		 928 * @flr: VFLR was issued or not
929 *
9dc2e417
JK		 930 * Trigger hardware to start a reset for a particular VF. Expects the caller
931 * to wait the proper amount of time to allow hardware to reset the VF before
932 * it cleans up and restores VF functionality.
5c3c48ac 933 **/
9dc2e417 934static void i40e_trigger_vf_reset(struct i40e_vf *vf, bool flr)
5c3c48ac 935{
5c3c48ac
JB		 936 struct i40e_pf *pf = vf->pf;
937 struct i40e_hw *hw = &pf->hw;
7e5a313e 938 u32 reg, reg_idx, bit_idx;
3ba9bcb4 939
5c3c48ac 940 /* warn the VF */
6322e63c 941 clear_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states);
5c3c48ac 942
beff3e9d
RK		 943 /* Disable VF's configuration API during reset. The flag is re-enabled
944 * in i40e_alloc_vf_res(), when it's safe again to access VF's VSI.
945 * It's normally disabled in i40e_free_vf_res(), but it's safer
946 * to do it earlier to give some time to finish to any VF config
947 * functions that may still be running at this point.
948 */
6322e63c 949 clear_bit(I40E_VF_STATE_INIT, &vf->vf_states);
beff3e9d 950
fc18eaa0
MW		 951 /* In the case of a VFLR, the HW has already reset the VF and we
952 * just need to clean up, so don't hit the VFRTRIG register.
5c3c48ac
JB		 953 */
954 if (!flr) {
b40c82e6 955 /* reset VF using VPGEN_VFRTRIG reg */
fc18eaa0
MW		 956 reg = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id));
957 reg |= I40E_VPGEN_VFRTRIG_VFSWR_MASK;
5c3c48ac
JB		 958 wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg);
959 i40e_flush(hw);
960 }
7369ca87
MW		 961 /* clear the VFLR bit in GLGEN_VFLRSTAT */
962 reg_idx = (hw->func_caps.vf_base_id + vf->vf_id) / 32;
963 bit_idx = (hw->func_caps.vf_base_id + vf->vf_id) % 32;
964 wr32(hw, I40E_GLGEN_VFLRSTAT(reg_idx), BIT(bit_idx));
30728c5b 965 i40e_flush(hw);
5c3c48ac 966
fc18eaa0
MW		 967 if (i40e_quiesce_vf_pci(vf))
968 dev_err(&pf->pdev->dev, "VF %d PCI transactions stuck\n",
969 vf->vf_id);
9dc2e417 970}
fc18eaa0 971
9dc2e417
JK		 972/**
973 * i40e_cleanup_reset_vf
974 * @vf: pointer to the VF structure
975 *
976 * Cleanup a VF after the hardware reset is finished. Expects the caller to
977 * have verified whether the reset is finished properly, and ensure the
978 * minimum amount of wait time has passed.
979 **/
980static void i40e_cleanup_reset_vf(struct i40e_vf *vf)
981{
982 struct i40e_pf *pf = vf->pf;
983 struct i40e_hw *hw = &pf->hw;
984 u32 reg;
fc18eaa0 985
beff3e9d 986 /* free VF resources to begin resetting the VSI state */
fc18eaa0 987 i40e_free_vf_res(vf);
beff3e9d
RK		 988
989 /* Enable hardware by clearing the reset bit in the VPGEN_VFRTRIG reg.
990 * By doing this we allow HW to access VF memory at any point. If we
991 * did it any sooner, HW could access memory while it was being freed
992 * in i40e_free_vf_res(), causing an IOMMU fault.
993 *
994 * On the other hand, this needs to be done ASAP, because the VF driver
995 * is waiting for this to happen and may report a timeout. It's
996 * harmless, but it gets logged into Guest OS kernel log, so best avoid
997 * it.
998 */
999 reg = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id));
1000 reg &= ~I40E_VPGEN_VFRTRIG_VFSWR_MASK;
1001 wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg);
1002
1003 /* reallocate VF resources to finish resetting the VSI state */
21be99ec 1004 if (!i40e_alloc_vf_res(vf)) {
e3219ce6 1005 int abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
21be99ec 1006 i40e_enable_vf_mappings(vf);
6322e63c
JK		 1007 set_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states);
1008 clear_bit(I40E_VF_STATE_DISABLED, &vf->vf_states);
6a23449a 1009 /* Do not notify the client during VF init */
1b484370
JK		 1010 if (test_and_clear_bit(I40E_VF_STATE_PRE_ENABLE,
1011 &vf->vf_states))
6a23449a 1012 i40e_notify_client_of_vf_reset(pf, abs_vf_id);
dc5b4e9f 1013 vf->num_vlan = 0;
21be99ec 1014 }
beff3e9d
RK		 1015
1016 /* Tell the VF driver the reset is done. This needs to be done only
1017 * after VF has been fully initialized, because the VF driver may
1018 * request resources immediately after setting this flag.
1019 */
fc18eaa0 1020 wr32(hw, I40E_VFGEN_RSTAT1(vf->vf_id), I40E_VFR_VFACTIVE);
9dc2e417
JK		 1021}
1022
1023/**
1024 * i40e_reset_vf
1025 * @vf: pointer to the VF structure
1026 * @flr: VFLR was issued or not
1027 *
1028 * reset the VF
1029 **/
1030void i40e_reset_vf(struct i40e_vf *vf, bool flr)
1031{
1032 struct i40e_pf *pf = vf->pf;
1033 struct i40e_hw *hw = &pf->hw;
1034 bool rsd = false;
1035 u32 reg;
1036 int i;
1037
1038 /* If VFs have been disabled, there is no need to reset */
0da36b97 1039 if (test_and_set_bit(__I40E_VF_DISABLE, pf->state))
9dc2e417
JK		 1040 return;
1041
1042 i40e_trigger_vf_reset(vf, flr);
1043
1044 /* poll VPGEN_VFRSTAT reg to make sure
1045 * that reset is complete
1046 */
1047 for (i = 0; i < 10; i++) {
1048 /* VF reset requires driver to first reset the VF and then
1049 * poll the status register to make sure that the reset
1050 * completed successfully. Due to internal HW FIFO flushes,
1051 * we must wait 10ms before the register will be valid.
1052 */
1053 usleep_range(10000, 20000);
1054 reg = rd32(hw, I40E_VPGEN_VFRSTAT(vf->vf_id));
1055 if (reg & I40E_VPGEN_VFRSTAT_VFRD_MASK) {
1056 rsd = true;
1057 break;
1058 }
1059 }
1060
1061 if (flr)
1062 usleep_range(10000, 20000);
1063
1064 if (!rsd)
1065 dev_err(&pf->pdev->dev, "VF reset check timeout on VF %d\n",
1066 vf->vf_id);
1067 usleep_range(10000, 20000);
1068
1069 /* On initial reset, we don't have any queues to disable */
1070 if (vf->lan_vsi_idx != 0)
1071 i40e_vsi_stop_rings(pf->vsi[vf->lan_vsi_idx]);
1072
1073 i40e_cleanup_reset_vf(vf);
7e5a313e 1074
5c3c48ac 1075 i40e_flush(hw);
0da36b97 1076 clear_bit(__I40E_VF_DISABLE, pf->state);
5c3c48ac 1077}
c354229f 1078
e4b433f4
JK		 1079/**
1080 * i40e_reset_all_vfs
1081 * @pf: pointer to the PF structure
1082 * @flr: VFLR was issued or not
1083 *
1084 * Reset all allocated VFs in one go. First, tell the hardware to reset each
1085 * VF, then do all the waiting in one chunk, and finally finish restoring each
1086 * VF after the wait. This is useful during PF routines which need to reset
1087 * all VFs, as otherwise it must perform these resets in a serialized fashion.
1088 **/
1089void i40e_reset_all_vfs(struct i40e_pf *pf, bool flr)
1090{
1091 struct i40e_hw *hw = &pf->hw;
1092 struct i40e_vf *vf;
1093 int i, v;
1094 u32 reg;
1095
1096 /* If we don't have any VFs, then there is nothing to reset */
1097 if (!pf->num_alloc_vfs)
1098 return;
1099
1100 /* If VFs have been disabled, there is no need to reset */
0da36b97 1101 if (test_and_set_bit(__I40E_VF_DISABLE, pf->state))
e4b433f4
JK		 1102 return;
1103
1104 /* Begin reset on all VFs at once */
1105 for (v = 0; v < pf->num_alloc_vfs; v++)
1106 i40e_trigger_vf_reset(&pf->vf[v], flr);
1107
1108 /* HW requires some time to make sure it can flush the FIFO for a VF
1109 * when it resets it. Poll the VPGEN_VFRSTAT register for each VF in
1110 * sequence to make sure that it has completed. We'll keep track of
1111 * the VFs using a simple iterator that increments once that VF has
1112 * finished resetting.
1113 */
1114 for (i = 0, v = 0; i < 10 && v < pf->num_alloc_vfs; i++) {
1115 usleep_range(10000, 20000);
1116
1117 /* Check each VF in sequence, beginning with the VF to fail
1118 * the previous check.
1119 */
1120 while (v < pf->num_alloc_vfs) {
1121 vf = &pf->vf[v];
1122 reg = rd32(hw, I40E_VPGEN_VFRSTAT(vf->vf_id));
1123 if (!(reg & I40E_VPGEN_VFRSTAT_VFRD_MASK))
1124 break;
1125
1126 /* If the current VF has finished resetting, move on
1127 * to the next VF in sequence.
1128 */
1129 v++;
1130 }
1131 }
1132
1133 if (flr)
1134 usleep_range(10000, 20000);
1135
1136 /* Display a warning if at least one VF didn't manage to reset in
1137 * time, but continue on with the operation.
1138 */
1139 if (v < pf->num_alloc_vfs)
1140 dev_err(&pf->pdev->dev, "VF reset check timeout on VF %d\n",
1141 pf->vf[v].vf_id);
1142 usleep_range(10000, 20000);
1143
1144 /* Begin disabling all the rings associated with VFs, but do not wait
1145 * between each VF.
1146 */
1147 for (v = 0; v < pf->num_alloc_vfs; v++) {
1148 /* On initial reset, we don't have any queues to disable */
1149 if (pf->vf[v].lan_vsi_idx == 0)
1150 continue;
1151
1152 i40e_vsi_stop_rings_no_wait(pf->vsi[pf->vf[v].lan_vsi_idx]);
1153 }
1154
1155 /* Now that we've notified HW to disable all of the VF rings, wait
1156 * until they finish.
1157 */
1158 for (v = 0; v < pf->num_alloc_vfs; v++) {
1159 /* On initial reset, we don't have any queues to disable */
1160 if (pf->vf[v].lan_vsi_idx == 0)
1161 continue;
1162
1163 i40e_vsi_wait_queues_disabled(pf->vsi[pf->vf[v].lan_vsi_idx]);
1164 }
1165
1166 /* Hw may need up to 50ms to finish disabling the RX queues. We
1167 * minimize the wait by delaying only once for all VFs.
1168 */
1169 mdelay(50);
1170
1171 /* Finish the reset on each VF */
1172 for (v = 0; v < pf->num_alloc_vfs; v++)
1173 i40e_cleanup_reset_vf(&pf->vf[v]);
1174
1175 i40e_flush(hw);
0da36b97 1176 clear_bit(__I40E_VF_DISABLE, pf->state);
e4b433f4
JK		 1177}
1178
5c3c48ac
JB		 1179/**
1180 * i40e_free_vfs
b40c82e6 1181 * @pf: pointer to the PF structure
5c3c48ac 1182 *
b40c82e6 1183 * free VF resources
5c3c48ac
JB		 1184 **/
1185void i40e_free_vfs(struct i40e_pf *pf)
1186{
f7414531
MW		 1187 struct i40e_hw *hw = &pf->hw;
1188 u32 reg_idx, bit_idx;
1189 int i, tmp, vf_id;
5c3c48ac
JB		 1190
1191 if (!pf->vf)
1192 return;
0da36b97 1193 while (test_and_set_bit(__I40E_VF_DISABLE, pf->state))
3ba9bcb4 1194 usleep_range(1000, 2000);
5c3c48ac 1195
e3219ce6 1196 i40e_notify_client_of_vf_enable(pf, 0);
707d088a
JK		 1197
1198 /* Amortize wait time by stopping all VFs at the same time */
1199 for (i = 0; i < pf->num_alloc_vfs; i++) {
1200 if (test_bit(I40E_VF_STATE_INIT, &pf->vf[i].vf_states))
1201 continue;
1202
1203 i40e_vsi_stop_rings_no_wait(pf->vsi[pf->vf[i].lan_vsi_idx]);
1204 }
1205
1206 for (i = 0; i < pf->num_alloc_vfs; i++) {
6322e63c 1207 if (test_bit(I40E_VF_STATE_INIT, &pf->vf[i].vf_states))
707d088a
JK		 1208 continue;
1209
1210 i40e_vsi_wait_queues_disabled(pf->vsi[pf->vf[i].lan_vsi_idx]);
1211 }
44434638 1212
6a9ddb36
MW		 1213 /* Disable IOV before freeing resources. This lets any VF drivers
1214 * running in the host get themselves cleaned up before we yank
1215 * the carpet out from underneath their feet.
1216 */
1217 if (!pci_vfs_assigned(pf->pdev))
1218 pci_disable_sriov(pf->pdev);
6d7b967d
MW		 1219 else
1220 dev_warn(&pf->pdev->dev, "VFs are assigned - not disabling SR-IOV\n");
6a9ddb36 1221
b40c82e6 1222 /* free up VF resources */
6c1b5bff
MW		 1223 tmp = pf->num_alloc_vfs;
1224 pf->num_alloc_vfs = 0;
1225 for (i = 0; i < tmp; i++) {
6322e63c 1226 if (test_bit(I40E_VF_STATE_INIT, &pf->vf[i].vf_states))
5c3c48ac
JB		 1227 i40e_free_vf_res(&pf->vf[i]);
1228 /* disable qp mappings */
1229 i40e_disable_vf_mappings(&pf->vf[i]);
1230 }
1231
1232 kfree(pf->vf);
1233 pf->vf = NULL;
5c3c48ac 1234
9e5634df
MW		 1235 /* This check is for when the driver is unloaded while VFs are
1236 * assigned. Setting the number of VFs to 0 through sysfs is caught
1237 * before this function ever gets called.
1238 */
c24817b6 1239 if (!pci_vfs_assigned(pf->pdev)) {
f7414531
MW		 1240 /* Acknowledge VFLR for all VFS. Without this, VFs will fail to
1241 * work correctly when SR-IOV gets re-enabled.
1242 */
1243 for (vf_id = 0; vf_id < tmp; vf_id++) {
1244 reg_idx = (hw->func_caps.vf_base_id + vf_id) / 32;
1245 bit_idx = (hw->func_caps.vf_base_id + vf_id) % 32;
41a1d04b 1246 wr32(hw, I40E_GLGEN_VFLRSTAT(reg_idx), BIT(bit_idx));
f7414531 1247 }
c354229f 1248 }
0da36b97 1249 clear_bit(__I40E_VF_DISABLE, pf->state);
5c3c48ac
JB		 1250}
1251
1252#ifdef CONFIG_PCI_IOV
1253/**
1254 * i40e_alloc_vfs
b40c82e6
JK		 1255 * @pf: pointer to the PF structure
1256 * @num_alloc_vfs: number of VFs to allocate
5c3c48ac 1257 *
b40c82e6 1258 * allocate VF resources
5c3c48ac 1259 **/
4aeec010 1260int i40e_alloc_vfs(struct i40e_pf *pf, u16 num_alloc_vfs)
5c3c48ac
JB		 1261{
1262 struct i40e_vf *vfs;
1263 int i, ret = 0;
1264
6c1b5bff 1265 /* Disable interrupt 0 so we don't try to handle the VFLR. */
2ef28cfb
MW		 1266 i40e_irq_dynamic_disable_icr0(pf);
1267
4aeec010
MW		 1268 /* Check to see if we're just allocating resources for extant VFs */
1269 if (pci_num_vf(pf->pdev) != num_alloc_vfs) {
1270 ret = pci_enable_sriov(pf->pdev, num_alloc_vfs);
1271 if (ret) {
de445b3d 1272 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
4aeec010
MW		 1273 pf->num_alloc_vfs = 0;
1274 goto err_iov;
1275 }
5c3c48ac 1276 }
5c3c48ac 1277 /* allocate memory */
cc6456af 1278 vfs = kcalloc(num_alloc_vfs, sizeof(struct i40e_vf), GFP_KERNEL);
5c3c48ac
JB		 1279 if (!vfs) {
1280 ret = -ENOMEM;
1281 goto err_alloc;
1282 }
c674d125 1283 pf->vf = vfs;
5c3c48ac
JB		 1284
1285 /* apply default profile */
1286 for (i = 0; i < num_alloc_vfs; i++) {
1287 vfs[i].pf = pf;
1288 vfs[i].parent_type = I40E_SWITCH_ELEMENT_TYPE_VEB;
1289 vfs[i].vf_id = i;
1290
1291 /* assign default capabilities */
1292 set_bit(I40E_VIRTCHNL_VF_CAP_L2, &vfs[i].vf_caps);
c674d125 1293 vfs[i].spoofchk = true;
1b484370
JK		 1294
1295 set_bit(I40E_VF_STATE_PRE_ENABLE, &vfs[i].vf_states);
5c3c48ac 1296
5c3c48ac 1297 }
5c3c48ac
JB		 1298 pf->num_alloc_vfs = num_alloc_vfs;
1299
1b484370
JK		 1300 /* VF resources get allocated during reset */
1301 i40e_reset_all_vfs(pf, false);
1302
6a23449a
AD		 1303 i40e_notify_client_of_vf_enable(pf, num_alloc_vfs);
1304
5c3c48ac
JB		 1305err_alloc:
1306 if (ret)
1307 i40e_free_vfs(pf);
1308err_iov:
6c1b5bff 1309 /* Re-enable interrupt 0. */
40d72a50 1310 i40e_irq_dynamic_enable_icr0(pf, false);
5c3c48ac
JB		 1311 return ret;
1312}
1313
1314#endif
1315/**
1316 * i40e_pci_sriov_enable
1317 * @pdev: pointer to a pci_dev structure
b40c82e6 1318 * @num_vfs: number of VFs to allocate
5c3c48ac
JB		 1319 *
1320 * Enable or change the number of VFs
1321 **/
1322static int i40e_pci_sriov_enable(struct pci_dev *pdev, int num_vfs)
1323{
1324#ifdef CONFIG_PCI_IOV
1325 struct i40e_pf *pf = pci_get_drvdata(pdev);
1326 int pre_existing_vfs = pci_num_vf(pdev);
1327 int err = 0;
1328
0da36b97 1329 if (test_bit(__I40E_TESTING, pf->state)) {
e17bc411
GR		 1330 dev_warn(&pdev->dev,
1331 "Cannot enable SR-IOV virtual functions while the device is undergoing diagnostic testing\n");
1332 err = -EPERM;
1333 goto err_out;
1334 }
1335
5c3c48ac
JB		 1336 if (pre_existing_vfs && pre_existing_vfs != num_vfs)
1337 i40e_free_vfs(pf);
1338 else if (pre_existing_vfs && pre_existing_vfs == num_vfs)
1339 goto out;
1340
1341 if (num_vfs > pf->num_req_vfs) {
96c8d073
MW		 1342 dev_warn(&pdev->dev, "Unable to enable %d VFs. Limited to %d VFs due to device resource constraints.\n",
1343 num_vfs, pf->num_req_vfs);
5c3c48ac
JB		 1344 err = -EPERM;
1345 goto err_out;
1346 }
1347
96c8d073 1348 dev_info(&pdev->dev, "Allocating %d VFs.\n", num_vfs);
5c3c48ac
JB		 1349 err = i40e_alloc_vfs(pf, num_vfs);
1350 if (err) {
1351 dev_warn(&pdev->dev, "Failed to enable SR-IOV: %d\n", err);
1352 goto err_out;
1353 }
1354
1355out:
1356 return num_vfs;
1357
1358err_out:
1359 return err;
1360#endif
1361 return 0;
1362}
1363
1364/**
1365 * i40e_pci_sriov_configure
1366 * @pdev: pointer to a pci_dev structure
b40c82e6 1367 * @num_vfs: number of VFs to allocate
5c3c48ac
JB		 1368 *
1369 * Enable or change the number of VFs. Called when the user updates the number
1370 * of VFs in sysfs.
1371 **/
1372int i40e_pci_sriov_configure(struct pci_dev *pdev, int num_vfs)
1373{
1374 struct i40e_pf *pf = pci_get_drvdata(pdev);
1375
fc60861e
ASJ		 1376 if (num_vfs) {
1377 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
1378 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
1379 i40e_do_reset_safe(pf,
1380 BIT_ULL(__I40E_PF_RESET_REQUESTED));
1381 }
5c3c48ac 1382 return i40e_pci_sriov_enable(pdev, num_vfs);
fc60861e 1383 }
5c3c48ac 1384
c24817b6 1385 if (!pci_vfs_assigned(pf->pdev)) {
9e5634df 1386 i40e_free_vfs(pf);
fc60861e
ASJ		 1387 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
1388 i40e_do_reset_safe(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
9e5634df
MW		 1389 } else {
1390 dev_warn(&pdev->dev, "Unable to free VFs because some are assigned to VMs.\n");
1391 return -EINVAL;
1392 }
5c3c48ac
JB		 1393 return 0;
1394}
1395
1396/***********************virtual channel routines******************/
1397
1398/**
1399 * i40e_vc_send_msg_to_vf
b40c82e6 1400 * @vf: pointer to the VF info
5c3c48ac
JB		 1401 * @v_opcode: virtual channel opcode
1402 * @v_retval: virtual channel return value
1403 * @msg: pointer to the msg buffer
1404 * @msglen: msg length
1405 *
b40c82e6 1406 * send msg to VF
5c3c48ac
JB		 1407 **/
1408static int i40e_vc_send_msg_to_vf(struct i40e_vf *vf, u32 v_opcode,
1409 u32 v_retval, u8 *msg, u16 msglen)
1410{
6e7b5bd3
ASJ		 1411 struct i40e_pf *pf;
1412 struct i40e_hw *hw;
1413 int abs_vf_id;
5c3c48ac
JB		 1414 i40e_status aq_ret;
1415
6e7b5bd3
ASJ		 1416 /* validate the request */
1417 if (!vf || vf->vf_id >= vf->pf->num_alloc_vfs)
1418 return -EINVAL;
1419
1420 pf = vf->pf;
1421 hw = &pf->hw;
1422 abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
1423
5c3c48ac
JB		 1424 /* single place to detect unsuccessful return values */
1425 if (v_retval) {
1426 vf->num_invalid_msgs++;
18b7af57
MW		 1427 dev_info(&pf->pdev->dev, "VF %d failed opcode %d, retval: %d\n",
1428 vf->vf_id, v_opcode, v_retval);
5c3c48ac
JB		 1429 if (vf->num_invalid_msgs >
1430 I40E_DEFAULT_NUM_INVALID_MSGS_ALLOWED) {
1431 dev_err(&pf->pdev->dev,
1432 "Number of invalid messages exceeded for VF %d\n",
1433 vf->vf_id);
1434 dev_err(&pf->pdev->dev, "Use PF Control I/F to enable the VF\n");
6322e63c 1435 set_bit(I40E_VF_STATE_DISABLED, &vf->vf_states);
5c3c48ac
JB		 1436 }
1437 } else {
1438 vf->num_valid_msgs++;
5d38c93e
JW		 1439 /* reset the invalid counter, if a valid message is received. */
1440 vf->num_invalid_msgs = 0;
5c3c48ac
JB		 1441 }
1442
f19efbb5 1443 aq_ret = i40e_aq_send_msg_to_vf(hw, abs_vf_id, v_opcode, v_retval,
7efa84b7 1444 msg, msglen, NULL);
5c3c48ac 1445 if (aq_ret) {
18b7af57
MW		 1446 dev_info(&pf->pdev->dev,
1447 "Unable to send the message to VF %d aq_err %d\n",
1448 vf->vf_id, pf->hw.aq.asq_last_status);
5c3c48ac
JB		 1449 return -EIO;
1450 }
1451
1452 return 0;
1453}
1454
1455/**
1456 * i40e_vc_send_resp_to_vf
b40c82e6 1457 * @vf: pointer to the VF info
5c3c48ac
JB		 1458 * @opcode: operation code
1459 * @retval: return value
1460 *
b40c82e6 1461 * send resp msg to VF
5c3c48ac
JB		 1462 **/
1463static int i40e_vc_send_resp_to_vf(struct i40e_vf *vf,
1464 enum i40e_virtchnl_ops opcode,
1465 i40e_status retval)
1466{
1467 return i40e_vc_send_msg_to_vf(vf, opcode, retval, NULL, 0);
1468}
1469
1470/**
1471 * i40e_vc_get_version_msg
b40c82e6 1472 * @vf: pointer to the VF info
5c3c48ac 1473 *
b40c82e6 1474 * called from the VF to request the API version used by the PF
5c3c48ac 1475 **/
f4ca1a22 1476static int i40e_vc_get_version_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac
JB		 1477{
1478 struct i40e_virtchnl_version_info info = {
1479 I40E_VIRTCHNL_VERSION_MAJOR, I40E_VIRTCHNL_VERSION_MINOR
1480 };
1481
f4ca1a22 1482 vf->vf_ver = *(struct i40e_virtchnl_version_info *)msg;
606a5488
MW		 1483 /* VFs running the 1.0 API expect to get 1.0 back or they will cry. */
1484 if (VF_IS_V10(vf))
1485 info.minor = I40E_VIRTCHNL_VERSION_MINOR_NO_VF_CAPS;
5c3c48ac
JB		 1486 return i40e_vc_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_VERSION,
1487 I40E_SUCCESS, (u8 *)&info,
1488 sizeof(struct
1489 i40e_virtchnl_version_info));
1490}
1491
1492/**
1493 * i40e_vc_get_vf_resources_msg
b40c82e6 1494 * @vf: pointer to the VF info
5c3c48ac
JB		 1495 * @msg: pointer to the msg buffer
1496 * @msglen: msg length
1497 *
b40c82e6 1498 * called from the VF to request its resources
5c3c48ac 1499 **/
f4ca1a22 1500static int i40e_vc_get_vf_resources_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac
JB		 1501{
1502 struct i40e_virtchnl_vf_resource *vfres = NULL;
1503 struct i40e_pf *pf = vf->pf;
1504 i40e_status aq_ret = 0;
1505 struct i40e_vsi *vsi;
5c3c48ac 1506 int num_vsis = 1;
442b25e4 1507 int len = 0;
5c3c48ac
JB		 1508 int ret;
1509
6322e63c 1510 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
5c3c48ac
JB		 1511 aq_ret = I40E_ERR_PARAM;
1512 goto err;
1513 }
1514
1515 len = (sizeof(struct i40e_virtchnl_vf_resource) +
1516 sizeof(struct i40e_virtchnl_vsi_resource) * num_vsis);
1517
1518 vfres = kzalloc(len, GFP_KERNEL);
1519 if (!vfres) {
1520 aq_ret = I40E_ERR_NO_MEMORY;
1521 len = 0;
1522 goto err;
1523 }
f4ca1a22
MW		 1524 if (VF_IS_V11(vf))
1525 vf->driver_caps = *(u32 *)msg;
1526 else
1527 vf->driver_caps = I40E_VIRTCHNL_VF_OFFLOAD_L2 |
1528 I40E_VIRTCHNL_VF_OFFLOAD_RSS_REG |
1529 I40E_VIRTCHNL_VF_OFFLOAD_VLAN;
5c3c48ac
JB		 1530
1531 vfres->vf_offload_flags = I40E_VIRTCHNL_VF_OFFLOAD_L2;
fdf0e0bf 1532 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac 1533 if (!vsi->info.pvid)
e25d00b8 1534 vfres->vf_offload_flags |= I40E_VIRTCHNL_VF_OFFLOAD_VLAN;
e3219ce6 1535
0ef2d5af 1536 if (i40e_vf_client_capable(pf, vf->vf_id) &&
e3219ce6
ASJ		 1537 (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_IWARP)) {
1538 vfres->vf_offload_flags |= I40E_VIRTCHNL_VF_OFFLOAD_IWARP;
6322e63c 1539 set_bit(I40E_VF_STATE_IWARPENA, &vf->vf_states);
e3219ce6
ASJ		 1540 }
1541
c4e1868c
MW		 1542 if (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_RSS_PF) {
1543 vfres->vf_offload_flags |= I40E_VIRTCHNL_VF_OFFLOAD_RSS_PF;
e25d00b8 1544 } else {
c4e1868c
MW		 1545 if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) &&
1546 (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_RSS_AQ))
1547 vfres->vf_offload_flags |=
1548 I40E_VIRTCHNL_VF_OFFLOAD_RSS_AQ;
1549 else
1550 vfres->vf_offload_flags |=
1551 I40E_VIRTCHNL_VF_OFFLOAD_RSS_REG;
e25d00b8 1552 }
1f012279 1553
3d0da5b7
ASJ		 1554 if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE) {
1555 if (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2)
1556 vfres->vf_offload_flags |=
1557 I40E_VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2;
1558 }
1559
bacd75cf
PB		 1560 if (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_ENCAP)
1561 vfres->vf_offload_flags |= I40E_VIRTCHNL_VF_OFFLOAD_ENCAP;
1562
1563 if ((pf->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE) &&
1564 (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_ENCAP_CSUM))
1565 vfres->vf_offload_flags |= I40E_VIRTCHNL_VF_OFFLOAD_ENCAP_CSUM;
1566
14c5f5d2
SN		 1567 if (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_RX_POLLING) {
1568 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
1569 dev_err(&pf->pdev->dev,
1570 "VF %d requested polling mode: this feature is supported only when the device is running in single function per port (SFP) mode\n",
1571 vf->vf_id);
1572 ret = I40E_ERR_PARAM;
1573 goto err;
1574 }
1f012279 1575 vfres->vf_offload_flags |= I40E_VIRTCHNL_VF_OFFLOAD_RX_POLLING;
14c5f5d2 1576 }
1f012279 1577
f6d83d13
ASJ		 1578 if (pf->flags & I40E_FLAG_WB_ON_ITR_CAPABLE) {
1579 if (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_WB_ON_ITR)
1580 vfres->vf_offload_flags |=
1581 I40E_VIRTCHNL_VF_OFFLOAD_WB_ON_ITR;
1582 }
1583
5c3c48ac
JB		 1584 vfres->num_vsis = num_vsis;
1585 vfres->num_queue_pairs = vf->num_queue_pairs;
1586 vfres->max_vectors = pf->hw.func_caps.num_msix_vectors_vf;
c4e1868c
MW		 1587 vfres->rss_key_size = I40E_HKEY_ARRAY_SIZE;
1588 vfres->rss_lut_size = I40E_VF_HLUT_ARRAY_SIZE;
1589
fdf0e0bf 1590 if (vf->lan_vsi_idx) {
442b25e4
MW		 1591 vfres->vsi_res[0].vsi_id = vf->lan_vsi_id;
1592 vfres->vsi_res[0].vsi_type = I40E_VSI_SRIOV;
1593 vfres->vsi_res[0].num_queue_pairs = vsi->alloc_queue_pairs;
f578f5f4 1594 /* VFs only use TC 0 */
442b25e4 1595 vfres->vsi_res[0].qset_handle
f578f5f4 1596 = le16_to_cpu(vsi->info.qs_handle[0]);
442b25e4 1597 ether_addr_copy(vfres->vsi_res[0].default_mac_addr,
6995b36c 1598 vf->default_lan_addr.addr);
5c3c48ac 1599 }
6322e63c 1600 set_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states);
5c3c48ac
JB		 1601
1602err:
b40c82e6 1603 /* send the response back to the VF */
5c3c48ac
JB		 1604 ret = i40e_vc_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_VF_RESOURCES,
1605 aq_ret, (u8 *)vfres, len);
1606
1607 kfree(vfres);
1608 return ret;
1609}
1610
1611/**
1612 * i40e_vc_reset_vf_msg
b40c82e6 1613 * @vf: pointer to the VF info
5c3c48ac
JB		 1614 * @msg: pointer to the msg buffer
1615 * @msglen: msg length
1616 *
b40c82e6
JK		 1617 * called from the VF to reset itself,
1618 * unlike other virtchnl messages, PF driver
1619 * doesn't send the response back to the VF
5c3c48ac 1620 **/
fc18eaa0 1621static void i40e_vc_reset_vf_msg(struct i40e_vf *vf)
5c3c48ac 1622{
6322e63c 1623 if (test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states))
fc18eaa0 1624 i40e_reset_vf(vf, false);
5c3c48ac
JB		 1625}
1626
5676a8b9
ASJ		 1627/**
1628 * i40e_getnum_vf_vsi_vlan_filters
1629 * @vsi: pointer to the vsi
1630 *
1631 * called to get the number of VLANs offloaded on this VF
1632 **/
1633static inline int i40e_getnum_vf_vsi_vlan_filters(struct i40e_vsi *vsi)
1634{
1635 struct i40e_mac_filter *f;
278e7d0b 1636 int num_vlans = 0, bkt;
5676a8b9 1637
278e7d0b 1638 hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) {
5676a8b9
ASJ		 1639 if (f->vlan >= 0 && f->vlan <= I40E_MAX_VLANID)
1640 num_vlans++;
1641 }
1642
1643 return num_vlans;
1644}
1645
5c3c48ac
JB		 1646/**
1647 * i40e_vc_config_promiscuous_mode_msg
b40c82e6 1648 * @vf: pointer to the VF info
5c3c48ac
JB		 1649 * @msg: pointer to the msg buffer
1650 * @msglen: msg length
1651 *
b40c82e6
JK		 1652 * called from the VF to configure the promiscuous mode of
1653 * VF vsis
5c3c48ac
JB		 1654 **/
1655static int i40e_vc_config_promiscuous_mode_msg(struct i40e_vf *vf,
1656 u8 *msg, u16 msglen)
1657{
1658 struct i40e_virtchnl_promisc_info *info =
1659 (struct i40e_virtchnl_promisc_info *)msg;
1660 struct i40e_pf *pf = vf->pf;
1661 struct i40e_hw *hw = &pf->hw;
5676a8b9
ASJ		 1662 struct i40e_mac_filter *f;
1663 i40e_status aq_ret = 0;
5c3c48ac 1664 bool allmulti = false;
5676a8b9
ASJ		 1665 struct i40e_vsi *vsi;
1666 bool alluni = false;
1667 int aq_err = 0;
278e7d0b 1668 int bkt;
5c3c48ac 1669
fdf0e0bf 1670 vsi = i40e_find_vsi_from_id(pf, info->vsi_id);
6322e63c 1671 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
d4a0658d
CW		 1672 !i40e_vc_isvalid_vsi_id(vf, info->vsi_id) ||
1673 !vsi) {
eee4172a
MW		 1674 aq_ret = I40E_ERR_PARAM;
1675 goto error_param;
1676 }
1677 if (!test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps)) {
5676a8b9 1678 dev_err(&pf->pdev->dev,
eee4172a 1679 "Unprivileged VF %d is attempting to configure promiscuous mode\n",
5676a8b9 1680 vf->vf_id);
eee4172a
MW		 1681 /* Lie to the VF on purpose. */
1682 aq_ret = 0;
5c3c48ac
JB		 1683 goto error_param;
1684 }
5676a8b9 1685 /* Multicast promiscuous handling*/
5c3c48ac
JB		 1686 if (info->flags & I40E_FLAG_VF_MULTICAST_PROMISC)
1687 allmulti = true;
5676a8b9
ASJ		 1688
1689 if (vf->port_vlan_id) {
1690 aq_ret = i40e_aq_set_vsi_mc_promisc_on_vlan(hw, vsi->seid,
1691 allmulti,
1692 vf->port_vlan_id,
1693 NULL);
1694 } else if (i40e_getnum_vf_vsi_vlan_filters(vsi)) {
278e7d0b 1695 hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) {
47d34839
ASJ		 1696 if (f->vlan < 0 || f->vlan > I40E_MAX_VLANID)
1697 continue;
1698 aq_ret = i40e_aq_set_vsi_mc_promisc_on_vlan(hw,
1699 vsi->seid,
1700 allmulti,
1701 f->vlan,
1702 NULL);
5676a8b9
ASJ		 1703 aq_err = pf->hw.aq.asq_last_status;
1704 if (aq_ret) {
1705 dev_err(&pf->pdev->dev,
1706 "Could not add VLAN %d to multicast promiscuous domain err %s aq_err %s\n",
1707 f->vlan,
1708 i40e_stat_str(&pf->hw, aq_ret),
1709 i40e_aq_str(&pf->hw, aq_err));
1710 break;
1711 }
1712 }
1713 } else {
1714 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(hw, vsi->seid,
1715 allmulti, NULL);
1716 aq_err = pf->hw.aq.asq_last_status;
1717 if (aq_ret) {
1718 dev_err(&pf->pdev->dev,
1719 "VF %d failed to set multicast promiscuous mode err %s aq_err %s\n",
1720 vf->vf_id,
1721 i40e_stat_str(&pf->hw, aq_ret),
1722 i40e_aq_str(&pf->hw, aq_err));
7429c0bd 1723 goto error_param;
5676a8b9
ASJ		 1724 }
1725 }
1726
1727 if (!aq_ret) {
1728 dev_info(&pf->pdev->dev,
1729 "VF %d successfully set multicast promiscuous mode\n",
1730 vf->vf_id);
1731 if (allmulti)
6322e63c 1732 set_bit(I40E_VF_STATE_MC_PROMISC, &vf->vf_states);
5676a8b9 1733 else
6322e63c 1734 clear_bit(I40E_VF_STATE_MC_PROMISC, &vf->vf_states);
5676a8b9
ASJ		 1735 }
1736
1737 if (info->flags & I40E_FLAG_VF_UNICAST_PROMISC)
1738 alluni = true;
1739 if (vf->port_vlan_id) {
1740 aq_ret = i40e_aq_set_vsi_uc_promisc_on_vlan(hw, vsi->seid,
1741 alluni,
1742 vf->port_vlan_id,
1743 NULL);
1744 } else if (i40e_getnum_vf_vsi_vlan_filters(vsi)) {
278e7d0b 1745 hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) {
5676a8b9 1746 aq_ret = 0;
ce927db4 1747 if (f->vlan >= 0 && f->vlan <= I40E_MAX_VLANID) {
5676a8b9
ASJ		 1748 aq_ret =
1749 i40e_aq_set_vsi_uc_promisc_on_vlan(hw,
1750 vsi->seid,
1751 alluni,
1752 f->vlan,
1753 NULL);
1754 aq_err = pf->hw.aq.asq_last_status;
ce927db4 1755 }
5676a8b9
ASJ		 1756 if (aq_ret)
1757 dev_err(&pf->pdev->dev,
1758 "Could not add VLAN %d to Unicast promiscuous domain err %s aq_err %s\n",
1759 f->vlan,
1760 i40e_stat_str(&pf->hw, aq_ret),
1761 i40e_aq_str(&pf->hw, aq_err));
1762 }
1763 } else {
1764 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(hw, vsi->seid,
b5569892
ASJ		 1765 allmulti, NULL,
1766 true);
5676a8b9 1767 aq_err = pf->hw.aq.asq_last_status;
7429c0bd 1768 if (aq_ret) {
5676a8b9
ASJ		 1769 dev_err(&pf->pdev->dev,
1770 "VF %d failed to set unicast promiscuous mode %8.8x err %s aq_err %s\n",
1771 vf->vf_id, info->flags,
1772 i40e_stat_str(&pf->hw, aq_ret),
1773 i40e_aq_str(&pf->hw, aq_err));
7429c0bd
JK		 1774 goto error_param;
1775 }
5676a8b9
ASJ		 1776 }
1777
5676a8b9
ASJ		 1778 if (!aq_ret) {
1779 dev_info(&pf->pdev->dev,
1780 "VF %d successfully set unicast promiscuous mode\n",
1781 vf->vf_id);
1782 if (alluni)
6322e63c 1783 set_bit(I40E_VF_STATE_UC_PROMISC, &vf->vf_states);
5676a8b9 1784 else
6322e63c 1785 clear_bit(I40E_VF_STATE_UC_PROMISC, &vf->vf_states);
5676a8b9 1786 }
5c3c48ac
JB		 1787
1788error_param:
b40c82e6 1789 /* send the response to the VF */
5c3c48ac
JB		 1790 return i40e_vc_send_resp_to_vf(vf,
1791 I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE,
1792 aq_ret);
1793}
1794
1795/**
1796 * i40e_vc_config_queues_msg
b40c82e6 1797 * @vf: pointer to the VF info
5c3c48ac
JB		 1798 * @msg: pointer to the msg buffer
1799 * @msglen: msg length
1800 *
b40c82e6 1801 * called from the VF to configure the rx/tx
5c3c48ac
JB		 1802 * queues
1803 **/
1804static int i40e_vc_config_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1805{
1806 struct i40e_virtchnl_vsi_queue_config_info *qci =
1807 (struct i40e_virtchnl_vsi_queue_config_info *)msg;
1808 struct i40e_virtchnl_queue_pair_info *qpi;
5f5e33b6 1809 struct i40e_pf *pf = vf->pf;
5c3c48ac
JB		 1810 u16 vsi_id, vsi_queue_id;
1811 i40e_status aq_ret = 0;
1812 int i;
1813
6322e63c 1814 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
5c3c48ac
JB		 1815 aq_ret = I40E_ERR_PARAM;
1816 goto error_param;
1817 }
1818
1819 vsi_id = qci->vsi_id;
1820 if (!i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1821 aq_ret = I40E_ERR_PARAM;
1822 goto error_param;
1823 }
1824 for (i = 0; i < qci->num_queue_pairs; i++) {
1825 qpi = &qci->qpair[i];
1826 vsi_queue_id = qpi->txq.queue_id;
1827 if ((qpi->txq.vsi_id != vsi_id) ||
1828 (qpi->rxq.vsi_id != vsi_id) ||
1829 (qpi->rxq.queue_id != vsi_queue_id) ||
1830 !i40e_vc_isvalid_queue_id(vf, vsi_id, vsi_queue_id)) {
1831 aq_ret = I40E_ERR_PARAM;
1832 goto error_param;
1833 }
1834
1835 if (i40e_config_vsi_rx_queue(vf, vsi_id, vsi_queue_id,
1836 &qpi->rxq) ||
1837 i40e_config_vsi_tx_queue(vf, vsi_id, vsi_queue_id,
1838 &qpi->txq)) {
1839 aq_ret = I40E_ERR_PARAM;
1840 goto error_param;
1841 }
1842 }
b40c82e6 1843 /* set vsi num_queue_pairs in use to num configured by VF */
fdf0e0bf 1844 pf->vsi[vf->lan_vsi_idx]->num_queue_pairs = qci->num_queue_pairs;
5c3c48ac
JB		 1845
1846error_param:
b40c82e6 1847 /* send the response to the VF */
5c3c48ac
JB		 1848 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES,
1849 aq_ret);
1850}
1851
1852/**
1853 * i40e_vc_config_irq_map_msg
b40c82e6 1854 * @vf: pointer to the VF info
5c3c48ac
JB		 1855 * @msg: pointer to the msg buffer
1856 * @msglen: msg length
1857 *
b40c82e6 1858 * called from the VF to configure the irq to
5c3c48ac
JB		 1859 * queue map
1860 **/
1861static int i40e_vc_config_irq_map_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1862{
1863 struct i40e_virtchnl_irq_map_info *irqmap_info =
1864 (struct i40e_virtchnl_irq_map_info *)msg;
1865 struct i40e_virtchnl_vector_map *map;
1866 u16 vsi_id, vsi_queue_id, vector_id;
1867 i40e_status aq_ret = 0;
1868 unsigned long tempmap;
1869 int i;
1870
6322e63c 1871 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
5c3c48ac
JB		 1872 aq_ret = I40E_ERR_PARAM;
1873 goto error_param;
1874 }
1875
1876 for (i = 0; i < irqmap_info->num_vectors; i++) {
1877 map = &irqmap_info->vecmap[i];
1878
1879 vector_id = map->vector_id;
1880 vsi_id = map->vsi_id;
1881 /* validate msg params */
1882 if (!i40e_vc_isvalid_vector_id(vf, vector_id) ||
1883 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1884 aq_ret = I40E_ERR_PARAM;
1885 goto error_param;
1886 }
1887
1888 /* lookout for the invalid queue index */
1889 tempmap = map->rxq_map;
4836650b 1890 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
5c3c48ac
JB		 1891 if (!i40e_vc_isvalid_queue_id(vf, vsi_id,
1892 vsi_queue_id)) {
1893 aq_ret = I40E_ERR_PARAM;
1894 goto error_param;
1895 }
5c3c48ac
JB		 1896 }
1897
1898 tempmap = map->txq_map;
4836650b 1899 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
5c3c48ac
JB		 1900 if (!i40e_vc_isvalid_queue_id(vf, vsi_id,
1901 vsi_queue_id)) {
1902 aq_ret = I40E_ERR_PARAM;
1903 goto error_param;
1904 }
5c3c48ac
JB		 1905 }
1906
1907 i40e_config_irq_link_list(vf, vsi_id, map);
1908 }
1909error_param:
b40c82e6 1910 /* send the response to the VF */
5c3c48ac
JB		 1911 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP,
1912 aq_ret);
1913}
1914
1915/**
1916 * i40e_vc_enable_queues_msg
b40c82e6 1917 * @vf: pointer to the VF info
5c3c48ac
JB		 1918 * @msg: pointer to the msg buffer
1919 * @msglen: msg length
1920 *
b40c82e6 1921 * called from the VF to enable all or specific queue(s)
5c3c48ac
JB		 1922 **/
1923static int i40e_vc_enable_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1924{
1925 struct i40e_virtchnl_queue_select *vqs =
1926 (struct i40e_virtchnl_queue_select *)msg;
1927 struct i40e_pf *pf = vf->pf;
1928 u16 vsi_id = vqs->vsi_id;
1929 i40e_status aq_ret = 0;
5c3c48ac 1930
6322e63c 1931 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
5c3c48ac
JB		 1932 aq_ret = I40E_ERR_PARAM;
1933 goto error_param;
1934 }
1935
1936 if (!i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1937 aq_ret = I40E_ERR_PARAM;
1938 goto error_param;
1939 }
1940
1941 if ((0 == vqs->rx_queues) && (0 == vqs->tx_queues)) {
1942 aq_ret = I40E_ERR_PARAM;
1943 goto error_param;
1944 }
fdf0e0bf 1945
3aa7b74d 1946 if (i40e_vsi_start_rings(pf->vsi[vf->lan_vsi_idx]))
88f6563d 1947 aq_ret = I40E_ERR_TIMEOUT;
5c3c48ac 1948error_param:
b40c82e6 1949 /* send the response to the VF */
5c3c48ac
JB		 1950 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_ENABLE_QUEUES,
1951 aq_ret);
1952}
1953
1954/**
1955 * i40e_vc_disable_queues_msg
b40c82e6 1956 * @vf: pointer to the VF info
5c3c48ac
JB		 1957 * @msg: pointer to the msg buffer
1958 * @msglen: msg length
1959 *
b40c82e6 1960 * called from the VF to disable all or specific
5c3c48ac
JB		 1961 * queue(s)
1962 **/
1963static int i40e_vc_disable_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1964{
1965 struct i40e_virtchnl_queue_select *vqs =
1966 (struct i40e_virtchnl_queue_select *)msg;
1967 struct i40e_pf *pf = vf->pf;
5c3c48ac 1968 i40e_status aq_ret = 0;
5c3c48ac 1969
6322e63c 1970 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
5c3c48ac
JB		 1971 aq_ret = I40E_ERR_PARAM;
1972 goto error_param;
1973 }
1974
1975 if (!i40e_vc_isvalid_vsi_id(vf, vqs->vsi_id)) {
1976 aq_ret = I40E_ERR_PARAM;
1977 goto error_param;
1978 }
1979
1980 if ((0 == vqs->rx_queues) && (0 == vqs->tx_queues)) {
1981 aq_ret = I40E_ERR_PARAM;
1982 goto error_param;
1983 }
fdf0e0bf 1984
3aa7b74d 1985 i40e_vsi_stop_rings(pf->vsi[vf->lan_vsi_idx]);
5c3c48ac
JB		 1986
1987error_param:
b40c82e6 1988 /* send the response to the VF */
5c3c48ac
JB		 1989 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_DISABLE_QUEUES,
1990 aq_ret);
1991}
1992
1993/**
1994 * i40e_vc_get_stats_msg
b40c82e6 1995 * @vf: pointer to the VF info
5c3c48ac
JB		 1996 * @msg: pointer to the msg buffer
1997 * @msglen: msg length
1998 *
b40c82e6 1999 * called from the VF to get vsi stats
5c3c48ac
JB		 2000 **/
2001static int i40e_vc_get_stats_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2002{
2003 struct i40e_virtchnl_queue_select *vqs =
2004 (struct i40e_virtchnl_queue_select *)msg;
2005 struct i40e_pf *pf = vf->pf;
2006 struct i40e_eth_stats stats;
2007 i40e_status aq_ret = 0;
2008 struct i40e_vsi *vsi;
2009
2010 memset(&stats, 0, sizeof(struct i40e_eth_stats));
2011
6322e63c 2012 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
5c3c48ac
JB		 2013 aq_ret = I40E_ERR_PARAM;
2014 goto error_param;
2015 }
2016
2017 if (!i40e_vc_isvalid_vsi_id(vf, vqs->vsi_id)) {
2018 aq_ret = I40E_ERR_PARAM;
2019 goto error_param;
2020 }
2021
fdf0e0bf 2022 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac
JB		 2023 if (!vsi) {
2024 aq_ret = I40E_ERR_PARAM;
2025 goto error_param;
2026 }
2027 i40e_update_eth_stats(vsi);
5a9769c8 2028 stats = vsi->eth_stats;
5c3c48ac
JB		 2029
2030error_param:
b40c82e6 2031 /* send the response back to the VF */
5c3c48ac
JB		 2032 return i40e_vc_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_STATS, aq_ret,
2033 (u8 *)&stats, sizeof(stats));
2034}
2035
5f527ba9 2036/* If the VF is not trusted restrict the number of MAC/VLAN it can program */
4dbc5661 2037#define I40E_VC_MAX_MAC_ADDR_PER_VF 12
5f527ba9
ASJ		 2038#define I40E_VC_MAX_VLAN_PER_VF 8
2039
f657a6e1
GR		 2040/**
2041 * i40e_check_vf_permission
b40c82e6 2042 * @vf: pointer to the VF info
f657a6e1
GR		 2043 * @macaddr: pointer to the MAC Address being checked
2044 *
2045 * Check if the VF has permission to add or delete unicast MAC address
2046 * filters and return error code -EPERM if not. Then check if the
2047 * address filter requested is broadcast or zero and if so return
2048 * an invalid MAC address error code.
2049 **/
2050static inline int i40e_check_vf_permission(struct i40e_vf *vf, u8 *macaddr)
2051{
2052 struct i40e_pf *pf = vf->pf;
2053 int ret = 0;
2054
2055 if (is_broadcast_ether_addr(macaddr) ||
2056 is_zero_ether_addr(macaddr)) {
2057 dev_err(&pf->pdev->dev, "invalid VF MAC addr %pM\n", macaddr);
2058 ret = I40E_ERR_INVALID_MAC_ADDR;
5017c2a8 2059 } else if (vf->pf_set_mac && !is_multicast_ether_addr(macaddr) &&
692fb0a7 2060 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) &&
5017c2a8 2061 !ether_addr_equal(macaddr, vf->default_lan_addr.addr)) {
f657a6e1
GR		 2062 /* If the host VMM administrator has set the VF MAC address
2063 * administratively via the ndo_set_vf_mac command then deny
2064 * permission to the VF to add or delete unicast MAC addresses.
692fb0a7 2065 * Unless the VF is privileged and then it can do whatever.
5017c2a8
GR		 2066 * The VF may request to set the MAC address filter already
2067 * assigned to it so do not return an error in that case.
f657a6e1
GR		 2068 */
2069 dev_err(&pf->pdev->dev,
692fb0a7 2070 "VF attempting to override administratively set MAC address, reload the VF driver to resume normal operation\n");
f657a6e1 2071 ret = -EPERM;
5f527ba9
ASJ		 2072 } else if ((vf->num_mac >= I40E_VC_MAX_MAC_ADDR_PER_VF) &&
2073 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps)) {
2074 dev_err(&pf->pdev->dev,
2075 "VF is not trusted, switch the VF to trusted to add more functionality\n");
2076 ret = -EPERM;
f657a6e1
GR		 2077 }
2078 return ret;
2079}
2080
5c3c48ac
JB		 2081/**
2082 * i40e_vc_add_mac_addr_msg
b40c82e6 2083 * @vf: pointer to the VF info
5c3c48ac
JB		 2084 * @msg: pointer to the msg buffer
2085 * @msglen: msg length
2086 *
2087 * add guest mac address filter
2088 **/
2089static int i40e_vc_add_mac_addr_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2090{
2091 struct i40e_virtchnl_ether_addr_list *al =
2092 (struct i40e_virtchnl_ether_addr_list *)msg;
2093 struct i40e_pf *pf = vf->pf;
2094 struct i40e_vsi *vsi = NULL;
2095 u16 vsi_id = al->vsi_id;
f657a6e1 2096 i40e_status ret = 0;
5c3c48ac
JB		 2097 int i;
2098
6322e63c 2099 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
5c3c48ac 2100 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
f657a6e1 2101 ret = I40E_ERR_PARAM;
5c3c48ac
JB		 2102 goto error_param;
2103 }
2104
2105 for (i = 0; i < al->num_elements; i++) {
f657a6e1
GR		 2106 ret = i40e_check_vf_permission(vf, al->list[i].addr);
2107 if (ret)
5c3c48ac 2108 goto error_param;
5c3c48ac 2109 }
fdf0e0bf 2110 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac 2111
21659035
KP		 2112 /* Lock once, because all function inside for loop accesses VSI's
2113 * MAC filter list which needs to be protected using same lock.
2114 */
278e7d0b 2115 spin_lock_bh(&vsi->mac_filter_hash_lock);
21659035 2116
5c3c48ac
JB		 2117 /* add new addresses to the list */
2118 for (i = 0; i < al->num_elements; i++) {
2119 struct i40e_mac_filter *f;
2120
1bc87e80 2121 f = i40e_find_mac(vsi, al->list[i].addr);
7aaf9536 2122 if (!f)
feffdbe4 2123 f = i40e_add_mac_filter(vsi, al->list[i].addr);
5c3c48ac
JB		 2124
2125 if (!f) {
2126 dev_err(&pf->pdev->dev,
8d8f2295
MW		 2127 "Unable to add MAC filter %pM for VF %d\n",
2128 al->list[i].addr, vf->vf_id);
f657a6e1 2129 ret = I40E_ERR_PARAM;
278e7d0b 2130 spin_unlock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac 2131 goto error_param;
5f527ba9
ASJ		 2132 } else {
2133 vf->num_mac++;
5c3c48ac
JB		 2134 }
2135 }
278e7d0b 2136 spin_unlock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac
JB		 2137
2138 /* program the updated filter list */
ea02e90b
MW		 2139 ret = i40e_sync_vsi_filters(vsi);
2140 if (ret)
2141 dev_err(&pf->pdev->dev, "Unable to program VF %d MAC filters, error %d\n",
2142 vf->vf_id, ret);
5c3c48ac
JB		 2143
2144error_param:
b40c82e6 2145 /* send the response to the VF */
5c3c48ac 2146 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS,
f657a6e1 2147 ret);
5c3c48ac
JB		 2148}
2149
2150/**
2151 * i40e_vc_del_mac_addr_msg
b40c82e6 2152 * @vf: pointer to the VF info
5c3c48ac
JB		 2153 * @msg: pointer to the msg buffer
2154 * @msglen: msg length
2155 *
2156 * remove guest mac address filter
2157 **/
2158static int i40e_vc_del_mac_addr_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2159{
2160 struct i40e_virtchnl_ether_addr_list *al =
2161 (struct i40e_virtchnl_ether_addr_list *)msg;
2162 struct i40e_pf *pf = vf->pf;
2163 struct i40e_vsi *vsi = NULL;
2164 u16 vsi_id = al->vsi_id;
f657a6e1 2165 i40e_status ret = 0;
5c3c48ac
JB		 2166 int i;
2167
6322e63c 2168 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
5c3c48ac 2169 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
f657a6e1 2170 ret = I40E_ERR_PARAM;
5c3c48ac
JB		 2171 goto error_param;
2172 }
f657a6e1
GR		 2173
2174 for (i = 0; i < al->num_elements; i++) {
700bbf6c
MW		 2175 if (is_broadcast_ether_addr(al->list[i].addr) ||
2176 is_zero_ether_addr(al->list[i].addr)) {
8d8f2295
MW		 2177 dev_err(&pf->pdev->dev, "Invalid MAC addr %pM for VF %d\n",
2178 al->list[i].addr, vf->vf_id);
700bbf6c 2179 ret = I40E_ERR_INVALID_MAC_ADDR;
f657a6e1 2180 goto error_param;
700bbf6c 2181 }
f657a6e1 2182 }
fdf0e0bf 2183 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac 2184
278e7d0b 2185 spin_lock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac
JB		 2186 /* delete addresses from the list */
2187 for (i = 0; i < al->num_elements; i++)
feffdbe4 2188 if (i40e_del_mac_filter(vsi, al->list[i].addr)) {
b36e9ab5 2189 ret = I40E_ERR_INVALID_MAC_ADDR;
278e7d0b 2190 spin_unlock_bh(&vsi->mac_filter_hash_lock);
b36e9ab5 2191 goto error_param;
5f527ba9
ASJ		 2192 } else {
2193 vf->num_mac--;
b36e9ab5
MW		 2194 }
2195
278e7d0b 2196 spin_unlock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac
JB		 2197
2198 /* program the updated filter list */
ea02e90b
MW		 2199 ret = i40e_sync_vsi_filters(vsi);
2200 if (ret)
2201 dev_err(&pf->pdev->dev, "Unable to program VF %d MAC filters, error %d\n",
2202 vf->vf_id, ret);
5c3c48ac
JB		 2203
2204error_param:
b40c82e6 2205 /* send the response to the VF */
5c3c48ac 2206 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS,
f657a6e1 2207 ret);
5c3c48ac
JB		 2208}
2209
2210/**
2211 * i40e_vc_add_vlan_msg
b40c82e6 2212 * @vf: pointer to the VF info
5c3c48ac
JB		 2213 * @msg: pointer to the msg buffer
2214 * @msglen: msg length
2215 *
2216 * program guest vlan id
2217 **/
2218static int i40e_vc_add_vlan_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2219{
2220 struct i40e_virtchnl_vlan_filter_list *vfl =
2221 (struct i40e_virtchnl_vlan_filter_list *)msg;
2222 struct i40e_pf *pf = vf->pf;
2223 struct i40e_vsi *vsi = NULL;
2224 u16 vsi_id = vfl->vsi_id;
2225 i40e_status aq_ret = 0;
2226 int i;
2227
5f527ba9
ASJ		 2228 if ((vf->num_vlan >= I40E_VC_MAX_VLAN_PER_VF) &&
2229 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps)) {
2230 dev_err(&pf->pdev->dev,
2231 "VF is not trusted, switch the VF to trusted to add more VLAN addresses\n");
2232 goto error_param;
2233 }
6322e63c 2234 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
5c3c48ac
JB		 2235 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
2236 aq_ret = I40E_ERR_PARAM;
2237 goto error_param;
2238 }
2239
2240 for (i = 0; i < vfl->num_elements; i++) {
2241 if (vfl->vlan_id[i] > I40E_MAX_VLANID) {
2242 aq_ret = I40E_ERR_PARAM;
2243 dev_err(&pf->pdev->dev,
2244 "invalid VF VLAN id %d\n", vfl->vlan_id[i]);
2245 goto error_param;
2246 }
2247 }
fdf0e0bf 2248 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac
JB		 2249 if (vsi->info.pvid) {
2250 aq_ret = I40E_ERR_PARAM;
2251 goto error_param;
2252 }
2253
2254 i40e_vlan_stripping_enable(vsi);
2255 for (i = 0; i < vfl->num_elements; i++) {
2256 /* add new VLAN filter */
2257 int ret = i40e_vsi_add_vlan(vsi, vfl->vlan_id[i]);
5f527ba9
ASJ		 2258 if (!ret)
2259 vf->num_vlan++;
6995b36c 2260
6322e63c 2261 if (test_bit(I40E_VF_STATE_UC_PROMISC, &vf->vf_states))
5676a8b9
ASJ		 2262 i40e_aq_set_vsi_uc_promisc_on_vlan(&pf->hw, vsi->seid,
2263 true,
2264 vfl->vlan_id[i],
2265 NULL);
6322e63c 2266 if (test_bit(I40E_VF_STATE_MC_PROMISC, &vf->vf_states))
5676a8b9
ASJ		 2267 i40e_aq_set_vsi_mc_promisc_on_vlan(&pf->hw, vsi->seid,
2268 true,
2269 vfl->vlan_id[i],
2270 NULL);
2271
5c3c48ac
JB		 2272 if (ret)
2273 dev_err(&pf->pdev->dev,
8d8f2295
MW		 2274 "Unable to add VLAN filter %d for VF %d, error %d\n",
2275 vfl->vlan_id[i], vf->vf_id, ret);
5c3c48ac
JB		 2276 }
2277
2278error_param:
b40c82e6 2279 /* send the response to the VF */
5c3c48ac
JB		 2280 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_ADD_VLAN, aq_ret);
2281}
2282
2283/**
2284 * i40e_vc_remove_vlan_msg
b40c82e6 2285 * @vf: pointer to the VF info
5c3c48ac
JB		 2286 * @msg: pointer to the msg buffer
2287 * @msglen: msg length
2288 *
2289 * remove programmed guest vlan id
2290 **/
2291static int i40e_vc_remove_vlan_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2292{
2293 struct i40e_virtchnl_vlan_filter_list *vfl =
2294 (struct i40e_virtchnl_vlan_filter_list *)msg;
2295 struct i40e_pf *pf = vf->pf;
2296 struct i40e_vsi *vsi = NULL;
2297 u16 vsi_id = vfl->vsi_id;
2298 i40e_status aq_ret = 0;
2299 int i;
2300
6322e63c 2301 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
5c3c48ac
JB		 2302 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
2303 aq_ret = I40E_ERR_PARAM;
2304 goto error_param;
2305 }
2306
2307 for (i = 0; i < vfl->num_elements; i++) {
2308 if (vfl->vlan_id[i] > I40E_MAX_VLANID) {
2309 aq_ret = I40E_ERR_PARAM;
2310 goto error_param;
2311 }
2312 }
2313
fdf0e0bf 2314 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac
JB		 2315 if (vsi->info.pvid) {
2316 aq_ret = I40E_ERR_PARAM;
2317 goto error_param;
2318 }
2319
2320 for (i = 0; i < vfl->num_elements; i++) {
3aa7b74d
FS		 2321 i40e_vsi_kill_vlan(vsi, vfl->vlan_id[i]);
2322 vf->num_vlan--;
6995b36c 2323
6322e63c 2324 if (test_bit(I40E_VF_STATE_UC_PROMISC, &vf->vf_states))
5676a8b9
ASJ		 2325 i40e_aq_set_vsi_uc_promisc_on_vlan(&pf->hw, vsi->seid,
2326 false,
2327 vfl->vlan_id[i],
2328 NULL);
6322e63c 2329 if (test_bit(I40E_VF_STATE_MC_PROMISC, &vf->vf_states))
5676a8b9
ASJ		 2330 i40e_aq_set_vsi_mc_promisc_on_vlan(&pf->hw, vsi->seid,
2331 false,
2332 vfl->vlan_id[i],
2333 NULL);
5c3c48ac
JB		 2334 }
2335
2336error_param:
b40c82e6 2337 /* send the response to the VF */
5c3c48ac
JB		 2338 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_DEL_VLAN, aq_ret);
2339}
2340
e3219ce6
ASJ		 2341/**
2342 * i40e_vc_iwarp_msg
2343 * @vf: pointer to the VF info
2344 * @msg: pointer to the msg buffer
2345 * @msglen: msg length
2346 *
2347 * called from the VF for the iwarp msgs
2348 **/
2349static int i40e_vc_iwarp_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2350{
2351 struct i40e_pf *pf = vf->pf;
2352 int abs_vf_id = vf->vf_id + pf->hw.func_caps.vf_base_id;
2353 i40e_status aq_ret = 0;
2354
6322e63c
JK		 2355 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
2356 !test_bit(I40E_VF_STATE_IWARPENA, &vf->vf_states)) {
e3219ce6
ASJ		 2357 aq_ret = I40E_ERR_PARAM;
2358 goto error_param;
2359 }
2360
2361 i40e_notify_client_of_vf_msg(pf->vsi[pf->lan_vsi], abs_vf_id,
2362 msg, msglen);
2363
2364error_param:
2365 /* send the response to the VF */
2366 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_IWARP,
2367 aq_ret);
2368}
2369
2370/**
2371 * i40e_vc_iwarp_qvmap_msg
2372 * @vf: pointer to the VF info
2373 * @msg: pointer to the msg buffer
2374 * @msglen: msg length
2375 * @config: config qvmap or release it
2376 *
2377 * called from the VF for the iwarp msgs
2378 **/
2379static int i40e_vc_iwarp_qvmap_msg(struct i40e_vf *vf, u8 *msg, u16 msglen,
2380 bool config)
2381{
2382 struct i40e_virtchnl_iwarp_qvlist_info *qvlist_info =
2383 (struct i40e_virtchnl_iwarp_qvlist_info *)msg;
2384 i40e_status aq_ret = 0;
2385
6322e63c
JK		 2386 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
2387 !test_bit(I40E_VF_STATE_IWARPENA, &vf->vf_states)) {
e3219ce6
ASJ		 2388 aq_ret = I40E_ERR_PARAM;
2389 goto error_param;
2390 }
2391
2392 if (config) {
2393 if (i40e_config_iwarp_qvlist(vf, qvlist_info))
2394 aq_ret = I40E_ERR_PARAM;
2395 } else {
2396 i40e_release_iwarp_qvlist(vf);
2397 }
2398
2399error_param:
2400 /* send the response to the VF */
2401 return i40e_vc_send_resp_to_vf(vf,
8d9d927f
MW		 2402 config ? I40E_VIRTCHNL_OP_CONFIG_IWARP_IRQ_MAP :
2403 I40E_VIRTCHNL_OP_RELEASE_IWARP_IRQ_MAP,
e3219ce6
ASJ		 2404 aq_ret);
2405}
2406
c4e1868c
MW		 2407/**
2408 * i40e_vc_config_rss_key
2409 * @vf: pointer to the VF info
2410 * @msg: pointer to the msg buffer
2411 * @msglen: msg length
2412 *
2413 * Configure the VF's RSS key
2414 **/
2415static int i40e_vc_config_rss_key(struct i40e_vf *vf, u8 *msg, u16 msglen)
2416{
2417 struct i40e_virtchnl_rss_key *vrk =
2418 (struct i40e_virtchnl_rss_key *)msg;
2419 struct i40e_pf *pf = vf->pf;
2420 struct i40e_vsi *vsi = NULL;
2421 u16 vsi_id = vrk->vsi_id;
2422 i40e_status aq_ret = 0;
2423
6322e63c 2424 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
c4e1868c
MW		 2425 !i40e_vc_isvalid_vsi_id(vf, vsi_id) ||
2426 (vrk->key_len != I40E_HKEY_ARRAY_SIZE)) {
2427 aq_ret = I40E_ERR_PARAM;
2428 goto err;
2429 }
2430
2431 vsi = pf->vsi[vf->lan_vsi_idx];
2432 aq_ret = i40e_config_rss(vsi, vrk->key, NULL, 0);
2433err:
2434 /* send the response to the VF */
2435 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_RSS_KEY,
2436 aq_ret);
2437}
2438
2439/**
2440 * i40e_vc_config_rss_lut
2441 * @vf: pointer to the VF info
2442 * @msg: pointer to the msg buffer
2443 * @msglen: msg length
2444 *
2445 * Configure the VF's RSS LUT
2446 **/
2447static int i40e_vc_config_rss_lut(struct i40e_vf *vf, u8 *msg, u16 msglen)
2448{
2449 struct i40e_virtchnl_rss_lut *vrl =
2450 (struct i40e_virtchnl_rss_lut *)msg;
2451 struct i40e_pf *pf = vf->pf;
2452 struct i40e_vsi *vsi = NULL;
2453 u16 vsi_id = vrl->vsi_id;
2454 i40e_status aq_ret = 0;
2455
6322e63c 2456 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states) ||
c4e1868c
MW		 2457 !i40e_vc_isvalid_vsi_id(vf, vsi_id) ||
2458 (vrl->lut_entries != I40E_VF_HLUT_ARRAY_SIZE)) {
2459 aq_ret = I40E_ERR_PARAM;
2460 goto err;
2461 }
2462
2463 vsi = pf->vsi[vf->lan_vsi_idx];
2464 aq_ret = i40e_config_rss(vsi, NULL, vrl->lut, I40E_VF_HLUT_ARRAY_SIZE);
2465 /* send the response to the VF */
2466err:
2467 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_RSS_LUT,
2468 aq_ret);
2469}
2470
2471/**
2472 * i40e_vc_get_rss_hena
2473 * @vf: pointer to the VF info
2474 * @msg: pointer to the msg buffer
2475 * @msglen: msg length
2476 *
2477 * Return the RSS HENA bits allowed by the hardware
2478 **/
2479static int i40e_vc_get_rss_hena(struct i40e_vf *vf, u8 *msg, u16 msglen)
2480{
2481 struct i40e_virtchnl_rss_hena *vrh = NULL;
2482 struct i40e_pf *pf = vf->pf;
2483 i40e_status aq_ret = 0;
2484 int len = 0;
2485
6322e63c 2486 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
c4e1868c
MW		 2487 aq_ret = I40E_ERR_PARAM;
2488 goto err;
2489 }
2490 len = sizeof(struct i40e_virtchnl_rss_hena);
2491
2492 vrh = kzalloc(len, GFP_KERNEL);
2493 if (!vrh) {
2494 aq_ret = I40E_ERR_NO_MEMORY;
2495 len = 0;
2496 goto err;
2497 }
2498 vrh->hena = i40e_pf_get_default_rss_hena(pf);
2499err:
2500 /* send the response back to the VF */
2501 aq_ret = i40e_vc_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_RSS_HENA_CAPS,
2502 aq_ret, (u8 *)vrh, len);
b7d2cd95 2503 kfree(vrh);
c4e1868c
MW		 2504 return aq_ret;
2505}
2506
2507/**
2508 * i40e_vc_set_rss_hena
2509 * @vf: pointer to the VF info
2510 * @msg: pointer to the msg buffer
2511 * @msglen: msg length
2512 *
2513 * Set the RSS HENA bits for the VF
2514 **/
2515static int i40e_vc_set_rss_hena(struct i40e_vf *vf, u8 *msg, u16 msglen)
2516{
2517 struct i40e_virtchnl_rss_hena *vrh =
2518 (struct i40e_virtchnl_rss_hena *)msg;
2519 struct i40e_pf *pf = vf->pf;
2520 struct i40e_hw *hw = &pf->hw;
2521 i40e_status aq_ret = 0;
2522
6322e63c 2523 if (!test_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states)) {
c4e1868c
MW		 2524 aq_ret = I40E_ERR_PARAM;
2525 goto err;
2526 }
2527 i40e_write_rx_ctl(hw, I40E_VFQF_HENA1(0, vf->vf_id), (u32)vrh->hena);
2528 i40e_write_rx_ctl(hw, I40E_VFQF_HENA1(1, vf->vf_id),
2529 (u32)(vrh->hena >> 32));
2530
2531 /* send the response to the VF */
2532err:
2533 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_SET_RSS_HENA,
2534 aq_ret);
2535}
2536
5c3c48ac
JB		 2537/**
2538 * i40e_vc_validate_vf_msg
b40c82e6 2539 * @vf: pointer to the VF info
5c3c48ac
JB		 2540 * @msg: pointer to the msg buffer
2541 * @msglen: msg length
2542 * @msghndl: msg handle
2543 *
2544 * validate msg
2545 **/
2546static int i40e_vc_validate_vf_msg(struct i40e_vf *vf, u32 v_opcode,
2547 u32 v_retval, u8 *msg, u16 msglen)
2548{
2549 bool err_msg_format = false;
3ed439c5 2550 int valid_len = 0;
5c3c48ac
JB		 2551
2552 /* Check if VF is disabled. */
6322e63c 2553 if (test_bit(I40E_VF_STATE_DISABLED, &vf->vf_states))
5c3c48ac
JB		 2554 return I40E_ERR_PARAM;
2555
2556 /* Validate message length. */
2557 switch (v_opcode) {
2558 case I40E_VIRTCHNL_OP_VERSION:
2559 valid_len = sizeof(struct i40e_virtchnl_version_info);
2560 break;
2561 case I40E_VIRTCHNL_OP_RESET_VF:
5c3c48ac 2562 break;
f4ca1a22
MW		 2563 case I40E_VIRTCHNL_OP_GET_VF_RESOURCES:
2564 if (VF_IS_V11(vf))
2565 valid_len = sizeof(u32);
f4ca1a22 2566 break;
5c3c48ac
JB		 2567 case I40E_VIRTCHNL_OP_CONFIG_TX_QUEUE:
2568 valid_len = sizeof(struct i40e_virtchnl_txq_info);
2569 break;
2570 case I40E_VIRTCHNL_OP_CONFIG_RX_QUEUE:
2571 valid_len = sizeof(struct i40e_virtchnl_rxq_info);
2572 break;
2573 case I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES:
2574 valid_len = sizeof(struct i40e_virtchnl_vsi_queue_config_info);
2575 if (msglen >= valid_len) {
2576 struct i40e_virtchnl_vsi_queue_config_info *vqc =
2577 (struct i40e_virtchnl_vsi_queue_config_info *)msg;
2578 valid_len += (vqc->num_queue_pairs *
2579 sizeof(struct
2580 i40e_virtchnl_queue_pair_info));
2581 if (vqc->num_queue_pairs == 0)
2582 err_msg_format = true;
2583 }
2584 break;
2585 case I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP:
2586 valid_len = sizeof(struct i40e_virtchnl_irq_map_info);
2587 if (msglen >= valid_len) {
2588 struct i40e_virtchnl_irq_map_info *vimi =
2589 (struct i40e_virtchnl_irq_map_info *)msg;
2590 valid_len += (vimi->num_vectors *
2591 sizeof(struct i40e_virtchnl_vector_map));
2592 if (vimi->num_vectors == 0)
2593 err_msg_format = true;
2594 }
2595 break;
2596 case I40E_VIRTCHNL_OP_ENABLE_QUEUES:
2597 case I40E_VIRTCHNL_OP_DISABLE_QUEUES:
2598 valid_len = sizeof(struct i40e_virtchnl_queue_select);
2599 break;
2600 case I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS:
2601 case I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS:
2602 valid_len = sizeof(struct i40e_virtchnl_ether_addr_list);
2603 if (msglen >= valid_len) {
2604 struct i40e_virtchnl_ether_addr_list *veal =
2605 (struct i40e_virtchnl_ether_addr_list *)msg;
2606 valid_len += veal->num_elements *
2607 sizeof(struct i40e_virtchnl_ether_addr);
2608 if (veal->num_elements == 0)
2609 err_msg_format = true;
2610 }
2611 break;
2612 case I40E_VIRTCHNL_OP_ADD_VLAN:
2613 case I40E_VIRTCHNL_OP_DEL_VLAN:
2614 valid_len = sizeof(struct i40e_virtchnl_vlan_filter_list);
2615 if (msglen >= valid_len) {
2616 struct i40e_virtchnl_vlan_filter_list *vfl =
2617 (struct i40e_virtchnl_vlan_filter_list *)msg;
2618 valid_len += vfl->num_elements * sizeof(u16);
2619 if (vfl->num_elements == 0)
2620 err_msg_format = true;
2621 }
2622 break;
2623 case I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE:
2624 valid_len = sizeof(struct i40e_virtchnl_promisc_info);
2625 break;
2626 case I40E_VIRTCHNL_OP_GET_STATS:
2627 valid_len = sizeof(struct i40e_virtchnl_queue_select);
2628 break;
e3219ce6
ASJ		 2629 case I40E_VIRTCHNL_OP_IWARP:
2630 /* These messages are opaque to us and will be validated in
2631 * the RDMA client code. We just need to check for nonzero
2632 * length. The firmware will enforce max length restrictions.
2633 */
2634 if (msglen)
2635 valid_len = msglen;
2636 else
2637 err_msg_format = true;
2638 break;
2639 case I40E_VIRTCHNL_OP_RELEASE_IWARP_IRQ_MAP:
2640 valid_len = 0;
2641 break;
2642 case I40E_VIRTCHNL_OP_CONFIG_IWARP_IRQ_MAP:
2643 valid_len = sizeof(struct i40e_virtchnl_iwarp_qvlist_info);
2644 if (msglen >= valid_len) {
2645 struct i40e_virtchnl_iwarp_qvlist_info *qv =
2646 (struct i40e_virtchnl_iwarp_qvlist_info *)msg;
2647 if (qv->num_vectors == 0) {
2648 err_msg_format = true;
2649 break;
2650 }
2651 valid_len += ((qv->num_vectors - 1) *
2652 sizeof(struct i40e_virtchnl_iwarp_qv_info));
2653 }
2654 break;
c4e1868c
MW		 2655 case I40E_VIRTCHNL_OP_CONFIG_RSS_KEY:
2656 valid_len = sizeof(struct i40e_virtchnl_rss_key);
2657 if (msglen >= valid_len) {
2658 struct i40e_virtchnl_rss_key *vrk =
2659 (struct i40e_virtchnl_rss_key *)msg;
2660 if (vrk->key_len != I40E_HKEY_ARRAY_SIZE) {
2661 err_msg_format = true;
2662 break;
2663 }
2664 valid_len += vrk->key_len - 1;
2665 }
2666 break;
2667 case I40E_VIRTCHNL_OP_CONFIG_RSS_LUT:
2668 valid_len = sizeof(struct i40e_virtchnl_rss_lut);
2669 if (msglen >= valid_len) {
2670 struct i40e_virtchnl_rss_lut *vrl =
2671 (struct i40e_virtchnl_rss_lut *)msg;
2672 if (vrl->lut_entries != I40E_VF_HLUT_ARRAY_SIZE) {
2673 err_msg_format = true;
2674 break;
2675 }
2676 valid_len += vrl->lut_entries - 1;
2677 }
2678 break;
2679 case I40E_VIRTCHNL_OP_GET_RSS_HENA_CAPS:
c4e1868c
MW		 2680 break;
2681 case I40E_VIRTCHNL_OP_SET_RSS_HENA:
2682 valid_len = sizeof(struct i40e_virtchnl_rss_hena);
2683 break;
5c3c48ac
JB		 2684 /* These are always errors coming from the VF. */
2685 case I40E_VIRTCHNL_OP_EVENT:
2686 case I40E_VIRTCHNL_OP_UNKNOWN:
2687 default:
2688 return -EPERM;
5c3c48ac
JB		 2689 }
2690 /* few more checks */
2691 if ((valid_len != msglen) || (err_msg_format)) {
2692 i40e_vc_send_resp_to_vf(vf, v_opcode, I40E_ERR_PARAM);
2693 return -EINVAL;
2694 } else {
2695 return 0;
2696 }
2697}
2698
2699/**
2700 * i40e_vc_process_vf_msg
b40c82e6
JK		 2701 * @pf: pointer to the PF structure
2702 * @vf_id: source VF id
5c3c48ac
JB		 2703 * @msg: pointer to the msg buffer
2704 * @msglen: msg length
2705 * @msghndl: msg handle
2706 *
2707 * called from the common aeq/arq handler to
b40c82e6 2708 * process request from VF
5c3c48ac 2709 **/
a1b5a24f 2710int i40e_vc_process_vf_msg(struct i40e_pf *pf, s16 vf_id, u32 v_opcode,
5c3c48ac
JB		 2711 u32 v_retval, u8 *msg, u16 msglen)
2712{
5c3c48ac 2713 struct i40e_hw *hw = &pf->hw;
a1b5a24f 2714 int local_vf_id = vf_id - (s16)hw->func_caps.vf_base_id;
6c1b5bff 2715 struct i40e_vf *vf;
5c3c48ac
JB		 2716 int ret;
2717
2718 pf->vf_aq_requests++;
7efa84b7 2719 if (local_vf_id >= pf->num_alloc_vfs)
6c1b5bff 2720 return -EINVAL;
7efa84b7 2721 vf = &(pf->vf[local_vf_id]);
5c3c48ac
JB		 2722 /* perform basic checks on the msg */
2723 ret = i40e_vc_validate_vf_msg(vf, v_opcode, v_retval, msg, msglen);
2724
2725 if (ret) {
b40c82e6 2726 dev_err(&pf->pdev->dev, "Invalid message from VF %d, opcode %d, len %d\n",
7efa84b7 2727 local_vf_id, v_opcode, msglen);
5c3c48ac
JB		 2728 return ret;
2729 }
bae3cae4 2730
5c3c48ac
JB		 2731 switch (v_opcode) {
2732 case I40E_VIRTCHNL_OP_VERSION:
f4ca1a22 2733 ret = i40e_vc_get_version_msg(vf, msg);
5c3c48ac
JB		 2734 break;
2735 case I40E_VIRTCHNL_OP_GET_VF_RESOURCES:
f4ca1a22 2736 ret = i40e_vc_get_vf_resources_msg(vf, msg);
5c3c48ac
JB		 2737 break;
2738 case I40E_VIRTCHNL_OP_RESET_VF:
fc18eaa0
MW		 2739 i40e_vc_reset_vf_msg(vf);
2740 ret = 0;
5c3c48ac
JB		 2741 break;
2742 case I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE:
2743 ret = i40e_vc_config_promiscuous_mode_msg(vf, msg, msglen);
2744 break;
2745 case I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES:
2746 ret = i40e_vc_config_queues_msg(vf, msg, msglen);
2747 break;
2748 case I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP:
2749 ret = i40e_vc_config_irq_map_msg(vf, msg, msglen);
2750 break;
2751 case I40E_VIRTCHNL_OP_ENABLE_QUEUES:
2752 ret = i40e_vc_enable_queues_msg(vf, msg, msglen);
055b295d 2753 i40e_vc_notify_vf_link_state(vf);
5c3c48ac
JB		 2754 break;
2755 case I40E_VIRTCHNL_OP_DISABLE_QUEUES:
2756 ret = i40e_vc_disable_queues_msg(vf, msg, msglen);
2757 break;
2758 case I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS:
2759 ret = i40e_vc_add_mac_addr_msg(vf, msg, msglen);
2760 break;
2761 case I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS:
2762 ret = i40e_vc_del_mac_addr_msg(vf, msg, msglen);
2763 break;
2764 case I40E_VIRTCHNL_OP_ADD_VLAN:
2765 ret = i40e_vc_add_vlan_msg(vf, msg, msglen);
2766 break;
2767 case I40E_VIRTCHNL_OP_DEL_VLAN:
2768 ret = i40e_vc_remove_vlan_msg(vf, msg, msglen);
2769 break;
2770 case I40E_VIRTCHNL_OP_GET_STATS:
2771 ret = i40e_vc_get_stats_msg(vf, msg, msglen);
2772 break;
e3219ce6
ASJ		 2773 case I40E_VIRTCHNL_OP_IWARP:
2774 ret = i40e_vc_iwarp_msg(vf, msg, msglen);
2775 break;
2776 case I40E_VIRTCHNL_OP_CONFIG_IWARP_IRQ_MAP:
2777 ret = i40e_vc_iwarp_qvmap_msg(vf, msg, msglen, true);
2778 break;
2779 case I40E_VIRTCHNL_OP_RELEASE_IWARP_IRQ_MAP:
2780 ret = i40e_vc_iwarp_qvmap_msg(vf, msg, msglen, false);
2781 break;
c4e1868c
MW		 2782 case I40E_VIRTCHNL_OP_CONFIG_RSS_KEY:
2783 ret = i40e_vc_config_rss_key(vf, msg, msglen);
2784 break;
2785 case I40E_VIRTCHNL_OP_CONFIG_RSS_LUT:
2786 ret = i40e_vc_config_rss_lut(vf, msg, msglen);
2787 break;
2788 case I40E_VIRTCHNL_OP_GET_RSS_HENA_CAPS:
2789 ret = i40e_vc_get_rss_hena(vf, msg, msglen);
2790 break;
2791 case I40E_VIRTCHNL_OP_SET_RSS_HENA:
2792 ret = i40e_vc_set_rss_hena(vf, msg, msglen);
2793 break;
2794
5c3c48ac
JB		 2795 case I40E_VIRTCHNL_OP_UNKNOWN:
2796 default:
b40c82e6 2797 dev_err(&pf->pdev->dev, "Unsupported opcode %d from VF %d\n",
7efa84b7 2798 v_opcode, local_vf_id);
5c3c48ac
JB		 2799 ret = i40e_vc_send_resp_to_vf(vf, v_opcode,
2800 I40E_ERR_NOT_IMPLEMENTED);
2801 break;
2802 }
2803
2804 return ret;
2805}
2806
2807/**
2808 * i40e_vc_process_vflr_event
b40c82e6 2809 * @pf: pointer to the PF structure
5c3c48ac
JB		 2810 *
2811 * called from the vlfr irq handler to
b40c82e6 2812 * free up VF resources and state variables
5c3c48ac
JB		 2813 **/
2814int i40e_vc_process_vflr_event(struct i40e_pf *pf)
2815{
5c3c48ac 2816 struct i40e_hw *hw = &pf->hw;
a1b5a24f 2817 u32 reg, reg_idx, bit_idx;
5c3c48ac 2818 struct i40e_vf *vf;
a1b5a24f 2819 int vf_id;
5c3c48ac 2820
0da36b97 2821 if (!test_bit(__I40E_VFLR_EVENT_PENDING, pf->state))
5c3c48ac
JB		 2822 return 0;
2823
0d790327
MW		 2824 /* Re-enable the VFLR interrupt cause here, before looking for which
2825 * VF got reset. Otherwise, if another VF gets a reset while the
2826 * first one is being processed, that interrupt will be lost, and
2827 * that VF will be stuck in reset forever.
2828 */
c5c2f7c3
MW		 2829 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
2830 reg |= I40E_PFINT_ICR0_ENA_VFLR_MASK;
2831 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
2832 i40e_flush(hw);
2833
0da36b97 2834 clear_bit(__I40E_VFLR_EVENT_PENDING, pf->state);
5c3c48ac
JB		 2835 for (vf_id = 0; vf_id < pf->num_alloc_vfs; vf_id++) {
2836 reg_idx = (hw->func_caps.vf_base_id + vf_id) / 32;
2837 bit_idx = (hw->func_caps.vf_base_id + vf_id) % 32;
b40c82e6 2838 /* read GLGEN_VFLRSTAT register to find out the flr VFs */
5c3c48ac
JB		 2839 vf = &pf->vf[vf_id];
2840 reg = rd32(hw, I40E_GLGEN_VFLRSTAT(reg_idx));
7369ca87 2841 if (reg & BIT(bit_idx))
7e5a313e 2842 /* i40e_reset_vf will clear the bit in GLGEN_VFLRSTAT */
7369ca87 2843 i40e_reset_vf(vf, true);
5c3c48ac
JB		 2844 }
2845
5c3c48ac
JB		 2846 return 0;
2847}
2848
5c3c48ac
JB		 2849/**
2850 * i40e_ndo_set_vf_mac
2851 * @netdev: network interface device structure
b40c82e6 2852 * @vf_id: VF identifier
5c3c48ac
JB		 2853 * @mac: mac address
2854 *
b40c82e6 2855 * program VF mac address
5c3c48ac
JB		 2856 **/
2857int i40e_ndo_set_vf_mac(struct net_device *netdev, int vf_id, u8 *mac)
2858{
2859 struct i40e_netdev_priv *np = netdev_priv(netdev);
2860 struct i40e_vsi *vsi = np->vsi;
2861 struct i40e_pf *pf = vsi->back;
2862 struct i40e_mac_filter *f;
2863 struct i40e_vf *vf;
2864 int ret = 0;
278e7d0b 2865 int bkt;
5c3c48ac
JB		 2866
2867 /* validate the request */
2868 if (vf_id >= pf->num_alloc_vfs) {
2869 dev_err(&pf->pdev->dev,
2870 "Invalid VF Identifier %d\n", vf_id);
2871 ret = -EINVAL;
2872 goto error_param;
2873 }
2874
2875 vf = &(pf->vf[vf_id]);
fdf0e0bf 2876 vsi = pf->vsi[vf->lan_vsi_idx];
6322e63c 2877 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
2d166c30
MW		 2878 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
2879 vf_id);
2880 ret = -EAGAIN;
5c3c48ac
JB		 2881 goto error_param;
2882 }
2883
efd8e39a 2884 if (is_multicast_ether_addr(mac)) {
5c3c48ac 2885 dev_err(&pf->pdev->dev,
efd8e39a 2886 "Invalid Ethernet address %pM for VF %d\n", mac, vf_id);
5c3c48ac
JB		 2887 ret = -EINVAL;
2888 goto error_param;
2889 }
2890
21659035 2891 /* Lock once because below invoked function add/del_filter requires
278e7d0b 2892 * mac_filter_hash_lock to be held
21659035 2893 */
278e7d0b 2894 spin_lock_bh(&vsi->mac_filter_hash_lock);
21659035 2895
5c3c48ac 2896 /* delete the temporary mac address */
efd8e39a 2897 if (!is_zero_ether_addr(vf->default_lan_addr.addr))
9569a9a4 2898 i40e_del_mac_filter(vsi, vf->default_lan_addr.addr);
5c3c48ac 2899
29f71bb0
GR		 2900 /* Delete all the filters for this VSI - we're going to kill it
2901 * anyway.
2902 */
278e7d0b 2903 hash_for_each(vsi->mac_filter_hash, bkt, f, hlist)
148141bb 2904 __i40e_del_filter(vsi, f);
5c3c48ac 2905
278e7d0b 2906 spin_unlock_bh(&vsi->mac_filter_hash_lock);
21659035 2907
5c3c48ac
JB		 2908 dev_info(&pf->pdev->dev, "Setting MAC %pM on VF %d\n", mac, vf_id);
2909 /* program mac filter */
17652c63 2910 if (i40e_sync_vsi_filters(vsi)) {
5c3c48ac
JB		 2911 dev_err(&pf->pdev->dev, "Unable to program ucast filters\n");
2912 ret = -EIO;
2913 goto error_param;
2914 }
9a173901 2915 ether_addr_copy(vf->default_lan_addr.addr, mac);
f657a6e1 2916 vf->pf_set_mac = true;
17413a80
GR		 2917 /* Force the VF driver stop so it has to reload with new MAC address */
2918 i40e_vc_disable_vf(pf, vf);
5c3c48ac 2919 dev_info(&pf->pdev->dev, "Reload the VF driver to make this change effective.\n");
5c3c48ac
JB		 2920
2921error_param:
2922 return ret;
2923}
2924
2925/**
2926 * i40e_ndo_set_vf_port_vlan
2927 * @netdev: network interface device structure
b40c82e6 2928 * @vf_id: VF identifier
5c3c48ac
JB		 2929 * @vlan_id: mac address
2930 * @qos: priority setting
79aab093 2931 * @vlan_proto: vlan protocol
5c3c48ac 2932 *
b40c82e6 2933 * program VF vlan id and/or qos
5c3c48ac 2934 **/
79aab093
MS		 2935int i40e_ndo_set_vf_port_vlan(struct net_device *netdev, int vf_id,
2936 u16 vlan_id, u8 qos, __be16 vlan_proto)
5c3c48ac 2937{
f7fc2f2e 2938 u16 vlanprio = vlan_id | (qos << I40E_VLAN_PRIORITY_SHIFT);
5c3c48ac
JB		 2939 struct i40e_netdev_priv *np = netdev_priv(netdev);
2940 struct i40e_pf *pf = np->vsi->back;
2941 struct i40e_vsi *vsi;
2942 struct i40e_vf *vf;
2943 int ret = 0;
2944
2945 /* validate the request */
2946 if (vf_id >= pf->num_alloc_vfs) {
2947 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
2948 ret = -EINVAL;
2949 goto error_pvid;
2950 }
2951
2952 if ((vlan_id > I40E_MAX_VLANID) || (qos > 7)) {
2953 dev_err(&pf->pdev->dev, "Invalid VF Parameters\n");
2954 ret = -EINVAL;
2955 goto error_pvid;
2956 }
2957
79aab093
MS		 2958 if (vlan_proto != htons(ETH_P_8021Q)) {
2959 dev_err(&pf->pdev->dev, "VF VLAN protocol is not supported\n");
2960 ret = -EPROTONOSUPPORT;
2961 goto error_pvid;
2962 }
2963
5c3c48ac 2964 vf = &(pf->vf[vf_id]);
fdf0e0bf 2965 vsi = pf->vsi[vf->lan_vsi_idx];
6322e63c 2966 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
2d166c30
MW		 2967 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
2968 vf_id);
2969 ret = -EAGAIN;
5c3c48ac
JB		 2970 goto error_pvid;
2971 }
2972
f7fc2f2e 2973 if (le16_to_cpu(vsi->info.pvid) == vlanprio)
85927ec1
MW		 2974 /* duplicate request, so just return success */
2975 goto error_pvid;
2976
9af52f60 2977 /* Locked once because multiple functions below iterate list */
278e7d0b 2978 spin_lock_bh(&vsi->mac_filter_hash_lock);
21659035 2979
9af52f60 2980 if (le16_to_cpu(vsi->info.pvid) == 0 && i40e_is_vsi_in_vlan(vsi)) {
99a4973c
GR		 2981 dev_err(&pf->pdev->dev,
2982 "VF %d has already configured VLAN filters and the administrator is requesting a port VLAN override.\nPlease unload and reload the VF driver for this change to take effect.\n",
2983 vf_id);
f9b4b627
GR		 2984 /* Administrator Error - knock the VF offline until he does
2985 * the right thing by reconfiguring his network correctly
2986 * and then reloading the VF driver.
2987 */
2988 i40e_vc_disable_vf(pf, vf);
35f3472a
MW		 2989 /* During reset the VF got a new VSI, so refresh the pointer. */
2990 vsi = pf->vsi[vf->lan_vsi_idx];
f9b4b627 2991 }
99a4973c 2992
8d82a7c5
GR		 2993 /* Check for condition where there was already a port VLAN ID
2994 * filter set and now it is being deleted by setting it to zero.
1315f7c3
GR		 2995 * Additionally check for the condition where there was a port
2996 * VLAN but now there is a new and different port VLAN being set.
8d82a7c5
GR		 2997 * Before deleting all the old VLAN filters we must add new ones
2998 * with -1 (I40E_VLAN_ANY) or otherwise we're left with all our
2999 * MAC addresses deleted.
3000 */
1315f7c3 3001 if ((!(vlan_id || qos) ||
f7fc2f2e 3002 vlanprio != le16_to_cpu(vsi->info.pvid)) &&
9af52f60
JK		 3003 vsi->info.pvid) {
3004 ret = i40e_add_vlan_all_mac(vsi, I40E_VLAN_ANY);
3005 if (ret) {
3006 dev_info(&vsi->back->pdev->dev,
3007 "add VF VLAN failed, ret=%d aq_err=%d\n", ret,
3008 vsi->back->hw.aq.asq_last_status);
3009 spin_unlock_bh(&vsi->mac_filter_hash_lock);
3010 goto error_pvid;
3011 }
3012 }
8d82a7c5 3013
5c3c48ac 3014 if (vsi->info.pvid) {
9af52f60
JK		 3015 /* remove all filters on the old VLAN */
3016 i40e_rm_vlan_all_mac(vsi, (le16_to_cpu(vsi->info.pvid) &
3017 VLAN_VID_MASK));
5c3c48ac 3018 }
9af52f60 3019
640f93cc 3020 spin_unlock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac 3021 if (vlan_id || qos)
f7fc2f2e 3022 ret = i40e_vsi_add_pvid(vsi, vlanprio);
5c3c48ac 3023 else
6c12fcbf 3024 i40e_vsi_remove_pvid(vsi);
640f93cc 3025 spin_lock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac
JB		 3026
3027 if (vlan_id) {
3028 dev_info(&pf->pdev->dev, "Setting VLAN %d, QOS 0x%x on VF %d\n",
3029 vlan_id, qos, vf_id);
3030
9af52f60
JK		 3031 /* add new VLAN filter for each MAC */
3032 ret = i40e_add_vlan_all_mac(vsi, vlan_id);
5c3c48ac
JB		 3033 if (ret) {
3034 dev_info(&vsi->back->pdev->dev,
3035 "add VF VLAN failed, ret=%d aq_err=%d\n", ret,
3036 vsi->back->hw.aq.asq_last_status);
9af52f60 3037 spin_unlock_bh(&vsi->mac_filter_hash_lock);
5c3c48ac
JB		 3038 goto error_pvid;
3039 }
9af52f60
JK		 3040
3041 /* remove the previously added non-VLAN MAC filters */
3042 i40e_rm_vlan_all_mac(vsi, I40E_VLAN_ANY);
5c3c48ac
JB		 3043 }
3044
9af52f60
JK		 3045 spin_unlock_bh(&vsi->mac_filter_hash_lock);
3046
3047 /* Schedule the worker thread to take care of applying changes */
3048 i40e_service_event_schedule(vsi->back);
3049
5c3c48ac
JB		 3050 if (ret) {
3051 dev_err(&pf->pdev->dev, "Unable to update VF vsi context\n");
3052 goto error_pvid;
3053 }
9af52f60 3054
6c12fcbf
GR		 3055 /* The Port VLAN needs to be saved across resets the same as the
3056 * default LAN MAC address.
3057 */
3058 vf->port_vlan_id = le16_to_cpu(vsi->info.pvid);
5c3c48ac
JB		 3059 ret = 0;
3060
3061error_pvid:
3062 return ret;
3063}
3064
84590fd9
MW		 3065#define I40E_BW_CREDIT_DIVISOR 50 /* 50Mbps per BW credit */
3066#define I40E_MAX_BW_INACTIVE_ACCUM 4 /* device can accumulate 4 credits max */
5c3c48ac
JB		 3067/**
3068 * i40e_ndo_set_vf_bw
3069 * @netdev: network interface device structure
b40c82e6
JK		 3070 * @vf_id: VF identifier
3071 * @tx_rate: Tx rate
5c3c48ac 3072 *
b40c82e6 3073 * configure VF Tx rate
5c3c48ac 3074 **/
ed616689
SC		 3075int i40e_ndo_set_vf_bw(struct net_device *netdev, int vf_id, int min_tx_rate,
3076 int max_tx_rate)
5c3c48ac 3077{
6b192891
MW		 3078 struct i40e_netdev_priv *np = netdev_priv(netdev);
3079 struct i40e_pf *pf = np->vsi->back;
3080 struct i40e_vsi *vsi;
3081 struct i40e_vf *vf;
3082 int speed = 0;
3083 int ret = 0;
3084
3085 /* validate the request */
3086 if (vf_id >= pf->num_alloc_vfs) {
3087 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d.\n", vf_id);
3088 ret = -EINVAL;
3089 goto error;
3090 }
3091
ed616689 3092 if (min_tx_rate) {
b40c82e6 3093 dev_err(&pf->pdev->dev, "Invalid min tx rate (%d) (greater than 0) specified for VF %d.\n",
ed616689
SC		 3094 min_tx_rate, vf_id);
3095 return -EINVAL;
3096 }
3097
6b192891 3098 vf = &(pf->vf[vf_id]);
fdf0e0bf 3099 vsi = pf->vsi[vf->lan_vsi_idx];
6322e63c 3100 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
2d166c30
MW		 3101 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
3102 vf_id);
3103 ret = -EAGAIN;
6b192891
MW		 3104 goto error;
3105 }
3106
3107 switch (pf->hw.phy.link_info.link_speed) {
3108 case I40E_LINK_SPEED_40GB:
3109 speed = 40000;
3110 break;
3123237a
CW		 3111 case I40E_LINK_SPEED_25GB:
3112 speed = 25000;
3113 break;
07f169c3
MW		 3114 case I40E_LINK_SPEED_20GB:
3115 speed = 20000;
3116 break;
6b192891
MW		 3117 case I40E_LINK_SPEED_10GB:
3118 speed = 10000;
3119 break;
3120 case I40E_LINK_SPEED_1GB:
3121 speed = 1000;
3122 break;
3123 default:
3124 break;
3125 }
3126
ed616689 3127 if (max_tx_rate > speed) {
ff00f3a9 3128 dev_err(&pf->pdev->dev, "Invalid max tx rate %d specified for VF %d.\n",
ed616689 3129 max_tx_rate, vf->vf_id);
6b192891
MW		 3130 ret = -EINVAL;
3131 goto error;
3132 }
3133
dac9b31a
MW		 3134 if ((max_tx_rate < 50) && (max_tx_rate > 0)) {
3135 dev_warn(&pf->pdev->dev, "Setting max Tx rate to minimum usable value of 50Mbps.\n");
3136 max_tx_rate = 50;
3137 }
3138
6b192891 3139 /* Tx rate credits are in values of 50Mbps, 0 is disabled*/
84590fd9
MW		 3140 ret = i40e_aq_config_vsi_bw_limit(&pf->hw, vsi->seid,
3141 max_tx_rate / I40E_BW_CREDIT_DIVISOR,
3142 I40E_MAX_BW_INACTIVE_ACCUM, NULL);
6b192891 3143 if (ret) {
ed616689 3144 dev_err(&pf->pdev->dev, "Unable to set max tx rate, error code %d.\n",
6b192891
MW		 3145 ret);
3146 ret = -EIO;
3147 goto error;
3148 }
ed616689 3149 vf->tx_rate = max_tx_rate;
6b192891
MW		 3150error:
3151 return ret;
5c3c48ac
JB		 3152}
3153
3154/**
3155 * i40e_ndo_get_vf_config
3156 * @netdev: network interface device structure
b40c82e6
JK		 3157 * @vf_id: VF identifier
3158 * @ivi: VF configuration structure
5c3c48ac 3159 *
b40c82e6 3160 * return VF configuration
5c3c48ac
JB		 3161 **/
3162int i40e_ndo_get_vf_config(struct net_device *netdev,
3163 int vf_id, struct ifla_vf_info *ivi)
3164{
3165 struct i40e_netdev_priv *np = netdev_priv(netdev);
5c3c48ac
JB		 3166 struct i40e_vsi *vsi = np->vsi;
3167 struct i40e_pf *pf = vsi->back;
3168 struct i40e_vf *vf;
3169 int ret = 0;
3170
3171 /* validate the request */
3172 if (vf_id >= pf->num_alloc_vfs) {
3173 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
3174 ret = -EINVAL;
3175 goto error_param;
3176 }
3177
3178 vf = &(pf->vf[vf_id]);
3179 /* first vsi is always the LAN vsi */
fdf0e0bf 3180 vsi = pf->vsi[vf->lan_vsi_idx];
6322e63c 3181 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
2d166c30
MW		 3182 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
3183 vf_id);
3184 ret = -EAGAIN;
5c3c48ac
JB		 3185 goto error_param;
3186 }
3187
3188 ivi->vf = vf_id;
3189
6995b36c 3190 ether_addr_copy(ivi->mac, vf->default_lan_addr.addr);
5c3c48ac 3191
ed616689
SC		 3192 ivi->max_tx_rate = vf->tx_rate;
3193 ivi->min_tx_rate = 0;
5c3c48ac
JB		 3194 ivi->vlan = le16_to_cpu(vsi->info.pvid) & I40E_VLAN_MASK;
3195 ivi->qos = (le16_to_cpu(vsi->info.pvid) & I40E_PRIORITY_MASK) >>
3196 I40E_VLAN_PRIORITY_SHIFT;
84ca55a0
MW		 3197 if (vf->link_forced == false)
3198 ivi->linkstate = IFLA_VF_LINK_STATE_AUTO;
3199 else if (vf->link_up == true)
3200 ivi->linkstate = IFLA_VF_LINK_STATE_ENABLE;
3201 else
3202 ivi->linkstate = IFLA_VF_LINK_STATE_DISABLE;
c674d125 3203 ivi->spoofchk = vf->spoofchk;
d40062f3 3204 ivi->trusted = vf->trusted;
5c3c48ac
JB		 3205 ret = 0;
3206
3207error_param:
3208 return ret;
3209}
588aefa0
MW		 3210
3211/**
3212 * i40e_ndo_set_vf_link_state
3213 * @netdev: network interface device structure
b40c82e6 3214 * @vf_id: VF identifier
588aefa0
MW		 3215 * @link: required link state
3216 *
3217 * Set the link state of a specified VF, regardless of physical link state
3218 **/
3219int i40e_ndo_set_vf_link_state(struct net_device *netdev, int vf_id, int link)
3220{
3221 struct i40e_netdev_priv *np = netdev_priv(netdev);
3222 struct i40e_pf *pf = np->vsi->back;
3223 struct i40e_virtchnl_pf_event pfe;
3224 struct i40e_hw *hw = &pf->hw;
3225 struct i40e_vf *vf;
f19efbb5 3226 int abs_vf_id;
588aefa0
MW		 3227 int ret = 0;
3228
3229 /* validate the request */
3230 if (vf_id >= pf->num_alloc_vfs) {
3231 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
3232 ret = -EINVAL;
3233 goto error_out;
3234 }
3235
3236 vf = &pf->vf[vf_id];
f19efbb5 3237 abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
588aefa0
MW		 3238
3239 pfe.event = I40E_VIRTCHNL_EVENT_LINK_CHANGE;
3240 pfe.severity = I40E_PF_EVENT_SEVERITY_INFO;
3241
3242 switch (link) {
3243 case IFLA_VF_LINK_STATE_AUTO:
3244 vf->link_forced = false;
3245 pfe.event_data.link_event.link_status =
3246 pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP;
3247 pfe.event_data.link_event.link_speed =
3248 pf->hw.phy.link_info.link_speed;
3249 break;
3250 case IFLA_VF_LINK_STATE_ENABLE:
3251 vf->link_forced = true;
3252 vf->link_up = true;
3253 pfe.event_data.link_event.link_status = true;
3254 pfe.event_data.link_event.link_speed = I40E_LINK_SPEED_40GB;
3255 break;
3256 case IFLA_VF_LINK_STATE_DISABLE:
3257 vf->link_forced = true;
3258 vf->link_up = false;
3259 pfe.event_data.link_event.link_status = false;
3260 pfe.event_data.link_event.link_speed = 0;
3261 break;
3262 default:
3263 ret = -EINVAL;
3264 goto error_out;
3265 }
3266 /* Notify the VF of its new link state */
f19efbb5 3267 i40e_aq_send_msg_to_vf(hw, abs_vf_id, I40E_VIRTCHNL_OP_EVENT,
588aefa0
MW		 3268 0, (u8 *)&pfe, sizeof(pfe), NULL);
3269
3270error_out:
3271 return ret;
3272}
c674d125
MW		 3273
3274/**
3275 * i40e_ndo_set_vf_spoofchk
3276 * @netdev: network interface device structure
b40c82e6 3277 * @vf_id: VF identifier
c674d125
MW		 3278 * @enable: flag to enable or disable feature
3279 *
3280 * Enable or disable VF spoof checking
3281 **/
e6d9004d 3282int i40e_ndo_set_vf_spoofchk(struct net_device *netdev, int vf_id, bool enable)
c674d125
MW		 3283{
3284 struct i40e_netdev_priv *np = netdev_priv(netdev);
3285 struct i40e_vsi *vsi = np->vsi;
3286 struct i40e_pf *pf = vsi->back;
3287 struct i40e_vsi_context ctxt;
3288 struct i40e_hw *hw = &pf->hw;
3289 struct i40e_vf *vf;
3290 int ret = 0;
3291
3292 /* validate the request */
3293 if (vf_id >= pf->num_alloc_vfs) {
3294 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
3295 ret = -EINVAL;
3296 goto out;
3297 }
3298
3299 vf = &(pf->vf[vf_id]);
6322e63c 3300 if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states)) {
2d166c30
MW		 3301 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
3302 vf_id);
3303 ret = -EAGAIN;
3304 goto out;
3305 }
c674d125
MW		 3306
3307 if (enable == vf->spoofchk)
3308 goto out;
3309
3310 vf->spoofchk = enable;
3311 memset(&ctxt, 0, sizeof(ctxt));
fdf0e0bf 3312 ctxt.seid = pf->vsi[vf->lan_vsi_idx]->seid;
c674d125
MW		 3313 ctxt.pf_num = pf->hw.pf_id;
3314 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
3315 if (enable)
30d71af5
GR		 3316 ctxt.info.sec_flags |= (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
3317 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
c674d125
MW		 3318 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
3319 if (ret) {
3320 dev_err(&pf->pdev->dev, "Error %d updating VSI parameters\n",
3321 ret);
3322 ret = -EIO;
3323 }
3324out:
3325 return ret;
3326}
c3bbbd20
ASJ		 3327
3328/**
3329 * i40e_ndo_set_vf_trust
3330 * @netdev: network interface device structure of the pf
3331 * @vf_id: VF identifier
3332 * @setting: trust setting
3333 *
3334 * Enable or disable VF trust setting
3335 **/
3336int i40e_ndo_set_vf_trust(struct net_device *netdev, int vf_id, bool setting)
3337{
3338 struct i40e_netdev_priv *np = netdev_priv(netdev);
3339 struct i40e_pf *pf = np->vsi->back;
3340 struct i40e_vf *vf;
3341 int ret = 0;
3342
3343 /* validate the request */
3344 if (vf_id >= pf->num_alloc_vfs) {
3345 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
3346 return -EINVAL;
3347 }
3348
3349 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
3350 dev_err(&pf->pdev->dev, "Trusted VF not supported in MFP mode.\n");
3351 return -EINVAL;
3352 }
3353
3354 vf = &pf->vf[vf_id];
3355
3356 if (!vf)
3357 return -EINVAL;
3358 if (setting == vf->trusted)
3359 goto out;
3360
3361 vf->trusted = setting;
3362 i40e_vc_notify_vf_reset(vf);
3363 i40e_reset_vf(vf, false);
3364 dev_info(&pf->pdev->dev, "VF %u is now %strusted\n",
3365 vf_id, setting ? "" : "un");
3366out:
3367 return ret;
3368}
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