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[mirror_ubuntu-artful-kernel.git] / drivers / net / ethernet / intel / i40e / i40e_virtchnl_pf.c
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5c3c48ac
JB		 1/*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * The full GNU General Public License is included in this distribution in
20 * the file called "COPYING".
21 *
22 * Contact Information:
23 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 *
26 ******************************************************************************/
27
28#include "i40e.h"
29
30/***********************misc routines*****************************/
31
32/**
33 * i40e_vc_isvalid_vsi_id
34 * @vf: pointer to the vf info
35 * @vsi_id: vf relative vsi id
36 *
37 * check for the valid vsi id
38 **/
39static inline bool i40e_vc_isvalid_vsi_id(struct i40e_vf *vf, u8 vsi_id)
40{
41 struct i40e_pf *pf = vf->pf;
42
43 return pf->vsi[vsi_id]->vf_id == vf->vf_id;
44}
45
46/**
47 * i40e_vc_isvalid_queue_id
48 * @vf: pointer to the vf info
49 * @vsi_id: vsi id
50 * @qid: vsi relative queue id
51 *
52 * check for the valid queue id
53 **/
54static inline bool i40e_vc_isvalid_queue_id(struct i40e_vf *vf, u8 vsi_id,
55 u8 qid)
56{
57 struct i40e_pf *pf = vf->pf;
58
59 return qid < pf->vsi[vsi_id]->num_queue_pairs;
60}
61
62/**
63 * i40e_vc_isvalid_vector_id
64 * @vf: pointer to the vf info
65 * @vector_id: vf relative vector id
66 *
67 * check for the valid vector id
68 **/
69static inline bool i40e_vc_isvalid_vector_id(struct i40e_vf *vf, u8 vector_id)
70{
71 struct i40e_pf *pf = vf->pf;
72
54692b40 73 return vector_id <= pf->hw.func_caps.num_msix_vectors_vf;
5c3c48ac
JB		 74}
75
76/***********************vf resource mgmt routines*****************/
77
78/**
79 * i40e_vc_get_pf_queue_id
80 * @vf: pointer to the vf info
81 * @vsi_idx: index of VSI in PF struct
82 * @vsi_queue_id: vsi relative queue id
83 *
84 * return pf relative queue id
85 **/
86static u16 i40e_vc_get_pf_queue_id(struct i40e_vf *vf, u8 vsi_idx,
87 u8 vsi_queue_id)
88{
89 struct i40e_pf *pf = vf->pf;
90 struct i40e_vsi *vsi = pf->vsi[vsi_idx];
91 u16 pf_queue_id = I40E_QUEUE_END_OF_LIST;
92
93 if (le16_to_cpu(vsi->info.mapping_flags) &
94 I40E_AQ_VSI_QUE_MAP_NONCONTIG)
95 pf_queue_id =
96 le16_to_cpu(vsi->info.queue_mapping[vsi_queue_id]);
97 else
98 pf_queue_id = le16_to_cpu(vsi->info.queue_mapping[0]) +
99 vsi_queue_id;
100
101 return pf_queue_id;
102}
103
5c3c48ac
JB		 104/**
105 * i40e_config_irq_link_list
106 * @vf: pointer to the vf info
107 * @vsi_idx: index of VSI in PF struct
108 * @vecmap: irq map info
109 *
110 * configure irq link list from the map
111 **/
112static void i40e_config_irq_link_list(struct i40e_vf *vf, u16 vsi_idx,
113 struct i40e_virtchnl_vector_map *vecmap)
114{
115 unsigned long linklistmap = 0, tempmap;
116 struct i40e_pf *pf = vf->pf;
117 struct i40e_hw *hw = &pf->hw;
118 u16 vsi_queue_id, pf_queue_id;
119 enum i40e_queue_type qtype;
120 u16 next_q, vector_id;
121 u32 reg, reg_idx;
122 u16 itr_idx = 0;
123
124 vector_id = vecmap->vector_id;
125 /* setup the head */
126 if (0 == vector_id)
127 reg_idx = I40E_VPINT_LNKLST0(vf->vf_id);
128 else
129 reg_idx = I40E_VPINT_LNKLSTN(
13c60b99 130 (pf->hw.func_caps.num_msix_vectors_vf
5c3c48ac
JB		 131 * vf->vf_id) + (vector_id - 1));
132
133 if (vecmap->rxq_map == 0 && vecmap->txq_map == 0) {
134 /* Special case - No queues mapped on this vector */
135 wr32(hw, reg_idx, I40E_VPINT_LNKLST0_FIRSTQ_INDX_MASK);
136 goto irq_list_done;
137 }
138 tempmap = vecmap->rxq_map;
4836650b 139 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
5c3c48ac
JB		 140 linklistmap |= (1 <<
141 (I40E_VIRTCHNL_SUPPORTED_QTYPES *
142 vsi_queue_id));
5c3c48ac
JB		 143 }
144
145 tempmap = vecmap->txq_map;
4836650b 146 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
5c3c48ac
JB		 147 linklistmap |= (1 <<
148 (I40E_VIRTCHNL_SUPPORTED_QTYPES * vsi_queue_id
149 + 1));
5c3c48ac
JB		 150 }
151
152 next_q = find_first_bit(&linklistmap,
153 (I40E_MAX_VSI_QP *
154 I40E_VIRTCHNL_SUPPORTED_QTYPES));
155 vsi_queue_id = next_q/I40E_VIRTCHNL_SUPPORTED_QTYPES;
156 qtype = next_q%I40E_VIRTCHNL_SUPPORTED_QTYPES;
157 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_idx, vsi_queue_id);
158 reg = ((qtype << I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT) | pf_queue_id);
159
160 wr32(hw, reg_idx, reg);
161
162 while (next_q < (I40E_MAX_VSI_QP * I40E_VIRTCHNL_SUPPORTED_QTYPES)) {
163 switch (qtype) {
164 case I40E_QUEUE_TYPE_RX:
165 reg_idx = I40E_QINT_RQCTL(pf_queue_id);
166 itr_idx = vecmap->rxitr_idx;
167 break;
168 case I40E_QUEUE_TYPE_TX:
169 reg_idx = I40E_QINT_TQCTL(pf_queue_id);
170 itr_idx = vecmap->txitr_idx;
171 break;
172 default:
173 break;
174 }
175
176 next_q = find_next_bit(&linklistmap,
177 (I40E_MAX_VSI_QP *
178 I40E_VIRTCHNL_SUPPORTED_QTYPES),
179 next_q + 1);
180 if (next_q < (I40E_MAX_VSI_QP * I40E_VIRTCHNL_SUPPORTED_QTYPES)) {
181 vsi_queue_id = next_q / I40E_VIRTCHNL_SUPPORTED_QTYPES;
182 qtype = next_q % I40E_VIRTCHNL_SUPPORTED_QTYPES;
183 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_idx,
184 vsi_queue_id);
185 } else {
186 pf_queue_id = I40E_QUEUE_END_OF_LIST;
187 qtype = 0;
188 }
189
190 /* format for the RQCTL & TQCTL regs is same */
191 reg = (vector_id) |
192 (qtype << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT) |
193 (pf_queue_id << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) |
194 (1 << I40E_QINT_RQCTL_CAUSE_ENA_SHIFT) |
195 (itr_idx << I40E_QINT_RQCTL_ITR_INDX_SHIFT);
196 wr32(hw, reg_idx, reg);
197 }
198
199irq_list_done:
200 i40e_flush(hw);
201}
202
203/**
204 * i40e_config_vsi_tx_queue
205 * @vf: pointer to the vf info
206 * @vsi_idx: index of VSI in PF struct
207 * @vsi_queue_id: vsi relative queue index
208 * @info: config. info
209 *
210 * configure tx queue
211 **/
212static int i40e_config_vsi_tx_queue(struct i40e_vf *vf, u16 vsi_idx,
213 u16 vsi_queue_id,
214 struct i40e_virtchnl_txq_info *info)
215{
216 struct i40e_pf *pf = vf->pf;
217 struct i40e_hw *hw = &pf->hw;
218 struct i40e_hmc_obj_txq tx_ctx;
219 u16 pf_queue_id;
220 u32 qtx_ctl;
221 int ret = 0;
222
223 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_idx, vsi_queue_id);
224
225 /* clear the context structure first */
226 memset(&tx_ctx, 0, sizeof(struct i40e_hmc_obj_txq));
227
228 /* only set the required fields */
229 tx_ctx.base = info->dma_ring_addr / 128;
230 tx_ctx.qlen = info->ring_len;
231 tx_ctx.rdylist = le16_to_cpu(pf->vsi[vsi_idx]->info.qs_handle[0]);
232 tx_ctx.rdylist_act = 0;
233
234 /* clear the context in the HMC */
235 ret = i40e_clear_lan_tx_queue_context(hw, pf_queue_id);
236 if (ret) {
237 dev_err(&pf->pdev->dev,
238 "Failed to clear VF LAN Tx queue context %d, error: %d\n",
239 pf_queue_id, ret);
240 ret = -ENOENT;
241 goto error_context;
242 }
243
244 /* set the context in the HMC */
245 ret = i40e_set_lan_tx_queue_context(hw, pf_queue_id, &tx_ctx);
246 if (ret) {
247 dev_err(&pf->pdev->dev,
248 "Failed to set VF LAN Tx queue context %d error: %d\n",
249 pf_queue_id, ret);
250 ret = -ENOENT;
251 goto error_context;
252 }
253
254 /* associate this queue with the PCI VF function */
255 qtx_ctl = I40E_QTX_CTL_VF_QUEUE;
13fd9774 256 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT)
5c3c48ac
JB		 257 & I40E_QTX_CTL_PF_INDX_MASK);
258 qtx_ctl |= (((vf->vf_id + hw->func_caps.vf_base_id)
259 << I40E_QTX_CTL_VFVM_INDX_SHIFT)
260 & I40E_QTX_CTL_VFVM_INDX_MASK);
261 wr32(hw, I40E_QTX_CTL(pf_queue_id), qtx_ctl);
262 i40e_flush(hw);
263
264error_context:
265 return ret;
266}
267
268/**
269 * i40e_config_vsi_rx_queue
270 * @vf: pointer to the vf info
271 * @vsi_idx: index of VSI in PF struct
272 * @vsi_queue_id: vsi relative queue index
273 * @info: config. info
274 *
275 * configure rx queue
276 **/
277static int i40e_config_vsi_rx_queue(struct i40e_vf *vf, u16 vsi_idx,
278 u16 vsi_queue_id,
279 struct i40e_virtchnl_rxq_info *info)
280{
281 struct i40e_pf *pf = vf->pf;
282 struct i40e_hw *hw = &pf->hw;
283 struct i40e_hmc_obj_rxq rx_ctx;
284 u16 pf_queue_id;
285 int ret = 0;
286
287 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_idx, vsi_queue_id);
288
289 /* clear the context structure first */
290 memset(&rx_ctx, 0, sizeof(struct i40e_hmc_obj_rxq));
291
292 /* only set the required fields */
293 rx_ctx.base = info->dma_ring_addr / 128;
294 rx_ctx.qlen = info->ring_len;
295
296 if (info->splithdr_enabled) {
297 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
298 I40E_RX_SPLIT_IP |
299 I40E_RX_SPLIT_TCP_UDP |
300 I40E_RX_SPLIT_SCTP;
301 /* header length validation */
302 if (info->hdr_size > ((2 * 1024) - 64)) {
303 ret = -EINVAL;
304 goto error_param;
305 }
306 rx_ctx.hbuff = info->hdr_size >> I40E_RXQ_CTX_HBUFF_SHIFT;
307
308 /* set splitalways mode 10b */
309 rx_ctx.dtype = 0x2;
310 }
311
312 /* databuffer length validation */
313 if (info->databuffer_size > ((16 * 1024) - 128)) {
314 ret = -EINVAL;
315 goto error_param;
316 }
317 rx_ctx.dbuff = info->databuffer_size >> I40E_RXQ_CTX_DBUFF_SHIFT;
318
319 /* max pkt. length validation */
320 if (info->max_pkt_size >= (16 * 1024) || info->max_pkt_size < 64) {
321 ret = -EINVAL;
322 goto error_param;
323 }
324 rx_ctx.rxmax = info->max_pkt_size;
325
326 /* enable 32bytes desc always */
327 rx_ctx.dsize = 1;
328
329 /* default values */
330 rx_ctx.tphrdesc_ena = 1;
331 rx_ctx.tphwdesc_ena = 1;
332 rx_ctx.tphdata_ena = 1;
333 rx_ctx.tphhead_ena = 1;
334 rx_ctx.lrxqthresh = 2;
335 rx_ctx.crcstrip = 1;
336
337 /* clear the context in the HMC */
338 ret = i40e_clear_lan_rx_queue_context(hw, pf_queue_id);
339 if (ret) {
340 dev_err(&pf->pdev->dev,
341 "Failed to clear VF LAN Rx queue context %d, error: %d\n",
342 pf_queue_id, ret);
343 ret = -ENOENT;
344 goto error_param;
345 }
346
347 /* set the context in the HMC */
348 ret = i40e_set_lan_rx_queue_context(hw, pf_queue_id, &rx_ctx);
349 if (ret) {
350 dev_err(&pf->pdev->dev,
351 "Failed to set VF LAN Rx queue context %d error: %d\n",
352 pf_queue_id, ret);
353 ret = -ENOENT;
354 goto error_param;
355 }
356
357error_param:
358 return ret;
359}
360
361/**
362 * i40e_alloc_vsi_res
363 * @vf: pointer to the vf info
364 * @type: type of VSI to allocate
365 *
366 * alloc vf vsi context & resources
367 **/
368static int i40e_alloc_vsi_res(struct i40e_vf *vf, enum i40e_vsi_type type)
369{
370 struct i40e_mac_filter *f = NULL;
371 struct i40e_pf *pf = vf->pf;
5c3c48ac
JB		 372 struct i40e_vsi *vsi;
373 int ret = 0;
374
375 vsi = i40e_vsi_setup(pf, type, pf->vsi[pf->lan_vsi]->seid, vf->vf_id);
376
377 if (!vsi) {
378 dev_err(&pf->pdev->dev,
379 "add vsi failed for vf %d, aq_err %d\n",
380 vf->vf_id, pf->hw.aq.asq_last_status);
381 ret = -ENOENT;
382 goto error_alloc_vsi_res;
383 }
384 if (type == I40E_VSI_SRIOV) {
1a10370a 385 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
5c3c48ac
JB		 386 vf->lan_vsi_index = vsi->idx;
387 vf->lan_vsi_id = vsi->id;
388 dev_info(&pf->pdev->dev,
389 "LAN VSI index %d, VSI id %d\n",
390 vsi->idx, vsi->id);
6c12fcbf
GR		 391 /* If the port VLAN has been configured and then the
392 * VF driver was removed then the VSI port VLAN
393 * configuration was destroyed. Check if there is
394 * a port VLAN and restore the VSI configuration if
395 * needed.
396 */
397 if (vf->port_vlan_id)
398 i40e_vsi_add_pvid(vsi, vf->port_vlan_id);
5c3c48ac 399 f = i40e_add_filter(vsi, vf->default_lan_addr.addr,
6c12fcbf 400 vf->port_vlan_id, true, false);
1a10370a
GR		 401 if (!f)
402 dev_info(&pf->pdev->dev,
403 "Could not allocate VF MAC addr\n");
404 f = i40e_add_filter(vsi, brdcast, vf->port_vlan_id,
405 true, false);
406 if (!f)
407 dev_info(&pf->pdev->dev,
408 "Could not allocate VF broadcast filter\n");
5c3c48ac 409 }
6dbbbfb2 410
5c3c48ac
JB		 411 if (!f) {
412 dev_err(&pf->pdev->dev, "Unable to add ucast filter\n");
413 ret = -ENOMEM;
414 goto error_alloc_vsi_res;
415 }
416
417 /* program mac filter */
418 ret = i40e_sync_vsi_filters(vsi);
419 if (ret) {
420 dev_err(&pf->pdev->dev, "Unable to program ucast filters\n");
421 goto error_alloc_vsi_res;
422 }
423
5c3c48ac
JB		 424error_alloc_vsi_res:
425 return ret;
426}
427
805bd5bd
MW		 428/**
429 * i40e_enable_vf_mappings
430 * @vf: pointer to the vf info
431 *
432 * enable vf mappings
433 **/
434static void i40e_enable_vf_mappings(struct i40e_vf *vf)
435{
436 struct i40e_pf *pf = vf->pf;
437 struct i40e_hw *hw = &pf->hw;
438 u32 reg, total_queue_pairs = 0;
439 int j;
440
441 /* Tell the hardware we're using noncontiguous mapping. HW requires
442 * that VF queues be mapped using this method, even when they are
443 * contiguous in real life
444 */
445 wr32(hw, I40E_VSILAN_QBASE(vf->lan_vsi_id),
446 I40E_VSILAN_QBASE_VSIQTABLE_ENA_MASK);
447
448 /* enable VF vplan_qtable mappings */
449 reg = I40E_VPLAN_MAPENA_TXRX_ENA_MASK;
450 wr32(hw, I40E_VPLAN_MAPENA(vf->vf_id), reg);
451
452 /* map PF queues to VF queues */
453 for (j = 0; j < pf->vsi[vf->lan_vsi_index]->num_queue_pairs; j++) {
454 u16 qid = i40e_vc_get_pf_queue_id(vf, vf->lan_vsi_index, j);
455 reg = (qid & I40E_VPLAN_QTABLE_QINDEX_MASK);
456 wr32(hw, I40E_VPLAN_QTABLE(total_queue_pairs, vf->vf_id), reg);
457 total_queue_pairs++;
458 }
459
460 /* map PF queues to VSI */
461 for (j = 0; j < 7; j++) {
462 if (j * 2 >= pf->vsi[vf->lan_vsi_index]->num_queue_pairs) {
463 reg = 0x07FF07FF; /* unused */
464 } else {
465 u16 qid = i40e_vc_get_pf_queue_id(vf, vf->lan_vsi_index,
466 j * 2);
467 reg = qid;
468 qid = i40e_vc_get_pf_queue_id(vf, vf->lan_vsi_index,
469 (j * 2) + 1);
470 reg |= qid << 16;
471 }
472 wr32(hw, I40E_VSILAN_QTABLE(j, vf->lan_vsi_id), reg);
473 }
474
475 i40e_flush(hw);
476}
477
478/**
479 * i40e_disable_vf_mappings
480 * @vf: pointer to the vf info
481 *
482 * disable vf mappings
483 **/
484static void i40e_disable_vf_mappings(struct i40e_vf *vf)
485{
486 struct i40e_pf *pf = vf->pf;
487 struct i40e_hw *hw = &pf->hw;
488 int i;
489
490 /* disable qp mappings */
491 wr32(hw, I40E_VPLAN_MAPENA(vf->vf_id), 0);
492 for (i = 0; i < I40E_MAX_VSI_QP; i++)
493 wr32(hw, I40E_VPLAN_QTABLE(i, vf->vf_id),
494 I40E_QUEUE_END_OF_LIST);
495 i40e_flush(hw);
496}
497
498/**
499 * i40e_free_vf_res
500 * @vf: pointer to the vf info
501 *
502 * free vf resources
503 **/
504static void i40e_free_vf_res(struct i40e_vf *vf)
505{
506 struct i40e_pf *pf = vf->pf;
fc18eaa0
MW		 507 struct i40e_hw *hw = &pf->hw;
508 u32 reg_idx, reg;
509 int i, msix_vf;
805bd5bd
MW		 510
511 /* free vsi & disconnect it from the parent uplink */
512 if (vf->lan_vsi_index) {
513 i40e_vsi_release(pf->vsi[vf->lan_vsi_index]);
514 vf->lan_vsi_index = 0;
515 vf->lan_vsi_id = 0;
516 }
fc18eaa0
MW		 517 msix_vf = pf->hw.func_caps.num_msix_vectors_vf + 1;
518 /* disable interrupts so the VF starts in a known state */
519 for (i = 0; i < msix_vf; i++) {
520 /* format is same for both registers */
521 if (0 == i)
522 reg_idx = I40E_VFINT_DYN_CTL0(vf->vf_id);
523 else
524 reg_idx = I40E_VFINT_DYN_CTLN(((msix_vf - 1) *
525 (vf->vf_id))
526 + (i - 1));
527 wr32(hw, reg_idx, I40E_VFINT_DYN_CTLN_CLEARPBA_MASK);
528 i40e_flush(hw);
529 }
805bd5bd 530
fc18eaa0
MW		 531 /* clear the irq settings */
532 for (i = 0; i < msix_vf; i++) {
533 /* format is same for both registers */
534 if (0 == i)
535 reg_idx = I40E_VPINT_LNKLST0(vf->vf_id);
536 else
537 reg_idx = I40E_VPINT_LNKLSTN(((msix_vf - 1) *
538 (vf->vf_id))
539 + (i - 1));
540 reg = (I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_MASK |
541 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK);
542 wr32(hw, reg_idx, reg);
543 i40e_flush(hw);
544 }
805bd5bd
MW		 545 /* reset some of the state varibles keeping
546 * track of the resources
547 */
548 vf->num_queue_pairs = 0;
549 vf->vf_states = 0;
550}
551
552/**
553 * i40e_alloc_vf_res
554 * @vf: pointer to the vf info
555 *
556 * allocate vf resources
557 **/
558static int i40e_alloc_vf_res(struct i40e_vf *vf)
559{
560 struct i40e_pf *pf = vf->pf;
561 int total_queue_pairs = 0;
562 int ret;
563
564 /* allocate hw vsi context & associated resources */
565 ret = i40e_alloc_vsi_res(vf, I40E_VSI_SRIOV);
566 if (ret)
567 goto error_alloc;
568 total_queue_pairs += pf->vsi[vf->lan_vsi_index]->num_queue_pairs;
569 set_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps);
570
571 /* store the total qps number for the runtime
572 * vf req validation
573 */
574 vf->num_queue_pairs = total_queue_pairs;
575
576 /* vf is now completely initialized */
577 set_bit(I40E_VF_STAT_INIT, &vf->vf_states);
578
579error_alloc:
580 if (ret)
581 i40e_free_vf_res(vf);
582
583 return ret;
584}
585
fc18eaa0
MW		 586#define VF_DEVICE_STATUS 0xAA
587#define VF_TRANS_PENDING_MASK 0x20
588/**
589 * i40e_quiesce_vf_pci
590 * @vf: pointer to the vf structure
591 *
592 * Wait for VF PCI transactions to be cleared after reset. Returns -EIO
593 * if the transactions never clear.
594 **/
595static int i40e_quiesce_vf_pci(struct i40e_vf *vf)
596{
597 struct i40e_pf *pf = vf->pf;
598 struct i40e_hw *hw = &pf->hw;
599 int vf_abs_id, i;
600 u32 reg;
601
b141d619 602 vf_abs_id = vf->vf_id + hw->func_caps.vf_base_id;
fc18eaa0
MW		 603
604 wr32(hw, I40E_PF_PCI_CIAA,
605 VF_DEVICE_STATUS | (vf_abs_id << I40E_PF_PCI_CIAA_VF_NUM_SHIFT));
606 for (i = 0; i < 100; i++) {
607 reg = rd32(hw, I40E_PF_PCI_CIAD);
608 if ((reg & VF_TRANS_PENDING_MASK) == 0)
609 return 0;
610 udelay(1);
611 }
612 return -EIO;
613}
614
5c3c48ac
JB		 615/**
616 * i40e_reset_vf
617 * @vf: pointer to the vf structure
618 * @flr: VFLR was issued or not
619 *
620 * reset the vf
621 **/
fc18eaa0 622void i40e_reset_vf(struct i40e_vf *vf, bool flr)
5c3c48ac 623{
5c3c48ac
JB		 624 struct i40e_pf *pf = vf->pf;
625 struct i40e_hw *hw = &pf->hw;
5c3c48ac 626 bool rsd = false;
fc18eaa0
MW		 627 int i;
628 u32 reg;
5c3c48ac
JB		 629
630 /* warn the VF */
5c3c48ac
JB		 631 clear_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states);
632
fc18eaa0
MW		 633 /* In the case of a VFLR, the HW has already reset the VF and we
634 * just need to clean up, so don't hit the VFRTRIG register.
5c3c48ac
JB		 635 */
636 if (!flr) {
637 /* reset vf using VPGEN_VFRTRIG reg */
fc18eaa0
MW		 638 reg = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id));
639 reg |= I40E_VPGEN_VFRTRIG_VFSWR_MASK;
5c3c48ac
JB		 640 wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg);
641 i40e_flush(hw);
642 }
643
fc18eaa0
MW		 644 if (i40e_quiesce_vf_pci(vf))
645 dev_err(&pf->pdev->dev, "VF %d PCI transactions stuck\n",
646 vf->vf_id);
647
5c3c48ac
JB		 648 /* poll VPGEN_VFRSTAT reg to make sure
649 * that reset is complete
650 */
fc18eaa0 651 for (i = 0; i < 100; i++) {
5c3c48ac
JB		 652 /* vf reset requires driver to first reset the
653 * vf & than poll the status register to make sure
654 * that the requested op was completed
655 * successfully
656 */
657 udelay(10);
658 reg = rd32(hw, I40E_VPGEN_VFRSTAT(vf->vf_id));
659 if (reg & I40E_VPGEN_VFRSTAT_VFRD_MASK) {
660 rsd = true;
661 break;
662 }
663 }
664
665 if (!rsd)
fc18eaa0 666 dev_err(&pf->pdev->dev, "VF reset check timeout on VF %d\n",
5c3c48ac 667 vf->vf_id);
fc18eaa0 668 wr32(hw, I40E_VFGEN_RSTAT1(vf->vf_id), I40E_VFR_COMPLETED);
5c3c48ac
JB		 669 /* clear the reset bit in the VPGEN_VFRTRIG reg */
670 reg = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id));
671 reg &= ~I40E_VPGEN_VFRTRIG_VFSWR_MASK;
672 wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg);
fc18eaa0
MW		 673
674 /* On initial reset, we won't have any queues */
675 if (vf->lan_vsi_index == 0)
676 goto complete_reset;
677
678 i40e_vsi_control_rings(pf->vsi[vf->lan_vsi_index], false);
679complete_reset:
680 /* reallocate vf resources to reset the VSI state */
681 i40e_free_vf_res(vf);
682 mdelay(10);
683 i40e_alloc_vf_res(vf);
684 i40e_enable_vf_mappings(vf);
685
5c3c48ac 686 /* tell the VF the reset is done */
fc18eaa0 687 wr32(hw, I40E_VFGEN_RSTAT1(vf->vf_id), I40E_VFR_VFACTIVE);
5c3c48ac 688 i40e_flush(hw);
5c3c48ac
JB		 689}
690
5c3c48ac
JB		 691/**
692 * i40e_vfs_are_assigned
693 * @pf: pointer to the pf structure
694 *
695 * Determine if any VFs are assigned to VMs
696 **/
697static bool i40e_vfs_are_assigned(struct i40e_pf *pf)
698{
699 struct pci_dev *pdev = pf->pdev;
700 struct pci_dev *vfdev;
701
702 /* loop through all the VFs to see if we own any that are assigned */
703 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, I40E_VF_DEVICE_ID , NULL);
704 while (vfdev) {
705 /* if we don't own it we don't care */
706 if (vfdev->is_virtfn && pci_physfn(vfdev) == pdev) {
707 /* if it is assigned we cannot release it */
708 if (vfdev->dev_flags & PCI_DEV_FLAGS_ASSIGNED)
709 return true;
710 }
711
712 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
713 I40E_VF_DEVICE_ID,
714 vfdev);
715 }
716
717 return false;
718}
719
720/**
721 * i40e_free_vfs
722 * @pf: pointer to the pf structure
723 *
724 * free vf resources
725 **/
726void i40e_free_vfs(struct i40e_pf *pf)
727{
f7414531
MW		 728 struct i40e_hw *hw = &pf->hw;
729 u32 reg_idx, bit_idx;
730 int i, tmp, vf_id;
5c3c48ac
JB		 731
732 if (!pf->vf)
733 return;
734
735 /* Disable interrupt 0 so we don't try to handle the VFLR. */
2ef28cfb
MW		 736 i40e_irq_dynamic_disable_icr0(pf);
737
6c1b5bff 738 mdelay(10); /* let any messages in transit get finished up */
5c3c48ac 739 /* free up vf resources */
6c1b5bff
MW		 740 tmp = pf->num_alloc_vfs;
741 pf->num_alloc_vfs = 0;
742 for (i = 0; i < tmp; i++) {
5c3c48ac
JB		 743 if (test_bit(I40E_VF_STAT_INIT, &pf->vf[i].vf_states))
744 i40e_free_vf_res(&pf->vf[i]);
745 /* disable qp mappings */
746 i40e_disable_vf_mappings(&pf->vf[i]);
747 }
748
749 kfree(pf->vf);
750 pf->vf = NULL;
5c3c48ac 751
f7414531 752 if (!i40e_vfs_are_assigned(pf)) {
5c3c48ac 753 pci_disable_sriov(pf->pdev);
f7414531
MW		 754 /* Acknowledge VFLR for all VFS. Without this, VFs will fail to
755 * work correctly when SR-IOV gets re-enabled.
756 */
757 for (vf_id = 0; vf_id < tmp; vf_id++) {
758 reg_idx = (hw->func_caps.vf_base_id + vf_id) / 32;
759 bit_idx = (hw->func_caps.vf_base_id + vf_id) % 32;
760 wr32(hw, I40E_GLGEN_VFLRSTAT(reg_idx), (1 << bit_idx));
761 }
762 }
5c3c48ac
JB		 763 else
764 dev_warn(&pf->pdev->dev,
765 "unable to disable SR-IOV because VFs are assigned.\n");
766
767 /* Re-enable interrupt 0. */
2ef28cfb 768 i40e_irq_dynamic_enable_icr0(pf);
5c3c48ac
JB		 769}
770
771#ifdef CONFIG_PCI_IOV
772/**
773 * i40e_alloc_vfs
774 * @pf: pointer to the pf structure
775 * @num_alloc_vfs: number of vfs to allocate
776 *
777 * allocate vf resources
778 **/
779static int i40e_alloc_vfs(struct i40e_pf *pf, u16 num_alloc_vfs)
780{
781 struct i40e_vf *vfs;
782 int i, ret = 0;
783
6c1b5bff 784 /* Disable interrupt 0 so we don't try to handle the VFLR. */
2ef28cfb
MW		 785 i40e_irq_dynamic_disable_icr0(pf);
786
5c3c48ac
JB		 787 ret = pci_enable_sriov(pf->pdev, num_alloc_vfs);
788 if (ret) {
789 dev_err(&pf->pdev->dev,
790 "pci_enable_sriov failed with error %d!\n", ret);
791 pf->num_alloc_vfs = 0;
792 goto err_iov;
793 }
794
795 /* allocate memory */
796 vfs = kzalloc(num_alloc_vfs * sizeof(struct i40e_vf), GFP_KERNEL);
797 if (!vfs) {
798 ret = -ENOMEM;
799 goto err_alloc;
800 }
801
802 /* apply default profile */
803 for (i = 0; i < num_alloc_vfs; i++) {
804 vfs[i].pf = pf;
805 vfs[i].parent_type = I40E_SWITCH_ELEMENT_TYPE_VEB;
806 vfs[i].vf_id = i;
807
808 /* assign default capabilities */
809 set_bit(I40E_VIRTCHNL_VF_CAP_L2, &vfs[i].vf_caps);
fc18eaa0
MW		 810 /* vf resources get allocated during reset */
811 i40e_reset_vf(&vfs[i], false);
5c3c48ac
JB		 812
813 /* enable vf vplan_qtable mappings */
814 i40e_enable_vf_mappings(&vfs[i]);
815 }
816 pf->vf = vfs;
817 pf->num_alloc_vfs = num_alloc_vfs;
818
819err_alloc:
820 if (ret)
821 i40e_free_vfs(pf);
822err_iov:
6c1b5bff 823 /* Re-enable interrupt 0. */
2ef28cfb 824 i40e_irq_dynamic_enable_icr0(pf);
5c3c48ac
JB		 825 return ret;
826}
827
828#endif
829/**
830 * i40e_pci_sriov_enable
831 * @pdev: pointer to a pci_dev structure
832 * @num_vfs: number of vfs to allocate
833 *
834 * Enable or change the number of VFs
835 **/
836static int i40e_pci_sriov_enable(struct pci_dev *pdev, int num_vfs)
837{
838#ifdef CONFIG_PCI_IOV
839 struct i40e_pf *pf = pci_get_drvdata(pdev);
840 int pre_existing_vfs = pci_num_vf(pdev);
841 int err = 0;
842
843 dev_info(&pdev->dev, "Allocating %d VFs.\n", num_vfs);
844 if (pre_existing_vfs && pre_existing_vfs != num_vfs)
845 i40e_free_vfs(pf);
846 else if (pre_existing_vfs && pre_existing_vfs == num_vfs)
847 goto out;
848
849 if (num_vfs > pf->num_req_vfs) {
850 err = -EPERM;
851 goto err_out;
852 }
853
854 err = i40e_alloc_vfs(pf, num_vfs);
855 if (err) {
856 dev_warn(&pdev->dev, "Failed to enable SR-IOV: %d\n", err);
857 goto err_out;
858 }
859
860out:
861 return num_vfs;
862
863err_out:
864 return err;
865#endif
866 return 0;
867}
868
869/**
870 * i40e_pci_sriov_configure
871 * @pdev: pointer to a pci_dev structure
872 * @num_vfs: number of vfs to allocate
873 *
874 * Enable or change the number of VFs. Called when the user updates the number
875 * of VFs in sysfs.
876 **/
877int i40e_pci_sriov_configure(struct pci_dev *pdev, int num_vfs)
878{
879 struct i40e_pf *pf = pci_get_drvdata(pdev);
880
881 if (num_vfs)
882 return i40e_pci_sriov_enable(pdev, num_vfs);
883
884 i40e_free_vfs(pf);
885 return 0;
886}
887
888/***********************virtual channel routines******************/
889
890/**
891 * i40e_vc_send_msg_to_vf
892 * @vf: pointer to the vf info
893 * @v_opcode: virtual channel opcode
894 * @v_retval: virtual channel return value
895 * @msg: pointer to the msg buffer
896 * @msglen: msg length
897 *
898 * send msg to vf
899 **/
900static int i40e_vc_send_msg_to_vf(struct i40e_vf *vf, u32 v_opcode,
901 u32 v_retval, u8 *msg, u16 msglen)
902{
903 struct i40e_pf *pf = vf->pf;
904 struct i40e_hw *hw = &pf->hw;
7efa84b7 905 int true_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
5c3c48ac
JB		 906 i40e_status aq_ret;
907
908 /* single place to detect unsuccessful return values */
909 if (v_retval) {
910 vf->num_invalid_msgs++;
911 dev_err(&pf->pdev->dev, "Failed opcode %d Error: %d\n",
912 v_opcode, v_retval);
913 if (vf->num_invalid_msgs >
914 I40E_DEFAULT_NUM_INVALID_MSGS_ALLOWED) {
915 dev_err(&pf->pdev->dev,
916 "Number of invalid messages exceeded for VF %d\n",
917 vf->vf_id);
918 dev_err(&pf->pdev->dev, "Use PF Control I/F to enable the VF\n");
919 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
920 }
921 } else {
922 vf->num_valid_msgs++;
923 }
924
7efa84b7
MW		 925 aq_ret = i40e_aq_send_msg_to_vf(hw, true_vf_id, v_opcode, v_retval,
926 msg, msglen, NULL);
5c3c48ac
JB		 927 if (aq_ret) {
928 dev_err(&pf->pdev->dev,
929 "Unable to send the message to VF %d aq_err %d\n",
930 vf->vf_id, pf->hw.aq.asq_last_status);
931 return -EIO;
932 }
933
934 return 0;
935}
936
937/**
938 * i40e_vc_send_resp_to_vf
939 * @vf: pointer to the vf info
940 * @opcode: operation code
941 * @retval: return value
942 *
943 * send resp msg to vf
944 **/
945static int i40e_vc_send_resp_to_vf(struct i40e_vf *vf,
946 enum i40e_virtchnl_ops opcode,
947 i40e_status retval)
948{
949 return i40e_vc_send_msg_to_vf(vf, opcode, retval, NULL, 0);
950}
951
952/**
953 * i40e_vc_get_version_msg
954 * @vf: pointer to the vf info
955 *
956 * called from the vf to request the API version used by the PF
957 **/
958static int i40e_vc_get_version_msg(struct i40e_vf *vf)
959{
960 struct i40e_virtchnl_version_info info = {
961 I40E_VIRTCHNL_VERSION_MAJOR, I40E_VIRTCHNL_VERSION_MINOR
962 };
963
964 return i40e_vc_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_VERSION,
965 I40E_SUCCESS, (u8 *)&info,
966 sizeof(struct
967 i40e_virtchnl_version_info));
968}
969
970/**
971 * i40e_vc_get_vf_resources_msg
972 * @vf: pointer to the vf info
973 * @msg: pointer to the msg buffer
974 * @msglen: msg length
975 *
976 * called from the vf to request its resources
977 **/
978static int i40e_vc_get_vf_resources_msg(struct i40e_vf *vf)
979{
980 struct i40e_virtchnl_vf_resource *vfres = NULL;
981 struct i40e_pf *pf = vf->pf;
982 i40e_status aq_ret = 0;
983 struct i40e_vsi *vsi;
984 int i = 0, len = 0;
985 int num_vsis = 1;
986 int ret;
987
988 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
989 aq_ret = I40E_ERR_PARAM;
990 goto err;
991 }
992
993 len = (sizeof(struct i40e_virtchnl_vf_resource) +
994 sizeof(struct i40e_virtchnl_vsi_resource) * num_vsis);
995
996 vfres = kzalloc(len, GFP_KERNEL);
997 if (!vfres) {
998 aq_ret = I40E_ERR_NO_MEMORY;
999 len = 0;
1000 goto err;
1001 }
1002
1003 vfres->vf_offload_flags = I40E_VIRTCHNL_VF_OFFLOAD_L2;
1004 vsi = pf->vsi[vf->lan_vsi_index];
1005 if (!vsi->info.pvid)
1006 vfres->vf_offload_flags |= I40E_VIRTCHNL_VF_OFFLOAD_VLAN;
1007
1008 vfres->num_vsis = num_vsis;
1009 vfres->num_queue_pairs = vf->num_queue_pairs;
1010 vfres->max_vectors = pf->hw.func_caps.num_msix_vectors_vf;
1011 if (vf->lan_vsi_index) {
1012 vfres->vsi_res[i].vsi_id = vf->lan_vsi_index;
1013 vfres->vsi_res[i].vsi_type = I40E_VSI_SRIOV;
1014 vfres->vsi_res[i].num_queue_pairs =
1015 pf->vsi[vf->lan_vsi_index]->num_queue_pairs;
1016 memcpy(vfres->vsi_res[i].default_mac_addr,
1017 vf->default_lan_addr.addr, ETH_ALEN);
1018 i++;
1019 }
1020 set_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states);
1021
1022err:
1023 /* send the response back to the vf */
1024 ret = i40e_vc_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_VF_RESOURCES,
1025 aq_ret, (u8 *)vfres, len);
1026
1027 kfree(vfres);
1028 return ret;
1029}
1030
1031/**
1032 * i40e_vc_reset_vf_msg
1033 * @vf: pointer to the vf info
1034 * @msg: pointer to the msg buffer
1035 * @msglen: msg length
1036 *
1037 * called from the vf to reset itself,
1038 * unlike other virtchnl messages, pf driver
1039 * doesn't send the response back to the vf
1040 **/
fc18eaa0 1041static void i40e_vc_reset_vf_msg(struct i40e_vf *vf)
5c3c48ac 1042{
fc18eaa0
MW		 1043 if (test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states))
1044 i40e_reset_vf(vf, false);
5c3c48ac
JB		 1045}
1046
1047/**
1048 * i40e_vc_config_promiscuous_mode_msg
1049 * @vf: pointer to the vf info
1050 * @msg: pointer to the msg buffer
1051 * @msglen: msg length
1052 *
1053 * called from the vf to configure the promiscuous mode of
1054 * vf vsis
1055 **/
1056static int i40e_vc_config_promiscuous_mode_msg(struct i40e_vf *vf,
1057 u8 *msg, u16 msglen)
1058{
1059 struct i40e_virtchnl_promisc_info *info =
1060 (struct i40e_virtchnl_promisc_info *)msg;
1061 struct i40e_pf *pf = vf->pf;
1062 struct i40e_hw *hw = &pf->hw;
1063 bool allmulti = false;
1064 bool promisc = false;
1065 i40e_status aq_ret;
1066
1067 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
1068 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) ||
1069 !i40e_vc_isvalid_vsi_id(vf, info->vsi_id) ||
1070 (pf->vsi[info->vsi_id]->type != I40E_VSI_FCOE)) {
1071 aq_ret = I40E_ERR_PARAM;
1072 goto error_param;
1073 }
1074
1075 if (info->flags & I40E_FLAG_VF_UNICAST_PROMISC)
1076 promisc = true;
1077 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(hw, info->vsi_id,
1078 promisc, NULL);
1079 if (aq_ret)
1080 goto error_param;
1081
1082 if (info->flags & I40E_FLAG_VF_MULTICAST_PROMISC)
1083 allmulti = true;
1084 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(hw, info->vsi_id,
1085 allmulti, NULL);
1086
1087error_param:
1088 /* send the response to the vf */
1089 return i40e_vc_send_resp_to_vf(vf,
1090 I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE,
1091 aq_ret);
1092}
1093
1094/**
1095 * i40e_vc_config_queues_msg
1096 * @vf: pointer to the vf info
1097 * @msg: pointer to the msg buffer
1098 * @msglen: msg length
1099 *
1100 * called from the vf to configure the rx/tx
1101 * queues
1102 **/
1103static int i40e_vc_config_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1104{
1105 struct i40e_virtchnl_vsi_queue_config_info *qci =
1106 (struct i40e_virtchnl_vsi_queue_config_info *)msg;
1107 struct i40e_virtchnl_queue_pair_info *qpi;
1108 u16 vsi_id, vsi_queue_id;
1109 i40e_status aq_ret = 0;
1110 int i;
1111
1112 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
1113 aq_ret = I40E_ERR_PARAM;
1114 goto error_param;
1115 }
1116
1117 vsi_id = qci->vsi_id;
1118 if (!i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1119 aq_ret = I40E_ERR_PARAM;
1120 goto error_param;
1121 }
1122 for (i = 0; i < qci->num_queue_pairs; i++) {
1123 qpi = &qci->qpair[i];
1124 vsi_queue_id = qpi->txq.queue_id;
1125 if ((qpi->txq.vsi_id != vsi_id) ||
1126 (qpi->rxq.vsi_id != vsi_id) ||
1127 (qpi->rxq.queue_id != vsi_queue_id) ||
1128 !i40e_vc_isvalid_queue_id(vf, vsi_id, vsi_queue_id)) {
1129 aq_ret = I40E_ERR_PARAM;
1130 goto error_param;
1131 }
1132
1133 if (i40e_config_vsi_rx_queue(vf, vsi_id, vsi_queue_id,
1134 &qpi->rxq) ||
1135 i40e_config_vsi_tx_queue(vf, vsi_id, vsi_queue_id,
1136 &qpi->txq)) {
1137 aq_ret = I40E_ERR_PARAM;
1138 goto error_param;
1139 }
1140 }
1141
1142error_param:
1143 /* send the response to the vf */
1144 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES,
1145 aq_ret);
1146}
1147
1148/**
1149 * i40e_vc_config_irq_map_msg
1150 * @vf: pointer to the vf info
1151 * @msg: pointer to the msg buffer
1152 * @msglen: msg length
1153 *
1154 * called from the vf to configure the irq to
1155 * queue map
1156 **/
1157static int i40e_vc_config_irq_map_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1158{
1159 struct i40e_virtchnl_irq_map_info *irqmap_info =
1160 (struct i40e_virtchnl_irq_map_info *)msg;
1161 struct i40e_virtchnl_vector_map *map;
1162 u16 vsi_id, vsi_queue_id, vector_id;
1163 i40e_status aq_ret = 0;
1164 unsigned long tempmap;
1165 int i;
1166
1167 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
1168 aq_ret = I40E_ERR_PARAM;
1169 goto error_param;
1170 }
1171
1172 for (i = 0; i < irqmap_info->num_vectors; i++) {
1173 map = &irqmap_info->vecmap[i];
1174
1175 vector_id = map->vector_id;
1176 vsi_id = map->vsi_id;
1177 /* validate msg params */
1178 if (!i40e_vc_isvalid_vector_id(vf, vector_id) ||
1179 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1180 aq_ret = I40E_ERR_PARAM;
1181 goto error_param;
1182 }
1183
1184 /* lookout for the invalid queue index */
1185 tempmap = map->rxq_map;
4836650b 1186 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
5c3c48ac
JB		 1187 if (!i40e_vc_isvalid_queue_id(vf, vsi_id,
1188 vsi_queue_id)) {
1189 aq_ret = I40E_ERR_PARAM;
1190 goto error_param;
1191 }
5c3c48ac
JB		 1192 }
1193
1194 tempmap = map->txq_map;
4836650b 1195 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
5c3c48ac
JB		 1196 if (!i40e_vc_isvalid_queue_id(vf, vsi_id,
1197 vsi_queue_id)) {
1198 aq_ret = I40E_ERR_PARAM;
1199 goto error_param;
1200 }
5c3c48ac
JB		 1201 }
1202
1203 i40e_config_irq_link_list(vf, vsi_id, map);
1204 }
1205error_param:
1206 /* send the response to the vf */
1207 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP,
1208 aq_ret);
1209}
1210
1211/**
1212 * i40e_vc_enable_queues_msg
1213 * @vf: pointer to the vf info
1214 * @msg: pointer to the msg buffer
1215 * @msglen: msg length
1216 *
1217 * called from the vf to enable all or specific queue(s)
1218 **/
1219static int i40e_vc_enable_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1220{
1221 struct i40e_virtchnl_queue_select *vqs =
1222 (struct i40e_virtchnl_queue_select *)msg;
1223 struct i40e_pf *pf = vf->pf;
1224 u16 vsi_id = vqs->vsi_id;
1225 i40e_status aq_ret = 0;
5c3c48ac
JB		 1226
1227 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
1228 aq_ret = I40E_ERR_PARAM;
1229 goto error_param;
1230 }
1231
1232 if (!i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1233 aq_ret = I40E_ERR_PARAM;
1234 goto error_param;
1235 }
1236
1237 if ((0 == vqs->rx_queues) && (0 == vqs->tx_queues)) {
1238 aq_ret = I40E_ERR_PARAM;
1239 goto error_param;
1240 }
88f6563d
MW		 1241 if (i40e_vsi_control_rings(pf->vsi[vsi_id], true))
1242 aq_ret = I40E_ERR_TIMEOUT;
5c3c48ac
JB		 1243error_param:
1244 /* send the response to the vf */
1245 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_ENABLE_QUEUES,
1246 aq_ret);
1247}
1248
1249/**
1250 * i40e_vc_disable_queues_msg
1251 * @vf: pointer to the vf info
1252 * @msg: pointer to the msg buffer
1253 * @msglen: msg length
1254 *
1255 * called from the vf to disable all or specific
1256 * queue(s)
1257 **/
1258static int i40e_vc_disable_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1259{
1260 struct i40e_virtchnl_queue_select *vqs =
1261 (struct i40e_virtchnl_queue_select *)msg;
1262 struct i40e_pf *pf = vf->pf;
1263 u16 vsi_id = vqs->vsi_id;
1264 i40e_status aq_ret = 0;
5c3c48ac
JB		 1265
1266 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
1267 aq_ret = I40E_ERR_PARAM;
1268 goto error_param;
1269 }
1270
1271 if (!i40e_vc_isvalid_vsi_id(vf, vqs->vsi_id)) {
1272 aq_ret = I40E_ERR_PARAM;
1273 goto error_param;
1274 }
1275
1276 if ((0 == vqs->rx_queues) && (0 == vqs->tx_queues)) {
1277 aq_ret = I40E_ERR_PARAM;
1278 goto error_param;
1279 }
88f6563d
MW		 1280 if (i40e_vsi_control_rings(pf->vsi[vsi_id], false))
1281 aq_ret = I40E_ERR_TIMEOUT;
5c3c48ac
JB		 1282
1283error_param:
1284 /* send the response to the vf */
1285 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_DISABLE_QUEUES,
1286 aq_ret);
1287}
1288
1289/**
1290 * i40e_vc_get_stats_msg
1291 * @vf: pointer to the vf info
1292 * @msg: pointer to the msg buffer
1293 * @msglen: msg length
1294 *
1295 * called from the vf to get vsi stats
1296 **/
1297static int i40e_vc_get_stats_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1298{
1299 struct i40e_virtchnl_queue_select *vqs =
1300 (struct i40e_virtchnl_queue_select *)msg;
1301 struct i40e_pf *pf = vf->pf;
1302 struct i40e_eth_stats stats;
1303 i40e_status aq_ret = 0;
1304 struct i40e_vsi *vsi;
1305
1306 memset(&stats, 0, sizeof(struct i40e_eth_stats));
1307
1308 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
1309 aq_ret = I40E_ERR_PARAM;
1310 goto error_param;
1311 }
1312
1313 if (!i40e_vc_isvalid_vsi_id(vf, vqs->vsi_id)) {
1314 aq_ret = I40E_ERR_PARAM;
1315 goto error_param;
1316 }
1317
1318 vsi = pf->vsi[vqs->vsi_id];
1319 if (!vsi) {
1320 aq_ret = I40E_ERR_PARAM;
1321 goto error_param;
1322 }
1323 i40e_update_eth_stats(vsi);
5a9769c8 1324 stats = vsi->eth_stats;
5c3c48ac
JB		 1325
1326error_param:
1327 /* send the response back to the vf */
1328 return i40e_vc_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_STATS, aq_ret,
1329 (u8 *)&stats, sizeof(stats));
1330}
1331
f657a6e1
GR		 1332/**
1333 * i40e_check_vf_permission
1334 * @vf: pointer to the vf info
1335 * @macaddr: pointer to the MAC Address being checked
1336 *
1337 * Check if the VF has permission to add or delete unicast MAC address
1338 * filters and return error code -EPERM if not. Then check if the
1339 * address filter requested is broadcast or zero and if so return
1340 * an invalid MAC address error code.
1341 **/
1342static inline int i40e_check_vf_permission(struct i40e_vf *vf, u8 *macaddr)
1343{
1344 struct i40e_pf *pf = vf->pf;
1345 int ret = 0;
1346
1347 if (is_broadcast_ether_addr(macaddr) ||
1348 is_zero_ether_addr(macaddr)) {
1349 dev_err(&pf->pdev->dev, "invalid VF MAC addr %pM\n", macaddr);
1350 ret = I40E_ERR_INVALID_MAC_ADDR;
5017c2a8
GR		 1351 } else if (vf->pf_set_mac && !is_multicast_ether_addr(macaddr) &&
1352 !ether_addr_equal(macaddr, vf->default_lan_addr.addr)) {
f657a6e1
GR		 1353 /* If the host VMM administrator has set the VF MAC address
1354 * administratively via the ndo_set_vf_mac command then deny
1355 * permission to the VF to add or delete unicast MAC addresses.
5017c2a8
GR		 1356 * The VF may request to set the MAC address filter already
1357 * assigned to it so do not return an error in that case.
f657a6e1
GR		 1358 */
1359 dev_err(&pf->pdev->dev,
1360 "VF attempting to override administratively set MAC address\nPlease reload the VF driver to resume normal operation\n");
1361 ret = -EPERM;
1362 }
1363 return ret;
1364}
1365
5c3c48ac
JB		 1366/**
1367 * i40e_vc_add_mac_addr_msg
1368 * @vf: pointer to the vf info
1369 * @msg: pointer to the msg buffer
1370 * @msglen: msg length
1371 *
1372 * add guest mac address filter
1373 **/
1374static int i40e_vc_add_mac_addr_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1375{
1376 struct i40e_virtchnl_ether_addr_list *al =
1377 (struct i40e_virtchnl_ether_addr_list *)msg;
1378 struct i40e_pf *pf = vf->pf;
1379 struct i40e_vsi *vsi = NULL;
1380 u16 vsi_id = al->vsi_id;
f657a6e1 1381 i40e_status ret = 0;
5c3c48ac
JB		 1382 int i;
1383
1384 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
1385 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) ||
1386 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
f657a6e1 1387 ret = I40E_ERR_PARAM;
5c3c48ac
JB		 1388 goto error_param;
1389 }
1390
1391 for (i = 0; i < al->num_elements; i++) {
f657a6e1
GR		 1392 ret = i40e_check_vf_permission(vf, al->list[i].addr);
1393 if (ret)
5c3c48ac 1394 goto error_param;
5c3c48ac
JB		 1395 }
1396 vsi = pf->vsi[vsi_id];
1397
1398 /* add new addresses to the list */
1399 for (i = 0; i < al->num_elements; i++) {
1400 struct i40e_mac_filter *f;
1401
1402 f = i40e_find_mac(vsi, al->list[i].addr, true, false);
7e68edf9 1403 if (!f) {
5c3c48ac
JB		 1404 if (i40e_is_vsi_in_vlan(vsi))
1405 f = i40e_put_mac_in_vlan(vsi, al->list[i].addr,
1406 true, false);
1407 else
1408 f = i40e_add_filter(vsi, al->list[i].addr, -1,
1409 true, false);
1410 }
1411
1412 if (!f) {
1413 dev_err(&pf->pdev->dev,
1414 "Unable to add VF MAC filter\n");
f657a6e1 1415 ret = I40E_ERR_PARAM;
5c3c48ac
JB		 1416 goto error_param;
1417 }
1418 }
1419
1420 /* program the updated filter list */
1421 if (i40e_sync_vsi_filters(vsi))
1422 dev_err(&pf->pdev->dev, "Unable to program VF MAC filters\n");
1423
1424error_param:
1425 /* send the response to the vf */
1426 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS,
f657a6e1 1427 ret);
5c3c48ac
JB		 1428}
1429
1430/**
1431 * i40e_vc_del_mac_addr_msg
1432 * @vf: pointer to the vf info
1433 * @msg: pointer to the msg buffer
1434 * @msglen: msg length
1435 *
1436 * remove guest mac address filter
1437 **/
1438static int i40e_vc_del_mac_addr_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1439{
1440 struct i40e_virtchnl_ether_addr_list *al =
1441 (struct i40e_virtchnl_ether_addr_list *)msg;
1442 struct i40e_pf *pf = vf->pf;
1443 struct i40e_vsi *vsi = NULL;
1444 u16 vsi_id = al->vsi_id;
f657a6e1 1445 i40e_status ret = 0;
5c3c48ac
JB		 1446 int i;
1447
1448 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
1449 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) ||
1450 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
f657a6e1 1451 ret = I40E_ERR_PARAM;
5c3c48ac
JB		 1452 goto error_param;
1453 }
f657a6e1
GR		 1454
1455 for (i = 0; i < al->num_elements; i++) {
1456 ret = i40e_check_vf_permission(vf, al->list[i].addr);
1457 if (ret)
1458 goto error_param;
1459 }
5c3c48ac
JB		 1460 vsi = pf->vsi[vsi_id];
1461
1462 /* delete addresses from the list */
1463 for (i = 0; i < al->num_elements; i++)
1464 i40e_del_filter(vsi, al->list[i].addr,
1465 I40E_VLAN_ANY, true, false);
1466
1467 /* program the updated filter list */
1468 if (i40e_sync_vsi_filters(vsi))
1469 dev_err(&pf->pdev->dev, "Unable to program VF MAC filters\n");
1470
1471error_param:
1472 /* send the response to the vf */
1473 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS,
f657a6e1 1474 ret);
5c3c48ac
JB		 1475}
1476
1477/**
1478 * i40e_vc_add_vlan_msg
1479 * @vf: pointer to the vf info
1480 * @msg: pointer to the msg buffer
1481 * @msglen: msg length
1482 *
1483 * program guest vlan id
1484 **/
1485static int i40e_vc_add_vlan_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1486{
1487 struct i40e_virtchnl_vlan_filter_list *vfl =
1488 (struct i40e_virtchnl_vlan_filter_list *)msg;
1489 struct i40e_pf *pf = vf->pf;
1490 struct i40e_vsi *vsi = NULL;
1491 u16 vsi_id = vfl->vsi_id;
1492 i40e_status aq_ret = 0;
1493 int i;
1494
1495 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
1496 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) ||
1497 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1498 aq_ret = I40E_ERR_PARAM;
1499 goto error_param;
1500 }
1501
1502 for (i = 0; i < vfl->num_elements; i++) {
1503 if (vfl->vlan_id[i] > I40E_MAX_VLANID) {
1504 aq_ret = I40E_ERR_PARAM;
1505 dev_err(&pf->pdev->dev,
1506 "invalid VF VLAN id %d\n", vfl->vlan_id[i]);
1507 goto error_param;
1508 }
1509 }
1510 vsi = pf->vsi[vsi_id];
1511 if (vsi->info.pvid) {
1512 aq_ret = I40E_ERR_PARAM;
1513 goto error_param;
1514 }
1515
1516 i40e_vlan_stripping_enable(vsi);
1517 for (i = 0; i < vfl->num_elements; i++) {
1518 /* add new VLAN filter */
1519 int ret = i40e_vsi_add_vlan(vsi, vfl->vlan_id[i]);
1520 if (ret)
1521 dev_err(&pf->pdev->dev,
1522 "Unable to add VF vlan filter %d, error %d\n",
1523 vfl->vlan_id[i], ret);
1524 }
1525
1526error_param:
1527 /* send the response to the vf */
1528 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_ADD_VLAN, aq_ret);
1529}
1530
1531/**
1532 * i40e_vc_remove_vlan_msg
1533 * @vf: pointer to the vf info
1534 * @msg: pointer to the msg buffer
1535 * @msglen: msg length
1536 *
1537 * remove programmed guest vlan id
1538 **/
1539static int i40e_vc_remove_vlan_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1540{
1541 struct i40e_virtchnl_vlan_filter_list *vfl =
1542 (struct i40e_virtchnl_vlan_filter_list *)msg;
1543 struct i40e_pf *pf = vf->pf;
1544 struct i40e_vsi *vsi = NULL;
1545 u16 vsi_id = vfl->vsi_id;
1546 i40e_status aq_ret = 0;
1547 int i;
1548
1549 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
1550 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) ||
1551 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1552 aq_ret = I40E_ERR_PARAM;
1553 goto error_param;
1554 }
1555
1556 for (i = 0; i < vfl->num_elements; i++) {
1557 if (vfl->vlan_id[i] > I40E_MAX_VLANID) {
1558 aq_ret = I40E_ERR_PARAM;
1559 goto error_param;
1560 }
1561 }
1562
1563 vsi = pf->vsi[vsi_id];
1564 if (vsi->info.pvid) {
1565 aq_ret = I40E_ERR_PARAM;
1566 goto error_param;
1567 }
1568
1569 for (i = 0; i < vfl->num_elements; i++) {
1570 int ret = i40e_vsi_kill_vlan(vsi, vfl->vlan_id[i]);
1571 if (ret)
1572 dev_err(&pf->pdev->dev,
1573 "Unable to delete VF vlan filter %d, error %d\n",
1574 vfl->vlan_id[i], ret);
1575 }
1576
1577error_param:
1578 /* send the response to the vf */
1579 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_DEL_VLAN, aq_ret);
1580}
1581
5c3c48ac
JB		 1582/**
1583 * i40e_vc_validate_vf_msg
1584 * @vf: pointer to the vf info
1585 * @msg: pointer to the msg buffer
1586 * @msglen: msg length
1587 * @msghndl: msg handle
1588 *
1589 * validate msg
1590 **/
1591static int i40e_vc_validate_vf_msg(struct i40e_vf *vf, u32 v_opcode,
1592 u32 v_retval, u8 *msg, u16 msglen)
1593{
1594 bool err_msg_format = false;
1595 int valid_len;
1596
1597 /* Check if VF is disabled. */
1598 if (test_bit(I40E_VF_STAT_DISABLED, &vf->vf_states))
1599 return I40E_ERR_PARAM;
1600
1601 /* Validate message length. */
1602 switch (v_opcode) {
1603 case I40E_VIRTCHNL_OP_VERSION:
1604 valid_len = sizeof(struct i40e_virtchnl_version_info);
1605 break;
1606 case I40E_VIRTCHNL_OP_RESET_VF:
1607 case I40E_VIRTCHNL_OP_GET_VF_RESOURCES:
1608 valid_len = 0;
1609 break;
1610 case I40E_VIRTCHNL_OP_CONFIG_TX_QUEUE:
1611 valid_len = sizeof(struct i40e_virtchnl_txq_info);
1612 break;
1613 case I40E_VIRTCHNL_OP_CONFIG_RX_QUEUE:
1614 valid_len = sizeof(struct i40e_virtchnl_rxq_info);
1615 break;
1616 case I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES:
1617 valid_len = sizeof(struct i40e_virtchnl_vsi_queue_config_info);
1618 if (msglen >= valid_len) {
1619 struct i40e_virtchnl_vsi_queue_config_info *vqc =
1620 (struct i40e_virtchnl_vsi_queue_config_info *)msg;
1621 valid_len += (vqc->num_queue_pairs *
1622 sizeof(struct
1623 i40e_virtchnl_queue_pair_info));
1624 if (vqc->num_queue_pairs == 0)
1625 err_msg_format = true;
1626 }
1627 break;
1628 case I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP:
1629 valid_len = sizeof(struct i40e_virtchnl_irq_map_info);
1630 if (msglen >= valid_len) {
1631 struct i40e_virtchnl_irq_map_info *vimi =
1632 (struct i40e_virtchnl_irq_map_info *)msg;
1633 valid_len += (vimi->num_vectors *
1634 sizeof(struct i40e_virtchnl_vector_map));
1635 if (vimi->num_vectors == 0)
1636 err_msg_format = true;
1637 }
1638 break;
1639 case I40E_VIRTCHNL_OP_ENABLE_QUEUES:
1640 case I40E_VIRTCHNL_OP_DISABLE_QUEUES:
1641 valid_len = sizeof(struct i40e_virtchnl_queue_select);
1642 break;
1643 case I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS:
1644 case I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS:
1645 valid_len = sizeof(struct i40e_virtchnl_ether_addr_list);
1646 if (msglen >= valid_len) {
1647 struct i40e_virtchnl_ether_addr_list *veal =
1648 (struct i40e_virtchnl_ether_addr_list *)msg;
1649 valid_len += veal->num_elements *
1650 sizeof(struct i40e_virtchnl_ether_addr);
1651 if (veal->num_elements == 0)
1652 err_msg_format = true;
1653 }
1654 break;
1655 case I40E_VIRTCHNL_OP_ADD_VLAN:
1656 case I40E_VIRTCHNL_OP_DEL_VLAN:
1657 valid_len = sizeof(struct i40e_virtchnl_vlan_filter_list);
1658 if (msglen >= valid_len) {
1659 struct i40e_virtchnl_vlan_filter_list *vfl =
1660 (struct i40e_virtchnl_vlan_filter_list *)msg;
1661 valid_len += vfl->num_elements * sizeof(u16);
1662 if (vfl->num_elements == 0)
1663 err_msg_format = true;
1664 }
1665 break;
1666 case I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE:
1667 valid_len = sizeof(struct i40e_virtchnl_promisc_info);
1668 break;
1669 case I40E_VIRTCHNL_OP_GET_STATS:
1670 valid_len = sizeof(struct i40e_virtchnl_queue_select);
1671 break;
1672 /* These are always errors coming from the VF. */
1673 case I40E_VIRTCHNL_OP_EVENT:
1674 case I40E_VIRTCHNL_OP_UNKNOWN:
1675 default:
1676 return -EPERM;
1677 break;
1678 }
1679 /* few more checks */
1680 if ((valid_len != msglen) || (err_msg_format)) {
1681 i40e_vc_send_resp_to_vf(vf, v_opcode, I40E_ERR_PARAM);
1682 return -EINVAL;
1683 } else {
1684 return 0;
1685 }
1686}
1687
1688/**
1689 * i40e_vc_process_vf_msg
1690 * @pf: pointer to the pf structure
1691 * @vf_id: source vf id
1692 * @msg: pointer to the msg buffer
1693 * @msglen: msg length
1694 * @msghndl: msg handle
1695 *
1696 * called from the common aeq/arq handler to
1697 * process request from vf
1698 **/
1699int i40e_vc_process_vf_msg(struct i40e_pf *pf, u16 vf_id, u32 v_opcode,
1700 u32 v_retval, u8 *msg, u16 msglen)
1701{
5c3c48ac 1702 struct i40e_hw *hw = &pf->hw;
7efa84b7 1703 int local_vf_id = vf_id - hw->func_caps.vf_base_id;
6c1b5bff 1704 struct i40e_vf *vf;
5c3c48ac
JB		 1705 int ret;
1706
1707 pf->vf_aq_requests++;
7efa84b7 1708 if (local_vf_id >= pf->num_alloc_vfs)
6c1b5bff 1709 return -EINVAL;
7efa84b7 1710 vf = &(pf->vf[local_vf_id]);
5c3c48ac
JB		 1711 /* perform basic checks on the msg */
1712 ret = i40e_vc_validate_vf_msg(vf, v_opcode, v_retval, msg, msglen);
1713
1714 if (ret) {
499ec80f 1715 dev_err(&pf->pdev->dev, "Invalid message from vf %d, opcode %d, len %d\n",
7efa84b7 1716 local_vf_id, v_opcode, msglen);
5c3c48ac
JB		 1717 return ret;
1718 }
7efa84b7 1719 wr32(hw, I40E_VFGEN_RSTAT1(local_vf_id), I40E_VFR_VFACTIVE);
5c3c48ac
JB		 1720 switch (v_opcode) {
1721 case I40E_VIRTCHNL_OP_VERSION:
1722 ret = i40e_vc_get_version_msg(vf);
1723 break;
1724 case I40E_VIRTCHNL_OP_GET_VF_RESOURCES:
1725 ret = i40e_vc_get_vf_resources_msg(vf);
1726 break;
1727 case I40E_VIRTCHNL_OP_RESET_VF:
fc18eaa0
MW		 1728 i40e_vc_reset_vf_msg(vf);
1729 ret = 0;
5c3c48ac
JB		 1730 break;
1731 case I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE:
1732 ret = i40e_vc_config_promiscuous_mode_msg(vf, msg, msglen);
1733 break;
1734 case I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES:
1735 ret = i40e_vc_config_queues_msg(vf, msg, msglen);
1736 break;
1737 case I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP:
1738 ret = i40e_vc_config_irq_map_msg(vf, msg, msglen);
1739 break;
1740 case I40E_VIRTCHNL_OP_ENABLE_QUEUES:
1741 ret = i40e_vc_enable_queues_msg(vf, msg, msglen);
1742 break;
1743 case I40E_VIRTCHNL_OP_DISABLE_QUEUES:
1744 ret = i40e_vc_disable_queues_msg(vf, msg, msglen);
1745 break;
1746 case I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS:
1747 ret = i40e_vc_add_mac_addr_msg(vf, msg, msglen);
1748 break;
1749 case I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS:
1750 ret = i40e_vc_del_mac_addr_msg(vf, msg, msglen);
1751 break;
1752 case I40E_VIRTCHNL_OP_ADD_VLAN:
1753 ret = i40e_vc_add_vlan_msg(vf, msg, msglen);
1754 break;
1755 case I40E_VIRTCHNL_OP_DEL_VLAN:
1756 ret = i40e_vc_remove_vlan_msg(vf, msg, msglen);
1757 break;
1758 case I40E_VIRTCHNL_OP_GET_STATS:
1759 ret = i40e_vc_get_stats_msg(vf, msg, msglen);
1760 break;
5c3c48ac
JB		 1761 case I40E_VIRTCHNL_OP_UNKNOWN:
1762 default:
7efa84b7
MW		 1763 dev_err(&pf->pdev->dev, "Unsupported opcode %d from vf %d\n",
1764 v_opcode, local_vf_id);
5c3c48ac
JB		 1765 ret = i40e_vc_send_resp_to_vf(vf, v_opcode,
1766 I40E_ERR_NOT_IMPLEMENTED);
1767 break;
1768 }
1769
1770 return ret;
1771}
1772
1773/**
1774 * i40e_vc_process_vflr_event
1775 * @pf: pointer to the pf structure
1776 *
1777 * called from the vlfr irq handler to
1778 * free up vf resources and state variables
1779 **/
1780int i40e_vc_process_vflr_event(struct i40e_pf *pf)
1781{
1782 u32 reg, reg_idx, bit_idx, vf_id;
1783 struct i40e_hw *hw = &pf->hw;
1784 struct i40e_vf *vf;
1785
1786 if (!test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
1787 return 0;
1788
1789 clear_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
1790 for (vf_id = 0; vf_id < pf->num_alloc_vfs; vf_id++) {
1791 reg_idx = (hw->func_caps.vf_base_id + vf_id) / 32;
1792 bit_idx = (hw->func_caps.vf_base_id + vf_id) % 32;
1793 /* read GLGEN_VFLRSTAT register to find out the flr vfs */
1794 vf = &pf->vf[vf_id];
1795 reg = rd32(hw, I40E_GLGEN_VFLRSTAT(reg_idx));
1796 if (reg & (1 << bit_idx)) {
1797 /* clear the bit in GLGEN_VFLRSTAT */
1798 wr32(hw, I40E_GLGEN_VFLRSTAT(reg_idx), (1 << bit_idx));
1799
fc18eaa0 1800 i40e_reset_vf(vf, true);
5c3c48ac
JB		 1801 }
1802 }
1803
1804 /* re-enable vflr interrupt cause */
1805 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
1806 reg |= I40E_PFINT_ICR0_ENA_VFLR_MASK;
1807 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
1808 i40e_flush(hw);
1809
1810 return 0;
1811}
1812
1813/**
1814 * i40e_vc_vf_broadcast
1815 * @pf: pointer to the pf structure
1816 * @opcode: operation code
1817 * @retval: return value
1818 * @msg: pointer to the msg buffer
1819 * @msglen: msg length
1820 *
1821 * send a message to all VFs on a given PF
1822 **/
1823static void i40e_vc_vf_broadcast(struct i40e_pf *pf,
1824 enum i40e_virtchnl_ops v_opcode,
1825 i40e_status v_retval, u8 *msg,
1826 u16 msglen)
1827{
1828 struct i40e_hw *hw = &pf->hw;
1829 struct i40e_vf *vf = pf->vf;
1830 int i;
1831
1832 for (i = 0; i < pf->num_alloc_vfs; i++) {
1833 /* Ignore return value on purpose - a given VF may fail, but
1834 * we need to keep going and send to all of them
1835 */
1836 i40e_aq_send_msg_to_vf(hw, vf->vf_id, v_opcode, v_retval,
1837 msg, msglen, NULL);
1838 vf++;
1839 }
1840}
1841
1842/**
1843 * i40e_vc_notify_link_state
1844 * @pf: pointer to the pf structure
1845 *
1846 * send a link status message to all VFs on a given PF
1847 **/
1848void i40e_vc_notify_link_state(struct i40e_pf *pf)
1849{
1850 struct i40e_virtchnl_pf_event pfe;
1851
1852 pfe.event = I40E_VIRTCHNL_EVENT_LINK_CHANGE;
1853 pfe.severity = I40E_PF_EVENT_SEVERITY_INFO;
1854 pfe.event_data.link_event.link_status =
1855 pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP;
1856 pfe.event_data.link_event.link_speed = pf->hw.phy.link_info.link_speed;
1857
1858 i40e_vc_vf_broadcast(pf, I40E_VIRTCHNL_OP_EVENT, I40E_SUCCESS,
1859 (u8 *)&pfe, sizeof(struct i40e_virtchnl_pf_event));
1860}
1861
1862/**
1863 * i40e_vc_notify_reset
1864 * @pf: pointer to the pf structure
1865 *
1866 * indicate a pending reset to all VFs on a given PF
1867 **/
1868void i40e_vc_notify_reset(struct i40e_pf *pf)
1869{
1870 struct i40e_virtchnl_pf_event pfe;
1871
1872 pfe.event = I40E_VIRTCHNL_EVENT_RESET_IMPENDING;
1873 pfe.severity = I40E_PF_EVENT_SEVERITY_CERTAIN_DOOM;
1874 i40e_vc_vf_broadcast(pf, I40E_VIRTCHNL_OP_EVENT, I40E_SUCCESS,
1875 (u8 *)&pfe, sizeof(struct i40e_virtchnl_pf_event));
1876}
1877
1878/**
1879 * i40e_vc_notify_vf_reset
1880 * @vf: pointer to the vf structure
1881 *
1882 * indicate a pending reset to the given VF
1883 **/
1884void i40e_vc_notify_vf_reset(struct i40e_vf *vf)
1885{
1886 struct i40e_virtchnl_pf_event pfe;
1887
1888 pfe.event = I40E_VIRTCHNL_EVENT_RESET_IMPENDING;
1889 pfe.severity = I40E_PF_EVENT_SEVERITY_CERTAIN_DOOM;
1890 i40e_aq_send_msg_to_vf(&vf->pf->hw, vf->vf_id, I40E_VIRTCHNL_OP_EVENT,
1891 I40E_SUCCESS, (u8 *)&pfe,
1892 sizeof(struct i40e_virtchnl_pf_event), NULL);
1893}
1894
1895/**
1896 * i40e_ndo_set_vf_mac
1897 * @netdev: network interface device structure
1898 * @vf_id: vf identifier
1899 * @mac: mac address
1900 *
1901 * program vf mac address
1902 **/
1903int i40e_ndo_set_vf_mac(struct net_device *netdev, int vf_id, u8 *mac)
1904{
1905 struct i40e_netdev_priv *np = netdev_priv(netdev);
1906 struct i40e_vsi *vsi = np->vsi;
1907 struct i40e_pf *pf = vsi->back;
1908 struct i40e_mac_filter *f;
1909 struct i40e_vf *vf;
1910 int ret = 0;
1911
1912 /* validate the request */
1913 if (vf_id >= pf->num_alloc_vfs) {
1914 dev_err(&pf->pdev->dev,
1915 "Invalid VF Identifier %d\n", vf_id);
1916 ret = -EINVAL;
1917 goto error_param;
1918 }
1919
1920 vf = &(pf->vf[vf_id]);
1921 vsi = pf->vsi[vf->lan_vsi_index];
1922 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
1923 dev_err(&pf->pdev->dev,
1924 "Uninitialized VF %d\n", vf_id);
1925 ret = -EINVAL;
1926 goto error_param;
1927 }
1928
1929 if (!is_valid_ether_addr(mac)) {
1930 dev_err(&pf->pdev->dev,
1931 "Invalid VF ethernet address\n");
1932 ret = -EINVAL;
1933 goto error_param;
1934 }
1935
1936 /* delete the temporary mac address */
1937 i40e_del_filter(vsi, vf->default_lan_addr.addr, 0, true, false);
1938
1939 /* add the new mac address */
1940 f = i40e_add_filter(vsi, mac, 0, true, false);
1941 if (!f) {
1942 dev_err(&pf->pdev->dev,
1943 "Unable to add VF ucast filter\n");
1944 ret = -ENOMEM;
1945 goto error_param;
1946 }
1947
1948 dev_info(&pf->pdev->dev, "Setting MAC %pM on VF %d\n", mac, vf_id);
1949 /* program mac filter */
1950 if (i40e_sync_vsi_filters(vsi)) {
1951 dev_err(&pf->pdev->dev, "Unable to program ucast filters\n");
1952 ret = -EIO;
1953 goto error_param;
1954 }
1955 memcpy(vf->default_lan_addr.addr, mac, ETH_ALEN);
f657a6e1 1956 vf->pf_set_mac = true;
5c3c48ac
JB		 1957 dev_info(&pf->pdev->dev, "Reload the VF driver to make this change effective.\n");
1958 ret = 0;
1959
1960error_param:
1961 return ret;
1962}
1963
1964/**
1965 * i40e_ndo_set_vf_port_vlan
1966 * @netdev: network interface device structure
1967 * @vf_id: vf identifier
1968 * @vlan_id: mac address
1969 * @qos: priority setting
1970 *
1971 * program vf vlan id and/or qos
1972 **/
1973int i40e_ndo_set_vf_port_vlan(struct net_device *netdev,
1974 int vf_id, u16 vlan_id, u8 qos)
1975{
1976 struct i40e_netdev_priv *np = netdev_priv(netdev);
1977 struct i40e_pf *pf = np->vsi->back;
1978 struct i40e_vsi *vsi;
1979 struct i40e_vf *vf;
1980 int ret = 0;
1981
1982 /* validate the request */
1983 if (vf_id >= pf->num_alloc_vfs) {
1984 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
1985 ret = -EINVAL;
1986 goto error_pvid;
1987 }
1988
1989 if ((vlan_id > I40E_MAX_VLANID) || (qos > 7)) {
1990 dev_err(&pf->pdev->dev, "Invalid VF Parameters\n");
1991 ret = -EINVAL;
1992 goto error_pvid;
1993 }
1994
1995 vf = &(pf->vf[vf_id]);
1996 vsi = pf->vsi[vf->lan_vsi_index];
1997 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
1998 dev_err(&pf->pdev->dev, "Uninitialized VF %d\n", vf_id);
1999 ret = -EINVAL;
2000 goto error_pvid;
2001 }
2002
2003 if (vsi->info.pvid) {
2004 /* kill old VLAN */
2005 ret = i40e_vsi_kill_vlan(vsi, (le16_to_cpu(vsi->info.pvid) &
2006 VLAN_VID_MASK));
2007 if (ret) {
2008 dev_info(&vsi->back->pdev->dev,
2009 "remove VLAN failed, ret=%d, aq_err=%d\n",
2010 ret, pf->hw.aq.asq_last_status);
2011 }
2012 }
2013 if (vlan_id || qos)
2014 ret = i40e_vsi_add_pvid(vsi,
2015 vlan_id | (qos << I40E_VLAN_PRIORITY_SHIFT));
2016 else
6c12fcbf 2017 i40e_vsi_remove_pvid(vsi);
5c3c48ac
JB		 2018
2019 if (vlan_id) {
2020 dev_info(&pf->pdev->dev, "Setting VLAN %d, QOS 0x%x on VF %d\n",
2021 vlan_id, qos, vf_id);
2022
2023 /* add new VLAN filter */
2024 ret = i40e_vsi_add_vlan(vsi, vlan_id);
2025 if (ret) {
2026 dev_info(&vsi->back->pdev->dev,
2027 "add VF VLAN failed, ret=%d aq_err=%d\n", ret,
2028 vsi->back->hw.aq.asq_last_status);
2029 goto error_pvid;
2030 }
2031 }
2032
2033 if (ret) {
2034 dev_err(&pf->pdev->dev, "Unable to update VF vsi context\n");
2035 goto error_pvid;
2036 }
6c12fcbf
GR		 2037 /* The Port VLAN needs to be saved across resets the same as the
2038 * default LAN MAC address.
2039 */
2040 vf->port_vlan_id = le16_to_cpu(vsi->info.pvid);
5c3c48ac
JB		 2041 ret = 0;
2042
2043error_pvid:
2044 return ret;
2045}
2046
2047/**
2048 * i40e_ndo_set_vf_bw
2049 * @netdev: network interface device structure
2050 * @vf_id: vf identifier
2051 * @tx_rate: tx rate
2052 *
2053 * configure vf tx rate
2054 **/
2055int i40e_ndo_set_vf_bw(struct net_device *netdev, int vf_id, int tx_rate)
2056{
2057 return -EOPNOTSUPP;
2058}
2059
2060/**
2061 * i40e_ndo_get_vf_config
2062 * @netdev: network interface device structure
2063 * @vf_id: vf identifier
2064 * @ivi: vf configuration structure
2065 *
2066 * return vf configuration
2067 **/
2068int i40e_ndo_get_vf_config(struct net_device *netdev,
2069 int vf_id, struct ifla_vf_info *ivi)
2070{
2071 struct i40e_netdev_priv *np = netdev_priv(netdev);
5c3c48ac
JB		 2072 struct i40e_vsi *vsi = np->vsi;
2073 struct i40e_pf *pf = vsi->back;
2074 struct i40e_vf *vf;
2075 int ret = 0;
2076
2077 /* validate the request */
2078 if (vf_id >= pf->num_alloc_vfs) {
2079 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
2080 ret = -EINVAL;
2081 goto error_param;
2082 }
2083
2084 vf = &(pf->vf[vf_id]);
2085 /* first vsi is always the LAN vsi */
2086 vsi = pf->vsi[vf->lan_vsi_index];
2087 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
2088 dev_err(&pf->pdev->dev, "Uninitialized VF %d\n", vf_id);
2089 ret = -EINVAL;
2090 goto error_param;
2091 }
2092
2093 ivi->vf = vf_id;
2094
f4a1c5cf 2095 memcpy(&ivi->mac, vf->default_lan_addr.addr, ETH_ALEN);
5c3c48ac
JB		 2096
2097 ivi->tx_rate = 0;
2098 ivi->vlan = le16_to_cpu(vsi->info.pvid) & I40E_VLAN_MASK;
2099 ivi->qos = (le16_to_cpu(vsi->info.pvid) & I40E_PRIORITY_MASK) >>
2100 I40E_VLAN_PRIORITY_SHIFT;
2101 ret = 0;
2102
2103error_param:
2104 return ret;
2105}
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