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i40e: acknowledge VFLR when disabling SR-IOV
[mirror_ubuntu-artful-kernel.git] / drivers / net / ethernet / intel / i40e / i40e_virtchnl_pf.c
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5c3c48ac
JB
1/*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * The full GNU General Public License is included in this distribution in
20 * the file called "COPYING".
21 *
22 * Contact Information:
23 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 *
26 ******************************************************************************/
27
28#include "i40e.h"
29
30/***********************misc routines*****************************/
31
32/**
33 * i40e_vc_isvalid_vsi_id
34 * @vf: pointer to the vf info
35 * @vsi_id: vf relative vsi id
36 *
37 * check for the valid vsi id
38 **/
39static inline bool i40e_vc_isvalid_vsi_id(struct i40e_vf *vf, u8 vsi_id)
40{
41 struct i40e_pf *pf = vf->pf;
42
43 return pf->vsi[vsi_id]->vf_id == vf->vf_id;
44}
45
46/**
47 * i40e_vc_isvalid_queue_id
48 * @vf: pointer to the vf info
49 * @vsi_id: vsi id
50 * @qid: vsi relative queue id
51 *
52 * check for the valid queue id
53 **/
54static inline bool i40e_vc_isvalid_queue_id(struct i40e_vf *vf, u8 vsi_id,
55 u8 qid)
56{
57 struct i40e_pf *pf = vf->pf;
58
59 return qid < pf->vsi[vsi_id]->num_queue_pairs;
60}
61
62/**
63 * i40e_vc_isvalid_vector_id
64 * @vf: pointer to the vf info
65 * @vector_id: vf relative vector id
66 *
67 * check for the valid vector id
68 **/
69static inline bool i40e_vc_isvalid_vector_id(struct i40e_vf *vf, u8 vector_id)
70{
71 struct i40e_pf *pf = vf->pf;
72
54692b40 73 return vector_id <= pf->hw.func_caps.num_msix_vectors_vf;
5c3c48ac
JB
74}
75
76/***********************vf resource mgmt routines*****************/
77
78/**
79 * i40e_vc_get_pf_queue_id
80 * @vf: pointer to the vf info
81 * @vsi_idx: index of VSI in PF struct
82 * @vsi_queue_id: vsi relative queue id
83 *
84 * return pf relative queue id
85 **/
86static u16 i40e_vc_get_pf_queue_id(struct i40e_vf *vf, u8 vsi_idx,
87 u8 vsi_queue_id)
88{
89 struct i40e_pf *pf = vf->pf;
90 struct i40e_vsi *vsi = pf->vsi[vsi_idx];
91 u16 pf_queue_id = I40E_QUEUE_END_OF_LIST;
92
93 if (le16_to_cpu(vsi->info.mapping_flags) &
94 I40E_AQ_VSI_QUE_MAP_NONCONTIG)
95 pf_queue_id =
96 le16_to_cpu(vsi->info.queue_mapping[vsi_queue_id]);
97 else
98 pf_queue_id = le16_to_cpu(vsi->info.queue_mapping[0]) +
99 vsi_queue_id;
100
101 return pf_queue_id;
102}
103
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104/**
105 * i40e_config_irq_link_list
106 * @vf: pointer to the vf info
107 * @vsi_idx: index of VSI in PF struct
108 * @vecmap: irq map info
109 *
110 * configure irq link list from the map
111 **/
112static void i40e_config_irq_link_list(struct i40e_vf *vf, u16 vsi_idx,
113 struct i40e_virtchnl_vector_map *vecmap)
114{
115 unsigned long linklistmap = 0, tempmap;
116 struct i40e_pf *pf = vf->pf;
117 struct i40e_hw *hw = &pf->hw;
118 u16 vsi_queue_id, pf_queue_id;
119 enum i40e_queue_type qtype;
120 u16 next_q, vector_id;
121 u32 reg, reg_idx;
122 u16 itr_idx = 0;
123
124 vector_id = vecmap->vector_id;
125 /* setup the head */
126 if (0 == vector_id)
127 reg_idx = I40E_VPINT_LNKLST0(vf->vf_id);
128 else
129 reg_idx = I40E_VPINT_LNKLSTN(
13c60b99 130 (pf->hw.func_caps.num_msix_vectors_vf
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JB
131 * vf->vf_id) + (vector_id - 1));
132
133 if (vecmap->rxq_map == 0 && vecmap->txq_map == 0) {
134 /* Special case - No queues mapped on this vector */
135 wr32(hw, reg_idx, I40E_VPINT_LNKLST0_FIRSTQ_INDX_MASK);
136 goto irq_list_done;
137 }
138 tempmap = vecmap->rxq_map;
4836650b 139 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
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140 linklistmap |= (1 <<
141 (I40E_VIRTCHNL_SUPPORTED_QTYPES *
142 vsi_queue_id));
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143 }
144
145 tempmap = vecmap->txq_map;
4836650b 146 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
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JB
147 linklistmap |= (1 <<
148 (I40E_VIRTCHNL_SUPPORTED_QTYPES * vsi_queue_id
149 + 1));
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150 }
151
152 next_q = find_first_bit(&linklistmap,
153 (I40E_MAX_VSI_QP *
154 I40E_VIRTCHNL_SUPPORTED_QTYPES));
155 vsi_queue_id = next_q/I40E_VIRTCHNL_SUPPORTED_QTYPES;
156 qtype = next_q%I40E_VIRTCHNL_SUPPORTED_QTYPES;
157 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_idx, vsi_queue_id);
158 reg = ((qtype << I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT) | pf_queue_id);
159
160 wr32(hw, reg_idx, reg);
161
162 while (next_q < (I40E_MAX_VSI_QP * I40E_VIRTCHNL_SUPPORTED_QTYPES)) {
163 switch (qtype) {
164 case I40E_QUEUE_TYPE_RX:
165 reg_idx = I40E_QINT_RQCTL(pf_queue_id);
166 itr_idx = vecmap->rxitr_idx;
167 break;
168 case I40E_QUEUE_TYPE_TX:
169 reg_idx = I40E_QINT_TQCTL(pf_queue_id);
170 itr_idx = vecmap->txitr_idx;
171 break;
172 default:
173 break;
174 }
175
176 next_q = find_next_bit(&linklistmap,
177 (I40E_MAX_VSI_QP *
178 I40E_VIRTCHNL_SUPPORTED_QTYPES),
179 next_q + 1);
180 if (next_q < (I40E_MAX_VSI_QP * I40E_VIRTCHNL_SUPPORTED_QTYPES)) {
181 vsi_queue_id = next_q / I40E_VIRTCHNL_SUPPORTED_QTYPES;
182 qtype = next_q % I40E_VIRTCHNL_SUPPORTED_QTYPES;
183 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_idx,
184 vsi_queue_id);
185 } else {
186 pf_queue_id = I40E_QUEUE_END_OF_LIST;
187 qtype = 0;
188 }
189
190 /* format for the RQCTL & TQCTL regs is same */
191 reg = (vector_id) |
192 (qtype << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT) |
193 (pf_queue_id << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) |
194 (1 << I40E_QINT_RQCTL_CAUSE_ENA_SHIFT) |
195 (itr_idx << I40E_QINT_RQCTL_ITR_INDX_SHIFT);
196 wr32(hw, reg_idx, reg);
197 }
198
199irq_list_done:
200 i40e_flush(hw);
201}
202
203/**
204 * i40e_config_vsi_tx_queue
205 * @vf: pointer to the vf info
206 * @vsi_idx: index of VSI in PF struct
207 * @vsi_queue_id: vsi relative queue index
208 * @info: config. info
209 *
210 * configure tx queue
211 **/
212static int i40e_config_vsi_tx_queue(struct i40e_vf *vf, u16 vsi_idx,
213 u16 vsi_queue_id,
214 struct i40e_virtchnl_txq_info *info)
215{
216 struct i40e_pf *pf = vf->pf;
217 struct i40e_hw *hw = &pf->hw;
218 struct i40e_hmc_obj_txq tx_ctx;
219 u16 pf_queue_id;
220 u32 qtx_ctl;
221 int ret = 0;
222
223 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_idx, vsi_queue_id);
224
225 /* clear the context structure first */
226 memset(&tx_ctx, 0, sizeof(struct i40e_hmc_obj_txq));
227
228 /* only set the required fields */
229 tx_ctx.base = info->dma_ring_addr / 128;
230 tx_ctx.qlen = info->ring_len;
231 tx_ctx.rdylist = le16_to_cpu(pf->vsi[vsi_idx]->info.qs_handle[0]);
232 tx_ctx.rdylist_act = 0;
233
234 /* clear the context in the HMC */
235 ret = i40e_clear_lan_tx_queue_context(hw, pf_queue_id);
236 if (ret) {
237 dev_err(&pf->pdev->dev,
238 "Failed to clear VF LAN Tx queue context %d, error: %d\n",
239 pf_queue_id, ret);
240 ret = -ENOENT;
241 goto error_context;
242 }
243
244 /* set the context in the HMC */
245 ret = i40e_set_lan_tx_queue_context(hw, pf_queue_id, &tx_ctx);
246 if (ret) {
247 dev_err(&pf->pdev->dev,
248 "Failed to set VF LAN Tx queue context %d error: %d\n",
249 pf_queue_id, ret);
250 ret = -ENOENT;
251 goto error_context;
252 }
253
254 /* associate this queue with the PCI VF function */
255 qtx_ctl = I40E_QTX_CTL_VF_QUEUE;
13fd9774 256 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT)
5c3c48ac
JB
257 & I40E_QTX_CTL_PF_INDX_MASK);
258 qtx_ctl |= (((vf->vf_id + hw->func_caps.vf_base_id)
259 << I40E_QTX_CTL_VFVM_INDX_SHIFT)
260 & I40E_QTX_CTL_VFVM_INDX_MASK);
261 wr32(hw, I40E_QTX_CTL(pf_queue_id), qtx_ctl);
262 i40e_flush(hw);
263
264error_context:
265 return ret;
266}
267
268/**
269 * i40e_config_vsi_rx_queue
270 * @vf: pointer to the vf info
271 * @vsi_idx: index of VSI in PF struct
272 * @vsi_queue_id: vsi relative queue index
273 * @info: config. info
274 *
275 * configure rx queue
276 **/
277static int i40e_config_vsi_rx_queue(struct i40e_vf *vf, u16 vsi_idx,
278 u16 vsi_queue_id,
279 struct i40e_virtchnl_rxq_info *info)
280{
281 struct i40e_pf *pf = vf->pf;
282 struct i40e_hw *hw = &pf->hw;
283 struct i40e_hmc_obj_rxq rx_ctx;
284 u16 pf_queue_id;
285 int ret = 0;
286
287 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_idx, vsi_queue_id);
288
289 /* clear the context structure first */
290 memset(&rx_ctx, 0, sizeof(struct i40e_hmc_obj_rxq));
291
292 /* only set the required fields */
293 rx_ctx.base = info->dma_ring_addr / 128;
294 rx_ctx.qlen = info->ring_len;
295
296 if (info->splithdr_enabled) {
297 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
298 I40E_RX_SPLIT_IP |
299 I40E_RX_SPLIT_TCP_UDP |
300 I40E_RX_SPLIT_SCTP;
301 /* header length validation */
302 if (info->hdr_size > ((2 * 1024) - 64)) {
303 ret = -EINVAL;
304 goto error_param;
305 }
306 rx_ctx.hbuff = info->hdr_size >> I40E_RXQ_CTX_HBUFF_SHIFT;
307
308 /* set splitalways mode 10b */
309 rx_ctx.dtype = 0x2;
310 }
311
312 /* databuffer length validation */
313 if (info->databuffer_size > ((16 * 1024) - 128)) {
314 ret = -EINVAL;
315 goto error_param;
316 }
317 rx_ctx.dbuff = info->databuffer_size >> I40E_RXQ_CTX_DBUFF_SHIFT;
318
319 /* max pkt. length validation */
320 if (info->max_pkt_size >= (16 * 1024) || info->max_pkt_size < 64) {
321 ret = -EINVAL;
322 goto error_param;
323 }
324 rx_ctx.rxmax = info->max_pkt_size;
325
326 /* enable 32bytes desc always */
327 rx_ctx.dsize = 1;
328
329 /* default values */
330 rx_ctx.tphrdesc_ena = 1;
331 rx_ctx.tphwdesc_ena = 1;
332 rx_ctx.tphdata_ena = 1;
333 rx_ctx.tphhead_ena = 1;
334 rx_ctx.lrxqthresh = 2;
335 rx_ctx.crcstrip = 1;
336
337 /* clear the context in the HMC */
338 ret = i40e_clear_lan_rx_queue_context(hw, pf_queue_id);
339 if (ret) {
340 dev_err(&pf->pdev->dev,
341 "Failed to clear VF LAN Rx queue context %d, error: %d\n",
342 pf_queue_id, ret);
343 ret = -ENOENT;
344 goto error_param;
345 }
346
347 /* set the context in the HMC */
348 ret = i40e_set_lan_rx_queue_context(hw, pf_queue_id, &rx_ctx);
349 if (ret) {
350 dev_err(&pf->pdev->dev,
351 "Failed to set VF LAN Rx queue context %d error: %d\n",
352 pf_queue_id, ret);
353 ret = -ENOENT;
354 goto error_param;
355 }
356
357error_param:
358 return ret;
359}
360
361/**
362 * i40e_alloc_vsi_res
363 * @vf: pointer to the vf info
364 * @type: type of VSI to allocate
365 *
366 * alloc vf vsi context & resources
367 **/
368static int i40e_alloc_vsi_res(struct i40e_vf *vf, enum i40e_vsi_type type)
369{
370 struct i40e_mac_filter *f = NULL;
371 struct i40e_pf *pf = vf->pf;
372 struct i40e_hw *hw = &pf->hw;
373 struct i40e_vsi *vsi;
374 int ret = 0;
375
376 vsi = i40e_vsi_setup(pf, type, pf->vsi[pf->lan_vsi]->seid, vf->vf_id);
377
378 if (!vsi) {
379 dev_err(&pf->pdev->dev,
380 "add vsi failed for vf %d, aq_err %d\n",
381 vf->vf_id, pf->hw.aq.asq_last_status);
382 ret = -ENOENT;
383 goto error_alloc_vsi_res;
384 }
385 if (type == I40E_VSI_SRIOV) {
386 vf->lan_vsi_index = vsi->idx;
387 vf->lan_vsi_id = vsi->id;
388 dev_info(&pf->pdev->dev,
389 "LAN VSI index %d, VSI id %d\n",
390 vsi->idx, vsi->id);
6c12fcbf
GR
391 /* If the port VLAN has been configured and then the
392 * VF driver was removed then the VSI port VLAN
393 * configuration was destroyed. Check if there is
394 * a port VLAN and restore the VSI configuration if
395 * needed.
396 */
397 if (vf->port_vlan_id)
398 i40e_vsi_add_pvid(vsi, vf->port_vlan_id);
5c3c48ac 399 f = i40e_add_filter(vsi, vf->default_lan_addr.addr,
6c12fcbf 400 vf->port_vlan_id, true, false);
5c3c48ac 401 }
6dbbbfb2 402
5c3c48ac
JB
403 if (!f) {
404 dev_err(&pf->pdev->dev, "Unable to add ucast filter\n");
405 ret = -ENOMEM;
406 goto error_alloc_vsi_res;
407 }
408
409 /* program mac filter */
410 ret = i40e_sync_vsi_filters(vsi);
411 if (ret) {
412 dev_err(&pf->pdev->dev, "Unable to program ucast filters\n");
413 goto error_alloc_vsi_res;
414 }
415
416 /* accept bcast pkts. by default */
417 ret = i40e_aq_set_vsi_broadcast(hw, vsi->seid, true, NULL);
418 if (ret) {
419 dev_err(&pf->pdev->dev,
420 "set vsi bcast failed for vf %d, vsi %d, aq_err %d\n",
421 vf->vf_id, vsi->idx, pf->hw.aq.asq_last_status);
422 ret = -EINVAL;
423 }
424
425error_alloc_vsi_res:
426 return ret;
427}
428
805bd5bd
MW
429/**
430 * i40e_enable_vf_mappings
431 * @vf: pointer to the vf info
432 *
433 * enable vf mappings
434 **/
435static void i40e_enable_vf_mappings(struct i40e_vf *vf)
436{
437 struct i40e_pf *pf = vf->pf;
438 struct i40e_hw *hw = &pf->hw;
439 u32 reg, total_queue_pairs = 0;
440 int j;
441
442 /* Tell the hardware we're using noncontiguous mapping. HW requires
443 * that VF queues be mapped using this method, even when they are
444 * contiguous in real life
445 */
446 wr32(hw, I40E_VSILAN_QBASE(vf->lan_vsi_id),
447 I40E_VSILAN_QBASE_VSIQTABLE_ENA_MASK);
448
449 /* enable VF vplan_qtable mappings */
450 reg = I40E_VPLAN_MAPENA_TXRX_ENA_MASK;
451 wr32(hw, I40E_VPLAN_MAPENA(vf->vf_id), reg);
452
453 /* map PF queues to VF queues */
454 for (j = 0; j < pf->vsi[vf->lan_vsi_index]->num_queue_pairs; j++) {
455 u16 qid = i40e_vc_get_pf_queue_id(vf, vf->lan_vsi_index, j);
456 reg = (qid & I40E_VPLAN_QTABLE_QINDEX_MASK);
457 wr32(hw, I40E_VPLAN_QTABLE(total_queue_pairs, vf->vf_id), reg);
458 total_queue_pairs++;
459 }
460
461 /* map PF queues to VSI */
462 for (j = 0; j < 7; j++) {
463 if (j * 2 >= pf->vsi[vf->lan_vsi_index]->num_queue_pairs) {
464 reg = 0x07FF07FF; /* unused */
465 } else {
466 u16 qid = i40e_vc_get_pf_queue_id(vf, vf->lan_vsi_index,
467 j * 2);
468 reg = qid;
469 qid = i40e_vc_get_pf_queue_id(vf, vf->lan_vsi_index,
470 (j * 2) + 1);
471 reg |= qid << 16;
472 }
473 wr32(hw, I40E_VSILAN_QTABLE(j, vf->lan_vsi_id), reg);
474 }
475
476 i40e_flush(hw);
477}
478
479/**
480 * i40e_disable_vf_mappings
481 * @vf: pointer to the vf info
482 *
483 * disable vf mappings
484 **/
485static void i40e_disable_vf_mappings(struct i40e_vf *vf)
486{
487 struct i40e_pf *pf = vf->pf;
488 struct i40e_hw *hw = &pf->hw;
489 int i;
490
491 /* disable qp mappings */
492 wr32(hw, I40E_VPLAN_MAPENA(vf->vf_id), 0);
493 for (i = 0; i < I40E_MAX_VSI_QP; i++)
494 wr32(hw, I40E_VPLAN_QTABLE(i, vf->vf_id),
495 I40E_QUEUE_END_OF_LIST);
496 i40e_flush(hw);
497}
498
499/**
500 * i40e_free_vf_res
501 * @vf: pointer to the vf info
502 *
503 * free vf resources
504 **/
505static void i40e_free_vf_res(struct i40e_vf *vf)
506{
507 struct i40e_pf *pf = vf->pf;
fc18eaa0
MW
508 struct i40e_hw *hw = &pf->hw;
509 u32 reg_idx, reg;
510 int i, msix_vf;
805bd5bd
MW
511
512 /* free vsi & disconnect it from the parent uplink */
513 if (vf->lan_vsi_index) {
514 i40e_vsi_release(pf->vsi[vf->lan_vsi_index]);
515 vf->lan_vsi_index = 0;
516 vf->lan_vsi_id = 0;
517 }
fc18eaa0
MW
518 msix_vf = pf->hw.func_caps.num_msix_vectors_vf + 1;
519 /* disable interrupts so the VF starts in a known state */
520 for (i = 0; i < msix_vf; i++) {
521 /* format is same for both registers */
522 if (0 == i)
523 reg_idx = I40E_VFINT_DYN_CTL0(vf->vf_id);
524 else
525 reg_idx = I40E_VFINT_DYN_CTLN(((msix_vf - 1) *
526 (vf->vf_id))
527 + (i - 1));
528 wr32(hw, reg_idx, I40E_VFINT_DYN_CTLN_CLEARPBA_MASK);
529 i40e_flush(hw);
530 }
805bd5bd 531
fc18eaa0
MW
532 /* clear the irq settings */
533 for (i = 0; i < msix_vf; i++) {
534 /* format is same for both registers */
535 if (0 == i)
536 reg_idx = I40E_VPINT_LNKLST0(vf->vf_id);
537 else
538 reg_idx = I40E_VPINT_LNKLSTN(((msix_vf - 1) *
539 (vf->vf_id))
540 + (i - 1));
541 reg = (I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_MASK |
542 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK);
543 wr32(hw, reg_idx, reg);
544 i40e_flush(hw);
545 }
805bd5bd
MW
546 /* reset some of the state varibles keeping
547 * track of the resources
548 */
549 vf->num_queue_pairs = 0;
550 vf->vf_states = 0;
551}
552
553/**
554 * i40e_alloc_vf_res
555 * @vf: pointer to the vf info
556 *
557 * allocate vf resources
558 **/
559static int i40e_alloc_vf_res(struct i40e_vf *vf)
560{
561 struct i40e_pf *pf = vf->pf;
562 int total_queue_pairs = 0;
563 int ret;
564
565 /* allocate hw vsi context & associated resources */
566 ret = i40e_alloc_vsi_res(vf, I40E_VSI_SRIOV);
567 if (ret)
568 goto error_alloc;
569 total_queue_pairs += pf->vsi[vf->lan_vsi_index]->num_queue_pairs;
570 set_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps);
571
572 /* store the total qps number for the runtime
573 * vf req validation
574 */
575 vf->num_queue_pairs = total_queue_pairs;
576
577 /* vf is now completely initialized */
578 set_bit(I40E_VF_STAT_INIT, &vf->vf_states);
579
580error_alloc:
581 if (ret)
582 i40e_free_vf_res(vf);
583
584 return ret;
585}
586
fc18eaa0
MW
587#define VF_DEVICE_STATUS 0xAA
588#define VF_TRANS_PENDING_MASK 0x20
589/**
590 * i40e_quiesce_vf_pci
591 * @vf: pointer to the vf structure
592 *
593 * Wait for VF PCI transactions to be cleared after reset. Returns -EIO
594 * if the transactions never clear.
595 **/
596static int i40e_quiesce_vf_pci(struct i40e_vf *vf)
597{
598 struct i40e_pf *pf = vf->pf;
599 struct i40e_hw *hw = &pf->hw;
600 int vf_abs_id, i;
601 u32 reg;
602
b141d619 603 vf_abs_id = vf->vf_id + hw->func_caps.vf_base_id;
fc18eaa0
MW
604
605 wr32(hw, I40E_PF_PCI_CIAA,
606 VF_DEVICE_STATUS | (vf_abs_id << I40E_PF_PCI_CIAA_VF_NUM_SHIFT));
607 for (i = 0; i < 100; i++) {
608 reg = rd32(hw, I40E_PF_PCI_CIAD);
609 if ((reg & VF_TRANS_PENDING_MASK) == 0)
610 return 0;
611 udelay(1);
612 }
613 return -EIO;
614}
615
5c3c48ac
JB
616/**
617 * i40e_reset_vf
618 * @vf: pointer to the vf structure
619 * @flr: VFLR was issued or not
620 *
621 * reset the vf
622 **/
fc18eaa0 623void i40e_reset_vf(struct i40e_vf *vf, bool flr)
5c3c48ac 624{
5c3c48ac
JB
625 struct i40e_pf *pf = vf->pf;
626 struct i40e_hw *hw = &pf->hw;
5c3c48ac 627 bool rsd = false;
fc18eaa0
MW
628 int i;
629 u32 reg;
5c3c48ac
JB
630
631 /* warn the VF */
5c3c48ac
JB
632 clear_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states);
633
fc18eaa0
MW
634 /* In the case of a VFLR, the HW has already reset the VF and we
635 * just need to clean up, so don't hit the VFRTRIG register.
5c3c48ac
JB
636 */
637 if (!flr) {
638 /* reset vf using VPGEN_VFRTRIG reg */
fc18eaa0
MW
639 reg = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id));
640 reg |= I40E_VPGEN_VFRTRIG_VFSWR_MASK;
5c3c48ac
JB
641 wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg);
642 i40e_flush(hw);
643 }
644
fc18eaa0
MW
645 if (i40e_quiesce_vf_pci(vf))
646 dev_err(&pf->pdev->dev, "VF %d PCI transactions stuck\n",
647 vf->vf_id);
648
5c3c48ac
JB
649 /* poll VPGEN_VFRSTAT reg to make sure
650 * that reset is complete
651 */
fc18eaa0 652 for (i = 0; i < 100; i++) {
5c3c48ac
JB
653 /* vf reset requires driver to first reset the
654 * vf & than poll the status register to make sure
655 * that the requested op was completed
656 * successfully
657 */
658 udelay(10);
659 reg = rd32(hw, I40E_VPGEN_VFRSTAT(vf->vf_id));
660 if (reg & I40E_VPGEN_VFRSTAT_VFRD_MASK) {
661 rsd = true;
662 break;
663 }
664 }
665
666 if (!rsd)
fc18eaa0 667 dev_err(&pf->pdev->dev, "VF reset check timeout on VF %d\n",
5c3c48ac 668 vf->vf_id);
fc18eaa0 669 wr32(hw, I40E_VFGEN_RSTAT1(vf->vf_id), I40E_VFR_COMPLETED);
5c3c48ac
JB
670 /* clear the reset bit in the VPGEN_VFRTRIG reg */
671 reg = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id));
672 reg &= ~I40E_VPGEN_VFRTRIG_VFSWR_MASK;
673 wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg);
fc18eaa0
MW
674
675 /* On initial reset, we won't have any queues */
676 if (vf->lan_vsi_index == 0)
677 goto complete_reset;
678
679 i40e_vsi_control_rings(pf->vsi[vf->lan_vsi_index], false);
680complete_reset:
681 /* reallocate vf resources to reset the VSI state */
682 i40e_free_vf_res(vf);
683 mdelay(10);
684 i40e_alloc_vf_res(vf);
685 i40e_enable_vf_mappings(vf);
686
5c3c48ac 687 /* tell the VF the reset is done */
fc18eaa0 688 wr32(hw, I40E_VFGEN_RSTAT1(vf->vf_id), I40E_VFR_VFACTIVE);
5c3c48ac 689 i40e_flush(hw);
5c3c48ac
JB
690}
691
5c3c48ac
JB
692/**
693 * i40e_vfs_are_assigned
694 * @pf: pointer to the pf structure
695 *
696 * Determine if any VFs are assigned to VMs
697 **/
698static bool i40e_vfs_are_assigned(struct i40e_pf *pf)
699{
700 struct pci_dev *pdev = pf->pdev;
701 struct pci_dev *vfdev;
702
703 /* loop through all the VFs to see if we own any that are assigned */
704 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, I40E_VF_DEVICE_ID , NULL);
705 while (vfdev) {
706 /* if we don't own it we don't care */
707 if (vfdev->is_virtfn && pci_physfn(vfdev) == pdev) {
708 /* if it is assigned we cannot release it */
709 if (vfdev->dev_flags & PCI_DEV_FLAGS_ASSIGNED)
710 return true;
711 }
712
713 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
714 I40E_VF_DEVICE_ID,
715 vfdev);
716 }
717
718 return false;
719}
720
721/**
722 * i40e_free_vfs
723 * @pf: pointer to the pf structure
724 *
725 * free vf resources
726 **/
727void i40e_free_vfs(struct i40e_pf *pf)
728{
f7414531
MW
729 struct i40e_hw *hw = &pf->hw;
730 u32 reg_idx, bit_idx;
731 int i, tmp, vf_id;
5c3c48ac
JB
732
733 if (!pf->vf)
734 return;
735
736 /* Disable interrupt 0 so we don't try to handle the VFLR. */
2ef28cfb
MW
737 i40e_irq_dynamic_disable_icr0(pf);
738
6c1b5bff 739 mdelay(10); /* let any messages in transit get finished up */
5c3c48ac 740 /* free up vf resources */
6c1b5bff
MW
741 tmp = pf->num_alloc_vfs;
742 pf->num_alloc_vfs = 0;
743 for (i = 0; i < tmp; i++) {
5c3c48ac
JB
744 if (test_bit(I40E_VF_STAT_INIT, &pf->vf[i].vf_states))
745 i40e_free_vf_res(&pf->vf[i]);
746 /* disable qp mappings */
747 i40e_disable_vf_mappings(&pf->vf[i]);
748 }
749
750 kfree(pf->vf);
751 pf->vf = NULL;
5c3c48ac 752
f7414531 753 if (!i40e_vfs_are_assigned(pf)) {
5c3c48ac 754 pci_disable_sriov(pf->pdev);
f7414531
MW
755 /* Acknowledge VFLR for all VFS. Without this, VFs will fail to
756 * work correctly when SR-IOV gets re-enabled.
757 */
758 for (vf_id = 0; vf_id < tmp; vf_id++) {
759 reg_idx = (hw->func_caps.vf_base_id + vf_id) / 32;
760 bit_idx = (hw->func_caps.vf_base_id + vf_id) % 32;
761 wr32(hw, I40E_GLGEN_VFLRSTAT(reg_idx), (1 << bit_idx));
762 }
763 }
5c3c48ac
JB
764 else
765 dev_warn(&pf->pdev->dev,
766 "unable to disable SR-IOV because VFs are assigned.\n");
767
768 /* Re-enable interrupt 0. */
2ef28cfb 769 i40e_irq_dynamic_enable_icr0(pf);
5c3c48ac
JB
770}
771
772#ifdef CONFIG_PCI_IOV
773/**
774 * i40e_alloc_vfs
775 * @pf: pointer to the pf structure
776 * @num_alloc_vfs: number of vfs to allocate
777 *
778 * allocate vf resources
779 **/
780static int i40e_alloc_vfs(struct i40e_pf *pf, u16 num_alloc_vfs)
781{
782 struct i40e_vf *vfs;
783 int i, ret = 0;
784
6c1b5bff 785 /* Disable interrupt 0 so we don't try to handle the VFLR. */
2ef28cfb
MW
786 i40e_irq_dynamic_disable_icr0(pf);
787
5c3c48ac
JB
788 ret = pci_enable_sriov(pf->pdev, num_alloc_vfs);
789 if (ret) {
790 dev_err(&pf->pdev->dev,
791 "pci_enable_sriov failed with error %d!\n", ret);
792 pf->num_alloc_vfs = 0;
793 goto err_iov;
794 }
795
796 /* allocate memory */
797 vfs = kzalloc(num_alloc_vfs * sizeof(struct i40e_vf), GFP_KERNEL);
798 if (!vfs) {
799 ret = -ENOMEM;
800 goto err_alloc;
801 }
802
803 /* apply default profile */
804 for (i = 0; i < num_alloc_vfs; i++) {
805 vfs[i].pf = pf;
806 vfs[i].parent_type = I40E_SWITCH_ELEMENT_TYPE_VEB;
807 vfs[i].vf_id = i;
808
809 /* assign default capabilities */
810 set_bit(I40E_VIRTCHNL_VF_CAP_L2, &vfs[i].vf_caps);
fc18eaa0
MW
811 /* vf resources get allocated during reset */
812 i40e_reset_vf(&vfs[i], false);
5c3c48ac
JB
813
814 /* enable vf vplan_qtable mappings */
815 i40e_enable_vf_mappings(&vfs[i]);
816 }
817 pf->vf = vfs;
818 pf->num_alloc_vfs = num_alloc_vfs;
819
820err_alloc:
821 if (ret)
822 i40e_free_vfs(pf);
823err_iov:
6c1b5bff 824 /* Re-enable interrupt 0. */
2ef28cfb 825 i40e_irq_dynamic_enable_icr0(pf);
5c3c48ac
JB
826 return ret;
827}
828
829#endif
830/**
831 * i40e_pci_sriov_enable
832 * @pdev: pointer to a pci_dev structure
833 * @num_vfs: number of vfs to allocate
834 *
835 * Enable or change the number of VFs
836 **/
837static int i40e_pci_sriov_enable(struct pci_dev *pdev, int num_vfs)
838{
839#ifdef CONFIG_PCI_IOV
840 struct i40e_pf *pf = pci_get_drvdata(pdev);
841 int pre_existing_vfs = pci_num_vf(pdev);
842 int err = 0;
843
844 dev_info(&pdev->dev, "Allocating %d VFs.\n", num_vfs);
845 if (pre_existing_vfs && pre_existing_vfs != num_vfs)
846 i40e_free_vfs(pf);
847 else if (pre_existing_vfs && pre_existing_vfs == num_vfs)
848 goto out;
849
850 if (num_vfs > pf->num_req_vfs) {
851 err = -EPERM;
852 goto err_out;
853 }
854
855 err = i40e_alloc_vfs(pf, num_vfs);
856 if (err) {
857 dev_warn(&pdev->dev, "Failed to enable SR-IOV: %d\n", err);
858 goto err_out;
859 }
860
861out:
862 return num_vfs;
863
864err_out:
865 return err;
866#endif
867 return 0;
868}
869
870/**
871 * i40e_pci_sriov_configure
872 * @pdev: pointer to a pci_dev structure
873 * @num_vfs: number of vfs to allocate
874 *
875 * Enable or change the number of VFs. Called when the user updates the number
876 * of VFs in sysfs.
877 **/
878int i40e_pci_sriov_configure(struct pci_dev *pdev, int num_vfs)
879{
880 struct i40e_pf *pf = pci_get_drvdata(pdev);
881
882 if (num_vfs)
883 return i40e_pci_sriov_enable(pdev, num_vfs);
884
885 i40e_free_vfs(pf);
886 return 0;
887}
888
889/***********************virtual channel routines******************/
890
891/**
892 * i40e_vc_send_msg_to_vf
893 * @vf: pointer to the vf info
894 * @v_opcode: virtual channel opcode
895 * @v_retval: virtual channel return value
896 * @msg: pointer to the msg buffer
897 * @msglen: msg length
898 *
899 * send msg to vf
900 **/
901static int i40e_vc_send_msg_to_vf(struct i40e_vf *vf, u32 v_opcode,
902 u32 v_retval, u8 *msg, u16 msglen)
903{
904 struct i40e_pf *pf = vf->pf;
905 struct i40e_hw *hw = &pf->hw;
906 i40e_status aq_ret;
907
908 /* single place to detect unsuccessful return values */
909 if (v_retval) {
910 vf->num_invalid_msgs++;
911 dev_err(&pf->pdev->dev, "Failed opcode %d Error: %d\n",
912 v_opcode, v_retval);
913 if (vf->num_invalid_msgs >
914 I40E_DEFAULT_NUM_INVALID_MSGS_ALLOWED) {
915 dev_err(&pf->pdev->dev,
916 "Number of invalid messages exceeded for VF %d\n",
917 vf->vf_id);
918 dev_err(&pf->pdev->dev, "Use PF Control I/F to enable the VF\n");
919 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
920 }
921 } else {
922 vf->num_valid_msgs++;
923 }
924
925 aq_ret = i40e_aq_send_msg_to_vf(hw, vf->vf_id, v_opcode, v_retval,
926 msg, msglen, NULL);
927 if (aq_ret) {
928 dev_err(&pf->pdev->dev,
929 "Unable to send the message to VF %d aq_err %d\n",
930 vf->vf_id, pf->hw.aq.asq_last_status);
931 return -EIO;
932 }
933
934 return 0;
935}
936
937/**
938 * i40e_vc_send_resp_to_vf
939 * @vf: pointer to the vf info
940 * @opcode: operation code
941 * @retval: return value
942 *
943 * send resp msg to vf
944 **/
945static int i40e_vc_send_resp_to_vf(struct i40e_vf *vf,
946 enum i40e_virtchnl_ops opcode,
947 i40e_status retval)
948{
949 return i40e_vc_send_msg_to_vf(vf, opcode, retval, NULL, 0);
950}
951
952/**
953 * i40e_vc_get_version_msg
954 * @vf: pointer to the vf info
955 *
956 * called from the vf to request the API version used by the PF
957 **/
958static int i40e_vc_get_version_msg(struct i40e_vf *vf)
959{
960 struct i40e_virtchnl_version_info info = {
961 I40E_VIRTCHNL_VERSION_MAJOR, I40E_VIRTCHNL_VERSION_MINOR
962 };
963
964 return i40e_vc_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_VERSION,
965 I40E_SUCCESS, (u8 *)&info,
966 sizeof(struct
967 i40e_virtchnl_version_info));
968}
969
970/**
971 * i40e_vc_get_vf_resources_msg
972 * @vf: pointer to the vf info
973 * @msg: pointer to the msg buffer
974 * @msglen: msg length
975 *
976 * called from the vf to request its resources
977 **/
978static int i40e_vc_get_vf_resources_msg(struct i40e_vf *vf)
979{
980 struct i40e_virtchnl_vf_resource *vfres = NULL;
981 struct i40e_pf *pf = vf->pf;
982 i40e_status aq_ret = 0;
983 struct i40e_vsi *vsi;
984 int i = 0, len = 0;
985 int num_vsis = 1;
986 int ret;
987
988 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
989 aq_ret = I40E_ERR_PARAM;
990 goto err;
991 }
992
993 len = (sizeof(struct i40e_virtchnl_vf_resource) +
994 sizeof(struct i40e_virtchnl_vsi_resource) * num_vsis);
995
996 vfres = kzalloc(len, GFP_KERNEL);
997 if (!vfres) {
998 aq_ret = I40E_ERR_NO_MEMORY;
999 len = 0;
1000 goto err;
1001 }
1002
1003 vfres->vf_offload_flags = I40E_VIRTCHNL_VF_OFFLOAD_L2;
1004 vsi = pf->vsi[vf->lan_vsi_index];
1005 if (!vsi->info.pvid)
1006 vfres->vf_offload_flags |= I40E_VIRTCHNL_VF_OFFLOAD_VLAN;
1007
1008 vfres->num_vsis = num_vsis;
1009 vfres->num_queue_pairs = vf->num_queue_pairs;
1010 vfres->max_vectors = pf->hw.func_caps.num_msix_vectors_vf;
1011 if (vf->lan_vsi_index) {
1012 vfres->vsi_res[i].vsi_id = vf->lan_vsi_index;
1013 vfres->vsi_res[i].vsi_type = I40E_VSI_SRIOV;
1014 vfres->vsi_res[i].num_queue_pairs =
1015 pf->vsi[vf->lan_vsi_index]->num_queue_pairs;
1016 memcpy(vfres->vsi_res[i].default_mac_addr,
1017 vf->default_lan_addr.addr, ETH_ALEN);
1018 i++;
1019 }
1020 set_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states);
1021
1022err:
1023 /* send the response back to the vf */
1024 ret = i40e_vc_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_VF_RESOURCES,
1025 aq_ret, (u8 *)vfres, len);
1026
1027 kfree(vfres);
1028 return ret;
1029}
1030
1031/**
1032 * i40e_vc_reset_vf_msg
1033 * @vf: pointer to the vf info
1034 * @msg: pointer to the msg buffer
1035 * @msglen: msg length
1036 *
1037 * called from the vf to reset itself,
1038 * unlike other virtchnl messages, pf driver
1039 * doesn't send the response back to the vf
1040 **/
fc18eaa0 1041static void i40e_vc_reset_vf_msg(struct i40e_vf *vf)
5c3c48ac 1042{
fc18eaa0
MW
1043 if (test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states))
1044 i40e_reset_vf(vf, false);
5c3c48ac
JB
1045}
1046
1047/**
1048 * i40e_vc_config_promiscuous_mode_msg
1049 * @vf: pointer to the vf info
1050 * @msg: pointer to the msg buffer
1051 * @msglen: msg length
1052 *
1053 * called from the vf to configure the promiscuous mode of
1054 * vf vsis
1055 **/
1056static int i40e_vc_config_promiscuous_mode_msg(struct i40e_vf *vf,
1057 u8 *msg, u16 msglen)
1058{
1059 struct i40e_virtchnl_promisc_info *info =
1060 (struct i40e_virtchnl_promisc_info *)msg;
1061 struct i40e_pf *pf = vf->pf;
1062 struct i40e_hw *hw = &pf->hw;
1063 bool allmulti = false;
1064 bool promisc = false;
1065 i40e_status aq_ret;
1066
1067 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
1068 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) ||
1069 !i40e_vc_isvalid_vsi_id(vf, info->vsi_id) ||
1070 (pf->vsi[info->vsi_id]->type != I40E_VSI_FCOE)) {
1071 aq_ret = I40E_ERR_PARAM;
1072 goto error_param;
1073 }
1074
1075 if (info->flags & I40E_FLAG_VF_UNICAST_PROMISC)
1076 promisc = true;
1077 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(hw, info->vsi_id,
1078 promisc, NULL);
1079 if (aq_ret)
1080 goto error_param;
1081
1082 if (info->flags & I40E_FLAG_VF_MULTICAST_PROMISC)
1083 allmulti = true;
1084 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(hw, info->vsi_id,
1085 allmulti, NULL);
1086
1087error_param:
1088 /* send the response to the vf */
1089 return i40e_vc_send_resp_to_vf(vf,
1090 I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE,
1091 aq_ret);
1092}
1093
1094/**
1095 * i40e_vc_config_queues_msg
1096 * @vf: pointer to the vf info
1097 * @msg: pointer to the msg buffer
1098 * @msglen: msg length
1099 *
1100 * called from the vf to configure the rx/tx
1101 * queues
1102 **/
1103static int i40e_vc_config_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1104{
1105 struct i40e_virtchnl_vsi_queue_config_info *qci =
1106 (struct i40e_virtchnl_vsi_queue_config_info *)msg;
1107 struct i40e_virtchnl_queue_pair_info *qpi;
1108 u16 vsi_id, vsi_queue_id;
1109 i40e_status aq_ret = 0;
1110 int i;
1111
1112 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
1113 aq_ret = I40E_ERR_PARAM;
1114 goto error_param;
1115 }
1116
1117 vsi_id = qci->vsi_id;
1118 if (!i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1119 aq_ret = I40E_ERR_PARAM;
1120 goto error_param;
1121 }
1122 for (i = 0; i < qci->num_queue_pairs; i++) {
1123 qpi = &qci->qpair[i];
1124 vsi_queue_id = qpi->txq.queue_id;
1125 if ((qpi->txq.vsi_id != vsi_id) ||
1126 (qpi->rxq.vsi_id != vsi_id) ||
1127 (qpi->rxq.queue_id != vsi_queue_id) ||
1128 !i40e_vc_isvalid_queue_id(vf, vsi_id, vsi_queue_id)) {
1129 aq_ret = I40E_ERR_PARAM;
1130 goto error_param;
1131 }
1132
1133 if (i40e_config_vsi_rx_queue(vf, vsi_id, vsi_queue_id,
1134 &qpi->rxq) ||
1135 i40e_config_vsi_tx_queue(vf, vsi_id, vsi_queue_id,
1136 &qpi->txq)) {
1137 aq_ret = I40E_ERR_PARAM;
1138 goto error_param;
1139 }
1140 }
1141
1142error_param:
1143 /* send the response to the vf */
1144 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES,
1145 aq_ret);
1146}
1147
1148/**
1149 * i40e_vc_config_irq_map_msg
1150 * @vf: pointer to the vf info
1151 * @msg: pointer to the msg buffer
1152 * @msglen: msg length
1153 *
1154 * called from the vf to configure the irq to
1155 * queue map
1156 **/
1157static int i40e_vc_config_irq_map_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1158{
1159 struct i40e_virtchnl_irq_map_info *irqmap_info =
1160 (struct i40e_virtchnl_irq_map_info *)msg;
1161 struct i40e_virtchnl_vector_map *map;
1162 u16 vsi_id, vsi_queue_id, vector_id;
1163 i40e_status aq_ret = 0;
1164 unsigned long tempmap;
1165 int i;
1166
1167 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
1168 aq_ret = I40E_ERR_PARAM;
1169 goto error_param;
1170 }
1171
1172 for (i = 0; i < irqmap_info->num_vectors; i++) {
1173 map = &irqmap_info->vecmap[i];
1174
1175 vector_id = map->vector_id;
1176 vsi_id = map->vsi_id;
1177 /* validate msg params */
1178 if (!i40e_vc_isvalid_vector_id(vf, vector_id) ||
1179 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1180 aq_ret = I40E_ERR_PARAM;
1181 goto error_param;
1182 }
1183
1184 /* lookout for the invalid queue index */
1185 tempmap = map->rxq_map;
4836650b 1186 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
5c3c48ac
JB
1187 if (!i40e_vc_isvalid_queue_id(vf, vsi_id,
1188 vsi_queue_id)) {
1189 aq_ret = I40E_ERR_PARAM;
1190 goto error_param;
1191 }
5c3c48ac
JB
1192 }
1193
1194 tempmap = map->txq_map;
4836650b 1195 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
5c3c48ac
JB
1196 if (!i40e_vc_isvalid_queue_id(vf, vsi_id,
1197 vsi_queue_id)) {
1198 aq_ret = I40E_ERR_PARAM;
1199 goto error_param;
1200 }
5c3c48ac
JB
1201 }
1202
1203 i40e_config_irq_link_list(vf, vsi_id, map);
1204 }
1205error_param:
1206 /* send the response to the vf */
1207 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP,
1208 aq_ret);
1209}
1210
1211/**
1212 * i40e_vc_enable_queues_msg
1213 * @vf: pointer to the vf info
1214 * @msg: pointer to the msg buffer
1215 * @msglen: msg length
1216 *
1217 * called from the vf to enable all or specific queue(s)
1218 **/
1219static int i40e_vc_enable_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1220{
1221 struct i40e_virtchnl_queue_select *vqs =
1222 (struct i40e_virtchnl_queue_select *)msg;
1223 struct i40e_pf *pf = vf->pf;
1224 u16 vsi_id = vqs->vsi_id;
1225 i40e_status aq_ret = 0;
5c3c48ac
JB
1226
1227 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
1228 aq_ret = I40E_ERR_PARAM;
1229 goto error_param;
1230 }
1231
1232 if (!i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1233 aq_ret = I40E_ERR_PARAM;
1234 goto error_param;
1235 }
1236
1237 if ((0 == vqs->rx_queues) && (0 == vqs->tx_queues)) {
1238 aq_ret = I40E_ERR_PARAM;
1239 goto error_param;
1240 }
88f6563d
MW
1241 if (i40e_vsi_control_rings(pf->vsi[vsi_id], true))
1242 aq_ret = I40E_ERR_TIMEOUT;
5c3c48ac
JB
1243error_param:
1244 /* send the response to the vf */
1245 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_ENABLE_QUEUES,
1246 aq_ret);
1247}
1248
1249/**
1250 * i40e_vc_disable_queues_msg
1251 * @vf: pointer to the vf info
1252 * @msg: pointer to the msg buffer
1253 * @msglen: msg length
1254 *
1255 * called from the vf to disable all or specific
1256 * queue(s)
1257 **/
1258static int i40e_vc_disable_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1259{
1260 struct i40e_virtchnl_queue_select *vqs =
1261 (struct i40e_virtchnl_queue_select *)msg;
1262 struct i40e_pf *pf = vf->pf;
1263 u16 vsi_id = vqs->vsi_id;
1264 i40e_status aq_ret = 0;
5c3c48ac
JB
1265
1266 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
1267 aq_ret = I40E_ERR_PARAM;
1268 goto error_param;
1269 }
1270
1271 if (!i40e_vc_isvalid_vsi_id(vf, vqs->vsi_id)) {
1272 aq_ret = I40E_ERR_PARAM;
1273 goto error_param;
1274 }
1275
1276 if ((0 == vqs->rx_queues) && (0 == vqs->tx_queues)) {
1277 aq_ret = I40E_ERR_PARAM;
1278 goto error_param;
1279 }
88f6563d
MW
1280 if (i40e_vsi_control_rings(pf->vsi[vsi_id], false))
1281 aq_ret = I40E_ERR_TIMEOUT;
5c3c48ac
JB
1282
1283error_param:
1284 /* send the response to the vf */
1285 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_DISABLE_QUEUES,
1286 aq_ret);
1287}
1288
1289/**
1290 * i40e_vc_get_stats_msg
1291 * @vf: pointer to the vf info
1292 * @msg: pointer to the msg buffer
1293 * @msglen: msg length
1294 *
1295 * called from the vf to get vsi stats
1296 **/
1297static int i40e_vc_get_stats_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1298{
1299 struct i40e_virtchnl_queue_select *vqs =
1300 (struct i40e_virtchnl_queue_select *)msg;
1301 struct i40e_pf *pf = vf->pf;
1302 struct i40e_eth_stats stats;
1303 i40e_status aq_ret = 0;
1304 struct i40e_vsi *vsi;
1305
1306 memset(&stats, 0, sizeof(struct i40e_eth_stats));
1307
1308 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
1309 aq_ret = I40E_ERR_PARAM;
1310 goto error_param;
1311 }
1312
1313 if (!i40e_vc_isvalid_vsi_id(vf, vqs->vsi_id)) {
1314 aq_ret = I40E_ERR_PARAM;
1315 goto error_param;
1316 }
1317
1318 vsi = pf->vsi[vqs->vsi_id];
1319 if (!vsi) {
1320 aq_ret = I40E_ERR_PARAM;
1321 goto error_param;
1322 }
1323 i40e_update_eth_stats(vsi);
5a9769c8 1324 stats = vsi->eth_stats;
5c3c48ac
JB
1325
1326error_param:
1327 /* send the response back to the vf */
1328 return i40e_vc_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_STATS, aq_ret,
1329 (u8 *)&stats, sizeof(stats));
1330}
1331
1332/**
1333 * i40e_vc_add_mac_addr_msg
1334 * @vf: pointer to the vf info
1335 * @msg: pointer to the msg buffer
1336 * @msglen: msg length
1337 *
1338 * add guest mac address filter
1339 **/
1340static int i40e_vc_add_mac_addr_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1341{
1342 struct i40e_virtchnl_ether_addr_list *al =
1343 (struct i40e_virtchnl_ether_addr_list *)msg;
1344 struct i40e_pf *pf = vf->pf;
1345 struct i40e_vsi *vsi = NULL;
1346 u16 vsi_id = al->vsi_id;
1347 i40e_status aq_ret = 0;
1348 int i;
1349
1350 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
1351 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) ||
1352 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1353 aq_ret = I40E_ERR_PARAM;
1354 goto error_param;
1355 }
1356
1357 for (i = 0; i < al->num_elements; i++) {
1358 if (is_broadcast_ether_addr(al->list[i].addr) ||
1359 is_zero_ether_addr(al->list[i].addr)) {
1360 dev_err(&pf->pdev->dev, "invalid VF MAC addr %pMAC\n",
1361 al->list[i].addr);
adaf3560 1362 aq_ret = I40E_ERR_INVALID_MAC_ADDR;
5c3c48ac
JB
1363 goto error_param;
1364 }
1365 }
1366 vsi = pf->vsi[vsi_id];
1367
1368 /* add new addresses to the list */
1369 for (i = 0; i < al->num_elements; i++) {
1370 struct i40e_mac_filter *f;
1371
1372 f = i40e_find_mac(vsi, al->list[i].addr, true, false);
7e68edf9 1373 if (!f) {
5c3c48ac
JB
1374 if (i40e_is_vsi_in_vlan(vsi))
1375 f = i40e_put_mac_in_vlan(vsi, al->list[i].addr,
1376 true, false);
1377 else
1378 f = i40e_add_filter(vsi, al->list[i].addr, -1,
1379 true, false);
1380 }
1381
1382 if (!f) {
1383 dev_err(&pf->pdev->dev,
1384 "Unable to add VF MAC filter\n");
1385 aq_ret = I40E_ERR_PARAM;
1386 goto error_param;
1387 }
1388 }
1389
1390 /* program the updated filter list */
1391 if (i40e_sync_vsi_filters(vsi))
1392 dev_err(&pf->pdev->dev, "Unable to program VF MAC filters\n");
1393
1394error_param:
1395 /* send the response to the vf */
1396 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS,
1397 aq_ret);
1398}
1399
1400/**
1401 * i40e_vc_del_mac_addr_msg
1402 * @vf: pointer to the vf info
1403 * @msg: pointer to the msg buffer
1404 * @msglen: msg length
1405 *
1406 * remove guest mac address filter
1407 **/
1408static int i40e_vc_del_mac_addr_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1409{
1410 struct i40e_virtchnl_ether_addr_list *al =
1411 (struct i40e_virtchnl_ether_addr_list *)msg;
1412 struct i40e_pf *pf = vf->pf;
1413 struct i40e_vsi *vsi = NULL;
1414 u16 vsi_id = al->vsi_id;
1415 i40e_status aq_ret = 0;
1416 int i;
1417
1418 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
1419 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) ||
1420 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1421 aq_ret = I40E_ERR_PARAM;
1422 goto error_param;
1423 }
1424 vsi = pf->vsi[vsi_id];
1425
1426 /* delete addresses from the list */
1427 for (i = 0; i < al->num_elements; i++)
1428 i40e_del_filter(vsi, al->list[i].addr,
1429 I40E_VLAN_ANY, true, false);
1430
1431 /* program the updated filter list */
1432 if (i40e_sync_vsi_filters(vsi))
1433 dev_err(&pf->pdev->dev, "Unable to program VF MAC filters\n");
1434
1435error_param:
1436 /* send the response to the vf */
1437 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS,
1438 aq_ret);
1439}
1440
1441/**
1442 * i40e_vc_add_vlan_msg
1443 * @vf: pointer to the vf info
1444 * @msg: pointer to the msg buffer
1445 * @msglen: msg length
1446 *
1447 * program guest vlan id
1448 **/
1449static int i40e_vc_add_vlan_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1450{
1451 struct i40e_virtchnl_vlan_filter_list *vfl =
1452 (struct i40e_virtchnl_vlan_filter_list *)msg;
1453 struct i40e_pf *pf = vf->pf;
1454 struct i40e_vsi *vsi = NULL;
1455 u16 vsi_id = vfl->vsi_id;
1456 i40e_status aq_ret = 0;
1457 int i;
1458
1459 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
1460 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) ||
1461 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1462 aq_ret = I40E_ERR_PARAM;
1463 goto error_param;
1464 }
1465
1466 for (i = 0; i < vfl->num_elements; i++) {
1467 if (vfl->vlan_id[i] > I40E_MAX_VLANID) {
1468 aq_ret = I40E_ERR_PARAM;
1469 dev_err(&pf->pdev->dev,
1470 "invalid VF VLAN id %d\n", vfl->vlan_id[i]);
1471 goto error_param;
1472 }
1473 }
1474 vsi = pf->vsi[vsi_id];
1475 if (vsi->info.pvid) {
1476 aq_ret = I40E_ERR_PARAM;
1477 goto error_param;
1478 }
1479
1480 i40e_vlan_stripping_enable(vsi);
1481 for (i = 0; i < vfl->num_elements; i++) {
1482 /* add new VLAN filter */
1483 int ret = i40e_vsi_add_vlan(vsi, vfl->vlan_id[i]);
1484 if (ret)
1485 dev_err(&pf->pdev->dev,
1486 "Unable to add VF vlan filter %d, error %d\n",
1487 vfl->vlan_id[i], ret);
1488 }
1489
1490error_param:
1491 /* send the response to the vf */
1492 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_ADD_VLAN, aq_ret);
1493}
1494
1495/**
1496 * i40e_vc_remove_vlan_msg
1497 * @vf: pointer to the vf info
1498 * @msg: pointer to the msg buffer
1499 * @msglen: msg length
1500 *
1501 * remove programmed guest vlan id
1502 **/
1503static int i40e_vc_remove_vlan_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1504{
1505 struct i40e_virtchnl_vlan_filter_list *vfl =
1506 (struct i40e_virtchnl_vlan_filter_list *)msg;
1507 struct i40e_pf *pf = vf->pf;
1508 struct i40e_vsi *vsi = NULL;
1509 u16 vsi_id = vfl->vsi_id;
1510 i40e_status aq_ret = 0;
1511 int i;
1512
1513 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
1514 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) ||
1515 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1516 aq_ret = I40E_ERR_PARAM;
1517 goto error_param;
1518 }
1519
1520 for (i = 0; i < vfl->num_elements; i++) {
1521 if (vfl->vlan_id[i] > I40E_MAX_VLANID) {
1522 aq_ret = I40E_ERR_PARAM;
1523 goto error_param;
1524 }
1525 }
1526
1527 vsi = pf->vsi[vsi_id];
1528 if (vsi->info.pvid) {
1529 aq_ret = I40E_ERR_PARAM;
1530 goto error_param;
1531 }
1532
1533 for (i = 0; i < vfl->num_elements; i++) {
1534 int ret = i40e_vsi_kill_vlan(vsi, vfl->vlan_id[i]);
1535 if (ret)
1536 dev_err(&pf->pdev->dev,
1537 "Unable to delete VF vlan filter %d, error %d\n",
1538 vfl->vlan_id[i], ret);
1539 }
1540
1541error_param:
1542 /* send the response to the vf */
1543 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_DEL_VLAN, aq_ret);
1544}
1545
5c3c48ac
JB
1546/**
1547 * i40e_vc_validate_vf_msg
1548 * @vf: pointer to the vf info
1549 * @msg: pointer to the msg buffer
1550 * @msglen: msg length
1551 * @msghndl: msg handle
1552 *
1553 * validate msg
1554 **/
1555static int i40e_vc_validate_vf_msg(struct i40e_vf *vf, u32 v_opcode,
1556 u32 v_retval, u8 *msg, u16 msglen)
1557{
1558 bool err_msg_format = false;
1559 int valid_len;
1560
1561 /* Check if VF is disabled. */
1562 if (test_bit(I40E_VF_STAT_DISABLED, &vf->vf_states))
1563 return I40E_ERR_PARAM;
1564
1565 /* Validate message length. */
1566 switch (v_opcode) {
1567 case I40E_VIRTCHNL_OP_VERSION:
1568 valid_len = sizeof(struct i40e_virtchnl_version_info);
1569 break;
1570 case I40E_VIRTCHNL_OP_RESET_VF:
1571 case I40E_VIRTCHNL_OP_GET_VF_RESOURCES:
1572 valid_len = 0;
1573 break;
1574 case I40E_VIRTCHNL_OP_CONFIG_TX_QUEUE:
1575 valid_len = sizeof(struct i40e_virtchnl_txq_info);
1576 break;
1577 case I40E_VIRTCHNL_OP_CONFIG_RX_QUEUE:
1578 valid_len = sizeof(struct i40e_virtchnl_rxq_info);
1579 break;
1580 case I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES:
1581 valid_len = sizeof(struct i40e_virtchnl_vsi_queue_config_info);
1582 if (msglen >= valid_len) {
1583 struct i40e_virtchnl_vsi_queue_config_info *vqc =
1584 (struct i40e_virtchnl_vsi_queue_config_info *)msg;
1585 valid_len += (vqc->num_queue_pairs *
1586 sizeof(struct
1587 i40e_virtchnl_queue_pair_info));
1588 if (vqc->num_queue_pairs == 0)
1589 err_msg_format = true;
1590 }
1591 break;
1592 case I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP:
1593 valid_len = sizeof(struct i40e_virtchnl_irq_map_info);
1594 if (msglen >= valid_len) {
1595 struct i40e_virtchnl_irq_map_info *vimi =
1596 (struct i40e_virtchnl_irq_map_info *)msg;
1597 valid_len += (vimi->num_vectors *
1598 sizeof(struct i40e_virtchnl_vector_map));
1599 if (vimi->num_vectors == 0)
1600 err_msg_format = true;
1601 }
1602 break;
1603 case I40E_VIRTCHNL_OP_ENABLE_QUEUES:
1604 case I40E_VIRTCHNL_OP_DISABLE_QUEUES:
1605 valid_len = sizeof(struct i40e_virtchnl_queue_select);
1606 break;
1607 case I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS:
1608 case I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS:
1609 valid_len = sizeof(struct i40e_virtchnl_ether_addr_list);
1610 if (msglen >= valid_len) {
1611 struct i40e_virtchnl_ether_addr_list *veal =
1612 (struct i40e_virtchnl_ether_addr_list *)msg;
1613 valid_len += veal->num_elements *
1614 sizeof(struct i40e_virtchnl_ether_addr);
1615 if (veal->num_elements == 0)
1616 err_msg_format = true;
1617 }
1618 break;
1619 case I40E_VIRTCHNL_OP_ADD_VLAN:
1620 case I40E_VIRTCHNL_OP_DEL_VLAN:
1621 valid_len = sizeof(struct i40e_virtchnl_vlan_filter_list);
1622 if (msglen >= valid_len) {
1623 struct i40e_virtchnl_vlan_filter_list *vfl =
1624 (struct i40e_virtchnl_vlan_filter_list *)msg;
1625 valid_len += vfl->num_elements * sizeof(u16);
1626 if (vfl->num_elements == 0)
1627 err_msg_format = true;
1628 }
1629 break;
1630 case I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE:
1631 valid_len = sizeof(struct i40e_virtchnl_promisc_info);
1632 break;
1633 case I40E_VIRTCHNL_OP_GET_STATS:
1634 valid_len = sizeof(struct i40e_virtchnl_queue_select);
1635 break;
1636 /* These are always errors coming from the VF. */
1637 case I40E_VIRTCHNL_OP_EVENT:
1638 case I40E_VIRTCHNL_OP_UNKNOWN:
1639 default:
1640 return -EPERM;
1641 break;
1642 }
1643 /* few more checks */
1644 if ((valid_len != msglen) || (err_msg_format)) {
1645 i40e_vc_send_resp_to_vf(vf, v_opcode, I40E_ERR_PARAM);
1646 return -EINVAL;
1647 } else {
1648 return 0;
1649 }
1650}
1651
1652/**
1653 * i40e_vc_process_vf_msg
1654 * @pf: pointer to the pf structure
1655 * @vf_id: source vf id
1656 * @msg: pointer to the msg buffer
1657 * @msglen: msg length
1658 * @msghndl: msg handle
1659 *
1660 * called from the common aeq/arq handler to
1661 * process request from vf
1662 **/
1663int i40e_vc_process_vf_msg(struct i40e_pf *pf, u16 vf_id, u32 v_opcode,
1664 u32 v_retval, u8 *msg, u16 msglen)
1665{
5c3c48ac 1666 struct i40e_hw *hw = &pf->hw;
6c1b5bff 1667 struct i40e_vf *vf;
5c3c48ac
JB
1668 int ret;
1669
1670 pf->vf_aq_requests++;
6c1b5bff
MW
1671 if (vf_id >= pf->num_alloc_vfs)
1672 return -EINVAL;
1673 vf = &(pf->vf[vf_id]);
5c3c48ac
JB
1674 /* perform basic checks on the msg */
1675 ret = i40e_vc_validate_vf_msg(vf, v_opcode, v_retval, msg, msglen);
1676
1677 if (ret) {
499ec80f
MW
1678 dev_err(&pf->pdev->dev, "Invalid message from vf %d, opcode %d, len %d\n",
1679 vf_id, v_opcode, msglen);
5c3c48ac
JB
1680 return ret;
1681 }
1682 wr32(hw, I40E_VFGEN_RSTAT1(vf_id), I40E_VFR_VFACTIVE);
1683 switch (v_opcode) {
1684 case I40E_VIRTCHNL_OP_VERSION:
1685 ret = i40e_vc_get_version_msg(vf);
1686 break;
1687 case I40E_VIRTCHNL_OP_GET_VF_RESOURCES:
1688 ret = i40e_vc_get_vf_resources_msg(vf);
1689 break;
1690 case I40E_VIRTCHNL_OP_RESET_VF:
fc18eaa0
MW
1691 i40e_vc_reset_vf_msg(vf);
1692 ret = 0;
5c3c48ac
JB
1693 break;
1694 case I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE:
1695 ret = i40e_vc_config_promiscuous_mode_msg(vf, msg, msglen);
1696 break;
1697 case I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES:
1698 ret = i40e_vc_config_queues_msg(vf, msg, msglen);
1699 break;
1700 case I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP:
1701 ret = i40e_vc_config_irq_map_msg(vf, msg, msglen);
1702 break;
1703 case I40E_VIRTCHNL_OP_ENABLE_QUEUES:
1704 ret = i40e_vc_enable_queues_msg(vf, msg, msglen);
1705 break;
1706 case I40E_VIRTCHNL_OP_DISABLE_QUEUES:
1707 ret = i40e_vc_disable_queues_msg(vf, msg, msglen);
1708 break;
1709 case I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS:
1710 ret = i40e_vc_add_mac_addr_msg(vf, msg, msglen);
1711 break;
1712 case I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS:
1713 ret = i40e_vc_del_mac_addr_msg(vf, msg, msglen);
1714 break;
1715 case I40E_VIRTCHNL_OP_ADD_VLAN:
1716 ret = i40e_vc_add_vlan_msg(vf, msg, msglen);
1717 break;
1718 case I40E_VIRTCHNL_OP_DEL_VLAN:
1719 ret = i40e_vc_remove_vlan_msg(vf, msg, msglen);
1720 break;
1721 case I40E_VIRTCHNL_OP_GET_STATS:
1722 ret = i40e_vc_get_stats_msg(vf, msg, msglen);
1723 break;
5c3c48ac
JB
1724 case I40E_VIRTCHNL_OP_UNKNOWN:
1725 default:
1726 dev_err(&pf->pdev->dev,
1727 "Unsupported opcode %d from vf %d\n", v_opcode, vf_id);
1728 ret = i40e_vc_send_resp_to_vf(vf, v_opcode,
1729 I40E_ERR_NOT_IMPLEMENTED);
1730 break;
1731 }
1732
1733 return ret;
1734}
1735
1736/**
1737 * i40e_vc_process_vflr_event
1738 * @pf: pointer to the pf structure
1739 *
1740 * called from the vlfr irq handler to
1741 * free up vf resources and state variables
1742 **/
1743int i40e_vc_process_vflr_event(struct i40e_pf *pf)
1744{
1745 u32 reg, reg_idx, bit_idx, vf_id;
1746 struct i40e_hw *hw = &pf->hw;
1747 struct i40e_vf *vf;
1748
1749 if (!test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
1750 return 0;
1751
1752 clear_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
1753 for (vf_id = 0; vf_id < pf->num_alloc_vfs; vf_id++) {
1754 reg_idx = (hw->func_caps.vf_base_id + vf_id) / 32;
1755 bit_idx = (hw->func_caps.vf_base_id + vf_id) % 32;
1756 /* read GLGEN_VFLRSTAT register to find out the flr vfs */
1757 vf = &pf->vf[vf_id];
1758 reg = rd32(hw, I40E_GLGEN_VFLRSTAT(reg_idx));
1759 if (reg & (1 << bit_idx)) {
1760 /* clear the bit in GLGEN_VFLRSTAT */
1761 wr32(hw, I40E_GLGEN_VFLRSTAT(reg_idx), (1 << bit_idx));
1762
fc18eaa0 1763 i40e_reset_vf(vf, true);
5c3c48ac
JB
1764 }
1765 }
1766
1767 /* re-enable vflr interrupt cause */
1768 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
1769 reg |= I40E_PFINT_ICR0_ENA_VFLR_MASK;
1770 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
1771 i40e_flush(hw);
1772
1773 return 0;
1774}
1775
1776/**
1777 * i40e_vc_vf_broadcast
1778 * @pf: pointer to the pf structure
1779 * @opcode: operation code
1780 * @retval: return value
1781 * @msg: pointer to the msg buffer
1782 * @msglen: msg length
1783 *
1784 * send a message to all VFs on a given PF
1785 **/
1786static void i40e_vc_vf_broadcast(struct i40e_pf *pf,
1787 enum i40e_virtchnl_ops v_opcode,
1788 i40e_status v_retval, u8 *msg,
1789 u16 msglen)
1790{
1791 struct i40e_hw *hw = &pf->hw;
1792 struct i40e_vf *vf = pf->vf;
1793 int i;
1794
1795 for (i = 0; i < pf->num_alloc_vfs; i++) {
1796 /* Ignore return value on purpose - a given VF may fail, but
1797 * we need to keep going and send to all of them
1798 */
1799 i40e_aq_send_msg_to_vf(hw, vf->vf_id, v_opcode, v_retval,
1800 msg, msglen, NULL);
1801 vf++;
1802 }
1803}
1804
1805/**
1806 * i40e_vc_notify_link_state
1807 * @pf: pointer to the pf structure
1808 *
1809 * send a link status message to all VFs on a given PF
1810 **/
1811void i40e_vc_notify_link_state(struct i40e_pf *pf)
1812{
1813 struct i40e_virtchnl_pf_event pfe;
1814
1815 pfe.event = I40E_VIRTCHNL_EVENT_LINK_CHANGE;
1816 pfe.severity = I40E_PF_EVENT_SEVERITY_INFO;
1817 pfe.event_data.link_event.link_status =
1818 pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP;
1819 pfe.event_data.link_event.link_speed = pf->hw.phy.link_info.link_speed;
1820
1821 i40e_vc_vf_broadcast(pf, I40E_VIRTCHNL_OP_EVENT, I40E_SUCCESS,
1822 (u8 *)&pfe, sizeof(struct i40e_virtchnl_pf_event));
1823}
1824
1825/**
1826 * i40e_vc_notify_reset
1827 * @pf: pointer to the pf structure
1828 *
1829 * indicate a pending reset to all VFs on a given PF
1830 **/
1831void i40e_vc_notify_reset(struct i40e_pf *pf)
1832{
1833 struct i40e_virtchnl_pf_event pfe;
1834
1835 pfe.event = I40E_VIRTCHNL_EVENT_RESET_IMPENDING;
1836 pfe.severity = I40E_PF_EVENT_SEVERITY_CERTAIN_DOOM;
1837 i40e_vc_vf_broadcast(pf, I40E_VIRTCHNL_OP_EVENT, I40E_SUCCESS,
1838 (u8 *)&pfe, sizeof(struct i40e_virtchnl_pf_event));
1839}
1840
1841/**
1842 * i40e_vc_notify_vf_reset
1843 * @vf: pointer to the vf structure
1844 *
1845 * indicate a pending reset to the given VF
1846 **/
1847void i40e_vc_notify_vf_reset(struct i40e_vf *vf)
1848{
1849 struct i40e_virtchnl_pf_event pfe;
1850
1851 pfe.event = I40E_VIRTCHNL_EVENT_RESET_IMPENDING;
1852 pfe.severity = I40E_PF_EVENT_SEVERITY_CERTAIN_DOOM;
1853 i40e_aq_send_msg_to_vf(&vf->pf->hw, vf->vf_id, I40E_VIRTCHNL_OP_EVENT,
1854 I40E_SUCCESS, (u8 *)&pfe,
1855 sizeof(struct i40e_virtchnl_pf_event), NULL);
1856}
1857
1858/**
1859 * i40e_ndo_set_vf_mac
1860 * @netdev: network interface device structure
1861 * @vf_id: vf identifier
1862 * @mac: mac address
1863 *
1864 * program vf mac address
1865 **/
1866int i40e_ndo_set_vf_mac(struct net_device *netdev, int vf_id, u8 *mac)
1867{
1868 struct i40e_netdev_priv *np = netdev_priv(netdev);
1869 struct i40e_vsi *vsi = np->vsi;
1870 struct i40e_pf *pf = vsi->back;
1871 struct i40e_mac_filter *f;
1872 struct i40e_vf *vf;
1873 int ret = 0;
1874
1875 /* validate the request */
1876 if (vf_id >= pf->num_alloc_vfs) {
1877 dev_err(&pf->pdev->dev,
1878 "Invalid VF Identifier %d\n", vf_id);
1879 ret = -EINVAL;
1880 goto error_param;
1881 }
1882
1883 vf = &(pf->vf[vf_id]);
1884 vsi = pf->vsi[vf->lan_vsi_index];
1885 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
1886 dev_err(&pf->pdev->dev,
1887 "Uninitialized VF %d\n", vf_id);
1888 ret = -EINVAL;
1889 goto error_param;
1890 }
1891
1892 if (!is_valid_ether_addr(mac)) {
1893 dev_err(&pf->pdev->dev,
1894 "Invalid VF ethernet address\n");
1895 ret = -EINVAL;
1896 goto error_param;
1897 }
1898
1899 /* delete the temporary mac address */
1900 i40e_del_filter(vsi, vf->default_lan_addr.addr, 0, true, false);
1901
1902 /* add the new mac address */
1903 f = i40e_add_filter(vsi, mac, 0, true, false);
1904 if (!f) {
1905 dev_err(&pf->pdev->dev,
1906 "Unable to add VF ucast filter\n");
1907 ret = -ENOMEM;
1908 goto error_param;
1909 }
1910
1911 dev_info(&pf->pdev->dev, "Setting MAC %pM on VF %d\n", mac, vf_id);
1912 /* program mac filter */
1913 if (i40e_sync_vsi_filters(vsi)) {
1914 dev_err(&pf->pdev->dev, "Unable to program ucast filters\n");
1915 ret = -EIO;
1916 goto error_param;
1917 }
1918 memcpy(vf->default_lan_addr.addr, mac, ETH_ALEN);
1919 dev_info(&pf->pdev->dev, "Reload the VF driver to make this change effective.\n");
1920 ret = 0;
1921
1922error_param:
1923 return ret;
1924}
1925
1926/**
1927 * i40e_ndo_set_vf_port_vlan
1928 * @netdev: network interface device structure
1929 * @vf_id: vf identifier
1930 * @vlan_id: mac address
1931 * @qos: priority setting
1932 *
1933 * program vf vlan id and/or qos
1934 **/
1935int i40e_ndo_set_vf_port_vlan(struct net_device *netdev,
1936 int vf_id, u16 vlan_id, u8 qos)
1937{
1938 struct i40e_netdev_priv *np = netdev_priv(netdev);
1939 struct i40e_pf *pf = np->vsi->back;
1940 struct i40e_vsi *vsi;
1941 struct i40e_vf *vf;
1942 int ret = 0;
1943
1944 /* validate the request */
1945 if (vf_id >= pf->num_alloc_vfs) {
1946 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
1947 ret = -EINVAL;
1948 goto error_pvid;
1949 }
1950
1951 if ((vlan_id > I40E_MAX_VLANID) || (qos > 7)) {
1952 dev_err(&pf->pdev->dev, "Invalid VF Parameters\n");
1953 ret = -EINVAL;
1954 goto error_pvid;
1955 }
1956
1957 vf = &(pf->vf[vf_id]);
1958 vsi = pf->vsi[vf->lan_vsi_index];
1959 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
1960 dev_err(&pf->pdev->dev, "Uninitialized VF %d\n", vf_id);
1961 ret = -EINVAL;
1962 goto error_pvid;
1963 }
1964
1965 if (vsi->info.pvid) {
1966 /* kill old VLAN */
1967 ret = i40e_vsi_kill_vlan(vsi, (le16_to_cpu(vsi->info.pvid) &
1968 VLAN_VID_MASK));
1969 if (ret) {
1970 dev_info(&vsi->back->pdev->dev,
1971 "remove VLAN failed, ret=%d, aq_err=%d\n",
1972 ret, pf->hw.aq.asq_last_status);
1973 }
1974 }
1975 if (vlan_id || qos)
1976 ret = i40e_vsi_add_pvid(vsi,
1977 vlan_id | (qos << I40E_VLAN_PRIORITY_SHIFT));
1978 else
6c12fcbf 1979 i40e_vsi_remove_pvid(vsi);
5c3c48ac
JB
1980
1981 if (vlan_id) {
1982 dev_info(&pf->pdev->dev, "Setting VLAN %d, QOS 0x%x on VF %d\n",
1983 vlan_id, qos, vf_id);
1984
1985 /* add new VLAN filter */
1986 ret = i40e_vsi_add_vlan(vsi, vlan_id);
1987 if (ret) {
1988 dev_info(&vsi->back->pdev->dev,
1989 "add VF VLAN failed, ret=%d aq_err=%d\n", ret,
1990 vsi->back->hw.aq.asq_last_status);
1991 goto error_pvid;
1992 }
1993 }
1994
1995 if (ret) {
1996 dev_err(&pf->pdev->dev, "Unable to update VF vsi context\n");
1997 goto error_pvid;
1998 }
6c12fcbf
GR
1999 /* The Port VLAN needs to be saved across resets the same as the
2000 * default LAN MAC address.
2001 */
2002 vf->port_vlan_id = le16_to_cpu(vsi->info.pvid);
5c3c48ac
JB
2003 ret = 0;
2004
2005error_pvid:
2006 return ret;
2007}
2008
2009/**
2010 * i40e_ndo_set_vf_bw
2011 * @netdev: network interface device structure
2012 * @vf_id: vf identifier
2013 * @tx_rate: tx rate
2014 *
2015 * configure vf tx rate
2016 **/
2017int i40e_ndo_set_vf_bw(struct net_device *netdev, int vf_id, int tx_rate)
2018{
2019 return -EOPNOTSUPP;
2020}
2021
2022/**
2023 * i40e_ndo_get_vf_config
2024 * @netdev: network interface device structure
2025 * @vf_id: vf identifier
2026 * @ivi: vf configuration structure
2027 *
2028 * return vf configuration
2029 **/
2030int i40e_ndo_get_vf_config(struct net_device *netdev,
2031 int vf_id, struct ifla_vf_info *ivi)
2032{
2033 struct i40e_netdev_priv *np = netdev_priv(netdev);
5c3c48ac
JB
2034 struct i40e_vsi *vsi = np->vsi;
2035 struct i40e_pf *pf = vsi->back;
2036 struct i40e_vf *vf;
2037 int ret = 0;
2038
2039 /* validate the request */
2040 if (vf_id >= pf->num_alloc_vfs) {
2041 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
2042 ret = -EINVAL;
2043 goto error_param;
2044 }
2045
2046 vf = &(pf->vf[vf_id]);
2047 /* first vsi is always the LAN vsi */
2048 vsi = pf->vsi[vf->lan_vsi_index];
2049 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
2050 dev_err(&pf->pdev->dev, "Uninitialized VF %d\n", vf_id);
2051 ret = -EINVAL;
2052 goto error_param;
2053 }
2054
2055 ivi->vf = vf_id;
2056
f4a1c5cf 2057 memcpy(&ivi->mac, vf->default_lan_addr.addr, ETH_ALEN);
5c3c48ac
JB
2058
2059 ivi->tx_rate = 0;
2060 ivi->vlan = le16_to_cpu(vsi->info.pvid) & I40E_VLAN_MASK;
2061 ivi->qos = (le16_to_cpu(vsi->info.pvid) & I40E_PRIORITY_MASK) >>
2062 I40E_VLAN_PRIORITY_SHIFT;
2063 ret = 0;
2064
2065error_param:
2066 return ret;
2067}