[mirror_ubuntu-eoan-kernel.git] / drivers / net / ethernet / intel / ixgb / ixgb_ee.h

/* SPDX-License-Identifier: GPL-2.0 */
/*******************************************************************************

  Intel PRO/10GbE Linux driver
  Copyright(c) 1999 - 2008 Intel Corporation.

  This program is free software; you can redistribute it and/or modify it
  under the terms and conditions of the GNU General Public License,
  version 2, as published by the Free Software Foundation.

  This program is distributed in the hope it will be useful, but WITHOUT
  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  more details.

  You should have received a copy of the GNU General Public License along with
  this program; if not, write to the Free Software Foundation, Inc.,
  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.

  The full GNU General Public License is included in this distribution in
  the file called "COPYING".

  Contact Information:
  Linux NICS <linux.nics@intel.com>
  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497

*******************************************************************************/

#ifndef _IXGB_EE_H_
#define _IXGB_EE_H_

#define IXGB_EEPROM_SIZE    64	/* Size in words */

/* EEPROM Commands */
#define EEPROM_READ_OPCODE  0x6	/* EEPROM read opcode */
#define EEPROM_WRITE_OPCODE 0x5	/* EEPROM write opcode */
#define EEPROM_ERASE_OPCODE 0x7	/* EEPROM erase opcode */
#define EEPROM_EWEN_OPCODE  0x13	/* EEPROM erase/write enable */
#define EEPROM_EWDS_OPCODE  0x10	/* EEPROM erase/write disable */

/* EEPROM MAP (Word Offsets) */
#define EEPROM_IA_1_2_REG        0x0000
#define EEPROM_IA_3_4_REG        0x0001
#define EEPROM_IA_5_6_REG        0x0002
#define EEPROM_COMPATIBILITY_REG 0x0003
#define EEPROM_PBA_1_2_REG       0x0008
#define EEPROM_PBA_3_4_REG       0x0009
#define EEPROM_INIT_CONTROL1_REG 0x000A
#define EEPROM_SUBSYS_ID_REG     0x000B
#define EEPROM_SUBVEND_ID_REG    0x000C
#define EEPROM_DEVICE_ID_REG     0x000D
#define EEPROM_VENDOR_ID_REG     0x000E
#define EEPROM_INIT_CONTROL2_REG 0x000F
#define EEPROM_SWDPINS_REG       0x0020
#define EEPROM_CIRCUIT_CTRL_REG  0x0021
#define EEPROM_D0_D3_POWER_REG   0x0022
#define EEPROM_FLASH_VERSION     0x0032
#define EEPROM_CHECKSUM_REG      0x003F

/* Mask bits for fields in Word 0x0a of the EEPROM */

#define EEPROM_ICW1_SIGNATURE_MASK  0xC000
#define EEPROM_ICW1_SIGNATURE_VALID 0x4000
#define EEPROM_ICW1_SIGNATURE_CLEAR 0x0000

/* For checksumming, the sum of all words in the EEPROM should equal 0xBABA. */
#define EEPROM_SUM 0xBABA

/* EEPROM Map Sizes (Byte Counts) */
#define PBA_SIZE 4

/* EEPROM Map defines (WORD OFFSETS)*/

/* EEPROM structure */
struct ixgb_ee_map_type {
	u8 mac_addr[ETH_ALEN];
	__le16 compatibility;
	__le16 reserved1[4];
	__le32 pba_number;
	__le16 init_ctrl_reg_1;
	__le16 subsystem_id;
	__le16 subvendor_id;
	__le16 device_id;
	__le16 vendor_id;
	__le16 init_ctrl_reg_2;
	__le16 oem_reserved[16];
	__le16 swdpins_reg;
	__le16 circuit_ctrl_reg;
	u8 d3_power;
	u8 d0_power;
	__le16 reserved2[28];
	__le16 checksum;
};

/* EEPROM Functions */
u16 ixgb_read_eeprom(struct ixgb_hw *hw, u16 reg);

bool ixgb_validate_eeprom_checksum(struct ixgb_hw *hw);

void ixgb_update_eeprom_checksum(struct ixgb_hw *hw);

void ixgb_write_eeprom(struct ixgb_hw *hw, u16 reg, u16 data);

#endif				/* IXGB_EE_H */
Commit	Line	Data
ae06c70b	1	/* SPDX-License-Identifier: GPL-2.0 */
1da177e4 LT	2	/*******************************************************************************
1da177e4 LT	3
0abb6eb1	4	Intel PRO/10GbE Linux driver
f731a9ef	5	Copyright(c) 1999 - 2008 Intel Corporation.
0abb6eb1 AK	6
	7	This program is free software; you can redistribute it and/or modify it
	8	under the terms and conditions of the GNU General Public License,
	9	version 2, as published by the Free Software Foundation.
	10
	11	This program is distributed in the hope it will be useful, but WITHOUT
	12	ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
	13	FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4	14	more details.
0abb6eb1	15
1da177e4	16	You should have received a copy of the GNU General Public License along with
0abb6eb1 AK	17	this program; if not, write to the Free Software Foundation, Inc.,
	18	51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
	19
	20	The full GNU General Public License is included in this distribution in
	21	the file called "COPYING".
	22
1da177e4 LT	23	Contact Information:
1da177e4 LT	24	Linux NICS <linux.nics@intel.com>
0abb6eb1	25	e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4 LT	26	Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
	27
	28	*******************************************************************************/
	29
	30	#ifndef _IXGB_EE_H_
	31	#define _IXGB_EE_H_
	32
	33	#define IXGB_EEPROM_SIZE 64 /* Size in words */
	34
1da177e4	35	/* EEPROM Commands */
52035bdb JB	36	#define EEPROM_READ_OPCODE 0x6 /* EEPROM read opcode */
	37	#define EEPROM_WRITE_OPCODE 0x5 /* EEPROM write opcode */
	38	#define EEPROM_ERASE_OPCODE 0x7 /* EEPROM erase opcode */
	39	#define EEPROM_EWEN_OPCODE 0x13 /* EEPROM erase/write enable */
	40	#define EEPROM_EWDS_OPCODE 0x10 /* EEPROM erase/write disable */
1da177e4 LT	41
	42	/* EEPROM MAP (Word Offsets) */
	43	#define EEPROM_IA_1_2_REG 0x0000
	44	#define EEPROM_IA_3_4_REG 0x0001
	45	#define EEPROM_IA_5_6_REG 0x0002
	46	#define EEPROM_COMPATIBILITY_REG 0x0003
	47	#define EEPROM_PBA_1_2_REG 0x0008
	48	#define EEPROM_PBA_3_4_REG 0x0009
	49	#define EEPROM_INIT_CONTROL1_REG 0x000A
	50	#define EEPROM_SUBSYS_ID_REG 0x000B
	51	#define EEPROM_SUBVEND_ID_REG 0x000C
	52	#define EEPROM_DEVICE_ID_REG 0x000D
	53	#define EEPROM_VENDOR_ID_REG 0x000E
	54	#define EEPROM_INIT_CONTROL2_REG 0x000F
	55	#define EEPROM_SWDPINS_REG 0x0020
	56	#define EEPROM_CIRCUIT_CTRL_REG 0x0021
	57	#define EEPROM_D0_D3_POWER_REG 0x0022
	58	#define EEPROM_FLASH_VERSION 0x0032
	59	#define EEPROM_CHECKSUM_REG 0x003F
	60
	61	/* Mask bits for fields in Word 0x0a of the EEPROM */
	62
	63	#define EEPROM_ICW1_SIGNATURE_MASK 0xC000
	64	#define EEPROM_ICW1_SIGNATURE_VALID 0x4000
	65	#define EEPROM_ICW1_SIGNATURE_CLEAR 0x0000
	66
	67	/* For checksumming, the sum of all words in the EEPROM should equal 0xBABA. */
	68	#define EEPROM_SUM 0xBABA
	69
	70	/* EEPROM Map Sizes (Byte Counts) */
	71	#define PBA_SIZE 4
	72
	73	/* EEPROM Map defines (WORD OFFSETS)*/
	74
	75	/* EEPROM structure */
	76	struct ixgb_ee_map_type {
ac5ac789	77	u8 mac_addr[ETH_ALEN];
c676504e AV	78	__le16 compatibility;
	79	__le16 reserved1[4];
	80	__le32 pba_number;
	81	__le16 init_ctrl_reg_1;
	82	__le16 subsystem_id;
	83	__le16 subvendor_id;
	84	__le16 device_id;
	85	__le16 vendor_id;
	86	__le16 init_ctrl_reg_2;
	87	__le16 oem_reserved[16];
	88	__le16 swdpins_reg;
	89	__le16 circuit_ctrl_reg;
222441a6 JP	90	u8 d3_power;
222441a6 JP	91	u8 d0_power;
c676504e AV	92	__le16 reserved2[28];
c676504e AV	93	__le16 checksum;
1da177e4 LT	94	};
	95
	96	/* EEPROM Functions */
222441a6	97	u16 ixgb_read_eeprom(struct ixgb_hw *hw, u16 reg);
1da177e4	98
446490ca	99	bool ixgb_validate_eeprom_checksum(struct ixgb_hw *hw);
1da177e4 LT	100
	101	void ixgb_update_eeprom_checksum(struct ixgb_hw *hw);
	102
222441a6	103	void ixgb_write_eeprom(struct ixgb_hw *hw, u16 reg, u16 data);
1da177e4 LT	104
1da177e4 LT	105	#endif /* IXGB_EE_H */