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2f90b865 AD |
1 | /******************************************************************************* |
2 | ||
3 | Intel 10 Gigabit PCI Express Linux driver | |
94971820 | 4 | Copyright(c) 1999 - 2012 Intel Corporation. |
2f90b865 AD |
5 | |
6 | This program is free software; you can redistribute it and/or modify it | |
7 | under the terms and conditions of the GNU General Public License, | |
8 | version 2, as published by the Free Software Foundation. | |
9 | ||
10 | This program is distributed in the hope it will be useful, but WITHOUT | |
11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
13 | more details. | |
14 | ||
15 | You should have received a copy of the GNU General Public License along with | |
16 | this program; if not, write to the Free Software Foundation, Inc., | |
17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | |
18 | ||
19 | The full GNU General Public License is included in this distribution in | |
20 | the file called "COPYING". | |
21 | ||
22 | Contact Information: | |
23 | Linux NICS <linux.nics@intel.com> | |
24 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | |
25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
26 | ||
27 | *******************************************************************************/ | |
28 | ||
29 | #include "ixgbe.h" | |
30 | #include <linux/dcbnl.h> | |
62551d3e PWJ |
31 | #include "ixgbe_dcb_82598.h" |
32 | #include "ixgbe_dcb_82599.h" | |
2f90b865 AD |
33 | |
34 | /* Callbacks for DCB netlink in the kernel */ | |
35 | #define BIT_DCB_MODE 0x01 | |
36 | #define BIT_PFC 0x02 | |
37 | #define BIT_PG_RX 0x04 | |
38 | #define BIT_PG_TX 0x08 | |
8de8b2e6 | 39 | #define BIT_APP_UPCHG 0x10 |
235ea828 | 40 | #define BIT_LINKSPEED 0x80 |
2f90b865 | 41 | |
62551d3e PWJ |
42 | /* Responses for the DCB_C_SET_ALL command */ |
43 | #define DCB_HW_CHG_RST 0 /* DCB configuration changed with reset */ | |
44 | #define DCB_NO_HW_CHG 1 /* DCB configuration did not change */ | |
45 | #define DCB_HW_CHG 2 /* DCB configuration changed, no reset */ | |
46 | ||
f525c6d2 | 47 | static int ixgbe_copy_dcb_cfg(struct ixgbe_adapter *adapter, int tc_max) |
2f90b865 | 48 | { |
f525c6d2 JF |
49 | struct ixgbe_dcb_config *scfg = &adapter->temp_dcb_cfg; |
50 | struct ixgbe_dcb_config *dcfg = &adapter->dcb_cfg; | |
aacc1bea ME |
51 | struct tc_configuration *src = NULL; |
52 | struct tc_configuration *dst = NULL; | |
53 | int i, j; | |
54 | int tx = DCB_TX_CONFIG; | |
55 | int rx = DCB_RX_CONFIG; | |
56 | int changes = 0; | |
f525c6d2 JF |
57 | #ifdef IXGBE_FCOE |
58 | struct dcb_app app = { | |
59 | .selector = DCB_APP_IDTYPE_ETHTYPE, | |
60 | .protocol = ETH_P_FCOE, | |
61 | }; | |
62 | u8 up = dcb_getapp(adapter->netdev, &app); | |
2f90b865 | 63 | |
f525c6d2 JF |
64 | if (up && !(up & (1 << adapter->fcoe.up))) |
65 | changes |= BIT_APP_UPCHG; | |
66 | #endif | |
2f90b865 AD |
67 | |
68 | for (i = DCB_PG_ATTR_TC_0; i < tc_max + DCB_PG_ATTR_TC_0; i++) { | |
aacc1bea ME |
69 | src = &scfg->tc_config[i - DCB_PG_ATTR_TC_0]; |
70 | dst = &dcfg->tc_config[i - DCB_PG_ATTR_TC_0]; | |
2f90b865 | 71 | |
aacc1bea ME |
72 | if (dst->path[tx].prio_type != src->path[tx].prio_type) { |
73 | dst->path[tx].prio_type = src->path[tx].prio_type; | |
74 | changes |= BIT_PG_TX; | |
75 | } | |
2f90b865 | 76 | |
aacc1bea ME |
77 | if (dst->path[tx].bwg_id != src->path[tx].bwg_id) { |
78 | dst->path[tx].bwg_id = src->path[tx].bwg_id; | |
79 | changes |= BIT_PG_TX; | |
80 | } | |
2f90b865 | 81 | |
aacc1bea ME |
82 | if (dst->path[tx].bwg_percent != src->path[tx].bwg_percent) { |
83 | dst->path[tx].bwg_percent = src->path[tx].bwg_percent; | |
84 | changes |= BIT_PG_TX; | |
85 | } | |
2f90b865 | 86 | |
aacc1bea ME |
87 | if (dst->path[tx].up_to_tc_bitmap != |
88 | src->path[tx].up_to_tc_bitmap) { | |
89 | dst->path[tx].up_to_tc_bitmap = | |
90 | src->path[tx].up_to_tc_bitmap; | |
91 | changes |= (BIT_PG_TX | BIT_PFC | BIT_APP_UPCHG); | |
92 | } | |
2f90b865 | 93 | |
aacc1bea ME |
94 | if (dst->path[rx].prio_type != src->path[rx].prio_type) { |
95 | dst->path[rx].prio_type = src->path[rx].prio_type; | |
96 | changes |= BIT_PG_RX; | |
97 | } | |
2f90b865 | 98 | |
aacc1bea ME |
99 | if (dst->path[rx].bwg_id != src->path[rx].bwg_id) { |
100 | dst->path[rx].bwg_id = src->path[rx].bwg_id; | |
101 | changes |= BIT_PG_RX; | |
102 | } | |
2f90b865 | 103 | |
aacc1bea ME |
104 | if (dst->path[rx].bwg_percent != src->path[rx].bwg_percent) { |
105 | dst->path[rx].bwg_percent = src->path[rx].bwg_percent; | |
106 | changes |= BIT_PG_RX; | |
107 | } | |
2f90b865 | 108 | |
aacc1bea ME |
109 | if (dst->path[rx].up_to_tc_bitmap != |
110 | src->path[rx].up_to_tc_bitmap) { | |
111 | dst->path[rx].up_to_tc_bitmap = | |
112 | src->path[rx].up_to_tc_bitmap; | |
113 | changes |= (BIT_PG_RX | BIT_PFC | BIT_APP_UPCHG); | |
114 | } | |
2f90b865 AD |
115 | } |
116 | ||
117 | for (i = DCB_PG_ATTR_BW_ID_0; i < DCB_PG_ATTR_BW_ID_MAX; i++) { | |
aacc1bea ME |
118 | j = i - DCB_PG_ATTR_BW_ID_0; |
119 | if (dcfg->bw_percentage[tx][j] != scfg->bw_percentage[tx][j]) { | |
120 | dcfg->bw_percentage[tx][j] = scfg->bw_percentage[tx][j]; | |
121 | changes |= BIT_PG_TX; | |
122 | } | |
123 | if (dcfg->bw_percentage[rx][j] != scfg->bw_percentage[rx][j]) { | |
124 | dcfg->bw_percentage[rx][j] = scfg->bw_percentage[rx][j]; | |
125 | changes |= BIT_PG_RX; | |
126 | } | |
2f90b865 AD |
127 | } |
128 | ||
129 | for (i = DCB_PFC_UP_ATTR_0; i < DCB_PFC_UP_ATTR_MAX; i++) { | |
aacc1bea ME |
130 | j = i - DCB_PFC_UP_ATTR_0; |
131 | if (dcfg->tc_config[j].dcb_pfc != scfg->tc_config[j].dcb_pfc) { | |
132 | dcfg->tc_config[j].dcb_pfc = scfg->tc_config[j].dcb_pfc; | |
133 | changes |= BIT_PFC; | |
134 | } | |
2f90b865 AD |
135 | } |
136 | ||
aacc1bea ME |
137 | if (dcfg->pfc_mode_enable != scfg->pfc_mode_enable) { |
138 | dcfg->pfc_mode_enable = scfg->pfc_mode_enable; | |
139 | changes |= BIT_PFC; | |
140 | } | |
ea4af4f4 | 141 | |
aacc1bea | 142 | return changes; |
2f90b865 AD |
143 | } |
144 | ||
145 | static u8 ixgbe_dcbnl_get_state(struct net_device *netdev) | |
146 | { | |
147 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
148 | ||
2f90b865 AD |
149 | return !!(adapter->flags & IXGBE_FLAG_DCB_ENABLED); |
150 | } | |
151 | ||
1486a61e | 152 | static u8 ixgbe_dcbnl_set_state(struct net_device *netdev, u8 state) |
2f90b865 | 153 | { |
89d27a3c | 154 | int err = 0; |
5facb8e0 JF |
155 | u8 prio_tc[MAX_USER_PRIORITY] = {0}; |
156 | int i; | |
2f90b865 AD |
157 | struct ixgbe_adapter *adapter = netdev_priv(netdev); |
158 | ||
4c09f3a0 JF |
159 | /* Fail command if not in CEE mode */ |
160 | if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)) | |
161 | return 1; | |
162 | ||
03ecf91a AD |
163 | /* verify there is something to do, if not then exit */ |
164 | if (!!state != !(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) | |
89d27a3c | 165 | goto out; |
03ecf91a | 166 | |
5facb8e0 | 167 | if (state > 0) { |
32701dc2 | 168 | err = ixgbe_setup_tc(netdev, adapter->dcb_cfg.num_tcs.pg_tcs); |
5facb8e0 JF |
169 | ixgbe_dcb_unpack_map(&adapter->dcb_cfg, DCB_TX_CONFIG, prio_tc); |
170 | } else { | |
e7589eab | 171 | err = ixgbe_setup_tc(netdev, 0); |
5facb8e0 JF |
172 | } |
173 | ||
89d27a3c JF |
174 | if (err) |
175 | goto out; | |
176 | ||
5facb8e0 JF |
177 | for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) |
178 | netdev_set_prio_tc_map(netdev, i, prio_tc[i]); | |
1fcd86b5 | 179 | |
89d27a3c JF |
180 | out: |
181 | return err ? 1 : 0; | |
2f90b865 AD |
182 | } |
183 | ||
184 | static void ixgbe_dcbnl_get_perm_hw_addr(struct net_device *netdev, | |
185 | u8 *perm_addr) | |
186 | { | |
187 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
aca6bee7 | 188 | int i, j; |
2f90b865 | 189 | |
86e713a0 LL |
190 | memset(perm_addr, 0xff, MAX_ADDR_LEN); |
191 | ||
2f90b865 AD |
192 | for (i = 0; i < netdev->addr_len; i++) |
193 | perm_addr[i] = adapter->hw.mac.perm_addr[i]; | |
aca6bee7 | 194 | |
b93a2226 DS |
195 | switch (adapter->hw.mac.type) { |
196 | case ixgbe_mac_82599EB: | |
197 | case ixgbe_mac_X540: | |
aca6bee7 WJP |
198 | for (j = 0; j < netdev->addr_len; j++, i++) |
199 | perm_addr[i] = adapter->hw.mac.san_addr[j]; | |
b93a2226 DS |
200 | break; |
201 | default: | |
202 | break; | |
aca6bee7 | 203 | } |
2f90b865 AD |
204 | } |
205 | ||
206 | static void ixgbe_dcbnl_set_pg_tc_cfg_tx(struct net_device *netdev, int tc, | |
207 | u8 prio, u8 bwg_id, u8 bw_pct, | |
208 | u8 up_map) | |
209 | { | |
210 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
211 | ||
212 | if (prio != DCB_ATTR_VALUE_UNDEFINED) | |
213 | adapter->temp_dcb_cfg.tc_config[tc].path[0].prio_type = prio; | |
214 | if (bwg_id != DCB_ATTR_VALUE_UNDEFINED) | |
215 | adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_id = bwg_id; | |
216 | if (bw_pct != DCB_ATTR_VALUE_UNDEFINED) | |
217 | adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_percent = | |
218 | bw_pct; | |
219 | if (up_map != DCB_ATTR_VALUE_UNDEFINED) | |
220 | adapter->temp_dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap = | |
221 | up_map; | |
2f90b865 AD |
222 | } |
223 | ||
224 | static void ixgbe_dcbnl_set_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id, | |
225 | u8 bw_pct) | |
226 | { | |
227 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
228 | ||
229 | adapter->temp_dcb_cfg.bw_percentage[0][bwg_id] = bw_pct; | |
2f90b865 AD |
230 | } |
231 | ||
232 | static void ixgbe_dcbnl_set_pg_tc_cfg_rx(struct net_device *netdev, int tc, | |
233 | u8 prio, u8 bwg_id, u8 bw_pct, | |
234 | u8 up_map) | |
235 | { | |
236 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
237 | ||
238 | if (prio != DCB_ATTR_VALUE_UNDEFINED) | |
239 | adapter->temp_dcb_cfg.tc_config[tc].path[1].prio_type = prio; | |
240 | if (bwg_id != DCB_ATTR_VALUE_UNDEFINED) | |
241 | adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_id = bwg_id; | |
242 | if (bw_pct != DCB_ATTR_VALUE_UNDEFINED) | |
243 | adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_percent = | |
244 | bw_pct; | |
245 | if (up_map != DCB_ATTR_VALUE_UNDEFINED) | |
246 | adapter->temp_dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap = | |
247 | up_map; | |
2f90b865 AD |
248 | } |
249 | ||
250 | static void ixgbe_dcbnl_set_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id, | |
251 | u8 bw_pct) | |
252 | { | |
253 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
254 | ||
255 | adapter->temp_dcb_cfg.bw_percentage[1][bwg_id] = bw_pct; | |
2f90b865 AD |
256 | } |
257 | ||
258 | static void ixgbe_dcbnl_get_pg_tc_cfg_tx(struct net_device *netdev, int tc, | |
259 | u8 *prio, u8 *bwg_id, u8 *bw_pct, | |
260 | u8 *up_map) | |
261 | { | |
262 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
263 | ||
264 | *prio = adapter->dcb_cfg.tc_config[tc].path[0].prio_type; | |
265 | *bwg_id = adapter->dcb_cfg.tc_config[tc].path[0].bwg_id; | |
266 | *bw_pct = adapter->dcb_cfg.tc_config[tc].path[0].bwg_percent; | |
267 | *up_map = adapter->dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap; | |
268 | } | |
269 | ||
270 | static void ixgbe_dcbnl_get_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id, | |
271 | u8 *bw_pct) | |
272 | { | |
273 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
274 | ||
275 | *bw_pct = adapter->dcb_cfg.bw_percentage[0][bwg_id]; | |
276 | } | |
277 | ||
278 | static void ixgbe_dcbnl_get_pg_tc_cfg_rx(struct net_device *netdev, int tc, | |
279 | u8 *prio, u8 *bwg_id, u8 *bw_pct, | |
280 | u8 *up_map) | |
281 | { | |
282 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
283 | ||
284 | *prio = adapter->dcb_cfg.tc_config[tc].path[1].prio_type; | |
285 | *bwg_id = adapter->dcb_cfg.tc_config[tc].path[1].bwg_id; | |
286 | *bw_pct = adapter->dcb_cfg.tc_config[tc].path[1].bwg_percent; | |
287 | *up_map = adapter->dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap; | |
288 | } | |
289 | ||
290 | static void ixgbe_dcbnl_get_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id, | |
291 | u8 *bw_pct) | |
292 | { | |
293 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
294 | ||
295 | *bw_pct = adapter->dcb_cfg.bw_percentage[1][bwg_id]; | |
296 | } | |
297 | ||
298 | static void ixgbe_dcbnl_set_pfc_cfg(struct net_device *netdev, int priority, | |
299 | u8 setting) | |
300 | { | |
301 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
302 | ||
303 | adapter->temp_dcb_cfg.tc_config[priority].dcb_pfc = setting; | |
304 | if (adapter->temp_dcb_cfg.tc_config[priority].dcb_pfc != | |
aacc1bea | 305 | adapter->dcb_cfg.tc_config[priority].dcb_pfc) |
ea4af4f4 | 306 | adapter->temp_dcb_cfg.pfc_mode_enable = true; |
2f90b865 AD |
307 | } |
308 | ||
309 | static void ixgbe_dcbnl_get_pfc_cfg(struct net_device *netdev, int priority, | |
310 | u8 *setting) | |
311 | { | |
312 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
313 | ||
314 | *setting = adapter->dcb_cfg.tc_config[priority].dcb_pfc; | |
315 | } | |
316 | ||
4909fe97 JF |
317 | #ifdef IXGBE_FCOE |
318 | static void ixgbe_dcbnl_devreset(struct net_device *dev) | |
319 | { | |
320 | struct ixgbe_adapter *adapter = netdev_priv(dev); | |
321 | ||
322 | while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state)) | |
323 | usleep_range(1000, 2000); | |
324 | ||
325 | if (netif_running(dev)) | |
326 | dev->netdev_ops->ndo_stop(dev); | |
327 | ||
328 | ixgbe_clear_interrupt_scheme(adapter); | |
329 | ixgbe_init_interrupt_scheme(adapter); | |
330 | ||
331 | if (netif_running(dev)) | |
332 | dev->netdev_ops->ndo_open(dev); | |
333 | ||
334 | clear_bit(__IXGBE_RESETTING, &adapter->state); | |
335 | } | |
336 | #endif | |
337 | ||
2f90b865 AD |
338 | static u8 ixgbe_dcbnl_set_all(struct net_device *netdev) |
339 | { | |
340 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
943561d3 AD |
341 | struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg; |
342 | struct ixgbe_hw *hw = &adapter->hw; | |
aacc1bea ME |
343 | int ret = DCB_NO_HW_CHG; |
344 | int i; | |
2f90b865 | 345 | |
4c09f3a0 JF |
346 | /* Fail command if not in CEE mode */ |
347 | if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)) | |
aacc1bea | 348 | return ret; |
4c09f3a0 | 349 | |
f525c6d2 | 350 | adapter->dcb_set_bitmap |= ixgbe_copy_dcb_cfg(adapter, |
aacc1bea ME |
351 | MAX_TRAFFIC_CLASS); |
352 | if (!adapter->dcb_set_bitmap) | |
353 | return ret; | |
3ce1cc52 | 354 | |
d43f5c21 JF |
355 | if (adapter->dcb_set_bitmap & (BIT_PG_TX|BIT_PG_RX)) { |
356 | u16 refill[MAX_TRAFFIC_CLASS], max[MAX_TRAFFIC_CLASS]; | |
357 | u8 bwg_id[MAX_TRAFFIC_CLASS], prio_type[MAX_TRAFFIC_CLASS]; | |
17049d30 | 358 | /* Priority to TC mapping in CEE case default to 1:1 */ |
32701dc2 | 359 | u8 prio_tc[MAX_USER_PRIORITY]; |
d43f5c21 JF |
360 | int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN; |
361 | ||
971060b1 | 362 | #ifdef IXGBE_FCOE |
d43f5c21 JF |
363 | if (adapter->netdev->features & NETIF_F_FCOE_MTU) |
364 | max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE); | |
365 | #endif | |
366 | ||
943561d3 AD |
367 | ixgbe_dcb_calculate_tc_credits(hw, dcb_cfg, max_frame, |
368 | DCB_TX_CONFIG); | |
369 | ixgbe_dcb_calculate_tc_credits(hw, dcb_cfg, max_frame, | |
370 | DCB_RX_CONFIG); | |
d43f5c21 | 371 | |
943561d3 AD |
372 | ixgbe_dcb_unpack_refill(dcb_cfg, DCB_TX_CONFIG, refill); |
373 | ixgbe_dcb_unpack_max(dcb_cfg, max); | |
374 | ixgbe_dcb_unpack_bwgid(dcb_cfg, DCB_TX_CONFIG, bwg_id); | |
375 | ixgbe_dcb_unpack_prio(dcb_cfg, DCB_TX_CONFIG, prio_type); | |
376 | ixgbe_dcb_unpack_map(dcb_cfg, DCB_TX_CONFIG, prio_tc); | |
d43f5c21 | 377 | |
943561d3 AD |
378 | ixgbe_dcb_hw_ets_config(hw, refill, max, bwg_id, |
379 | prio_type, prio_tc); | |
32701dc2 JF |
380 | |
381 | for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) | |
382 | netdev_set_prio_tc_map(netdev, i, prio_tc[i]); | |
aacc1bea ME |
383 | |
384 | ret = DCB_HW_CHG_RST; | |
32701dc2 JF |
385 | } |
386 | ||
387 | if (adapter->dcb_set_bitmap & BIT_PFC) { | |
943561d3 AD |
388 | if (dcb_cfg->pfc_mode_enable) { |
389 | u8 pfc_en; | |
390 | u8 prio_tc[MAX_USER_PRIORITY]; | |
391 | ||
392 | ixgbe_dcb_unpack_map(dcb_cfg, DCB_TX_CONFIG, prio_tc); | |
393 | ixgbe_dcb_unpack_pfc(dcb_cfg, &pfc_en); | |
394 | ixgbe_dcb_hw_pfc_config(hw, pfc_en, prio_tc); | |
395 | } else { | |
396 | hw->mac.ops.fc_enable(hw); | |
397 | } | |
3ebe8fde AD |
398 | |
399 | ixgbe_set_rx_drop_en(adapter); | |
400 | ||
943561d3 | 401 | ret = DCB_HW_CHG; |
d43f5c21 JF |
402 | } |
403 | ||
4909fe97 | 404 | #ifdef IXGBE_FCOE |
43497cc2 JF |
405 | /* Reprogam FCoE hardware offloads when the traffic class |
406 | * FCoE is using changes. This happens if the APP info | |
407 | * changes or the up2tc mapping is updated. | |
408 | */ | |
f525c6d2 JF |
409 | if (adapter->dcb_set_bitmap & BIT_APP_UPCHG) { |
410 | struct dcb_app app = { | |
411 | .selector = DCB_APP_IDTYPE_ETHTYPE, | |
412 | .protocol = ETH_P_FCOE, | |
413 | }; | |
414 | u8 up = dcb_getapp(netdev, &app); | |
415 | ||
4909fe97 JF |
416 | adapter->fcoe.up = ffs(up) - 1; |
417 | ixgbe_dcbnl_devreset(netdev); | |
418 | ret = DCB_HW_CHG_RST; | |
419 | } | |
420 | #endif | |
421 | ||
2f90b865 | 422 | adapter->dcb_set_bitmap = 0x00; |
2f90b865 AD |
423 | return ret; |
424 | } | |
425 | ||
46132188 AD |
426 | static u8 ixgbe_dcbnl_getcap(struct net_device *netdev, int capid, u8 *cap) |
427 | { | |
428 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
46132188 | 429 | |
3032309b JF |
430 | switch (capid) { |
431 | case DCB_CAP_ATTR_PG: | |
432 | *cap = true; | |
433 | break; | |
434 | case DCB_CAP_ATTR_PFC: | |
435 | *cap = true; | |
436 | break; | |
437 | case DCB_CAP_ATTR_UP2TC: | |
438 | *cap = false; | |
439 | break; | |
440 | case DCB_CAP_ATTR_PG_TCS: | |
441 | *cap = 0x80; | |
442 | break; | |
443 | case DCB_CAP_ATTR_PFC_TCS: | |
444 | *cap = 0x80; | |
445 | break; | |
446 | case DCB_CAP_ATTR_GSP: | |
447 | *cap = true; | |
448 | break; | |
449 | case DCB_CAP_ATTR_BCN: | |
450 | *cap = false; | |
451 | break; | |
452 | case DCB_CAP_ATTR_DCBX: | |
453 | *cap = adapter->dcbx_cap; | |
454 | break; | |
455 | default: | |
456 | *cap = false; | |
457 | break; | |
46132188 AD |
458 | } |
459 | ||
3032309b | 460 | return 0; |
46132188 AD |
461 | } |
462 | ||
2b88f2de | 463 | static int ixgbe_dcbnl_getnumtcs(struct net_device *netdev, int tcid, u8 *num) |
33dbabc4 AD |
464 | { |
465 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
466 | u8 rval = 0; | |
467 | ||
468 | if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) { | |
469 | switch (tcid) { | |
470 | case DCB_NUMTCS_ATTR_PG: | |
32701dc2 | 471 | *num = adapter->dcb_cfg.num_tcs.pg_tcs; |
33dbabc4 AD |
472 | break; |
473 | case DCB_NUMTCS_ATTR_PFC: | |
32701dc2 | 474 | *num = adapter->dcb_cfg.num_tcs.pfc_tcs; |
33dbabc4 AD |
475 | break; |
476 | default: | |
477 | rval = -EINVAL; | |
478 | break; | |
479 | } | |
480 | } else { | |
481 | rval = -EINVAL; | |
482 | } | |
483 | ||
484 | return rval; | |
485 | } | |
486 | ||
2b88f2de | 487 | static int ixgbe_dcbnl_setnumtcs(struct net_device *netdev, int tcid, u8 num) |
33dbabc4 AD |
488 | { |
489 | return -EINVAL; | |
490 | } | |
491 | ||
0eb3aa9b AD |
492 | static u8 ixgbe_dcbnl_getpfcstate(struct net_device *netdev) |
493 | { | |
494 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
495 | ||
264857b8 | 496 | return adapter->dcb_cfg.pfc_mode_enable; |
0eb3aa9b AD |
497 | } |
498 | ||
499 | static void ixgbe_dcbnl_setpfcstate(struct net_device *netdev, u8 state) | |
500 | { | |
264857b8 PWJ |
501 | struct ixgbe_adapter *adapter = netdev_priv(netdev); |
502 | ||
503 | adapter->temp_dcb_cfg.pfc_mode_enable = state; | |
0eb3aa9b AD |
504 | } |
505 | ||
6ee16520 YZ |
506 | /** |
507 | * ixgbe_dcbnl_getapp - retrieve the DCBX application user priority | |
508 | * @netdev : the corresponding netdev | |
509 | * @idtype : identifies the id as ether type or TCP/UDP port number | |
510 | * @id: id is either ether type or TCP/UDP port number | |
511 | * | |
512 | * Returns : on success, returns a non-zero 802.1p user priority bitmap | |
513 | * otherwise returns 0 as the invalid user priority bitmap to indicate an | |
514 | * error. | |
515 | */ | |
516 | static u8 ixgbe_dcbnl_getapp(struct net_device *netdev, u8 idtype, u16 id) | |
517 | { | |
3032309b | 518 | struct ixgbe_adapter *adapter = netdev_priv(netdev); |
dc166e22 JF |
519 | struct dcb_app app = { |
520 | .selector = idtype, | |
521 | .protocol = id, | |
522 | }; | |
6ee16520 | 523 | |
3032309b | 524 | if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)) |
dc166e22 | 525 | return 0; |
3032309b | 526 | |
dc166e22 | 527 | return dcb_getapp(netdev, &app); |
6ee16520 YZ |
528 | } |
529 | ||
d033d526 JF |
530 | static int ixgbe_dcbnl_ieee_getets(struct net_device *dev, |
531 | struct ieee_ets *ets) | |
532 | { | |
533 | struct ixgbe_adapter *adapter = netdev_priv(dev); | |
534 | struct ieee_ets *my_ets = adapter->ixgbe_ieee_ets; | |
535 | ||
8599e251 JF |
536 | ets->ets_cap = adapter->dcb_cfg.num_tcs.pg_tcs; |
537 | ||
d033d526 JF |
538 | /* No IEEE PFC settings available */ |
539 | if (!my_ets) | |
8599e251 | 540 | return 0; |
d033d526 | 541 | |
d033d526 JF |
542 | ets->cbs = my_ets->cbs; |
543 | memcpy(ets->tc_tx_bw, my_ets->tc_tx_bw, sizeof(ets->tc_tx_bw)); | |
544 | memcpy(ets->tc_rx_bw, my_ets->tc_rx_bw, sizeof(ets->tc_rx_bw)); | |
545 | memcpy(ets->tc_tsa, my_ets->tc_tsa, sizeof(ets->tc_tsa)); | |
546 | memcpy(ets->prio_tc, my_ets->prio_tc, sizeof(ets->prio_tc)); | |
547 | return 0; | |
548 | } | |
549 | ||
550 | static int ixgbe_dcbnl_ieee_setets(struct net_device *dev, | |
551 | struct ieee_ets *ets) | |
552 | { | |
553 | struct ixgbe_adapter *adapter = netdev_priv(dev); | |
d033d526 | 554 | int max_frame = dev->mtu + ETH_HLEN + ETH_FCS_LEN; |
89d27a3c | 555 | int i, err = 0; |
4c09f3a0 | 556 | __u8 max_tc = 0; |
d033d526 | 557 | |
3032309b JF |
558 | if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)) |
559 | return -EINVAL; | |
560 | ||
d033d526 JF |
561 | if (!adapter->ixgbe_ieee_ets) { |
562 | adapter->ixgbe_ieee_ets = kmalloc(sizeof(struct ieee_ets), | |
563 | GFP_KERNEL); | |
564 | if (!adapter->ixgbe_ieee_ets) | |
565 | return -ENOMEM; | |
566 | } | |
567 | ||
d033d526 JF |
568 | memcpy(adapter->ixgbe_ieee_ets, ets, sizeof(*adapter->ixgbe_ieee_ets)); |
569 | ||
3b97fd69 | 570 | for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) { |
4c09f3a0 JF |
571 | if (ets->prio_tc[i] > max_tc) |
572 | max_tc = ets->prio_tc[i]; | |
3b97fd69 JF |
573 | } |
574 | ||
4c09f3a0 JF |
575 | if (max_tc) |
576 | max_tc++; | |
17049d30 | 577 | |
32701dc2 JF |
578 | if (max_tc > adapter->dcb_cfg.num_tcs.pg_tcs) |
579 | return -EINVAL; | |
580 | ||
4c09f3a0 | 581 | if (max_tc != netdev_get_num_tc(dev)) |
89d27a3c JF |
582 | err = ixgbe_setup_tc(dev, max_tc); |
583 | ||
584 | if (err) | |
585 | goto err_out; | |
4c09f3a0 | 586 | |
e886c44f JF |
587 | for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) |
588 | netdev_set_prio_tc_map(dev, i, ets->prio_tc[i]); | |
589 | ||
89d27a3c JF |
590 | err = ixgbe_dcb_hw_ets(&adapter->hw, ets, max_frame); |
591 | err_out: | |
592 | return err; | |
d033d526 JF |
593 | } |
594 | ||
595 | static int ixgbe_dcbnl_ieee_getpfc(struct net_device *dev, | |
596 | struct ieee_pfc *pfc) | |
597 | { | |
598 | struct ixgbe_adapter *adapter = netdev_priv(dev); | |
599 | struct ieee_pfc *my_pfc = adapter->ixgbe_ieee_pfc; | |
600 | int i; | |
601 | ||
8599e251 JF |
602 | pfc->pfc_cap = adapter->dcb_cfg.num_tcs.pfc_tcs; |
603 | ||
d033d526 JF |
604 | /* No IEEE PFC settings available */ |
605 | if (!my_pfc) | |
8599e251 | 606 | return 0; |
d033d526 | 607 | |
d033d526 JF |
608 | pfc->pfc_en = my_pfc->pfc_en; |
609 | pfc->mbc = my_pfc->mbc; | |
610 | pfc->delay = my_pfc->delay; | |
611 | ||
612 | for (i = 0; i < MAX_TRAFFIC_CLASS; i++) { | |
613 | pfc->requests[i] = adapter->stats.pxoffrxc[i]; | |
614 | pfc->indications[i] = adapter->stats.pxofftxc[i]; | |
615 | } | |
616 | ||
617 | return 0; | |
618 | } | |
619 | ||
620 | static int ixgbe_dcbnl_ieee_setpfc(struct net_device *dev, | |
621 | struct ieee_pfc *pfc) | |
622 | { | |
623 | struct ixgbe_adapter *adapter = netdev_priv(dev); | |
943561d3 | 624 | struct ixgbe_hw *hw = &adapter->hw; |
32701dc2 | 625 | u8 *prio_tc; |
943561d3 | 626 | int err; |
d033d526 | 627 | |
3032309b JF |
628 | if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)) |
629 | return -EINVAL; | |
630 | ||
d033d526 JF |
631 | if (!adapter->ixgbe_ieee_pfc) { |
632 | adapter->ixgbe_ieee_pfc = kmalloc(sizeof(struct ieee_pfc), | |
633 | GFP_KERNEL); | |
634 | if (!adapter->ixgbe_ieee_pfc) | |
635 | return -ENOMEM; | |
636 | } | |
637 | ||
32701dc2 | 638 | prio_tc = adapter->ixgbe_ieee_ets->prio_tc; |
d033d526 | 639 | memcpy(adapter->ixgbe_ieee_pfc, pfc, sizeof(*adapter->ixgbe_ieee_pfc)); |
943561d3 AD |
640 | |
641 | /* Enable link flow control parameters if PFC is disabled */ | |
642 | if (pfc->pfc_en) | |
643 | err = ixgbe_dcb_hw_pfc_config(hw, pfc->pfc_en, prio_tc); | |
644 | else | |
645 | err = hw->mac.ops.fc_enable(hw); | |
646 | ||
3ebe8fde AD |
647 | ixgbe_set_rx_drop_en(adapter); |
648 | ||
943561d3 | 649 | return err; |
d033d526 JF |
650 | } |
651 | ||
f8628d40 JF |
652 | static int ixgbe_dcbnl_ieee_setapp(struct net_device *dev, |
653 | struct dcb_app *app) | |
654 | { | |
655 | struct ixgbe_adapter *adapter = netdev_priv(dev); | |
9372453e | 656 | int err = -EINVAL; |
f8628d40 JF |
657 | |
658 | if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)) | |
9372453e | 659 | return err; |
f8628d40 | 660 | |
9372453e | 661 | err = dcb_ieee_setapp(dev, app); |
f8628d40 | 662 | |
c8ca76eb | 663 | #ifdef IXGBE_FCOE |
9372453e JF |
664 | if (!err && app->selector == IEEE_8021QAZ_APP_SEL_ETHERTYPE && |
665 | app->protocol == ETH_P_FCOE) { | |
666 | u8 app_mask = dcb_ieee_getapp_mask(dev, app); | |
667 | ||
668 | if (app_mask & (1 << adapter->fcoe.up)) | |
669 | return err; | |
670 | ||
671 | adapter->fcoe.up = app->priority; | |
42532da6 JF |
672 | ixgbe_dcbnl_devreset(dev); |
673 | } | |
674 | #endif | |
675 | return 0; | |
676 | } | |
677 | ||
678 | static int ixgbe_dcbnl_ieee_delapp(struct net_device *dev, | |
679 | struct dcb_app *app) | |
680 | { | |
681 | struct ixgbe_adapter *adapter = netdev_priv(dev); | |
682 | int err; | |
683 | ||
684 | if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)) | |
685 | return -EINVAL; | |
9372453e | 686 | |
42532da6 | 687 | err = dcb_ieee_delapp(dev, app); |
9372453e | 688 | |
42532da6 JF |
689 | #ifdef IXGBE_FCOE |
690 | if (!err && app->selector == IEEE_8021QAZ_APP_SEL_ETHERTYPE && | |
691 | app->protocol == ETH_P_FCOE) { | |
692 | u8 app_mask = dcb_ieee_getapp_mask(dev, app); | |
693 | ||
694 | if (app_mask & (1 << adapter->fcoe.up)) | |
695 | return err; | |
9372453e | 696 | |
42532da6 JF |
697 | adapter->fcoe.up = app_mask ? |
698 | ffs(app_mask) - 1 : IXGBE_FCOE_DEFTC; | |
699 | ixgbe_dcbnl_devreset(dev); | |
9372453e | 700 | } |
f8628d40 | 701 | #endif |
9372453e | 702 | return err; |
f8628d40 JF |
703 | } |
704 | ||
3032309b JF |
705 | static u8 ixgbe_dcbnl_getdcbx(struct net_device *dev) |
706 | { | |
707 | struct ixgbe_adapter *adapter = netdev_priv(dev); | |
708 | return adapter->dcbx_cap; | |
709 | } | |
710 | ||
711 | static u8 ixgbe_dcbnl_setdcbx(struct net_device *dev, u8 mode) | |
712 | { | |
713 | struct ixgbe_adapter *adapter = netdev_priv(dev); | |
714 | struct ieee_ets ets = {0}; | |
715 | struct ieee_pfc pfc = {0}; | |
89d27a3c | 716 | int err = 0; |
3032309b JF |
717 | |
718 | /* no support for LLD_MANAGED modes or CEE+IEEE */ | |
719 | if ((mode & DCB_CAP_DCBX_LLD_MANAGED) || | |
720 | ((mode & DCB_CAP_DCBX_VER_IEEE) && (mode & DCB_CAP_DCBX_VER_CEE)) || | |
721 | !(mode & DCB_CAP_DCBX_HOST)) | |
722 | return 1; | |
723 | ||
724 | if (mode == adapter->dcbx_cap) | |
725 | return 0; | |
726 | ||
727 | adapter->dcbx_cap = mode; | |
728 | ||
729 | /* ETS and PFC defaults */ | |
730 | ets.ets_cap = 8; | |
731 | pfc.pfc_cap = 8; | |
732 | ||
733 | if (mode & DCB_CAP_DCBX_VER_IEEE) { | |
734 | ixgbe_dcbnl_ieee_setets(dev, &ets); | |
735 | ixgbe_dcbnl_ieee_setpfc(dev, &pfc); | |
736 | } else if (mode & DCB_CAP_DCBX_VER_CEE) { | |
43497cc2 JF |
737 | u8 mask = BIT_PFC | BIT_PG_TX | BIT_PG_RX | BIT_APP_UPCHG; |
738 | ||
739 | adapter->dcb_set_bitmap |= mask; | |
3032309b JF |
740 | ixgbe_dcbnl_set_all(dev); |
741 | } else { | |
742 | /* Drop into single TC mode strict priority as this | |
743 | * indicates CEE and IEEE versions are disabled | |
744 | */ | |
745 | ixgbe_dcbnl_ieee_setets(dev, &ets); | |
746 | ixgbe_dcbnl_ieee_setpfc(dev, &pfc); | |
89d27a3c | 747 | err = ixgbe_setup_tc(dev, 0); |
3032309b JF |
748 | } |
749 | ||
89d27a3c | 750 | return err ? 1 : 0; |
3032309b JF |
751 | } |
752 | ||
32953543 | 753 | const struct dcbnl_rtnl_ops dcbnl_ops = { |
d033d526 JF |
754 | .ieee_getets = ixgbe_dcbnl_ieee_getets, |
755 | .ieee_setets = ixgbe_dcbnl_ieee_setets, | |
756 | .ieee_getpfc = ixgbe_dcbnl_ieee_getpfc, | |
757 | .ieee_setpfc = ixgbe_dcbnl_ieee_setpfc, | |
f8628d40 | 758 | .ieee_setapp = ixgbe_dcbnl_ieee_setapp, |
42532da6 | 759 | .ieee_delapp = ixgbe_dcbnl_ieee_delapp, |
2f90b865 AD |
760 | .getstate = ixgbe_dcbnl_get_state, |
761 | .setstate = ixgbe_dcbnl_set_state, | |
762 | .getpermhwaddr = ixgbe_dcbnl_get_perm_hw_addr, | |
763 | .setpgtccfgtx = ixgbe_dcbnl_set_pg_tc_cfg_tx, | |
764 | .setpgbwgcfgtx = ixgbe_dcbnl_set_pg_bwg_cfg_tx, | |
765 | .setpgtccfgrx = ixgbe_dcbnl_set_pg_tc_cfg_rx, | |
766 | .setpgbwgcfgrx = ixgbe_dcbnl_set_pg_bwg_cfg_rx, | |
767 | .getpgtccfgtx = ixgbe_dcbnl_get_pg_tc_cfg_tx, | |
768 | .getpgbwgcfgtx = ixgbe_dcbnl_get_pg_bwg_cfg_tx, | |
769 | .getpgtccfgrx = ixgbe_dcbnl_get_pg_tc_cfg_rx, | |
770 | .getpgbwgcfgrx = ixgbe_dcbnl_get_pg_bwg_cfg_rx, | |
771 | .setpfccfg = ixgbe_dcbnl_set_pfc_cfg, | |
772 | .getpfccfg = ixgbe_dcbnl_get_pfc_cfg, | |
46132188 | 773 | .setall = ixgbe_dcbnl_set_all, |
33dbabc4 AD |
774 | .getcap = ixgbe_dcbnl_getcap, |
775 | .getnumtcs = ixgbe_dcbnl_getnumtcs, | |
0eb3aa9b AD |
776 | .setnumtcs = ixgbe_dcbnl_setnumtcs, |
777 | .getpfcstate = ixgbe_dcbnl_getpfcstate, | |
859ee3c4 | 778 | .setpfcstate = ixgbe_dcbnl_setpfcstate, |
6ee16520 | 779 | .getapp = ixgbe_dcbnl_getapp, |
3032309b JF |
780 | .getdcbx = ixgbe_dcbnl_getdcbx, |
781 | .setdcbx = ixgbe_dcbnl_setdcbx, | |
2f90b865 | 782 | }; |