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92915f71 GR |
1 | /******************************************************************************* |
2 | ||
3 | Intel 82599 Virtual Function driver | |
dec0d8e4 | 4 | Copyright(c) 1999 - 2015 Intel Corporation. |
92915f71 GR |
5 | |
6 | This program is free software; you can redistribute it and/or modify it | |
7 | under the terms and conditions of the GNU General Public License, | |
8 | version 2, as published by the Free Software Foundation. | |
9 | ||
10 | This program is distributed in the hope it will be useful, but WITHOUT | |
11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
13 | more details. | |
14 | ||
15 | You should have received a copy of the GNU General Public License along with | |
dec0d8e4 | 16 | this program; if not, see <http://www.gnu.org/licenses/>. |
92915f71 GR |
17 | |
18 | The full GNU General Public License is included in this distribution in | |
19 | the file called "COPYING". | |
20 | ||
21 | Contact Information: | |
22 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | |
23 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
24 | ||
25 | *******************************************************************************/ | |
26 | ||
92915f71 GR |
27 | /****************************************************************************** |
28 | Copyright (c)2006 - 2007 Myricom, Inc. for some LRO specific code | |
29 | ******************************************************************************/ | |
dbd9636e JK |
30 | |
31 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
32 | ||
92915f71 | 33 | #include <linux/types.h> |
dadcd65f | 34 | #include <linux/bitops.h> |
92915f71 GR |
35 | #include <linux/module.h> |
36 | #include <linux/pci.h> | |
37 | #include <linux/netdevice.h> | |
38 | #include <linux/vmalloc.h> | |
39 | #include <linux/string.h> | |
40 | #include <linux/in.h> | |
41 | #include <linux/ip.h> | |
42 | #include <linux/tcp.h> | |
70a10e25 | 43 | #include <linux/sctp.h> |
92915f71 | 44 | #include <linux/ipv6.h> |
5a0e3ad6 | 45 | #include <linux/slab.h> |
92915f71 GR |
46 | #include <net/checksum.h> |
47 | #include <net/ip6_checksum.h> | |
48 | #include <linux/ethtool.h> | |
01789349 | 49 | #include <linux/if.h> |
92915f71 | 50 | #include <linux/if_vlan.h> |
70c71606 | 51 | #include <linux/prefetch.h> |
92915f71 GR |
52 | |
53 | #include "ixgbevf.h" | |
54 | ||
3d8fe98f | 55 | const char ixgbevf_driver_name[] = "ixgbevf"; |
92915f71 | 56 | static const char ixgbevf_driver_string[] = |
422e05d1 | 57 | "Intel(R) 10 Gigabit PCI Express Virtual Function Network Driver"; |
92915f71 | 58 | |
9f8fe731 | 59 | #define DRV_VERSION "3.2.2-k" |
92915f71 | 60 | const char ixgbevf_driver_version[] = DRV_VERSION; |
66c87bd5 | 61 | static char ixgbevf_copyright[] = |
40a13e24 | 62 | "Copyright (c) 2009 - 2015 Intel Corporation."; |
92915f71 GR |
63 | |
64 | static const struct ixgbevf_info *ixgbevf_info_tbl[] = { | |
c6d45171 KS |
65 | [board_82599_vf] = &ixgbevf_82599_vf_info, |
66 | [board_82599_vf_hv] = &ixgbevf_82599_vf_hv_info, | |
67 | [board_X540_vf] = &ixgbevf_X540_vf_info, | |
68 | [board_X540_vf_hv] = &ixgbevf_X540_vf_hv_info, | |
69 | [board_X550_vf] = &ixgbevf_X550_vf_info, | |
70 | [board_X550_vf_hv] = &ixgbevf_X550_vf_hv_info, | |
71 | [board_X550EM_x_vf] = &ixgbevf_X550EM_x_vf_info, | |
72 | [board_X550EM_x_vf_hv] = &ixgbevf_X550EM_x_vf_hv_info, | |
1d94f987 | 73 | [board_x550em_a_vf] = &ixgbevf_x550em_a_vf_info, |
92915f71 GR |
74 | }; |
75 | ||
76 | /* ixgbevf_pci_tbl - PCI Device ID Table | |
77 | * | |
78 | * Wildcard entries (PCI_ANY_ID) should come last | |
79 | * Last entry must be all 0s | |
80 | * | |
81 | * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, | |
82 | * Class, Class Mask, private data (not used) } | |
83 | */ | |
9baa3c34 | 84 | static const struct pci_device_id ixgbevf_pci_tbl[] = { |
39ba22b4 | 85 | {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF), board_82599_vf }, |
c6d45171 | 86 | {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF_HV), board_82599_vf_hv }, |
39ba22b4 | 87 | {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540_VF), board_X540_vf }, |
c6d45171 | 88 | {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540_VF_HV), board_X540_vf_hv }, |
47068b0d | 89 | {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550_VF), board_X550_vf }, |
c6d45171 | 90 | {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550_VF_HV), board_X550_vf_hv }, |
47068b0d | 91 | {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_VF), board_X550EM_x_vf }, |
c6d45171 | 92 | {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_VF_HV), board_X550EM_x_vf_hv}, |
1d94f987 | 93 | {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_VF), board_x550em_a_vf }, |
92915f71 GR |
94 | /* required last entry */ |
95 | {0, } | |
96 | }; | |
97 | MODULE_DEVICE_TABLE(pci, ixgbevf_pci_tbl); | |
98 | ||
99 | MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>"); | |
b8ce18cd | 100 | MODULE_DESCRIPTION("Intel(R) 10 Gigabit Virtual Function Network Driver"); |
92915f71 GR |
101 | MODULE_LICENSE("GPL"); |
102 | MODULE_VERSION(DRV_VERSION); | |
103 | ||
b3f4d599 | 104 | #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK) |
105 | static int debug = -1; | |
106 | module_param(debug, int, 0); | |
107 | MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); | |
92915f71 | 108 | |
40a13e24 MR |
109 | static struct workqueue_struct *ixgbevf_wq; |
110 | ||
9ac5c5cc ET |
111 | static void ixgbevf_service_event_schedule(struct ixgbevf_adapter *adapter) |
112 | { | |
113 | if (!test_bit(__IXGBEVF_DOWN, &adapter->state) && | |
114 | !test_bit(__IXGBEVF_REMOVING, &adapter->state) && | |
115 | !test_and_set_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state)) | |
40a13e24 | 116 | queue_work(ixgbevf_wq, &adapter->service_task); |
9ac5c5cc ET |
117 | } |
118 | ||
119 | static void ixgbevf_service_event_complete(struct ixgbevf_adapter *adapter) | |
120 | { | |
121 | BUG_ON(!test_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state)); | |
122 | ||
123 | /* flush memory to make sure state is correct before next watchdog */ | |
124 | smp_mb__before_atomic(); | |
125 | clear_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state); | |
126 | } | |
127 | ||
92915f71 | 128 | /* forward decls */ |
220fe050 | 129 | static void ixgbevf_queue_reset_subtask(struct ixgbevf_adapter *adapter); |
fa71ae27 | 130 | static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector); |
56e94095 | 131 | static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter); |
92915f71 | 132 | |
dbf8b0d8 MR |
133 | static void ixgbevf_remove_adapter(struct ixgbe_hw *hw) |
134 | { | |
135 | struct ixgbevf_adapter *adapter = hw->back; | |
136 | ||
137 | if (!hw->hw_addr) | |
138 | return; | |
139 | hw->hw_addr = NULL; | |
140 | dev_err(&adapter->pdev->dev, "Adapter removed\n"); | |
9ac5c5cc ET |
141 | if (test_bit(__IXGBEVF_SERVICE_INITED, &adapter->state)) |
142 | ixgbevf_service_event_schedule(adapter); | |
dbf8b0d8 MR |
143 | } |
144 | ||
145 | static void ixgbevf_check_remove(struct ixgbe_hw *hw, u32 reg) | |
146 | { | |
147 | u32 value; | |
148 | ||
149 | /* The following check not only optimizes a bit by not | |
150 | * performing a read on the status register when the | |
151 | * register just read was a status register read that | |
152 | * returned IXGBE_FAILED_READ_REG. It also blocks any | |
153 | * potential recursion. | |
154 | */ | |
155 | if (reg == IXGBE_VFSTATUS) { | |
156 | ixgbevf_remove_adapter(hw); | |
157 | return; | |
158 | } | |
32c74949 | 159 | value = ixgbevf_read_reg(hw, IXGBE_VFSTATUS); |
dbf8b0d8 MR |
160 | if (value == IXGBE_FAILED_READ_REG) |
161 | ixgbevf_remove_adapter(hw); | |
162 | } | |
163 | ||
32c74949 | 164 | u32 ixgbevf_read_reg(struct ixgbe_hw *hw, u32 reg) |
dbf8b0d8 MR |
165 | { |
166 | u8 __iomem *reg_addr = ACCESS_ONCE(hw->hw_addr); | |
167 | u32 value; | |
168 | ||
169 | if (IXGBE_REMOVED(reg_addr)) | |
170 | return IXGBE_FAILED_READ_REG; | |
171 | value = readl(reg_addr + reg); | |
172 | if (unlikely(value == IXGBE_FAILED_READ_REG)) | |
173 | ixgbevf_check_remove(hw, reg); | |
174 | return value; | |
175 | } | |
176 | ||
49ce9c2c | 177 | /** |
65d676c8 | 178 | * ixgbevf_set_ivar - set IVAR registers - maps interrupt causes to vectors |
92915f71 GR |
179 | * @adapter: pointer to adapter struct |
180 | * @direction: 0 for Rx, 1 for Tx, -1 for other causes | |
181 | * @queue: queue to map the corresponding interrupt to | |
182 | * @msix_vector: the vector to map to the corresponding queue | |
dec0d8e4 | 183 | **/ |
92915f71 GR |
184 | static void ixgbevf_set_ivar(struct ixgbevf_adapter *adapter, s8 direction, |
185 | u8 queue, u8 msix_vector) | |
186 | { | |
187 | u32 ivar, index; | |
188 | struct ixgbe_hw *hw = &adapter->hw; | |
dec0d8e4 | 189 | |
92915f71 GR |
190 | if (direction == -1) { |
191 | /* other causes */ | |
192 | msix_vector |= IXGBE_IVAR_ALLOC_VAL; | |
193 | ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC); | |
194 | ivar &= ~0xFF; | |
195 | ivar |= msix_vector; | |
196 | IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar); | |
197 | } else { | |
dec0d8e4 | 198 | /* Tx or Rx causes */ |
92915f71 GR |
199 | msix_vector |= IXGBE_IVAR_ALLOC_VAL; |
200 | index = ((16 * (queue & 1)) + (8 * direction)); | |
201 | ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(queue >> 1)); | |
202 | ivar &= ~(0xFF << index); | |
203 | ivar |= (msix_vector << index); | |
204 | IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(queue >> 1), ivar); | |
205 | } | |
206 | } | |
207 | ||
70a10e25 | 208 | static void ixgbevf_unmap_and_free_tx_resource(struct ixgbevf_ring *tx_ring, |
9bdfefd2 ET |
209 | struct ixgbevf_tx_buffer *tx_buffer) |
210 | { | |
211 | if (tx_buffer->skb) { | |
212 | dev_kfree_skb_any(tx_buffer->skb); | |
213 | if (dma_unmap_len(tx_buffer, len)) | |
70a10e25 | 214 | dma_unmap_single(tx_ring->dev, |
9bdfefd2 ET |
215 | dma_unmap_addr(tx_buffer, dma), |
216 | dma_unmap_len(tx_buffer, len), | |
2a1f8794 | 217 | DMA_TO_DEVICE); |
9bdfefd2 ET |
218 | } else if (dma_unmap_len(tx_buffer, len)) { |
219 | dma_unmap_page(tx_ring->dev, | |
220 | dma_unmap_addr(tx_buffer, dma), | |
221 | dma_unmap_len(tx_buffer, len), | |
222 | DMA_TO_DEVICE); | |
92915f71 | 223 | } |
9bdfefd2 ET |
224 | tx_buffer->next_to_watch = NULL; |
225 | tx_buffer->skb = NULL; | |
226 | dma_unmap_len_set(tx_buffer, len, 0); | |
227 | /* tx_buffer must be completely set up in the transmit path */ | |
92915f71 GR |
228 | } |
229 | ||
e08400b7 ET |
230 | static u64 ixgbevf_get_tx_completed(struct ixgbevf_ring *ring) |
231 | { | |
232 | return ring->stats.packets; | |
233 | } | |
92915f71 | 234 | |
e08400b7 ET |
235 | static u32 ixgbevf_get_tx_pending(struct ixgbevf_ring *ring) |
236 | { | |
237 | struct ixgbevf_adapter *adapter = netdev_priv(ring->netdev); | |
238 | struct ixgbe_hw *hw = &adapter->hw; | |
92915f71 | 239 | |
e08400b7 ET |
240 | u32 head = IXGBE_READ_REG(hw, IXGBE_VFTDH(ring->reg_idx)); |
241 | u32 tail = IXGBE_READ_REG(hw, IXGBE_VFTDT(ring->reg_idx)); | |
242 | ||
243 | if (head != tail) | |
244 | return (head < tail) ? | |
245 | tail - head : (tail + ring->count - head); | |
246 | ||
247 | return 0; | |
248 | } | |
249 | ||
250 | static inline bool ixgbevf_check_tx_hang(struct ixgbevf_ring *tx_ring) | |
251 | { | |
252 | u32 tx_done = ixgbevf_get_tx_completed(tx_ring); | |
253 | u32 tx_done_old = tx_ring->tx_stats.tx_done_old; | |
254 | u32 tx_pending = ixgbevf_get_tx_pending(tx_ring); | |
255 | ||
256 | clear_check_for_tx_hang(tx_ring); | |
257 | ||
258 | /* Check for a hung queue, but be thorough. This verifies | |
259 | * that a transmit has been completed since the previous | |
260 | * check AND there is at least one packet pending. The | |
261 | * ARMED bit is set to indicate a potential hang. | |
262 | */ | |
263 | if ((tx_done_old == tx_done) && tx_pending) { | |
264 | /* make sure it is true for two checks in a row */ | |
265 | return test_and_set_bit(__IXGBEVF_HANG_CHECK_ARMED, | |
266 | &tx_ring->state); | |
267 | } | |
268 | /* reset the countdown */ | |
269 | clear_bit(__IXGBEVF_HANG_CHECK_ARMED, &tx_ring->state); | |
270 | ||
271 | /* update completed stats and continue */ | |
272 | tx_ring->tx_stats.tx_done_old = tx_done; | |
273 | ||
274 | return false; | |
275 | } | |
276 | ||
9ac5c5cc ET |
277 | static void ixgbevf_tx_timeout_reset(struct ixgbevf_adapter *adapter) |
278 | { | |
279 | /* Do the reset outside of interrupt context */ | |
280 | if (!test_bit(__IXGBEVF_DOWN, &adapter->state)) { | |
d5dd7c3f | 281 | set_bit(__IXGBEVF_RESET_REQUESTED, &adapter->state); |
9ac5c5cc ET |
282 | ixgbevf_service_event_schedule(adapter); |
283 | } | |
284 | } | |
285 | ||
e08400b7 ET |
286 | /** |
287 | * ixgbevf_tx_timeout - Respond to a Tx Hang | |
288 | * @netdev: network interface device structure | |
289 | **/ | |
290 | static void ixgbevf_tx_timeout(struct net_device *netdev) | |
291 | { | |
292 | struct ixgbevf_adapter *adapter = netdev_priv(netdev); | |
293 | ||
9ac5c5cc | 294 | ixgbevf_tx_timeout_reset(adapter); |
e08400b7 | 295 | } |
92915f71 GR |
296 | |
297 | /** | |
298 | * ixgbevf_clean_tx_irq - Reclaim resources after transmit completes | |
fa71ae27 | 299 | * @q_vector: board private structure |
92915f71 | 300 | * @tx_ring: tx ring to clean |
8220bbc1 | 301 | * @napi_budget: Used to determine if we are in netpoll |
92915f71 | 302 | **/ |
fa71ae27 | 303 | static bool ixgbevf_clean_tx_irq(struct ixgbevf_q_vector *q_vector, |
8220bbc1 | 304 | struct ixgbevf_ring *tx_ring, int napi_budget) |
92915f71 | 305 | { |
fa71ae27 | 306 | struct ixgbevf_adapter *adapter = q_vector->adapter; |
7ad1a093 ET |
307 | struct ixgbevf_tx_buffer *tx_buffer; |
308 | union ixgbe_adv_tx_desc *tx_desc; | |
92915f71 | 309 | unsigned int total_bytes = 0, total_packets = 0; |
7ad1a093 ET |
310 | unsigned int budget = tx_ring->count / 2; |
311 | unsigned int i = tx_ring->next_to_clean; | |
92915f71 | 312 | |
10cc1bdd AD |
313 | if (test_bit(__IXGBEVF_DOWN, &adapter->state)) |
314 | return true; | |
315 | ||
7ad1a093 ET |
316 | tx_buffer = &tx_ring->tx_buffer_info[i]; |
317 | tx_desc = IXGBEVF_TX_DESC(tx_ring, i); | |
318 | i -= tx_ring->count; | |
92915f71 | 319 | |
e757e3e1 | 320 | do { |
7ad1a093 | 321 | union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch; |
e757e3e1 AD |
322 | |
323 | /* if next_to_watch is not set then there is no work pending */ | |
324 | if (!eop_desc) | |
325 | break; | |
326 | ||
327 | /* prevent any other reads prior to eop_desc */ | |
328 | read_barrier_depends(); | |
329 | ||
330 | /* if DD is not set pending work has not been completed */ | |
331 | if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD))) | |
332 | break; | |
333 | ||
334 | /* clear next_to_watch to prevent false hangs */ | |
7ad1a093 | 335 | tx_buffer->next_to_watch = NULL; |
e757e3e1 | 336 | |
7ad1a093 ET |
337 | /* update the statistics for this packet */ |
338 | total_bytes += tx_buffer->bytecount; | |
339 | total_packets += tx_buffer->gso_segs; | |
92915f71 | 340 | |
9bdfefd2 | 341 | /* free the skb */ |
8220bbc1 | 342 | napi_consume_skb(tx_buffer->skb, napi_budget); |
9bdfefd2 ET |
343 | |
344 | /* unmap skb header data */ | |
345 | dma_unmap_single(tx_ring->dev, | |
346 | dma_unmap_addr(tx_buffer, dma), | |
347 | dma_unmap_len(tx_buffer, len), | |
348 | DMA_TO_DEVICE); | |
349 | ||
7ad1a093 | 350 | /* clear tx_buffer data */ |
9bdfefd2 ET |
351 | tx_buffer->skb = NULL; |
352 | dma_unmap_len_set(tx_buffer, len, 0); | |
92915f71 | 353 | |
7ad1a093 ET |
354 | /* unmap remaining buffers */ |
355 | while (tx_desc != eop_desc) { | |
7ad1a093 ET |
356 | tx_buffer++; |
357 | tx_desc++; | |
92915f71 | 358 | i++; |
7ad1a093 ET |
359 | if (unlikely(!i)) { |
360 | i -= tx_ring->count; | |
361 | tx_buffer = tx_ring->tx_buffer_info; | |
362 | tx_desc = IXGBEVF_TX_DESC(tx_ring, 0); | |
363 | } | |
e757e3e1 | 364 | |
9bdfefd2 ET |
365 | /* unmap any remaining paged data */ |
366 | if (dma_unmap_len(tx_buffer, len)) { | |
367 | dma_unmap_page(tx_ring->dev, | |
368 | dma_unmap_addr(tx_buffer, dma), | |
369 | dma_unmap_len(tx_buffer, len), | |
370 | DMA_TO_DEVICE); | |
371 | dma_unmap_len_set(tx_buffer, len, 0); | |
372 | } | |
92915f71 GR |
373 | } |
374 | ||
7ad1a093 ET |
375 | /* move us one more past the eop_desc for start of next pkt */ |
376 | tx_buffer++; | |
377 | tx_desc++; | |
378 | i++; | |
379 | if (unlikely(!i)) { | |
380 | i -= tx_ring->count; | |
381 | tx_buffer = tx_ring->tx_buffer_info; | |
382 | tx_desc = IXGBEVF_TX_DESC(tx_ring, 0); | |
383 | } | |
384 | ||
385 | /* issue prefetch for next Tx descriptor */ | |
386 | prefetch(tx_desc); | |
387 | ||
388 | /* update budget accounting */ | |
389 | budget--; | |
390 | } while (likely(budget)); | |
391 | ||
392 | i += tx_ring->count; | |
92915f71 | 393 | tx_ring->next_to_clean = i; |
7ad1a093 ET |
394 | u64_stats_update_begin(&tx_ring->syncp); |
395 | tx_ring->stats.bytes += total_bytes; | |
396 | tx_ring->stats.packets += total_packets; | |
397 | u64_stats_update_end(&tx_ring->syncp); | |
398 | q_vector->tx.total_bytes += total_bytes; | |
399 | q_vector->tx.total_packets += total_packets; | |
92915f71 | 400 | |
e08400b7 ET |
401 | if (check_for_tx_hang(tx_ring) && ixgbevf_check_tx_hang(tx_ring)) { |
402 | struct ixgbe_hw *hw = &adapter->hw; | |
403 | union ixgbe_adv_tx_desc *eop_desc; | |
404 | ||
405 | eop_desc = tx_ring->tx_buffer_info[i].next_to_watch; | |
406 | ||
407 | pr_err("Detected Tx Unit Hang\n" | |
408 | " Tx Queue <%d>\n" | |
409 | " TDH, TDT <%x>, <%x>\n" | |
410 | " next_to_use <%x>\n" | |
411 | " next_to_clean <%x>\n" | |
412 | "tx_buffer_info[next_to_clean]\n" | |
413 | " next_to_watch <%p>\n" | |
414 | " eop_desc->wb.status <%x>\n" | |
415 | " time_stamp <%lx>\n" | |
416 | " jiffies <%lx>\n", | |
417 | tx_ring->queue_index, | |
418 | IXGBE_READ_REG(hw, IXGBE_VFTDH(tx_ring->reg_idx)), | |
419 | IXGBE_READ_REG(hw, IXGBE_VFTDT(tx_ring->reg_idx)), | |
420 | tx_ring->next_to_use, i, | |
421 | eop_desc, (eop_desc ? eop_desc->wb.status : 0), | |
422 | tx_ring->tx_buffer_info[i].time_stamp, jiffies); | |
423 | ||
424 | netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index); | |
425 | ||
426 | /* schedule immediate reset if we believe we hung */ | |
9ac5c5cc | 427 | ixgbevf_tx_timeout_reset(adapter); |
e08400b7 ET |
428 | |
429 | return true; | |
430 | } | |
431 | ||
92915f71 | 432 | #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2) |
7ad1a093 | 433 | if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) && |
f880d07b | 434 | (ixgbevf_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) { |
92915f71 GR |
435 | /* Make sure that anybody stopping the queue after this |
436 | * sees the new next_to_clean. | |
437 | */ | |
438 | smp_mb(); | |
7ad1a093 | 439 | |
fb40195c AD |
440 | if (__netif_subqueue_stopped(tx_ring->netdev, |
441 | tx_ring->queue_index) && | |
92915f71 | 442 | !test_bit(__IXGBEVF_DOWN, &adapter->state)) { |
fb40195c AD |
443 | netif_wake_subqueue(tx_ring->netdev, |
444 | tx_ring->queue_index); | |
7ad1a093 | 445 | ++tx_ring->tx_stats.restart_queue; |
92915f71 | 446 | } |
92915f71 GR |
447 | } |
448 | ||
7ad1a093 | 449 | return !!budget; |
92915f71 GR |
450 | } |
451 | ||
08681618 JK |
452 | /** |
453 | * ixgbevf_rx_skb - Helper function to determine proper Rx method | |
454 | * @q_vector: structure containing interrupt and ring information | |
455 | * @skb: packet to send up | |
08681618 JK |
456 | **/ |
457 | static void ixgbevf_rx_skb(struct ixgbevf_q_vector *q_vector, | |
dff80520 | 458 | struct sk_buff *skb) |
08681618 | 459 | { |
c777cdfa JK |
460 | #ifdef CONFIG_NET_RX_BUSY_POLL |
461 | skb_mark_napi_id(skb, &q_vector->napi); | |
462 | ||
463 | if (ixgbevf_qv_busy_polling(q_vector)) { | |
464 | netif_receive_skb(skb); | |
465 | /* exit early if we busy polled */ | |
466 | return; | |
467 | } | |
468 | #endif /* CONFIG_NET_RX_BUSY_POLL */ | |
688ff32d ET |
469 | |
470 | napi_gro_receive(&q_vector->napi, skb); | |
08681618 JK |
471 | } |
472 | ||
1e1429d6 FD |
473 | #define IXGBE_RSS_L4_TYPES_MASK \ |
474 | ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \ | |
475 | (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \ | |
476 | (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \ | |
477 | (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP)) | |
478 | ||
479 | static inline void ixgbevf_rx_hash(struct ixgbevf_ring *ring, | |
480 | union ixgbe_adv_rx_desc *rx_desc, | |
481 | struct sk_buff *skb) | |
482 | { | |
483 | u16 rss_type; | |
484 | ||
485 | if (!(ring->netdev->features & NETIF_F_RXHASH)) | |
486 | return; | |
487 | ||
488 | rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) & | |
489 | IXGBE_RXDADV_RSSTYPE_MASK; | |
490 | ||
491 | if (!rss_type) | |
492 | return; | |
493 | ||
494 | skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss), | |
495 | (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ? | |
496 | PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3); | |
497 | } | |
498 | ||
dec0d8e4 JK |
499 | /** |
500 | * ixgbevf_rx_checksum - indicate in skb if hw indicated a good cksum | |
ec62fe26 ET |
501 | * @ring: structure containig ring specific data |
502 | * @rx_desc: current Rx descriptor being processed | |
92915f71 | 503 | * @skb: skb currently being received and modified |
dec0d8e4 | 504 | **/ |
55fb277c | 505 | static inline void ixgbevf_rx_checksum(struct ixgbevf_ring *ring, |
ec62fe26 ET |
506 | union ixgbe_adv_rx_desc *rx_desc, |
507 | struct sk_buff *skb) | |
92915f71 | 508 | { |
bc8acf2c | 509 | skb_checksum_none_assert(skb); |
92915f71 GR |
510 | |
511 | /* Rx csum disabled */ | |
fb40195c | 512 | if (!(ring->netdev->features & NETIF_F_RXCSUM)) |
92915f71 GR |
513 | return; |
514 | ||
515 | /* if IP and error */ | |
ec62fe26 ET |
516 | if (ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) && |
517 | ixgbevf_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) { | |
095e2617 | 518 | ring->rx_stats.csum_err++; |
92915f71 GR |
519 | return; |
520 | } | |
521 | ||
ec62fe26 | 522 | if (!ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS)) |
92915f71 GR |
523 | return; |
524 | ||
ec62fe26 | 525 | if (ixgbevf_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) { |
095e2617 | 526 | ring->rx_stats.csum_err++; |
92915f71 GR |
527 | return; |
528 | } | |
529 | ||
530 | /* It must be a TCP or UDP packet with a valid checksum */ | |
531 | skb->ip_summed = CHECKSUM_UNNECESSARY; | |
92915f71 GR |
532 | } |
533 | ||
dec0d8e4 JK |
534 | /** |
535 | * ixgbevf_process_skb_fields - Populate skb header fields from Rx descriptor | |
dff80520 ET |
536 | * @rx_ring: rx descriptor ring packet is being transacted on |
537 | * @rx_desc: pointer to the EOP Rx descriptor | |
538 | * @skb: pointer to current skb being populated | |
539 | * | |
540 | * This function checks the ring, descriptor, and packet information in | |
541 | * order to populate the checksum, VLAN, protocol, and other fields within | |
542 | * the skb. | |
dec0d8e4 | 543 | **/ |
dff80520 ET |
544 | static void ixgbevf_process_skb_fields(struct ixgbevf_ring *rx_ring, |
545 | union ixgbe_adv_rx_desc *rx_desc, | |
546 | struct sk_buff *skb) | |
547 | { | |
1e1429d6 | 548 | ixgbevf_rx_hash(rx_ring, rx_desc, skb); |
dff80520 ET |
549 | ixgbevf_rx_checksum(rx_ring, rx_desc, skb); |
550 | ||
551 | if (ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) { | |
552 | u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan); | |
553 | unsigned long *active_vlans = netdev_priv(rx_ring->netdev); | |
554 | ||
555 | if (test_bit(vid & VLAN_VID_MASK, active_vlans)) | |
556 | __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid); | |
557 | } | |
558 | ||
559 | skb->protocol = eth_type_trans(skb, rx_ring->netdev); | |
560 | } | |
561 | ||
4b95fe3d ET |
562 | /** |
563 | * ixgbevf_is_non_eop - process handling of non-EOP buffers | |
564 | * @rx_ring: Rx ring being processed | |
565 | * @rx_desc: Rx descriptor for current buffer | |
566 | * @skb: current socket buffer containing buffer in progress | |
567 | * | |
568 | * This function updates next to clean. If the buffer is an EOP buffer | |
569 | * this function exits returning false, otherwise it will place the | |
570 | * sk_buff in the next buffer to be chained and return true indicating | |
571 | * that this is in fact a non-EOP buffer. | |
572 | **/ | |
573 | static bool ixgbevf_is_non_eop(struct ixgbevf_ring *rx_ring, | |
bad17234 | 574 | union ixgbe_adv_rx_desc *rx_desc) |
4b95fe3d ET |
575 | { |
576 | u32 ntc = rx_ring->next_to_clean + 1; | |
577 | ||
578 | /* fetch, update, and store next to clean */ | |
579 | ntc = (ntc < rx_ring->count) ? ntc : 0; | |
580 | rx_ring->next_to_clean = ntc; | |
581 | ||
582 | prefetch(IXGBEVF_RX_DESC(rx_ring, ntc)); | |
583 | ||
584 | if (likely(ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))) | |
585 | return false; | |
586 | ||
587 | return true; | |
588 | } | |
589 | ||
bad17234 ET |
590 | static bool ixgbevf_alloc_mapped_page(struct ixgbevf_ring *rx_ring, |
591 | struct ixgbevf_rx_buffer *bi) | |
bafa578f | 592 | { |
bad17234 | 593 | struct page *page = bi->page; |
bafa578f ET |
594 | dma_addr_t dma = bi->dma; |
595 | ||
bad17234 ET |
596 | /* since we are recycling buffers we should seldom need to alloc */ |
597 | if (likely(page)) | |
bafa578f ET |
598 | return true; |
599 | ||
bad17234 ET |
600 | /* alloc new page for storage */ |
601 | page = dev_alloc_page(); | |
602 | if (unlikely(!page)) { | |
603 | rx_ring->rx_stats.alloc_rx_page_failed++; | |
bafa578f ET |
604 | return false; |
605 | } | |
606 | ||
bad17234 ET |
607 | /* map page for use */ |
608 | dma = dma_map_page(rx_ring->dev, page, 0, | |
609 | PAGE_SIZE, DMA_FROM_DEVICE); | |
bafa578f ET |
610 | |
611 | /* if mapping failed free memory back to system since | |
612 | * there isn't much point in holding memory we can't use | |
613 | */ | |
614 | if (dma_mapping_error(rx_ring->dev, dma)) { | |
bad17234 | 615 | __free_page(page); |
bafa578f ET |
616 | |
617 | rx_ring->rx_stats.alloc_rx_buff_failed++; | |
618 | return false; | |
619 | } | |
620 | ||
bafa578f | 621 | bi->dma = dma; |
bad17234 ET |
622 | bi->page = page; |
623 | bi->page_offset = 0; | |
bafa578f ET |
624 | |
625 | return true; | |
626 | } | |
627 | ||
92915f71 GR |
628 | /** |
629 | * ixgbevf_alloc_rx_buffers - Replace used receive buffers; packet split | |
095e2617 | 630 | * @rx_ring: rx descriptor ring (for a specific queue) to setup buffers on |
bafa578f | 631 | * @cleaned_count: number of buffers to replace |
92915f71 | 632 | **/ |
095e2617 | 633 | static void ixgbevf_alloc_rx_buffers(struct ixgbevf_ring *rx_ring, |
bafa578f | 634 | u16 cleaned_count) |
92915f71 | 635 | { |
92915f71 GR |
636 | union ixgbe_adv_rx_desc *rx_desc; |
637 | struct ixgbevf_rx_buffer *bi; | |
fb40195c | 638 | unsigned int i = rx_ring->next_to_use; |
92915f71 | 639 | |
bafa578f ET |
640 | /* nothing to do or no valid netdev defined */ |
641 | if (!cleaned_count || !rx_ring->netdev) | |
642 | return; | |
b9dd245b | 643 | |
bafa578f ET |
644 | rx_desc = IXGBEVF_RX_DESC(rx_ring, i); |
645 | bi = &rx_ring->rx_buffer_info[i]; | |
646 | i -= rx_ring->count; | |
05d063aa | 647 | |
bafa578f | 648 | do { |
bad17234 | 649 | if (!ixgbevf_alloc_mapped_page(rx_ring, bi)) |
bafa578f | 650 | break; |
b9dd245b | 651 | |
bafa578f ET |
652 | /* Refresh the desc even if pkt_addr didn't change |
653 | * because each write-back erases this info. | |
654 | */ | |
bad17234 | 655 | rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset); |
92915f71 | 656 | |
bafa578f ET |
657 | rx_desc++; |
658 | bi++; | |
92915f71 | 659 | i++; |
bafa578f ET |
660 | if (unlikely(!i)) { |
661 | rx_desc = IXGBEVF_RX_DESC(rx_ring, 0); | |
662 | bi = rx_ring->rx_buffer_info; | |
663 | i -= rx_ring->count; | |
664 | } | |
665 | ||
666 | /* clear the hdr_addr for the next_to_use descriptor */ | |
667 | rx_desc->read.hdr_addr = 0; | |
668 | ||
669 | cleaned_count--; | |
670 | } while (cleaned_count); | |
671 | ||
672 | i += rx_ring->count; | |
92915f71 | 673 | |
bafa578f ET |
674 | if (rx_ring->next_to_use != i) { |
675 | /* record the next descriptor to use */ | |
676 | rx_ring->next_to_use = i; | |
677 | ||
bad17234 ET |
678 | /* update next to alloc since we have filled the ring */ |
679 | rx_ring->next_to_alloc = i; | |
680 | ||
bafa578f ET |
681 | /* Force memory writes to complete before letting h/w |
682 | * know there are new descriptors to fetch. (Only | |
683 | * applicable for weak-ordered memory model archs, | |
684 | * such as IA-64). | |
685 | */ | |
686 | wmb(); | |
687 | ixgbevf_write_tail(rx_ring, i); | |
688 | } | |
92915f71 GR |
689 | } |
690 | ||
dec0d8e4 JK |
691 | /** |
692 | * ixgbevf_cleanup_headers - Correct corrupted or empty headers | |
bad17234 ET |
693 | * @rx_ring: rx descriptor ring packet is being transacted on |
694 | * @rx_desc: pointer to the EOP Rx descriptor | |
695 | * @skb: pointer to current skb being fixed | |
696 | * | |
697 | * Check for corrupted packet headers caused by senders on the local L2 | |
698 | * embedded NIC switch not setting up their Tx Descriptors right. These | |
699 | * should be very rare. | |
700 | * | |
701 | * Also address the case where we are pulling data in on pages only | |
702 | * and as such no data is present in the skb header. | |
703 | * | |
704 | * In addition if skb is not at least 60 bytes we need to pad it so that | |
705 | * it is large enough to qualify as a valid Ethernet frame. | |
706 | * | |
707 | * Returns true if an error was encountered and skb was freed. | |
dec0d8e4 | 708 | **/ |
bad17234 ET |
709 | static bool ixgbevf_cleanup_headers(struct ixgbevf_ring *rx_ring, |
710 | union ixgbe_adv_rx_desc *rx_desc, | |
711 | struct sk_buff *skb) | |
712 | { | |
713 | /* verify that the packet does not have any known errors */ | |
714 | if (unlikely(ixgbevf_test_staterr(rx_desc, | |
715 | IXGBE_RXDADV_ERR_FRAME_ERR_MASK))) { | |
716 | struct net_device *netdev = rx_ring->netdev; | |
717 | ||
718 | if (!(netdev->features & NETIF_F_RXALL)) { | |
719 | dev_kfree_skb_any(skb); | |
720 | return true; | |
721 | } | |
722 | } | |
723 | ||
a94d9e22 AD |
724 | /* if eth_skb_pad returns an error the skb was freed */ |
725 | if (eth_skb_pad(skb)) | |
726 | return true; | |
bad17234 ET |
727 | |
728 | return false; | |
729 | } | |
730 | ||
dec0d8e4 JK |
731 | /** |
732 | * ixgbevf_reuse_rx_page - page flip buffer and store it back on the ring | |
bad17234 ET |
733 | * @rx_ring: rx descriptor ring to store buffers on |
734 | * @old_buff: donor buffer to have page reused | |
735 | * | |
736 | * Synchronizes page for reuse by the adapter | |
dec0d8e4 | 737 | **/ |
bad17234 ET |
738 | static void ixgbevf_reuse_rx_page(struct ixgbevf_ring *rx_ring, |
739 | struct ixgbevf_rx_buffer *old_buff) | |
740 | { | |
741 | struct ixgbevf_rx_buffer *new_buff; | |
742 | u16 nta = rx_ring->next_to_alloc; | |
743 | ||
744 | new_buff = &rx_ring->rx_buffer_info[nta]; | |
745 | ||
746 | /* update, and store next to alloc */ | |
747 | nta++; | |
748 | rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0; | |
749 | ||
750 | /* transfer page from old buffer to new buffer */ | |
751 | new_buff->page = old_buff->page; | |
752 | new_buff->dma = old_buff->dma; | |
753 | new_buff->page_offset = old_buff->page_offset; | |
754 | ||
755 | /* sync the buffer for use by the device */ | |
756 | dma_sync_single_range_for_device(rx_ring->dev, new_buff->dma, | |
757 | new_buff->page_offset, | |
758 | IXGBEVF_RX_BUFSZ, | |
759 | DMA_FROM_DEVICE); | |
760 | } | |
761 | ||
762 | static inline bool ixgbevf_page_is_reserved(struct page *page) | |
763 | { | |
2f064f34 | 764 | return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page); |
bad17234 ET |
765 | } |
766 | ||
dec0d8e4 JK |
767 | /** |
768 | * ixgbevf_add_rx_frag - Add contents of Rx buffer to sk_buff | |
bad17234 ET |
769 | * @rx_ring: rx descriptor ring to transact packets on |
770 | * @rx_buffer: buffer containing page to add | |
771 | * @rx_desc: descriptor containing length of buffer written by hardware | |
772 | * @skb: sk_buff to place the data into | |
773 | * | |
774 | * This function will add the data contained in rx_buffer->page to the skb. | |
775 | * This is done either through a direct copy if the data in the buffer is | |
776 | * less than the skb header size, otherwise it will just attach the page as | |
777 | * a frag to the skb. | |
778 | * | |
779 | * The function will then update the page offset if necessary and return | |
780 | * true if the buffer can be reused by the adapter. | |
dec0d8e4 | 781 | **/ |
bad17234 ET |
782 | static bool ixgbevf_add_rx_frag(struct ixgbevf_ring *rx_ring, |
783 | struct ixgbevf_rx_buffer *rx_buffer, | |
784 | union ixgbe_adv_rx_desc *rx_desc, | |
785 | struct sk_buff *skb) | |
786 | { | |
787 | struct page *page = rx_buffer->page; | |
5505bdb5 | 788 | unsigned char *va = page_address(page) + rx_buffer->page_offset; |
bad17234 ET |
789 | unsigned int size = le16_to_cpu(rx_desc->wb.upper.length); |
790 | #if (PAGE_SIZE < 8192) | |
791 | unsigned int truesize = IXGBEVF_RX_BUFSZ; | |
792 | #else | |
793 | unsigned int truesize = ALIGN(size, L1_CACHE_BYTES); | |
794 | #endif | |
5505bdb5 | 795 | unsigned int pull_len; |
bad17234 | 796 | |
5505bdb5 AD |
797 | if (unlikely(skb_is_nonlinear(skb))) |
798 | goto add_tail_frag; | |
bad17234 | 799 | |
5505bdb5 | 800 | if (likely(size <= IXGBEVF_RX_HDR_SIZE)) { |
bad17234 ET |
801 | memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long))); |
802 | ||
803 | /* page is not reserved, we can reuse buffer as is */ | |
804 | if (likely(!ixgbevf_page_is_reserved(page))) | |
805 | return true; | |
806 | ||
807 | /* this page cannot be reused so discard it */ | |
808 | put_page(page); | |
809 | return false; | |
810 | } | |
811 | ||
5505bdb5 AD |
812 | /* we need the header to contain the greater of either ETH_HLEN or |
813 | * 60 bytes if the skb->len is less than 60 for skb_pad. | |
814 | */ | |
815 | pull_len = eth_get_headlen(va, IXGBEVF_RX_HDR_SIZE); | |
816 | ||
817 | /* align pull length to size of long to optimize memcpy performance */ | |
818 | memcpy(__skb_put(skb, pull_len), va, ALIGN(pull_len, sizeof(long))); | |
819 | ||
820 | /* update all of the pointers */ | |
821 | va += pull_len; | |
822 | size -= pull_len; | |
823 | ||
824 | add_tail_frag: | |
bad17234 | 825 | skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page, |
5505bdb5 | 826 | (unsigned long)va & ~PAGE_MASK, size, truesize); |
bad17234 ET |
827 | |
828 | /* avoid re-using remote pages */ | |
829 | if (unlikely(ixgbevf_page_is_reserved(page))) | |
830 | return false; | |
831 | ||
832 | #if (PAGE_SIZE < 8192) | |
833 | /* if we are only owner of page we can reuse it */ | |
834 | if (unlikely(page_count(page) != 1)) | |
835 | return false; | |
836 | ||
837 | /* flip page offset to other buffer */ | |
838 | rx_buffer->page_offset ^= IXGBEVF_RX_BUFSZ; | |
839 | ||
840 | #else | |
841 | /* move offset up to the next cache line */ | |
842 | rx_buffer->page_offset += truesize; | |
843 | ||
844 | if (rx_buffer->page_offset > (PAGE_SIZE - IXGBEVF_RX_BUFSZ)) | |
845 | return false; | |
846 | ||
847 | #endif | |
848 | /* Even if we own the page, we are not allowed to use atomic_set() | |
849 | * This would break get_page_unless_zero() users. | |
850 | */ | |
fe896d18 | 851 | page_ref_inc(page); |
bad17234 ET |
852 | |
853 | return true; | |
854 | } | |
855 | ||
856 | static struct sk_buff *ixgbevf_fetch_rx_buffer(struct ixgbevf_ring *rx_ring, | |
857 | union ixgbe_adv_rx_desc *rx_desc, | |
858 | struct sk_buff *skb) | |
859 | { | |
860 | struct ixgbevf_rx_buffer *rx_buffer; | |
861 | struct page *page; | |
862 | ||
863 | rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean]; | |
864 | page = rx_buffer->page; | |
865 | prefetchw(page); | |
866 | ||
867 | if (likely(!skb)) { | |
868 | void *page_addr = page_address(page) + | |
869 | rx_buffer->page_offset; | |
870 | ||
871 | /* prefetch first cache line of first page */ | |
872 | prefetch(page_addr); | |
873 | #if L1_CACHE_BYTES < 128 | |
874 | prefetch(page_addr + L1_CACHE_BYTES); | |
875 | #endif | |
876 | ||
877 | /* allocate a skb to store the frags */ | |
878 | skb = netdev_alloc_skb_ip_align(rx_ring->netdev, | |
879 | IXGBEVF_RX_HDR_SIZE); | |
880 | if (unlikely(!skb)) { | |
881 | rx_ring->rx_stats.alloc_rx_buff_failed++; | |
882 | return NULL; | |
883 | } | |
884 | ||
885 | /* we will be copying header into skb->data in | |
886 | * pskb_may_pull so it is in our interest to prefetch | |
887 | * it now to avoid a possible cache miss | |
888 | */ | |
889 | prefetchw(skb->data); | |
890 | } | |
891 | ||
892 | /* we are reusing so sync this buffer for CPU use */ | |
893 | dma_sync_single_range_for_cpu(rx_ring->dev, | |
894 | rx_buffer->dma, | |
895 | rx_buffer->page_offset, | |
896 | IXGBEVF_RX_BUFSZ, | |
897 | DMA_FROM_DEVICE); | |
898 | ||
899 | /* pull page into skb */ | |
900 | if (ixgbevf_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) { | |
901 | /* hand second half of page back to the ring */ | |
902 | ixgbevf_reuse_rx_page(rx_ring, rx_buffer); | |
903 | } else { | |
904 | /* we are not reusing the buffer so unmap it */ | |
905 | dma_unmap_page(rx_ring->dev, rx_buffer->dma, | |
906 | PAGE_SIZE, DMA_FROM_DEVICE); | |
907 | } | |
908 | ||
909 | /* clear contents of buffer_info */ | |
910 | rx_buffer->dma = 0; | |
911 | rx_buffer->page = NULL; | |
912 | ||
913 | return skb; | |
914 | } | |
915 | ||
92915f71 | 916 | static inline void ixgbevf_irq_enable_queues(struct ixgbevf_adapter *adapter, |
5f3600eb | 917 | u32 qmask) |
92915f71 | 918 | { |
92915f71 GR |
919 | struct ixgbe_hw *hw = &adapter->hw; |
920 | ||
5f3600eb | 921 | IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, qmask); |
92915f71 GR |
922 | } |
923 | ||
08e50a20 JK |
924 | static int ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector, |
925 | struct ixgbevf_ring *rx_ring, | |
926 | int budget) | |
92915f71 | 927 | { |
92915f71 | 928 | unsigned int total_rx_bytes = 0, total_rx_packets = 0; |
bafa578f | 929 | u16 cleaned_count = ixgbevf_desc_unused(rx_ring); |
bad17234 | 930 | struct sk_buff *skb = rx_ring->skb; |
92915f71 | 931 | |
6622402a | 932 | while (likely(total_rx_packets < budget)) { |
4b95fe3d | 933 | union ixgbe_adv_rx_desc *rx_desc; |
b97fe3b1 | 934 | |
0579eefc ET |
935 | /* return some buffers to hardware, one at a time is too slow */ |
936 | if (cleaned_count >= IXGBEVF_RX_BUFFER_WRITE) { | |
937 | ixgbevf_alloc_rx_buffers(rx_ring, cleaned_count); | |
938 | cleaned_count = 0; | |
939 | } | |
940 | ||
bad17234 | 941 | rx_desc = IXGBEVF_RX_DESC(rx_ring, rx_ring->next_to_clean); |
0579eefc ET |
942 | |
943 | if (!ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_DD)) | |
92915f71 | 944 | break; |
92915f71 | 945 | |
0579eefc ET |
946 | /* This memory barrier is needed to keep us from reading |
947 | * any other fields out of the rx_desc until we know the | |
948 | * RXD_STAT_DD bit is set | |
949 | */ | |
950 | rmb(); | |
ec62fe26 | 951 | |
bad17234 ET |
952 | /* retrieve a buffer from the ring */ |
953 | skb = ixgbevf_fetch_rx_buffer(rx_ring, rx_desc, skb); | |
0579eefc | 954 | |
bad17234 ET |
955 | /* exit if we failed to retrieve a buffer */ |
956 | if (!skb) | |
957 | break; | |
92915f71 | 958 | |
b97fe3b1 ET |
959 | cleaned_count++; |
960 | ||
bad17234 ET |
961 | /* fetch next buffer in frame if non-eop */ |
962 | if (ixgbevf_is_non_eop(rx_ring, rx_desc)) | |
0579eefc | 963 | continue; |
5c60f81a | 964 | |
bad17234 ET |
965 | /* verify the packet layout is correct */ |
966 | if (ixgbevf_cleanup_headers(rx_ring, rx_desc, skb)) { | |
967 | skb = NULL; | |
0579eefc | 968 | continue; |
92915f71 GR |
969 | } |
970 | ||
92915f71 GR |
971 | /* probably a little skewed due to removing CRC */ |
972 | total_rx_bytes += skb->len; | |
92915f71 | 973 | |
815cccbf JF |
974 | /* Workaround hardware that can't do proper VEPA multicast |
975 | * source pruning. | |
976 | */ | |
bd9d5592 | 977 | if ((skb->pkt_type == PACKET_BROADCAST || |
dec0d8e4 | 978 | skb->pkt_type == PACKET_MULTICAST) && |
095e2617 | 979 | ether_addr_equal(rx_ring->netdev->dev_addr, |
7367d0b5 | 980 | eth_hdr(skb)->h_source)) { |
815cccbf | 981 | dev_kfree_skb_irq(skb); |
0579eefc | 982 | continue; |
815cccbf JF |
983 | } |
984 | ||
dff80520 ET |
985 | /* populate checksum, VLAN, and protocol */ |
986 | ixgbevf_process_skb_fields(rx_ring, rx_desc, skb); | |
987 | ||
988 | ixgbevf_rx_skb(q_vector, skb); | |
92915f71 | 989 | |
bad17234 ET |
990 | /* reset skb pointer */ |
991 | skb = NULL; | |
992 | ||
0579eefc | 993 | /* update budget accounting */ |
6622402a ET |
994 | total_rx_packets++; |
995 | } | |
92915f71 | 996 | |
bad17234 ET |
997 | /* place incomplete frames back on ring for completion */ |
998 | rx_ring->skb = skb; | |
999 | ||
4197aa7b | 1000 | u64_stats_update_begin(&rx_ring->syncp); |
095e2617 ET |
1001 | rx_ring->stats.packets += total_rx_packets; |
1002 | rx_ring->stats.bytes += total_rx_bytes; | |
4197aa7b | 1003 | u64_stats_update_end(&rx_ring->syncp); |
ac6ed8f0 GR |
1004 | q_vector->rx.total_packets += total_rx_packets; |
1005 | q_vector->rx.total_bytes += total_rx_bytes; | |
92915f71 | 1006 | |
08e50a20 | 1007 | return total_rx_packets; |
92915f71 GR |
1008 | } |
1009 | ||
1010 | /** | |
fa71ae27 | 1011 | * ixgbevf_poll - NAPI polling calback |
92915f71 GR |
1012 | * @napi: napi struct with our devices info in it |
1013 | * @budget: amount of work driver is allowed to do this pass, in packets | |
1014 | * | |
fa71ae27 | 1015 | * This function will clean more than one or more rings associated with a |
92915f71 GR |
1016 | * q_vector. |
1017 | **/ | |
fa71ae27 | 1018 | static int ixgbevf_poll(struct napi_struct *napi, int budget) |
92915f71 GR |
1019 | { |
1020 | struct ixgbevf_q_vector *q_vector = | |
1021 | container_of(napi, struct ixgbevf_q_vector, napi); | |
1022 | struct ixgbevf_adapter *adapter = q_vector->adapter; | |
fa71ae27 | 1023 | struct ixgbevf_ring *ring; |
32b3e08f | 1024 | int per_ring_budget, work_done = 0; |
fa71ae27 AD |
1025 | bool clean_complete = true; |
1026 | ||
8220bbc1 AD |
1027 | ixgbevf_for_each_ring(ring, q_vector->tx) { |
1028 | if (!ixgbevf_clean_tx_irq(q_vector, ring, budget)) | |
1029 | clean_complete = false; | |
1030 | } | |
92915f71 | 1031 | |
d0f71aff WD |
1032 | if (budget <= 0) |
1033 | return budget; | |
c777cdfa JK |
1034 | #ifdef CONFIG_NET_RX_BUSY_POLL |
1035 | if (!ixgbevf_qv_lock_napi(q_vector)) | |
1036 | return budget; | |
1037 | #endif | |
1038 | ||
92915f71 | 1039 | /* attempt to distribute budget to each queue fairly, but don't allow |
dec0d8e4 JK |
1040 | * the budget to go below 1 because we'll exit polling |
1041 | */ | |
fa71ae27 AD |
1042 | if (q_vector->rx.count > 1) |
1043 | per_ring_budget = max(budget/q_vector->rx.count, 1); | |
1044 | else | |
1045 | per_ring_budget = budget; | |
1046 | ||
32b3e08f JB |
1047 | ixgbevf_for_each_ring(ring, q_vector->rx) { |
1048 | int cleaned = ixgbevf_clean_rx_irq(q_vector, ring, | |
1049 | per_ring_budget); | |
1050 | work_done += cleaned; | |
8220bbc1 AD |
1051 | if (cleaned >= per_ring_budget) |
1052 | clean_complete = false; | |
32b3e08f | 1053 | } |
fa71ae27 | 1054 | |
c777cdfa JK |
1055 | #ifdef CONFIG_NET_RX_BUSY_POLL |
1056 | ixgbevf_qv_unlock_napi(q_vector); | |
1057 | #endif | |
1058 | ||
fa71ae27 AD |
1059 | /* If all work not completed, return budget and keep polling */ |
1060 | if (!clean_complete) | |
1061 | return budget; | |
1062 | /* all work done, exit the polling mode */ | |
32b3e08f | 1063 | napi_complete_done(napi, work_done); |
9ad3d6f7 | 1064 | if (adapter->rx_itr_setting == 1) |
fa71ae27 | 1065 | ixgbevf_set_itr(q_vector); |
2e7cfbdd MR |
1066 | if (!test_bit(__IXGBEVF_DOWN, &adapter->state) && |
1067 | !test_bit(__IXGBEVF_REMOVING, &adapter->state)) | |
fa71ae27 | 1068 | ixgbevf_irq_enable_queues(adapter, |
8d055cc0 | 1069 | BIT(q_vector->v_idx)); |
92915f71 | 1070 | |
fa71ae27 | 1071 | return 0; |
92915f71 GR |
1072 | } |
1073 | ||
ce422606 GR |
1074 | /** |
1075 | * ixgbevf_write_eitr - write VTEITR register in hardware specific way | |
1076 | * @q_vector: structure containing interrupt and ring information | |
dec0d8e4 | 1077 | **/ |
3849623e | 1078 | void ixgbevf_write_eitr(struct ixgbevf_q_vector *q_vector) |
ce422606 GR |
1079 | { |
1080 | struct ixgbevf_adapter *adapter = q_vector->adapter; | |
1081 | struct ixgbe_hw *hw = &adapter->hw; | |
1082 | int v_idx = q_vector->v_idx; | |
1083 | u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR; | |
1084 | ||
dec0d8e4 | 1085 | /* set the WDIS bit to not clear the timer bits and cause an |
ce422606 GR |
1086 | * immediate assertion of the interrupt |
1087 | */ | |
1088 | itr_reg |= IXGBE_EITR_CNT_WDIS; | |
1089 | ||
1090 | IXGBE_WRITE_REG(hw, IXGBE_VTEITR(v_idx), itr_reg); | |
1091 | } | |
92915f71 | 1092 | |
c777cdfa JK |
1093 | #ifdef CONFIG_NET_RX_BUSY_POLL |
1094 | /* must be called with local_bh_disable()d */ | |
1095 | static int ixgbevf_busy_poll_recv(struct napi_struct *napi) | |
1096 | { | |
1097 | struct ixgbevf_q_vector *q_vector = | |
1098 | container_of(napi, struct ixgbevf_q_vector, napi); | |
1099 | struct ixgbevf_adapter *adapter = q_vector->adapter; | |
1100 | struct ixgbevf_ring *ring; | |
1101 | int found = 0; | |
1102 | ||
1103 | if (test_bit(__IXGBEVF_DOWN, &adapter->state)) | |
1104 | return LL_FLUSH_FAILED; | |
1105 | ||
1106 | if (!ixgbevf_qv_lock_poll(q_vector)) | |
1107 | return LL_FLUSH_BUSY; | |
1108 | ||
1109 | ixgbevf_for_each_ring(ring, q_vector->rx) { | |
1110 | found = ixgbevf_clean_rx_irq(q_vector, ring, 4); | |
3b5dca26 JK |
1111 | #ifdef BP_EXTENDED_STATS |
1112 | if (found) | |
095e2617 | 1113 | ring->stats.cleaned += found; |
3b5dca26 | 1114 | else |
095e2617 | 1115 | ring->stats.misses++; |
3b5dca26 | 1116 | #endif |
c777cdfa JK |
1117 | if (found) |
1118 | break; | |
1119 | } | |
1120 | ||
1121 | ixgbevf_qv_unlock_poll(q_vector); | |
1122 | ||
1123 | return found; | |
1124 | } | |
1125 | #endif /* CONFIG_NET_RX_BUSY_POLL */ | |
1126 | ||
92915f71 GR |
1127 | /** |
1128 | * ixgbevf_configure_msix - Configure MSI-X hardware | |
1129 | * @adapter: board private structure | |
1130 | * | |
1131 | * ixgbevf_configure_msix sets up the hardware to properly generate MSI-X | |
1132 | * interrupts. | |
1133 | **/ | |
1134 | static void ixgbevf_configure_msix(struct ixgbevf_adapter *adapter) | |
1135 | { | |
1136 | struct ixgbevf_q_vector *q_vector; | |
6b43c446 | 1137 | int q_vectors, v_idx; |
92915f71 GR |
1138 | |
1139 | q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; | |
5f3600eb | 1140 | adapter->eims_enable_mask = 0; |
92915f71 | 1141 | |
dec0d8e4 | 1142 | /* Populate the IVAR table and set the ITR values to the |
92915f71 GR |
1143 | * corresponding register. |
1144 | */ | |
1145 | for (v_idx = 0; v_idx < q_vectors; v_idx++) { | |
6b43c446 | 1146 | struct ixgbevf_ring *ring; |
dec0d8e4 | 1147 | |
92915f71 | 1148 | q_vector = adapter->q_vector[v_idx]; |
6b43c446 AD |
1149 | |
1150 | ixgbevf_for_each_ring(ring, q_vector->rx) | |
1151 | ixgbevf_set_ivar(adapter, 0, ring->reg_idx, v_idx); | |
1152 | ||
1153 | ixgbevf_for_each_ring(ring, q_vector->tx) | |
1154 | ixgbevf_set_ivar(adapter, 1, ring->reg_idx, v_idx); | |
92915f71 | 1155 | |
5f3600eb | 1156 | if (q_vector->tx.ring && !q_vector->rx.ring) { |
dec0d8e4 | 1157 | /* Tx only vector */ |
5f3600eb | 1158 | if (adapter->tx_itr_setting == 1) |
8a9ca110 | 1159 | q_vector->itr = IXGBE_12K_ITR; |
5f3600eb AD |
1160 | else |
1161 | q_vector->itr = adapter->tx_itr_setting; | |
1162 | } else { | |
dec0d8e4 | 1163 | /* Rx or Rx/Tx vector */ |
5f3600eb AD |
1164 | if (adapter->rx_itr_setting == 1) |
1165 | q_vector->itr = IXGBE_20K_ITR; | |
1166 | else | |
1167 | q_vector->itr = adapter->rx_itr_setting; | |
1168 | } | |
1169 | ||
1170 | /* add q_vector eims value to global eims_enable_mask */ | |
8d055cc0 | 1171 | adapter->eims_enable_mask |= BIT(v_idx); |
92915f71 | 1172 | |
5f3600eb | 1173 | ixgbevf_write_eitr(q_vector); |
92915f71 GR |
1174 | } |
1175 | ||
1176 | ixgbevf_set_ivar(adapter, -1, 1, v_idx); | |
5f3600eb | 1177 | /* setup eims_other and add value to global eims_enable_mask */ |
8d055cc0 | 1178 | adapter->eims_other = BIT(v_idx); |
5f3600eb | 1179 | adapter->eims_enable_mask |= adapter->eims_other; |
92915f71 GR |
1180 | } |
1181 | ||
1182 | enum latency_range { | |
1183 | lowest_latency = 0, | |
1184 | low_latency = 1, | |
1185 | bulk_latency = 2, | |
1186 | latency_invalid = 255 | |
1187 | }; | |
1188 | ||
1189 | /** | |
1190 | * ixgbevf_update_itr - update the dynamic ITR value based on statistics | |
5f3600eb AD |
1191 | * @q_vector: structure containing interrupt and ring information |
1192 | * @ring_container: structure containing ring performance data | |
92915f71 | 1193 | * |
dec0d8e4 JK |
1194 | * Stores a new ITR value based on packets and byte |
1195 | * counts during the last interrupt. The advantage of per interrupt | |
1196 | * computation is faster updates and more accurate ITR for the current | |
1197 | * traffic pattern. Constants in this function were computed | |
1198 | * based on theoretical maximum wire speed and thresholds were set based | |
1199 | * on testing data as well as attempting to minimize response time | |
1200 | * while increasing bulk throughput. | |
92915f71 | 1201 | **/ |
5f3600eb AD |
1202 | static void ixgbevf_update_itr(struct ixgbevf_q_vector *q_vector, |
1203 | struct ixgbevf_ring_container *ring_container) | |
92915f71 | 1204 | { |
5f3600eb AD |
1205 | int bytes = ring_container->total_bytes; |
1206 | int packets = ring_container->total_packets; | |
92915f71 GR |
1207 | u32 timepassed_us; |
1208 | u64 bytes_perint; | |
5f3600eb | 1209 | u8 itr_setting = ring_container->itr; |
92915f71 GR |
1210 | |
1211 | if (packets == 0) | |
5f3600eb | 1212 | return; |
92915f71 | 1213 | |
dec0d8e4 | 1214 | /* simple throttle rate management |
92915f71 GR |
1215 | * 0-20MB/s lowest (100000 ints/s) |
1216 | * 20-100MB/s low (20000 ints/s) | |
8a9ca110 | 1217 | * 100-1249MB/s bulk (12000 ints/s) |
92915f71 GR |
1218 | */ |
1219 | /* what was last interrupt timeslice? */ | |
5f3600eb | 1220 | timepassed_us = q_vector->itr >> 2; |
92915f71 GR |
1221 | bytes_perint = bytes / timepassed_us; /* bytes/usec */ |
1222 | ||
1223 | switch (itr_setting) { | |
1224 | case lowest_latency: | |
e2c28ce7 | 1225 | if (bytes_perint > 10) |
5f3600eb | 1226 | itr_setting = low_latency; |
92915f71 GR |
1227 | break; |
1228 | case low_latency: | |
e2c28ce7 | 1229 | if (bytes_perint > 20) |
5f3600eb | 1230 | itr_setting = bulk_latency; |
e2c28ce7 | 1231 | else if (bytes_perint <= 10) |
5f3600eb | 1232 | itr_setting = lowest_latency; |
92915f71 GR |
1233 | break; |
1234 | case bulk_latency: | |
e2c28ce7 | 1235 | if (bytes_perint <= 20) |
5f3600eb | 1236 | itr_setting = low_latency; |
92915f71 GR |
1237 | break; |
1238 | } | |
1239 | ||
5f3600eb AD |
1240 | /* clear work counters since we have the values we need */ |
1241 | ring_container->total_bytes = 0; | |
1242 | ring_container->total_packets = 0; | |
1243 | ||
1244 | /* write updated itr to ring container */ | |
1245 | ring_container->itr = itr_setting; | |
92915f71 GR |
1246 | } |
1247 | ||
fa71ae27 | 1248 | static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector) |
92915f71 | 1249 | { |
5f3600eb AD |
1250 | u32 new_itr = q_vector->itr; |
1251 | u8 current_itr; | |
92915f71 | 1252 | |
5f3600eb AD |
1253 | ixgbevf_update_itr(q_vector, &q_vector->tx); |
1254 | ixgbevf_update_itr(q_vector, &q_vector->rx); | |
92915f71 | 1255 | |
6b43c446 | 1256 | current_itr = max(q_vector->rx.itr, q_vector->tx.itr); |
92915f71 GR |
1257 | |
1258 | switch (current_itr) { | |
1259 | /* counts and packets in update_itr are dependent on these numbers */ | |
1260 | case lowest_latency: | |
5f3600eb | 1261 | new_itr = IXGBE_100K_ITR; |
92915f71 GR |
1262 | break; |
1263 | case low_latency: | |
5f3600eb | 1264 | new_itr = IXGBE_20K_ITR; |
92915f71 GR |
1265 | break; |
1266 | case bulk_latency: | |
8a9ca110 | 1267 | new_itr = IXGBE_12K_ITR; |
92915f71 | 1268 | break; |
9ad3d6f7 ET |
1269 | default: |
1270 | break; | |
92915f71 GR |
1271 | } |
1272 | ||
5f3600eb | 1273 | if (new_itr != q_vector->itr) { |
92915f71 | 1274 | /* do an exponential smoothing */ |
5f3600eb AD |
1275 | new_itr = (10 * new_itr * q_vector->itr) / |
1276 | ((9 * new_itr) + q_vector->itr); | |
1277 | ||
1278 | /* save the algorithm value here */ | |
1279 | q_vector->itr = new_itr; | |
1280 | ||
1281 | ixgbevf_write_eitr(q_vector); | |
92915f71 | 1282 | } |
92915f71 GR |
1283 | } |
1284 | ||
4b2cd27f | 1285 | static irqreturn_t ixgbevf_msix_other(int irq, void *data) |
92915f71 | 1286 | { |
fa71ae27 | 1287 | struct ixgbevf_adapter *adapter = data; |
92915f71 | 1288 | struct ixgbe_hw *hw = &adapter->hw; |
08259594 | 1289 | |
4b2cd27f | 1290 | hw->mac.get_link_status = 1; |
1e72bfc3 | 1291 | |
9ac5c5cc | 1292 | ixgbevf_service_event_schedule(adapter); |
3a2c4033 | 1293 | |
5f3600eb AD |
1294 | IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_other); |
1295 | ||
92915f71 GR |
1296 | return IRQ_HANDLED; |
1297 | } | |
1298 | ||
92915f71 | 1299 | /** |
fa71ae27 | 1300 | * ixgbevf_msix_clean_rings - single unshared vector rx clean (all queues) |
92915f71 GR |
1301 | * @irq: unused |
1302 | * @data: pointer to our q_vector struct for this interrupt vector | |
1303 | **/ | |
fa71ae27 | 1304 | static irqreturn_t ixgbevf_msix_clean_rings(int irq, void *data) |
92915f71 GR |
1305 | { |
1306 | struct ixgbevf_q_vector *q_vector = data; | |
92915f71 | 1307 | |
5f3600eb | 1308 | /* EIAM disabled interrupts (on this vector) for us */ |
fa71ae27 | 1309 | if (q_vector->rx.ring || q_vector->tx.ring) |
ef2662b2 | 1310 | napi_schedule_irqoff(&q_vector->napi); |
92915f71 GR |
1311 | |
1312 | return IRQ_HANDLED; | |
1313 | } | |
1314 | ||
1315 | static inline void map_vector_to_rxq(struct ixgbevf_adapter *a, int v_idx, | |
1316 | int r_idx) | |
1317 | { | |
1318 | struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx]; | |
1319 | ||
87e70ab9 DS |
1320 | a->rx_ring[r_idx]->next = q_vector->rx.ring; |
1321 | q_vector->rx.ring = a->rx_ring[r_idx]; | |
6b43c446 | 1322 | q_vector->rx.count++; |
92915f71 GR |
1323 | } |
1324 | ||
1325 | static inline void map_vector_to_txq(struct ixgbevf_adapter *a, int v_idx, | |
1326 | int t_idx) | |
1327 | { | |
1328 | struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx]; | |
1329 | ||
87e70ab9 DS |
1330 | a->tx_ring[t_idx]->next = q_vector->tx.ring; |
1331 | q_vector->tx.ring = a->tx_ring[t_idx]; | |
6b43c446 | 1332 | q_vector->tx.count++; |
92915f71 GR |
1333 | } |
1334 | ||
1335 | /** | |
1336 | * ixgbevf_map_rings_to_vectors - Maps descriptor rings to vectors | |
1337 | * @adapter: board private structure to initialize | |
1338 | * | |
1339 | * This function maps descriptor rings to the queue-specific vectors | |
1340 | * we were allotted through the MSI-X enabling code. Ideally, we'd have | |
1341 | * one vector per ring/queue, but on a constrained vector budget, we | |
1342 | * group the rings as "efficiently" as possible. You would add new | |
1343 | * mapping configurations in here. | |
1344 | **/ | |
1345 | static int ixgbevf_map_rings_to_vectors(struct ixgbevf_adapter *adapter) | |
1346 | { | |
1347 | int q_vectors; | |
1348 | int v_start = 0; | |
1349 | int rxr_idx = 0, txr_idx = 0; | |
1350 | int rxr_remaining = adapter->num_rx_queues; | |
1351 | int txr_remaining = adapter->num_tx_queues; | |
1352 | int i, j; | |
1353 | int rqpv, tqpv; | |
92915f71 GR |
1354 | |
1355 | q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; | |
1356 | ||
dec0d8e4 | 1357 | /* The ideal configuration... |
92915f71 GR |
1358 | * We have enough vectors to map one per queue. |
1359 | */ | |
1360 | if (q_vectors == adapter->num_rx_queues + adapter->num_tx_queues) { | |
1361 | for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++) | |
1362 | map_vector_to_rxq(adapter, v_start, rxr_idx); | |
1363 | ||
1364 | for (; txr_idx < txr_remaining; v_start++, txr_idx++) | |
1365 | map_vector_to_txq(adapter, v_start, txr_idx); | |
50985b5f | 1366 | return 0; |
92915f71 GR |
1367 | } |
1368 | ||
dec0d8e4 | 1369 | /* If we don't have enough vectors for a 1-to-1 |
92915f71 GR |
1370 | * mapping, we'll have to group them so there are |
1371 | * multiple queues per vector. | |
1372 | */ | |
1373 | /* Re-adjusting *qpv takes care of the remainder. */ | |
1374 | for (i = v_start; i < q_vectors; i++) { | |
1375 | rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - i); | |
1376 | for (j = 0; j < rqpv; j++) { | |
1377 | map_vector_to_rxq(adapter, i, rxr_idx); | |
1378 | rxr_idx++; | |
1379 | rxr_remaining--; | |
1380 | } | |
1381 | } | |
1382 | for (i = v_start; i < q_vectors; i++) { | |
1383 | tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - i); | |
1384 | for (j = 0; j < tqpv; j++) { | |
1385 | map_vector_to_txq(adapter, i, txr_idx); | |
1386 | txr_idx++; | |
1387 | txr_remaining--; | |
1388 | } | |
1389 | } | |
1390 | ||
50985b5f | 1391 | return 0; |
92915f71 GR |
1392 | } |
1393 | ||
1394 | /** | |
1395 | * ixgbevf_request_msix_irqs - Initialize MSI-X interrupts | |
1396 | * @adapter: board private structure | |
1397 | * | |
1398 | * ixgbevf_request_msix_irqs allocates MSI-X vectors and requests | |
1399 | * interrupts from the kernel. | |
1400 | **/ | |
1401 | static int ixgbevf_request_msix_irqs(struct ixgbevf_adapter *adapter) | |
1402 | { | |
1403 | struct net_device *netdev = adapter->netdev; | |
fa71ae27 AD |
1404 | int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; |
1405 | int vector, err; | |
92915f71 GR |
1406 | int ri = 0, ti = 0; |
1407 | ||
92915f71 | 1408 | for (vector = 0; vector < q_vectors; vector++) { |
fa71ae27 AD |
1409 | struct ixgbevf_q_vector *q_vector = adapter->q_vector[vector]; |
1410 | struct msix_entry *entry = &adapter->msix_entries[vector]; | |
1411 | ||
1412 | if (q_vector->tx.ring && q_vector->rx.ring) { | |
1413 | snprintf(q_vector->name, sizeof(q_vector->name) - 1, | |
1414 | "%s-%s-%d", netdev->name, "TxRx", ri++); | |
1415 | ti++; | |
1416 | } else if (q_vector->rx.ring) { | |
1417 | snprintf(q_vector->name, sizeof(q_vector->name) - 1, | |
1418 | "%s-%s-%d", netdev->name, "rx", ri++); | |
1419 | } else if (q_vector->tx.ring) { | |
1420 | snprintf(q_vector->name, sizeof(q_vector->name) - 1, | |
1421 | "%s-%s-%d", netdev->name, "tx", ti++); | |
92915f71 GR |
1422 | } else { |
1423 | /* skip this unused q_vector */ | |
1424 | continue; | |
1425 | } | |
fa71ae27 AD |
1426 | err = request_irq(entry->vector, &ixgbevf_msix_clean_rings, 0, |
1427 | q_vector->name, q_vector); | |
92915f71 GR |
1428 | if (err) { |
1429 | hw_dbg(&adapter->hw, | |
dec0d8e4 JK |
1430 | "request_irq failed for MSIX interrupt Error: %d\n", |
1431 | err); | |
92915f71 GR |
1432 | goto free_queue_irqs; |
1433 | } | |
1434 | } | |
1435 | ||
92915f71 | 1436 | err = request_irq(adapter->msix_entries[vector].vector, |
4b2cd27f | 1437 | &ixgbevf_msix_other, 0, netdev->name, adapter); |
92915f71 | 1438 | if (err) { |
dec0d8e4 JK |
1439 | hw_dbg(&adapter->hw, "request_irq for msix_other failed: %d\n", |
1440 | err); | |
92915f71 GR |
1441 | goto free_queue_irqs; |
1442 | } | |
1443 | ||
1444 | return 0; | |
1445 | ||
1446 | free_queue_irqs: | |
fa71ae27 AD |
1447 | while (vector) { |
1448 | vector--; | |
1449 | free_irq(adapter->msix_entries[vector].vector, | |
1450 | adapter->q_vector[vector]); | |
1451 | } | |
a1f6c6b1 | 1452 | /* This failure is non-recoverable - it indicates the system is |
1453 | * out of MSIX vector resources and the VF driver cannot run | |
1454 | * without them. Set the number of msix vectors to zero | |
1455 | * indicating that not enough can be allocated. The error | |
1456 | * will be returned to the user indicating device open failed. | |
1457 | * Any further attempts to force the driver to open will also | |
1458 | * fail. The only way to recover is to unload the driver and | |
1459 | * reload it again. If the system has recovered some MSIX | |
1460 | * vectors then it may succeed. | |
1461 | */ | |
1462 | adapter->num_msix_vectors = 0; | |
92915f71 GR |
1463 | return err; |
1464 | } | |
1465 | ||
1466 | static inline void ixgbevf_reset_q_vectors(struct ixgbevf_adapter *adapter) | |
1467 | { | |
1468 | int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; | |
1469 | ||
1470 | for (i = 0; i < q_vectors; i++) { | |
1471 | struct ixgbevf_q_vector *q_vector = adapter->q_vector[i]; | |
dec0d8e4 | 1472 | |
6b43c446 AD |
1473 | q_vector->rx.ring = NULL; |
1474 | q_vector->tx.ring = NULL; | |
1475 | q_vector->rx.count = 0; | |
1476 | q_vector->tx.count = 0; | |
92915f71 GR |
1477 | } |
1478 | } | |
1479 | ||
1480 | /** | |
1481 | * ixgbevf_request_irq - initialize interrupts | |
1482 | * @adapter: board private structure | |
1483 | * | |
1484 | * Attempts to configure interrupts using the best available | |
1485 | * capabilities of the hardware and kernel. | |
1486 | **/ | |
1487 | static int ixgbevf_request_irq(struct ixgbevf_adapter *adapter) | |
1488 | { | |
50985b5f | 1489 | int err = ixgbevf_request_msix_irqs(adapter); |
92915f71 GR |
1490 | |
1491 | if (err) | |
dec0d8e4 | 1492 | hw_dbg(&adapter->hw, "request_irq failed, Error %d\n", err); |
92915f71 GR |
1493 | |
1494 | return err; | |
1495 | } | |
1496 | ||
1497 | static void ixgbevf_free_irq(struct ixgbevf_adapter *adapter) | |
1498 | { | |
92915f71 GR |
1499 | int i, q_vectors; |
1500 | ||
eeffceee MR |
1501 | if (!adapter->msix_entries) |
1502 | return; | |
1503 | ||
92915f71 | 1504 | q_vectors = adapter->num_msix_vectors; |
92915f71 GR |
1505 | i = q_vectors - 1; |
1506 | ||
fa71ae27 | 1507 | free_irq(adapter->msix_entries[i].vector, adapter); |
92915f71 GR |
1508 | i--; |
1509 | ||
1510 | for (; i >= 0; i--) { | |
fa71ae27 AD |
1511 | /* free only the irqs that were actually requested */ |
1512 | if (!adapter->q_vector[i]->rx.ring && | |
1513 | !adapter->q_vector[i]->tx.ring) | |
1514 | continue; | |
1515 | ||
92915f71 GR |
1516 | free_irq(adapter->msix_entries[i].vector, |
1517 | adapter->q_vector[i]); | |
1518 | } | |
1519 | ||
1520 | ixgbevf_reset_q_vectors(adapter); | |
1521 | } | |
1522 | ||
1523 | /** | |
1524 | * ixgbevf_irq_disable - Mask off interrupt generation on the NIC | |
1525 | * @adapter: board private structure | |
1526 | **/ | |
1527 | static inline void ixgbevf_irq_disable(struct ixgbevf_adapter *adapter) | |
1528 | { | |
92915f71 | 1529 | struct ixgbe_hw *hw = &adapter->hw; |
5f3600eb | 1530 | int i; |
92915f71 | 1531 | |
5f3600eb | 1532 | IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, 0); |
92915f71 | 1533 | IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, ~0); |
5f3600eb | 1534 | IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, 0); |
92915f71 GR |
1535 | |
1536 | IXGBE_WRITE_FLUSH(hw); | |
1537 | ||
1538 | for (i = 0; i < adapter->num_msix_vectors; i++) | |
1539 | synchronize_irq(adapter->msix_entries[i].vector); | |
1540 | } | |
1541 | ||
1542 | /** | |
1543 | * ixgbevf_irq_enable - Enable default interrupt generation settings | |
1544 | * @adapter: board private structure | |
1545 | **/ | |
5f3600eb | 1546 | static inline void ixgbevf_irq_enable(struct ixgbevf_adapter *adapter) |
92915f71 GR |
1547 | { |
1548 | struct ixgbe_hw *hw = &adapter->hw; | |
92915f71 | 1549 | |
5f3600eb AD |
1550 | IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, adapter->eims_enable_mask); |
1551 | IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, adapter->eims_enable_mask); | |
1552 | IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_enable_mask); | |
92915f71 GR |
1553 | } |
1554 | ||
de02decb DS |
1555 | /** |
1556 | * ixgbevf_configure_tx_ring - Configure 82599 VF Tx ring after Reset | |
1557 | * @adapter: board private structure | |
1558 | * @ring: structure containing ring specific data | |
1559 | * | |
1560 | * Configure the Tx descriptor ring after a reset. | |
1561 | **/ | |
1562 | static void ixgbevf_configure_tx_ring(struct ixgbevf_adapter *adapter, | |
1563 | struct ixgbevf_ring *ring) | |
1564 | { | |
1565 | struct ixgbe_hw *hw = &adapter->hw; | |
1566 | u64 tdba = ring->dma; | |
1567 | int wait_loop = 10; | |
1568 | u32 txdctl = IXGBE_TXDCTL_ENABLE; | |
1569 | u8 reg_idx = ring->reg_idx; | |
1570 | ||
1571 | /* disable queue to avoid issues while updating state */ | |
1572 | IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH); | |
1573 | IXGBE_WRITE_FLUSH(hw); | |
1574 | ||
1575 | IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(reg_idx), tdba & DMA_BIT_MASK(32)); | |
1576 | IXGBE_WRITE_REG(hw, IXGBE_VFTDBAH(reg_idx), tdba >> 32); | |
1577 | IXGBE_WRITE_REG(hw, IXGBE_VFTDLEN(reg_idx), | |
1578 | ring->count * sizeof(union ixgbe_adv_tx_desc)); | |
1579 | ||
1580 | /* disable head writeback */ | |
1581 | IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(reg_idx), 0); | |
1582 | IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(reg_idx), 0); | |
1583 | ||
1584 | /* enable relaxed ordering */ | |
1585 | IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(reg_idx), | |
1586 | (IXGBE_DCA_TXCTRL_DESC_RRO_EN | | |
1587 | IXGBE_DCA_TXCTRL_DATA_RRO_EN)); | |
1588 | ||
1589 | /* reset head and tail pointers */ | |
1590 | IXGBE_WRITE_REG(hw, IXGBE_VFTDH(reg_idx), 0); | |
1591 | IXGBE_WRITE_REG(hw, IXGBE_VFTDT(reg_idx), 0); | |
dbf8b0d8 | 1592 | ring->tail = adapter->io_addr + IXGBE_VFTDT(reg_idx); |
de02decb DS |
1593 | |
1594 | /* reset ntu and ntc to place SW in sync with hardwdare */ | |
1595 | ring->next_to_clean = 0; | |
1596 | ring->next_to_use = 0; | |
1597 | ||
1598 | /* In order to avoid issues WTHRESH + PTHRESH should always be equal | |
1599 | * to or less than the number of on chip descriptors, which is | |
1600 | * currently 40. | |
1601 | */ | |
1602 | txdctl |= (8 << 16); /* WTHRESH = 8 */ | |
1603 | ||
1604 | /* Setting PTHRESH to 32 both improves performance */ | |
8d055cc0 JK |
1605 | txdctl |= (1u << 8) | /* HTHRESH = 1 */ |
1606 | 32; /* PTHRESH = 32 */ | |
de02decb | 1607 | |
e08400b7 ET |
1608 | clear_bit(__IXGBEVF_HANG_CHECK_ARMED, &ring->state); |
1609 | ||
de02decb DS |
1610 | IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), txdctl); |
1611 | ||
1612 | /* poll to verify queue is enabled */ | |
1613 | do { | |
1614 | usleep_range(1000, 2000); | |
1615 | txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(reg_idx)); | |
1616 | } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE)); | |
1617 | if (!wait_loop) | |
ee95053f | 1618 | hw_dbg(hw, "Could not enable Tx Queue %d\n", reg_idx); |
de02decb DS |
1619 | } |
1620 | ||
92915f71 GR |
1621 | /** |
1622 | * ixgbevf_configure_tx - Configure 82599 VF Transmit Unit after Reset | |
1623 | * @adapter: board private structure | |
1624 | * | |
1625 | * Configure the Tx unit of the MAC after a reset. | |
1626 | **/ | |
1627 | static void ixgbevf_configure_tx(struct ixgbevf_adapter *adapter) | |
1628 | { | |
de02decb | 1629 | u32 i; |
92915f71 GR |
1630 | |
1631 | /* Setup the HW Tx Head and Tail descriptor pointers */ | |
de02decb DS |
1632 | for (i = 0; i < adapter->num_tx_queues; i++) |
1633 | ixgbevf_configure_tx_ring(adapter, adapter->tx_ring[i]); | |
92915f71 GR |
1634 | } |
1635 | ||
1636 | #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2 | |
1637 | ||
1638 | static void ixgbevf_configure_srrctl(struct ixgbevf_adapter *adapter, int index) | |
1639 | { | |
92915f71 GR |
1640 | struct ixgbe_hw *hw = &adapter->hw; |
1641 | u32 srrctl; | |
1642 | ||
92915f71 GR |
1643 | srrctl = IXGBE_SRRCTL_DROP_EN; |
1644 | ||
bad17234 ET |
1645 | srrctl |= IXGBEVF_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT; |
1646 | srrctl |= IXGBEVF_RX_BUFSZ >> IXGBE_SRRCTL_BSIZEPKT_SHIFT; | |
77d5dfca | 1647 | srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF; |
92915f71 | 1648 | |
92915f71 GR |
1649 | IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(index), srrctl); |
1650 | } | |
1651 | ||
1bb9c639 DS |
1652 | static void ixgbevf_setup_psrtype(struct ixgbevf_adapter *adapter) |
1653 | { | |
1654 | struct ixgbe_hw *hw = &adapter->hw; | |
1655 | ||
1656 | /* PSRTYPE must be initialized in 82599 */ | |
1657 | u32 psrtype = IXGBE_PSRTYPE_TCPHDR | IXGBE_PSRTYPE_UDPHDR | | |
1658 | IXGBE_PSRTYPE_IPV4HDR | IXGBE_PSRTYPE_IPV6HDR | | |
1659 | IXGBE_PSRTYPE_L2HDR; | |
1660 | ||
1661 | if (adapter->num_rx_queues > 1) | |
8d055cc0 | 1662 | psrtype |= BIT(29); |
1bb9c639 DS |
1663 | |
1664 | IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, psrtype); | |
1665 | } | |
1666 | ||
de02decb DS |
1667 | #define IXGBEVF_MAX_RX_DESC_POLL 10 |
1668 | static void ixgbevf_disable_rx_queue(struct ixgbevf_adapter *adapter, | |
1669 | struct ixgbevf_ring *ring) | |
1670 | { | |
1671 | struct ixgbe_hw *hw = &adapter->hw; | |
1672 | int wait_loop = IXGBEVF_MAX_RX_DESC_POLL; | |
1673 | u32 rxdctl; | |
1674 | u8 reg_idx = ring->reg_idx; | |
1675 | ||
26597802 MR |
1676 | if (IXGBE_REMOVED(hw->hw_addr)) |
1677 | return; | |
de02decb DS |
1678 | rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx)); |
1679 | rxdctl &= ~IXGBE_RXDCTL_ENABLE; | |
1680 | ||
1681 | /* write value back with RXDCTL.ENABLE bit cleared */ | |
1682 | IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(reg_idx), rxdctl); | |
1683 | ||
dec0d8e4 | 1684 | /* the hardware may take up to 100us to really disable the Rx queue */ |
de02decb DS |
1685 | do { |
1686 | udelay(10); | |
1687 | rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx)); | |
1688 | } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE)); | |
1689 | ||
1690 | if (!wait_loop) | |
1691 | pr_err("RXDCTL.ENABLE queue %d not cleared while polling\n", | |
1692 | reg_idx); | |
1693 | } | |
1694 | ||
1695 | static void ixgbevf_rx_desc_queue_enable(struct ixgbevf_adapter *adapter, | |
1696 | struct ixgbevf_ring *ring) | |
1697 | { | |
1698 | struct ixgbe_hw *hw = &adapter->hw; | |
1699 | int wait_loop = IXGBEVF_MAX_RX_DESC_POLL; | |
1700 | u32 rxdctl; | |
1701 | u8 reg_idx = ring->reg_idx; | |
1702 | ||
26597802 MR |
1703 | if (IXGBE_REMOVED(hw->hw_addr)) |
1704 | return; | |
de02decb DS |
1705 | do { |
1706 | usleep_range(1000, 2000); | |
1707 | rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx)); | |
1708 | } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE)); | |
1709 | ||
1710 | if (!wait_loop) | |
1711 | pr_err("RXDCTL.ENABLE queue %d not set while polling\n", | |
1712 | reg_idx); | |
1713 | } | |
1714 | ||
9295edb4 ET |
1715 | static void ixgbevf_setup_vfmrqc(struct ixgbevf_adapter *adapter) |
1716 | { | |
1717 | struct ixgbe_hw *hw = &adapter->hw; | |
1718 | u32 vfmrqc = 0, vfreta = 0; | |
9295edb4 | 1719 | u16 rss_i = adapter->num_rx_queues; |
9cba434f | 1720 | u8 i, j; |
9295edb4 ET |
1721 | |
1722 | /* Fill out hash function seeds */ | |
9cba434f ET |
1723 | netdev_rss_key_fill(adapter->rss_key, sizeof(adapter->rss_key)); |
1724 | for (i = 0; i < IXGBEVF_VFRSSRK_REGS; i++) | |
1725 | IXGBE_WRITE_REG(hw, IXGBE_VFRSSRK(i), adapter->rss_key[i]); | |
9295edb4 | 1726 | |
9cba434f | 1727 | for (i = 0, j = 0; i < IXGBEVF_X550_VFRETA_SIZE; i++, j++) { |
9295edb4 ET |
1728 | if (j == rss_i) |
1729 | j = 0; | |
9cba434f ET |
1730 | |
1731 | adapter->rss_indir_tbl[i] = j; | |
1732 | ||
1733 | vfreta |= j << (i & 0x3) * 8; | |
1734 | if ((i & 3) == 3) { | |
9295edb4 | 1735 | IXGBE_WRITE_REG(hw, IXGBE_VFRETA(i >> 2), vfreta); |
9cba434f ET |
1736 | vfreta = 0; |
1737 | } | |
9295edb4 ET |
1738 | } |
1739 | ||
1740 | /* Perform hash on these packet types */ | |
1741 | vfmrqc |= IXGBE_VFMRQC_RSS_FIELD_IPV4 | | |
1742 | IXGBE_VFMRQC_RSS_FIELD_IPV4_TCP | | |
1743 | IXGBE_VFMRQC_RSS_FIELD_IPV6 | | |
1744 | IXGBE_VFMRQC_RSS_FIELD_IPV6_TCP; | |
1745 | ||
1746 | vfmrqc |= IXGBE_VFMRQC_RSSEN; | |
1747 | ||
1748 | IXGBE_WRITE_REG(hw, IXGBE_VFMRQC, vfmrqc); | |
1749 | } | |
1750 | ||
de02decb DS |
1751 | static void ixgbevf_configure_rx_ring(struct ixgbevf_adapter *adapter, |
1752 | struct ixgbevf_ring *ring) | |
1753 | { | |
1754 | struct ixgbe_hw *hw = &adapter->hw; | |
1755 | u64 rdba = ring->dma; | |
1756 | u32 rxdctl; | |
1757 | u8 reg_idx = ring->reg_idx; | |
1758 | ||
1759 | /* disable queue to avoid issues while updating state */ | |
1760 | rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx)); | |
1761 | ixgbevf_disable_rx_queue(adapter, ring); | |
1762 | ||
1763 | IXGBE_WRITE_REG(hw, IXGBE_VFRDBAL(reg_idx), rdba & DMA_BIT_MASK(32)); | |
1764 | IXGBE_WRITE_REG(hw, IXGBE_VFRDBAH(reg_idx), rdba >> 32); | |
1765 | IXGBE_WRITE_REG(hw, IXGBE_VFRDLEN(reg_idx), | |
1766 | ring->count * sizeof(union ixgbe_adv_rx_desc)); | |
1767 | ||
33b0eb15 | 1768 | #ifndef CONFIG_SPARC |
de02decb DS |
1769 | /* enable relaxed ordering */ |
1770 | IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(reg_idx), | |
1771 | IXGBE_DCA_RXCTRL_DESC_RRO_EN); | |
33b0eb15 BM |
1772 | #else |
1773 | IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(reg_idx), | |
1774 | IXGBE_DCA_RXCTRL_DESC_RRO_EN | | |
1775 | IXGBE_DCA_RXCTRL_DATA_WRO_EN); | |
1776 | #endif | |
de02decb DS |
1777 | |
1778 | /* reset head and tail pointers */ | |
1779 | IXGBE_WRITE_REG(hw, IXGBE_VFRDH(reg_idx), 0); | |
1780 | IXGBE_WRITE_REG(hw, IXGBE_VFRDT(reg_idx), 0); | |
dbf8b0d8 | 1781 | ring->tail = adapter->io_addr + IXGBE_VFRDT(reg_idx); |
de02decb DS |
1782 | |
1783 | /* reset ntu and ntc to place SW in sync with hardwdare */ | |
1784 | ring->next_to_clean = 0; | |
1785 | ring->next_to_use = 0; | |
bad17234 | 1786 | ring->next_to_alloc = 0; |
de02decb DS |
1787 | |
1788 | ixgbevf_configure_srrctl(adapter, reg_idx); | |
1789 | ||
bad17234 ET |
1790 | /* allow any size packet since we can handle overflow */ |
1791 | rxdctl &= ~IXGBE_RXDCTL_RLPML_EN; | |
1792 | ||
de02decb DS |
1793 | rxdctl |= IXGBE_RXDCTL_ENABLE | IXGBE_RXDCTL_VME; |
1794 | IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(reg_idx), rxdctl); | |
1795 | ||
1796 | ixgbevf_rx_desc_queue_enable(adapter, ring); | |
095e2617 | 1797 | ixgbevf_alloc_rx_buffers(ring, ixgbevf_desc_unused(ring)); |
de02decb DS |
1798 | } |
1799 | ||
92915f71 GR |
1800 | /** |
1801 | * ixgbevf_configure_rx - Configure 82599 VF Receive Unit after Reset | |
1802 | * @adapter: board private structure | |
1803 | * | |
1804 | * Configure the Rx unit of the MAC after a reset. | |
1805 | **/ | |
1806 | static void ixgbevf_configure_rx(struct ixgbevf_adapter *adapter) | |
1807 | { | |
bad17234 ET |
1808 | struct ixgbe_hw *hw = &adapter->hw; |
1809 | struct net_device *netdev = adapter->netdev; | |
6a11e52b | 1810 | int i, ret; |
92915f71 | 1811 | |
1bb9c639 | 1812 | ixgbevf_setup_psrtype(adapter); |
9295edb4 ET |
1813 | if (hw->mac.type >= ixgbe_mac_X550_vf) |
1814 | ixgbevf_setup_vfmrqc(adapter); | |
dd1fe113 | 1815 | |
14b22cd9 | 1816 | spin_lock_bh(&adapter->mbx_lock); |
bad17234 | 1817 | /* notify the PF of our intent to use this size of frame */ |
6a11e52b | 1818 | ret = hw->mac.ops.set_rlpml(hw, netdev->mtu + ETH_HLEN + ETH_FCS_LEN); |
14b22cd9 | 1819 | spin_unlock_bh(&adapter->mbx_lock); |
6a11e52b TN |
1820 | if (ret) |
1821 | dev_err(&adapter->pdev->dev, | |
1822 | "Failed to set MTU at %d\n", netdev->mtu); | |
92915f71 | 1823 | |
92915f71 | 1824 | /* Setup the HW Rx Head and Tail Descriptor Pointers and |
dec0d8e4 JK |
1825 | * the Base and Length of the Rx Descriptor Ring |
1826 | */ | |
de02decb DS |
1827 | for (i = 0; i < adapter->num_rx_queues; i++) |
1828 | ixgbevf_configure_rx_ring(adapter, adapter->rx_ring[i]); | |
92915f71 GR |
1829 | } |
1830 | ||
80d5c368 PM |
1831 | static int ixgbevf_vlan_rx_add_vid(struct net_device *netdev, |
1832 | __be16 proto, u16 vid) | |
92915f71 GR |
1833 | { |
1834 | struct ixgbevf_adapter *adapter = netdev_priv(netdev); | |
1835 | struct ixgbe_hw *hw = &adapter->hw; | |
2ddc7fe1 AD |
1836 | int err; |
1837 | ||
55fdd45b | 1838 | spin_lock_bh(&adapter->mbx_lock); |
1c55ed76 | 1839 | |
92915f71 | 1840 | /* add VID to filter table */ |
2ddc7fe1 | 1841 | err = hw->mac.ops.set_vfta(hw, vid, 0, true); |
1c55ed76 | 1842 | |
55fdd45b | 1843 | spin_unlock_bh(&adapter->mbx_lock); |
1c55ed76 | 1844 | |
2ddc7fe1 AD |
1845 | /* translate error return types so error makes sense */ |
1846 | if (err == IXGBE_ERR_MBX) | |
1847 | return -EIO; | |
1848 | ||
1849 | if (err == IXGBE_ERR_INVALID_ARGUMENT) | |
1850 | return -EACCES; | |
1851 | ||
dadcd65f | 1852 | set_bit(vid, adapter->active_vlans); |
8e586137 | 1853 | |
2ddc7fe1 | 1854 | return err; |
92915f71 GR |
1855 | } |
1856 | ||
80d5c368 PM |
1857 | static int ixgbevf_vlan_rx_kill_vid(struct net_device *netdev, |
1858 | __be16 proto, u16 vid) | |
92915f71 GR |
1859 | { |
1860 | struct ixgbevf_adapter *adapter = netdev_priv(netdev); | |
1861 | struct ixgbe_hw *hw = &adapter->hw; | |
50985b5f | 1862 | int err; |
92915f71 | 1863 | |
55fdd45b | 1864 | spin_lock_bh(&adapter->mbx_lock); |
1c55ed76 | 1865 | |
92915f71 | 1866 | /* remove VID from filter table */ |
92fe0bf7 | 1867 | err = hw->mac.ops.set_vfta(hw, vid, 0, false); |
1c55ed76 | 1868 | |
55fdd45b | 1869 | spin_unlock_bh(&adapter->mbx_lock); |
1c55ed76 | 1870 | |
dadcd65f | 1871 | clear_bit(vid, adapter->active_vlans); |
8e586137 | 1872 | |
2ddc7fe1 | 1873 | return err; |
92915f71 GR |
1874 | } |
1875 | ||
1876 | static void ixgbevf_restore_vlan(struct ixgbevf_adapter *adapter) | |
1877 | { | |
dadcd65f | 1878 | u16 vid; |
92915f71 | 1879 | |
dadcd65f | 1880 | for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID) |
80d5c368 PM |
1881 | ixgbevf_vlan_rx_add_vid(adapter->netdev, |
1882 | htons(ETH_P_8021Q), vid); | |
92915f71 GR |
1883 | } |
1884 | ||
46ec20ff GR |
1885 | static int ixgbevf_write_uc_addr_list(struct net_device *netdev) |
1886 | { | |
1887 | struct ixgbevf_adapter *adapter = netdev_priv(netdev); | |
1888 | struct ixgbe_hw *hw = &adapter->hw; | |
1889 | int count = 0; | |
1890 | ||
1891 | if ((netdev_uc_count(netdev)) > 10) { | |
dbd9636e | 1892 | pr_err("Too many unicast filters - No Space\n"); |
46ec20ff GR |
1893 | return -ENOSPC; |
1894 | } | |
1895 | ||
1896 | if (!netdev_uc_empty(netdev)) { | |
1897 | struct netdev_hw_addr *ha; | |
dec0d8e4 | 1898 | |
46ec20ff GR |
1899 | netdev_for_each_uc_addr(ha, netdev) { |
1900 | hw->mac.ops.set_uc_addr(hw, ++count, ha->addr); | |
1901 | udelay(200); | |
1902 | } | |
1903 | } else { | |
dec0d8e4 JK |
1904 | /* If the list is empty then send message to PF driver to |
1905 | * clear all MAC VLANs on this VF. | |
46ec20ff GR |
1906 | */ |
1907 | hw->mac.ops.set_uc_addr(hw, 0, NULL); | |
1908 | } | |
1909 | ||
1910 | return count; | |
1911 | } | |
1912 | ||
92915f71 | 1913 | /** |
dee847f5 | 1914 | * ixgbevf_set_rx_mode - Multicast and unicast set |
92915f71 GR |
1915 | * @netdev: network interface device structure |
1916 | * | |
1917 | * The set_rx_method entry point is called whenever the multicast address | |
dee847f5 GR |
1918 | * list, unicast address list or the network interface flags are updated. |
1919 | * This routine is responsible for configuring the hardware for proper | |
1920 | * multicast mode and configuring requested unicast filters. | |
92915f71 GR |
1921 | **/ |
1922 | static void ixgbevf_set_rx_mode(struct net_device *netdev) | |
1923 | { | |
1924 | struct ixgbevf_adapter *adapter = netdev_priv(netdev); | |
1925 | struct ixgbe_hw *hw = &adapter->hw; | |
8443c1a4 HS |
1926 | unsigned int flags = netdev->flags; |
1927 | int xcast_mode; | |
1928 | ||
1929 | xcast_mode = (flags & IFF_ALLMULTI) ? IXGBEVF_XCAST_MODE_ALLMULTI : | |
1930 | (flags & (IFF_BROADCAST | IFF_MULTICAST)) ? | |
1931 | IXGBEVF_XCAST_MODE_MULTI : IXGBEVF_XCAST_MODE_NONE; | |
92915f71 | 1932 | |
55fdd45b | 1933 | spin_lock_bh(&adapter->mbx_lock); |
1c55ed76 | 1934 | |
8b44a8a0 | 1935 | hw->mac.ops.update_xcast_mode(hw, xcast_mode); |
8443c1a4 | 1936 | |
92915f71 | 1937 | /* reprogram multicast list */ |
92fe0bf7 | 1938 | hw->mac.ops.update_mc_addr_list(hw, netdev); |
46ec20ff GR |
1939 | |
1940 | ixgbevf_write_uc_addr_list(netdev); | |
1c55ed76 | 1941 | |
55fdd45b | 1942 | spin_unlock_bh(&adapter->mbx_lock); |
92915f71 GR |
1943 | } |
1944 | ||
1945 | static void ixgbevf_napi_enable_all(struct ixgbevf_adapter *adapter) | |
1946 | { | |
1947 | int q_idx; | |
1948 | struct ixgbevf_q_vector *q_vector; | |
1949 | int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; | |
1950 | ||
1951 | for (q_idx = 0; q_idx < q_vectors; q_idx++) { | |
92915f71 | 1952 | q_vector = adapter->q_vector[q_idx]; |
c777cdfa JK |
1953 | #ifdef CONFIG_NET_RX_BUSY_POLL |
1954 | ixgbevf_qv_init_lock(adapter->q_vector[q_idx]); | |
1955 | #endif | |
fa71ae27 | 1956 | napi_enable(&q_vector->napi); |
92915f71 GR |
1957 | } |
1958 | } | |
1959 | ||
1960 | static void ixgbevf_napi_disable_all(struct ixgbevf_adapter *adapter) | |
1961 | { | |
1962 | int q_idx; | |
1963 | struct ixgbevf_q_vector *q_vector; | |
1964 | int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; | |
1965 | ||
1966 | for (q_idx = 0; q_idx < q_vectors; q_idx++) { | |
1967 | q_vector = adapter->q_vector[q_idx]; | |
92915f71 | 1968 | napi_disable(&q_vector->napi); |
c777cdfa JK |
1969 | #ifdef CONFIG_NET_RX_BUSY_POLL |
1970 | while (!ixgbevf_qv_disable(adapter->q_vector[q_idx])) { | |
1971 | pr_info("QV %d locked\n", q_idx); | |
1972 | usleep_range(1000, 20000); | |
1973 | } | |
1974 | #endif /* CONFIG_NET_RX_BUSY_POLL */ | |
92915f71 GR |
1975 | } |
1976 | } | |
1977 | ||
220fe050 DS |
1978 | static int ixgbevf_configure_dcb(struct ixgbevf_adapter *adapter) |
1979 | { | |
1980 | struct ixgbe_hw *hw = &adapter->hw; | |
1981 | unsigned int def_q = 0; | |
1982 | unsigned int num_tcs = 0; | |
2dc571aa ET |
1983 | unsigned int num_rx_queues = adapter->num_rx_queues; |
1984 | unsigned int num_tx_queues = adapter->num_tx_queues; | |
220fe050 DS |
1985 | int err; |
1986 | ||
1987 | spin_lock_bh(&adapter->mbx_lock); | |
1988 | ||
1989 | /* fetch queue configuration from the PF */ | |
1990 | err = ixgbevf_get_queues(hw, &num_tcs, &def_q); | |
1991 | ||
1992 | spin_unlock_bh(&adapter->mbx_lock); | |
1993 | ||
1994 | if (err) | |
1995 | return err; | |
1996 | ||
1997 | if (num_tcs > 1) { | |
2dc571aa ET |
1998 | /* we need only one Tx queue */ |
1999 | num_tx_queues = 1; | |
2000 | ||
220fe050 | 2001 | /* update default Tx ring register index */ |
87e70ab9 | 2002 | adapter->tx_ring[0]->reg_idx = def_q; |
220fe050 DS |
2003 | |
2004 | /* we need as many queues as traffic classes */ | |
2005 | num_rx_queues = num_tcs; | |
2006 | } | |
2007 | ||
2008 | /* if we have a bad config abort request queue reset */ | |
2dc571aa ET |
2009 | if ((adapter->num_rx_queues != num_rx_queues) || |
2010 | (adapter->num_tx_queues != num_tx_queues)) { | |
220fe050 DS |
2011 | /* force mailbox timeout to prevent further messages */ |
2012 | hw->mbx.timeout = 0; | |
2013 | ||
2014 | /* wait for watchdog to come around and bail us out */ | |
d5dd7c3f | 2015 | set_bit(__IXGBEVF_QUEUE_RESET_REQUESTED, &adapter->state); |
220fe050 DS |
2016 | } |
2017 | ||
2018 | return 0; | |
2019 | } | |
2020 | ||
92915f71 GR |
2021 | static void ixgbevf_configure(struct ixgbevf_adapter *adapter) |
2022 | { | |
220fe050 DS |
2023 | ixgbevf_configure_dcb(adapter); |
2024 | ||
de02decb | 2025 | ixgbevf_set_rx_mode(adapter->netdev); |
92915f71 GR |
2026 | |
2027 | ixgbevf_restore_vlan(adapter); | |
2028 | ||
2029 | ixgbevf_configure_tx(adapter); | |
2030 | ixgbevf_configure_rx(adapter); | |
92915f71 GR |
2031 | } |
2032 | ||
33bd9f60 GR |
2033 | static void ixgbevf_save_reset_stats(struct ixgbevf_adapter *adapter) |
2034 | { | |
2035 | /* Only save pre-reset stats if there are some */ | |
2036 | if (adapter->stats.vfgprc || adapter->stats.vfgptc) { | |
2037 | adapter->stats.saved_reset_vfgprc += adapter->stats.vfgprc - | |
2038 | adapter->stats.base_vfgprc; | |
2039 | adapter->stats.saved_reset_vfgptc += adapter->stats.vfgptc - | |
2040 | adapter->stats.base_vfgptc; | |
2041 | adapter->stats.saved_reset_vfgorc += adapter->stats.vfgorc - | |
2042 | adapter->stats.base_vfgorc; | |
2043 | adapter->stats.saved_reset_vfgotc += adapter->stats.vfgotc - | |
2044 | adapter->stats.base_vfgotc; | |
2045 | adapter->stats.saved_reset_vfmprc += adapter->stats.vfmprc - | |
2046 | adapter->stats.base_vfmprc; | |
2047 | } | |
2048 | } | |
2049 | ||
2050 | static void ixgbevf_init_last_counter_stats(struct ixgbevf_adapter *adapter) | |
2051 | { | |
2052 | struct ixgbe_hw *hw = &adapter->hw; | |
2053 | ||
2054 | adapter->stats.last_vfgprc = IXGBE_READ_REG(hw, IXGBE_VFGPRC); | |
2055 | adapter->stats.last_vfgorc = IXGBE_READ_REG(hw, IXGBE_VFGORC_LSB); | |
2056 | adapter->stats.last_vfgorc |= | |
2057 | (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGORC_MSB))) << 32); | |
2058 | adapter->stats.last_vfgptc = IXGBE_READ_REG(hw, IXGBE_VFGPTC); | |
2059 | adapter->stats.last_vfgotc = IXGBE_READ_REG(hw, IXGBE_VFGOTC_LSB); | |
2060 | adapter->stats.last_vfgotc |= | |
2061 | (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGOTC_MSB))) << 32); | |
2062 | adapter->stats.last_vfmprc = IXGBE_READ_REG(hw, IXGBE_VFMPRC); | |
2063 | ||
2064 | adapter->stats.base_vfgprc = adapter->stats.last_vfgprc; | |
2065 | adapter->stats.base_vfgorc = adapter->stats.last_vfgorc; | |
2066 | adapter->stats.base_vfgptc = adapter->stats.last_vfgptc; | |
2067 | adapter->stats.base_vfgotc = adapter->stats.last_vfgotc; | |
2068 | adapter->stats.base_vfmprc = adapter->stats.last_vfmprc; | |
2069 | } | |
2070 | ||
31186785 AD |
2071 | static void ixgbevf_negotiate_api(struct ixgbevf_adapter *adapter) |
2072 | { | |
2073 | struct ixgbe_hw *hw = &adapter->hw; | |
94cf66f8 VZ |
2074 | int api[] = { ixgbe_mbox_api_12, |
2075 | ixgbe_mbox_api_11, | |
56e94095 | 2076 | ixgbe_mbox_api_10, |
31186785 | 2077 | ixgbe_mbox_api_unknown }; |
50985b5f | 2078 | int err, idx = 0; |
31186785 | 2079 | |
55fdd45b | 2080 | spin_lock_bh(&adapter->mbx_lock); |
31186785 AD |
2081 | |
2082 | while (api[idx] != ixgbe_mbox_api_unknown) { | |
2f8214fe | 2083 | err = hw->mac.ops.negotiate_api_version(hw, api[idx]); |
31186785 AD |
2084 | if (!err) |
2085 | break; | |
2086 | idx++; | |
2087 | } | |
2088 | ||
55fdd45b | 2089 | spin_unlock_bh(&adapter->mbx_lock); |
31186785 AD |
2090 | } |
2091 | ||
795180d8 | 2092 | static void ixgbevf_up_complete(struct ixgbevf_adapter *adapter) |
92915f71 GR |
2093 | { |
2094 | struct net_device *netdev = adapter->netdev; | |
2095 | struct ixgbe_hw *hw = &adapter->hw; | |
92915f71 GR |
2096 | |
2097 | ixgbevf_configure_msix(adapter); | |
2098 | ||
55fdd45b | 2099 | spin_lock_bh(&adapter->mbx_lock); |
1c55ed76 | 2100 | |
92fe0bf7 GR |
2101 | if (is_valid_ether_addr(hw->mac.addr)) |
2102 | hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0); | |
2103 | else | |
2104 | hw->mac.ops.set_rar(hw, 0, hw->mac.perm_addr, 0); | |
92915f71 | 2105 | |
55fdd45b | 2106 | spin_unlock_bh(&adapter->mbx_lock); |
1c55ed76 | 2107 | |
4e857c58 | 2108 | smp_mb__before_atomic(); |
92915f71 GR |
2109 | clear_bit(__IXGBEVF_DOWN, &adapter->state); |
2110 | ixgbevf_napi_enable_all(adapter); | |
2111 | ||
d9bdb57f ET |
2112 | /* clear any pending interrupts, may auto mask */ |
2113 | IXGBE_READ_REG(hw, IXGBE_VTEICR); | |
2114 | ixgbevf_irq_enable(adapter); | |
2115 | ||
92915f71 GR |
2116 | /* enable transmits */ |
2117 | netif_tx_start_all_queues(netdev); | |
2118 | ||
33bd9f60 GR |
2119 | ixgbevf_save_reset_stats(adapter); |
2120 | ixgbevf_init_last_counter_stats(adapter); | |
2121 | ||
4b2cd27f | 2122 | hw->mac.get_link_status = 1; |
9ac5c5cc | 2123 | mod_timer(&adapter->service_timer, jiffies); |
92915f71 GR |
2124 | } |
2125 | ||
795180d8 | 2126 | void ixgbevf_up(struct ixgbevf_adapter *adapter) |
92915f71 | 2127 | { |
92915f71 GR |
2128 | ixgbevf_configure(adapter); |
2129 | ||
795180d8 | 2130 | ixgbevf_up_complete(adapter); |
92915f71 GR |
2131 | } |
2132 | ||
2133 | /** | |
2134 | * ixgbevf_clean_rx_ring - Free Rx Buffers per Queue | |
92915f71 GR |
2135 | * @rx_ring: ring to free buffers from |
2136 | **/ | |
05d063aa | 2137 | static void ixgbevf_clean_rx_ring(struct ixgbevf_ring *rx_ring) |
92915f71 | 2138 | { |
bad17234 | 2139 | struct device *dev = rx_ring->dev; |
92915f71 GR |
2140 | unsigned long size; |
2141 | unsigned int i; | |
2142 | ||
bad17234 ET |
2143 | /* Free Rx ring sk_buff */ |
2144 | if (rx_ring->skb) { | |
2145 | dev_kfree_skb(rx_ring->skb); | |
2146 | rx_ring->skb = NULL; | |
2147 | } | |
2148 | ||
2149 | /* ring already cleared, nothing to do */ | |
c0456c23 GR |
2150 | if (!rx_ring->rx_buffer_info) |
2151 | return; | |
92915f71 | 2152 | |
bad17234 | 2153 | /* Free all the Rx ring pages */ |
92915f71 | 2154 | for (i = 0; i < rx_ring->count; i++) { |
bad17234 | 2155 | struct ixgbevf_rx_buffer *rx_buffer; |
92915f71 | 2156 | |
bad17234 ET |
2157 | rx_buffer = &rx_ring->rx_buffer_info[i]; |
2158 | if (rx_buffer->dma) | |
2159 | dma_unmap_page(dev, rx_buffer->dma, | |
2160 | PAGE_SIZE, DMA_FROM_DEVICE); | |
2161 | rx_buffer->dma = 0; | |
2162 | if (rx_buffer->page) | |
2163 | __free_page(rx_buffer->page); | |
2164 | rx_buffer->page = NULL; | |
92915f71 GR |
2165 | } |
2166 | ||
2167 | size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count; | |
2168 | memset(rx_ring->rx_buffer_info, 0, size); | |
2169 | ||
2170 | /* Zero out the descriptor ring */ | |
2171 | memset(rx_ring->desc, 0, rx_ring->size); | |
92915f71 GR |
2172 | } |
2173 | ||
2174 | /** | |
2175 | * ixgbevf_clean_tx_ring - Free Tx Buffers | |
92915f71 GR |
2176 | * @tx_ring: ring to be cleaned |
2177 | **/ | |
05d063aa | 2178 | static void ixgbevf_clean_tx_ring(struct ixgbevf_ring *tx_ring) |
92915f71 GR |
2179 | { |
2180 | struct ixgbevf_tx_buffer *tx_buffer_info; | |
2181 | unsigned long size; | |
2182 | unsigned int i; | |
2183 | ||
c0456c23 GR |
2184 | if (!tx_ring->tx_buffer_info) |
2185 | return; | |
2186 | ||
92915f71 | 2187 | /* Free all the Tx ring sk_buffs */ |
92915f71 GR |
2188 | for (i = 0; i < tx_ring->count; i++) { |
2189 | tx_buffer_info = &tx_ring->tx_buffer_info[i]; | |
70a10e25 | 2190 | ixgbevf_unmap_and_free_tx_resource(tx_ring, tx_buffer_info); |
92915f71 GR |
2191 | } |
2192 | ||
2193 | size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count; | |
2194 | memset(tx_ring->tx_buffer_info, 0, size); | |
2195 | ||
2196 | memset(tx_ring->desc, 0, tx_ring->size); | |
92915f71 GR |
2197 | } |
2198 | ||
2199 | /** | |
2200 | * ixgbevf_clean_all_rx_rings - Free Rx Buffers for all queues | |
2201 | * @adapter: board private structure | |
2202 | **/ | |
2203 | static void ixgbevf_clean_all_rx_rings(struct ixgbevf_adapter *adapter) | |
2204 | { | |
2205 | int i; | |
2206 | ||
2207 | for (i = 0; i < adapter->num_rx_queues; i++) | |
05d063aa | 2208 | ixgbevf_clean_rx_ring(adapter->rx_ring[i]); |
92915f71 GR |
2209 | } |
2210 | ||
2211 | /** | |
2212 | * ixgbevf_clean_all_tx_rings - Free Tx Buffers for all queues | |
2213 | * @adapter: board private structure | |
2214 | **/ | |
2215 | static void ixgbevf_clean_all_tx_rings(struct ixgbevf_adapter *adapter) | |
2216 | { | |
2217 | int i; | |
2218 | ||
2219 | for (i = 0; i < adapter->num_tx_queues; i++) | |
05d063aa | 2220 | ixgbevf_clean_tx_ring(adapter->tx_ring[i]); |
92915f71 GR |
2221 | } |
2222 | ||
2223 | void ixgbevf_down(struct ixgbevf_adapter *adapter) | |
2224 | { | |
2225 | struct net_device *netdev = adapter->netdev; | |
2226 | struct ixgbe_hw *hw = &adapter->hw; | |
de02decb | 2227 | int i; |
92915f71 GR |
2228 | |
2229 | /* signal that we are down to the interrupt handler */ | |
5b346dc9 MR |
2230 | if (test_and_set_bit(__IXGBEVF_DOWN, &adapter->state)) |
2231 | return; /* do nothing if already down */ | |
858c3dda | 2232 | |
dec0d8e4 | 2233 | /* disable all enabled Rx queues */ |
858c3dda | 2234 | for (i = 0; i < adapter->num_rx_queues; i++) |
87e70ab9 | 2235 | ixgbevf_disable_rx_queue(adapter, adapter->rx_ring[i]); |
92915f71 | 2236 | |
d9bdb57f | 2237 | usleep_range(10000, 20000); |
92915f71 GR |
2238 | |
2239 | netif_tx_stop_all_queues(netdev); | |
2240 | ||
d9bdb57f ET |
2241 | /* call carrier off first to avoid false dev_watchdog timeouts */ |
2242 | netif_carrier_off(netdev); | |
2243 | netif_tx_disable(netdev); | |
2244 | ||
92915f71 GR |
2245 | ixgbevf_irq_disable(adapter); |
2246 | ||
2247 | ixgbevf_napi_disable_all(adapter); | |
2248 | ||
9ac5c5cc | 2249 | del_timer_sync(&adapter->service_timer); |
92915f71 GR |
2250 | |
2251 | /* disable transmits in the hardware now that interrupts are off */ | |
2252 | for (i = 0; i < adapter->num_tx_queues; i++) { | |
de02decb DS |
2253 | u8 reg_idx = adapter->tx_ring[i]->reg_idx; |
2254 | ||
2255 | IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), | |
2256 | IXGBE_TXDCTL_SWFLSH); | |
92915f71 GR |
2257 | } |
2258 | ||
92915f71 GR |
2259 | if (!pci_channel_offline(adapter->pdev)) |
2260 | ixgbevf_reset(adapter); | |
2261 | ||
2262 | ixgbevf_clean_all_tx_rings(adapter); | |
2263 | ixgbevf_clean_all_rx_rings(adapter); | |
2264 | } | |
2265 | ||
2266 | void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter) | |
2267 | { | |
2268 | WARN_ON(in_interrupt()); | |
c0456c23 | 2269 | |
92915f71 GR |
2270 | while (test_and_set_bit(__IXGBEVF_RESETTING, &adapter->state)) |
2271 | msleep(1); | |
2272 | ||
4b2cd27f AD |
2273 | ixgbevf_down(adapter); |
2274 | ixgbevf_up(adapter); | |
92915f71 GR |
2275 | |
2276 | clear_bit(__IXGBEVF_RESETTING, &adapter->state); | |
2277 | } | |
2278 | ||
2279 | void ixgbevf_reset(struct ixgbevf_adapter *adapter) | |
2280 | { | |
2281 | struct ixgbe_hw *hw = &adapter->hw; | |
2282 | struct net_device *netdev = adapter->netdev; | |
2283 | ||
798e381a | 2284 | if (hw->mac.ops.reset_hw(hw)) { |
92915f71 | 2285 | hw_dbg(hw, "PF still resetting\n"); |
798e381a | 2286 | } else { |
92915f71 | 2287 | hw->mac.ops.init_hw(hw); |
798e381a DS |
2288 | ixgbevf_negotiate_api(adapter); |
2289 | } | |
92915f71 GR |
2290 | |
2291 | if (is_valid_ether_addr(adapter->hw.mac.addr)) { | |
91a76baa ET |
2292 | ether_addr_copy(netdev->dev_addr, adapter->hw.mac.addr); |
2293 | ether_addr_copy(netdev->perm_addr, adapter->hw.mac.addr); | |
92915f71 | 2294 | } |
e66c92ad ET |
2295 | |
2296 | adapter->last_reset = jiffies; | |
92915f71 GR |
2297 | } |
2298 | ||
e45dd5fe JK |
2299 | static int ixgbevf_acquire_msix_vectors(struct ixgbevf_adapter *adapter, |
2300 | int vectors) | |
92915f71 | 2301 | { |
a5f9337b | 2302 | int vector_threshold; |
92915f71 | 2303 | |
fa71ae27 AD |
2304 | /* We'll want at least 2 (vector_threshold): |
2305 | * 1) TxQ[0] + RxQ[0] handler | |
2306 | * 2) Other (Link Status Change, etc.) | |
92915f71 GR |
2307 | */ |
2308 | vector_threshold = MIN_MSIX_COUNT; | |
2309 | ||
2310 | /* The more we get, the more we will assign to Tx/Rx Cleanup | |
2311 | * for the separate queues...where Rx Cleanup >= Tx Cleanup. | |
2312 | * Right now, we simply care about how many we'll get; we'll | |
2313 | * set them up later while requesting irq's. | |
2314 | */ | |
5c1e3588 AG |
2315 | vectors = pci_enable_msix_range(adapter->pdev, adapter->msix_entries, |
2316 | vector_threshold, vectors); | |
92915f71 | 2317 | |
5c1e3588 | 2318 | if (vectors < 0) { |
e45dd5fe JK |
2319 | dev_err(&adapter->pdev->dev, |
2320 | "Unable to allocate MSI-X interrupts\n"); | |
92915f71 GR |
2321 | kfree(adapter->msix_entries); |
2322 | adapter->msix_entries = NULL; | |
5c1e3588 | 2323 | return vectors; |
92915f71 | 2324 | } |
dee847f5 | 2325 | |
5c1e3588 AG |
2326 | /* Adjust for only the vectors we'll use, which is minimum |
2327 | * of max_msix_q_vectors + NON_Q_VECTORS, or the number of | |
2328 | * vectors we were allocated. | |
2329 | */ | |
2330 | adapter->num_msix_vectors = vectors; | |
2331 | ||
2332 | return 0; | |
92915f71 GR |
2333 | } |
2334 | ||
49ce9c2c BH |
2335 | /** |
2336 | * ixgbevf_set_num_queues - Allocate queues for device, feature dependent | |
92915f71 GR |
2337 | * @adapter: board private structure to initialize |
2338 | * | |
2339 | * This is the top level queue allocation routine. The order here is very | |
2340 | * important, starting with the "most" number of features turned on at once, | |
2341 | * and ending with the smallest set of features. This way large combinations | |
2342 | * can be allocated if they're turned on, and smaller combinations are the | |
2343 | * fallthrough conditions. | |
2344 | * | |
2345 | **/ | |
2346 | static void ixgbevf_set_num_queues(struct ixgbevf_adapter *adapter) | |
2347 | { | |
220fe050 DS |
2348 | struct ixgbe_hw *hw = &adapter->hw; |
2349 | unsigned int def_q = 0; | |
2350 | unsigned int num_tcs = 0; | |
2351 | int err; | |
2352 | ||
92915f71 GR |
2353 | /* Start with base case */ |
2354 | adapter->num_rx_queues = 1; | |
2355 | adapter->num_tx_queues = 1; | |
220fe050 DS |
2356 | |
2357 | spin_lock_bh(&adapter->mbx_lock); | |
2358 | ||
2359 | /* fetch queue configuration from the PF */ | |
2360 | err = ixgbevf_get_queues(hw, &num_tcs, &def_q); | |
2361 | ||
2362 | spin_unlock_bh(&adapter->mbx_lock); | |
2363 | ||
2364 | if (err) | |
2365 | return; | |
2366 | ||
2367 | /* we need as many queues as traffic classes */ | |
2dc571aa | 2368 | if (num_tcs > 1) { |
220fe050 | 2369 | adapter->num_rx_queues = num_tcs; |
2dc571aa ET |
2370 | } else { |
2371 | u16 rss = min_t(u16, num_online_cpus(), IXGBEVF_MAX_RSS_QUEUES); | |
2372 | ||
2373 | switch (hw->api_version) { | |
2374 | case ixgbe_mbox_api_11: | |
94cf66f8 | 2375 | case ixgbe_mbox_api_12: |
2dc571aa ET |
2376 | adapter->num_rx_queues = rss; |
2377 | adapter->num_tx_queues = rss; | |
2378 | default: | |
2379 | break; | |
2380 | } | |
2381 | } | |
92915f71 GR |
2382 | } |
2383 | ||
2384 | /** | |
2385 | * ixgbevf_alloc_queues - Allocate memory for all rings | |
2386 | * @adapter: board private structure to initialize | |
2387 | * | |
2388 | * We allocate one ring per queue at run-time since we don't know the | |
2389 | * number of queues at compile-time. The polling_netdev array is | |
2390 | * intended for Multiqueue, but should work fine with a single queue. | |
2391 | **/ | |
2392 | static int ixgbevf_alloc_queues(struct ixgbevf_adapter *adapter) | |
2393 | { | |
87e70ab9 DS |
2394 | struct ixgbevf_ring *ring; |
2395 | int rx = 0, tx = 0; | |
92915f71 | 2396 | |
87e70ab9 DS |
2397 | for (; tx < adapter->num_tx_queues; tx++) { |
2398 | ring = kzalloc(sizeof(*ring), GFP_KERNEL); | |
2399 | if (!ring) | |
2400 | goto err_allocation; | |
92915f71 | 2401 | |
87e70ab9 DS |
2402 | ring->dev = &adapter->pdev->dev; |
2403 | ring->netdev = adapter->netdev; | |
2404 | ring->count = adapter->tx_ring_count; | |
2405 | ring->queue_index = tx; | |
2406 | ring->reg_idx = tx; | |
92915f71 | 2407 | |
87e70ab9 | 2408 | adapter->tx_ring[tx] = ring; |
92915f71 GR |
2409 | } |
2410 | ||
87e70ab9 DS |
2411 | for (; rx < adapter->num_rx_queues; rx++) { |
2412 | ring = kzalloc(sizeof(*ring), GFP_KERNEL); | |
2413 | if (!ring) | |
2414 | goto err_allocation; | |
2415 | ||
2416 | ring->dev = &adapter->pdev->dev; | |
2417 | ring->netdev = adapter->netdev; | |
2418 | ||
2419 | ring->count = adapter->rx_ring_count; | |
2420 | ring->queue_index = rx; | |
2421 | ring->reg_idx = rx; | |
2422 | ||
2423 | adapter->rx_ring[rx] = ring; | |
92915f71 GR |
2424 | } |
2425 | ||
2426 | return 0; | |
2427 | ||
87e70ab9 DS |
2428 | err_allocation: |
2429 | while (tx) { | |
2430 | kfree(adapter->tx_ring[--tx]); | |
2431 | adapter->tx_ring[tx] = NULL; | |
2432 | } | |
2433 | ||
2434 | while (rx) { | |
2435 | kfree(adapter->rx_ring[--rx]); | |
2436 | adapter->rx_ring[rx] = NULL; | |
2437 | } | |
92915f71 GR |
2438 | return -ENOMEM; |
2439 | } | |
2440 | ||
2441 | /** | |
2442 | * ixgbevf_set_interrupt_capability - set MSI-X or FAIL if not supported | |
2443 | * @adapter: board private structure to initialize | |
2444 | * | |
2445 | * Attempt to configure the interrupts using the best available | |
2446 | * capabilities of the hardware and the kernel. | |
2447 | **/ | |
2448 | static int ixgbevf_set_interrupt_capability(struct ixgbevf_adapter *adapter) | |
2449 | { | |
91e2b89b | 2450 | struct net_device *netdev = adapter->netdev; |
50985b5f | 2451 | int err; |
92915f71 GR |
2452 | int vector, v_budget; |
2453 | ||
dec0d8e4 | 2454 | /* It's easy to be greedy for MSI-X vectors, but it really |
92915f71 GR |
2455 | * doesn't do us much good if we have a lot more vectors |
2456 | * than CPU's. So let's be conservative and only ask for | |
fa71ae27 AD |
2457 | * (roughly) the same number of vectors as there are CPU's. |
2458 | * The default is to use pairs of vectors. | |
92915f71 | 2459 | */ |
fa71ae27 AD |
2460 | v_budget = max(adapter->num_rx_queues, adapter->num_tx_queues); |
2461 | v_budget = min_t(int, v_budget, num_online_cpus()); | |
2462 | v_budget += NON_Q_VECTORS; | |
92915f71 GR |
2463 | |
2464 | /* A failure in MSI-X entry allocation isn't fatal, but it does | |
dec0d8e4 JK |
2465 | * mean we disable MSI-X capabilities of the adapter. |
2466 | */ | |
92915f71 GR |
2467 | adapter->msix_entries = kcalloc(v_budget, |
2468 | sizeof(struct msix_entry), GFP_KERNEL); | |
50985b5f MR |
2469 | if (!adapter->msix_entries) |
2470 | return -ENOMEM; | |
92915f71 GR |
2471 | |
2472 | for (vector = 0; vector < v_budget; vector++) | |
2473 | adapter->msix_entries[vector].entry = vector; | |
2474 | ||
e45dd5fe JK |
2475 | err = ixgbevf_acquire_msix_vectors(adapter, v_budget); |
2476 | if (err) | |
50985b5f | 2477 | return err; |
92915f71 | 2478 | |
91e2b89b GR |
2479 | err = netif_set_real_num_tx_queues(netdev, adapter->num_tx_queues); |
2480 | if (err) | |
50985b5f | 2481 | return err; |
91e2b89b | 2482 | |
50985b5f | 2483 | return netif_set_real_num_rx_queues(netdev, adapter->num_rx_queues); |
92915f71 GR |
2484 | } |
2485 | ||
2486 | /** | |
2487 | * ixgbevf_alloc_q_vectors - Allocate memory for interrupt vectors | |
2488 | * @adapter: board private structure to initialize | |
2489 | * | |
2490 | * We allocate one q_vector per queue interrupt. If allocation fails we | |
2491 | * return -ENOMEM. | |
2492 | **/ | |
2493 | static int ixgbevf_alloc_q_vectors(struct ixgbevf_adapter *adapter) | |
2494 | { | |
2495 | int q_idx, num_q_vectors; | |
2496 | struct ixgbevf_q_vector *q_vector; | |
92915f71 GR |
2497 | |
2498 | num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; | |
92915f71 GR |
2499 | |
2500 | for (q_idx = 0; q_idx < num_q_vectors; q_idx++) { | |
2501 | q_vector = kzalloc(sizeof(struct ixgbevf_q_vector), GFP_KERNEL); | |
2502 | if (!q_vector) | |
2503 | goto err_out; | |
2504 | q_vector->adapter = adapter; | |
2505 | q_vector->v_idx = q_idx; | |
fa71ae27 AD |
2506 | netif_napi_add(adapter->netdev, &q_vector->napi, |
2507 | ixgbevf_poll, 64); | |
92915f71 GR |
2508 | adapter->q_vector[q_idx] = q_vector; |
2509 | } | |
2510 | ||
2511 | return 0; | |
2512 | ||
2513 | err_out: | |
2514 | while (q_idx) { | |
2515 | q_idx--; | |
2516 | q_vector = adapter->q_vector[q_idx]; | |
c777cdfa JK |
2517 | #ifdef CONFIG_NET_RX_BUSY_POLL |
2518 | napi_hash_del(&q_vector->napi); | |
2519 | #endif | |
92915f71 GR |
2520 | netif_napi_del(&q_vector->napi); |
2521 | kfree(q_vector); | |
2522 | adapter->q_vector[q_idx] = NULL; | |
2523 | } | |
2524 | return -ENOMEM; | |
2525 | } | |
2526 | ||
2527 | /** | |
2528 | * ixgbevf_free_q_vectors - Free memory allocated for interrupt vectors | |
2529 | * @adapter: board private structure to initialize | |
2530 | * | |
2531 | * This function frees the memory allocated to the q_vectors. In addition if | |
2532 | * NAPI is enabled it will delete any references to the NAPI struct prior | |
2533 | * to freeing the q_vector. | |
2534 | **/ | |
2535 | static void ixgbevf_free_q_vectors(struct ixgbevf_adapter *adapter) | |
2536 | { | |
f4477702 | 2537 | int q_idx, num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; |
92915f71 GR |
2538 | |
2539 | for (q_idx = 0; q_idx < num_q_vectors; q_idx++) { | |
2540 | struct ixgbevf_q_vector *q_vector = adapter->q_vector[q_idx]; | |
2541 | ||
2542 | adapter->q_vector[q_idx] = NULL; | |
c777cdfa JK |
2543 | #ifdef CONFIG_NET_RX_BUSY_POLL |
2544 | napi_hash_del(&q_vector->napi); | |
2545 | #endif | |
f4477702 | 2546 | netif_napi_del(&q_vector->napi); |
92915f71 GR |
2547 | kfree(q_vector); |
2548 | } | |
2549 | } | |
2550 | ||
2551 | /** | |
2552 | * ixgbevf_reset_interrupt_capability - Reset MSIX setup | |
2553 | * @adapter: board private structure | |
2554 | * | |
2555 | **/ | |
2556 | static void ixgbevf_reset_interrupt_capability(struct ixgbevf_adapter *adapter) | |
2557 | { | |
eeffceee MR |
2558 | if (!adapter->msix_entries) |
2559 | return; | |
2560 | ||
92915f71 GR |
2561 | pci_disable_msix(adapter->pdev); |
2562 | kfree(adapter->msix_entries); | |
2563 | adapter->msix_entries = NULL; | |
92915f71 GR |
2564 | } |
2565 | ||
2566 | /** | |
2567 | * ixgbevf_init_interrupt_scheme - Determine if MSIX is supported and init | |
2568 | * @adapter: board private structure to initialize | |
2569 | * | |
2570 | **/ | |
2571 | static int ixgbevf_init_interrupt_scheme(struct ixgbevf_adapter *adapter) | |
2572 | { | |
2573 | int err; | |
2574 | ||
2575 | /* Number of supported queues */ | |
2576 | ixgbevf_set_num_queues(adapter); | |
2577 | ||
2578 | err = ixgbevf_set_interrupt_capability(adapter); | |
2579 | if (err) { | |
2580 | hw_dbg(&adapter->hw, | |
2581 | "Unable to setup interrupt capabilities\n"); | |
2582 | goto err_set_interrupt; | |
2583 | } | |
2584 | ||
2585 | err = ixgbevf_alloc_q_vectors(adapter); | |
2586 | if (err) { | |
dec0d8e4 | 2587 | hw_dbg(&adapter->hw, "Unable to allocate memory for queue vectors\n"); |
92915f71 GR |
2588 | goto err_alloc_q_vectors; |
2589 | } | |
2590 | ||
2591 | err = ixgbevf_alloc_queues(adapter); | |
2592 | if (err) { | |
dbd9636e | 2593 | pr_err("Unable to allocate memory for queues\n"); |
92915f71 GR |
2594 | goto err_alloc_queues; |
2595 | } | |
2596 | ||
dec0d8e4 | 2597 | hw_dbg(&adapter->hw, "Multiqueue %s: Rx Queue count = %u, Tx Queue count = %u\n", |
92915f71 GR |
2598 | (adapter->num_rx_queues > 1) ? "Enabled" : |
2599 | "Disabled", adapter->num_rx_queues, adapter->num_tx_queues); | |
2600 | ||
2601 | set_bit(__IXGBEVF_DOWN, &adapter->state); | |
2602 | ||
2603 | return 0; | |
2604 | err_alloc_queues: | |
2605 | ixgbevf_free_q_vectors(adapter); | |
2606 | err_alloc_q_vectors: | |
2607 | ixgbevf_reset_interrupt_capability(adapter); | |
2608 | err_set_interrupt: | |
2609 | return err; | |
2610 | } | |
2611 | ||
0ac1e8ce AD |
2612 | /** |
2613 | * ixgbevf_clear_interrupt_scheme - Clear the current interrupt scheme settings | |
2614 | * @adapter: board private structure to clear interrupt scheme on | |
2615 | * | |
2616 | * We go through and clear interrupt specific resources and reset the structure | |
2617 | * to pre-load conditions | |
2618 | **/ | |
2619 | static void ixgbevf_clear_interrupt_scheme(struct ixgbevf_adapter *adapter) | |
2620 | { | |
87e70ab9 DS |
2621 | int i; |
2622 | ||
2623 | for (i = 0; i < adapter->num_tx_queues; i++) { | |
2624 | kfree(adapter->tx_ring[i]); | |
2625 | adapter->tx_ring[i] = NULL; | |
2626 | } | |
2627 | for (i = 0; i < adapter->num_rx_queues; i++) { | |
2628 | kfree(adapter->rx_ring[i]); | |
2629 | adapter->rx_ring[i] = NULL; | |
2630 | } | |
2631 | ||
0ac1e8ce AD |
2632 | adapter->num_tx_queues = 0; |
2633 | adapter->num_rx_queues = 0; | |
2634 | ||
2635 | ixgbevf_free_q_vectors(adapter); | |
2636 | ixgbevf_reset_interrupt_capability(adapter); | |
2637 | } | |
2638 | ||
92915f71 GR |
2639 | /** |
2640 | * ixgbevf_sw_init - Initialize general software structures | |
92915f71 GR |
2641 | * @adapter: board private structure to initialize |
2642 | * | |
2643 | * ixgbevf_sw_init initializes the Adapter private data structure. | |
2644 | * Fields are initialized based on PCI device information and | |
2645 | * OS network device settings (MTU size). | |
2646 | **/ | |
9f9a12f8 | 2647 | static int ixgbevf_sw_init(struct ixgbevf_adapter *adapter) |
92915f71 GR |
2648 | { |
2649 | struct ixgbe_hw *hw = &adapter->hw; | |
2650 | struct pci_dev *pdev = adapter->pdev; | |
e1941a74 | 2651 | struct net_device *netdev = adapter->netdev; |
92915f71 GR |
2652 | int err; |
2653 | ||
2654 | /* PCI config space info */ | |
92915f71 GR |
2655 | hw->vendor_id = pdev->vendor; |
2656 | hw->device_id = pdev->device; | |
ff938e43 | 2657 | hw->revision_id = pdev->revision; |
92915f71 GR |
2658 | hw->subsystem_vendor_id = pdev->subsystem_vendor; |
2659 | hw->subsystem_device_id = pdev->subsystem_device; | |
2660 | ||
2661 | hw->mbx.ops.init_params(hw); | |
56e94095 AD |
2662 | |
2663 | /* assume legacy case in which PF would only give VF 2 queues */ | |
2664 | hw->mac.max_tx_queues = 2; | |
2665 | hw->mac.max_rx_queues = 2; | |
2666 | ||
798e381a DS |
2667 | /* lock to protect mailbox accesses */ |
2668 | spin_lock_init(&adapter->mbx_lock); | |
2669 | ||
92915f71 GR |
2670 | err = hw->mac.ops.reset_hw(hw); |
2671 | if (err) { | |
2672 | dev_info(&pdev->dev, | |
e1941a74 | 2673 | "PF still in reset state. Is the PF interface up?\n"); |
92915f71 GR |
2674 | } else { |
2675 | err = hw->mac.ops.init_hw(hw); | |
2676 | if (err) { | |
dbd9636e | 2677 | pr_err("init_shared_code failed: %d\n", err); |
92915f71 GR |
2678 | goto out; |
2679 | } | |
798e381a | 2680 | ixgbevf_negotiate_api(adapter); |
e1941a74 GR |
2681 | err = hw->mac.ops.get_mac_addr(hw, hw->mac.addr); |
2682 | if (err) | |
2683 | dev_info(&pdev->dev, "Error reading MAC address\n"); | |
2684 | else if (is_zero_ether_addr(adapter->hw.mac.addr)) | |
2685 | dev_info(&pdev->dev, | |
2686 | "MAC address not assigned by administrator.\n"); | |
91a76baa | 2687 | ether_addr_copy(netdev->dev_addr, hw->mac.addr); |
e1941a74 GR |
2688 | } |
2689 | ||
2690 | if (!is_valid_ether_addr(netdev->dev_addr)) { | |
2691 | dev_info(&pdev->dev, "Assigning random MAC address\n"); | |
2692 | eth_hw_addr_random(netdev); | |
91a76baa | 2693 | ether_addr_copy(hw->mac.addr, netdev->dev_addr); |
465fc643 | 2694 | ether_addr_copy(hw->mac.perm_addr, netdev->dev_addr); |
92915f71 GR |
2695 | } |
2696 | ||
2697 | /* Enable dynamic interrupt throttling rates */ | |
5f3600eb AD |
2698 | adapter->rx_itr_setting = 1; |
2699 | adapter->tx_itr_setting = 1; | |
92915f71 | 2700 | |
92915f71 GR |
2701 | /* set default ring sizes */ |
2702 | adapter->tx_ring_count = IXGBEVF_DEFAULT_TXD; | |
2703 | adapter->rx_ring_count = IXGBEVF_DEFAULT_RXD; | |
2704 | ||
92915f71 | 2705 | set_bit(__IXGBEVF_DOWN, &adapter->state); |
1a0d6ae5 | 2706 | return 0; |
92915f71 GR |
2707 | |
2708 | out: | |
2709 | return err; | |
2710 | } | |
2711 | ||
92915f71 GR |
2712 | #define UPDATE_VF_COUNTER_32bit(reg, last_counter, counter) \ |
2713 | { \ | |
2714 | u32 current_counter = IXGBE_READ_REG(hw, reg); \ | |
2715 | if (current_counter < last_counter) \ | |
2716 | counter += 0x100000000LL; \ | |
2717 | last_counter = current_counter; \ | |
2718 | counter &= 0xFFFFFFFF00000000LL; \ | |
2719 | counter |= current_counter; \ | |
2720 | } | |
2721 | ||
2722 | #define UPDATE_VF_COUNTER_36bit(reg_lsb, reg_msb, last_counter, counter) \ | |
2723 | { \ | |
2724 | u64 current_counter_lsb = IXGBE_READ_REG(hw, reg_lsb); \ | |
2725 | u64 current_counter_msb = IXGBE_READ_REG(hw, reg_msb); \ | |
dec0d8e4 JK |
2726 | u64 current_counter = (current_counter_msb << 32) | \ |
2727 | current_counter_lsb; \ | |
92915f71 GR |
2728 | if (current_counter < last_counter) \ |
2729 | counter += 0x1000000000LL; \ | |
2730 | last_counter = current_counter; \ | |
2731 | counter &= 0xFFFFFFF000000000LL; \ | |
2732 | counter |= current_counter; \ | |
2733 | } | |
2734 | /** | |
2735 | * ixgbevf_update_stats - Update the board statistics counters. | |
2736 | * @adapter: board private structure | |
2737 | **/ | |
2738 | void ixgbevf_update_stats(struct ixgbevf_adapter *adapter) | |
2739 | { | |
2740 | struct ixgbe_hw *hw = &adapter->hw; | |
55fb277c | 2741 | int i; |
92915f71 | 2742 | |
e66c92ad ET |
2743 | if (test_bit(__IXGBEVF_DOWN, &adapter->state) || |
2744 | test_bit(__IXGBEVF_RESETTING, &adapter->state)) | |
088245a3 GR |
2745 | return; |
2746 | ||
92915f71 GR |
2747 | UPDATE_VF_COUNTER_32bit(IXGBE_VFGPRC, adapter->stats.last_vfgprc, |
2748 | adapter->stats.vfgprc); | |
2749 | UPDATE_VF_COUNTER_32bit(IXGBE_VFGPTC, adapter->stats.last_vfgptc, | |
2750 | adapter->stats.vfgptc); | |
2751 | UPDATE_VF_COUNTER_36bit(IXGBE_VFGORC_LSB, IXGBE_VFGORC_MSB, | |
2752 | adapter->stats.last_vfgorc, | |
2753 | adapter->stats.vfgorc); | |
2754 | UPDATE_VF_COUNTER_36bit(IXGBE_VFGOTC_LSB, IXGBE_VFGOTC_MSB, | |
2755 | adapter->stats.last_vfgotc, | |
2756 | adapter->stats.vfgotc); | |
2757 | UPDATE_VF_COUNTER_32bit(IXGBE_VFMPRC, adapter->stats.last_vfmprc, | |
2758 | adapter->stats.vfmprc); | |
55fb277c GR |
2759 | |
2760 | for (i = 0; i < adapter->num_rx_queues; i++) { | |
2761 | adapter->hw_csum_rx_error += | |
87e70ab9 | 2762 | adapter->rx_ring[i]->hw_csum_rx_error; |
87e70ab9 | 2763 | adapter->rx_ring[i]->hw_csum_rx_error = 0; |
55fb277c | 2764 | } |
92915f71 GR |
2765 | } |
2766 | ||
2767 | /** | |
9ac5c5cc | 2768 | * ixgbevf_service_timer - Timer Call-back |
92915f71 GR |
2769 | * @data: pointer to adapter cast into an unsigned long |
2770 | **/ | |
9ac5c5cc | 2771 | static void ixgbevf_service_timer(unsigned long data) |
92915f71 GR |
2772 | { |
2773 | struct ixgbevf_adapter *adapter = (struct ixgbevf_adapter *)data; | |
e66c92ad | 2774 | |
9ac5c5cc ET |
2775 | /* Reset the timer */ |
2776 | mod_timer(&adapter->service_timer, (HZ * 2) + jiffies); | |
2777 | ||
2778 | ixgbevf_service_event_schedule(adapter); | |
e66c92ad ET |
2779 | } |
2780 | ||
9ac5c5cc | 2781 | static void ixgbevf_reset_subtask(struct ixgbevf_adapter *adapter) |
e66c92ad | 2782 | { |
d5dd7c3f | 2783 | if (!test_and_clear_bit(__IXGBEVF_RESET_REQUESTED, &adapter->state)) |
9ac5c5cc | 2784 | return; |
e66c92ad | 2785 | |
e66c92ad ET |
2786 | /* If we're already down or resetting, just bail */ |
2787 | if (test_bit(__IXGBEVF_DOWN, &adapter->state) || | |
6e469ed0 | 2788 | test_bit(__IXGBEVF_REMOVING, &adapter->state) || |
e66c92ad ET |
2789 | test_bit(__IXGBEVF_RESETTING, &adapter->state)) |
2790 | return; | |
2791 | ||
2792 | adapter->tx_timeout_count++; | |
2793 | ||
8e8247ab | 2794 | rtnl_lock(); |
e66c92ad | 2795 | ixgbevf_reinit_locked(adapter); |
8e8247ab | 2796 | rtnl_unlock(); |
e66c92ad ET |
2797 | } |
2798 | ||
dec0d8e4 JK |
2799 | /** |
2800 | * ixgbevf_check_hang_subtask - check for hung queues and dropped interrupts | |
2801 | * @adapter: pointer to the device adapter structure | |
e66c92ad ET |
2802 | * |
2803 | * This function serves two purposes. First it strobes the interrupt lines | |
2804 | * in order to make certain interrupts are occurring. Secondly it sets the | |
2805 | * bits needed to check for TX hangs. As a result we should immediately | |
2806 | * determine if a hang has occurred. | |
dec0d8e4 | 2807 | **/ |
e66c92ad ET |
2808 | static void ixgbevf_check_hang_subtask(struct ixgbevf_adapter *adapter) |
2809 | { | |
92915f71 | 2810 | struct ixgbe_hw *hw = &adapter->hw; |
5f3600eb | 2811 | u32 eics = 0; |
92915f71 GR |
2812 | int i; |
2813 | ||
e66c92ad ET |
2814 | /* If we're down or resetting, just bail */ |
2815 | if (test_bit(__IXGBEVF_DOWN, &adapter->state) || | |
2816 | test_bit(__IXGBEVF_RESETTING, &adapter->state)) | |
2817 | return; | |
92915f71 | 2818 | |
e08400b7 ET |
2819 | /* Force detection of hung controller */ |
2820 | if (netif_carrier_ok(adapter->netdev)) { | |
2821 | for (i = 0; i < adapter->num_tx_queues; i++) | |
2822 | set_check_for_tx_hang(adapter->tx_ring[i]); | |
2823 | } | |
2824 | ||
dec0d8e4 | 2825 | /* get one bit for every active Tx/Rx interrupt vector */ |
92915f71 GR |
2826 | for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) { |
2827 | struct ixgbevf_q_vector *qv = adapter->q_vector[i]; | |
9ac5c5cc | 2828 | |
6b43c446 | 2829 | if (qv->rx.ring || qv->tx.ring) |
8d055cc0 | 2830 | eics |= BIT(i); |
92915f71 GR |
2831 | } |
2832 | ||
e66c92ad | 2833 | /* Cause software interrupt to ensure rings are cleaned */ |
5f3600eb | 2834 | IXGBE_WRITE_REG(hw, IXGBE_VTEICS, eics); |
e66c92ad | 2835 | } |
92915f71 | 2836 | |
e66c92ad ET |
2837 | /** |
2838 | * ixgbevf_watchdog_update_link - update the link status | |
dec0d8e4 | 2839 | * @adapter: pointer to the device adapter structure |
e66c92ad ET |
2840 | **/ |
2841 | static void ixgbevf_watchdog_update_link(struct ixgbevf_adapter *adapter) | |
2842 | { | |
2843 | struct ixgbe_hw *hw = &adapter->hw; | |
2844 | u32 link_speed = adapter->link_speed; | |
2845 | bool link_up = adapter->link_up; | |
2846 | s32 err; | |
2847 | ||
2848 | spin_lock_bh(&adapter->mbx_lock); | |
2849 | ||
2850 | err = hw->mac.ops.check_link(hw, &link_speed, &link_up, false); | |
2851 | ||
2852 | spin_unlock_bh(&adapter->mbx_lock); | |
2853 | ||
2854 | /* if check for link returns error we will need to reset */ | |
2855 | if (err && time_after(jiffies, adapter->last_reset + (10 * HZ))) { | |
d5dd7c3f | 2856 | set_bit(__IXGBEVF_RESET_REQUESTED, &adapter->state); |
e66c92ad ET |
2857 | link_up = false; |
2858 | } | |
2859 | ||
2860 | adapter->link_up = link_up; | |
2861 | adapter->link_speed = link_speed; | |
92915f71 GR |
2862 | } |
2863 | ||
e66c92ad ET |
2864 | /** |
2865 | * ixgbevf_watchdog_link_is_up - update netif_carrier status and | |
2866 | * print link up message | |
dec0d8e4 | 2867 | * @adapter: pointer to the device adapter structure |
e66c92ad ET |
2868 | **/ |
2869 | static void ixgbevf_watchdog_link_is_up(struct ixgbevf_adapter *adapter) | |
92915f71 | 2870 | { |
e66c92ad | 2871 | struct net_device *netdev = adapter->netdev; |
92915f71 | 2872 | |
e66c92ad ET |
2873 | /* only continue if link was previously down */ |
2874 | if (netif_carrier_ok(netdev)) | |
92915f71 GR |
2875 | return; |
2876 | ||
e66c92ad ET |
2877 | dev_info(&adapter->pdev->dev, "NIC Link is Up %s\n", |
2878 | (adapter->link_speed == IXGBE_LINK_SPEED_10GB_FULL) ? | |
2879 | "10 Gbps" : | |
2880 | (adapter->link_speed == IXGBE_LINK_SPEED_1GB_FULL) ? | |
2881 | "1 Gbps" : | |
2882 | (adapter->link_speed == IXGBE_LINK_SPEED_100_FULL) ? | |
2883 | "100 Mbps" : | |
2884 | "unknown speed"); | |
92915f71 | 2885 | |
e66c92ad ET |
2886 | netif_carrier_on(netdev); |
2887 | } | |
2888 | ||
2889 | /** | |
2890 | * ixgbevf_watchdog_link_is_down - update netif_carrier status and | |
2891 | * print link down message | |
dec0d8e4 | 2892 | * @adapter: pointer to the adapter structure |
e66c92ad ET |
2893 | **/ |
2894 | static void ixgbevf_watchdog_link_is_down(struct ixgbevf_adapter *adapter) | |
2895 | { | |
2896 | struct net_device *netdev = adapter->netdev; | |
2897 | ||
2898 | adapter->link_speed = 0; | |
2899 | ||
2900 | /* only continue if link was up previously */ | |
2901 | if (!netif_carrier_ok(netdev)) | |
2902 | return; | |
2903 | ||
2904 | dev_info(&adapter->pdev->dev, "NIC Link is Down\n"); | |
2905 | ||
2906 | netif_carrier_off(netdev); | |
92915f71 GR |
2907 | } |
2908 | ||
2909 | /** | |
9ac5c5cc ET |
2910 | * ixgbevf_watchdog_subtask - worker thread to bring link up |
2911 | * @work: pointer to work_struct containing our data | |
2912 | **/ | |
2913 | static void ixgbevf_watchdog_subtask(struct ixgbevf_adapter *adapter) | |
2914 | { | |
2915 | /* if interface is down do nothing */ | |
2916 | if (test_bit(__IXGBEVF_DOWN, &adapter->state) || | |
2917 | test_bit(__IXGBEVF_RESETTING, &adapter->state)) | |
2918 | return; | |
2919 | ||
2920 | ixgbevf_watchdog_update_link(adapter); | |
2921 | ||
2922 | if (adapter->link_up) | |
2923 | ixgbevf_watchdog_link_is_up(adapter); | |
2924 | else | |
2925 | ixgbevf_watchdog_link_is_down(adapter); | |
2926 | ||
2927 | ixgbevf_update_stats(adapter); | |
2928 | } | |
2929 | ||
2930 | /** | |
2931 | * ixgbevf_service_task - manages and runs subtasks | |
92915f71 GR |
2932 | * @work: pointer to work_struct containing our data |
2933 | **/ | |
9ac5c5cc | 2934 | static void ixgbevf_service_task(struct work_struct *work) |
92915f71 GR |
2935 | { |
2936 | struct ixgbevf_adapter *adapter = container_of(work, | |
2937 | struct ixgbevf_adapter, | |
9ac5c5cc | 2938 | service_task); |
92915f71 | 2939 | struct ixgbe_hw *hw = &adapter->hw; |
92915f71 | 2940 | |
26597802 MR |
2941 | if (IXGBE_REMOVED(hw->hw_addr)) { |
2942 | if (!test_bit(__IXGBEVF_DOWN, &adapter->state)) { | |
2943 | rtnl_lock(); | |
2944 | ixgbevf_down(adapter); | |
2945 | rtnl_unlock(); | |
2946 | } | |
2947 | return; | |
2948 | } | |
e66c92ad | 2949 | |
220fe050 | 2950 | ixgbevf_queue_reset_subtask(adapter); |
9ac5c5cc ET |
2951 | ixgbevf_reset_subtask(adapter); |
2952 | ixgbevf_watchdog_subtask(adapter); | |
e66c92ad ET |
2953 | ixgbevf_check_hang_subtask(adapter); |
2954 | ||
9ac5c5cc | 2955 | ixgbevf_service_event_complete(adapter); |
92915f71 GR |
2956 | } |
2957 | ||
2958 | /** | |
2959 | * ixgbevf_free_tx_resources - Free Tx Resources per Queue | |
92915f71 GR |
2960 | * @tx_ring: Tx descriptor ring for a specific queue |
2961 | * | |
2962 | * Free all transmit software resources | |
2963 | **/ | |
05d063aa | 2964 | void ixgbevf_free_tx_resources(struct ixgbevf_ring *tx_ring) |
92915f71 | 2965 | { |
05d063aa | 2966 | ixgbevf_clean_tx_ring(tx_ring); |
92915f71 GR |
2967 | |
2968 | vfree(tx_ring->tx_buffer_info); | |
2969 | tx_ring->tx_buffer_info = NULL; | |
2970 | ||
de02decb DS |
2971 | /* if not set, then don't free */ |
2972 | if (!tx_ring->desc) | |
2973 | return; | |
2974 | ||
05d063aa | 2975 | dma_free_coherent(tx_ring->dev, tx_ring->size, tx_ring->desc, |
2a1f8794 | 2976 | tx_ring->dma); |
92915f71 GR |
2977 | |
2978 | tx_ring->desc = NULL; | |
2979 | } | |
2980 | ||
2981 | /** | |
2982 | * ixgbevf_free_all_tx_resources - Free Tx Resources for All Queues | |
2983 | * @adapter: board private structure | |
2984 | * | |
2985 | * Free all transmit software resources | |
2986 | **/ | |
2987 | static void ixgbevf_free_all_tx_resources(struct ixgbevf_adapter *adapter) | |
2988 | { | |
2989 | int i; | |
2990 | ||
2991 | for (i = 0; i < adapter->num_tx_queues; i++) | |
87e70ab9 | 2992 | if (adapter->tx_ring[i]->desc) |
05d063aa | 2993 | ixgbevf_free_tx_resources(adapter->tx_ring[i]); |
92915f71 GR |
2994 | } |
2995 | ||
2996 | /** | |
2997 | * ixgbevf_setup_tx_resources - allocate Tx resources (Descriptors) | |
dec0d8e4 | 2998 | * @tx_ring: Tx descriptor ring (for a specific queue) to setup |
92915f71 GR |
2999 | * |
3000 | * Return 0 on success, negative on failure | |
3001 | **/ | |
05d063aa | 3002 | int ixgbevf_setup_tx_resources(struct ixgbevf_ring *tx_ring) |
92915f71 | 3003 | { |
4ad6af02 | 3004 | struct ixgbevf_adapter *adapter = netdev_priv(tx_ring->netdev); |
92915f71 GR |
3005 | int size; |
3006 | ||
3007 | size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count; | |
89bf67f1 | 3008 | tx_ring->tx_buffer_info = vzalloc(size); |
92915f71 GR |
3009 | if (!tx_ring->tx_buffer_info) |
3010 | goto err; | |
92915f71 GR |
3011 | |
3012 | /* round up to nearest 4K */ | |
3013 | tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc); | |
3014 | tx_ring->size = ALIGN(tx_ring->size, 4096); | |
3015 | ||
05d063aa | 3016 | tx_ring->desc = dma_alloc_coherent(tx_ring->dev, tx_ring->size, |
2a1f8794 | 3017 | &tx_ring->dma, GFP_KERNEL); |
92915f71 GR |
3018 | if (!tx_ring->desc) |
3019 | goto err; | |
3020 | ||
92915f71 GR |
3021 | return 0; |
3022 | ||
3023 | err: | |
3024 | vfree(tx_ring->tx_buffer_info); | |
3025 | tx_ring->tx_buffer_info = NULL; | |
dec0d8e4 | 3026 | hw_dbg(&adapter->hw, "Unable to allocate memory for the transmit descriptor ring\n"); |
92915f71 GR |
3027 | return -ENOMEM; |
3028 | } | |
3029 | ||
3030 | /** | |
3031 | * ixgbevf_setup_all_tx_resources - allocate all queues Tx resources | |
3032 | * @adapter: board private structure | |
3033 | * | |
3034 | * If this function returns with an error, then it's possible one or | |
3035 | * more of the rings is populated (while the rest are not). It is the | |
3036 | * callers duty to clean those orphaned rings. | |
3037 | * | |
3038 | * Return 0 on success, negative on failure | |
3039 | **/ | |
3040 | static int ixgbevf_setup_all_tx_resources(struct ixgbevf_adapter *adapter) | |
3041 | { | |
3042 | int i, err = 0; | |
3043 | ||
3044 | for (i = 0; i < adapter->num_tx_queues; i++) { | |
05d063aa | 3045 | err = ixgbevf_setup_tx_resources(adapter->tx_ring[i]); |
92915f71 GR |
3046 | if (!err) |
3047 | continue; | |
dec0d8e4 | 3048 | hw_dbg(&adapter->hw, "Allocation for Tx Queue %u failed\n", i); |
92915f71 GR |
3049 | break; |
3050 | } | |
3051 | ||
3052 | return err; | |
3053 | } | |
3054 | ||
3055 | /** | |
3056 | * ixgbevf_setup_rx_resources - allocate Rx resources (Descriptors) | |
dec0d8e4 | 3057 | * @rx_ring: Rx descriptor ring (for a specific queue) to setup |
92915f71 GR |
3058 | * |
3059 | * Returns 0 on success, negative on failure | |
3060 | **/ | |
05d063aa | 3061 | int ixgbevf_setup_rx_resources(struct ixgbevf_ring *rx_ring) |
92915f71 | 3062 | { |
92915f71 GR |
3063 | int size; |
3064 | ||
3065 | size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count; | |
89bf67f1 | 3066 | rx_ring->rx_buffer_info = vzalloc(size); |
e404decb | 3067 | if (!rx_ring->rx_buffer_info) |
05d063aa | 3068 | goto err; |
92915f71 GR |
3069 | |
3070 | /* Round up to nearest 4K */ | |
3071 | rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc); | |
3072 | rx_ring->size = ALIGN(rx_ring->size, 4096); | |
3073 | ||
05d063aa | 3074 | rx_ring->desc = dma_alloc_coherent(rx_ring->dev, rx_ring->size, |
2a1f8794 | 3075 | &rx_ring->dma, GFP_KERNEL); |
92915f71 | 3076 | |
05d063aa ET |
3077 | if (!rx_ring->desc) |
3078 | goto err; | |
92915f71 | 3079 | |
92915f71 | 3080 | return 0; |
05d063aa ET |
3081 | err: |
3082 | vfree(rx_ring->rx_buffer_info); | |
3083 | rx_ring->rx_buffer_info = NULL; | |
3084 | dev_err(rx_ring->dev, "Unable to allocate memory for the Rx descriptor ring\n"); | |
92915f71 GR |
3085 | return -ENOMEM; |
3086 | } | |
3087 | ||
3088 | /** | |
3089 | * ixgbevf_setup_all_rx_resources - allocate all queues Rx resources | |
3090 | * @adapter: board private structure | |
3091 | * | |
3092 | * If this function returns with an error, then it's possible one or | |
3093 | * more of the rings is populated (while the rest are not). It is the | |
3094 | * callers duty to clean those orphaned rings. | |
3095 | * | |
3096 | * Return 0 on success, negative on failure | |
3097 | **/ | |
3098 | static int ixgbevf_setup_all_rx_resources(struct ixgbevf_adapter *adapter) | |
3099 | { | |
3100 | int i, err = 0; | |
3101 | ||
3102 | for (i = 0; i < adapter->num_rx_queues; i++) { | |
05d063aa | 3103 | err = ixgbevf_setup_rx_resources(adapter->rx_ring[i]); |
92915f71 GR |
3104 | if (!err) |
3105 | continue; | |
dec0d8e4 | 3106 | hw_dbg(&adapter->hw, "Allocation for Rx Queue %u failed\n", i); |
92915f71 GR |
3107 | break; |
3108 | } | |
3109 | return err; | |
3110 | } | |
3111 | ||
3112 | /** | |
3113 | * ixgbevf_free_rx_resources - Free Rx Resources | |
92915f71 GR |
3114 | * @rx_ring: ring to clean the resources from |
3115 | * | |
3116 | * Free all receive software resources | |
3117 | **/ | |
05d063aa | 3118 | void ixgbevf_free_rx_resources(struct ixgbevf_ring *rx_ring) |
92915f71 | 3119 | { |
05d063aa | 3120 | ixgbevf_clean_rx_ring(rx_ring); |
92915f71 GR |
3121 | |
3122 | vfree(rx_ring->rx_buffer_info); | |
3123 | rx_ring->rx_buffer_info = NULL; | |
3124 | ||
05d063aa | 3125 | dma_free_coherent(rx_ring->dev, rx_ring->size, rx_ring->desc, |
2a1f8794 | 3126 | rx_ring->dma); |
92915f71 GR |
3127 | |
3128 | rx_ring->desc = NULL; | |
3129 | } | |
3130 | ||
3131 | /** | |
3132 | * ixgbevf_free_all_rx_resources - Free Rx Resources for All Queues | |
3133 | * @adapter: board private structure | |
3134 | * | |
3135 | * Free all receive software resources | |
3136 | **/ | |
3137 | static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter) | |
3138 | { | |
3139 | int i; | |
3140 | ||
3141 | for (i = 0; i < adapter->num_rx_queues; i++) | |
87e70ab9 | 3142 | if (adapter->rx_ring[i]->desc) |
05d063aa | 3143 | ixgbevf_free_rx_resources(adapter->rx_ring[i]); |
92915f71 GR |
3144 | } |
3145 | ||
3146 | /** | |
3147 | * ixgbevf_open - Called when a network interface is made active | |
3148 | * @netdev: network interface device structure | |
3149 | * | |
3150 | * Returns 0 on success, negative value on failure | |
3151 | * | |
3152 | * The open entry point is called when a network interface is made | |
3153 | * active by the system (IFF_UP). At this point all resources needed | |
3154 | * for transmit and receive operations are allocated, the interrupt | |
3155 | * handler is registered with the OS, the watchdog timer is started, | |
3156 | * and the stack is notified that the interface is ready. | |
3157 | **/ | |
324d0867 | 3158 | int ixgbevf_open(struct net_device *netdev) |
92915f71 GR |
3159 | { |
3160 | struct ixgbevf_adapter *adapter = netdev_priv(netdev); | |
3161 | struct ixgbe_hw *hw = &adapter->hw; | |
3162 | int err; | |
3163 | ||
a1f6c6b1 | 3164 | /* A previous failure to open the device because of a lack of |
3165 | * available MSIX vector resources may have reset the number | |
3166 | * of msix vectors variable to zero. The only way to recover | |
3167 | * is to unload/reload the driver and hope that the system has | |
3168 | * been able to recover some MSIX vector resources. | |
3169 | */ | |
3170 | if (!adapter->num_msix_vectors) | |
3171 | return -ENOMEM; | |
3172 | ||
92915f71 GR |
3173 | if (hw->adapter_stopped) { |
3174 | ixgbevf_reset(adapter); | |
3175 | /* if adapter is still stopped then PF isn't up and | |
dec0d8e4 JK |
3176 | * the VF can't start. |
3177 | */ | |
92915f71 GR |
3178 | if (hw->adapter_stopped) { |
3179 | err = IXGBE_ERR_MBX; | |
dec0d8e4 | 3180 | pr_err("Unable to start - perhaps the PF Driver isn't up yet\n"); |
92915f71 GR |
3181 | goto err_setup_reset; |
3182 | } | |
3183 | } | |
3184 | ||
d9bdb57f ET |
3185 | /* disallow open during test */ |
3186 | if (test_bit(__IXGBEVF_TESTING, &adapter->state)) | |
3187 | return -EBUSY; | |
3188 | ||
3189 | netif_carrier_off(netdev); | |
3190 | ||
92915f71 GR |
3191 | /* allocate transmit descriptors */ |
3192 | err = ixgbevf_setup_all_tx_resources(adapter); | |
3193 | if (err) | |
3194 | goto err_setup_tx; | |
3195 | ||
3196 | /* allocate receive descriptors */ | |
3197 | err = ixgbevf_setup_all_rx_resources(adapter); | |
3198 | if (err) | |
3199 | goto err_setup_rx; | |
3200 | ||
3201 | ixgbevf_configure(adapter); | |
3202 | ||
dec0d8e4 | 3203 | /* Map the Tx/Rx rings to the vectors we were allotted. |
92915f71 GR |
3204 | * if request_irq will be called in this function map_rings |
3205 | * must be called *before* up_complete | |
3206 | */ | |
3207 | ixgbevf_map_rings_to_vectors(adapter); | |
3208 | ||
92915f71 GR |
3209 | err = ixgbevf_request_irq(adapter); |
3210 | if (err) | |
3211 | goto err_req_irq; | |
3212 | ||
d9bdb57f | 3213 | ixgbevf_up_complete(adapter); |
92915f71 GR |
3214 | |
3215 | return 0; | |
3216 | ||
3217 | err_req_irq: | |
3218 | ixgbevf_down(adapter); | |
92915f71 GR |
3219 | err_setup_rx: |
3220 | ixgbevf_free_all_rx_resources(adapter); | |
3221 | err_setup_tx: | |
3222 | ixgbevf_free_all_tx_resources(adapter); | |
3223 | ixgbevf_reset(adapter); | |
3224 | ||
3225 | err_setup_reset: | |
3226 | ||
3227 | return err; | |
3228 | } | |
3229 | ||
3230 | /** | |
3231 | * ixgbevf_close - Disables a network interface | |
3232 | * @netdev: network interface device structure | |
3233 | * | |
3234 | * Returns 0, this is not allowed to fail | |
3235 | * | |
3236 | * The close entry point is called when an interface is de-activated | |
3237 | * by the OS. The hardware is still under the drivers control, but | |
3238 | * needs to be disabled. A global MAC reset is issued to stop the | |
3239 | * hardware, and all transmit and receive resources are freed. | |
3240 | **/ | |
324d0867 | 3241 | int ixgbevf_close(struct net_device *netdev) |
92915f71 GR |
3242 | { |
3243 | struct ixgbevf_adapter *adapter = netdev_priv(netdev); | |
3244 | ||
2dad7b27 ET |
3245 | if (!netif_device_present(netdev)) |
3246 | return 0; | |
3247 | ||
92915f71 GR |
3248 | ixgbevf_down(adapter); |
3249 | ixgbevf_free_irq(adapter); | |
3250 | ||
3251 | ixgbevf_free_all_tx_resources(adapter); | |
3252 | ixgbevf_free_all_rx_resources(adapter); | |
3253 | ||
3254 | return 0; | |
3255 | } | |
3256 | ||
220fe050 DS |
3257 | static void ixgbevf_queue_reset_subtask(struct ixgbevf_adapter *adapter) |
3258 | { | |
3259 | struct net_device *dev = adapter->netdev; | |
3260 | ||
d5dd7c3f ET |
3261 | if (!test_and_clear_bit(__IXGBEVF_QUEUE_RESET_REQUESTED, |
3262 | &adapter->state)) | |
220fe050 DS |
3263 | return; |
3264 | ||
220fe050 DS |
3265 | /* if interface is down do nothing */ |
3266 | if (test_bit(__IXGBEVF_DOWN, &adapter->state) || | |
3267 | test_bit(__IXGBEVF_RESETTING, &adapter->state)) | |
3268 | return; | |
3269 | ||
3270 | /* Hardware has to reinitialize queues and interrupts to | |
3271 | * match packet buffer alignment. Unfortunately, the | |
3272 | * hardware is not flexible enough to do this dynamically. | |
3273 | */ | |
2dad7b27 ET |
3274 | rtnl_lock(); |
3275 | ||
220fe050 DS |
3276 | if (netif_running(dev)) |
3277 | ixgbevf_close(dev); | |
3278 | ||
3279 | ixgbevf_clear_interrupt_scheme(adapter); | |
3280 | ixgbevf_init_interrupt_scheme(adapter); | |
3281 | ||
3282 | if (netif_running(dev)) | |
3283 | ixgbevf_open(dev); | |
2dad7b27 ET |
3284 | |
3285 | rtnl_unlock(); | |
220fe050 DS |
3286 | } |
3287 | ||
70a10e25 AD |
3288 | static void ixgbevf_tx_ctxtdesc(struct ixgbevf_ring *tx_ring, |
3289 | u32 vlan_macip_lens, u32 type_tucmd, | |
3290 | u32 mss_l4len_idx) | |
92915f71 GR |
3291 | { |
3292 | struct ixgbe_adv_tx_context_desc *context_desc; | |
70a10e25 | 3293 | u16 i = tx_ring->next_to_use; |
92915f71 | 3294 | |
70a10e25 | 3295 | context_desc = IXGBEVF_TX_CTXTDESC(tx_ring, i); |
92915f71 | 3296 | |
70a10e25 AD |
3297 | i++; |
3298 | tx_ring->next_to_use = (i < tx_ring->count) ? i : 0; | |
92915f71 | 3299 | |
70a10e25 AD |
3300 | /* set bits to identify this as an advanced context descriptor */ |
3301 | type_tucmd |= IXGBE_TXD_CMD_DEXT | IXGBE_ADVTXD_DTYP_CTXT; | |
92915f71 | 3302 | |
70a10e25 AD |
3303 | context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens); |
3304 | context_desc->seqnum_seed = 0; | |
3305 | context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd); | |
3306 | context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx); | |
3307 | } | |
3308 | ||
3309 | static int ixgbevf_tso(struct ixgbevf_ring *tx_ring, | |
7ad1a093 ET |
3310 | struct ixgbevf_tx_buffer *first, |
3311 | u8 *hdr_len) | |
70a10e25 | 3312 | { |
b83e3010 | 3313 | u32 vlan_macip_lens, type_tucmd, mss_l4len_idx; |
7ad1a093 | 3314 | struct sk_buff *skb = first->skb; |
b83e3010 AD |
3315 | union { |
3316 | struct iphdr *v4; | |
3317 | struct ipv6hdr *v6; | |
3318 | unsigned char *hdr; | |
3319 | } ip; | |
3320 | union { | |
3321 | struct tcphdr *tcp; | |
3322 | unsigned char *hdr; | |
3323 | } l4; | |
3324 | u32 paylen, l4_offset; | |
8f12c034 | 3325 | int err; |
70a10e25 | 3326 | |
01a545cf ET |
3327 | if (skb->ip_summed != CHECKSUM_PARTIAL) |
3328 | return 0; | |
3329 | ||
70a10e25 AD |
3330 | if (!skb_is_gso(skb)) |
3331 | return 0; | |
92915f71 | 3332 | |
8f12c034 FR |
3333 | err = skb_cow_head(skb, 0); |
3334 | if (err < 0) | |
3335 | return err; | |
92915f71 | 3336 | |
b83e3010 AD |
3337 | ip.hdr = skb_network_header(skb); |
3338 | l4.hdr = skb_checksum_start(skb); | |
3339 | ||
70a10e25 AD |
3340 | /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */ |
3341 | type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP; | |
3342 | ||
b83e3010 AD |
3343 | /* initialize outer IP header fields */ |
3344 | if (ip.v4->version == 4) { | |
c54cdc31 AD |
3345 | unsigned char *csum_start = skb_checksum_start(skb); |
3346 | unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4); | |
3347 | ||
b83e3010 AD |
3348 | /* IP header will have to cancel out any data that |
3349 | * is not a part of the outer IP header | |
3350 | */ | |
c54cdc31 AD |
3351 | ip.v4->check = csum_fold(csum_partial(trans_start, |
3352 | csum_start - trans_start, | |
3353 | 0)); | |
70a10e25 | 3354 | type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4; |
b83e3010 AD |
3355 | |
3356 | ip.v4->tot_len = 0; | |
7ad1a093 ET |
3357 | first->tx_flags |= IXGBE_TX_FLAGS_TSO | |
3358 | IXGBE_TX_FLAGS_CSUM | | |
3359 | IXGBE_TX_FLAGS_IPV4; | |
b83e3010 AD |
3360 | } else { |
3361 | ip.v6->payload_len = 0; | |
7ad1a093 ET |
3362 | first->tx_flags |= IXGBE_TX_FLAGS_TSO | |
3363 | IXGBE_TX_FLAGS_CSUM; | |
70a10e25 AD |
3364 | } |
3365 | ||
b83e3010 AD |
3366 | /* determine offset of inner transport header */ |
3367 | l4_offset = l4.hdr - skb->data; | |
3368 | ||
3369 | /* compute length of segmentation header */ | |
3370 | *hdr_len = (l4.tcp->doff * 4) + l4_offset; | |
70a10e25 | 3371 | |
b83e3010 AD |
3372 | /* remove payload length from inner checksum */ |
3373 | paylen = skb->len - l4_offset; | |
3374 | csum_replace_by_diff(&l4.tcp->check, htonl(paylen)); | |
3375 | ||
3376 | /* update gso size and bytecount with header size */ | |
7ad1a093 ET |
3377 | first->gso_segs = skb_shinfo(skb)->gso_segs; |
3378 | first->bytecount += (first->gso_segs - 1) * *hdr_len; | |
3379 | ||
70a10e25 | 3380 | /* mss_l4len_id: use 1 as index for TSO */ |
b83e3010 | 3381 | mss_l4len_idx = (*hdr_len - l4_offset) << IXGBE_ADVTXD_L4LEN_SHIFT; |
70a10e25 | 3382 | mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT; |
8d055cc0 | 3383 | mss_l4len_idx |= (1u << IXGBE_ADVTXD_IDX_SHIFT); |
70a10e25 AD |
3384 | |
3385 | /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */ | |
b83e3010 AD |
3386 | vlan_macip_lens = l4.hdr - ip.hdr; |
3387 | vlan_macip_lens |= (ip.hdr - skb->data) << IXGBE_ADVTXD_MACLEN_SHIFT; | |
7ad1a093 | 3388 | vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK; |
70a10e25 AD |
3389 | |
3390 | ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens, | |
3391 | type_tucmd, mss_l4len_idx); | |
3392 | ||
3393 | return 1; | |
92915f71 GR |
3394 | } |
3395 | ||
cb2b3edb AD |
3396 | static inline bool ixgbevf_ipv6_csum_is_sctp(struct sk_buff *skb) |
3397 | { | |
3398 | unsigned int offset = 0; | |
3399 | ||
3400 | ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL); | |
3401 | ||
3402 | return offset == skb_checksum_start_offset(skb); | |
3403 | } | |
3404 | ||
7ad1a093 ET |
3405 | static void ixgbevf_tx_csum(struct ixgbevf_ring *tx_ring, |
3406 | struct ixgbevf_tx_buffer *first) | |
92915f71 | 3407 | { |
7ad1a093 | 3408 | struct sk_buff *skb = first->skb; |
70a10e25 | 3409 | u32 vlan_macip_lens = 0; |
70a10e25 | 3410 | u32 type_tucmd = 0; |
92915f71 | 3411 | |
cb2b3edb AD |
3412 | if (skb->ip_summed != CHECKSUM_PARTIAL) |
3413 | goto no_csum; | |
92915f71 | 3414 | |
cb2b3edb AD |
3415 | switch (skb->csum_offset) { |
3416 | case offsetof(struct tcphdr, check): | |
3417 | type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP; | |
3418 | /* fall through */ | |
3419 | case offsetof(struct udphdr, check): | |
3420 | break; | |
3421 | case offsetof(struct sctphdr, checksum): | |
3422 | /* validate that this is actually an SCTP request */ | |
3423 | if (((first->protocol == htons(ETH_P_IP)) && | |
3424 | (ip_hdr(skb)->protocol == IPPROTO_SCTP)) || | |
3425 | ((first->protocol == htons(ETH_P_IPV6)) && | |
3426 | ixgbevf_ipv6_csum_is_sctp(skb))) { | |
3427 | type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_SCTP; | |
70a10e25 | 3428 | break; |
70a10e25 | 3429 | } |
cb2b3edb AD |
3430 | /* fall through */ |
3431 | default: | |
3432 | skb_checksum_help(skb); | |
3433 | goto no_csum; | |
92915f71 | 3434 | } |
cb2b3edb AD |
3435 | /* update TX checksum flag */ |
3436 | first->tx_flags |= IXGBE_TX_FLAGS_CSUM; | |
3437 | vlan_macip_lens = skb_checksum_start_offset(skb) - | |
3438 | skb_network_offset(skb); | |
d34a614a | 3439 | no_csum: |
70a10e25 AD |
3440 | /* vlan_macip_lens: MACLEN, VLAN tag */ |
3441 | vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT; | |
7ad1a093 | 3442 | vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK; |
70a10e25 | 3443 | |
cb2b3edb | 3444 | ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, 0); |
92915f71 GR |
3445 | } |
3446 | ||
29d37fa1 | 3447 | static __le32 ixgbevf_tx_cmd_type(u32 tx_flags) |
92915f71 | 3448 | { |
29d37fa1 ET |
3449 | /* set type for advanced descriptor with frame checksum insertion */ |
3450 | __le32 cmd_type = cpu_to_le32(IXGBE_ADVTXD_DTYP_DATA | | |
3451 | IXGBE_ADVTXD_DCMD_IFCS | | |
3452 | IXGBE_ADVTXD_DCMD_DEXT); | |
92915f71 | 3453 | |
dec0d8e4 | 3454 | /* set HW VLAN bit if VLAN is present */ |
29d37fa1 ET |
3455 | if (tx_flags & IXGBE_TX_FLAGS_VLAN) |
3456 | cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_VLE); | |
92915f71 | 3457 | |
29d37fa1 ET |
3458 | /* set segmentation enable bits for TSO/FSO */ |
3459 | if (tx_flags & IXGBE_TX_FLAGS_TSO) | |
3460 | cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_TSE); | |
92915f71 | 3461 | |
29d37fa1 ET |
3462 | return cmd_type; |
3463 | } | |
92915f71 | 3464 | |
29d37fa1 ET |
3465 | static void ixgbevf_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc, |
3466 | u32 tx_flags, unsigned int paylen) | |
3467 | { | |
3468 | __le32 olinfo_status = cpu_to_le32(paylen << IXGBE_ADVTXD_PAYLEN_SHIFT); | |
9bdfefd2 | 3469 | |
29d37fa1 ET |
3470 | /* enable L4 checksum for TSO and TX checksum offload */ |
3471 | if (tx_flags & IXGBE_TX_FLAGS_CSUM) | |
3472 | olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_TXSM); | |
92915f71 | 3473 | |
29d37fa1 ET |
3474 | /* enble IPv4 checksum for TSO */ |
3475 | if (tx_flags & IXGBE_TX_FLAGS_IPV4) | |
3476 | olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_IXSM); | |
92915f71 | 3477 | |
29d37fa1 ET |
3478 | /* use index 1 context for TSO/FSO/FCOE */ |
3479 | if (tx_flags & IXGBE_TX_FLAGS_TSO) | |
8d055cc0 | 3480 | olinfo_status |= cpu_to_le32(1u << IXGBE_ADVTXD_IDX_SHIFT); |
92915f71 | 3481 | |
29d37fa1 ET |
3482 | /* Check Context must be set if Tx switch is enabled, which it |
3483 | * always is for case where virtual functions are running | |
3484 | */ | |
3485 | olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_CC); | |
92915f71 | 3486 | |
29d37fa1 ET |
3487 | tx_desc->read.olinfo_status = olinfo_status; |
3488 | } | |
92915f71 | 3489 | |
29d37fa1 ET |
3490 | static void ixgbevf_tx_map(struct ixgbevf_ring *tx_ring, |
3491 | struct ixgbevf_tx_buffer *first, | |
3492 | const u8 hdr_len) | |
3493 | { | |
3494 | dma_addr_t dma; | |
3495 | struct sk_buff *skb = first->skb; | |
3496 | struct ixgbevf_tx_buffer *tx_buffer; | |
3497 | union ixgbe_adv_tx_desc *tx_desc; | |
3498 | struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0]; | |
3499 | unsigned int data_len = skb->data_len; | |
3500 | unsigned int size = skb_headlen(skb); | |
3501 | unsigned int paylen = skb->len - hdr_len; | |
3502 | u32 tx_flags = first->tx_flags; | |
3503 | __le32 cmd_type; | |
3504 | u16 i = tx_ring->next_to_use; | |
9bdfefd2 | 3505 | |
29d37fa1 | 3506 | tx_desc = IXGBEVF_TX_DESC(tx_ring, i); |
92915f71 | 3507 | |
29d37fa1 ET |
3508 | ixgbevf_tx_olinfo_status(tx_desc, tx_flags, paylen); |
3509 | cmd_type = ixgbevf_tx_cmd_type(tx_flags); | |
7ad1a093 | 3510 | |
29d37fa1 ET |
3511 | dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE); |
3512 | if (dma_mapping_error(tx_ring->dev, dma)) | |
3513 | goto dma_error; | |
92915f71 | 3514 | |
29d37fa1 ET |
3515 | /* record length, and DMA address */ |
3516 | dma_unmap_len_set(first, len, size); | |
3517 | dma_unmap_addr_set(first, dma, dma); | |
92915f71 | 3518 | |
29d37fa1 | 3519 | tx_desc->read.buffer_addr = cpu_to_le64(dma); |
92915f71 | 3520 | |
29d37fa1 ET |
3521 | for (;;) { |
3522 | while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) { | |
3523 | tx_desc->read.cmd_type_len = | |
3524 | cmd_type | cpu_to_le32(IXGBE_MAX_DATA_PER_TXD); | |
92915f71 | 3525 | |
29d37fa1 ET |
3526 | i++; |
3527 | tx_desc++; | |
3528 | if (i == tx_ring->count) { | |
3529 | tx_desc = IXGBEVF_TX_DESC(tx_ring, 0); | |
3530 | i = 0; | |
3531 | } | |
92915f71 | 3532 | |
29d37fa1 ET |
3533 | dma += IXGBE_MAX_DATA_PER_TXD; |
3534 | size -= IXGBE_MAX_DATA_PER_TXD; | |
92915f71 | 3535 | |
29d37fa1 ET |
3536 | tx_desc->read.buffer_addr = cpu_to_le64(dma); |
3537 | tx_desc->read.olinfo_status = 0; | |
3538 | } | |
92915f71 | 3539 | |
29d37fa1 ET |
3540 | if (likely(!data_len)) |
3541 | break; | |
92915f71 | 3542 | |
29d37fa1 | 3543 | tx_desc->read.cmd_type_len = cmd_type | cpu_to_le32(size); |
92915f71 | 3544 | |
29d37fa1 ET |
3545 | i++; |
3546 | tx_desc++; | |
3547 | if (i == tx_ring->count) { | |
3548 | tx_desc = IXGBEVF_TX_DESC(tx_ring, 0); | |
3549 | i = 0; | |
3550 | } | |
92915f71 | 3551 | |
29d37fa1 ET |
3552 | size = skb_frag_size(frag); |
3553 | data_len -= size; | |
92915f71 | 3554 | |
29d37fa1 ET |
3555 | dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size, |
3556 | DMA_TO_DEVICE); | |
3557 | if (dma_mapping_error(tx_ring->dev, dma)) | |
3558 | goto dma_error; | |
70a10e25 | 3559 | |
29d37fa1 ET |
3560 | tx_buffer = &tx_ring->tx_buffer_info[i]; |
3561 | dma_unmap_len_set(tx_buffer, len, size); | |
3562 | dma_unmap_addr_set(tx_buffer, dma, dma); | |
92915f71 | 3563 | |
29d37fa1 ET |
3564 | tx_desc->read.buffer_addr = cpu_to_le64(dma); |
3565 | tx_desc->read.olinfo_status = 0; | |
3566 | ||
3567 | frag++; | |
70a10e25 | 3568 | } |
92915f71 | 3569 | |
29d37fa1 ET |
3570 | /* write last descriptor with RS and EOP bits */ |
3571 | cmd_type |= cpu_to_le32(size) | cpu_to_le32(IXGBE_TXD_CMD); | |
3572 | tx_desc->read.cmd_type_len = cmd_type; | |
3573 | ||
3574 | /* set the timestamp */ | |
3575 | first->time_stamp = jiffies; | |
3576 | ||
3577 | /* Force memory writes to complete before letting h/w know there | |
3578 | * are new descriptors to fetch. (Only applicable for weak-ordered | |
3579 | * memory model archs, such as IA-64). | |
3580 | * | |
3581 | * We also need this memory barrier (wmb) to make certain all of the | |
3582 | * status bits have been updated before next_to_watch is written. | |
70a10e25 | 3583 | */ |
29d37fa1 | 3584 | wmb(); |
92915f71 | 3585 | |
29d37fa1 ET |
3586 | /* set next_to_watch value indicating a packet is present */ |
3587 | first->next_to_watch = tx_desc; | |
92915f71 | 3588 | |
29d37fa1 ET |
3589 | i++; |
3590 | if (i == tx_ring->count) | |
3591 | i = 0; | |
9bdfefd2 | 3592 | |
29d37fa1 | 3593 | tx_ring->next_to_use = i; |
92915f71 | 3594 | |
29d37fa1 | 3595 | /* notify HW of packet */ |
06380db6 | 3596 | ixgbevf_write_tail(tx_ring, i); |
29d37fa1 ET |
3597 | |
3598 | return; | |
3599 | dma_error: | |
3600 | dev_err(tx_ring->dev, "TX DMA map failed\n"); | |
3601 | ||
3602 | /* clear dma mappings for failed tx_buffer_info map */ | |
3603 | for (;;) { | |
3604 | tx_buffer = &tx_ring->tx_buffer_info[i]; | |
3605 | ixgbevf_unmap_and_free_tx_resource(tx_ring, tx_buffer); | |
3606 | if (tx_buffer == first) | |
3607 | break; | |
3608 | if (i == 0) | |
3609 | i = tx_ring->count; | |
3610 | i--; | |
3611 | } | |
92915f71 | 3612 | |
92915f71 | 3613 | tx_ring->next_to_use = i; |
92915f71 GR |
3614 | } |
3615 | ||
fb40195c | 3616 | static int __ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size) |
92915f71 | 3617 | { |
fb40195c | 3618 | netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index); |
92915f71 GR |
3619 | /* Herbert's original patch had: |
3620 | * smp_mb__after_netif_stop_queue(); | |
dec0d8e4 JK |
3621 | * but since that doesn't exist yet, just open code it. |
3622 | */ | |
92915f71 GR |
3623 | smp_mb(); |
3624 | ||
3625 | /* We need to check again in a case another CPU has just | |
dec0d8e4 JK |
3626 | * made room available. |
3627 | */ | |
f880d07b | 3628 | if (likely(ixgbevf_desc_unused(tx_ring) < size)) |
92915f71 GR |
3629 | return -EBUSY; |
3630 | ||
3631 | /* A reprieve! - use start_queue because it doesn't call schedule */ | |
fb40195c | 3632 | netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index); |
095e2617 ET |
3633 | ++tx_ring->tx_stats.restart_queue; |
3634 | ||
92915f71 GR |
3635 | return 0; |
3636 | } | |
3637 | ||
fb40195c | 3638 | static int ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size) |
92915f71 | 3639 | { |
f880d07b | 3640 | if (likely(ixgbevf_desc_unused(tx_ring) >= size)) |
92915f71 | 3641 | return 0; |
fb40195c | 3642 | return __ixgbevf_maybe_stop_tx(tx_ring, size); |
92915f71 GR |
3643 | } |
3644 | ||
3645 | static int ixgbevf_xmit_frame(struct sk_buff *skb, struct net_device *netdev) | |
3646 | { | |
3647 | struct ixgbevf_adapter *adapter = netdev_priv(netdev); | |
7ad1a093 | 3648 | struct ixgbevf_tx_buffer *first; |
92915f71 | 3649 | struct ixgbevf_ring *tx_ring; |
7ad1a093 ET |
3650 | int tso; |
3651 | u32 tx_flags = 0; | |
3595990a AD |
3652 | u16 count = TXD_USE_COUNT(skb_headlen(skb)); |
3653 | #if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD | |
3654 | unsigned short f; | |
3655 | #endif | |
7ad1a093 | 3656 | u8 hdr_len = 0; |
f9d08f16 | 3657 | u8 *dst_mac = skb_header_pointer(skb, 0, 0, NULL); |
7ad1a093 | 3658 | |
46acc460 | 3659 | if (!dst_mac || is_link_local_ether_addr(dst_mac)) { |
e7fcd543 | 3660 | dev_kfree_skb_any(skb); |
f9d08f16 GR |
3661 | return NETDEV_TX_OK; |
3662 | } | |
92915f71 | 3663 | |
7ad1a093 | 3664 | tx_ring = adapter->tx_ring[skb->queue_mapping]; |
92915f71 | 3665 | |
dec0d8e4 | 3666 | /* need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD, |
3595990a AD |
3667 | * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD, |
3668 | * + 2 desc gap to keep tail from touching head, | |
3669 | * + 1 desc for context descriptor, | |
3670 | * otherwise try next time | |
3671 | */ | |
3672 | #if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD | |
3673 | for (f = 0; f < skb_shinfo(skb)->nr_frags; f++) | |
3674 | count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size); | |
3675 | #else | |
3676 | count += skb_shinfo(skb)->nr_frags; | |
3677 | #endif | |
fb40195c | 3678 | if (ixgbevf_maybe_stop_tx(tx_ring, count + 3)) { |
095e2617 | 3679 | tx_ring->tx_stats.tx_busy++; |
3595990a AD |
3680 | return NETDEV_TX_BUSY; |
3681 | } | |
3682 | ||
7ad1a093 ET |
3683 | /* record the location of the first descriptor for this packet */ |
3684 | first = &tx_ring->tx_buffer_info[tx_ring->next_to_use]; | |
3685 | first->skb = skb; | |
3686 | first->bytecount = skb->len; | |
3687 | first->gso_segs = 1; | |
3688 | ||
df8a39de JP |
3689 | if (skb_vlan_tag_present(skb)) { |
3690 | tx_flags |= skb_vlan_tag_get(skb); | |
92915f71 GR |
3691 | tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT; |
3692 | tx_flags |= IXGBE_TX_FLAGS_VLAN; | |
3693 | } | |
3694 | ||
7ad1a093 ET |
3695 | /* record initial flags and protocol */ |
3696 | first->tx_flags = tx_flags; | |
3697 | first->protocol = vlan_get_protocol(skb); | |
92915f71 | 3698 | |
7ad1a093 ET |
3699 | tso = ixgbevf_tso(tx_ring, first, &hdr_len); |
3700 | if (tso < 0) | |
3701 | goto out_drop; | |
b5d217f3 | 3702 | else if (!tso) |
7ad1a093 | 3703 | ixgbevf_tx_csum(tx_ring, first); |
92915f71 | 3704 | |
29d37fa1 | 3705 | ixgbevf_tx_map(tx_ring, first, hdr_len); |
70a10e25 | 3706 | |
fb40195c | 3707 | ixgbevf_maybe_stop_tx(tx_ring, DESC_NEEDED); |
92915f71 | 3708 | |
7ad1a093 ET |
3709 | return NETDEV_TX_OK; |
3710 | ||
3711 | out_drop: | |
3712 | dev_kfree_skb_any(first->skb); | |
3713 | first->skb = NULL; | |
3714 | ||
92915f71 GR |
3715 | return NETDEV_TX_OK; |
3716 | } | |
3717 | ||
92915f71 GR |
3718 | /** |
3719 | * ixgbevf_set_mac - Change the Ethernet Address of the NIC | |
3720 | * @netdev: network interface device structure | |
3721 | * @p: pointer to an address structure | |
3722 | * | |
3723 | * Returns 0 on success, negative on failure | |
3724 | **/ | |
3725 | static int ixgbevf_set_mac(struct net_device *netdev, void *p) | |
3726 | { | |
3727 | struct ixgbevf_adapter *adapter = netdev_priv(netdev); | |
3728 | struct ixgbe_hw *hw = &adapter->hw; | |
3729 | struct sockaddr *addr = p; | |
32ca6868 | 3730 | int err; |
92915f71 GR |
3731 | |
3732 | if (!is_valid_ether_addr(addr->sa_data)) | |
3733 | return -EADDRNOTAVAIL; | |
3734 | ||
55fdd45b | 3735 | spin_lock_bh(&adapter->mbx_lock); |
1c55ed76 | 3736 | |
32ca6868 | 3737 | err = hw->mac.ops.set_rar(hw, 0, addr->sa_data, 0); |
92915f71 | 3738 | |
55fdd45b | 3739 | spin_unlock_bh(&adapter->mbx_lock); |
1c55ed76 | 3740 | |
32ca6868 ET |
3741 | if (err) |
3742 | return -EPERM; | |
3743 | ||
3744 | ether_addr_copy(hw->mac.addr, addr->sa_data); | |
3745 | ether_addr_copy(netdev->dev_addr, addr->sa_data); | |
3746 | ||
92915f71 GR |
3747 | return 0; |
3748 | } | |
3749 | ||
3750 | /** | |
3751 | * ixgbevf_change_mtu - Change the Maximum Transfer Unit | |
3752 | * @netdev: network interface device structure | |
3753 | * @new_mtu: new value for maximum frame size | |
3754 | * | |
3755 | * Returns 0 on success, negative on failure | |
3756 | **/ | |
3757 | static int ixgbevf_change_mtu(struct net_device *netdev, int new_mtu) | |
3758 | { | |
3759 | struct ixgbevf_adapter *adapter = netdev_priv(netdev); | |
bad17234 | 3760 | struct ixgbe_hw *hw = &adapter->hw; |
92915f71 | 3761 | int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN; |
6a11e52b | 3762 | int ret; |
69bfbec4 | 3763 | |
14b22cd9 | 3764 | spin_lock_bh(&adapter->mbx_lock); |
6a11e52b TN |
3765 | /* notify the PF of our intent to use this size of frame */ |
3766 | ret = hw->mac.ops.set_rlpml(hw, max_frame); | |
14b22cd9 | 3767 | spin_unlock_bh(&adapter->mbx_lock); |
6a11e52b TN |
3768 | if (ret) |
3769 | return -EINVAL; | |
3770 | ||
bad17234 | 3771 | hw_dbg(hw, "changing MTU from %d to %d\n", |
92915f71 | 3772 | netdev->mtu, new_mtu); |
6a11e52b | 3773 | |
92915f71 GR |
3774 | /* must set new MTU before calling down or up */ |
3775 | netdev->mtu = new_mtu; | |
3776 | ||
92915f71 GR |
3777 | return 0; |
3778 | } | |
3779 | ||
688ff32d ET |
3780 | #ifdef CONFIG_NET_POLL_CONTROLLER |
3781 | /* Polling 'interrupt' - used by things like netconsole to send skbs | |
3782 | * without having to re-enable interrupts. It's not called while | |
3783 | * the interrupt routine is executing. | |
3784 | */ | |
3785 | static void ixgbevf_netpoll(struct net_device *netdev) | |
3786 | { | |
3787 | struct ixgbevf_adapter *adapter = netdev_priv(netdev); | |
3788 | int i; | |
3789 | ||
3790 | /* if interface is down do nothing */ | |
3791 | if (test_bit(__IXGBEVF_DOWN, &adapter->state)) | |
3792 | return; | |
3793 | for (i = 0; i < adapter->num_rx_queues; i++) | |
3794 | ixgbevf_msix_clean_rings(0, adapter->q_vector[i]); | |
3795 | } | |
3796 | #endif /* CONFIG_NET_POLL_CONTROLLER */ | |
3797 | ||
0ac1e8ce | 3798 | static int ixgbevf_suspend(struct pci_dev *pdev, pm_message_t state) |
92915f71 GR |
3799 | { |
3800 | struct net_device *netdev = pci_get_drvdata(pdev); | |
3801 | struct ixgbevf_adapter *adapter = netdev_priv(netdev); | |
0ac1e8ce AD |
3802 | #ifdef CONFIG_PM |
3803 | int retval = 0; | |
3804 | #endif | |
92915f71 | 3805 | |
2dad7b27 | 3806 | rtnl_lock(); |
92915f71 GR |
3807 | netif_device_detach(netdev); |
3808 | ||
3809 | if (netif_running(netdev)) { | |
3810 | ixgbevf_down(adapter); | |
3811 | ixgbevf_free_irq(adapter); | |
3812 | ixgbevf_free_all_tx_resources(adapter); | |
3813 | ixgbevf_free_all_rx_resources(adapter); | |
eeffceee | 3814 | ixgbevf_clear_interrupt_scheme(adapter); |
92915f71 | 3815 | } |
2dad7b27 | 3816 | rtnl_unlock(); |
92915f71 | 3817 | |
0ac1e8ce AD |
3818 | #ifdef CONFIG_PM |
3819 | retval = pci_save_state(pdev); | |
3820 | if (retval) | |
3821 | return retval; | |
92915f71 | 3822 | |
0ac1e8ce | 3823 | #endif |
bc0c7151 MR |
3824 | if (!test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state)) |
3825 | pci_disable_device(pdev); | |
0ac1e8ce AD |
3826 | |
3827 | return 0; | |
3828 | } | |
3829 | ||
3830 | #ifdef CONFIG_PM | |
3831 | static int ixgbevf_resume(struct pci_dev *pdev) | |
3832 | { | |
27ae2967 WY |
3833 | struct net_device *netdev = pci_get_drvdata(pdev); |
3834 | struct ixgbevf_adapter *adapter = netdev_priv(netdev); | |
0ac1e8ce AD |
3835 | u32 err; |
3836 | ||
0ac1e8ce | 3837 | pci_restore_state(pdev); |
dec0d8e4 | 3838 | /* pci_restore_state clears dev->state_saved so call |
0ac1e8ce AD |
3839 | * pci_save_state to restore it. |
3840 | */ | |
3841 | pci_save_state(pdev); | |
3842 | ||
3843 | err = pci_enable_device_mem(pdev); | |
3844 | if (err) { | |
3845 | dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n"); | |
3846 | return err; | |
3847 | } | |
4e857c58 | 3848 | smp_mb__before_atomic(); |
bc0c7151 | 3849 | clear_bit(__IXGBEVF_DISABLED, &adapter->state); |
0ac1e8ce AD |
3850 | pci_set_master(pdev); |
3851 | ||
798e381a DS |
3852 | ixgbevf_reset(adapter); |
3853 | ||
0ac1e8ce AD |
3854 | rtnl_lock(); |
3855 | err = ixgbevf_init_interrupt_scheme(adapter); | |
3856 | rtnl_unlock(); | |
3857 | if (err) { | |
3858 | dev_err(&pdev->dev, "Cannot initialize interrupts\n"); | |
3859 | return err; | |
3860 | } | |
3861 | ||
0ac1e8ce AD |
3862 | if (netif_running(netdev)) { |
3863 | err = ixgbevf_open(netdev); | |
3864 | if (err) | |
3865 | return err; | |
3866 | } | |
3867 | ||
3868 | netif_device_attach(netdev); | |
3869 | ||
3870 | return err; | |
3871 | } | |
3872 | ||
3873 | #endif /* CONFIG_PM */ | |
3874 | static void ixgbevf_shutdown(struct pci_dev *pdev) | |
3875 | { | |
3876 | ixgbevf_suspend(pdev, PMSG_SUSPEND); | |
92915f71 GR |
3877 | } |
3878 | ||
4197aa7b ED |
3879 | static struct rtnl_link_stats64 *ixgbevf_get_stats(struct net_device *netdev, |
3880 | struct rtnl_link_stats64 *stats) | |
3881 | { | |
3882 | struct ixgbevf_adapter *adapter = netdev_priv(netdev); | |
3883 | unsigned int start; | |
3884 | u64 bytes, packets; | |
3885 | const struct ixgbevf_ring *ring; | |
3886 | int i; | |
3887 | ||
3888 | ixgbevf_update_stats(adapter); | |
3889 | ||
3890 | stats->multicast = adapter->stats.vfmprc - adapter->stats.base_vfmprc; | |
3891 | ||
3892 | for (i = 0; i < adapter->num_rx_queues; i++) { | |
87e70ab9 | 3893 | ring = adapter->rx_ring[i]; |
4197aa7b | 3894 | do { |
57a7744e | 3895 | start = u64_stats_fetch_begin_irq(&ring->syncp); |
095e2617 ET |
3896 | bytes = ring->stats.bytes; |
3897 | packets = ring->stats.packets; | |
57a7744e | 3898 | } while (u64_stats_fetch_retry_irq(&ring->syncp, start)); |
4197aa7b ED |
3899 | stats->rx_bytes += bytes; |
3900 | stats->rx_packets += packets; | |
3901 | } | |
3902 | ||
3903 | for (i = 0; i < adapter->num_tx_queues; i++) { | |
87e70ab9 | 3904 | ring = adapter->tx_ring[i]; |
4197aa7b | 3905 | do { |
57a7744e | 3906 | start = u64_stats_fetch_begin_irq(&ring->syncp); |
095e2617 ET |
3907 | bytes = ring->stats.bytes; |
3908 | packets = ring->stats.packets; | |
57a7744e | 3909 | } while (u64_stats_fetch_retry_irq(&ring->syncp, start)); |
4197aa7b ED |
3910 | stats->tx_bytes += bytes; |
3911 | stats->tx_packets += packets; | |
3912 | } | |
3913 | ||
3914 | return stats; | |
3915 | } | |
3916 | ||
b83e3010 AD |
3917 | #define IXGBEVF_MAX_MAC_HDR_LEN 127 |
3918 | #define IXGBEVF_MAX_NETWORK_HDR_LEN 511 | |
3919 | ||
3920 | static netdev_features_t | |
3921 | ixgbevf_features_check(struct sk_buff *skb, struct net_device *dev, | |
3922 | netdev_features_t features) | |
3923 | { | |
3924 | unsigned int network_hdr_len, mac_hdr_len; | |
3925 | ||
3926 | /* Make certain the headers can be described by a context descriptor */ | |
3927 | mac_hdr_len = skb_network_header(skb) - skb->data; | |
3928 | if (unlikely(mac_hdr_len > IXGBEVF_MAX_MAC_HDR_LEN)) | |
3929 | return features & ~(NETIF_F_HW_CSUM | | |
3930 | NETIF_F_SCTP_CRC | | |
3931 | NETIF_F_HW_VLAN_CTAG_TX | | |
3932 | NETIF_F_TSO | | |
3933 | NETIF_F_TSO6); | |
3934 | ||
3935 | network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb); | |
3936 | if (unlikely(network_hdr_len > IXGBEVF_MAX_NETWORK_HDR_LEN)) | |
3937 | return features & ~(NETIF_F_HW_CSUM | | |
3938 | NETIF_F_SCTP_CRC | | |
3939 | NETIF_F_TSO | | |
3940 | NETIF_F_TSO6); | |
3941 | ||
3942 | /* We can only support IPV4 TSO in tunnels if we can mangle the | |
3943 | * inner IP ID field, so strip TSO if MANGLEID is not supported. | |
3944 | */ | |
3945 | if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID)) | |
3946 | features &= ~NETIF_F_TSO; | |
3947 | ||
3948 | return features; | |
3949 | } | |
3950 | ||
0ac1e8ce | 3951 | static const struct net_device_ops ixgbevf_netdev_ops = { |
c12db769 SH |
3952 | .ndo_open = ixgbevf_open, |
3953 | .ndo_stop = ixgbevf_close, | |
3954 | .ndo_start_xmit = ixgbevf_xmit_frame, | |
3955 | .ndo_set_rx_mode = ixgbevf_set_rx_mode, | |
4197aa7b | 3956 | .ndo_get_stats64 = ixgbevf_get_stats, |
92915f71 | 3957 | .ndo_validate_addr = eth_validate_addr, |
c12db769 SH |
3958 | .ndo_set_mac_address = ixgbevf_set_mac, |
3959 | .ndo_change_mtu = ixgbevf_change_mtu, | |
3960 | .ndo_tx_timeout = ixgbevf_tx_timeout, | |
c12db769 SH |
3961 | .ndo_vlan_rx_add_vid = ixgbevf_vlan_rx_add_vid, |
3962 | .ndo_vlan_rx_kill_vid = ixgbevf_vlan_rx_kill_vid, | |
c777cdfa JK |
3963 | #ifdef CONFIG_NET_RX_BUSY_POLL |
3964 | .ndo_busy_poll = ixgbevf_busy_poll_recv, | |
3965 | #endif | |
688ff32d ET |
3966 | #ifdef CONFIG_NET_POLL_CONTROLLER |
3967 | .ndo_poll_controller = ixgbevf_netpoll, | |
3968 | #endif | |
b83e3010 | 3969 | .ndo_features_check = ixgbevf_features_check, |
92915f71 | 3970 | }; |
92915f71 GR |
3971 | |
3972 | static void ixgbevf_assign_netdev_ops(struct net_device *dev) | |
3973 | { | |
0ac1e8ce | 3974 | dev->netdev_ops = &ixgbevf_netdev_ops; |
92915f71 GR |
3975 | ixgbevf_set_ethtool_ops(dev); |
3976 | dev->watchdog_timeo = 5 * HZ; | |
3977 | } | |
3978 | ||
3979 | /** | |
3980 | * ixgbevf_probe - Device Initialization Routine | |
3981 | * @pdev: PCI device information struct | |
3982 | * @ent: entry in ixgbevf_pci_tbl | |
3983 | * | |
3984 | * Returns 0 on success, negative on failure | |
3985 | * | |
3986 | * ixgbevf_probe initializes an adapter identified by a pci_dev structure. | |
3987 | * The OS initialization, configuring of the adapter private structure, | |
3988 | * and a hardware reset occur. | |
3989 | **/ | |
1dd06ae8 | 3990 | static int ixgbevf_probe(struct pci_dev *pdev, const struct pci_device_id *ent) |
92915f71 GR |
3991 | { |
3992 | struct net_device *netdev; | |
3993 | struct ixgbevf_adapter *adapter = NULL; | |
3994 | struct ixgbe_hw *hw = NULL; | |
3995 | const struct ixgbevf_info *ii = ixgbevf_info_tbl[ent->driver_data]; | |
92915f71 | 3996 | int err, pci_using_dac; |
0333464f | 3997 | bool disable_dev = false; |
92915f71 GR |
3998 | |
3999 | err = pci_enable_device(pdev); | |
4000 | if (err) | |
4001 | return err; | |
4002 | ||
53567aa4 | 4003 | if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) { |
92915f71 GR |
4004 | pci_using_dac = 1; |
4005 | } else { | |
53567aa4 | 4006 | err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); |
92915f71 | 4007 | if (err) { |
dec0d8e4 | 4008 | dev_err(&pdev->dev, "No usable DMA configuration, aborting\n"); |
53567aa4 | 4009 | goto err_dma; |
92915f71 GR |
4010 | } |
4011 | pci_using_dac = 0; | |
4012 | } | |
4013 | ||
4014 | err = pci_request_regions(pdev, ixgbevf_driver_name); | |
4015 | if (err) { | |
4016 | dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err); | |
4017 | goto err_pci_reg; | |
4018 | } | |
4019 | ||
4020 | pci_set_master(pdev); | |
4021 | ||
92915f71 GR |
4022 | netdev = alloc_etherdev_mq(sizeof(struct ixgbevf_adapter), |
4023 | MAX_TX_QUEUES); | |
92915f71 GR |
4024 | if (!netdev) { |
4025 | err = -ENOMEM; | |
4026 | goto err_alloc_etherdev; | |
4027 | } | |
4028 | ||
4029 | SET_NETDEV_DEV(netdev, &pdev->dev); | |
4030 | ||
92915f71 GR |
4031 | adapter = netdev_priv(netdev); |
4032 | ||
4033 | adapter->netdev = netdev; | |
4034 | adapter->pdev = pdev; | |
4035 | hw = &adapter->hw; | |
4036 | hw->back = adapter; | |
b3f4d599 | 4037 | adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE); |
92915f71 | 4038 | |
dec0d8e4 | 4039 | /* call save state here in standalone driver because it relies on |
92915f71 GR |
4040 | * adapter struct to exist, and needs to call netdev_priv |
4041 | */ | |
4042 | pci_save_state(pdev); | |
4043 | ||
4044 | hw->hw_addr = ioremap(pci_resource_start(pdev, 0), | |
4045 | pci_resource_len(pdev, 0)); | |
dbf8b0d8 | 4046 | adapter->io_addr = hw->hw_addr; |
92915f71 GR |
4047 | if (!hw->hw_addr) { |
4048 | err = -EIO; | |
4049 | goto err_ioremap; | |
4050 | } | |
4051 | ||
4052 | ixgbevf_assign_netdev_ops(netdev); | |
4053 | ||
dec0d8e4 | 4054 | /* Setup HW API */ |
92915f71 GR |
4055 | memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops)); |
4056 | hw->mac.type = ii->mac; | |
4057 | ||
4058 | memcpy(&hw->mbx.ops, &ixgbevf_mbx_ops, | |
f416dfc0 | 4059 | sizeof(struct ixgbe_mbx_operations)); |
92915f71 | 4060 | |
92915f71 GR |
4061 | /* setup the private structure */ |
4062 | err = ixgbevf_sw_init(adapter); | |
1a0d6ae5 DK |
4063 | if (err) |
4064 | goto err_sw_init; | |
4065 | ||
4066 | /* The HW MAC address was set and/or determined in sw_init */ | |
1a0d6ae5 DK |
4067 | if (!is_valid_ether_addr(netdev->dev_addr)) { |
4068 | pr_err("invalid MAC address\n"); | |
4069 | err = -EIO; | |
4070 | goto err_sw_init; | |
4071 | } | |
92915f71 | 4072 | |
471a76de | 4073 | netdev->hw_features = NETIF_F_SG | |
dec0d8e4 JK |
4074 | NETIF_F_TSO | |
4075 | NETIF_F_TSO6 | | |
cb2b3edb AD |
4076 | NETIF_F_RXCSUM | |
4077 | NETIF_F_HW_CSUM | | |
4078 | NETIF_F_SCTP_CRC; | |
471a76de | 4079 | |
b83e3010 AD |
4080 | #define IXGBEVF_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \ |
4081 | NETIF_F_GSO_GRE_CSUM | \ | |
7e13318d | 4082 | NETIF_F_GSO_IPXIP4 | \ |
bf2d1df3 | 4083 | NETIF_F_GSO_IPXIP6 | \ |
b83e3010 AD |
4084 | NETIF_F_GSO_UDP_TUNNEL | \ |
4085 | NETIF_F_GSO_UDP_TUNNEL_CSUM) | |
92915f71 | 4086 | |
b83e3010 AD |
4087 | netdev->gso_partial_features = IXGBEVF_GSO_PARTIAL_FEATURES; |
4088 | netdev->hw_features |= NETIF_F_GSO_PARTIAL | | |
4089 | IXGBEVF_GSO_PARTIAL_FEATURES; | |
cb2b3edb | 4090 | |
b83e3010 | 4091 | netdev->features = netdev->hw_features; |
92915f71 GR |
4092 | |
4093 | if (pci_using_dac) | |
4094 | netdev->features |= NETIF_F_HIGHDMA; | |
4095 | ||
b83e3010 AD |
4096 | netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID; |
4097 | netdev->mpls_features |= NETIF_F_HW_CSUM; | |
4098 | netdev->hw_enc_features |= netdev->vlan_features; | |
4099 | ||
4100 | /* set this bit last since it cannot be part of vlan_features */ | |
4101 | netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER | | |
4102 | NETIF_F_HW_VLAN_CTAG_RX | | |
4103 | NETIF_F_HW_VLAN_CTAG_TX; | |
4104 | ||
01789349 JP |
4105 | netdev->priv_flags |= IFF_UNICAST_FLT; |
4106 | ||
91c527a5 JW |
4107 | /* MTU range: 68 - 1504 or 9710 */ |
4108 | netdev->min_mtu = ETH_MIN_MTU; | |
4109 | switch (adapter->hw.api_version) { | |
4110 | case ixgbe_mbox_api_11: | |
4111 | case ixgbe_mbox_api_12: | |
4112 | netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE - | |
4113 | (ETH_HLEN + ETH_FCS_LEN); | |
4114 | break; | |
4115 | default: | |
4116 | if (adapter->hw.mac.type != ixgbe_mac_82599_vf) | |
4117 | netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE - | |
4118 | (ETH_HLEN + ETH_FCS_LEN); | |
4119 | else | |
4120 | netdev->max_mtu = ETH_DATA_LEN + ETH_FCS_LEN; | |
4121 | break; | |
4122 | } | |
4123 | ||
ea699569 MR |
4124 | if (IXGBE_REMOVED(hw->hw_addr)) { |
4125 | err = -EIO; | |
4126 | goto err_sw_init; | |
4127 | } | |
9ac5c5cc ET |
4128 | |
4129 | setup_timer(&adapter->service_timer, &ixgbevf_service_timer, | |
4130 | (unsigned long)adapter); | |
4131 | ||
4132 | INIT_WORK(&adapter->service_task, ixgbevf_service_task); | |
4133 | set_bit(__IXGBEVF_SERVICE_INITED, &adapter->state); | |
4134 | clear_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state); | |
92915f71 GR |
4135 | |
4136 | err = ixgbevf_init_interrupt_scheme(adapter); | |
4137 | if (err) | |
4138 | goto err_sw_init; | |
4139 | ||
92915f71 GR |
4140 | strcpy(netdev->name, "eth%d"); |
4141 | ||
4142 | err = register_netdev(netdev); | |
4143 | if (err) | |
4144 | goto err_register; | |
4145 | ||
0333464f | 4146 | pci_set_drvdata(pdev, netdev); |
5d426ad1 GR |
4147 | netif_carrier_off(netdev); |
4148 | ||
33bd9f60 GR |
4149 | ixgbevf_init_last_counter_stats(adapter); |
4150 | ||
47068b0d ET |
4151 | /* print the VF info */ |
4152 | dev_info(&pdev->dev, "%pM\n", netdev->dev_addr); | |
4153 | dev_info(&pdev->dev, "MAC: %d\n", hw->mac.type); | |
92915f71 | 4154 | |
47068b0d ET |
4155 | switch (hw->mac.type) { |
4156 | case ixgbe_mac_X550_vf: | |
4157 | dev_info(&pdev->dev, "Intel(R) X550 Virtual Function\n"); | |
4158 | break; | |
4159 | case ixgbe_mac_X540_vf: | |
4160 | dev_info(&pdev->dev, "Intel(R) X540 Virtual Function\n"); | |
4161 | break; | |
4162 | case ixgbe_mac_82599_vf: | |
4163 | default: | |
4164 | dev_info(&pdev->dev, "Intel(R) 82599 Virtual Function\n"); | |
4165 | break; | |
4166 | } | |
92915f71 | 4167 | |
92915f71 GR |
4168 | return 0; |
4169 | ||
4170 | err_register: | |
0ac1e8ce | 4171 | ixgbevf_clear_interrupt_scheme(adapter); |
92915f71 GR |
4172 | err_sw_init: |
4173 | ixgbevf_reset_interrupt_capability(adapter); | |
dbf8b0d8 | 4174 | iounmap(adapter->io_addr); |
92915f71 | 4175 | err_ioremap: |
0333464f | 4176 | disable_dev = !test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state); |
92915f71 GR |
4177 | free_netdev(netdev); |
4178 | err_alloc_etherdev: | |
4179 | pci_release_regions(pdev); | |
4180 | err_pci_reg: | |
4181 | err_dma: | |
0333464f | 4182 | if (!adapter || disable_dev) |
bc0c7151 | 4183 | pci_disable_device(pdev); |
92915f71 GR |
4184 | return err; |
4185 | } | |
4186 | ||
4187 | /** | |
4188 | * ixgbevf_remove - Device Removal Routine | |
4189 | * @pdev: PCI device information struct | |
4190 | * | |
4191 | * ixgbevf_remove is called by the PCI subsystem to alert the driver | |
4192 | * that it should release a PCI device. The could be caused by a | |
4193 | * Hot-Plug event, or because the driver is going to be removed from | |
4194 | * memory. | |
4195 | **/ | |
9f9a12f8 | 4196 | static void ixgbevf_remove(struct pci_dev *pdev) |
92915f71 GR |
4197 | { |
4198 | struct net_device *netdev = pci_get_drvdata(pdev); | |
0333464f ET |
4199 | struct ixgbevf_adapter *adapter; |
4200 | bool disable_dev; | |
4201 | ||
4202 | if (!netdev) | |
4203 | return; | |
4204 | ||
4205 | adapter = netdev_priv(netdev); | |
92915f71 | 4206 | |
2e7cfbdd | 4207 | set_bit(__IXGBEVF_REMOVING, &adapter->state); |
9ac5c5cc | 4208 | cancel_work_sync(&adapter->service_task); |
92915f71 | 4209 | |
fd13a9ab | 4210 | if (netdev->reg_state == NETREG_REGISTERED) |
92915f71 | 4211 | unregister_netdev(netdev); |
92915f71 | 4212 | |
0ac1e8ce | 4213 | ixgbevf_clear_interrupt_scheme(adapter); |
92915f71 GR |
4214 | ixgbevf_reset_interrupt_capability(adapter); |
4215 | ||
dbf8b0d8 | 4216 | iounmap(adapter->io_addr); |
92915f71 GR |
4217 | pci_release_regions(pdev); |
4218 | ||
4219 | hw_dbg(&adapter->hw, "Remove complete\n"); | |
4220 | ||
0333464f | 4221 | disable_dev = !test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state); |
92915f71 GR |
4222 | free_netdev(netdev); |
4223 | ||
0333464f | 4224 | if (disable_dev) |
bc0c7151 | 4225 | pci_disable_device(pdev); |
92915f71 GR |
4226 | } |
4227 | ||
9f19f31d AD |
4228 | /** |
4229 | * ixgbevf_io_error_detected - called when PCI error is detected | |
4230 | * @pdev: Pointer to PCI device | |
4231 | * @state: The current pci connection state | |
4232 | * | |
4233 | * This function is called after a PCI bus error affecting | |
4234 | * this device has been detected. | |
dec0d8e4 | 4235 | **/ |
9f19f31d AD |
4236 | static pci_ers_result_t ixgbevf_io_error_detected(struct pci_dev *pdev, |
4237 | pci_channel_state_t state) | |
4238 | { | |
4239 | struct net_device *netdev = pci_get_drvdata(pdev); | |
4240 | struct ixgbevf_adapter *adapter = netdev_priv(netdev); | |
4241 | ||
9ac5c5cc | 4242 | if (!test_bit(__IXGBEVF_SERVICE_INITED, &adapter->state)) |
ea699569 MR |
4243 | return PCI_ERS_RESULT_DISCONNECT; |
4244 | ||
bc0c7151 | 4245 | rtnl_lock(); |
9f19f31d AD |
4246 | netif_device_detach(netdev); |
4247 | ||
bc0c7151 MR |
4248 | if (state == pci_channel_io_perm_failure) { |
4249 | rtnl_unlock(); | |
9f19f31d | 4250 | return PCI_ERS_RESULT_DISCONNECT; |
bc0c7151 | 4251 | } |
9f19f31d AD |
4252 | |
4253 | if (netif_running(netdev)) | |
4254 | ixgbevf_down(adapter); | |
4255 | ||
bc0c7151 MR |
4256 | if (!test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state)) |
4257 | pci_disable_device(pdev); | |
4258 | rtnl_unlock(); | |
9f19f31d AD |
4259 | |
4260 | /* Request a slot slot reset. */ | |
4261 | return PCI_ERS_RESULT_NEED_RESET; | |
4262 | } | |
4263 | ||
4264 | /** | |
4265 | * ixgbevf_io_slot_reset - called after the pci bus has been reset. | |
4266 | * @pdev: Pointer to PCI device | |
4267 | * | |
4268 | * Restart the card from scratch, as if from a cold-boot. Implementation | |
4269 | * resembles the first-half of the ixgbevf_resume routine. | |
dec0d8e4 | 4270 | **/ |
9f19f31d AD |
4271 | static pci_ers_result_t ixgbevf_io_slot_reset(struct pci_dev *pdev) |
4272 | { | |
4273 | struct net_device *netdev = pci_get_drvdata(pdev); | |
4274 | struct ixgbevf_adapter *adapter = netdev_priv(netdev); | |
4275 | ||
4276 | if (pci_enable_device_mem(pdev)) { | |
4277 | dev_err(&pdev->dev, | |
4278 | "Cannot re-enable PCI device after reset.\n"); | |
4279 | return PCI_ERS_RESULT_DISCONNECT; | |
4280 | } | |
4281 | ||
4e857c58 | 4282 | smp_mb__before_atomic(); |
bc0c7151 | 4283 | clear_bit(__IXGBEVF_DISABLED, &adapter->state); |
9f19f31d AD |
4284 | pci_set_master(pdev); |
4285 | ||
4286 | ixgbevf_reset(adapter); | |
4287 | ||
4288 | return PCI_ERS_RESULT_RECOVERED; | |
4289 | } | |
4290 | ||
4291 | /** | |
4292 | * ixgbevf_io_resume - called when traffic can start flowing again. | |
4293 | * @pdev: Pointer to PCI device | |
4294 | * | |
4295 | * This callback is called when the error recovery driver tells us that | |
4296 | * its OK to resume normal operation. Implementation resembles the | |
4297 | * second-half of the ixgbevf_resume routine. | |
dec0d8e4 | 4298 | **/ |
9f19f31d AD |
4299 | static void ixgbevf_io_resume(struct pci_dev *pdev) |
4300 | { | |
4301 | struct net_device *netdev = pci_get_drvdata(pdev); | |
4302 | struct ixgbevf_adapter *adapter = netdev_priv(netdev); | |
4303 | ||
4304 | if (netif_running(netdev)) | |
4305 | ixgbevf_up(adapter); | |
4306 | ||
4307 | netif_device_attach(netdev); | |
4308 | } | |
4309 | ||
4310 | /* PCI Error Recovery (ERS) */ | |
3646f0e5 | 4311 | static const struct pci_error_handlers ixgbevf_err_handler = { |
9f19f31d AD |
4312 | .error_detected = ixgbevf_io_error_detected, |
4313 | .slot_reset = ixgbevf_io_slot_reset, | |
4314 | .resume = ixgbevf_io_resume, | |
4315 | }; | |
4316 | ||
92915f71 | 4317 | static struct pci_driver ixgbevf_driver = { |
dec0d8e4 JK |
4318 | .name = ixgbevf_driver_name, |
4319 | .id_table = ixgbevf_pci_tbl, | |
4320 | .probe = ixgbevf_probe, | |
4321 | .remove = ixgbevf_remove, | |
0ac1e8ce AD |
4322 | #ifdef CONFIG_PM |
4323 | /* Power Management Hooks */ | |
dec0d8e4 JK |
4324 | .suspend = ixgbevf_suspend, |
4325 | .resume = ixgbevf_resume, | |
0ac1e8ce | 4326 | #endif |
dec0d8e4 JK |
4327 | .shutdown = ixgbevf_shutdown, |
4328 | .err_handler = &ixgbevf_err_handler | |
92915f71 GR |
4329 | }; |
4330 | ||
4331 | /** | |
65d676c8 | 4332 | * ixgbevf_init_module - Driver Registration Routine |
92915f71 | 4333 | * |
65d676c8 | 4334 | * ixgbevf_init_module is the first routine called when the driver is |
92915f71 GR |
4335 | * loaded. All it does is register with the PCI subsystem. |
4336 | **/ | |
4337 | static int __init ixgbevf_init_module(void) | |
4338 | { | |
dbd9636e JK |
4339 | pr_info("%s - version %s\n", ixgbevf_driver_string, |
4340 | ixgbevf_driver_version); | |
92915f71 | 4341 | |
dbd9636e | 4342 | pr_info("%s\n", ixgbevf_copyright); |
40a13e24 MR |
4343 | ixgbevf_wq = create_singlethread_workqueue(ixgbevf_driver_name); |
4344 | if (!ixgbevf_wq) { | |
4345 | pr_err("%s: Failed to create workqueue\n", ixgbevf_driver_name); | |
4346 | return -ENOMEM; | |
4347 | } | |
92915f71 | 4348 | |
50985b5f | 4349 | return pci_register_driver(&ixgbevf_driver); |
92915f71 GR |
4350 | } |
4351 | ||
4352 | module_init(ixgbevf_init_module); | |
4353 | ||
4354 | /** | |
65d676c8 | 4355 | * ixgbevf_exit_module - Driver Exit Cleanup Routine |
92915f71 | 4356 | * |
65d676c8 | 4357 | * ixgbevf_exit_module is called just before the driver is removed |
92915f71 GR |
4358 | * from memory. |
4359 | **/ | |
4360 | static void __exit ixgbevf_exit_module(void) | |
4361 | { | |
4362 | pci_unregister_driver(&ixgbevf_driver); | |
40a13e24 MR |
4363 | if (ixgbevf_wq) { |
4364 | destroy_workqueue(ixgbevf_wq); | |
4365 | ixgbevf_wq = NULL; | |
4366 | } | |
92915f71 GR |
4367 | } |
4368 | ||
4369 | #ifdef DEBUG | |
4370 | /** | |
65d676c8 | 4371 | * ixgbevf_get_hw_dev_name - return device name string |
92915f71 GR |
4372 | * used by hardware layer to print debugging information |
4373 | **/ | |
4374 | char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw) | |
4375 | { | |
4376 | struct ixgbevf_adapter *adapter = hw->back; | |
dec0d8e4 | 4377 | |
92915f71 GR |
4378 | return adapter->netdev->name; |
4379 | } | |
4380 | ||
4381 | #endif | |
4382 | module_exit(ixgbevf_exit_module); | |
4383 | ||
4384 | /* ixgbevf_main.c */ |