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ixgbevf: Do not rewind the Rx ring before bumping tail
[mirror_ubuntu-artful-kernel.git] / drivers / net / ethernet / intel / ixgbevf / ixgbevf_main.c
CommitLineData
92915f71
GR		 1/*******************************************************************************
2
3 Intel 82599 Virtual Function driver
5c47a2b6 4 Copyright(c) 1999 - 2012 Intel Corporation.
92915f71
GR		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26*******************************************************************************/
27
28
29/******************************************************************************
30 Copyright (c)2006 - 2007 Myricom, Inc. for some LRO specific code
31******************************************************************************/
dbd9636e
JK		 32
33#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
34
92915f71 35#include <linux/types.h>
dadcd65f 36#include <linux/bitops.h>
92915f71
GR		 37#include <linux/module.h>
38#include <linux/pci.h>
39#include <linux/netdevice.h>
40#include <linux/vmalloc.h>
41#include <linux/string.h>
42#include <linux/in.h>
43#include <linux/ip.h>
44#include <linux/tcp.h>
45#include <linux/ipv6.h>
5a0e3ad6 46#include <linux/slab.h>
92915f71
GR		 47#include <net/checksum.h>
48#include <net/ip6_checksum.h>
49#include <linux/ethtool.h>
01789349 50#include <linux/if.h>
92915f71 51#include <linux/if_vlan.h>
70c71606 52#include <linux/prefetch.h>
92915f71
GR		 53
54#include "ixgbevf.h"
55
3d8fe98f 56const char ixgbevf_driver_name[] = "ixgbevf";
92915f71 57static const char ixgbevf_driver_string[] =
422e05d1 58 "Intel(R) 10 Gigabit PCI Express Virtual Function Network Driver";
92915f71 59
9cd9130d 60#define DRV_VERSION "2.6.0-k"
92915f71 61const char ixgbevf_driver_version[] = DRV_VERSION;
66c87bd5 62static char ixgbevf_copyright[] =
5c47a2b6 63 "Copyright (c) 2009 - 2012 Intel Corporation.";
92915f71
GR		 64
65static const struct ixgbevf_info *ixgbevf_info_tbl[] = {
2316aa2a
GR		 66 [board_82599_vf] = &ixgbevf_82599_vf_info,
67 [board_X540_vf] = &ixgbevf_X540_vf_info,
92915f71
GR		 68};
69
70/* ixgbevf_pci_tbl - PCI Device ID Table
71 *
72 * Wildcard entries (PCI_ANY_ID) should come last
73 * Last entry must be all 0s
74 *
75 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
76 * Class, Class Mask, private data (not used) }
77 */
78static struct pci_device_id ixgbevf_pci_tbl[] = {
79 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF),
80 board_82599_vf},
2316aa2a
GR		 81 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540_VF),
82 board_X540_vf},
92915f71
GR		 83
84 /* required last entry */
85 {0, }
86};
87MODULE_DEVICE_TABLE(pci, ixgbevf_pci_tbl);
88
89MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
90MODULE_DESCRIPTION("Intel(R) 82599 Virtual Function Driver");
91MODULE_LICENSE("GPL");
92MODULE_VERSION(DRV_VERSION);
93
b3f4d599 94#define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
95static int debug = -1;
96module_param(debug, int, 0);
97MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
92915f71
GR		 98
99/* forward decls */
fa71ae27 100static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector);
92915f71
GR		 101
102static inline void ixgbevf_release_rx_desc(struct ixgbe_hw *hw,
103 struct ixgbevf_ring *rx_ring,
104 u32 val)
105{
106 /*
107 * Force memory writes to complete before letting h/w
108 * know there are new descriptors to fetch. (Only
109 * applicable for weak-ordered memory model archs,
110 * such as IA-64).
111 */
112 wmb();
113 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(rx_ring->reg_idx), val);
114}
115
49ce9c2c 116/**
65d676c8 117 * ixgbevf_set_ivar - set IVAR registers - maps interrupt causes to vectors
92915f71
GR		 118 * @adapter: pointer to adapter struct
119 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
120 * @queue: queue to map the corresponding interrupt to
121 * @msix_vector: the vector to map to the corresponding queue
122 *
123 */
124static void ixgbevf_set_ivar(struct ixgbevf_adapter *adapter, s8 direction,
125 u8 queue, u8 msix_vector)
126{
127 u32 ivar, index;
128 struct ixgbe_hw *hw = &adapter->hw;
129 if (direction == -1) {
130 /* other causes */
131 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
132 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC);
133 ivar &= ~0xFF;
134 ivar |= msix_vector;
135 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar);
136 } else {
137 /* tx or rx causes */
138 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
139 index = ((16 * (queue & 1)) + (8 * direction));
140 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(queue >> 1));
141 ivar &= ~(0xFF << index);
142 ivar |= (msix_vector << index);
143 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(queue >> 1), ivar);
144 }
145}
146
147static void ixgbevf_unmap_and_free_tx_resource(struct ixgbevf_adapter *adapter,
148 struct ixgbevf_tx_buffer
149 *tx_buffer_info)
150{
151 if (tx_buffer_info->dma) {
152 if (tx_buffer_info->mapped_as_page)
2a1f8794 153 dma_unmap_page(&adapter->pdev->dev,
92915f71
GR		 154 tx_buffer_info->dma,
155 tx_buffer_info->length,
2a1f8794 156 DMA_TO_DEVICE);
92915f71 157 else
2a1f8794 158 dma_unmap_single(&adapter->pdev->dev,
92915f71
GR		 159 tx_buffer_info->dma,
160 tx_buffer_info->length,
2a1f8794 161 DMA_TO_DEVICE);
92915f71
GR		 162 tx_buffer_info->dma = 0;
163 }
164 if (tx_buffer_info->skb) {
165 dev_kfree_skb_any(tx_buffer_info->skb);
166 tx_buffer_info->skb = NULL;
167 }
168 tx_buffer_info->time_stamp = 0;
169 /* tx_buffer_info must be completely set up in the transmit path */
170}
171
92915f71
GR		 172#define IXGBE_MAX_TXD_PWR 14
173#define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
174
175/* Tx Descriptors needed, worst case */
3595990a
AD		 176#define TXD_USE_COUNT(S) DIV_ROUND_UP((S), IXGBE_MAX_DATA_PER_TXD)
177#define DESC_NEEDED (MAX_SKB_FRAGS + 4)
92915f71
GR		 178
179static void ixgbevf_tx_timeout(struct net_device *netdev);
180
181/**
182 * ixgbevf_clean_tx_irq - Reclaim resources after transmit completes
fa71ae27 183 * @q_vector: board private structure
92915f71
GR		 184 * @tx_ring: tx ring to clean
185 **/
fa71ae27 186static bool ixgbevf_clean_tx_irq(struct ixgbevf_q_vector *q_vector,
92915f71
GR		 187 struct ixgbevf_ring *tx_ring)
188{
fa71ae27 189 struct ixgbevf_adapter *adapter = q_vector->adapter;
92915f71 190 struct net_device *netdev = adapter->netdev;
92915f71
GR		 191 union ixgbe_adv_tx_desc *tx_desc, *eop_desc;
192 struct ixgbevf_tx_buffer *tx_buffer_info;
193 unsigned int i, eop, count = 0;
194 unsigned int total_bytes = 0, total_packets = 0;
195
196 i = tx_ring->next_to_clean;
197 eop = tx_ring->tx_buffer_info[i].next_to_watch;
908421f6 198 eop_desc = IXGBEVF_TX_DESC(tx_ring, eop);
92915f71
GR		 199
200 while ((eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)) &&
fa71ae27 201 (count < tx_ring->count)) {
92915f71 202 bool cleaned = false;
2d0bb1c1 203 rmb(); /* read buffer_info after eop_desc */
98b9e48f
GR		 204 /* eop could change between read and DD-check */
205 if (unlikely(eop != tx_ring->tx_buffer_info[i].next_to_watch))
206 goto cont_loop;
92915f71
GR		 207 for ( ; !cleaned; count++) {
208 struct sk_buff *skb;
908421f6 209 tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
92915f71
GR		 210 tx_buffer_info = &tx_ring->tx_buffer_info[i];
211 cleaned = (i == eop);
212 skb = tx_buffer_info->skb;
213
214 if (cleaned && skb) {
215 unsigned int segs, bytecount;
216
217 /* gso_segs is currently only valid for tcp */
218 segs = skb_shinfo(skb)->gso_segs ?: 1;
219 /* multiply data chunks by size of headers */
220 bytecount = ((segs - 1) * skb_headlen(skb)) +
221 skb->len;
222 total_packets += segs;
223 total_bytes += bytecount;
224 }
225
226 ixgbevf_unmap_and_free_tx_resource(adapter,
227 tx_buffer_info);
228
229 tx_desc->wb.status = 0;
230
231 i++;
232 if (i == tx_ring->count)
233 i = 0;
234 }
235
98b9e48f 236cont_loop:
92915f71 237 eop = tx_ring->tx_buffer_info[i].next_to_watch;
908421f6 238 eop_desc = IXGBEVF_TX_DESC(tx_ring, eop);
92915f71
GR		 239 }
240
241 tx_ring->next_to_clean = i;
242
243#define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
244 if (unlikely(count && netif_carrier_ok(netdev) &&
245 (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
246 /* Make sure that anybody stopping the queue after this
247 * sees the new next_to_clean.
248 */
249 smp_mb();
92915f71
GR		 250 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
251 !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
252 netif_wake_subqueue(netdev, tx_ring->queue_index);
253 ++adapter->restart_queue;
254 }
92915f71
GR		 255 }
256
4197aa7b 257 u64_stats_update_begin(&tx_ring->syncp);
92915f71
GR		 258 tx_ring->total_bytes += total_bytes;
259 tx_ring->total_packets += total_packets;
4197aa7b 260 u64_stats_update_end(&tx_ring->syncp);
92915f71 261
fa71ae27 262 return count < tx_ring->count;
92915f71
GR		 263}
264
265/**
266 * ixgbevf_receive_skb - Send a completed packet up the stack
267 * @q_vector: structure containing interrupt and ring information
268 * @skb: packet to send up
269 * @status: hardware indication of status of receive
270 * @rx_ring: rx descriptor ring (for a specific queue) to setup
271 * @rx_desc: rx descriptor
272 **/
273static void ixgbevf_receive_skb(struct ixgbevf_q_vector *q_vector,
274 struct sk_buff *skb, u8 status,
275 struct ixgbevf_ring *ring,
276 union ixgbe_adv_rx_desc *rx_desc)
277{
278 struct ixgbevf_adapter *adapter = q_vector->adapter;
279 bool is_vlan = (status & IXGBE_RXD_STAT_VP);
dd1ed3b7 280 u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan);
92915f71 281
5d9a533b 282 if (is_vlan && test_bit(tag & VLAN_VID_MASK, adapter->active_vlans))
dadcd65f 283 __vlan_hwaccel_put_tag(skb, tag);
dadcd65f 284
77d5dfca 285 napi_gro_receive(&q_vector->napi, skb);
92915f71
GR		 286}
287
288/**
289 * ixgbevf_rx_checksum - indicate in skb if hw indicated a good cksum
290 * @adapter: address of board private structure
291 * @status_err: hardware indication of status of receive
292 * @skb: skb currently being received and modified
293 **/
294static inline void ixgbevf_rx_checksum(struct ixgbevf_adapter *adapter,
295 u32 status_err, struct sk_buff *skb)
296{
bc8acf2c 297 skb_checksum_none_assert(skb);
92915f71
GR		 298
299 /* Rx csum disabled */
525a940c 300 if (!(adapter->netdev->features & NETIF_F_RXCSUM))
92915f71
GR		 301 return;
302
303 /* if IP and error */
304 if ((status_err & IXGBE_RXD_STAT_IPCS) &&
305 (status_err & IXGBE_RXDADV_ERR_IPE)) {
306 adapter->hw_csum_rx_error++;
307 return;
308 }
309
310 if (!(status_err & IXGBE_RXD_STAT_L4CS))
311 return;
312
313 if (status_err & IXGBE_RXDADV_ERR_TCPE) {
314 adapter->hw_csum_rx_error++;
315 return;
316 }
317
318 /* It must be a TCP or UDP packet with a valid checksum */
319 skb->ip_summed = CHECKSUM_UNNECESSARY;
320 adapter->hw_csum_rx_good++;
321}
322
323/**
324 * ixgbevf_alloc_rx_buffers - Replace used receive buffers; packet split
325 * @adapter: address of board private structure
326 **/
327static void ixgbevf_alloc_rx_buffers(struct ixgbevf_adapter *adapter,
328 struct ixgbevf_ring *rx_ring,
329 int cleaned_count)
330{
331 struct pci_dev *pdev = adapter->pdev;
332 union ixgbe_adv_rx_desc *rx_desc;
333 struct ixgbevf_rx_buffer *bi;
334 struct sk_buff *skb;
335 unsigned int i;
336 unsigned int bufsz = rx_ring->rx_buf_len + NET_IP_ALIGN;
337
338 i = rx_ring->next_to_use;
339 bi = &rx_ring->rx_buffer_info[i];
340
341 while (cleaned_count--) {
908421f6 342 rx_desc = IXGBEVF_RX_DESC(rx_ring, i);
92915f71
GR		 343 skb = bi->skb;
344 if (!skb) {
345 skb = netdev_alloc_skb(adapter->netdev,
346 bufsz);
347
348 if (!skb) {
349 adapter->alloc_rx_buff_failed++;
350 goto no_buffers;
351 }
352
353 /*
354 * Make buffer alignment 2 beyond a 16 byte boundary
355 * this will result in a 16 byte aligned IP header after
356 * the 14 byte MAC header is removed
357 */
358 skb_reserve(skb, NET_IP_ALIGN);
359
360 bi->skb = skb;
361 }
362 if (!bi->dma) {
2a1f8794 363 bi->dma = dma_map_single(&pdev->dev, skb->data,
92915f71 364 rx_ring->rx_buf_len,
2a1f8794 365 DMA_FROM_DEVICE);
92915f71 366 }
77d5dfca 367 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
92915f71
GR		 368
369 i++;
370 if (i == rx_ring->count)
371 i = 0;
372 bi = &rx_ring->rx_buffer_info[i];
373 }
374
375no_buffers:
376 if (rx_ring->next_to_use != i) {
377 rx_ring->next_to_use = i;
92915f71
GR		 378
379 ixgbevf_release_rx_desc(&adapter->hw, rx_ring, i);
380 }
381}
382
383static inline void ixgbevf_irq_enable_queues(struct ixgbevf_adapter *adapter,
5f3600eb 384 u32 qmask)
92915f71 385{
92915f71
GR		 386 struct ixgbe_hw *hw = &adapter->hw;
387
5f3600eb 388 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, qmask);
92915f71
GR		 389}
390
92915f71
GR		 391static bool ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector,
392 struct ixgbevf_ring *rx_ring,
fa71ae27 393 int budget)
92915f71
GR		 394{
395 struct ixgbevf_adapter *adapter = q_vector->adapter;
396 struct pci_dev *pdev = adapter->pdev;
397 union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
398 struct ixgbevf_rx_buffer *rx_buffer_info, *next_buffer;
399 struct sk_buff *skb;
400 unsigned int i;
401 u32 len, staterr;
92915f71
GR		 402 int cleaned_count = 0;
403 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
404
405 i = rx_ring->next_to_clean;
908421f6 406 rx_desc = IXGBEVF_RX_DESC(rx_ring, i);
92915f71
GR		 407 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
408 rx_buffer_info = &rx_ring->rx_buffer_info[i];
409
410 while (staterr & IXGBE_RXD_STAT_DD) {
fa71ae27 411 if (!budget)
92915f71 412 break;
fa71ae27 413 budget--;
92915f71 414
2d0bb1c1 415 rmb(); /* read descriptor and rx_buffer_info after status DD */
77d5dfca 416 len = le16_to_cpu(rx_desc->wb.upper.length);
92915f71
GR		 417 skb = rx_buffer_info->skb;
418 prefetch(skb->data - NET_IP_ALIGN);
419 rx_buffer_info->skb = NULL;
420
421 if (rx_buffer_info->dma) {
2a1f8794 422 dma_unmap_single(&pdev->dev, rx_buffer_info->dma,
92915f71 423 rx_ring->rx_buf_len,
2a1f8794 424 DMA_FROM_DEVICE);
92915f71
GR		 425 rx_buffer_info->dma = 0;
426 skb_put(skb, len);
427 }
428
92915f71
GR		 429 i++;
430 if (i == rx_ring->count)
431 i = 0;
432
908421f6 433 next_rxd = IXGBEVF_RX_DESC(rx_ring, i);
92915f71
GR		 434 prefetch(next_rxd);
435 cleaned_count++;
436
437 next_buffer = &rx_ring->rx_buffer_info[i];
438
439 if (!(staterr & IXGBE_RXD_STAT_EOP)) {
77d5dfca
AD		 440 skb->next = next_buffer->skb;
441 skb->next->prev = skb;
92915f71
GR		 442 adapter->non_eop_descs++;
443 goto next_desc;
444 }
445
446 /* ERR_MASK will only have valid bits if EOP set */
447 if (unlikely(staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK)) {
448 dev_kfree_skb_irq(skb);
449 goto next_desc;
450 }
451
452 ixgbevf_rx_checksum(adapter, staterr, skb);
453
454 /* probably a little skewed due to removing CRC */
455 total_rx_bytes += skb->len;
456 total_rx_packets++;
457
458 /*
459 * Work around issue of some types of VM to VM loop back
460 * packets not getting split correctly
461 */
462 if (staterr & IXGBE_RXD_STAT_LB) {
e743d313 463 u32 header_fixup_len = skb_headlen(skb);
92915f71
GR		 464 if (header_fixup_len < 14)
465 skb_push(skb, header_fixup_len);
466 }
467 skb->protocol = eth_type_trans(skb, adapter->netdev);
468
469 ixgbevf_receive_skb(q_vector, skb, staterr, rx_ring, rx_desc);
92915f71
GR		 470
471next_desc:
472 rx_desc->wb.upper.status_error = 0;
473
474 /* return some buffers to hardware, one at a time is too slow */
475 if (cleaned_count >= IXGBEVF_RX_BUFFER_WRITE) {
476 ixgbevf_alloc_rx_buffers(adapter, rx_ring,
477 cleaned_count);
478 cleaned_count = 0;
479 }
480
481 /* use prefetched values */
482 rx_desc = next_rxd;
483 rx_buffer_info = &rx_ring->rx_buffer_info[i];
484
485 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
486 }
487
488 rx_ring->next_to_clean = i;
489 cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
490
491 if (cleaned_count)
492 ixgbevf_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
493
4197aa7b 494 u64_stats_update_begin(&rx_ring->syncp);
92915f71
GR		 495 rx_ring->total_packets += total_rx_packets;
496 rx_ring->total_bytes += total_rx_bytes;
4197aa7b 497 u64_stats_update_end(&rx_ring->syncp);
92915f71 498
fa71ae27 499 return !!budget;
92915f71
GR		 500}
501
502/**
fa71ae27 503 * ixgbevf_poll - NAPI polling calback
92915f71
GR		 504 * @napi: napi struct with our devices info in it
505 * @budget: amount of work driver is allowed to do this pass, in packets
506 *
fa71ae27 507 * This function will clean more than one or more rings associated with a
92915f71
GR		 508 * q_vector.
509 **/
fa71ae27 510static int ixgbevf_poll(struct napi_struct *napi, int budget)
92915f71
GR		 511{
512 struct ixgbevf_q_vector *q_vector =
513 container_of(napi, struct ixgbevf_q_vector, napi);
514 struct ixgbevf_adapter *adapter = q_vector->adapter;
fa71ae27
AD		 515 struct ixgbevf_ring *ring;
516 int per_ring_budget;
517 bool clean_complete = true;
518
519 ixgbevf_for_each_ring(ring, q_vector->tx)
520 clean_complete &= ixgbevf_clean_tx_irq(q_vector, ring);
92915f71
GR		 521
522 /* attempt to distribute budget to each queue fairly, but don't allow
523 * the budget to go below 1 because we'll exit polling */
fa71ae27
AD		 524 if (q_vector->rx.count > 1)
525 per_ring_budget = max(budget/q_vector->rx.count, 1);
526 else
527 per_ring_budget = budget;
528
529 ixgbevf_for_each_ring(ring, q_vector->rx)
530 clean_complete &= ixgbevf_clean_rx_irq(q_vector, ring,
531 per_ring_budget);
532
533 /* If all work not completed, return budget and keep polling */
534 if (!clean_complete)
535 return budget;
536 /* all work done, exit the polling mode */
537 napi_complete(napi);
538 if (adapter->rx_itr_setting & 1)
539 ixgbevf_set_itr(q_vector);
540 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
541 ixgbevf_irq_enable_queues(adapter,
542 1 << q_vector->v_idx);
92915f71 543
fa71ae27 544 return 0;
92915f71
GR		 545}
546
547
548/**
549 * ixgbevf_configure_msix - Configure MSI-X hardware
550 * @adapter: board private structure
551 *
552 * ixgbevf_configure_msix sets up the hardware to properly generate MSI-X
553 * interrupts.
554 **/
555static void ixgbevf_configure_msix(struct ixgbevf_adapter *adapter)
556{
557 struct ixgbevf_q_vector *q_vector;
6b43c446 558 int q_vectors, v_idx;
92915f71
GR		 559
560 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
5f3600eb 561 adapter->eims_enable_mask = 0;
92915f71
GR		 562
563 /*
564 * Populate the IVAR table and set the ITR values to the
565 * corresponding register.
566 */
567 for (v_idx = 0; v_idx < q_vectors; v_idx++) {
6b43c446 568 struct ixgbevf_ring *ring;
92915f71 569 q_vector = adapter->q_vector[v_idx];
6b43c446
AD		 570
571 ixgbevf_for_each_ring(ring, q_vector->rx)
572 ixgbevf_set_ivar(adapter, 0, ring->reg_idx, v_idx);
573
574 ixgbevf_for_each_ring(ring, q_vector->tx)
575 ixgbevf_set_ivar(adapter, 1, ring->reg_idx, v_idx);
92915f71 576
5f3600eb
AD		 577 if (q_vector->tx.ring && !q_vector->rx.ring) {
578 /* tx only vector */
579 if (adapter->tx_itr_setting == 1)
580 q_vector->itr = IXGBE_10K_ITR;
581 else
582 q_vector->itr = adapter->tx_itr_setting;
583 } else {
584 /* rx or rx/tx vector */
585 if (adapter->rx_itr_setting == 1)
586 q_vector->itr = IXGBE_20K_ITR;
587 else
588 q_vector->itr = adapter->rx_itr_setting;
589 }
590
591 /* add q_vector eims value to global eims_enable_mask */
592 adapter->eims_enable_mask |= 1 << v_idx;
92915f71 593
5f3600eb 594 ixgbevf_write_eitr(q_vector);
92915f71
GR		 595 }
596
597 ixgbevf_set_ivar(adapter, -1, 1, v_idx);
5f3600eb
AD		 598 /* setup eims_other and add value to global eims_enable_mask */
599 adapter->eims_other = 1 << v_idx;
600 adapter->eims_enable_mask |= adapter->eims_other;
92915f71
GR		 601}
602
603enum latency_range {
604 lowest_latency = 0,
605 low_latency = 1,
606 bulk_latency = 2,
607 latency_invalid = 255
608};
609
610/**
611 * ixgbevf_update_itr - update the dynamic ITR value based on statistics
5f3600eb
AD		 612 * @q_vector: structure containing interrupt and ring information
613 * @ring_container: structure containing ring performance data
92915f71
GR		 614 *
615 * Stores a new ITR value based on packets and byte
616 * counts during the last interrupt. The advantage of per interrupt
617 * computation is faster updates and more accurate ITR for the current
618 * traffic pattern. Constants in this function were computed
619 * based on theoretical maximum wire speed and thresholds were set based
620 * on testing data as well as attempting to minimize response time
621 * while increasing bulk throughput.
622 **/
5f3600eb
AD		 623static void ixgbevf_update_itr(struct ixgbevf_q_vector *q_vector,
624 struct ixgbevf_ring_container *ring_container)
92915f71 625{
5f3600eb
AD		 626 int bytes = ring_container->total_bytes;
627 int packets = ring_container->total_packets;
92915f71
GR		 628 u32 timepassed_us;
629 u64 bytes_perint;
5f3600eb 630 u8 itr_setting = ring_container->itr;
92915f71
GR		 631
632 if (packets == 0)
5f3600eb 633 return;
92915f71
GR		 634
635 /* simple throttlerate management
636 * 0-20MB/s lowest (100000 ints/s)
637 * 20-100MB/s low (20000 ints/s)
638 * 100-1249MB/s bulk (8000 ints/s)
639 */
640 /* what was last interrupt timeslice? */
5f3600eb 641 timepassed_us = q_vector->itr >> 2;
92915f71
GR		 642 bytes_perint = bytes / timepassed_us; /* bytes/usec */
643
644 switch (itr_setting) {
645 case lowest_latency:
e2c28ce7 646 if (bytes_perint > 10)
5f3600eb 647 itr_setting = low_latency;
92915f71
GR		 648 break;
649 case low_latency:
e2c28ce7 650 if (bytes_perint > 20)
5f3600eb 651 itr_setting = bulk_latency;
e2c28ce7 652 else if (bytes_perint <= 10)
5f3600eb 653 itr_setting = lowest_latency;
92915f71
GR		 654 break;
655 case bulk_latency:
e2c28ce7 656 if (bytes_perint <= 20)
5f3600eb 657 itr_setting = low_latency;
92915f71
GR		 658 break;
659 }
660
5f3600eb
AD		 661 /* clear work counters since we have the values we need */
662 ring_container->total_bytes = 0;
663 ring_container->total_packets = 0;
664
665 /* write updated itr to ring container */
666 ring_container->itr = itr_setting;
92915f71
GR		 667}
668
669/**
670 * ixgbevf_write_eitr - write VTEITR register in hardware specific way
5f3600eb 671 * @q_vector: structure containing interrupt and ring information
92915f71
GR		 672 *
673 * This function is made to be called by ethtool and by the driver
674 * when it needs to update VTEITR registers at runtime. Hardware
675 * specific quirks/differences are taken care of here.
676 */
5f3600eb 677void ixgbevf_write_eitr(struct ixgbevf_q_vector *q_vector)
92915f71 678{
5f3600eb 679 struct ixgbevf_adapter *adapter = q_vector->adapter;
92915f71 680 struct ixgbe_hw *hw = &adapter->hw;
5f3600eb
AD		 681 int v_idx = q_vector->v_idx;
682 u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
92915f71
GR		 683
684 /*
685 * set the WDIS bit to not clear the timer bits and cause an
686 * immediate assertion of the interrupt
687 */
688 itr_reg |= IXGBE_EITR_CNT_WDIS;
689
690 IXGBE_WRITE_REG(hw, IXGBE_VTEITR(v_idx), itr_reg);
691}
692
fa71ae27 693static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector)
92915f71 694{
5f3600eb
AD		 695 u32 new_itr = q_vector->itr;
696 u8 current_itr;
92915f71 697
5f3600eb
AD		 698 ixgbevf_update_itr(q_vector, &q_vector->tx);
699 ixgbevf_update_itr(q_vector, &q_vector->rx);
92915f71 700
6b43c446 701 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
92915f71
GR		 702
703 switch (current_itr) {
704 /* counts and packets in update_itr are dependent on these numbers */
705 case lowest_latency:
5f3600eb 706 new_itr = IXGBE_100K_ITR;
92915f71
GR		 707 break;
708 case low_latency:
5f3600eb 709 new_itr = IXGBE_20K_ITR;
92915f71
GR		 710 break;
711 case bulk_latency:
712 default:
5f3600eb 713 new_itr = IXGBE_8K_ITR;
92915f71
GR		 714 break;
715 }
716
5f3600eb 717 if (new_itr != q_vector->itr) {
92915f71 718 /* do an exponential smoothing */
5f3600eb
AD		 719 new_itr = (10 * new_itr * q_vector->itr) /
720 ((9 * new_itr) + q_vector->itr);
721
722 /* save the algorithm value here */
723 q_vector->itr = new_itr;
724
725 ixgbevf_write_eitr(q_vector);
92915f71 726 }
92915f71
GR		 727}
728
729static irqreturn_t ixgbevf_msix_mbx(int irq, void *data)
730{
fa71ae27 731 struct ixgbevf_adapter *adapter = data;
92915f71 732 struct ixgbe_hw *hw = &adapter->hw;
a9ee25a2 733 u32 msg;
375b27cf 734 bool got_ack = false;
92915f71 735
375b27cf
GR		 736 if (!hw->mbx.ops.check_for_ack(hw))
737 got_ack = true;
08259594 738
375b27cf
GR		 739 if (!hw->mbx.ops.check_for_msg(hw)) {
740 hw->mbx.ops.read(hw, &msg, 1);
a9ee25a2 741
375b27cf
GR		 742 if ((msg & IXGBE_MBVFICR_VFREQ_MASK) == IXGBE_PF_CONTROL_MSG)
743 mod_timer(&adapter->watchdog_timer,
744 round_jiffies(jiffies + 1));
a9ee25a2 745
375b27cf
GR		 746 if (msg & IXGBE_VT_MSGTYPE_NACK)
747 pr_warn("Last Request of type %2.2x to PF Nacked\n",
748 msg & 0xFF);
3a2c4033
GR		 749 /*
750 * Restore the PFSTS bit in case someone is polling for a
751 * return message from the PF
752 */
753 hw->mbx.v2p_mailbox |= IXGBE_VFMAILBOX_PFSTS;
375b27cf
GR		 754 }
755
756 /*
757 * checking for the ack clears the PFACK bit. Place
758 * it back in the v2p_mailbox cache so that anyone
759 * polling for an ack will not miss it
760 */
761 if (got_ack)
762 hw->mbx.v2p_mailbox |= IXGBE_VFMAILBOX_PFACK;
3a2c4033 763
5f3600eb
AD		 764 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_other);
765
92915f71
GR		 766 return IRQ_HANDLED;
767}
768
92915f71
GR		 769
770/**
fa71ae27 771 * ixgbevf_msix_clean_rings - single unshared vector rx clean (all queues)
92915f71
GR		 772 * @irq: unused
773 * @data: pointer to our q_vector struct for this interrupt vector
774 **/
fa71ae27 775static irqreturn_t ixgbevf_msix_clean_rings(int irq, void *data)
92915f71
GR		 776{
777 struct ixgbevf_q_vector *q_vector = data;
92915f71 778
5f3600eb 779 /* EIAM disabled interrupts (on this vector) for us */
fa71ae27
AD		 780 if (q_vector->rx.ring || q_vector->tx.ring)
781 napi_schedule(&q_vector->napi);
92915f71
GR		 782
783 return IRQ_HANDLED;
784}
785
786static inline void map_vector_to_rxq(struct ixgbevf_adapter *a, int v_idx,
787 int r_idx)
788{
789 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
790
6b43c446
AD		 791 a->rx_ring[r_idx].next = q_vector->rx.ring;
792 q_vector->rx.ring = &a->rx_ring[r_idx];
793 q_vector->rx.count++;
92915f71
GR		 794}
795
796static inline void map_vector_to_txq(struct ixgbevf_adapter *a, int v_idx,
797 int t_idx)
798{
799 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
800
6b43c446
AD		 801 a->tx_ring[t_idx].next = q_vector->tx.ring;
802 q_vector->tx.ring = &a->tx_ring[t_idx];
803 q_vector->tx.count++;
92915f71
GR		 804}
805
806/**
807 * ixgbevf_map_rings_to_vectors - Maps descriptor rings to vectors
808 * @adapter: board private structure to initialize
809 *
810 * This function maps descriptor rings to the queue-specific vectors
811 * we were allotted through the MSI-X enabling code. Ideally, we'd have
812 * one vector per ring/queue, but on a constrained vector budget, we
813 * group the rings as "efficiently" as possible. You would add new
814 * mapping configurations in here.
815 **/
816static int ixgbevf_map_rings_to_vectors(struct ixgbevf_adapter *adapter)
817{
818 int q_vectors;
819 int v_start = 0;
820 int rxr_idx = 0, txr_idx = 0;
821 int rxr_remaining = adapter->num_rx_queues;
822 int txr_remaining = adapter->num_tx_queues;
823 int i, j;
824 int rqpv, tqpv;
825 int err = 0;
826
827 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
828
829 /*
830 * The ideal configuration...
831 * We have enough vectors to map one per queue.
832 */
833 if (q_vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
834 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
835 map_vector_to_rxq(adapter, v_start, rxr_idx);
836
837 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
838 map_vector_to_txq(adapter, v_start, txr_idx);
839 goto out;
840 }
841
842 /*
843 * If we don't have enough vectors for a 1-to-1
844 * mapping, we'll have to group them so there are
845 * multiple queues per vector.
846 */
847 /* Re-adjusting *qpv takes care of the remainder. */
848 for (i = v_start; i < q_vectors; i++) {
849 rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - i);
850 for (j = 0; j < rqpv; j++) {
851 map_vector_to_rxq(adapter, i, rxr_idx);
852 rxr_idx++;
853 rxr_remaining--;
854 }
855 }
856 for (i = v_start; i < q_vectors; i++) {
857 tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - i);
858 for (j = 0; j < tqpv; j++) {
859 map_vector_to_txq(adapter, i, txr_idx);
860 txr_idx++;
861 txr_remaining--;
862 }
863 }
864
865out:
866 return err;
867}
868
869/**
870 * ixgbevf_request_msix_irqs - Initialize MSI-X interrupts
871 * @adapter: board private structure
872 *
873 * ixgbevf_request_msix_irqs allocates MSI-X vectors and requests
874 * interrupts from the kernel.
875 **/
876static int ixgbevf_request_msix_irqs(struct ixgbevf_adapter *adapter)
877{
878 struct net_device *netdev = adapter->netdev;
fa71ae27
AD		 879 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
880 int vector, err;
92915f71
GR		 881 int ri = 0, ti = 0;
882
92915f71 883 for (vector = 0; vector < q_vectors; vector++) {
fa71ae27
AD		 884 struct ixgbevf_q_vector *q_vector = adapter->q_vector[vector];
885 struct msix_entry *entry = &adapter->msix_entries[vector];
886
887 if (q_vector->tx.ring && q_vector->rx.ring) {
888 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
889 "%s-%s-%d", netdev->name, "TxRx", ri++);
890 ti++;
891 } else if (q_vector->rx.ring) {
892 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
893 "%s-%s-%d", netdev->name, "rx", ri++);
894 } else if (q_vector->tx.ring) {
895 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
896 "%s-%s-%d", netdev->name, "tx", ti++);
92915f71
GR		 897 } else {
898 /* skip this unused q_vector */
899 continue;
900 }
fa71ae27
AD		 901 err = request_irq(entry->vector, &ixgbevf_msix_clean_rings, 0,
902 q_vector->name, q_vector);
92915f71
GR		 903 if (err) {
904 hw_dbg(&adapter->hw,
905 "request_irq failed for MSIX interrupt "
906 "Error: %d\n", err);
907 goto free_queue_irqs;
908 }
909 }
910
92915f71 911 err = request_irq(adapter->msix_entries[vector].vector,
fa71ae27 912 &ixgbevf_msix_mbx, 0, netdev->name, adapter);
92915f71
GR		 913 if (err) {
914 hw_dbg(&adapter->hw,
915 "request_irq for msix_mbx failed: %d\n", err);
916 goto free_queue_irqs;
917 }
918
919 return 0;
920
921free_queue_irqs:
fa71ae27
AD		 922 while (vector) {
923 vector--;
924 free_irq(adapter->msix_entries[vector].vector,
925 adapter->q_vector[vector]);
926 }
92915f71
GR		 927 pci_disable_msix(adapter->pdev);
928 kfree(adapter->msix_entries);
929 adapter->msix_entries = NULL;
930 return err;
931}
932
933static inline void ixgbevf_reset_q_vectors(struct ixgbevf_adapter *adapter)
934{
935 int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
936
937 for (i = 0; i < q_vectors; i++) {
938 struct ixgbevf_q_vector *q_vector = adapter->q_vector[i];
6b43c446
AD		 939 q_vector->rx.ring = NULL;
940 q_vector->tx.ring = NULL;
941 q_vector->rx.count = 0;
942 q_vector->tx.count = 0;
92915f71
GR		 943 }
944}
945
946/**
947 * ixgbevf_request_irq - initialize interrupts
948 * @adapter: board private structure
949 *
950 * Attempts to configure interrupts using the best available
951 * capabilities of the hardware and kernel.
952 **/
953static int ixgbevf_request_irq(struct ixgbevf_adapter *adapter)
954{
955 int err = 0;
956
957 err = ixgbevf_request_msix_irqs(adapter);
958
959 if (err)
960 hw_dbg(&adapter->hw,
961 "request_irq failed, Error %d\n", err);
962
963 return err;
964}
965
966static void ixgbevf_free_irq(struct ixgbevf_adapter *adapter)
967{
92915f71
GR		 968 int i, q_vectors;
969
970 q_vectors = adapter->num_msix_vectors;
92915f71
GR		 971 i = q_vectors - 1;
972
fa71ae27 973 free_irq(adapter->msix_entries[i].vector, adapter);
92915f71
GR		 974 i--;
975
976 for (; i >= 0; i--) {
fa71ae27
AD		 977 /* free only the irqs that were actually requested */
978 if (!adapter->q_vector[i]->rx.ring &&
979 !adapter->q_vector[i]->tx.ring)
980 continue;
981
92915f71
GR		 982 free_irq(adapter->msix_entries[i].vector,
983 adapter->q_vector[i]);
984 }
985
986 ixgbevf_reset_q_vectors(adapter);
987}
988
989/**
990 * ixgbevf_irq_disable - Mask off interrupt generation on the NIC
991 * @adapter: board private structure
992 **/
993static inline void ixgbevf_irq_disable(struct ixgbevf_adapter *adapter)
994{
92915f71 995 struct ixgbe_hw *hw = &adapter->hw;
5f3600eb 996 int i;
92915f71 997
5f3600eb 998 IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, 0);
92915f71 999 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, ~0);
5f3600eb 1000 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, 0);
92915f71
GR		 1001
1002 IXGBE_WRITE_FLUSH(hw);
1003
1004 for (i = 0; i < adapter->num_msix_vectors; i++)
1005 synchronize_irq(adapter->msix_entries[i].vector);
1006}
1007
1008/**
1009 * ixgbevf_irq_enable - Enable default interrupt generation settings
1010 * @adapter: board private structure
1011 **/
5f3600eb 1012static inline void ixgbevf_irq_enable(struct ixgbevf_adapter *adapter)
92915f71
GR		 1013{
1014 struct ixgbe_hw *hw = &adapter->hw;
92915f71 1015
5f3600eb
AD		 1016 IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, adapter->eims_enable_mask);
1017 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, adapter->eims_enable_mask);
1018 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_enable_mask);
92915f71
GR		 1019}
1020
1021/**
1022 * ixgbevf_configure_tx - Configure 82599 VF Transmit Unit after Reset
1023 * @adapter: board private structure
1024 *
1025 * Configure the Tx unit of the MAC after a reset.
1026 **/
1027static void ixgbevf_configure_tx(struct ixgbevf_adapter *adapter)
1028{
1029 u64 tdba;
1030 struct ixgbe_hw *hw = &adapter->hw;
1031 u32 i, j, tdlen, txctrl;
1032
1033 /* Setup the HW Tx Head and Tail descriptor pointers */
1034 for (i = 0; i < adapter->num_tx_queues; i++) {
1035 struct ixgbevf_ring *ring = &adapter->tx_ring[i];
1036 j = ring->reg_idx;
1037 tdba = ring->dma;
1038 tdlen = ring->count * sizeof(union ixgbe_adv_tx_desc);
1039 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(j),
1040 (tdba & DMA_BIT_MASK(32)));
1041 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAH(j), (tdba >> 32));
1042 IXGBE_WRITE_REG(hw, IXGBE_VFTDLEN(j), tdlen);
1043 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(j), 0);
1044 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(j), 0);
1045 adapter->tx_ring[i].head = IXGBE_VFTDH(j);
1046 adapter->tx_ring[i].tail = IXGBE_VFTDT(j);
1047 /* Disable Tx Head Writeback RO bit, since this hoses
1048 * bookkeeping if things aren't delivered in order.
1049 */
1050 txctrl = IXGBE_READ_REG(hw, IXGBE_VFDCA_TXCTRL(j));
1051 txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN;
1052 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(j), txctrl);
1053 }
1054}
1055
1056#define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1057
1058static void ixgbevf_configure_srrctl(struct ixgbevf_adapter *adapter, int index)
1059{
1060 struct ixgbevf_ring *rx_ring;
1061 struct ixgbe_hw *hw = &adapter->hw;
1062 u32 srrctl;
1063
1064 rx_ring = &adapter->rx_ring[index];
1065
1066 srrctl = IXGBE_SRRCTL_DROP_EN;
1067
77d5dfca 1068 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
92915f71 1069
77d5dfca
AD		 1070 if (rx_ring->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE)
1071 srrctl |= IXGBEVF_RXBUFFER_2048 >>
1072 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1073 else
1074 srrctl |= rx_ring->rx_buf_len >>
1075 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
92915f71
GR		 1076 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(index), srrctl);
1077}
1078
1079/**
1080 * ixgbevf_configure_rx - Configure 82599 VF Receive Unit after Reset
1081 * @adapter: board private structure
1082 *
1083 * Configure the Rx unit of the MAC after a reset.
1084 **/
1085static void ixgbevf_configure_rx(struct ixgbevf_adapter *adapter)
1086{
1087 u64 rdba;
1088 struct ixgbe_hw *hw = &adapter->hw;
1089 struct net_device *netdev = adapter->netdev;
1090 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1091 int i, j;
1092 u32 rdlen;
1093 int rx_buf_len;
1094
77d5dfca
AD		 1095 /* PSRTYPE must be initialized in 82599 */
1096 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0);
1097 if (netdev->mtu <= ETH_DATA_LEN)
1098 rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1099 else
1100 rx_buf_len = ALIGN(max_frame, 1024);
92915f71
GR		 1101
1102 rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
1103 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1104 * the Base and Length of the Rx Descriptor Ring */
1105 for (i = 0; i < adapter->num_rx_queues; i++) {
1106 rdba = adapter->rx_ring[i].dma;
1107 j = adapter->rx_ring[i].reg_idx;
1108 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAL(j),
1109 (rdba & DMA_BIT_MASK(32)));
1110 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAH(j), (rdba >> 32));
1111 IXGBE_WRITE_REG(hw, IXGBE_VFRDLEN(j), rdlen);
1112 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(j), 0);
1113 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(j), 0);
1114 adapter->rx_ring[i].head = IXGBE_VFRDH(j);
1115 adapter->rx_ring[i].tail = IXGBE_VFRDT(j);
1116 adapter->rx_ring[i].rx_buf_len = rx_buf_len;
1117
1118 ixgbevf_configure_srrctl(adapter, j);
1119 }
1120}
1121
8e586137 1122static int ixgbevf_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
92915f71
GR		 1123{
1124 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1125 struct ixgbe_hw *hw = &adapter->hw;
92915f71
GR		 1126
1127 /* add VID to filter table */
1128 if (hw->mac.ops.set_vfta)
1129 hw->mac.ops.set_vfta(hw, vid, 0, true);
dadcd65f 1130 set_bit(vid, adapter->active_vlans);
8e586137
JP		 1131
1132 return 0;
92915f71
GR		 1133}
1134
8e586137 1135static int ixgbevf_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
92915f71
GR		 1136{
1137 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1138 struct ixgbe_hw *hw = &adapter->hw;
1139
92915f71
GR		 1140 /* remove VID from filter table */
1141 if (hw->mac.ops.set_vfta)
1142 hw->mac.ops.set_vfta(hw, vid, 0, false);
dadcd65f 1143 clear_bit(vid, adapter->active_vlans);
8e586137
JP		 1144
1145 return 0;
92915f71
GR		 1146}
1147
1148static void ixgbevf_restore_vlan(struct ixgbevf_adapter *adapter)
1149{
dadcd65f 1150 u16 vid;
92915f71 1151
dadcd65f
JP		 1152 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
1153 ixgbevf_vlan_rx_add_vid(adapter->netdev, vid);
92915f71
GR		 1154}
1155
46ec20ff
GR		 1156static int ixgbevf_write_uc_addr_list(struct net_device *netdev)
1157{
1158 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1159 struct ixgbe_hw *hw = &adapter->hw;
1160 int count = 0;
1161
1162 if ((netdev_uc_count(netdev)) > 10) {
dbd9636e 1163 pr_err("Too many unicast filters - No Space\n");
46ec20ff
GR		 1164 return -ENOSPC;
1165 }
1166
1167 if (!netdev_uc_empty(netdev)) {
1168 struct netdev_hw_addr *ha;
1169 netdev_for_each_uc_addr(ha, netdev) {
1170 hw->mac.ops.set_uc_addr(hw, ++count, ha->addr);
1171 udelay(200);
1172 }
1173 } else {
1174 /*
1175 * If the list is empty then send message to PF driver to
1176 * clear all macvlans on this VF.
1177 */
1178 hw->mac.ops.set_uc_addr(hw, 0, NULL);
1179 }
1180
1181 return count;
1182}
1183
92915f71
GR		 1184/**
1185 * ixgbevf_set_rx_mode - Multicast set
1186 * @netdev: network interface device structure
1187 *
1188 * The set_rx_method entry point is called whenever the multicast address
1189 * list or the network interface flags are updated. This routine is
1190 * responsible for configuring the hardware for proper multicast mode.
1191 **/
1192static void ixgbevf_set_rx_mode(struct net_device *netdev)
1193{
1194 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1195 struct ixgbe_hw *hw = &adapter->hw;
92915f71
GR		 1196
1197 /* reprogram multicast list */
92915f71 1198 if (hw->mac.ops.update_mc_addr_list)
5c58c47a 1199 hw->mac.ops.update_mc_addr_list(hw, netdev);
46ec20ff
GR		 1200
1201 ixgbevf_write_uc_addr_list(netdev);
92915f71
GR		 1202}
1203
1204static void ixgbevf_napi_enable_all(struct ixgbevf_adapter *adapter)
1205{
1206 int q_idx;
1207 struct ixgbevf_q_vector *q_vector;
1208 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1209
1210 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
92915f71 1211 q_vector = adapter->q_vector[q_idx];
fa71ae27 1212 napi_enable(&q_vector->napi);
92915f71
GR		 1213 }
1214}
1215
1216static void ixgbevf_napi_disable_all(struct ixgbevf_adapter *adapter)
1217{
1218 int q_idx;
1219 struct ixgbevf_q_vector *q_vector;
1220 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1221
1222 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1223 q_vector = adapter->q_vector[q_idx];
92915f71
GR		 1224 napi_disable(&q_vector->napi);
1225 }
1226}
1227
1228static void ixgbevf_configure(struct ixgbevf_adapter *adapter)
1229{
1230 struct net_device *netdev = adapter->netdev;
1231 int i;
1232
1233 ixgbevf_set_rx_mode(netdev);
1234
1235 ixgbevf_restore_vlan(adapter);
1236
1237 ixgbevf_configure_tx(adapter);
1238 ixgbevf_configure_rx(adapter);
1239 for (i = 0; i < adapter->num_rx_queues; i++) {
1240 struct ixgbevf_ring *ring = &adapter->rx_ring[i];
18c63089
AD		 1241 ixgbevf_alloc_rx_buffers(adapter, ring,
1242 IXGBE_DESC_UNUSED(ring));
92915f71
GR		 1243 }
1244}
1245
1246#define IXGBE_MAX_RX_DESC_POLL 10
1247static inline void ixgbevf_rx_desc_queue_enable(struct ixgbevf_adapter *adapter,
1248 int rxr)
1249{
1250 struct ixgbe_hw *hw = &adapter->hw;
1251 int j = adapter->rx_ring[rxr].reg_idx;
1252 int k;
1253
1254 for (k = 0; k < IXGBE_MAX_RX_DESC_POLL; k++) {
1255 if (IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j)) & IXGBE_RXDCTL_ENABLE)
1256 break;
1257 else
1258 msleep(1);
1259 }
1260 if (k >= IXGBE_MAX_RX_DESC_POLL) {
1261 hw_dbg(hw, "RXDCTL.ENABLE on Rx queue %d "
1262 "not set within the polling period\n", rxr);
1263 }
1264
1265 ixgbevf_release_rx_desc(&adapter->hw, &adapter->rx_ring[rxr],
1266 (adapter->rx_ring[rxr].count - 1));
1267}
1268
33bd9f60
GR		 1269static void ixgbevf_save_reset_stats(struct ixgbevf_adapter *adapter)
1270{
1271 /* Only save pre-reset stats if there are some */
1272 if (adapter->stats.vfgprc || adapter->stats.vfgptc) {
1273 adapter->stats.saved_reset_vfgprc += adapter->stats.vfgprc -
1274 adapter->stats.base_vfgprc;
1275 adapter->stats.saved_reset_vfgptc += adapter->stats.vfgptc -
1276 adapter->stats.base_vfgptc;
1277 adapter->stats.saved_reset_vfgorc += adapter->stats.vfgorc -
1278 adapter->stats.base_vfgorc;
1279 adapter->stats.saved_reset_vfgotc += adapter->stats.vfgotc -
1280 adapter->stats.base_vfgotc;
1281 adapter->stats.saved_reset_vfmprc += adapter->stats.vfmprc -
1282 adapter->stats.base_vfmprc;
1283 }
1284}
1285
1286static void ixgbevf_init_last_counter_stats(struct ixgbevf_adapter *adapter)
1287{
1288 struct ixgbe_hw *hw = &adapter->hw;
1289
1290 adapter->stats.last_vfgprc = IXGBE_READ_REG(hw, IXGBE_VFGPRC);
1291 adapter->stats.last_vfgorc = IXGBE_READ_REG(hw, IXGBE_VFGORC_LSB);
1292 adapter->stats.last_vfgorc |=
1293 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGORC_MSB))) << 32);
1294 adapter->stats.last_vfgptc = IXGBE_READ_REG(hw, IXGBE_VFGPTC);
1295 adapter->stats.last_vfgotc = IXGBE_READ_REG(hw, IXGBE_VFGOTC_LSB);
1296 adapter->stats.last_vfgotc |=
1297 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGOTC_MSB))) << 32);
1298 adapter->stats.last_vfmprc = IXGBE_READ_REG(hw, IXGBE_VFMPRC);
1299
1300 adapter->stats.base_vfgprc = adapter->stats.last_vfgprc;
1301 adapter->stats.base_vfgorc = adapter->stats.last_vfgorc;
1302 adapter->stats.base_vfgptc = adapter->stats.last_vfgptc;
1303 adapter->stats.base_vfgotc = adapter->stats.last_vfgotc;
1304 adapter->stats.base_vfmprc = adapter->stats.last_vfmprc;
1305}
1306
795180d8 1307static void ixgbevf_up_complete(struct ixgbevf_adapter *adapter)
92915f71
GR		 1308{
1309 struct net_device *netdev = adapter->netdev;
1310 struct ixgbe_hw *hw = &adapter->hw;
1311 int i, j = 0;
1312 int num_rx_rings = adapter->num_rx_queues;
1313 u32 txdctl, rxdctl;
795180d8 1314 u32 msg[2];
92915f71
GR		 1315
1316 for (i = 0; i < adapter->num_tx_queues; i++) {
1317 j = adapter->tx_ring[i].reg_idx;
1318 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1319 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
1320 txdctl |= (8 << 16);
1321 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl);
1322 }
1323
1324 for (i = 0; i < adapter->num_tx_queues; i++) {
1325 j = adapter->tx_ring[i].reg_idx;
1326 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1327 txdctl |= IXGBE_TXDCTL_ENABLE;
1328 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl);
1329 }
1330
1331 for (i = 0; i < num_rx_rings; i++) {
1332 j = adapter->rx_ring[i].reg_idx;
1333 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j));
dadcd65f 1334 rxdctl |= IXGBE_RXDCTL_ENABLE | IXGBE_RXDCTL_VME;
69bfbec4
GR		 1335 if (hw->mac.type == ixgbe_mac_X540_vf) {
1336 rxdctl &= ~IXGBE_RXDCTL_RLPMLMASK;
1337 rxdctl |= ((netdev->mtu + ETH_HLEN + ETH_FCS_LEN) |
1338 IXGBE_RXDCTL_RLPML_EN);
1339 }
92915f71
GR		 1340 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(j), rxdctl);
1341 ixgbevf_rx_desc_queue_enable(adapter, i);
1342 }
1343
1344 ixgbevf_configure_msix(adapter);
1345
1346 if (hw->mac.ops.set_rar) {
1347 if (is_valid_ether_addr(hw->mac.addr))
1348 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
1349 else
1350 hw->mac.ops.set_rar(hw, 0, hw->mac.perm_addr, 0);
1351 }
1352
795180d8
GR		 1353 msg[0] = IXGBE_VF_SET_LPE;
1354 msg[1] = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1355 hw->mbx.ops.write_posted(hw, msg, 2);
1356
92915f71
GR		 1357 clear_bit(__IXGBEVF_DOWN, &adapter->state);
1358 ixgbevf_napi_enable_all(adapter);
1359
1360 /* enable transmits */
1361 netif_tx_start_all_queues(netdev);
1362
33bd9f60
GR		 1363 ixgbevf_save_reset_stats(adapter);
1364 ixgbevf_init_last_counter_stats(adapter);
1365
92915f71 1366 mod_timer(&adapter->watchdog_timer, jiffies);
92915f71
GR		 1367}
1368
795180d8 1369void ixgbevf_up(struct ixgbevf_adapter *adapter)
92915f71 1370{
92915f71
GR		 1371 struct ixgbe_hw *hw = &adapter->hw;
1372
1373 ixgbevf_configure(adapter);
1374
795180d8 1375 ixgbevf_up_complete(adapter);
92915f71
GR		 1376
1377 /* clear any pending interrupts, may auto mask */
1378 IXGBE_READ_REG(hw, IXGBE_VTEICR);
1379
5f3600eb 1380 ixgbevf_irq_enable(adapter);
92915f71
GR		 1381}
1382
1383/**
1384 * ixgbevf_clean_rx_ring - Free Rx Buffers per Queue
1385 * @adapter: board private structure
1386 * @rx_ring: ring to free buffers from
1387 **/
1388static void ixgbevf_clean_rx_ring(struct ixgbevf_adapter *adapter,
1389 struct ixgbevf_ring *rx_ring)
1390{
1391 struct pci_dev *pdev = adapter->pdev;
1392 unsigned long size;
1393 unsigned int i;
1394
c0456c23
GR		 1395 if (!rx_ring->rx_buffer_info)
1396 return;
92915f71 1397
c0456c23 1398 /* Free all the Rx ring sk_buffs */
92915f71
GR		 1399 for (i = 0; i < rx_ring->count; i++) {
1400 struct ixgbevf_rx_buffer *rx_buffer_info;
1401
1402 rx_buffer_info = &rx_ring->rx_buffer_info[i];
1403 if (rx_buffer_info->dma) {
2a1f8794 1404 dma_unmap_single(&pdev->dev, rx_buffer_info->dma,
92915f71 1405 rx_ring->rx_buf_len,
2a1f8794 1406 DMA_FROM_DEVICE);
92915f71
GR		 1407 rx_buffer_info->dma = 0;
1408 }
1409 if (rx_buffer_info->skb) {
1410 struct sk_buff *skb = rx_buffer_info->skb;
1411 rx_buffer_info->skb = NULL;
1412 do {
1413 struct sk_buff *this = skb;
1414 skb = skb->prev;
1415 dev_kfree_skb(this);
1416 } while (skb);
1417 }
92915f71
GR		 1418 }
1419
1420 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
1421 memset(rx_ring->rx_buffer_info, 0, size);
1422
1423 /* Zero out the descriptor ring */
1424 memset(rx_ring->desc, 0, rx_ring->size);
1425
1426 rx_ring->next_to_clean = 0;
1427 rx_ring->next_to_use = 0;
1428
1429 if (rx_ring->head)
1430 writel(0, adapter->hw.hw_addr + rx_ring->head);
1431 if (rx_ring->tail)
1432 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1433}
1434
1435/**
1436 * ixgbevf_clean_tx_ring - Free Tx Buffers
1437 * @adapter: board private structure
1438 * @tx_ring: ring to be cleaned
1439 **/
1440static void ixgbevf_clean_tx_ring(struct ixgbevf_adapter *adapter,
1441 struct ixgbevf_ring *tx_ring)
1442{
1443 struct ixgbevf_tx_buffer *tx_buffer_info;
1444 unsigned long size;
1445 unsigned int i;
1446
c0456c23
GR		 1447 if (!tx_ring->tx_buffer_info)
1448 return;
1449
92915f71
GR		 1450 /* Free all the Tx ring sk_buffs */
1451
1452 for (i = 0; i < tx_ring->count; i++) {
1453 tx_buffer_info = &tx_ring->tx_buffer_info[i];
1454 ixgbevf_unmap_and_free_tx_resource(adapter, tx_buffer_info);
1455 }
1456
1457 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
1458 memset(tx_ring->tx_buffer_info, 0, size);
1459
1460 memset(tx_ring->desc, 0, tx_ring->size);
1461
1462 tx_ring->next_to_use = 0;
1463 tx_ring->next_to_clean = 0;
1464
1465 if (tx_ring->head)
1466 writel(0, adapter->hw.hw_addr + tx_ring->head);
1467 if (tx_ring->tail)
1468 writel(0, adapter->hw.hw_addr + tx_ring->tail);
1469}
1470
1471/**
1472 * ixgbevf_clean_all_rx_rings - Free Rx Buffers for all queues
1473 * @adapter: board private structure
1474 **/
1475static void ixgbevf_clean_all_rx_rings(struct ixgbevf_adapter *adapter)
1476{
1477 int i;
1478
1479 for (i = 0; i < adapter->num_rx_queues; i++)
1480 ixgbevf_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1481}
1482
1483/**
1484 * ixgbevf_clean_all_tx_rings - Free Tx Buffers for all queues
1485 * @adapter: board private structure
1486 **/
1487static void ixgbevf_clean_all_tx_rings(struct ixgbevf_adapter *adapter)
1488{
1489 int i;
1490
1491 for (i = 0; i < adapter->num_tx_queues; i++)
1492 ixgbevf_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1493}
1494
1495void ixgbevf_down(struct ixgbevf_adapter *adapter)
1496{
1497 struct net_device *netdev = adapter->netdev;
1498 struct ixgbe_hw *hw = &adapter->hw;
1499 u32 txdctl;
1500 int i, j;
1501
1502 /* signal that we are down to the interrupt handler */
1503 set_bit(__IXGBEVF_DOWN, &adapter->state);
1504 /* disable receives */
1505
1506 netif_tx_disable(netdev);
1507
1508 msleep(10);
1509
1510 netif_tx_stop_all_queues(netdev);
1511
1512 ixgbevf_irq_disable(adapter);
1513
1514 ixgbevf_napi_disable_all(adapter);
1515
1516 del_timer_sync(&adapter->watchdog_timer);
1517 /* can't call flush scheduled work here because it can deadlock
1518 * if linkwatch_event tries to acquire the rtnl_lock which we are
1519 * holding */
1520 while (adapter->flags & IXGBE_FLAG_IN_WATCHDOG_TASK)
1521 msleep(1);
1522
1523 /* disable transmits in the hardware now that interrupts are off */
1524 for (i = 0; i < adapter->num_tx_queues; i++) {
1525 j = adapter->tx_ring[i].reg_idx;
1526 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1527 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j),
1528 (txdctl & ~IXGBE_TXDCTL_ENABLE));
1529 }
1530
1531 netif_carrier_off(netdev);
1532
1533 if (!pci_channel_offline(adapter->pdev))
1534 ixgbevf_reset(adapter);
1535
1536 ixgbevf_clean_all_tx_rings(adapter);
1537 ixgbevf_clean_all_rx_rings(adapter);
1538}
1539
1540void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter)
1541{
c0456c23
GR		 1542 struct ixgbe_hw *hw = &adapter->hw;
1543
92915f71 1544 WARN_ON(in_interrupt());
c0456c23 1545
92915f71
GR		 1546 while (test_and_set_bit(__IXGBEVF_RESETTING, &adapter->state))
1547 msleep(1);
1548
c0456c23
GR		 1549 /*
1550 * Check if PF is up before re-init. If not then skip until
1551 * later when the PF is up and ready to service requests from
1552 * the VF via mailbox. If the VF is up and running then the
1553 * watchdog task will continue to schedule reset tasks until
1554 * the PF is up and running.
1555 */
1556 if (!hw->mac.ops.reset_hw(hw)) {
1557 ixgbevf_down(adapter);
1558 ixgbevf_up(adapter);
1559 }
92915f71
GR		 1560
1561 clear_bit(__IXGBEVF_RESETTING, &adapter->state);
1562}
1563
1564void ixgbevf_reset(struct ixgbevf_adapter *adapter)
1565{
1566 struct ixgbe_hw *hw = &adapter->hw;
1567 struct net_device *netdev = adapter->netdev;
1568
1569 if (hw->mac.ops.reset_hw(hw))
1570 hw_dbg(hw, "PF still resetting\n");
1571 else
1572 hw->mac.ops.init_hw(hw);
1573
1574 if (is_valid_ether_addr(adapter->hw.mac.addr)) {
1575 memcpy(netdev->dev_addr, adapter->hw.mac.addr,
1576 netdev->addr_len);
1577 memcpy(netdev->perm_addr, adapter->hw.mac.addr,
1578 netdev->addr_len);
1579 }
1580}
1581
1582static void ixgbevf_acquire_msix_vectors(struct ixgbevf_adapter *adapter,
1583 int vectors)
1584{
1585 int err, vector_threshold;
1586
fa71ae27
AD		 1587 /* We'll want at least 2 (vector_threshold):
1588 * 1) TxQ[0] + RxQ[0] handler
1589 * 2) Other (Link Status Change, etc.)
92915f71
GR		 1590 */
1591 vector_threshold = MIN_MSIX_COUNT;
1592
1593 /* The more we get, the more we will assign to Tx/Rx Cleanup
1594 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
1595 * Right now, we simply care about how many we'll get; we'll
1596 * set them up later while requesting irq's.
1597 */
1598 while (vectors >= vector_threshold) {
1599 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
1600 vectors);
1601 if (!err) /* Success in acquiring all requested vectors. */
1602 break;
1603 else if (err < 0)
1604 vectors = 0; /* Nasty failure, quit now */
1605 else /* err == number of vectors we should try again with */
1606 vectors = err;
1607 }
1608
1609 if (vectors < vector_threshold) {
1610 /* Can't allocate enough MSI-X interrupts? Oh well.
1611 * This just means we'll go with either a single MSI
1612 * vector or fall back to legacy interrupts.
1613 */
1614 hw_dbg(&adapter->hw,
1615 "Unable to allocate MSI-X interrupts\n");
1616 kfree(adapter->msix_entries);
1617 adapter->msix_entries = NULL;
1618 } else {
1619 /*
1620 * Adjust for only the vectors we'll use, which is minimum
1621 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
1622 * vectors we were allocated.
1623 */
1624 adapter->num_msix_vectors = vectors;
1625 }
1626}
1627
49ce9c2c
BH		 1628/**
1629 * ixgbevf_set_num_queues - Allocate queues for device, feature dependent
92915f71
GR		 1630 * @adapter: board private structure to initialize
1631 *
1632 * This is the top level queue allocation routine. The order here is very
1633 * important, starting with the "most" number of features turned on at once,
1634 * and ending with the smallest set of features. This way large combinations
1635 * can be allocated if they're turned on, and smaller combinations are the
1636 * fallthrough conditions.
1637 *
1638 **/
1639static void ixgbevf_set_num_queues(struct ixgbevf_adapter *adapter)
1640{
1641 /* Start with base case */
1642 adapter->num_rx_queues = 1;
1643 adapter->num_tx_queues = 1;
92915f71
GR		 1644}
1645
1646/**
1647 * ixgbevf_alloc_queues - Allocate memory for all rings
1648 * @adapter: board private structure to initialize
1649 *
1650 * We allocate one ring per queue at run-time since we don't know the
1651 * number of queues at compile-time. The polling_netdev array is
1652 * intended for Multiqueue, but should work fine with a single queue.
1653 **/
1654static int ixgbevf_alloc_queues(struct ixgbevf_adapter *adapter)
1655{
1656 int i;
1657
1658 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1659 sizeof(struct ixgbevf_ring), GFP_KERNEL);
1660 if (!adapter->tx_ring)
1661 goto err_tx_ring_allocation;
1662
1663 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1664 sizeof(struct ixgbevf_ring), GFP_KERNEL);
1665 if (!adapter->rx_ring)
1666 goto err_rx_ring_allocation;
1667
1668 for (i = 0; i < adapter->num_tx_queues; i++) {
1669 adapter->tx_ring[i].count = adapter->tx_ring_count;
1670 adapter->tx_ring[i].queue_index = i;
1671 adapter->tx_ring[i].reg_idx = i;
1672 }
1673
1674 for (i = 0; i < adapter->num_rx_queues; i++) {
1675 adapter->rx_ring[i].count = adapter->rx_ring_count;
1676 adapter->rx_ring[i].queue_index = i;
1677 adapter->rx_ring[i].reg_idx = i;
1678 }
1679
1680 return 0;
1681
1682err_rx_ring_allocation:
1683 kfree(adapter->tx_ring);
1684err_tx_ring_allocation:
1685 return -ENOMEM;
1686}
1687
1688/**
1689 * ixgbevf_set_interrupt_capability - set MSI-X or FAIL if not supported
1690 * @adapter: board private structure to initialize
1691 *
1692 * Attempt to configure the interrupts using the best available
1693 * capabilities of the hardware and the kernel.
1694 **/
1695static int ixgbevf_set_interrupt_capability(struct ixgbevf_adapter *adapter)
1696{
1697 int err = 0;
1698 int vector, v_budget;
1699
1700 /*
1701 * It's easy to be greedy for MSI-X vectors, but it really
1702 * doesn't do us much good if we have a lot more vectors
1703 * than CPU's. So let's be conservative and only ask for
fa71ae27
AD		 1704 * (roughly) the same number of vectors as there are CPU's.
1705 * The default is to use pairs of vectors.
92915f71 1706 */
fa71ae27
AD		 1707 v_budget = max(adapter->num_rx_queues, adapter->num_tx_queues);
1708 v_budget = min_t(int, v_budget, num_online_cpus());
1709 v_budget += NON_Q_VECTORS;
92915f71
GR		 1710
1711 /* A failure in MSI-X entry allocation isn't fatal, but it does
1712 * mean we disable MSI-X capabilities of the adapter. */
1713 adapter->msix_entries = kcalloc(v_budget,
1714 sizeof(struct msix_entry), GFP_KERNEL);
1715 if (!adapter->msix_entries) {
1716 err = -ENOMEM;
1717 goto out;
1718 }
1719
1720 for (vector = 0; vector < v_budget; vector++)
1721 adapter->msix_entries[vector].entry = vector;
1722
1723 ixgbevf_acquire_msix_vectors(adapter, v_budget);
1724
1725out:
1726 return err;
1727}
1728
1729/**
1730 * ixgbevf_alloc_q_vectors - Allocate memory for interrupt vectors
1731 * @adapter: board private structure to initialize
1732 *
1733 * We allocate one q_vector per queue interrupt. If allocation fails we
1734 * return -ENOMEM.
1735 **/
1736static int ixgbevf_alloc_q_vectors(struct ixgbevf_adapter *adapter)
1737{
1738 int q_idx, num_q_vectors;
1739 struct ixgbevf_q_vector *q_vector;
92915f71
GR		 1740
1741 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
92915f71
GR		 1742
1743 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
1744 q_vector = kzalloc(sizeof(struct ixgbevf_q_vector), GFP_KERNEL);
1745 if (!q_vector)
1746 goto err_out;
1747 q_vector->adapter = adapter;
1748 q_vector->v_idx = q_idx;
fa71ae27
AD		 1749 netif_napi_add(adapter->netdev, &q_vector->napi,
1750 ixgbevf_poll, 64);
92915f71
GR		 1751 adapter->q_vector[q_idx] = q_vector;
1752 }
1753
1754 return 0;
1755
1756err_out:
1757 while (q_idx) {
1758 q_idx--;
1759 q_vector = adapter->q_vector[q_idx];
1760 netif_napi_del(&q_vector->napi);
1761 kfree(q_vector);
1762 adapter->q_vector[q_idx] = NULL;
1763 }
1764 return -ENOMEM;
1765}
1766
1767/**
1768 * ixgbevf_free_q_vectors - Free memory allocated for interrupt vectors
1769 * @adapter: board private structure to initialize
1770 *
1771 * This function frees the memory allocated to the q_vectors. In addition if
1772 * NAPI is enabled it will delete any references to the NAPI struct prior
1773 * to freeing the q_vector.
1774 **/
1775static void ixgbevf_free_q_vectors(struct ixgbevf_adapter *adapter)
1776{
1777 int q_idx, num_q_vectors;
1778 int napi_vectors;
1779
1780 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1781 napi_vectors = adapter->num_rx_queues;
1782
1783 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
1784 struct ixgbevf_q_vector *q_vector = adapter->q_vector[q_idx];
1785
1786 adapter->q_vector[q_idx] = NULL;
1787 if (q_idx < napi_vectors)
1788 netif_napi_del(&q_vector->napi);
1789 kfree(q_vector);
1790 }
1791}
1792
1793/**
1794 * ixgbevf_reset_interrupt_capability - Reset MSIX setup
1795 * @adapter: board private structure
1796 *
1797 **/
1798static void ixgbevf_reset_interrupt_capability(struct ixgbevf_adapter *adapter)
1799{
1800 pci_disable_msix(adapter->pdev);
1801 kfree(adapter->msix_entries);
1802 adapter->msix_entries = NULL;
92915f71
GR		 1803}
1804
1805/**
1806 * ixgbevf_init_interrupt_scheme - Determine if MSIX is supported and init
1807 * @adapter: board private structure to initialize
1808 *
1809 **/
1810static int ixgbevf_init_interrupt_scheme(struct ixgbevf_adapter *adapter)
1811{
1812 int err;
1813
1814 /* Number of supported queues */
1815 ixgbevf_set_num_queues(adapter);
1816
1817 err = ixgbevf_set_interrupt_capability(adapter);
1818 if (err) {
1819 hw_dbg(&adapter->hw,
1820 "Unable to setup interrupt capabilities\n");
1821 goto err_set_interrupt;
1822 }
1823
1824 err = ixgbevf_alloc_q_vectors(adapter);
1825 if (err) {
1826 hw_dbg(&adapter->hw, "Unable to allocate memory for queue "
1827 "vectors\n");
1828 goto err_alloc_q_vectors;
1829 }
1830
1831 err = ixgbevf_alloc_queues(adapter);
1832 if (err) {
dbd9636e 1833 pr_err("Unable to allocate memory for queues\n");
92915f71
GR		 1834 goto err_alloc_queues;
1835 }
1836
1837 hw_dbg(&adapter->hw, "Multiqueue %s: Rx Queue count = %u, "
1838 "Tx Queue count = %u\n",
1839 (adapter->num_rx_queues > 1) ? "Enabled" :
1840 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
1841
1842 set_bit(__IXGBEVF_DOWN, &adapter->state);
1843
1844 return 0;
1845err_alloc_queues:
1846 ixgbevf_free_q_vectors(adapter);
1847err_alloc_q_vectors:
1848 ixgbevf_reset_interrupt_capability(adapter);
1849err_set_interrupt:
1850 return err;
1851}
1852
1853/**
1854 * ixgbevf_sw_init - Initialize general software structures
1855 * (struct ixgbevf_adapter)
1856 * @adapter: board private structure to initialize
1857 *
1858 * ixgbevf_sw_init initializes the Adapter private data structure.
1859 * Fields are initialized based on PCI device information and
1860 * OS network device settings (MTU size).
1861 **/
1862static int __devinit ixgbevf_sw_init(struct ixgbevf_adapter *adapter)
1863{
1864 struct ixgbe_hw *hw = &adapter->hw;
1865 struct pci_dev *pdev = adapter->pdev;
1866 int err;
1867
1868 /* PCI config space info */
1869
1870 hw->vendor_id = pdev->vendor;
1871 hw->device_id = pdev->device;
ff938e43 1872 hw->revision_id = pdev->revision;
92915f71
GR		 1873 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1874 hw->subsystem_device_id = pdev->subsystem_device;
1875
1876 hw->mbx.ops.init_params(hw);
1877 hw->mac.max_tx_queues = MAX_TX_QUEUES;
1878 hw->mac.max_rx_queues = MAX_RX_QUEUES;
1879 err = hw->mac.ops.reset_hw(hw);
1880 if (err) {
1881 dev_info(&pdev->dev,
1882 "PF still in reset state, assigning new address\n");
1a0d6ae5
DK		 1883 eth_hw_addr_random(adapter->netdev);
1884 memcpy(adapter->hw.mac.addr, adapter->netdev->dev_addr,
1885 adapter->netdev->addr_len);
92915f71
GR		 1886 } else {
1887 err = hw->mac.ops.init_hw(hw);
1888 if (err) {
dbd9636e 1889 pr_err("init_shared_code failed: %d\n", err);
92915f71
GR		 1890 goto out;
1891 }
1a0d6ae5
DK		 1892 memcpy(adapter->netdev->dev_addr, adapter->hw.mac.addr,
1893 adapter->netdev->addr_len);
92915f71
GR		 1894 }
1895
1896 /* Enable dynamic interrupt throttling rates */
5f3600eb
AD		 1897 adapter->rx_itr_setting = 1;
1898 adapter->tx_itr_setting = 1;
92915f71 1899
92915f71
GR		 1900 /* set default ring sizes */
1901 adapter->tx_ring_count = IXGBEVF_DEFAULT_TXD;
1902 adapter->rx_ring_count = IXGBEVF_DEFAULT_RXD;
1903
92915f71 1904 set_bit(__IXGBEVF_DOWN, &adapter->state);
1a0d6ae5 1905 return 0;
92915f71
GR		 1906
1907out:
1908 return err;
1909}
1910
92915f71
GR		 1911#define UPDATE_VF_COUNTER_32bit(reg, last_counter, counter) \
1912 { \
1913 u32 current_counter = IXGBE_READ_REG(hw, reg); \
1914 if (current_counter < last_counter) \
1915 counter += 0x100000000LL; \
1916 last_counter = current_counter; \
1917 counter &= 0xFFFFFFFF00000000LL; \
1918 counter |= current_counter; \
1919 }
1920
1921#define UPDATE_VF_COUNTER_36bit(reg_lsb, reg_msb, last_counter, counter) \
1922 { \
1923 u64 current_counter_lsb = IXGBE_READ_REG(hw, reg_lsb); \
1924 u64 current_counter_msb = IXGBE_READ_REG(hw, reg_msb); \
1925 u64 current_counter = (current_counter_msb << 32) | \
1926 current_counter_lsb; \
1927 if (current_counter < last_counter) \
1928 counter += 0x1000000000LL; \
1929 last_counter = current_counter; \
1930 counter &= 0xFFFFFFF000000000LL; \
1931 counter |= current_counter; \
1932 }
1933/**
1934 * ixgbevf_update_stats - Update the board statistics counters.
1935 * @adapter: board private structure
1936 **/
1937void ixgbevf_update_stats(struct ixgbevf_adapter *adapter)
1938{
1939 struct ixgbe_hw *hw = &adapter->hw;
1940
1941 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPRC, adapter->stats.last_vfgprc,
1942 adapter->stats.vfgprc);
1943 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPTC, adapter->stats.last_vfgptc,
1944 adapter->stats.vfgptc);
1945 UPDATE_VF_COUNTER_36bit(IXGBE_VFGORC_LSB, IXGBE_VFGORC_MSB,
1946 adapter->stats.last_vfgorc,
1947 adapter->stats.vfgorc);
1948 UPDATE_VF_COUNTER_36bit(IXGBE_VFGOTC_LSB, IXGBE_VFGOTC_MSB,
1949 adapter->stats.last_vfgotc,
1950 adapter->stats.vfgotc);
1951 UPDATE_VF_COUNTER_32bit(IXGBE_VFMPRC, adapter->stats.last_vfmprc,
1952 adapter->stats.vfmprc);
92915f71
GR		 1953}
1954
1955/**
1956 * ixgbevf_watchdog - Timer Call-back
1957 * @data: pointer to adapter cast into an unsigned long
1958 **/
1959static void ixgbevf_watchdog(unsigned long data)
1960{
1961 struct ixgbevf_adapter *adapter = (struct ixgbevf_adapter *)data;
1962 struct ixgbe_hw *hw = &adapter->hw;
5f3600eb 1963 u32 eics = 0;
92915f71
GR		 1964 int i;
1965
1966 /*
1967 * Do the watchdog outside of interrupt context due to the lovely
1968 * delays that some of the newer hardware requires
1969 */
1970
1971 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
1972 goto watchdog_short_circuit;
1973
1974 /* get one bit for every active tx/rx interrupt vector */
1975 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
1976 struct ixgbevf_q_vector *qv = adapter->q_vector[i];
6b43c446 1977 if (qv->rx.ring || qv->tx.ring)
5f3600eb 1978 eics |= 1 << i;
92915f71
GR		 1979 }
1980
5f3600eb 1981 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, eics);
92915f71
GR		 1982
1983watchdog_short_circuit:
1984 schedule_work(&adapter->watchdog_task);
1985}
1986
1987/**
1988 * ixgbevf_tx_timeout - Respond to a Tx Hang
1989 * @netdev: network interface device structure
1990 **/
1991static void ixgbevf_tx_timeout(struct net_device *netdev)
1992{
1993 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1994
1995 /* Do the reset outside of interrupt context */
1996 schedule_work(&adapter->reset_task);
1997}
1998
1999static void ixgbevf_reset_task(struct work_struct *work)
2000{
2001 struct ixgbevf_adapter *adapter;
2002 adapter = container_of(work, struct ixgbevf_adapter, reset_task);
2003
2004 /* If we're already down or resetting, just bail */
2005 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
2006 test_bit(__IXGBEVF_RESETTING, &adapter->state))
2007 return;
2008
2009 adapter->tx_timeout_count++;
2010
2011 ixgbevf_reinit_locked(adapter);
2012}
2013
2014/**
2015 * ixgbevf_watchdog_task - worker thread to bring link up
2016 * @work: pointer to work_struct containing our data
2017 **/
2018static void ixgbevf_watchdog_task(struct work_struct *work)
2019{
2020 struct ixgbevf_adapter *adapter = container_of(work,
2021 struct ixgbevf_adapter,
2022 watchdog_task);
2023 struct net_device *netdev = adapter->netdev;
2024 struct ixgbe_hw *hw = &adapter->hw;
2025 u32 link_speed = adapter->link_speed;
2026 bool link_up = adapter->link_up;
2027
2028 adapter->flags |= IXGBE_FLAG_IN_WATCHDOG_TASK;
2029
2030 /*
2031 * Always check the link on the watchdog because we have
2032 * no LSC interrupt
2033 */
2034 if (hw->mac.ops.check_link) {
2035 if ((hw->mac.ops.check_link(hw, &link_speed,
2036 &link_up, false)) != 0) {
2037 adapter->link_up = link_up;
2038 adapter->link_speed = link_speed;
da6b3330
GR		 2039 netif_carrier_off(netdev);
2040 netif_tx_stop_all_queues(netdev);
92915f71
GR		 2041 schedule_work(&adapter->reset_task);
2042 goto pf_has_reset;
2043 }
2044 } else {
2045 /* always assume link is up, if no check link
2046 * function */
2047 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
2048 link_up = true;
2049 }
2050 adapter->link_up = link_up;
2051 adapter->link_speed = link_speed;
2052
2053 if (link_up) {
2054 if (!netif_carrier_ok(netdev)) {
300bc060
JP		 2055 hw_dbg(&adapter->hw, "NIC Link is Up, %u Gbps\n",
2056 (link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
2057 10 : 1);
92915f71
GR		 2058 netif_carrier_on(netdev);
2059 netif_tx_wake_all_queues(netdev);
92915f71
GR		 2060 }
2061 } else {
2062 adapter->link_up = false;
2063 adapter->link_speed = 0;
2064 if (netif_carrier_ok(netdev)) {
2065 hw_dbg(&adapter->hw, "NIC Link is Down\n");
2066 netif_carrier_off(netdev);
2067 netif_tx_stop_all_queues(netdev);
2068 }
2069 }
2070
92915f71
GR		 2071 ixgbevf_update_stats(adapter);
2072
33bd9f60 2073pf_has_reset:
92915f71
GR		 2074 /* Reset the timer */
2075 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
2076 mod_timer(&adapter->watchdog_timer,
2077 round_jiffies(jiffies + (2 * HZ)));
2078
2079 adapter->flags &= ~IXGBE_FLAG_IN_WATCHDOG_TASK;
2080}
2081
2082/**
2083 * ixgbevf_free_tx_resources - Free Tx Resources per Queue
2084 * @adapter: board private structure
2085 * @tx_ring: Tx descriptor ring for a specific queue
2086 *
2087 * Free all transmit software resources
2088 **/
2089void ixgbevf_free_tx_resources(struct ixgbevf_adapter *adapter,
2090 struct ixgbevf_ring *tx_ring)
2091{
2092 struct pci_dev *pdev = adapter->pdev;
2093
92915f71
GR		 2094 ixgbevf_clean_tx_ring(adapter, tx_ring);
2095
2096 vfree(tx_ring->tx_buffer_info);
2097 tx_ring->tx_buffer_info = NULL;
2098
2a1f8794
NN		 2099 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2100 tx_ring->dma);
92915f71
GR		 2101
2102 tx_ring->desc = NULL;
2103}
2104
2105/**
2106 * ixgbevf_free_all_tx_resources - Free Tx Resources for All Queues
2107 * @adapter: board private structure
2108 *
2109 * Free all transmit software resources
2110 **/
2111static void ixgbevf_free_all_tx_resources(struct ixgbevf_adapter *adapter)
2112{
2113 int i;
2114
2115 for (i = 0; i < adapter->num_tx_queues; i++)
2116 if (adapter->tx_ring[i].desc)
2117 ixgbevf_free_tx_resources(adapter,
2118 &adapter->tx_ring[i]);
2119
2120}
2121
2122/**
2123 * ixgbevf_setup_tx_resources - allocate Tx resources (Descriptors)
2124 * @adapter: board private structure
2125 * @tx_ring: tx descriptor ring (for a specific queue) to setup
2126 *
2127 * Return 0 on success, negative on failure
2128 **/
2129int ixgbevf_setup_tx_resources(struct ixgbevf_adapter *adapter,
2130 struct ixgbevf_ring *tx_ring)
2131{
2132 struct pci_dev *pdev = adapter->pdev;
2133 int size;
2134
2135 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
89bf67f1 2136 tx_ring->tx_buffer_info = vzalloc(size);
92915f71
GR		 2137 if (!tx_ring->tx_buffer_info)
2138 goto err;
92915f71
GR		 2139
2140 /* round up to nearest 4K */
2141 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
2142 tx_ring->size = ALIGN(tx_ring->size, 4096);
2143
2a1f8794
NN		 2144 tx_ring->desc = dma_alloc_coherent(&pdev->dev, tx_ring->size,
2145 &tx_ring->dma, GFP_KERNEL);
92915f71
GR		 2146 if (!tx_ring->desc)
2147 goto err;
2148
2149 tx_ring->next_to_use = 0;
2150 tx_ring->next_to_clean = 0;
92915f71
GR		 2151 return 0;
2152
2153err:
2154 vfree(tx_ring->tx_buffer_info);
2155 tx_ring->tx_buffer_info = NULL;
2156 hw_dbg(&adapter->hw, "Unable to allocate memory for the transmit "
2157 "descriptor ring\n");
2158 return -ENOMEM;
2159}
2160
2161/**
2162 * ixgbevf_setup_all_tx_resources - allocate all queues Tx resources
2163 * @adapter: board private structure
2164 *
2165 * If this function returns with an error, then it's possible one or
2166 * more of the rings is populated (while the rest are not). It is the
2167 * callers duty to clean those orphaned rings.
2168 *
2169 * Return 0 on success, negative on failure
2170 **/
2171static int ixgbevf_setup_all_tx_resources(struct ixgbevf_adapter *adapter)
2172{
2173 int i, err = 0;
2174
2175 for (i = 0; i < adapter->num_tx_queues; i++) {
2176 err = ixgbevf_setup_tx_resources(adapter, &adapter->tx_ring[i]);
2177 if (!err)
2178 continue;
2179 hw_dbg(&adapter->hw,
2180 "Allocation for Tx Queue %u failed\n", i);
2181 break;
2182 }
2183
2184 return err;
2185}
2186
2187/**
2188 * ixgbevf_setup_rx_resources - allocate Rx resources (Descriptors)
2189 * @adapter: board private structure
2190 * @rx_ring: rx descriptor ring (for a specific queue) to setup
2191 *
2192 * Returns 0 on success, negative on failure
2193 **/
2194int ixgbevf_setup_rx_resources(struct ixgbevf_adapter *adapter,
2195 struct ixgbevf_ring *rx_ring)
2196{
2197 struct pci_dev *pdev = adapter->pdev;
2198 int size;
2199
2200 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
89bf67f1 2201 rx_ring->rx_buffer_info = vzalloc(size);
e404decb 2202 if (!rx_ring->rx_buffer_info)
92915f71 2203 goto alloc_failed;
92915f71
GR		 2204
2205 /* Round up to nearest 4K */
2206 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
2207 rx_ring->size = ALIGN(rx_ring->size, 4096);
2208
2a1f8794
NN		 2209 rx_ring->desc = dma_alloc_coherent(&pdev->dev, rx_ring->size,
2210 &rx_ring->dma, GFP_KERNEL);
92915f71
GR		 2211
2212 if (!rx_ring->desc) {
2213 hw_dbg(&adapter->hw,
2214 "Unable to allocate memory for "
2215 "the receive descriptor ring\n");
2216 vfree(rx_ring->rx_buffer_info);
2217 rx_ring->rx_buffer_info = NULL;
2218 goto alloc_failed;
2219 }
2220
2221 rx_ring->next_to_clean = 0;
2222 rx_ring->next_to_use = 0;
2223
2224 return 0;
2225alloc_failed:
2226 return -ENOMEM;
2227}
2228
2229/**
2230 * ixgbevf_setup_all_rx_resources - allocate all queues Rx resources
2231 * @adapter: board private structure
2232 *
2233 * If this function returns with an error, then it's possible one or
2234 * more of the rings is populated (while the rest are not). It is the
2235 * callers duty to clean those orphaned rings.
2236 *
2237 * Return 0 on success, negative on failure
2238 **/
2239static int ixgbevf_setup_all_rx_resources(struct ixgbevf_adapter *adapter)
2240{
2241 int i, err = 0;
2242
2243 for (i = 0; i < adapter->num_rx_queues; i++) {
2244 err = ixgbevf_setup_rx_resources(adapter, &adapter->rx_ring[i]);
2245 if (!err)
2246 continue;
2247 hw_dbg(&adapter->hw,
2248 "Allocation for Rx Queue %u failed\n", i);
2249 break;
2250 }
2251 return err;
2252}
2253
2254/**
2255 * ixgbevf_free_rx_resources - Free Rx Resources
2256 * @adapter: board private structure
2257 * @rx_ring: ring to clean the resources from
2258 *
2259 * Free all receive software resources
2260 **/
2261void ixgbevf_free_rx_resources(struct ixgbevf_adapter *adapter,
2262 struct ixgbevf_ring *rx_ring)
2263{
2264 struct pci_dev *pdev = adapter->pdev;
2265
2266 ixgbevf_clean_rx_ring(adapter, rx_ring);
2267
2268 vfree(rx_ring->rx_buffer_info);
2269 rx_ring->rx_buffer_info = NULL;
2270
2a1f8794
NN		 2271 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2272 rx_ring->dma);
92915f71
GR		 2273
2274 rx_ring->desc = NULL;
2275}
2276
2277/**
2278 * ixgbevf_free_all_rx_resources - Free Rx Resources for All Queues
2279 * @adapter: board private structure
2280 *
2281 * Free all receive software resources
2282 **/
2283static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter)
2284{
2285 int i;
2286
2287 for (i = 0; i < adapter->num_rx_queues; i++)
2288 if (adapter->rx_ring[i].desc)
2289 ixgbevf_free_rx_resources(adapter,
2290 &adapter->rx_ring[i]);
2291}
2292
2293/**
2294 * ixgbevf_open - Called when a network interface is made active
2295 * @netdev: network interface device structure
2296 *
2297 * Returns 0 on success, negative value on failure
2298 *
2299 * The open entry point is called when a network interface is made
2300 * active by the system (IFF_UP). At this point all resources needed
2301 * for transmit and receive operations are allocated, the interrupt
2302 * handler is registered with the OS, the watchdog timer is started,
2303 * and the stack is notified that the interface is ready.
2304 **/
2305static int ixgbevf_open(struct net_device *netdev)
2306{
2307 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2308 struct ixgbe_hw *hw = &adapter->hw;
2309 int err;
2310
2311 /* disallow open during test */
2312 if (test_bit(__IXGBEVF_TESTING, &adapter->state))
2313 return -EBUSY;
2314
2315 if (hw->adapter_stopped) {
2316 ixgbevf_reset(adapter);
2317 /* if adapter is still stopped then PF isn't up and
2318 * the vf can't start. */
2319 if (hw->adapter_stopped) {
2320 err = IXGBE_ERR_MBX;
dbd9636e
JK		 2321 pr_err("Unable to start - perhaps the PF Driver isn't "
2322 "up yet\n");
92915f71
GR		 2323 goto err_setup_reset;
2324 }
2325 }
2326
2327 /* allocate transmit descriptors */
2328 err = ixgbevf_setup_all_tx_resources(adapter);
2329 if (err)
2330 goto err_setup_tx;
2331
2332 /* allocate receive descriptors */
2333 err = ixgbevf_setup_all_rx_resources(adapter);
2334 if (err)
2335 goto err_setup_rx;
2336
2337 ixgbevf_configure(adapter);
2338
2339 /*
2340 * Map the Tx/Rx rings to the vectors we were allotted.
2341 * if request_irq will be called in this function map_rings
2342 * must be called *before* up_complete
2343 */
2344 ixgbevf_map_rings_to_vectors(adapter);
2345
795180d8 2346 ixgbevf_up_complete(adapter);
92915f71
GR		 2347
2348 /* clear any pending interrupts, may auto mask */
2349 IXGBE_READ_REG(hw, IXGBE_VTEICR);
2350 err = ixgbevf_request_irq(adapter);
2351 if (err)
2352 goto err_req_irq;
2353
5f3600eb 2354 ixgbevf_irq_enable(adapter);
92915f71
GR		 2355
2356 return 0;
2357
2358err_req_irq:
2359 ixgbevf_down(adapter);
92915f71
GR		 2360 ixgbevf_free_irq(adapter);
2361err_setup_rx:
2362 ixgbevf_free_all_rx_resources(adapter);
2363err_setup_tx:
2364 ixgbevf_free_all_tx_resources(adapter);
2365 ixgbevf_reset(adapter);
2366
2367err_setup_reset:
2368
2369 return err;
2370}
2371
2372/**
2373 * ixgbevf_close - Disables a network interface
2374 * @netdev: network interface device structure
2375 *
2376 * Returns 0, this is not allowed to fail
2377 *
2378 * The close entry point is called when an interface is de-activated
2379 * by the OS. The hardware is still under the drivers control, but
2380 * needs to be disabled. A global MAC reset is issued to stop the
2381 * hardware, and all transmit and receive resources are freed.
2382 **/
2383static int ixgbevf_close(struct net_device *netdev)
2384{
2385 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2386
2387 ixgbevf_down(adapter);
2388 ixgbevf_free_irq(adapter);
2389
2390 ixgbevf_free_all_tx_resources(adapter);
2391 ixgbevf_free_all_rx_resources(adapter);
2392
2393 return 0;
2394}
2395
2396static int ixgbevf_tso(struct ixgbevf_adapter *adapter,
2397 struct ixgbevf_ring *tx_ring,
2398 struct sk_buff *skb, u32 tx_flags, u8 *hdr_len)
2399{
2400 struct ixgbe_adv_tx_context_desc *context_desc;
2401 unsigned int i;
2402 int err;
2403 struct ixgbevf_tx_buffer *tx_buffer_info;
2404 u32 vlan_macip_lens = 0, type_tucmd_mlhl;
2405 u32 mss_l4len_idx, l4len;
2406
2407 if (skb_is_gso(skb)) {
2408 if (skb_header_cloned(skb)) {
2409 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2410 if (err)
2411 return err;
2412 }
2413 l4len = tcp_hdrlen(skb);
2414 *hdr_len += l4len;
2415
2416 if (skb->protocol == htons(ETH_P_IP)) {
2417 struct iphdr *iph = ip_hdr(skb);
2418 iph->tot_len = 0;
2419 iph->check = 0;
2420 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2421 iph->daddr, 0,
2422 IPPROTO_TCP,
2423 0);
2424 adapter->hw_tso_ctxt++;
9010bc33 2425 } else if (skb_is_gso_v6(skb)) {
92915f71
GR		 2426 ipv6_hdr(skb)->payload_len = 0;
2427 tcp_hdr(skb)->check =
2428 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2429 &ipv6_hdr(skb)->daddr,
2430 0, IPPROTO_TCP, 0);
2431 adapter->hw_tso6_ctxt++;
2432 }
2433
2434 i = tx_ring->next_to_use;
2435
2436 tx_buffer_info = &tx_ring->tx_buffer_info[i];
908421f6 2437 context_desc = IXGBEVF_TX_CTXTDESC(tx_ring, i);
92915f71
GR		 2438
2439 /* VLAN MACLEN IPLEN */
2440 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2441 vlan_macip_lens |=
2442 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
2443 vlan_macip_lens |= ((skb_network_offset(skb)) <<
2444 IXGBE_ADVTXD_MACLEN_SHIFT);
2445 *hdr_len += skb_network_offset(skb);
2446 vlan_macip_lens |=
2447 (skb_transport_header(skb) - skb_network_header(skb));
2448 *hdr_len +=
2449 (skb_transport_header(skb) - skb_network_header(skb));
2450 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2451 context_desc->seqnum_seed = 0;
2452
2453 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2454 type_tucmd_mlhl = (IXGBE_TXD_CMD_DEXT |
2455 IXGBE_ADVTXD_DTYP_CTXT);
2456
2457 if (skb->protocol == htons(ETH_P_IP))
2458 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
2459 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
2460 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
2461
2462 /* MSS L4LEN IDX */
2463 mss_l4len_idx =
2464 (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT);
2465 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT);
2466 /* use index 1 for TSO */
2467 mss_l4len_idx |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
2468 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
2469
2470 tx_buffer_info->time_stamp = jiffies;
2471 tx_buffer_info->next_to_watch = i;
2472
2473 i++;
2474 if (i == tx_ring->count)
2475 i = 0;
2476 tx_ring->next_to_use = i;
2477
2478 return true;
2479 }
2480
2481 return false;
2482}
2483
2484static bool ixgbevf_tx_csum(struct ixgbevf_adapter *adapter,
2485 struct ixgbevf_ring *tx_ring,
2486 struct sk_buff *skb, u32 tx_flags)
2487{
2488 struct ixgbe_adv_tx_context_desc *context_desc;
2489 unsigned int i;
2490 struct ixgbevf_tx_buffer *tx_buffer_info;
2491 u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
2492
2493 if (skb->ip_summed == CHECKSUM_PARTIAL ||
2494 (tx_flags & IXGBE_TX_FLAGS_VLAN)) {
2495 i = tx_ring->next_to_use;
2496 tx_buffer_info = &tx_ring->tx_buffer_info[i];
908421f6 2497 context_desc = IXGBEVF_TX_CTXTDESC(tx_ring, i);
92915f71
GR		 2498
2499 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2500 vlan_macip_lens |= (tx_flags &
2501 IXGBE_TX_FLAGS_VLAN_MASK);
2502 vlan_macip_lens |= (skb_network_offset(skb) <<
2503 IXGBE_ADVTXD_MACLEN_SHIFT);
2504 if (skb->ip_summed == CHECKSUM_PARTIAL)
2505 vlan_macip_lens |= (skb_transport_header(skb) -
2506 skb_network_header(skb));
2507
2508 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2509 context_desc->seqnum_seed = 0;
2510
2511 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
2512 IXGBE_ADVTXD_DTYP_CTXT);
2513
2514 if (skb->ip_summed == CHECKSUM_PARTIAL) {
2515 switch (skb->protocol) {
2516 case __constant_htons(ETH_P_IP):
2517 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
2518 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2519 type_tucmd_mlhl |=
2520 IXGBE_ADVTXD_TUCMD_L4T_TCP;
2521 break;
2522 case __constant_htons(ETH_P_IPV6):
2523 /* XXX what about other V6 headers?? */
2524 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2525 type_tucmd_mlhl |=
2526 IXGBE_ADVTXD_TUCMD_L4T_TCP;
2527 break;
2528 default:
2529 if (unlikely(net_ratelimit())) {
dbd9636e
JK		 2530 pr_warn("partial checksum but "
2531 "proto=%x!\n", skb->protocol);
92915f71
GR		 2532 }
2533 break;
2534 }
2535 }
2536
2537 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
2538 /* use index zero for tx checksum offload */
2539 context_desc->mss_l4len_idx = 0;
2540
2541 tx_buffer_info->time_stamp = jiffies;
2542 tx_buffer_info->next_to_watch = i;
2543
2544 adapter->hw_csum_tx_good++;
2545 i++;
2546 if (i == tx_ring->count)
2547 i = 0;
2548 tx_ring->next_to_use = i;
2549
2550 return true;
2551 }
2552
2553 return false;
2554}
2555
2556static int ixgbevf_tx_map(struct ixgbevf_adapter *adapter,
2557 struct ixgbevf_ring *tx_ring,
2558 struct sk_buff *skb, u32 tx_flags,
2559 unsigned int first)
2560{
2561 struct pci_dev *pdev = adapter->pdev;
2562 struct ixgbevf_tx_buffer *tx_buffer_info;
2563 unsigned int len;
2564 unsigned int total = skb->len;
2540ddb5
KV		 2565 unsigned int offset = 0, size;
2566 int count = 0;
92915f71
GR		 2567 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
2568 unsigned int f;
65deeed7 2569 int i;
92915f71
GR		 2570
2571 i = tx_ring->next_to_use;
2572
2573 len = min(skb_headlen(skb), total);
2574 while (len) {
2575 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2576 size = min(len, (unsigned int)IXGBE_MAX_DATA_PER_TXD);
2577
2578 tx_buffer_info->length = size;
2579 tx_buffer_info->mapped_as_page = false;
2a1f8794 2580 tx_buffer_info->dma = dma_map_single(&adapter->pdev->dev,
92915f71 2581 skb->data + offset,
2a1f8794
NN		 2582 size, DMA_TO_DEVICE);
2583 if (dma_mapping_error(&pdev->dev, tx_buffer_info->dma))
92915f71
GR		 2584 goto dma_error;
2585 tx_buffer_info->time_stamp = jiffies;
2586 tx_buffer_info->next_to_watch = i;
2587
2588 len -= size;
2589 total -= size;
2590 offset += size;
2591 count++;
2592 i++;
2593 if (i == tx_ring->count)
2594 i = 0;
2595 }
2596
2597 for (f = 0; f < nr_frags; f++) {
9e903e08 2598 const struct skb_frag_struct *frag;
92915f71
GR		 2599
2600 frag = &skb_shinfo(skb)->frags[f];
9e903e08 2601 len = min((unsigned int)skb_frag_size(frag), total);
877749bf 2602 offset = 0;
92915f71
GR		 2603
2604 while (len) {
2605 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2606 size = min(len, (unsigned int)IXGBE_MAX_DATA_PER_TXD);
2607
2608 tx_buffer_info->length = size;
877749bf
IC		 2609 tx_buffer_info->dma =
2610 skb_frag_dma_map(&adapter->pdev->dev, frag,
2611 offset, size, DMA_TO_DEVICE);
92915f71 2612 tx_buffer_info->mapped_as_page = true;
2a1f8794 2613 if (dma_mapping_error(&pdev->dev, tx_buffer_info->dma))
92915f71
GR		 2614 goto dma_error;
2615 tx_buffer_info->time_stamp = jiffies;
2616 tx_buffer_info->next_to_watch = i;
2617
2618 len -= size;
2619 total -= size;
2620 offset += size;
2621 count++;
2622 i++;
2623 if (i == tx_ring->count)
2624 i = 0;
2625 }
2626 if (total == 0)
2627 break;
2628 }
2629
2630 if (i == 0)
2631 i = tx_ring->count - 1;
2632 else
2633 i = i - 1;
2634 tx_ring->tx_buffer_info[i].skb = skb;
2635 tx_ring->tx_buffer_info[first].next_to_watch = i;
2636
2637 return count;
2638
2639dma_error:
2640 dev_err(&pdev->dev, "TX DMA map failed\n");
2641
2642 /* clear timestamp and dma mappings for failed tx_buffer_info map */
2643 tx_buffer_info->dma = 0;
2644 tx_buffer_info->time_stamp = 0;
2645 tx_buffer_info->next_to_watch = 0;
2646 count--;
2647
2648 /* clear timestamp and dma mappings for remaining portion of packet */
2649 while (count >= 0) {
2650 count--;
2651 i--;
2652 if (i < 0)
2653 i += tx_ring->count;
2654 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2655 ixgbevf_unmap_and_free_tx_resource(adapter, tx_buffer_info);
2656 }
2657
2658 return count;
2659}
2660
2661static void ixgbevf_tx_queue(struct ixgbevf_adapter *adapter,
2662 struct ixgbevf_ring *tx_ring, int tx_flags,
2663 int count, u32 paylen, u8 hdr_len)
2664{
2665 union ixgbe_adv_tx_desc *tx_desc = NULL;
2666 struct ixgbevf_tx_buffer *tx_buffer_info;
2667 u32 olinfo_status = 0, cmd_type_len = 0;
2668 unsigned int i;
2669
2670 u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
2671
2672 cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
2673
2674 cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
2675
2676 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2677 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
2678
2679 if (tx_flags & IXGBE_TX_FLAGS_TSO) {
2680 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
2681
2682 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
2683 IXGBE_ADVTXD_POPTS_SHIFT;
2684
2685 /* use index 1 context for tso */
2686 olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
2687 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
2688 olinfo_status |= IXGBE_TXD_POPTS_IXSM <<
2689 IXGBE_ADVTXD_POPTS_SHIFT;
2690
2691 } else if (tx_flags & IXGBE_TX_FLAGS_CSUM)
2692 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
2693 IXGBE_ADVTXD_POPTS_SHIFT;
2694
2695 olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
2696
2697 i = tx_ring->next_to_use;
2698 while (count--) {
2699 tx_buffer_info = &tx_ring->tx_buffer_info[i];
908421f6 2700 tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
92915f71
GR		 2701 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
2702 tx_desc->read.cmd_type_len =
2703 cpu_to_le32(cmd_type_len | tx_buffer_info->length);
2704 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
2705 i++;
2706 if (i == tx_ring->count)
2707 i = 0;
2708 }
2709
2710 tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
2711
2712 /*
2713 * Force memory writes to complete before letting h/w
2714 * know there are new descriptors to fetch. (Only
2715 * applicable for weak-ordered memory model archs,
2716 * such as IA-64).
2717 */
2718 wmb();
2719
2720 tx_ring->next_to_use = i;
2721 writel(i, adapter->hw.hw_addr + tx_ring->tail);
2722}
2723
2724static int __ixgbevf_maybe_stop_tx(struct net_device *netdev,
2725 struct ixgbevf_ring *tx_ring, int size)
2726{
2727 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2728
2729 netif_stop_subqueue(netdev, tx_ring->queue_index);
2730 /* Herbert's original patch had:
2731 * smp_mb__after_netif_stop_queue();
2732 * but since that doesn't exist yet, just open code it. */
2733 smp_mb();
2734
2735 /* We need to check again in a case another CPU has just
2736 * made room available. */
2737 if (likely(IXGBE_DESC_UNUSED(tx_ring) < size))
2738 return -EBUSY;
2739
2740 /* A reprieve! - use start_queue because it doesn't call schedule */
2741 netif_start_subqueue(netdev, tx_ring->queue_index);
2742 ++adapter->restart_queue;
2743 return 0;
2744}
2745
2746static int ixgbevf_maybe_stop_tx(struct net_device *netdev,
2747 struct ixgbevf_ring *tx_ring, int size)
2748{
2749 if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size))
2750 return 0;
2751 return __ixgbevf_maybe_stop_tx(netdev, tx_ring, size);
2752}
2753
2754static int ixgbevf_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2755{
2756 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2757 struct ixgbevf_ring *tx_ring;
2758 unsigned int first;
2759 unsigned int tx_flags = 0;
2760 u8 hdr_len = 0;
2761 int r_idx = 0, tso;
3595990a
AD		 2762 u16 count = TXD_USE_COUNT(skb_headlen(skb));
2763#if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
2764 unsigned short f;
2765#endif
92915f71
GR		 2766
2767 tx_ring = &adapter->tx_ring[r_idx];
2768
3595990a
AD		 2769 /*
2770 * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
2771 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
2772 * + 2 desc gap to keep tail from touching head,
2773 * + 1 desc for context descriptor,
2774 * otherwise try next time
2775 */
2776#if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
2777 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
2778 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
2779#else
2780 count += skb_shinfo(skb)->nr_frags;
2781#endif
2782 if (ixgbevf_maybe_stop_tx(netdev, tx_ring, count + 3)) {
2783 adapter->tx_busy++;
2784 return NETDEV_TX_BUSY;
2785 }
2786
eab6d18d 2787 if (vlan_tx_tag_present(skb)) {
92915f71
GR		 2788 tx_flags |= vlan_tx_tag_get(skb);
2789 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
2790 tx_flags |= IXGBE_TX_FLAGS_VLAN;
2791 }
2792
92915f71
GR		 2793 first = tx_ring->next_to_use;
2794
2795 if (skb->protocol == htons(ETH_P_IP))
2796 tx_flags |= IXGBE_TX_FLAGS_IPV4;
2797 tso = ixgbevf_tso(adapter, tx_ring, skb, tx_flags, &hdr_len);
2798 if (tso < 0) {
2799 dev_kfree_skb_any(skb);
2800 return NETDEV_TX_OK;
2801 }
2802
2803 if (tso)
2804 tx_flags |= IXGBE_TX_FLAGS_TSO;
2805 else if (ixgbevf_tx_csum(adapter, tx_ring, skb, tx_flags) &&
2806 (skb->ip_summed == CHECKSUM_PARTIAL))
2807 tx_flags |= IXGBE_TX_FLAGS_CSUM;
2808
2809 ixgbevf_tx_queue(adapter, tx_ring, tx_flags,
2810 ixgbevf_tx_map(adapter, tx_ring, skb, tx_flags, first),
2811 skb->len, hdr_len);
2812
92915f71
GR		 2813 ixgbevf_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED);
2814
2815 return NETDEV_TX_OK;
2816}
2817
92915f71
GR		 2818/**
2819 * ixgbevf_set_mac - Change the Ethernet Address of the NIC
2820 * @netdev: network interface device structure
2821 * @p: pointer to an address structure
2822 *
2823 * Returns 0 on success, negative on failure
2824 **/
2825static int ixgbevf_set_mac(struct net_device *netdev, void *p)
2826{
2827 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2828 struct ixgbe_hw *hw = &adapter->hw;
2829 struct sockaddr *addr = p;
2830
2831 if (!is_valid_ether_addr(addr->sa_data))
2832 return -EADDRNOTAVAIL;
2833
2834 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2835 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
2836
2837 if (hw->mac.ops.set_rar)
2838 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
2839
2840 return 0;
2841}
2842
2843/**
2844 * ixgbevf_change_mtu - Change the Maximum Transfer Unit
2845 * @netdev: network interface device structure
2846 * @new_mtu: new value for maximum frame size
2847 *
2848 * Returns 0 on success, negative on failure
2849 **/
2850static int ixgbevf_change_mtu(struct net_device *netdev, int new_mtu)
2851{
2852 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
69bfbec4 2853 struct ixgbe_hw *hw = &adapter->hw;
92915f71 2854 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
69bfbec4
GR		 2855 int max_possible_frame = MAXIMUM_ETHERNET_VLAN_SIZE;
2856 u32 msg[2];
2857
2858 if (adapter->hw.mac.type == ixgbe_mac_X540_vf)
2859 max_possible_frame = IXGBE_MAX_JUMBO_FRAME_SIZE;
92915f71
GR		 2860
2861 /* MTU < 68 is an error and causes problems on some kernels */
69bfbec4 2862 if ((new_mtu < 68) || (max_frame > max_possible_frame))
92915f71
GR		 2863 return -EINVAL;
2864
2865 hw_dbg(&adapter->hw, "changing MTU from %d to %d\n",
2866 netdev->mtu, new_mtu);
2867 /* must set new MTU before calling down or up */
2868 netdev->mtu = new_mtu;
2869
795180d8
GR		 2870 if (!netif_running(netdev)) {
2871 msg[0] = IXGBE_VF_SET_LPE;
2872 msg[1] = max_frame;
2873 hw->mbx.ops.write_posted(hw, msg, 2);
2874 }
69bfbec4 2875
92915f71
GR		 2876 if (netif_running(netdev))
2877 ixgbevf_reinit_locked(adapter);
2878
2879 return 0;
2880}
2881
2882static void ixgbevf_shutdown(struct pci_dev *pdev)
2883{
2884 struct net_device *netdev = pci_get_drvdata(pdev);
2885 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2886
2887 netif_device_detach(netdev);
2888
2889 if (netif_running(netdev)) {
2890 ixgbevf_down(adapter);
2891 ixgbevf_free_irq(adapter);
2892 ixgbevf_free_all_tx_resources(adapter);
2893 ixgbevf_free_all_rx_resources(adapter);
2894 }
2895
92915f71 2896 pci_save_state(pdev);
92915f71
GR		 2897
2898 pci_disable_device(pdev);
2899}
2900
4197aa7b
ED		 2901static struct rtnl_link_stats64 *ixgbevf_get_stats(struct net_device *netdev,
2902 struct rtnl_link_stats64 *stats)
2903{
2904 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2905 unsigned int start;
2906 u64 bytes, packets;
2907 const struct ixgbevf_ring *ring;
2908 int i;
2909
2910 ixgbevf_update_stats(adapter);
2911
2912 stats->multicast = adapter->stats.vfmprc - adapter->stats.base_vfmprc;
2913
2914 for (i = 0; i < adapter->num_rx_queues; i++) {
2915 ring = &adapter->rx_ring[i];
2916 do {
2917 start = u64_stats_fetch_begin_bh(&ring->syncp);
2918 bytes = ring->total_bytes;
2919 packets = ring->total_packets;
2920 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
2921 stats->rx_bytes += bytes;
2922 stats->rx_packets += packets;
2923 }
2924
2925 for (i = 0; i < adapter->num_tx_queues; i++) {
2926 ring = &adapter->tx_ring[i];
2927 do {
2928 start = u64_stats_fetch_begin_bh(&ring->syncp);
2929 bytes = ring->total_bytes;
2930 packets = ring->total_packets;
2931 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
2932 stats->tx_bytes += bytes;
2933 stats->tx_packets += packets;
2934 }
2935
2936 return stats;
2937}
2938
92915f71 2939static const struct net_device_ops ixgbe_netdev_ops = {
c12db769
SH		 2940 .ndo_open = ixgbevf_open,
2941 .ndo_stop = ixgbevf_close,
2942 .ndo_start_xmit = ixgbevf_xmit_frame,
2943 .ndo_set_rx_mode = ixgbevf_set_rx_mode,
4197aa7b 2944 .ndo_get_stats64 = ixgbevf_get_stats,
92915f71 2945 .ndo_validate_addr = eth_validate_addr,
c12db769
SH		 2946 .ndo_set_mac_address = ixgbevf_set_mac,
2947 .ndo_change_mtu = ixgbevf_change_mtu,
2948 .ndo_tx_timeout = ixgbevf_tx_timeout,
c12db769
SH		 2949 .ndo_vlan_rx_add_vid = ixgbevf_vlan_rx_add_vid,
2950 .ndo_vlan_rx_kill_vid = ixgbevf_vlan_rx_kill_vid,
92915f71 2951};
92915f71
GR		 2952
2953static void ixgbevf_assign_netdev_ops(struct net_device *dev)
2954{
92915f71 2955 dev->netdev_ops = &ixgbe_netdev_ops;
92915f71
GR		 2956 ixgbevf_set_ethtool_ops(dev);
2957 dev->watchdog_timeo = 5 * HZ;
2958}
2959
2960/**
2961 * ixgbevf_probe - Device Initialization Routine
2962 * @pdev: PCI device information struct
2963 * @ent: entry in ixgbevf_pci_tbl
2964 *
2965 * Returns 0 on success, negative on failure
2966 *
2967 * ixgbevf_probe initializes an adapter identified by a pci_dev structure.
2968 * The OS initialization, configuring of the adapter private structure,
2969 * and a hardware reset occur.
2970 **/
2971static int __devinit ixgbevf_probe(struct pci_dev *pdev,
2972 const struct pci_device_id *ent)
2973{
2974 struct net_device *netdev;
2975 struct ixgbevf_adapter *adapter = NULL;
2976 struct ixgbe_hw *hw = NULL;
2977 const struct ixgbevf_info *ii = ixgbevf_info_tbl[ent->driver_data];
2978 static int cards_found;
2979 int err, pci_using_dac;
2980
2981 err = pci_enable_device(pdev);
2982 if (err)
2983 return err;
2984
2a1f8794
NN		 2985 if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) &&
2986 !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
92915f71
GR		 2987 pci_using_dac = 1;
2988 } else {
2a1f8794 2989 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
92915f71 2990 if (err) {
2a1f8794
NN		 2991 err = dma_set_coherent_mask(&pdev->dev,
2992 DMA_BIT_MASK(32));
92915f71
GR		 2993 if (err) {
2994 dev_err(&pdev->dev, "No usable DMA "
2995 "configuration, aborting\n");
2996 goto err_dma;
2997 }
2998 }
2999 pci_using_dac = 0;
3000 }
3001
3002 err = pci_request_regions(pdev, ixgbevf_driver_name);
3003 if (err) {
3004 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
3005 goto err_pci_reg;
3006 }
3007
3008 pci_set_master(pdev);
3009
92915f71
GR		 3010 netdev = alloc_etherdev_mq(sizeof(struct ixgbevf_adapter),
3011 MAX_TX_QUEUES);
92915f71
GR		 3012 if (!netdev) {
3013 err = -ENOMEM;
3014 goto err_alloc_etherdev;
3015 }
3016
3017 SET_NETDEV_DEV(netdev, &pdev->dev);
3018
3019 pci_set_drvdata(pdev, netdev);
3020 adapter = netdev_priv(netdev);
3021
3022 adapter->netdev = netdev;
3023 adapter->pdev = pdev;
3024 hw = &adapter->hw;
3025 hw->back = adapter;
b3f4d599 3026 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
92915f71
GR		 3027
3028 /*
3029 * call save state here in standalone driver because it relies on
3030 * adapter struct to exist, and needs to call netdev_priv
3031 */
3032 pci_save_state(pdev);
3033
3034 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
3035 pci_resource_len(pdev, 0));
3036 if (!hw->hw_addr) {
3037 err = -EIO;
3038 goto err_ioremap;
3039 }
3040
3041 ixgbevf_assign_netdev_ops(netdev);
3042
3043 adapter->bd_number = cards_found;
3044
3045 /* Setup hw api */
3046 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
3047 hw->mac.type = ii->mac;
3048
3049 memcpy(&hw->mbx.ops, &ixgbevf_mbx_ops,
f416dfc0 3050 sizeof(struct ixgbe_mbx_operations));
92915f71 3051
92915f71
GR		 3052 /* setup the private structure */
3053 err = ixgbevf_sw_init(adapter);
1a0d6ae5
DK		 3054 if (err)
3055 goto err_sw_init;
3056
3057 /* The HW MAC address was set and/or determined in sw_init */
3058 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
3059
3060 if (!is_valid_ether_addr(netdev->dev_addr)) {
3061 pr_err("invalid MAC address\n");
3062 err = -EIO;
3063 goto err_sw_init;
3064 }
92915f71 3065
471a76de 3066 netdev->hw_features = NETIF_F_SG |
92915f71 3067 NETIF_F_IP_CSUM |
471a76de
MM		 3068 NETIF_F_IPV6_CSUM |
3069 NETIF_F_TSO |
3070 NETIF_F_TSO6 |
3071 NETIF_F_RXCSUM;
3072
3073 netdev->features = netdev->hw_features |
92915f71
GR		 3074 NETIF_F_HW_VLAN_TX |
3075 NETIF_F_HW_VLAN_RX |
3076 NETIF_F_HW_VLAN_FILTER;
3077
92915f71
GR		 3078 netdev->vlan_features |= NETIF_F_TSO;
3079 netdev->vlan_features |= NETIF_F_TSO6;
3080 netdev->vlan_features |= NETIF_F_IP_CSUM;
3bfacf96 3081 netdev->vlan_features |= NETIF_F_IPV6_CSUM;
92915f71
GR		 3082 netdev->vlan_features |= NETIF_F_SG;
3083
3084 if (pci_using_dac)
3085 netdev->features |= NETIF_F_HIGHDMA;
3086
01789349
JP		 3087 netdev->priv_flags |= IFF_UNICAST_FLT;
3088
92915f71 3089 init_timer(&adapter->watchdog_timer);
c061b18d 3090 adapter->watchdog_timer.function = ixgbevf_watchdog;
92915f71
GR		 3091 adapter->watchdog_timer.data = (unsigned long)adapter;
3092
3093 INIT_WORK(&adapter->reset_task, ixgbevf_reset_task);
3094 INIT_WORK(&adapter->watchdog_task, ixgbevf_watchdog_task);
3095
3096 err = ixgbevf_init_interrupt_scheme(adapter);
3097 if (err)
3098 goto err_sw_init;
3099
3100 /* pick up the PCI bus settings for reporting later */
3101 if (hw->mac.ops.get_bus_info)
3102 hw->mac.ops.get_bus_info(hw);
3103
92915f71
GR		 3104 strcpy(netdev->name, "eth%d");
3105
3106 err = register_netdev(netdev);
3107 if (err)
3108 goto err_register;
3109
5d426ad1
GR		 3110 netif_carrier_off(netdev);
3111
33bd9f60
GR		 3112 ixgbevf_init_last_counter_stats(adapter);
3113
92915f71 3114 /* print the MAC address */
f794e7ef 3115 hw_dbg(hw, "%pM\n", netdev->dev_addr);
92915f71
GR		 3116
3117 hw_dbg(hw, "MAC: %d\n", hw->mac.type);
3118
92915f71
GR		 3119 hw_dbg(hw, "Intel(R) 82599 Virtual Function\n");
3120 cards_found++;
3121 return 0;
3122
3123err_register:
3124err_sw_init:
3125 ixgbevf_reset_interrupt_capability(adapter);
3126 iounmap(hw->hw_addr);
3127err_ioremap:
3128 free_netdev(netdev);
3129err_alloc_etherdev:
3130 pci_release_regions(pdev);
3131err_pci_reg:
3132err_dma:
3133 pci_disable_device(pdev);
3134 return err;
3135}
3136
3137/**
3138 * ixgbevf_remove - Device Removal Routine
3139 * @pdev: PCI device information struct
3140 *
3141 * ixgbevf_remove is called by the PCI subsystem to alert the driver
3142 * that it should release a PCI device. The could be caused by a
3143 * Hot-Plug event, or because the driver is going to be removed from
3144 * memory.
3145 **/
3146static void __devexit ixgbevf_remove(struct pci_dev *pdev)
3147{
3148 struct net_device *netdev = pci_get_drvdata(pdev);
3149 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3150
3151 set_bit(__IXGBEVF_DOWN, &adapter->state);
3152
3153 del_timer_sync(&adapter->watchdog_timer);
3154
23f333a2 3155 cancel_work_sync(&adapter->reset_task);
92915f71
GR		 3156 cancel_work_sync(&adapter->watchdog_task);
3157
fd13a9ab 3158 if (netdev->reg_state == NETREG_REGISTERED)
92915f71 3159 unregister_netdev(netdev);
92915f71
GR		 3160
3161 ixgbevf_reset_interrupt_capability(adapter);
3162
3163 iounmap(adapter->hw.hw_addr);
3164 pci_release_regions(pdev);
3165
3166 hw_dbg(&adapter->hw, "Remove complete\n");
3167
3168 kfree(adapter->tx_ring);
3169 kfree(adapter->rx_ring);
3170
3171 free_netdev(netdev);
3172
3173 pci_disable_device(pdev);
3174}
3175
3176static struct pci_driver ixgbevf_driver = {
3177 .name = ixgbevf_driver_name,
3178 .id_table = ixgbevf_pci_tbl,
3179 .probe = ixgbevf_probe,
3180 .remove = __devexit_p(ixgbevf_remove),
3181 .shutdown = ixgbevf_shutdown,
3182};
3183
3184/**
65d676c8 3185 * ixgbevf_init_module - Driver Registration Routine
92915f71 3186 *
65d676c8 3187 * ixgbevf_init_module is the first routine called when the driver is
92915f71
GR		 3188 * loaded. All it does is register with the PCI subsystem.
3189 **/
3190static int __init ixgbevf_init_module(void)
3191{
3192 int ret;
dbd9636e
JK		 3193 pr_info("%s - version %s\n", ixgbevf_driver_string,
3194 ixgbevf_driver_version);
92915f71 3195
dbd9636e 3196 pr_info("%s\n", ixgbevf_copyright);
92915f71
GR		 3197
3198 ret = pci_register_driver(&ixgbevf_driver);
3199 return ret;
3200}
3201
3202module_init(ixgbevf_init_module);
3203
3204/**
65d676c8 3205 * ixgbevf_exit_module - Driver Exit Cleanup Routine
92915f71 3206 *
65d676c8 3207 * ixgbevf_exit_module is called just before the driver is removed
92915f71
GR		 3208 * from memory.
3209 **/
3210static void __exit ixgbevf_exit_module(void)
3211{
3212 pci_unregister_driver(&ixgbevf_driver);
3213}
3214
3215#ifdef DEBUG
3216/**
65d676c8 3217 * ixgbevf_get_hw_dev_name - return device name string
92915f71
GR		 3218 * used by hardware layer to print debugging information
3219 **/
3220char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw)
3221{
3222 struct ixgbevf_adapter *adapter = hw->back;
3223 return adapter->netdev->name;
3224}
3225
3226#endif
3227module_exit(ixgbevf_exit_module);
3228
3229/* ixgbevf_main.c */
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