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[mirror_ubuntu-artful-kernel.git] / drivers / net / ethernet / intel / ixgbevf / ixgbevf_main.c
CommitLineData
92915f71
GR		 1/*******************************************************************************
2
3 Intel 82599 Virtual Function driver
5c47a2b6 4 Copyright(c) 1999 - 2012 Intel Corporation.
92915f71
GR		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26*******************************************************************************/
27
28
29/******************************************************************************
30 Copyright (c)2006 - 2007 Myricom, Inc. for some LRO specific code
31******************************************************************************/
dbd9636e
JK		 32
33#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
34
92915f71 35#include <linux/types.h>
dadcd65f 36#include <linux/bitops.h>
92915f71
GR		 37#include <linux/module.h>
38#include <linux/pci.h>
39#include <linux/netdevice.h>
40#include <linux/vmalloc.h>
41#include <linux/string.h>
42#include <linux/in.h>
43#include <linux/ip.h>
44#include <linux/tcp.h>
70a10e25 45#include <linux/sctp.h>
92915f71 46#include <linux/ipv6.h>
5a0e3ad6 47#include <linux/slab.h>
92915f71
GR		 48#include <net/checksum.h>
49#include <net/ip6_checksum.h>
50#include <linux/ethtool.h>
01789349 51#include <linux/if.h>
92915f71 52#include <linux/if_vlan.h>
70c71606 53#include <linux/prefetch.h>
92915f71
GR		 54
55#include "ixgbevf.h"
56
3d8fe98f 57const char ixgbevf_driver_name[] = "ixgbevf";
92915f71 58static const char ixgbevf_driver_string[] =
422e05d1 59 "Intel(R) 10 Gigabit PCI Express Virtual Function Network Driver";
92915f71 60
1b3d2d77 61#define DRV_VERSION "2.7.12-k"
92915f71 62const char ixgbevf_driver_version[] = DRV_VERSION;
66c87bd5 63static char ixgbevf_copyright[] =
5c47a2b6 64 "Copyright (c) 2009 - 2012 Intel Corporation.";
92915f71
GR		 65
66static const struct ixgbevf_info *ixgbevf_info_tbl[] = {
2316aa2a
GR		 67 [board_82599_vf] = &ixgbevf_82599_vf_info,
68 [board_X540_vf] = &ixgbevf_X540_vf_info,
92915f71
GR		 69};
70
71/* ixgbevf_pci_tbl - PCI Device ID Table
72 *
73 * Wildcard entries (PCI_ANY_ID) should come last
74 * Last entry must be all 0s
75 *
76 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
77 * Class, Class Mask, private data (not used) }
78 */
79static struct pci_device_id ixgbevf_pci_tbl[] = {
80 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF),
81 board_82599_vf},
2316aa2a
GR		 82 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540_VF),
83 board_X540_vf},
92915f71
GR		 84
85 /* required last entry */
86 {0, }
87};
88MODULE_DEVICE_TABLE(pci, ixgbevf_pci_tbl);
89
90MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
91MODULE_DESCRIPTION("Intel(R) 82599 Virtual Function Driver");
92MODULE_LICENSE("GPL");
93MODULE_VERSION(DRV_VERSION);
94
b3f4d599 95#define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
96static int debug = -1;
97module_param(debug, int, 0);
98MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
92915f71
GR		 99
100/* forward decls */
fa71ae27 101static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector);
56e94095 102static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter);
92915f71
GR		 103
104static inline void ixgbevf_release_rx_desc(struct ixgbe_hw *hw,
105 struct ixgbevf_ring *rx_ring,
106 u32 val)
107{
108 /*
109 * Force memory writes to complete before letting h/w
110 * know there are new descriptors to fetch. (Only
111 * applicable for weak-ordered memory model archs,
112 * such as IA-64).
113 */
114 wmb();
115 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(rx_ring->reg_idx), val);
116}
117
49ce9c2c 118/**
65d676c8 119 * ixgbevf_set_ivar - set IVAR registers - maps interrupt causes to vectors
92915f71
GR		 120 * @adapter: pointer to adapter struct
121 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
122 * @queue: queue to map the corresponding interrupt to
123 * @msix_vector: the vector to map to the corresponding queue
124 *
125 */
126static void ixgbevf_set_ivar(struct ixgbevf_adapter *adapter, s8 direction,
127 u8 queue, u8 msix_vector)
128{
129 u32 ivar, index;
130 struct ixgbe_hw *hw = &adapter->hw;
131 if (direction == -1) {
132 /* other causes */
133 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
134 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC);
135 ivar &= ~0xFF;
136 ivar |= msix_vector;
137 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar);
138 } else {
139 /* tx or rx causes */
140 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
141 index = ((16 * (queue & 1)) + (8 * direction));
142 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(queue >> 1));
143 ivar &= ~(0xFF << index);
144 ivar |= (msix_vector << index);
145 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(queue >> 1), ivar);
146 }
147}
148
70a10e25 149static void ixgbevf_unmap_and_free_tx_resource(struct ixgbevf_ring *tx_ring,
92915f71
GR		 150 struct ixgbevf_tx_buffer
151 *tx_buffer_info)
152{
153 if (tx_buffer_info->dma) {
154 if (tx_buffer_info->mapped_as_page)
70a10e25 155 dma_unmap_page(tx_ring->dev,
92915f71
GR		 156 tx_buffer_info->dma,
157 tx_buffer_info->length,
2a1f8794 158 DMA_TO_DEVICE);
92915f71 159 else
70a10e25 160 dma_unmap_single(tx_ring->dev,
92915f71
GR		 161 tx_buffer_info->dma,
162 tx_buffer_info->length,
2a1f8794 163 DMA_TO_DEVICE);
92915f71
GR		 164 tx_buffer_info->dma = 0;
165 }
166 if (tx_buffer_info->skb) {
167 dev_kfree_skb_any(tx_buffer_info->skb);
168 tx_buffer_info->skb = NULL;
169 }
170 tx_buffer_info->time_stamp = 0;
171 /* tx_buffer_info must be completely set up in the transmit path */
172}
173
92915f71
GR		 174#define IXGBE_MAX_TXD_PWR 14
175#define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
176
177/* Tx Descriptors needed, worst case */
3595990a
AD		 178#define TXD_USE_COUNT(S) DIV_ROUND_UP((S), IXGBE_MAX_DATA_PER_TXD)
179#define DESC_NEEDED (MAX_SKB_FRAGS + 4)
92915f71
GR		 180
181static void ixgbevf_tx_timeout(struct net_device *netdev);
182
183/**
184 * ixgbevf_clean_tx_irq - Reclaim resources after transmit completes
fa71ae27 185 * @q_vector: board private structure
92915f71
GR		 186 * @tx_ring: tx ring to clean
187 **/
fa71ae27 188static bool ixgbevf_clean_tx_irq(struct ixgbevf_q_vector *q_vector,
92915f71
GR		 189 struct ixgbevf_ring *tx_ring)
190{
fa71ae27 191 struct ixgbevf_adapter *adapter = q_vector->adapter;
92915f71
GR		 192 union ixgbe_adv_tx_desc *tx_desc, *eop_desc;
193 struct ixgbevf_tx_buffer *tx_buffer_info;
194 unsigned int i, eop, count = 0;
195 unsigned int total_bytes = 0, total_packets = 0;
196
10cc1bdd
AD		 197 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
198 return true;
199
92915f71
GR		 200 i = tx_ring->next_to_clean;
201 eop = tx_ring->tx_buffer_info[i].next_to_watch;
908421f6 202 eop_desc = IXGBEVF_TX_DESC(tx_ring, eop);
92915f71
GR		 203
204 while ((eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)) &&
fa71ae27 205 (count < tx_ring->count)) {
92915f71 206 bool cleaned = false;
2d0bb1c1 207 rmb(); /* read buffer_info after eop_desc */
98b9e48f
GR		 208 /* eop could change between read and DD-check */
209 if (unlikely(eop != tx_ring->tx_buffer_info[i].next_to_watch))
210 goto cont_loop;
92915f71
GR		 211 for ( ; !cleaned; count++) {
212 struct sk_buff *skb;
908421f6 213 tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
92915f71
GR		 214 tx_buffer_info = &tx_ring->tx_buffer_info[i];
215 cleaned = (i == eop);
216 skb = tx_buffer_info->skb;
217
218 if (cleaned && skb) {
219 unsigned int segs, bytecount;
220
221 /* gso_segs is currently only valid for tcp */
222 segs = skb_shinfo(skb)->gso_segs ?: 1;
223 /* multiply data chunks by size of headers */
224 bytecount = ((segs - 1) * skb_headlen(skb)) +
225 skb->len;
226 total_packets += segs;
227 total_bytes += bytecount;
228 }
229
70a10e25 230 ixgbevf_unmap_and_free_tx_resource(tx_ring,
92915f71
GR		 231 tx_buffer_info);
232
233 tx_desc->wb.status = 0;
234
235 i++;
236 if (i == tx_ring->count)
237 i = 0;
238 }
239
98b9e48f 240cont_loop:
92915f71 241 eop = tx_ring->tx_buffer_info[i].next_to_watch;
908421f6 242 eop_desc = IXGBEVF_TX_DESC(tx_ring, eop);
92915f71
GR		 243 }
244
245 tx_ring->next_to_clean = i;
246
247#define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
fb40195c 248 if (unlikely(count && netif_carrier_ok(tx_ring->netdev) &&
92915f71
GR		 249 (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
250 /* Make sure that anybody stopping the queue after this
251 * sees the new next_to_clean.
252 */
253 smp_mb();
fb40195c
AD		 254 if (__netif_subqueue_stopped(tx_ring->netdev,
255 tx_ring->queue_index) &&
92915f71 256 !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
fb40195c
AD		 257 netif_wake_subqueue(tx_ring->netdev,
258 tx_ring->queue_index);
92915f71
GR		 259 ++adapter->restart_queue;
260 }
92915f71
GR		 261 }
262
4197aa7b 263 u64_stats_update_begin(&tx_ring->syncp);
92915f71
GR		 264 tx_ring->total_bytes += total_bytes;
265 tx_ring->total_packets += total_packets;
4197aa7b 266 u64_stats_update_end(&tx_ring->syncp);
ac6ed8f0
GR		 267 q_vector->tx.total_bytes += total_bytes;
268 q_vector->tx.total_packets += total_packets;
92915f71 269
fa71ae27 270 return count < tx_ring->count;
92915f71
GR		 271}
272
273/**
274 * ixgbevf_receive_skb - Send a completed packet up the stack
275 * @q_vector: structure containing interrupt and ring information
276 * @skb: packet to send up
277 * @status: hardware indication of status of receive
92915f71
GR		 278 * @rx_desc: rx descriptor
279 **/
280static void ixgbevf_receive_skb(struct ixgbevf_q_vector *q_vector,
281 struct sk_buff *skb, u8 status,
92915f71
GR		 282 union ixgbe_adv_rx_desc *rx_desc)
283{
284 struct ixgbevf_adapter *adapter = q_vector->adapter;
285 bool is_vlan = (status & IXGBE_RXD_STAT_VP);
dd1ed3b7 286 u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan);
92915f71 287
5d9a533b 288 if (is_vlan && test_bit(tag & VLAN_VID_MASK, adapter->active_vlans))
dadcd65f 289 __vlan_hwaccel_put_tag(skb, tag);
dadcd65f 290
366c1099
GR		 291 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL))
292 napi_gro_receive(&q_vector->napi, skb);
293 else
294 netif_rx(skb);
92915f71
GR		 295}
296
297/**
298 * ixgbevf_rx_checksum - indicate in skb if hw indicated a good cksum
299 * @adapter: address of board private structure
300 * @status_err: hardware indication of status of receive
301 * @skb: skb currently being received and modified
302 **/
303static inline void ixgbevf_rx_checksum(struct ixgbevf_adapter *adapter,
fb40195c 304 struct ixgbevf_ring *ring,
92915f71
GR		 305 u32 status_err, struct sk_buff *skb)
306{
bc8acf2c 307 skb_checksum_none_assert(skb);
92915f71
GR		 308
309 /* Rx csum disabled */
fb40195c 310 if (!(ring->netdev->features & NETIF_F_RXCSUM))
92915f71
GR		 311 return;
312
313 /* if IP and error */
314 if ((status_err & IXGBE_RXD_STAT_IPCS) &&
315 (status_err & IXGBE_RXDADV_ERR_IPE)) {
316 adapter->hw_csum_rx_error++;
317 return;
318 }
319
320 if (!(status_err & IXGBE_RXD_STAT_L4CS))
321 return;
322
323 if (status_err & IXGBE_RXDADV_ERR_TCPE) {
324 adapter->hw_csum_rx_error++;
325 return;
326 }
327
328 /* It must be a TCP or UDP packet with a valid checksum */
329 skb->ip_summed = CHECKSUM_UNNECESSARY;
330 adapter->hw_csum_rx_good++;
331}
332
333/**
334 * ixgbevf_alloc_rx_buffers - Replace used receive buffers; packet split
335 * @adapter: address of board private structure
336 **/
337static void ixgbevf_alloc_rx_buffers(struct ixgbevf_adapter *adapter,
338 struct ixgbevf_ring *rx_ring,
339 int cleaned_count)
340{
341 struct pci_dev *pdev = adapter->pdev;
342 union ixgbe_adv_rx_desc *rx_desc;
343 struct ixgbevf_rx_buffer *bi;
fb40195c 344 unsigned int i = rx_ring->next_to_use;
92915f71 345
92915f71
GR		 346 bi = &rx_ring->rx_buffer_info[i];
347
348 while (cleaned_count--) {
908421f6 349 rx_desc = IXGBEVF_RX_DESC(rx_ring, i);
b9dd245b
GR		 350
351 if (!bi->skb) {
352 struct sk_buff *skb;
353
fb40195c
AD		 354 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
355 rx_ring->rx_buf_len);
92915f71
GR		 356 if (!skb) {
357 adapter->alloc_rx_buff_failed++;
358 goto no_buffers;
359 }
92915f71 360 bi->skb = skb;
b9dd245b 361
2a1f8794 362 bi->dma = dma_map_single(&pdev->dev, skb->data,
92915f71 363 rx_ring->rx_buf_len,
2a1f8794 364 DMA_FROM_DEVICE);
6132ee8a
GR		 365 if (dma_mapping_error(&pdev->dev, bi->dma)) {
366 dev_kfree_skb(skb);
367 bi->skb = NULL;
368 dev_err(&pdev->dev, "RX DMA map failed\n");
369 break;
370 }
92915f71 371 }
77d5dfca 372 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
92915f71
GR		 373
374 i++;
375 if (i == rx_ring->count)
376 i = 0;
377 bi = &rx_ring->rx_buffer_info[i];
378 }
379
380no_buffers:
381 if (rx_ring->next_to_use != i) {
382 rx_ring->next_to_use = i;
92915f71
GR		 383
384 ixgbevf_release_rx_desc(&adapter->hw, rx_ring, i);
385 }
386}
387
388static inline void ixgbevf_irq_enable_queues(struct ixgbevf_adapter *adapter,
5f3600eb 389 u32 qmask)
92915f71 390{
92915f71
GR		 391 struct ixgbe_hw *hw = &adapter->hw;
392
5f3600eb 393 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, qmask);
92915f71
GR		 394}
395
92915f71
GR		 396static bool ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector,
397 struct ixgbevf_ring *rx_ring,
fa71ae27 398 int budget)
92915f71
GR		 399{
400 struct ixgbevf_adapter *adapter = q_vector->adapter;
401 struct pci_dev *pdev = adapter->pdev;
402 union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
403 struct ixgbevf_rx_buffer *rx_buffer_info, *next_buffer;
404 struct sk_buff *skb;
405 unsigned int i;
406 u32 len, staterr;
92915f71
GR		 407 int cleaned_count = 0;
408 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
409
410 i = rx_ring->next_to_clean;
908421f6 411 rx_desc = IXGBEVF_RX_DESC(rx_ring, i);
92915f71
GR		 412 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
413 rx_buffer_info = &rx_ring->rx_buffer_info[i];
414
415 while (staterr & IXGBE_RXD_STAT_DD) {
fa71ae27 416 if (!budget)
92915f71 417 break;
fa71ae27 418 budget--;
92915f71 419
2d0bb1c1 420 rmb(); /* read descriptor and rx_buffer_info after status DD */
77d5dfca 421 len = le16_to_cpu(rx_desc->wb.upper.length);
92915f71
GR		 422 skb = rx_buffer_info->skb;
423 prefetch(skb->data - NET_IP_ALIGN);
424 rx_buffer_info->skb = NULL;
425
426 if (rx_buffer_info->dma) {
2a1f8794 427 dma_unmap_single(&pdev->dev, rx_buffer_info->dma,
92915f71 428 rx_ring->rx_buf_len,
2a1f8794 429 DMA_FROM_DEVICE);
92915f71
GR		 430 rx_buffer_info->dma = 0;
431 skb_put(skb, len);
432 }
433
92915f71
GR		 434 i++;
435 if (i == rx_ring->count)
436 i = 0;
437
908421f6 438 next_rxd = IXGBEVF_RX_DESC(rx_ring, i);
92915f71
GR		 439 prefetch(next_rxd);
440 cleaned_count++;
441
442 next_buffer = &rx_ring->rx_buffer_info[i];
443
444 if (!(staterr & IXGBE_RXD_STAT_EOP)) {
77d5dfca 445 skb->next = next_buffer->skb;
5c60f81a 446 IXGBE_CB(skb->next)->prev = skb;
92915f71
GR		 447 adapter->non_eop_descs++;
448 goto next_desc;
449 }
450
5c60f81a
AD		 451 /* we should not be chaining buffers, if we did drop the skb */
452 if (IXGBE_CB(skb)->prev) {
453 do {
454 struct sk_buff *this = skb;
455 skb = IXGBE_CB(skb)->prev;
456 dev_kfree_skb(this);
457 } while (skb);
458 goto next_desc;
459 }
460
92915f71
GR		 461 /* ERR_MASK will only have valid bits if EOP set */
462 if (unlikely(staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK)) {
463 dev_kfree_skb_irq(skb);
464 goto next_desc;
465 }
466
fb40195c 467 ixgbevf_rx_checksum(adapter, rx_ring, staterr, skb);
92915f71
GR		 468
469 /* probably a little skewed due to removing CRC */
470 total_rx_bytes += skb->len;
471 total_rx_packets++;
472
473 /*
474 * Work around issue of some types of VM to VM loop back
475 * packets not getting split correctly
476 */
477 if (staterr & IXGBE_RXD_STAT_LB) {
e743d313 478 u32 header_fixup_len = skb_headlen(skb);
92915f71
GR		 479 if (header_fixup_len < 14)
480 skb_push(skb, header_fixup_len);
481 }
fb40195c 482 skb->protocol = eth_type_trans(skb, rx_ring->netdev);
92915f71 483
815cccbf
JF		 484 /* Workaround hardware that can't do proper VEPA multicast
485 * source pruning.
486 */
487 if ((skb->pkt_type & (PACKET_BROADCAST | PACKET_MULTICAST)) &&
488 !(compare_ether_addr(adapter->netdev->dev_addr,
489 eth_hdr(skb)->h_source))) {
490 dev_kfree_skb_irq(skb);
491 goto next_desc;
492 }
493
b3d58a8f 494 ixgbevf_receive_skb(q_vector, skb, staterr, rx_desc);
92915f71
GR		 495
496next_desc:
497 rx_desc->wb.upper.status_error = 0;
498
499 /* return some buffers to hardware, one at a time is too slow */
500 if (cleaned_count >= IXGBEVF_RX_BUFFER_WRITE) {
501 ixgbevf_alloc_rx_buffers(adapter, rx_ring,
502 cleaned_count);
503 cleaned_count = 0;
504 }
505
506 /* use prefetched values */
507 rx_desc = next_rxd;
508 rx_buffer_info = &rx_ring->rx_buffer_info[i];
509
510 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
511 }
512
513 rx_ring->next_to_clean = i;
514 cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
515
516 if (cleaned_count)
517 ixgbevf_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
518
4197aa7b 519 u64_stats_update_begin(&rx_ring->syncp);
92915f71
GR		 520 rx_ring->total_packets += total_rx_packets;
521 rx_ring->total_bytes += total_rx_bytes;
4197aa7b 522 u64_stats_update_end(&rx_ring->syncp);
ac6ed8f0
GR		 523 q_vector->rx.total_packets += total_rx_packets;
524 q_vector->rx.total_bytes += total_rx_bytes;
92915f71 525
fa71ae27 526 return !!budget;
92915f71
GR		 527}
528
529/**
fa71ae27 530 * ixgbevf_poll - NAPI polling calback
92915f71
GR		 531 * @napi: napi struct with our devices info in it
532 * @budget: amount of work driver is allowed to do this pass, in packets
533 *
fa71ae27 534 * This function will clean more than one or more rings associated with a
92915f71
GR		 535 * q_vector.
536 **/
fa71ae27 537static int ixgbevf_poll(struct napi_struct *napi, int budget)
92915f71
GR		 538{
539 struct ixgbevf_q_vector *q_vector =
540 container_of(napi, struct ixgbevf_q_vector, napi);
541 struct ixgbevf_adapter *adapter = q_vector->adapter;
fa71ae27
AD		 542 struct ixgbevf_ring *ring;
543 int per_ring_budget;
544 bool clean_complete = true;
545
546 ixgbevf_for_each_ring(ring, q_vector->tx)
547 clean_complete &= ixgbevf_clean_tx_irq(q_vector, ring);
92915f71
GR		 548
549 /* attempt to distribute budget to each queue fairly, but don't allow
550 * the budget to go below 1 because we'll exit polling */
fa71ae27
AD		 551 if (q_vector->rx.count > 1)
552 per_ring_budget = max(budget/q_vector->rx.count, 1);
553 else
554 per_ring_budget = budget;
555
366c1099 556 adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
fa71ae27
AD		 557 ixgbevf_for_each_ring(ring, q_vector->rx)
558 clean_complete &= ixgbevf_clean_rx_irq(q_vector, ring,
559 per_ring_budget);
366c1099 560 adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
fa71ae27
AD		 561
562 /* If all work not completed, return budget and keep polling */
563 if (!clean_complete)
564 return budget;
565 /* all work done, exit the polling mode */
566 napi_complete(napi);
567 if (adapter->rx_itr_setting & 1)
568 ixgbevf_set_itr(q_vector);
569 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
570 ixgbevf_irq_enable_queues(adapter,
571 1 << q_vector->v_idx);
92915f71 572
fa71ae27 573 return 0;
92915f71
GR		 574}
575
ce422606
GR		 576/**
577 * ixgbevf_write_eitr - write VTEITR register in hardware specific way
578 * @q_vector: structure containing interrupt and ring information
579 */
580static void ixgbevf_write_eitr(struct ixgbevf_q_vector *q_vector)
581{
582 struct ixgbevf_adapter *adapter = q_vector->adapter;
583 struct ixgbe_hw *hw = &adapter->hw;
584 int v_idx = q_vector->v_idx;
585 u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
586
587 /*
588 * set the WDIS bit to not clear the timer bits and cause an
589 * immediate assertion of the interrupt
590 */
591 itr_reg |= IXGBE_EITR_CNT_WDIS;
592
593 IXGBE_WRITE_REG(hw, IXGBE_VTEITR(v_idx), itr_reg);
594}
92915f71
GR		 595
596/**
597 * ixgbevf_configure_msix - Configure MSI-X hardware
598 * @adapter: board private structure
599 *
600 * ixgbevf_configure_msix sets up the hardware to properly generate MSI-X
601 * interrupts.
602 **/
603static void ixgbevf_configure_msix(struct ixgbevf_adapter *adapter)
604{
605 struct ixgbevf_q_vector *q_vector;
6b43c446 606 int q_vectors, v_idx;
92915f71
GR		 607
608 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
5f3600eb 609 adapter->eims_enable_mask = 0;
92915f71
GR		 610
611 /*
612 * Populate the IVAR table and set the ITR values to the
613 * corresponding register.
614 */
615 for (v_idx = 0; v_idx < q_vectors; v_idx++) {
6b43c446 616 struct ixgbevf_ring *ring;
92915f71 617 q_vector = adapter->q_vector[v_idx];
6b43c446
AD		 618
619 ixgbevf_for_each_ring(ring, q_vector->rx)
620 ixgbevf_set_ivar(adapter, 0, ring->reg_idx, v_idx);
621
622 ixgbevf_for_each_ring(ring, q_vector->tx)
623 ixgbevf_set_ivar(adapter, 1, ring->reg_idx, v_idx);
92915f71 624
5f3600eb
AD		 625 if (q_vector->tx.ring && !q_vector->rx.ring) {
626 /* tx only vector */
627 if (adapter->tx_itr_setting == 1)
628 q_vector->itr = IXGBE_10K_ITR;
629 else
630 q_vector->itr = adapter->tx_itr_setting;
631 } else {
632 /* rx or rx/tx vector */
633 if (adapter->rx_itr_setting == 1)
634 q_vector->itr = IXGBE_20K_ITR;
635 else
636 q_vector->itr = adapter->rx_itr_setting;
637 }
638
639 /* add q_vector eims value to global eims_enable_mask */
640 adapter->eims_enable_mask |= 1 << v_idx;
92915f71 641
5f3600eb 642 ixgbevf_write_eitr(q_vector);
92915f71
GR		 643 }
644
645 ixgbevf_set_ivar(adapter, -1, 1, v_idx);
5f3600eb
AD		 646 /* setup eims_other and add value to global eims_enable_mask */
647 adapter->eims_other = 1 << v_idx;
648 adapter->eims_enable_mask |= adapter->eims_other;
92915f71
GR		 649}
650
651enum latency_range {
652 lowest_latency = 0,
653 low_latency = 1,
654 bulk_latency = 2,
655 latency_invalid = 255
656};
657
658/**
659 * ixgbevf_update_itr - update the dynamic ITR value based on statistics
5f3600eb
AD		 660 * @q_vector: structure containing interrupt and ring information
661 * @ring_container: structure containing ring performance data
92915f71
GR		 662 *
663 * Stores a new ITR value based on packets and byte
664 * counts during the last interrupt. The advantage of per interrupt
665 * computation is faster updates and more accurate ITR for the current
666 * traffic pattern. Constants in this function were computed
667 * based on theoretical maximum wire speed and thresholds were set based
668 * on testing data as well as attempting to minimize response time
669 * while increasing bulk throughput.
670 **/
5f3600eb
AD		 671static void ixgbevf_update_itr(struct ixgbevf_q_vector *q_vector,
672 struct ixgbevf_ring_container *ring_container)
92915f71 673{
5f3600eb
AD		 674 int bytes = ring_container->total_bytes;
675 int packets = ring_container->total_packets;
92915f71
GR		 676 u32 timepassed_us;
677 u64 bytes_perint;
5f3600eb 678 u8 itr_setting = ring_container->itr;
92915f71
GR		 679
680 if (packets == 0)
5f3600eb 681 return;
92915f71
GR		 682
683 /* simple throttlerate management
684 * 0-20MB/s lowest (100000 ints/s)
685 * 20-100MB/s low (20000 ints/s)
686 * 100-1249MB/s bulk (8000 ints/s)
687 */
688 /* what was last interrupt timeslice? */
5f3600eb 689 timepassed_us = q_vector->itr >> 2;
92915f71
GR		 690 bytes_perint = bytes / timepassed_us; /* bytes/usec */
691
692 switch (itr_setting) {
693 case lowest_latency:
e2c28ce7 694 if (bytes_perint > 10)
5f3600eb 695 itr_setting = low_latency;
92915f71
GR		 696 break;
697 case low_latency:
e2c28ce7 698 if (bytes_perint > 20)
5f3600eb 699 itr_setting = bulk_latency;
e2c28ce7 700 else if (bytes_perint <= 10)
5f3600eb 701 itr_setting = lowest_latency;
92915f71
GR		 702 break;
703 case bulk_latency:
e2c28ce7 704 if (bytes_perint <= 20)
5f3600eb 705 itr_setting = low_latency;
92915f71
GR		 706 break;
707 }
708
5f3600eb
AD		 709 /* clear work counters since we have the values we need */
710 ring_container->total_bytes = 0;
711 ring_container->total_packets = 0;
712
713 /* write updated itr to ring container */
714 ring_container->itr = itr_setting;
92915f71
GR		 715}
716
fa71ae27 717static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector)
92915f71 718{
5f3600eb
AD		 719 u32 new_itr = q_vector->itr;
720 u8 current_itr;
92915f71 721
5f3600eb
AD		 722 ixgbevf_update_itr(q_vector, &q_vector->tx);
723 ixgbevf_update_itr(q_vector, &q_vector->rx);
92915f71 724
6b43c446 725 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
92915f71
GR		 726
727 switch (current_itr) {
728 /* counts and packets in update_itr are dependent on these numbers */
729 case lowest_latency:
5f3600eb 730 new_itr = IXGBE_100K_ITR;
92915f71
GR		 731 break;
732 case low_latency:
5f3600eb 733 new_itr = IXGBE_20K_ITR;
92915f71
GR		 734 break;
735 case bulk_latency:
736 default:
5f3600eb 737 new_itr = IXGBE_8K_ITR;
92915f71
GR		 738 break;
739 }
740
5f3600eb 741 if (new_itr != q_vector->itr) {
92915f71 742 /* do an exponential smoothing */
5f3600eb
AD		 743 new_itr = (10 * new_itr * q_vector->itr) /
744 ((9 * new_itr) + q_vector->itr);
745
746 /* save the algorithm value here */
747 q_vector->itr = new_itr;
748
749 ixgbevf_write_eitr(q_vector);
92915f71 750 }
92915f71
GR		 751}
752
4b2cd27f 753static irqreturn_t ixgbevf_msix_other(int irq, void *data)
92915f71 754{
fa71ae27 755 struct ixgbevf_adapter *adapter = data;
92915f71 756 struct ixgbe_hw *hw = &adapter->hw;
08259594 757
4b2cd27f 758 hw->mac.get_link_status = 1;
a9ee25a2 759
4b2cd27f
AD		 760 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
761 mod_timer(&adapter->watchdog_timer, jiffies);
3a2c4033 762
5f3600eb
AD		 763 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_other);
764
92915f71
GR		 765 return IRQ_HANDLED;
766}
767
92915f71
GR		 768
769/**
fa71ae27 770 * ixgbevf_msix_clean_rings - single unshared vector rx clean (all queues)
92915f71
GR		 771 * @irq: unused
772 * @data: pointer to our q_vector struct for this interrupt vector
773 **/
fa71ae27 774static irqreturn_t ixgbevf_msix_clean_rings(int irq, void *data)
92915f71
GR		 775{
776 struct ixgbevf_q_vector *q_vector = data;
92915f71 777
5f3600eb 778 /* EIAM disabled interrupts (on this vector) for us */
fa71ae27
AD		 779 if (q_vector->rx.ring || q_vector->tx.ring)
780 napi_schedule(&q_vector->napi);
92915f71
GR		 781
782 return IRQ_HANDLED;
783}
784
785static inline void map_vector_to_rxq(struct ixgbevf_adapter *a, int v_idx,
786 int r_idx)
787{
788 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
789
6b43c446
AD		 790 a->rx_ring[r_idx].next = q_vector->rx.ring;
791 q_vector->rx.ring = &a->rx_ring[r_idx];
792 q_vector->rx.count++;
92915f71
GR		 793}
794
795static inline void map_vector_to_txq(struct ixgbevf_adapter *a, int v_idx,
796 int t_idx)
797{
798 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
799
6b43c446
AD		 800 a->tx_ring[t_idx].next = q_vector->tx.ring;
801 q_vector->tx.ring = &a->tx_ring[t_idx];
802 q_vector->tx.count++;
92915f71
GR		 803}
804
805/**
806 * ixgbevf_map_rings_to_vectors - Maps descriptor rings to vectors
807 * @adapter: board private structure to initialize
808 *
809 * This function maps descriptor rings to the queue-specific vectors
810 * we were allotted through the MSI-X enabling code. Ideally, we'd have
811 * one vector per ring/queue, but on a constrained vector budget, we
812 * group the rings as "efficiently" as possible. You would add new
813 * mapping configurations in here.
814 **/
815static int ixgbevf_map_rings_to_vectors(struct ixgbevf_adapter *adapter)
816{
817 int q_vectors;
818 int v_start = 0;
819 int rxr_idx = 0, txr_idx = 0;
820 int rxr_remaining = adapter->num_rx_queues;
821 int txr_remaining = adapter->num_tx_queues;
822 int i, j;
823 int rqpv, tqpv;
824 int err = 0;
825
826 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
827
828 /*
829 * The ideal configuration...
830 * We have enough vectors to map one per queue.
831 */
832 if (q_vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
833 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
834 map_vector_to_rxq(adapter, v_start, rxr_idx);
835
836 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
837 map_vector_to_txq(adapter, v_start, txr_idx);
838 goto out;
839 }
840
841 /*
842 * If we don't have enough vectors for a 1-to-1
843 * mapping, we'll have to group them so there are
844 * multiple queues per vector.
845 */
846 /* Re-adjusting *qpv takes care of the remainder. */
847 for (i = v_start; i < q_vectors; i++) {
848 rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - i);
849 for (j = 0; j < rqpv; j++) {
850 map_vector_to_rxq(adapter, i, rxr_idx);
851 rxr_idx++;
852 rxr_remaining--;
853 }
854 }
855 for (i = v_start; i < q_vectors; i++) {
856 tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - i);
857 for (j = 0; j < tqpv; j++) {
858 map_vector_to_txq(adapter, i, txr_idx);
859 txr_idx++;
860 txr_remaining--;
861 }
862 }
863
864out:
865 return err;
866}
867
868/**
869 * ixgbevf_request_msix_irqs - Initialize MSI-X interrupts
870 * @adapter: board private structure
871 *
872 * ixgbevf_request_msix_irqs allocates MSI-X vectors and requests
873 * interrupts from the kernel.
874 **/
875static int ixgbevf_request_msix_irqs(struct ixgbevf_adapter *adapter)
876{
877 struct net_device *netdev = adapter->netdev;
fa71ae27
AD		 878 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
879 int vector, err;
92915f71
GR		 880 int ri = 0, ti = 0;
881
92915f71 882 for (vector = 0; vector < q_vectors; vector++) {
fa71ae27
AD		 883 struct ixgbevf_q_vector *q_vector = adapter->q_vector[vector];
884 struct msix_entry *entry = &adapter->msix_entries[vector];
885
886 if (q_vector->tx.ring && q_vector->rx.ring) {
887 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
888 "%s-%s-%d", netdev->name, "TxRx", ri++);
889 ti++;
890 } else if (q_vector->rx.ring) {
891 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
892 "%s-%s-%d", netdev->name, "rx", ri++);
893 } else if (q_vector->tx.ring) {
894 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
895 "%s-%s-%d", netdev->name, "tx", ti++);
92915f71
GR		 896 } else {
897 /* skip this unused q_vector */
898 continue;
899 }
fa71ae27
AD		 900 err = request_irq(entry->vector, &ixgbevf_msix_clean_rings, 0,
901 q_vector->name, q_vector);
92915f71
GR		 902 if (err) {
903 hw_dbg(&adapter->hw,
904 "request_irq failed for MSIX interrupt "
905 "Error: %d\n", err);
906 goto free_queue_irqs;
907 }
908 }
909
92915f71 910 err = request_irq(adapter->msix_entries[vector].vector,
4b2cd27f 911 &ixgbevf_msix_other, 0, netdev->name, adapter);
92915f71
GR		 912 if (err) {
913 hw_dbg(&adapter->hw,
4b2cd27f 914 "request_irq for msix_other failed: %d\n", err);
92915f71
GR		 915 goto free_queue_irqs;
916 }
917
918 return 0;
919
920free_queue_irqs:
fa71ae27
AD		 921 while (vector) {
922 vector--;
923 free_irq(adapter->msix_entries[vector].vector,
924 adapter->q_vector[vector]);
925 }
92915f71
GR		 926 pci_disable_msix(adapter->pdev);
927 kfree(adapter->msix_entries);
928 adapter->msix_entries = NULL;
929 return err;
930}
931
932static inline void ixgbevf_reset_q_vectors(struct ixgbevf_adapter *adapter)
933{
934 int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
935
936 for (i = 0; i < q_vectors; i++) {
937 struct ixgbevf_q_vector *q_vector = adapter->q_vector[i];
6b43c446
AD		 938 q_vector->rx.ring = NULL;
939 q_vector->tx.ring = NULL;
940 q_vector->rx.count = 0;
941 q_vector->tx.count = 0;
92915f71
GR		 942 }
943}
944
945/**
946 * ixgbevf_request_irq - initialize interrupts
947 * @adapter: board private structure
948 *
949 * Attempts to configure interrupts using the best available
950 * capabilities of the hardware and kernel.
951 **/
952static int ixgbevf_request_irq(struct ixgbevf_adapter *adapter)
953{
954 int err = 0;
955
956 err = ixgbevf_request_msix_irqs(adapter);
957
958 if (err)
959 hw_dbg(&adapter->hw,
960 "request_irq failed, Error %d\n", err);
961
962 return err;
963}
964
965static void ixgbevf_free_irq(struct ixgbevf_adapter *adapter)
966{
92915f71
GR		 967 int i, q_vectors;
968
969 q_vectors = adapter->num_msix_vectors;
92915f71
GR		 970 i = q_vectors - 1;
971
fa71ae27 972 free_irq(adapter->msix_entries[i].vector, adapter);
92915f71
GR		 973 i--;
974
975 for (; i >= 0; i--) {
fa71ae27
AD		 976 /* free only the irqs that were actually requested */
977 if (!adapter->q_vector[i]->rx.ring &&
978 !adapter->q_vector[i]->tx.ring)
979 continue;
980
92915f71
GR		 981 free_irq(adapter->msix_entries[i].vector,
982 adapter->q_vector[i]);
983 }
984
985 ixgbevf_reset_q_vectors(adapter);
986}
987
988/**
989 * ixgbevf_irq_disable - Mask off interrupt generation on the NIC
990 * @adapter: board private structure
991 **/
992static inline void ixgbevf_irq_disable(struct ixgbevf_adapter *adapter)
993{
92915f71 994 struct ixgbe_hw *hw = &adapter->hw;
5f3600eb 995 int i;
92915f71 996
5f3600eb 997 IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, 0);
92915f71 998 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, ~0);
5f3600eb 999 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, 0);
92915f71
GR		 1000
1001 IXGBE_WRITE_FLUSH(hw);
1002
1003 for (i = 0; i < adapter->num_msix_vectors; i++)
1004 synchronize_irq(adapter->msix_entries[i].vector);
1005}
1006
1007/**
1008 * ixgbevf_irq_enable - Enable default interrupt generation settings
1009 * @adapter: board private structure
1010 **/
5f3600eb 1011static inline void ixgbevf_irq_enable(struct ixgbevf_adapter *adapter)
92915f71
GR		 1012{
1013 struct ixgbe_hw *hw = &adapter->hw;
92915f71 1014
5f3600eb
AD		 1015 IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, adapter->eims_enable_mask);
1016 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, adapter->eims_enable_mask);
1017 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_enable_mask);
92915f71
GR		 1018}
1019
1020/**
1021 * ixgbevf_configure_tx - Configure 82599 VF Transmit Unit after Reset
1022 * @adapter: board private structure
1023 *
1024 * Configure the Tx unit of the MAC after a reset.
1025 **/
1026static void ixgbevf_configure_tx(struct ixgbevf_adapter *adapter)
1027{
1028 u64 tdba;
1029 struct ixgbe_hw *hw = &adapter->hw;
1030 u32 i, j, tdlen, txctrl;
1031
1032 /* Setup the HW Tx Head and Tail descriptor pointers */
1033 for (i = 0; i < adapter->num_tx_queues; i++) {
1034 struct ixgbevf_ring *ring = &adapter->tx_ring[i];
1035 j = ring->reg_idx;
1036 tdba = ring->dma;
1037 tdlen = ring->count * sizeof(union ixgbe_adv_tx_desc);
1038 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(j),
1039 (tdba & DMA_BIT_MASK(32)));
1040 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAH(j), (tdba >> 32));
1041 IXGBE_WRITE_REG(hw, IXGBE_VFTDLEN(j), tdlen);
1042 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(j), 0);
1043 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(j), 0);
1044 adapter->tx_ring[i].head = IXGBE_VFTDH(j);
1045 adapter->tx_ring[i].tail = IXGBE_VFTDT(j);
1046 /* Disable Tx Head Writeback RO bit, since this hoses
1047 * bookkeeping if things aren't delivered in order.
1048 */
1049 txctrl = IXGBE_READ_REG(hw, IXGBE_VFDCA_TXCTRL(j));
1050 txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN;
1051 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(j), txctrl);
1052 }
1053}
1054
1055#define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1056
1057static void ixgbevf_configure_srrctl(struct ixgbevf_adapter *adapter, int index)
1058{
1059 struct ixgbevf_ring *rx_ring;
1060 struct ixgbe_hw *hw = &adapter->hw;
1061 u32 srrctl;
1062
1063 rx_ring = &adapter->rx_ring[index];
1064
1065 srrctl = IXGBE_SRRCTL_DROP_EN;
1066
77d5dfca 1067 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
92915f71 1068
dd1fe113
AD		 1069 srrctl |= ALIGN(rx_ring->rx_buf_len, 1024) >>
1070 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1071
92915f71
GR		 1072 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(index), srrctl);
1073}
1074
dd1fe113
AD		 1075static void ixgbevf_set_rx_buffer_len(struct ixgbevf_adapter *adapter)
1076{
1077 struct ixgbe_hw *hw = &adapter->hw;
1078 struct net_device *netdev = adapter->netdev;
1079 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1080 int i;
1081 u16 rx_buf_len;
1082
1083 /* notify the PF of our intent to use this size of frame */
1084 ixgbevf_rlpml_set_vf(hw, max_frame);
1085
1086 /* PF will allow an extra 4 bytes past for vlan tagged frames */
1087 max_frame += VLAN_HLEN;
1088
1089 /*
85624caf
GR		 1090 * Allocate buffer sizes that fit well into 32K and
1091 * take into account max frame size of 9.5K
dd1fe113
AD		 1092 */
1093 if ((hw->mac.type == ixgbe_mac_X540_vf) &&
1094 (max_frame <= MAXIMUM_ETHERNET_VLAN_SIZE))
1095 rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
85624caf
GR		 1096 else if (max_frame <= IXGBEVF_RXBUFFER_2K)
1097 rx_buf_len = IXGBEVF_RXBUFFER_2K;
1098 else if (max_frame <= IXGBEVF_RXBUFFER_4K)
1099 rx_buf_len = IXGBEVF_RXBUFFER_4K;
1100 else if (max_frame <= IXGBEVF_RXBUFFER_8K)
1101 rx_buf_len = IXGBEVF_RXBUFFER_8K;
dd1fe113 1102 else
85624caf 1103 rx_buf_len = IXGBEVF_RXBUFFER_10K;
dd1fe113
AD		 1104
1105 for (i = 0; i < adapter->num_rx_queues; i++)
1106 adapter->rx_ring[i].rx_buf_len = rx_buf_len;
1107}
1108
92915f71
GR		 1109/**
1110 * ixgbevf_configure_rx - Configure 82599 VF Receive Unit after Reset
1111 * @adapter: board private structure
1112 *
1113 * Configure the Rx unit of the MAC after a reset.
1114 **/
1115static void ixgbevf_configure_rx(struct ixgbevf_adapter *adapter)
1116{
1117 u64 rdba;
1118 struct ixgbe_hw *hw = &adapter->hw;
92915f71
GR		 1119 int i, j;
1120 u32 rdlen;
92915f71 1121
77d5dfca
AD		 1122 /* PSRTYPE must be initialized in 82599 */
1123 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0);
dd1fe113
AD		 1124
1125 /* set_rx_buffer_len must be called before ring initialization */
1126 ixgbevf_set_rx_buffer_len(adapter);
92915f71
GR		 1127
1128 rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
1129 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1130 * the Base and Length of the Rx Descriptor Ring */
1131 for (i = 0; i < adapter->num_rx_queues; i++) {
1132 rdba = adapter->rx_ring[i].dma;
1133 j = adapter->rx_ring[i].reg_idx;
1134 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAL(j),
1135 (rdba & DMA_BIT_MASK(32)));
1136 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAH(j), (rdba >> 32));
1137 IXGBE_WRITE_REG(hw, IXGBE_VFRDLEN(j), rdlen);
1138 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(j), 0);
1139 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(j), 0);
1140 adapter->rx_ring[i].head = IXGBE_VFRDH(j);
1141 adapter->rx_ring[i].tail = IXGBE_VFRDT(j);
92915f71
GR		 1142
1143 ixgbevf_configure_srrctl(adapter, j);
1144 }
1145}
1146
8e586137 1147static int ixgbevf_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
92915f71
GR		 1148{
1149 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1150 struct ixgbe_hw *hw = &adapter->hw;
2ddc7fe1
AD		 1151 int err;
1152
55fdd45b 1153 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 1154
92915f71 1155 /* add VID to filter table */
2ddc7fe1 1156 err = hw->mac.ops.set_vfta(hw, vid, 0, true);
1c55ed76 1157
55fdd45b 1158 spin_unlock_bh(&adapter->mbx_lock);
1c55ed76 1159
2ddc7fe1
AD		 1160 /* translate error return types so error makes sense */
1161 if (err == IXGBE_ERR_MBX)
1162 return -EIO;
1163
1164 if (err == IXGBE_ERR_INVALID_ARGUMENT)
1165 return -EACCES;
1166
dadcd65f 1167 set_bit(vid, adapter->active_vlans);
8e586137 1168
2ddc7fe1 1169 return err;
92915f71
GR		 1170}
1171
8e586137 1172static int ixgbevf_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
92915f71
GR		 1173{
1174 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1175 struct ixgbe_hw *hw = &adapter->hw;
2ddc7fe1 1176 int err = -EOPNOTSUPP;
92915f71 1177
55fdd45b 1178 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 1179
92915f71 1180 /* remove VID from filter table */
92fe0bf7 1181 err = hw->mac.ops.set_vfta(hw, vid, 0, false);
1c55ed76 1182
55fdd45b 1183 spin_unlock_bh(&adapter->mbx_lock);
1c55ed76 1184
dadcd65f 1185 clear_bit(vid, adapter->active_vlans);
8e586137 1186
2ddc7fe1 1187 return err;
92915f71
GR		 1188}
1189
1190static void ixgbevf_restore_vlan(struct ixgbevf_adapter *adapter)
1191{
dadcd65f 1192 u16 vid;
92915f71 1193
dadcd65f
JP		 1194 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
1195 ixgbevf_vlan_rx_add_vid(adapter->netdev, vid);
92915f71
GR		 1196}
1197
46ec20ff
GR		 1198static int ixgbevf_write_uc_addr_list(struct net_device *netdev)
1199{
1200 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1201 struct ixgbe_hw *hw = &adapter->hw;
1202 int count = 0;
1203
1204 if ((netdev_uc_count(netdev)) > 10) {
dbd9636e 1205 pr_err("Too many unicast filters - No Space\n");
46ec20ff
GR		 1206 return -ENOSPC;
1207 }
1208
1209 if (!netdev_uc_empty(netdev)) {
1210 struct netdev_hw_addr *ha;
1211 netdev_for_each_uc_addr(ha, netdev) {
1212 hw->mac.ops.set_uc_addr(hw, ++count, ha->addr);
1213 udelay(200);
1214 }
1215 } else {
1216 /*
1217 * If the list is empty then send message to PF driver to
1218 * clear all macvlans on this VF.
1219 */
1220 hw->mac.ops.set_uc_addr(hw, 0, NULL);
1221 }
1222
1223 return count;
1224}
1225
92915f71
GR		 1226/**
1227 * ixgbevf_set_rx_mode - Multicast set
1228 * @netdev: network interface device structure
1229 *
1230 * The set_rx_method entry point is called whenever the multicast address
1231 * list or the network interface flags are updated. This routine is
1232 * responsible for configuring the hardware for proper multicast mode.
1233 **/
1234static void ixgbevf_set_rx_mode(struct net_device *netdev)
1235{
1236 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1237 struct ixgbe_hw *hw = &adapter->hw;
92915f71 1238
55fdd45b 1239 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 1240
92915f71 1241 /* reprogram multicast list */
92fe0bf7 1242 hw->mac.ops.update_mc_addr_list(hw, netdev);
46ec20ff
GR		 1243
1244 ixgbevf_write_uc_addr_list(netdev);
1c55ed76 1245
55fdd45b 1246 spin_unlock_bh(&adapter->mbx_lock);
92915f71
GR		 1247}
1248
1249static void ixgbevf_napi_enable_all(struct ixgbevf_adapter *adapter)
1250{
1251 int q_idx;
1252 struct ixgbevf_q_vector *q_vector;
1253 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1254
1255 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
92915f71 1256 q_vector = adapter->q_vector[q_idx];
fa71ae27 1257 napi_enable(&q_vector->napi);
92915f71
GR		 1258 }
1259}
1260
1261static void ixgbevf_napi_disable_all(struct ixgbevf_adapter *adapter)
1262{
1263 int q_idx;
1264 struct ixgbevf_q_vector *q_vector;
1265 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1266
1267 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1268 q_vector = adapter->q_vector[q_idx];
92915f71
GR		 1269 napi_disable(&q_vector->napi);
1270 }
1271}
1272
1273static void ixgbevf_configure(struct ixgbevf_adapter *adapter)
1274{
1275 struct net_device *netdev = adapter->netdev;
1276 int i;
1277
1278 ixgbevf_set_rx_mode(netdev);
1279
1280 ixgbevf_restore_vlan(adapter);
1281
1282 ixgbevf_configure_tx(adapter);
1283 ixgbevf_configure_rx(adapter);
1284 for (i = 0; i < adapter->num_rx_queues; i++) {
1285 struct ixgbevf_ring *ring = &adapter->rx_ring[i];
18c63089
AD		 1286 ixgbevf_alloc_rx_buffers(adapter, ring,
1287 IXGBE_DESC_UNUSED(ring));
92915f71
GR		 1288 }
1289}
1290
1291#define IXGBE_MAX_RX_DESC_POLL 10
1292static inline void ixgbevf_rx_desc_queue_enable(struct ixgbevf_adapter *adapter,
1293 int rxr)
1294{
1295 struct ixgbe_hw *hw = &adapter->hw;
1296 int j = adapter->rx_ring[rxr].reg_idx;
1297 int k;
1298
1299 for (k = 0; k < IXGBE_MAX_RX_DESC_POLL; k++) {
1300 if (IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j)) & IXGBE_RXDCTL_ENABLE)
1301 break;
1302 else
1303 msleep(1);
1304 }
1305 if (k >= IXGBE_MAX_RX_DESC_POLL) {
1306 hw_dbg(hw, "RXDCTL.ENABLE on Rx queue %d "
1307 "not set within the polling period\n", rxr);
1308 }
1309
6259a01f
GR		 1310 ixgbevf_release_rx_desc(hw, &adapter->rx_ring[rxr],
1311 adapter->rx_ring[rxr].count - 1);
92915f71
GR		 1312}
1313
33bd9f60
GR		 1314static void ixgbevf_save_reset_stats(struct ixgbevf_adapter *adapter)
1315{
1316 /* Only save pre-reset stats if there are some */
1317 if (adapter->stats.vfgprc || adapter->stats.vfgptc) {
1318 adapter->stats.saved_reset_vfgprc += adapter->stats.vfgprc -
1319 adapter->stats.base_vfgprc;
1320 adapter->stats.saved_reset_vfgptc += adapter->stats.vfgptc -
1321 adapter->stats.base_vfgptc;
1322 adapter->stats.saved_reset_vfgorc += adapter->stats.vfgorc -
1323 adapter->stats.base_vfgorc;
1324 adapter->stats.saved_reset_vfgotc += adapter->stats.vfgotc -
1325 adapter->stats.base_vfgotc;
1326 adapter->stats.saved_reset_vfmprc += adapter->stats.vfmprc -
1327 adapter->stats.base_vfmprc;
1328 }
1329}
1330
1331static void ixgbevf_init_last_counter_stats(struct ixgbevf_adapter *adapter)
1332{
1333 struct ixgbe_hw *hw = &adapter->hw;
1334
1335 adapter->stats.last_vfgprc = IXGBE_READ_REG(hw, IXGBE_VFGPRC);
1336 adapter->stats.last_vfgorc = IXGBE_READ_REG(hw, IXGBE_VFGORC_LSB);
1337 adapter->stats.last_vfgorc |=
1338 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGORC_MSB))) << 32);
1339 adapter->stats.last_vfgptc = IXGBE_READ_REG(hw, IXGBE_VFGPTC);
1340 adapter->stats.last_vfgotc = IXGBE_READ_REG(hw, IXGBE_VFGOTC_LSB);
1341 adapter->stats.last_vfgotc |=
1342 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGOTC_MSB))) << 32);
1343 adapter->stats.last_vfmprc = IXGBE_READ_REG(hw, IXGBE_VFMPRC);
1344
1345 adapter->stats.base_vfgprc = adapter->stats.last_vfgprc;
1346 adapter->stats.base_vfgorc = adapter->stats.last_vfgorc;
1347 adapter->stats.base_vfgptc = adapter->stats.last_vfgptc;
1348 adapter->stats.base_vfgotc = adapter->stats.last_vfgotc;
1349 adapter->stats.base_vfmprc = adapter->stats.last_vfmprc;
1350}
1351
31186785
AD		 1352static void ixgbevf_negotiate_api(struct ixgbevf_adapter *adapter)
1353{
1354 struct ixgbe_hw *hw = &adapter->hw;
56e94095
AD		 1355 int api[] = { ixgbe_mbox_api_11,
1356 ixgbe_mbox_api_10,
31186785
AD		 1357 ixgbe_mbox_api_unknown };
1358 int err = 0, idx = 0;
1359
55fdd45b 1360 spin_lock_bh(&adapter->mbx_lock);
31186785
AD		 1361
1362 while (api[idx] != ixgbe_mbox_api_unknown) {
1363 err = ixgbevf_negotiate_api_version(hw, api[idx]);
1364 if (!err)
1365 break;
1366 idx++;
1367 }
1368
55fdd45b 1369 spin_unlock_bh(&adapter->mbx_lock);
31186785
AD		 1370}
1371
795180d8 1372static void ixgbevf_up_complete(struct ixgbevf_adapter *adapter)
92915f71
GR		 1373{
1374 struct net_device *netdev = adapter->netdev;
1375 struct ixgbe_hw *hw = &adapter->hw;
1376 int i, j = 0;
1377 int num_rx_rings = adapter->num_rx_queues;
1378 u32 txdctl, rxdctl;
1379
1380 for (i = 0; i < adapter->num_tx_queues; i++) {
1381 j = adapter->tx_ring[i].reg_idx;
1382 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1383 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
1384 txdctl |= (8 << 16);
1385 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl);
1386 }
1387
1388 for (i = 0; i < adapter->num_tx_queues; i++) {
1389 j = adapter->tx_ring[i].reg_idx;
1390 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1391 txdctl |= IXGBE_TXDCTL_ENABLE;
1392 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl);
1393 }
1394
1395 for (i = 0; i < num_rx_rings; i++) {
1396 j = adapter->rx_ring[i].reg_idx;
1397 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j));
dadcd65f 1398 rxdctl |= IXGBE_RXDCTL_ENABLE | IXGBE_RXDCTL_VME;
69bfbec4
GR		 1399 if (hw->mac.type == ixgbe_mac_X540_vf) {
1400 rxdctl &= ~IXGBE_RXDCTL_RLPMLMASK;
1401 rxdctl |= ((netdev->mtu + ETH_HLEN + ETH_FCS_LEN) |
1402 IXGBE_RXDCTL_RLPML_EN);
1403 }
92915f71
GR		 1404 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(j), rxdctl);
1405 ixgbevf_rx_desc_queue_enable(adapter, i);
1406 }
1407
1408 ixgbevf_configure_msix(adapter);
1409
55fdd45b 1410 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 1411
92fe0bf7
GR		 1412 if (is_valid_ether_addr(hw->mac.addr))
1413 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
1414 else
1415 hw->mac.ops.set_rar(hw, 0, hw->mac.perm_addr, 0);
92915f71 1416
55fdd45b 1417 spin_unlock_bh(&adapter->mbx_lock);
1c55ed76 1418
92915f71
GR		 1419 clear_bit(__IXGBEVF_DOWN, &adapter->state);
1420 ixgbevf_napi_enable_all(adapter);
1421
1422 /* enable transmits */
1423 netif_tx_start_all_queues(netdev);
1424
33bd9f60
GR		 1425 ixgbevf_save_reset_stats(adapter);
1426 ixgbevf_init_last_counter_stats(adapter);
1427
4b2cd27f 1428 hw->mac.get_link_status = 1;
92915f71 1429 mod_timer(&adapter->watchdog_timer, jiffies);
92915f71
GR		 1430}
1431
56e94095
AD		 1432static int ixgbevf_reset_queues(struct ixgbevf_adapter *adapter)
1433{
1434 struct ixgbe_hw *hw = &adapter->hw;
1435 struct ixgbevf_ring *rx_ring;
1436 unsigned int def_q = 0;
1437 unsigned int num_tcs = 0;
1438 unsigned int num_rx_queues = 1;
1439 int err, i;
1440
55fdd45b 1441 spin_lock_bh(&adapter->mbx_lock);
56e94095
AD		 1442
1443 /* fetch queue configuration from the PF */
1444 err = ixgbevf_get_queues(hw, &num_tcs, &def_q);
1445
55fdd45b 1446 spin_unlock_bh(&adapter->mbx_lock);
56e94095
AD		 1447
1448 if (err)
1449 return err;
1450
1451 if (num_tcs > 1) {
1452 /* update default Tx ring register index */
1453 adapter->tx_ring[0].reg_idx = def_q;
1454
1455 /* we need as many queues as traffic classes */
1456 num_rx_queues = num_tcs;
1457 }
1458
1459 /* nothing to do if we have the correct number of queues */
1460 if (adapter->num_rx_queues == num_rx_queues)
1461 return 0;
1462
1463 /* allocate new rings */
1464 rx_ring = kcalloc(num_rx_queues,
1465 sizeof(struct ixgbevf_ring), GFP_KERNEL);
1466 if (!rx_ring)
1467 return -ENOMEM;
1468
1469 /* setup ring fields */
1470 for (i = 0; i < num_rx_queues; i++) {
1471 rx_ring[i].count = adapter->rx_ring_count;
1472 rx_ring[i].queue_index = i;
1473 rx_ring[i].reg_idx = i;
1474 rx_ring[i].dev = &adapter->pdev->dev;
1475 rx_ring[i].netdev = adapter->netdev;
1476
1477 /* allocate resources on the ring */
1478 err = ixgbevf_setup_rx_resources(adapter, &rx_ring[i]);
1479 if (err) {
1480 while (i) {
1481 i--;
1482 ixgbevf_free_rx_resources(adapter, &rx_ring[i]);
1483 }
1484 kfree(rx_ring);
1485 return err;
1486 }
1487 }
1488
1489 /* free the existing rings and queues */
1490 ixgbevf_free_all_rx_resources(adapter);
1491 adapter->num_rx_queues = 0;
1492 kfree(adapter->rx_ring);
1493
1494 /* move new rings into position on the adapter struct */
1495 adapter->rx_ring = rx_ring;
1496 adapter->num_rx_queues = num_rx_queues;
1497
1498 /* reset ring to vector mapping */
1499 ixgbevf_reset_q_vectors(adapter);
1500 ixgbevf_map_rings_to_vectors(adapter);
1501
1502 return 0;
1503}
1504
795180d8 1505void ixgbevf_up(struct ixgbevf_adapter *adapter)
92915f71 1506{
92915f71
GR		 1507 struct ixgbe_hw *hw = &adapter->hw;
1508
31186785
AD		 1509 ixgbevf_negotiate_api(adapter);
1510
56e94095
AD		 1511 ixgbevf_reset_queues(adapter);
1512
92915f71
GR		 1513 ixgbevf_configure(adapter);
1514
795180d8 1515 ixgbevf_up_complete(adapter);
92915f71
GR		 1516
1517 /* clear any pending interrupts, may auto mask */
1518 IXGBE_READ_REG(hw, IXGBE_VTEICR);
1519
5f3600eb 1520 ixgbevf_irq_enable(adapter);
92915f71
GR		 1521}
1522
1523/**
1524 * ixgbevf_clean_rx_ring - Free Rx Buffers per Queue
1525 * @adapter: board private structure
1526 * @rx_ring: ring to free buffers from
1527 **/
1528static void ixgbevf_clean_rx_ring(struct ixgbevf_adapter *adapter,
1529 struct ixgbevf_ring *rx_ring)
1530{
1531 struct pci_dev *pdev = adapter->pdev;
1532 unsigned long size;
1533 unsigned int i;
1534
c0456c23
GR		 1535 if (!rx_ring->rx_buffer_info)
1536 return;
92915f71 1537
c0456c23 1538 /* Free all the Rx ring sk_buffs */
92915f71
GR		 1539 for (i = 0; i < rx_ring->count; i++) {
1540 struct ixgbevf_rx_buffer *rx_buffer_info;
1541
1542 rx_buffer_info = &rx_ring->rx_buffer_info[i];
1543 if (rx_buffer_info->dma) {
2a1f8794 1544 dma_unmap_single(&pdev->dev, rx_buffer_info->dma,
92915f71 1545 rx_ring->rx_buf_len,
2a1f8794 1546 DMA_FROM_DEVICE);
92915f71
GR		 1547 rx_buffer_info->dma = 0;
1548 }
1549 if (rx_buffer_info->skb) {
1550 struct sk_buff *skb = rx_buffer_info->skb;
1551 rx_buffer_info->skb = NULL;
1552 do {
1553 struct sk_buff *this = skb;
5c60f81a 1554 skb = IXGBE_CB(skb)->prev;
92915f71
GR		 1555 dev_kfree_skb(this);
1556 } while (skb);
1557 }
92915f71
GR		 1558 }
1559
1560 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
1561 memset(rx_ring->rx_buffer_info, 0, size);
1562
1563 /* Zero out the descriptor ring */
1564 memset(rx_ring->desc, 0, rx_ring->size);
1565
1566 rx_ring->next_to_clean = 0;
1567 rx_ring->next_to_use = 0;
1568
1569 if (rx_ring->head)
1570 writel(0, adapter->hw.hw_addr + rx_ring->head);
1571 if (rx_ring->tail)
1572 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1573}
1574
1575/**
1576 * ixgbevf_clean_tx_ring - Free Tx Buffers
1577 * @adapter: board private structure
1578 * @tx_ring: ring to be cleaned
1579 **/
1580static void ixgbevf_clean_tx_ring(struct ixgbevf_adapter *adapter,
1581 struct ixgbevf_ring *tx_ring)
1582{
1583 struct ixgbevf_tx_buffer *tx_buffer_info;
1584 unsigned long size;
1585 unsigned int i;
1586
c0456c23
GR		 1587 if (!tx_ring->tx_buffer_info)
1588 return;
1589
92915f71
GR		 1590 /* Free all the Tx ring sk_buffs */
1591
1592 for (i = 0; i < tx_ring->count; i++) {
1593 tx_buffer_info = &tx_ring->tx_buffer_info[i];
70a10e25 1594 ixgbevf_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
92915f71
GR		 1595 }
1596
1597 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
1598 memset(tx_ring->tx_buffer_info, 0, size);
1599
1600 memset(tx_ring->desc, 0, tx_ring->size);
1601
1602 tx_ring->next_to_use = 0;
1603 tx_ring->next_to_clean = 0;
1604
1605 if (tx_ring->head)
1606 writel(0, adapter->hw.hw_addr + tx_ring->head);
1607 if (tx_ring->tail)
1608 writel(0, adapter->hw.hw_addr + tx_ring->tail);
1609}
1610
1611/**
1612 * ixgbevf_clean_all_rx_rings - Free Rx Buffers for all queues
1613 * @adapter: board private structure
1614 **/
1615static void ixgbevf_clean_all_rx_rings(struct ixgbevf_adapter *adapter)
1616{
1617 int i;
1618
1619 for (i = 0; i < adapter->num_rx_queues; i++)
1620 ixgbevf_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1621}
1622
1623/**
1624 * ixgbevf_clean_all_tx_rings - Free Tx Buffers for all queues
1625 * @adapter: board private structure
1626 **/
1627static void ixgbevf_clean_all_tx_rings(struct ixgbevf_adapter *adapter)
1628{
1629 int i;
1630
1631 for (i = 0; i < adapter->num_tx_queues; i++)
1632 ixgbevf_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1633}
1634
1635void ixgbevf_down(struct ixgbevf_adapter *adapter)
1636{
1637 struct net_device *netdev = adapter->netdev;
1638 struct ixgbe_hw *hw = &adapter->hw;
1639 u32 txdctl;
1640 int i, j;
1641
1642 /* signal that we are down to the interrupt handler */
1643 set_bit(__IXGBEVF_DOWN, &adapter->state);
1644 /* disable receives */
1645
1646 netif_tx_disable(netdev);
1647
1648 msleep(10);
1649
1650 netif_tx_stop_all_queues(netdev);
1651
1652 ixgbevf_irq_disable(adapter);
1653
1654 ixgbevf_napi_disable_all(adapter);
1655
1656 del_timer_sync(&adapter->watchdog_timer);
1657 /* can't call flush scheduled work here because it can deadlock
1658 * if linkwatch_event tries to acquire the rtnl_lock which we are
1659 * holding */
1660 while (adapter->flags & IXGBE_FLAG_IN_WATCHDOG_TASK)
1661 msleep(1);
1662
1663 /* disable transmits in the hardware now that interrupts are off */
1664 for (i = 0; i < adapter->num_tx_queues; i++) {
1665 j = adapter->tx_ring[i].reg_idx;
1666 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1667 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j),
1668 (txdctl & ~IXGBE_TXDCTL_ENABLE));
1669 }
1670
1671 netif_carrier_off(netdev);
1672
1673 if (!pci_channel_offline(adapter->pdev))
1674 ixgbevf_reset(adapter);
1675
1676 ixgbevf_clean_all_tx_rings(adapter);
1677 ixgbevf_clean_all_rx_rings(adapter);
1678}
1679
1680void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter)
1681{
1682 WARN_ON(in_interrupt());
c0456c23 1683
92915f71
GR		 1684 while (test_and_set_bit(__IXGBEVF_RESETTING, &adapter->state))
1685 msleep(1);
1686
c0456c23
GR		 1687 /*
1688 * Check if PF is up before re-init. If not then skip until
1689 * later when the PF is up and ready to service requests from
1690 * the VF via mailbox. If the VF is up and running then the
1691 * watchdog task will continue to schedule reset tasks until
1692 * the PF is up and running.
1693 */
4b2cd27f
AD		 1694 ixgbevf_down(adapter);
1695 ixgbevf_up(adapter);
92915f71
GR		 1696
1697 clear_bit(__IXGBEVF_RESETTING, &adapter->state);
1698}
1699
1700void ixgbevf_reset(struct ixgbevf_adapter *adapter)
1701{
1702 struct ixgbe_hw *hw = &adapter->hw;
1703 struct net_device *netdev = adapter->netdev;
1704
1705 if (hw->mac.ops.reset_hw(hw))
1706 hw_dbg(hw, "PF still resetting\n");
1707 else
1708 hw->mac.ops.init_hw(hw);
1709
1710 if (is_valid_ether_addr(adapter->hw.mac.addr)) {
1711 memcpy(netdev->dev_addr, adapter->hw.mac.addr,
1712 netdev->addr_len);
1713 memcpy(netdev->perm_addr, adapter->hw.mac.addr,
1714 netdev->addr_len);
1715 }
1716}
1717
e45dd5fe
JK		 1718static int ixgbevf_acquire_msix_vectors(struct ixgbevf_adapter *adapter,
1719 int vectors)
92915f71 1720{
a5f9337b
ET		 1721 int err = 0;
1722 int vector_threshold;
92915f71 1723
fa71ae27
AD		 1724 /* We'll want at least 2 (vector_threshold):
1725 * 1) TxQ[0] + RxQ[0] handler
1726 * 2) Other (Link Status Change, etc.)
92915f71
GR		 1727 */
1728 vector_threshold = MIN_MSIX_COUNT;
1729
1730 /* The more we get, the more we will assign to Tx/Rx Cleanup
1731 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
1732 * Right now, we simply care about how many we'll get; we'll
1733 * set them up later while requesting irq's.
1734 */
1735 while (vectors >= vector_threshold) {
1736 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
1737 vectors);
e45dd5fe 1738 if (!err || err < 0) /* Success or a nasty failure. */
92915f71 1739 break;
92915f71
GR		 1740 else /* err == number of vectors we should try again with */
1741 vectors = err;
1742 }
1743
e45dd5fe
JK		 1744 if (vectors < vector_threshold)
1745 err = -ENOMEM;
1746
1747 if (err) {
1748 dev_err(&adapter->pdev->dev,
1749 "Unable to allocate MSI-X interrupts\n");
92915f71
GR		 1750 kfree(adapter->msix_entries);
1751 adapter->msix_entries = NULL;
1752 } else {
1753 /*
1754 * Adjust for only the vectors we'll use, which is minimum
1755 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
1756 * vectors we were allocated.
1757 */
1758 adapter->num_msix_vectors = vectors;
1759 }
e45dd5fe 1760 return err;
92915f71
GR		 1761}
1762
49ce9c2c
BH		 1763/**
1764 * ixgbevf_set_num_queues - Allocate queues for device, feature dependent
92915f71
GR		 1765 * @adapter: board private structure to initialize
1766 *
1767 * This is the top level queue allocation routine. The order here is very
1768 * important, starting with the "most" number of features turned on at once,
1769 * and ending with the smallest set of features. This way large combinations
1770 * can be allocated if they're turned on, and smaller combinations are the
1771 * fallthrough conditions.
1772 *
1773 **/
1774static void ixgbevf_set_num_queues(struct ixgbevf_adapter *adapter)
1775{
1776 /* Start with base case */
1777 adapter->num_rx_queues = 1;
1778 adapter->num_tx_queues = 1;
92915f71
GR		 1779}
1780
1781/**
1782 * ixgbevf_alloc_queues - Allocate memory for all rings
1783 * @adapter: board private structure to initialize
1784 *
1785 * We allocate one ring per queue at run-time since we don't know the
1786 * number of queues at compile-time. The polling_netdev array is
1787 * intended for Multiqueue, but should work fine with a single queue.
1788 **/
1789static int ixgbevf_alloc_queues(struct ixgbevf_adapter *adapter)
1790{
1791 int i;
1792
1793 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1794 sizeof(struct ixgbevf_ring), GFP_KERNEL);
1795 if (!adapter->tx_ring)
1796 goto err_tx_ring_allocation;
1797
1798 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1799 sizeof(struct ixgbevf_ring), GFP_KERNEL);
1800 if (!adapter->rx_ring)
1801 goto err_rx_ring_allocation;
1802
1803 for (i = 0; i < adapter->num_tx_queues; i++) {
1804 adapter->tx_ring[i].count = adapter->tx_ring_count;
1805 adapter->tx_ring[i].queue_index = i;
56e94095 1806 /* reg_idx may be remapped later by DCB config */
92915f71 1807 adapter->tx_ring[i].reg_idx = i;
fb40195c
AD		 1808 adapter->tx_ring[i].dev = &adapter->pdev->dev;
1809 adapter->tx_ring[i].netdev = adapter->netdev;
92915f71
GR		 1810 }
1811
1812 for (i = 0; i < adapter->num_rx_queues; i++) {
1813 adapter->rx_ring[i].count = adapter->rx_ring_count;
1814 adapter->rx_ring[i].queue_index = i;
1815 adapter->rx_ring[i].reg_idx = i;
fb40195c
AD		 1816 adapter->rx_ring[i].dev = &adapter->pdev->dev;
1817 adapter->rx_ring[i].netdev = adapter->netdev;
92915f71
GR		 1818 }
1819
1820 return 0;
1821
1822err_rx_ring_allocation:
1823 kfree(adapter->tx_ring);
1824err_tx_ring_allocation:
1825 return -ENOMEM;
1826}
1827
1828/**
1829 * ixgbevf_set_interrupt_capability - set MSI-X or FAIL if not supported
1830 * @adapter: board private structure to initialize
1831 *
1832 * Attempt to configure the interrupts using the best available
1833 * capabilities of the hardware and the kernel.
1834 **/
1835static int ixgbevf_set_interrupt_capability(struct ixgbevf_adapter *adapter)
1836{
91e2b89b 1837 struct net_device *netdev = adapter->netdev;
92915f71
GR		 1838 int err = 0;
1839 int vector, v_budget;
1840
1841 /*
1842 * It's easy to be greedy for MSI-X vectors, but it really
1843 * doesn't do us much good if we have a lot more vectors
1844 * than CPU's. So let's be conservative and only ask for
fa71ae27
AD		 1845 * (roughly) the same number of vectors as there are CPU's.
1846 * The default is to use pairs of vectors.
92915f71 1847 */
fa71ae27
AD		 1848 v_budget = max(adapter->num_rx_queues, adapter->num_tx_queues);
1849 v_budget = min_t(int, v_budget, num_online_cpus());
1850 v_budget += NON_Q_VECTORS;
92915f71
GR		 1851
1852 /* A failure in MSI-X entry allocation isn't fatal, but it does
1853 * mean we disable MSI-X capabilities of the adapter. */
1854 adapter->msix_entries = kcalloc(v_budget,
1855 sizeof(struct msix_entry), GFP_KERNEL);
1856 if (!adapter->msix_entries) {
1857 err = -ENOMEM;
1858 goto out;
1859 }
1860
1861 for (vector = 0; vector < v_budget; vector++)
1862 adapter->msix_entries[vector].entry = vector;
1863
e45dd5fe
JK		 1864 err = ixgbevf_acquire_msix_vectors(adapter, v_budget);
1865 if (err)
1866 goto out;
92915f71 1867
91e2b89b
GR		 1868 err = netif_set_real_num_tx_queues(netdev, adapter->num_tx_queues);
1869 if (err)
1870 goto out;
1871
1872 err = netif_set_real_num_rx_queues(netdev, adapter->num_rx_queues);
1873
92915f71
GR		 1874out:
1875 return err;
1876}
1877
1878/**
1879 * ixgbevf_alloc_q_vectors - Allocate memory for interrupt vectors
1880 * @adapter: board private structure to initialize
1881 *
1882 * We allocate one q_vector per queue interrupt. If allocation fails we
1883 * return -ENOMEM.
1884 **/
1885static int ixgbevf_alloc_q_vectors(struct ixgbevf_adapter *adapter)
1886{
1887 int q_idx, num_q_vectors;
1888 struct ixgbevf_q_vector *q_vector;
92915f71
GR		 1889
1890 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
92915f71
GR		 1891
1892 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
1893 q_vector = kzalloc(sizeof(struct ixgbevf_q_vector), GFP_KERNEL);
1894 if (!q_vector)
1895 goto err_out;
1896 q_vector->adapter = adapter;
1897 q_vector->v_idx = q_idx;
fa71ae27
AD		 1898 netif_napi_add(adapter->netdev, &q_vector->napi,
1899 ixgbevf_poll, 64);
92915f71
GR		 1900 adapter->q_vector[q_idx] = q_vector;
1901 }
1902
1903 return 0;
1904
1905err_out:
1906 while (q_idx) {
1907 q_idx--;
1908 q_vector = adapter->q_vector[q_idx];
1909 netif_napi_del(&q_vector->napi);
1910 kfree(q_vector);
1911 adapter->q_vector[q_idx] = NULL;
1912 }
1913 return -ENOMEM;
1914}
1915
1916/**
1917 * ixgbevf_free_q_vectors - Free memory allocated for interrupt vectors
1918 * @adapter: board private structure to initialize
1919 *
1920 * This function frees the memory allocated to the q_vectors. In addition if
1921 * NAPI is enabled it will delete any references to the NAPI struct prior
1922 * to freeing the q_vector.
1923 **/
1924static void ixgbevf_free_q_vectors(struct ixgbevf_adapter *adapter)
1925{
f4477702 1926 int q_idx, num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
92915f71
GR		 1927
1928 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
1929 struct ixgbevf_q_vector *q_vector = adapter->q_vector[q_idx];
1930
1931 adapter->q_vector[q_idx] = NULL;
f4477702 1932 netif_napi_del(&q_vector->napi);
92915f71
GR		 1933 kfree(q_vector);
1934 }
1935}
1936
1937/**
1938 * ixgbevf_reset_interrupt_capability - Reset MSIX setup
1939 * @adapter: board private structure
1940 *
1941 **/
1942static void ixgbevf_reset_interrupt_capability(struct ixgbevf_adapter *adapter)
1943{
1944 pci_disable_msix(adapter->pdev);
1945 kfree(adapter->msix_entries);
1946 adapter->msix_entries = NULL;
92915f71
GR		 1947}
1948
1949/**
1950 * ixgbevf_init_interrupt_scheme - Determine if MSIX is supported and init
1951 * @adapter: board private structure to initialize
1952 *
1953 **/
1954static int ixgbevf_init_interrupt_scheme(struct ixgbevf_adapter *adapter)
1955{
1956 int err;
1957
1958 /* Number of supported queues */
1959 ixgbevf_set_num_queues(adapter);
1960
1961 err = ixgbevf_set_interrupt_capability(adapter);
1962 if (err) {
1963 hw_dbg(&adapter->hw,
1964 "Unable to setup interrupt capabilities\n");
1965 goto err_set_interrupt;
1966 }
1967
1968 err = ixgbevf_alloc_q_vectors(adapter);
1969 if (err) {
1970 hw_dbg(&adapter->hw, "Unable to allocate memory for queue "
1971 "vectors\n");
1972 goto err_alloc_q_vectors;
1973 }
1974
1975 err = ixgbevf_alloc_queues(adapter);
1976 if (err) {
dbd9636e 1977 pr_err("Unable to allocate memory for queues\n");
92915f71
GR		 1978 goto err_alloc_queues;
1979 }
1980
1981 hw_dbg(&adapter->hw, "Multiqueue %s: Rx Queue count = %u, "
1982 "Tx Queue count = %u\n",
1983 (adapter->num_rx_queues > 1) ? "Enabled" :
1984 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
1985
1986 set_bit(__IXGBEVF_DOWN, &adapter->state);
1987
1988 return 0;
1989err_alloc_queues:
1990 ixgbevf_free_q_vectors(adapter);
1991err_alloc_q_vectors:
1992 ixgbevf_reset_interrupt_capability(adapter);
1993err_set_interrupt:
1994 return err;
1995}
1996
0ac1e8ce
AD		 1997/**
1998 * ixgbevf_clear_interrupt_scheme - Clear the current interrupt scheme settings
1999 * @adapter: board private structure to clear interrupt scheme on
2000 *
2001 * We go through and clear interrupt specific resources and reset the structure
2002 * to pre-load conditions
2003 **/
2004static void ixgbevf_clear_interrupt_scheme(struct ixgbevf_adapter *adapter)
2005{
2006 adapter->num_tx_queues = 0;
2007 adapter->num_rx_queues = 0;
2008
2009 ixgbevf_free_q_vectors(adapter);
2010 ixgbevf_reset_interrupt_capability(adapter);
2011}
2012
92915f71
GR		 2013/**
2014 * ixgbevf_sw_init - Initialize general software structures
2015 * (struct ixgbevf_adapter)
2016 * @adapter: board private structure to initialize
2017 *
2018 * ixgbevf_sw_init initializes the Adapter private data structure.
2019 * Fields are initialized based on PCI device information and
2020 * OS network device settings (MTU size).
2021 **/
2022static int __devinit ixgbevf_sw_init(struct ixgbevf_adapter *adapter)
2023{
2024 struct ixgbe_hw *hw = &adapter->hw;
2025 struct pci_dev *pdev = adapter->pdev;
2026 int err;
2027
2028 /* PCI config space info */
2029
2030 hw->vendor_id = pdev->vendor;
2031 hw->device_id = pdev->device;
ff938e43 2032 hw->revision_id = pdev->revision;
92915f71
GR		 2033 hw->subsystem_vendor_id = pdev->subsystem_vendor;
2034 hw->subsystem_device_id = pdev->subsystem_device;
2035
2036 hw->mbx.ops.init_params(hw);
56e94095
AD		 2037
2038 /* assume legacy case in which PF would only give VF 2 queues */
2039 hw->mac.max_tx_queues = 2;
2040 hw->mac.max_rx_queues = 2;
2041
92915f71
GR		 2042 err = hw->mac.ops.reset_hw(hw);
2043 if (err) {
2044 dev_info(&pdev->dev,
2045 "PF still in reset state, assigning new address\n");
1a0d6ae5
DK		 2046 eth_hw_addr_random(adapter->netdev);
2047 memcpy(adapter->hw.mac.addr, adapter->netdev->dev_addr,
2048 adapter->netdev->addr_len);
92915f71
GR		 2049 } else {
2050 err = hw->mac.ops.init_hw(hw);
2051 if (err) {
dbd9636e 2052 pr_err("init_shared_code failed: %d\n", err);
92915f71
GR		 2053 goto out;
2054 }
1a0d6ae5
DK		 2055 memcpy(adapter->netdev->dev_addr, adapter->hw.mac.addr,
2056 adapter->netdev->addr_len);
92915f71
GR		 2057 }
2058
1c55ed76
AD		 2059 /* lock to protect mailbox accesses */
2060 spin_lock_init(&adapter->mbx_lock);
2061
92915f71 2062 /* Enable dynamic interrupt throttling rates */
5f3600eb
AD		 2063 adapter->rx_itr_setting = 1;
2064 adapter->tx_itr_setting = 1;
92915f71 2065
92915f71
GR		 2066 /* set default ring sizes */
2067 adapter->tx_ring_count = IXGBEVF_DEFAULT_TXD;
2068 adapter->rx_ring_count = IXGBEVF_DEFAULT_RXD;
2069
92915f71 2070 set_bit(__IXGBEVF_DOWN, &adapter->state);
1a0d6ae5 2071 return 0;
92915f71
GR		 2072
2073out:
2074 return err;
2075}
2076
92915f71
GR		 2077#define UPDATE_VF_COUNTER_32bit(reg, last_counter, counter) \
2078 { \
2079 u32 current_counter = IXGBE_READ_REG(hw, reg); \
2080 if (current_counter < last_counter) \
2081 counter += 0x100000000LL; \
2082 last_counter = current_counter; \
2083 counter &= 0xFFFFFFFF00000000LL; \
2084 counter |= current_counter; \
2085 }
2086
2087#define UPDATE_VF_COUNTER_36bit(reg_lsb, reg_msb, last_counter, counter) \
2088 { \
2089 u64 current_counter_lsb = IXGBE_READ_REG(hw, reg_lsb); \
2090 u64 current_counter_msb = IXGBE_READ_REG(hw, reg_msb); \
2091 u64 current_counter = (current_counter_msb << 32) | \
2092 current_counter_lsb; \
2093 if (current_counter < last_counter) \
2094 counter += 0x1000000000LL; \
2095 last_counter = current_counter; \
2096 counter &= 0xFFFFFFF000000000LL; \
2097 counter |= current_counter; \
2098 }
2099/**
2100 * ixgbevf_update_stats - Update the board statistics counters.
2101 * @adapter: board private structure
2102 **/
2103void ixgbevf_update_stats(struct ixgbevf_adapter *adapter)
2104{
2105 struct ixgbe_hw *hw = &adapter->hw;
2106
2107 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPRC, adapter->stats.last_vfgprc,
2108 adapter->stats.vfgprc);
2109 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPTC, adapter->stats.last_vfgptc,
2110 adapter->stats.vfgptc);
2111 UPDATE_VF_COUNTER_36bit(IXGBE_VFGORC_LSB, IXGBE_VFGORC_MSB,
2112 adapter->stats.last_vfgorc,
2113 adapter->stats.vfgorc);
2114 UPDATE_VF_COUNTER_36bit(IXGBE_VFGOTC_LSB, IXGBE_VFGOTC_MSB,
2115 adapter->stats.last_vfgotc,
2116 adapter->stats.vfgotc);
2117 UPDATE_VF_COUNTER_32bit(IXGBE_VFMPRC, adapter->stats.last_vfmprc,
2118 adapter->stats.vfmprc);
92915f71
GR		 2119}
2120
2121/**
2122 * ixgbevf_watchdog - Timer Call-back
2123 * @data: pointer to adapter cast into an unsigned long
2124 **/
2125static void ixgbevf_watchdog(unsigned long data)
2126{
2127 struct ixgbevf_adapter *adapter = (struct ixgbevf_adapter *)data;
2128 struct ixgbe_hw *hw = &adapter->hw;
5f3600eb 2129 u32 eics = 0;
92915f71
GR		 2130 int i;
2131
2132 /*
2133 * Do the watchdog outside of interrupt context due to the lovely
2134 * delays that some of the newer hardware requires
2135 */
2136
2137 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
2138 goto watchdog_short_circuit;
2139
2140 /* get one bit for every active tx/rx interrupt vector */
2141 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
2142 struct ixgbevf_q_vector *qv = adapter->q_vector[i];
6b43c446 2143 if (qv->rx.ring || qv->tx.ring)
5f3600eb 2144 eics |= 1 << i;
92915f71
GR		 2145 }
2146
5f3600eb 2147 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, eics);
92915f71
GR		 2148
2149watchdog_short_circuit:
2150 schedule_work(&adapter->watchdog_task);
2151}
2152
2153/**
2154 * ixgbevf_tx_timeout - Respond to a Tx Hang
2155 * @netdev: network interface device structure
2156 **/
2157static void ixgbevf_tx_timeout(struct net_device *netdev)
2158{
2159 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2160
2161 /* Do the reset outside of interrupt context */
2162 schedule_work(&adapter->reset_task);
2163}
2164
2165static void ixgbevf_reset_task(struct work_struct *work)
2166{
2167 struct ixgbevf_adapter *adapter;
2168 adapter = container_of(work, struct ixgbevf_adapter, reset_task);
2169
2170 /* If we're already down or resetting, just bail */
2171 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
2172 test_bit(__IXGBEVF_RESETTING, &adapter->state))
2173 return;
2174
2175 adapter->tx_timeout_count++;
2176
2177 ixgbevf_reinit_locked(adapter);
2178}
2179
2180/**
2181 * ixgbevf_watchdog_task - worker thread to bring link up
2182 * @work: pointer to work_struct containing our data
2183 **/
2184static void ixgbevf_watchdog_task(struct work_struct *work)
2185{
2186 struct ixgbevf_adapter *adapter = container_of(work,
2187 struct ixgbevf_adapter,
2188 watchdog_task);
2189 struct net_device *netdev = adapter->netdev;
2190 struct ixgbe_hw *hw = &adapter->hw;
2191 u32 link_speed = adapter->link_speed;
2192 bool link_up = adapter->link_up;
92fe0bf7 2193 s32 need_reset;
92915f71
GR		 2194
2195 adapter->flags |= IXGBE_FLAG_IN_WATCHDOG_TASK;
2196
2197 /*
2198 * Always check the link on the watchdog because we have
2199 * no LSC interrupt
2200 */
1c55ed76 2201
92fe0bf7 2202 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 2203
92fe0bf7 2204 need_reset = hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
1c55ed76 2205
92fe0bf7 2206 spin_unlock_bh(&adapter->mbx_lock);
1c55ed76 2207
92fe0bf7
GR		 2208 if (need_reset) {
2209 adapter->link_up = link_up;
2210 adapter->link_speed = link_speed;
2211 netif_carrier_off(netdev);
2212 netif_tx_stop_all_queues(netdev);
2213 schedule_work(&adapter->reset_task);
2214 goto pf_has_reset;
92915f71
GR		 2215 }
2216 adapter->link_up = link_up;
2217 adapter->link_speed = link_speed;
2218
2219 if (link_up) {
2220 if (!netif_carrier_ok(netdev)) {
300bc060
JP		 2221 hw_dbg(&adapter->hw, "NIC Link is Up, %u Gbps\n",
2222 (link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
2223 10 : 1);
92915f71
GR		 2224 netif_carrier_on(netdev);
2225 netif_tx_wake_all_queues(netdev);
92915f71
GR		 2226 }
2227 } else {
2228 adapter->link_up = false;
2229 adapter->link_speed = 0;
2230 if (netif_carrier_ok(netdev)) {
2231 hw_dbg(&adapter->hw, "NIC Link is Down\n");
2232 netif_carrier_off(netdev);
2233 netif_tx_stop_all_queues(netdev);
2234 }
2235 }
2236
92915f71
GR		 2237 ixgbevf_update_stats(adapter);
2238
33bd9f60 2239pf_has_reset:
92915f71
GR		 2240 /* Reset the timer */
2241 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
2242 mod_timer(&adapter->watchdog_timer,
2243 round_jiffies(jiffies + (2 * HZ)));
2244
2245 adapter->flags &= ~IXGBE_FLAG_IN_WATCHDOG_TASK;
2246}
2247
2248/**
2249 * ixgbevf_free_tx_resources - Free Tx Resources per Queue
2250 * @adapter: board private structure
2251 * @tx_ring: Tx descriptor ring for a specific queue
2252 *
2253 * Free all transmit software resources
2254 **/
2255void ixgbevf_free_tx_resources(struct ixgbevf_adapter *adapter,
2256 struct ixgbevf_ring *tx_ring)
2257{
2258 struct pci_dev *pdev = adapter->pdev;
2259
92915f71
GR		 2260 ixgbevf_clean_tx_ring(adapter, tx_ring);
2261
2262 vfree(tx_ring->tx_buffer_info);
2263 tx_ring->tx_buffer_info = NULL;
2264
2a1f8794
NN		 2265 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2266 tx_ring->dma);
92915f71
GR		 2267
2268 tx_ring->desc = NULL;
2269}
2270
2271/**
2272 * ixgbevf_free_all_tx_resources - Free Tx Resources for All Queues
2273 * @adapter: board private structure
2274 *
2275 * Free all transmit software resources
2276 **/
2277static void ixgbevf_free_all_tx_resources(struct ixgbevf_adapter *adapter)
2278{
2279 int i;
2280
2281 for (i = 0; i < adapter->num_tx_queues; i++)
2282 if (adapter->tx_ring[i].desc)
2283 ixgbevf_free_tx_resources(adapter,
2284 &adapter->tx_ring[i]);
2285
2286}
2287
2288/**
2289 * ixgbevf_setup_tx_resources - allocate Tx resources (Descriptors)
2290 * @adapter: board private structure
2291 * @tx_ring: tx descriptor ring (for a specific queue) to setup
2292 *
2293 * Return 0 on success, negative on failure
2294 **/
2295int ixgbevf_setup_tx_resources(struct ixgbevf_adapter *adapter,
2296 struct ixgbevf_ring *tx_ring)
2297{
2298 struct pci_dev *pdev = adapter->pdev;
2299 int size;
2300
2301 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
89bf67f1 2302 tx_ring->tx_buffer_info = vzalloc(size);
92915f71
GR		 2303 if (!tx_ring->tx_buffer_info)
2304 goto err;
92915f71
GR		 2305
2306 /* round up to nearest 4K */
2307 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
2308 tx_ring->size = ALIGN(tx_ring->size, 4096);
2309
2a1f8794
NN		 2310 tx_ring->desc = dma_alloc_coherent(&pdev->dev, tx_ring->size,
2311 &tx_ring->dma, GFP_KERNEL);
92915f71
GR		 2312 if (!tx_ring->desc)
2313 goto err;
2314
2315 tx_ring->next_to_use = 0;
2316 tx_ring->next_to_clean = 0;
92915f71
GR		 2317 return 0;
2318
2319err:
2320 vfree(tx_ring->tx_buffer_info);
2321 tx_ring->tx_buffer_info = NULL;
2322 hw_dbg(&adapter->hw, "Unable to allocate memory for the transmit "
2323 "descriptor ring\n");
2324 return -ENOMEM;
2325}
2326
2327/**
2328 * ixgbevf_setup_all_tx_resources - allocate all queues Tx resources
2329 * @adapter: board private structure
2330 *
2331 * If this function returns with an error, then it's possible one or
2332 * more of the rings is populated (while the rest are not). It is the
2333 * callers duty to clean those orphaned rings.
2334 *
2335 * Return 0 on success, negative on failure
2336 **/
2337static int ixgbevf_setup_all_tx_resources(struct ixgbevf_adapter *adapter)
2338{
2339 int i, err = 0;
2340
2341 for (i = 0; i < adapter->num_tx_queues; i++) {
2342 err = ixgbevf_setup_tx_resources(adapter, &adapter->tx_ring[i]);
2343 if (!err)
2344 continue;
2345 hw_dbg(&adapter->hw,
2346 "Allocation for Tx Queue %u failed\n", i);
2347 break;
2348 }
2349
2350 return err;
2351}
2352
2353/**
2354 * ixgbevf_setup_rx_resources - allocate Rx resources (Descriptors)
2355 * @adapter: board private structure
2356 * @rx_ring: rx descriptor ring (for a specific queue) to setup
2357 *
2358 * Returns 0 on success, negative on failure
2359 **/
2360int ixgbevf_setup_rx_resources(struct ixgbevf_adapter *adapter,
2361 struct ixgbevf_ring *rx_ring)
2362{
2363 struct pci_dev *pdev = adapter->pdev;
2364 int size;
2365
2366 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
89bf67f1 2367 rx_ring->rx_buffer_info = vzalloc(size);
e404decb 2368 if (!rx_ring->rx_buffer_info)
92915f71 2369 goto alloc_failed;
92915f71
GR		 2370
2371 /* Round up to nearest 4K */
2372 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
2373 rx_ring->size = ALIGN(rx_ring->size, 4096);
2374
2a1f8794
NN		 2375 rx_ring->desc = dma_alloc_coherent(&pdev->dev, rx_ring->size,
2376 &rx_ring->dma, GFP_KERNEL);
92915f71
GR		 2377
2378 if (!rx_ring->desc) {
2379 hw_dbg(&adapter->hw,
2380 "Unable to allocate memory for "
2381 "the receive descriptor ring\n");
2382 vfree(rx_ring->rx_buffer_info);
2383 rx_ring->rx_buffer_info = NULL;
2384 goto alloc_failed;
2385 }
2386
2387 rx_ring->next_to_clean = 0;
2388 rx_ring->next_to_use = 0;
2389
2390 return 0;
2391alloc_failed:
2392 return -ENOMEM;
2393}
2394
2395/**
2396 * ixgbevf_setup_all_rx_resources - allocate all queues Rx resources
2397 * @adapter: board private structure
2398 *
2399 * If this function returns with an error, then it's possible one or
2400 * more of the rings is populated (while the rest are not). It is the
2401 * callers duty to clean those orphaned rings.
2402 *
2403 * Return 0 on success, negative on failure
2404 **/
2405static int ixgbevf_setup_all_rx_resources(struct ixgbevf_adapter *adapter)
2406{
2407 int i, err = 0;
2408
2409 for (i = 0; i < adapter->num_rx_queues; i++) {
2410 err = ixgbevf_setup_rx_resources(adapter, &adapter->rx_ring[i]);
2411 if (!err)
2412 continue;
2413 hw_dbg(&adapter->hw,
2414 "Allocation for Rx Queue %u failed\n", i);
2415 break;
2416 }
2417 return err;
2418}
2419
2420/**
2421 * ixgbevf_free_rx_resources - Free Rx Resources
2422 * @adapter: board private structure
2423 * @rx_ring: ring to clean the resources from
2424 *
2425 * Free all receive software resources
2426 **/
2427void ixgbevf_free_rx_resources(struct ixgbevf_adapter *adapter,
2428 struct ixgbevf_ring *rx_ring)
2429{
2430 struct pci_dev *pdev = adapter->pdev;
2431
2432 ixgbevf_clean_rx_ring(adapter, rx_ring);
2433
2434 vfree(rx_ring->rx_buffer_info);
2435 rx_ring->rx_buffer_info = NULL;
2436
2a1f8794
NN		 2437 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2438 rx_ring->dma);
92915f71
GR		 2439
2440 rx_ring->desc = NULL;
2441}
2442
2443/**
2444 * ixgbevf_free_all_rx_resources - Free Rx Resources for All Queues
2445 * @adapter: board private structure
2446 *
2447 * Free all receive software resources
2448 **/
2449static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter)
2450{
2451 int i;
2452
2453 for (i = 0; i < adapter->num_rx_queues; i++)
2454 if (adapter->rx_ring[i].desc)
2455 ixgbevf_free_rx_resources(adapter,
2456 &adapter->rx_ring[i]);
2457}
2458
56e94095
AD		 2459static int ixgbevf_setup_queues(struct ixgbevf_adapter *adapter)
2460{
2461 struct ixgbe_hw *hw = &adapter->hw;
2462 struct ixgbevf_ring *rx_ring;
2463 unsigned int def_q = 0;
2464 unsigned int num_tcs = 0;
2465 unsigned int num_rx_queues = 1;
2466 int err, i;
2467
55fdd45b 2468 spin_lock_bh(&adapter->mbx_lock);
56e94095
AD		 2469
2470 /* fetch queue configuration from the PF */
2471 err = ixgbevf_get_queues(hw, &num_tcs, &def_q);
2472
55fdd45b 2473 spin_unlock_bh(&adapter->mbx_lock);
56e94095
AD		 2474
2475 if (err)
2476 return err;
2477
2478 if (num_tcs > 1) {
2479 /* update default Tx ring register index */
2480 adapter->tx_ring[0].reg_idx = def_q;
2481
2482 /* we need as many queues as traffic classes */
2483 num_rx_queues = num_tcs;
2484 }
2485
2486 /* nothing to do if we have the correct number of queues */
2487 if (adapter->num_rx_queues == num_rx_queues)
2488 return 0;
2489
2490 /* allocate new rings */
2491 rx_ring = kcalloc(num_rx_queues,
2492 sizeof(struct ixgbevf_ring), GFP_KERNEL);
2493 if (!rx_ring)
2494 return -ENOMEM;
2495
2496 /* setup ring fields */
2497 for (i = 0; i < num_rx_queues; i++) {
2498 rx_ring[i].count = adapter->rx_ring_count;
2499 rx_ring[i].queue_index = i;
2500 rx_ring[i].reg_idx = i;
2501 rx_ring[i].dev = &adapter->pdev->dev;
2502 rx_ring[i].netdev = adapter->netdev;
2503 }
2504
2505 /* free the existing ring and queues */
2506 adapter->num_rx_queues = 0;
2507 kfree(adapter->rx_ring);
2508
2509 /* move new rings into position on the adapter struct */
2510 adapter->rx_ring = rx_ring;
2511 adapter->num_rx_queues = num_rx_queues;
2512
2513 return 0;
2514}
2515
92915f71
GR		 2516/**
2517 * ixgbevf_open - Called when a network interface is made active
2518 * @netdev: network interface device structure
2519 *
2520 * Returns 0 on success, negative value on failure
2521 *
2522 * The open entry point is called when a network interface is made
2523 * active by the system (IFF_UP). At this point all resources needed
2524 * for transmit and receive operations are allocated, the interrupt
2525 * handler is registered with the OS, the watchdog timer is started,
2526 * and the stack is notified that the interface is ready.
2527 **/
2528static int ixgbevf_open(struct net_device *netdev)
2529{
2530 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2531 struct ixgbe_hw *hw = &adapter->hw;
2532 int err;
2533
2534 /* disallow open during test */
2535 if (test_bit(__IXGBEVF_TESTING, &adapter->state))
2536 return -EBUSY;
2537
2538 if (hw->adapter_stopped) {
2539 ixgbevf_reset(adapter);
2540 /* if adapter is still stopped then PF isn't up and
2541 * the vf can't start. */
2542 if (hw->adapter_stopped) {
2543 err = IXGBE_ERR_MBX;
dbd9636e
JK		 2544 pr_err("Unable to start - perhaps the PF Driver isn't "
2545 "up yet\n");
92915f71
GR		 2546 goto err_setup_reset;
2547 }
2548 }
2549
31186785
AD		 2550 ixgbevf_negotiate_api(adapter);
2551
56e94095
AD		 2552 /* setup queue reg_idx and Rx queue count */
2553 err = ixgbevf_setup_queues(adapter);
2554 if (err)
2555 goto err_setup_queues;
2556
92915f71
GR		 2557 /* allocate transmit descriptors */
2558 err = ixgbevf_setup_all_tx_resources(adapter);
2559 if (err)
2560 goto err_setup_tx;
2561
2562 /* allocate receive descriptors */
2563 err = ixgbevf_setup_all_rx_resources(adapter);
2564 if (err)
2565 goto err_setup_rx;
2566
2567 ixgbevf_configure(adapter);
2568
2569 /*
2570 * Map the Tx/Rx rings to the vectors we were allotted.
2571 * if request_irq will be called in this function map_rings
2572 * must be called *before* up_complete
2573 */
2574 ixgbevf_map_rings_to_vectors(adapter);
2575
795180d8 2576 ixgbevf_up_complete(adapter);
92915f71
GR		 2577
2578 /* clear any pending interrupts, may auto mask */
2579 IXGBE_READ_REG(hw, IXGBE_VTEICR);
2580 err = ixgbevf_request_irq(adapter);
2581 if (err)
2582 goto err_req_irq;
2583
5f3600eb 2584 ixgbevf_irq_enable(adapter);
92915f71
GR		 2585
2586 return 0;
2587
2588err_req_irq:
2589 ixgbevf_down(adapter);
92915f71
GR		 2590 ixgbevf_free_irq(adapter);
2591err_setup_rx:
2592 ixgbevf_free_all_rx_resources(adapter);
2593err_setup_tx:
2594 ixgbevf_free_all_tx_resources(adapter);
56e94095 2595err_setup_queues:
92915f71
GR		 2596 ixgbevf_reset(adapter);
2597
2598err_setup_reset:
2599
2600 return err;
2601}
2602
2603/**
2604 * ixgbevf_close - Disables a network interface
2605 * @netdev: network interface device structure
2606 *
2607 * Returns 0, this is not allowed to fail
2608 *
2609 * The close entry point is called when an interface is de-activated
2610 * by the OS. The hardware is still under the drivers control, but
2611 * needs to be disabled. A global MAC reset is issued to stop the
2612 * hardware, and all transmit and receive resources are freed.
2613 **/
2614static int ixgbevf_close(struct net_device *netdev)
2615{
2616 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2617
2618 ixgbevf_down(adapter);
2619 ixgbevf_free_irq(adapter);
2620
2621 ixgbevf_free_all_tx_resources(adapter);
2622 ixgbevf_free_all_rx_resources(adapter);
2623
2624 return 0;
2625}
2626
70a10e25
AD		 2627static void ixgbevf_tx_ctxtdesc(struct ixgbevf_ring *tx_ring,
2628 u32 vlan_macip_lens, u32 type_tucmd,
2629 u32 mss_l4len_idx)
92915f71
GR		 2630{
2631 struct ixgbe_adv_tx_context_desc *context_desc;
70a10e25 2632 u16 i = tx_ring->next_to_use;
92915f71 2633
70a10e25 2634 context_desc = IXGBEVF_TX_CTXTDESC(tx_ring, i);
92915f71 2635
70a10e25
AD		 2636 i++;
2637 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
92915f71 2638
70a10e25
AD		 2639 /* set bits to identify this as an advanced context descriptor */
2640 type_tucmd |= IXGBE_TXD_CMD_DEXT | IXGBE_ADVTXD_DTYP_CTXT;
92915f71 2641
70a10e25
AD		 2642 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2643 context_desc->seqnum_seed = 0;
2644 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd);
2645 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
2646}
2647
2648static int ixgbevf_tso(struct ixgbevf_ring *tx_ring,
2649 struct sk_buff *skb, u32 tx_flags, u8 *hdr_len)
2650{
2651 u32 vlan_macip_lens, type_tucmd;
2652 u32 mss_l4len_idx, l4len;
2653
2654 if (!skb_is_gso(skb))
2655 return 0;
92915f71 2656
70a10e25
AD		 2657 if (skb_header_cloned(skb)) {
2658 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2659 if (err)
2660 return err;
92915f71
GR		 2661 }
2662
70a10e25
AD		 2663 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2664 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
2665
2666 if (skb->protocol == htons(ETH_P_IP)) {
2667 struct iphdr *iph = ip_hdr(skb);
2668 iph->tot_len = 0;
2669 iph->check = 0;
2670 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2671 iph->daddr, 0,
2672 IPPROTO_TCP,
2673 0);
2674 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
2675 } else if (skb_is_gso_v6(skb)) {
2676 ipv6_hdr(skb)->payload_len = 0;
2677 tcp_hdr(skb)->check =
2678 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2679 &ipv6_hdr(skb)->daddr,
2680 0, IPPROTO_TCP, 0);
2681 }
2682
2683 /* compute header lengths */
2684 l4len = tcp_hdrlen(skb);
2685 *hdr_len += l4len;
2686 *hdr_len = skb_transport_offset(skb) + l4len;
2687
2688 /* mss_l4len_id: use 1 as index for TSO */
2689 mss_l4len_idx = l4len << IXGBE_ADVTXD_L4LEN_SHIFT;
2690 mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
2691 mss_l4len_idx |= 1 << IXGBE_ADVTXD_IDX_SHIFT;
2692
2693 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
2694 vlan_macip_lens = skb_network_header_len(skb);
2695 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
2696 vlan_macip_lens |= tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
2697
2698 ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens,
2699 type_tucmd, mss_l4len_idx);
2700
2701 return 1;
92915f71
GR		 2702}
2703
70a10e25 2704static bool ixgbevf_tx_csum(struct ixgbevf_ring *tx_ring,
92915f71
GR		 2705 struct sk_buff *skb, u32 tx_flags)
2706{
92915f71 2707
92915f71 2708
92915f71 2709
70a10e25
AD		 2710 u32 vlan_macip_lens = 0;
2711 u32 mss_l4len_idx = 0;
2712 u32 type_tucmd = 0;
92915f71 2713
70a10e25
AD		 2714 if (skb->ip_summed == CHECKSUM_PARTIAL) {
2715 u8 l4_hdr = 0;
2716 switch (skb->protocol) {
2717 case __constant_htons(ETH_P_IP):
2718 vlan_macip_lens |= skb_network_header_len(skb);
2719 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
2720 l4_hdr = ip_hdr(skb)->protocol;
2721 break;
2722 case __constant_htons(ETH_P_IPV6):
2723 vlan_macip_lens |= skb_network_header_len(skb);
2724 l4_hdr = ipv6_hdr(skb)->nexthdr;
2725 break;
2726 default:
2727 if (unlikely(net_ratelimit())) {
2728 dev_warn(tx_ring->dev,
2729 "partial checksum but proto=%x!\n",
2730 skb->protocol);
2731 }
2732 break;
2733 }
92915f71 2734
70a10e25
AD		 2735 switch (l4_hdr) {
2736 case IPPROTO_TCP:
2737 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
2738 mss_l4len_idx = tcp_hdrlen(skb) <<
2739 IXGBE_ADVTXD_L4LEN_SHIFT;
2740 break;
2741 case IPPROTO_SCTP:
2742 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_SCTP;
2743 mss_l4len_idx = sizeof(struct sctphdr) <<
2744 IXGBE_ADVTXD_L4LEN_SHIFT;
2745 break;
2746 case IPPROTO_UDP:
2747 mss_l4len_idx = sizeof(struct udphdr) <<
2748 IXGBE_ADVTXD_L4LEN_SHIFT;
2749 break;
2750 default:
2751 if (unlikely(net_ratelimit())) {
2752 dev_warn(tx_ring->dev,
2753 "partial checksum but l4 proto=%x!\n",
2754 l4_hdr);
2755 }
2756 break;
2757 }
92915f71
GR		 2758 }
2759
70a10e25
AD		 2760 /* vlan_macip_lens: MACLEN, VLAN tag */
2761 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
2762 vlan_macip_lens |= tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
2763
2764 ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens,
2765 type_tucmd, mss_l4len_idx);
2766
2767 return (skb->ip_summed == CHECKSUM_PARTIAL);
92915f71
GR		 2768}
2769
70a10e25 2770static int ixgbevf_tx_map(struct ixgbevf_ring *tx_ring,
92915f71
GR		 2771 struct sk_buff *skb, u32 tx_flags,
2772 unsigned int first)
2773{
92915f71
GR		 2774 struct ixgbevf_tx_buffer *tx_buffer_info;
2775 unsigned int len;
2776 unsigned int total = skb->len;
2540ddb5
KV		 2777 unsigned int offset = 0, size;
2778 int count = 0;
92915f71
GR		 2779 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
2780 unsigned int f;
65deeed7 2781 int i;
92915f71
GR		 2782
2783 i = tx_ring->next_to_use;
2784
2785 len = min(skb_headlen(skb), total);
2786 while (len) {
2787 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2788 size = min(len, (unsigned int)IXGBE_MAX_DATA_PER_TXD);
2789
2790 tx_buffer_info->length = size;
2791 tx_buffer_info->mapped_as_page = false;
70a10e25 2792 tx_buffer_info->dma = dma_map_single(tx_ring->dev,
92915f71 2793 skb->data + offset,
2a1f8794 2794 size, DMA_TO_DEVICE);
70a10e25 2795 if (dma_mapping_error(tx_ring->dev, tx_buffer_info->dma))
92915f71 2796 goto dma_error;
92915f71
GR		 2797 tx_buffer_info->next_to_watch = i;
2798
2799 len -= size;
2800 total -= size;
2801 offset += size;
2802 count++;
2803 i++;
2804 if (i == tx_ring->count)
2805 i = 0;
2806 }
2807
2808 for (f = 0; f < nr_frags; f++) {
9e903e08 2809 const struct skb_frag_struct *frag;
92915f71
GR		 2810
2811 frag = &skb_shinfo(skb)->frags[f];
9e903e08 2812 len = min((unsigned int)skb_frag_size(frag), total);
877749bf 2813 offset = 0;
92915f71
GR		 2814
2815 while (len) {
2816 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2817 size = min(len, (unsigned int)IXGBE_MAX_DATA_PER_TXD);
2818
2819 tx_buffer_info->length = size;
877749bf 2820 tx_buffer_info->dma =
70a10e25 2821 skb_frag_dma_map(tx_ring->dev, frag,
877749bf 2822 offset, size, DMA_TO_DEVICE);
70a10e25
AD		 2823 if (dma_mapping_error(tx_ring->dev,
2824 tx_buffer_info->dma))
92915f71 2825 goto dma_error;
6132ee8a 2826 tx_buffer_info->mapped_as_page = true;
92915f71
GR		 2827 tx_buffer_info->next_to_watch = i;
2828
2829 len -= size;
2830 total -= size;
2831 offset += size;
2832 count++;
2833 i++;
2834 if (i == tx_ring->count)
2835 i = 0;
2836 }
2837 if (total == 0)
2838 break;
2839 }
2840
2841 if (i == 0)
2842 i = tx_ring->count - 1;
2843 else
2844 i = i - 1;
2845 tx_ring->tx_buffer_info[i].skb = skb;
2846 tx_ring->tx_buffer_info[first].next_to_watch = i;
70a10e25 2847 tx_ring->tx_buffer_info[first].time_stamp = jiffies;
92915f71
GR		 2848
2849 return count;
2850
2851dma_error:
70a10e25 2852 dev_err(tx_ring->dev, "TX DMA map failed\n");
92915f71
GR		 2853
2854 /* clear timestamp and dma mappings for failed tx_buffer_info map */
2855 tx_buffer_info->dma = 0;
92915f71
GR		 2856 tx_buffer_info->next_to_watch = 0;
2857 count--;
2858
2859 /* clear timestamp and dma mappings for remaining portion of packet */
2860 while (count >= 0) {
2861 count--;
2862 i--;
2863 if (i < 0)
2864 i += tx_ring->count;
2865 tx_buffer_info = &tx_ring->tx_buffer_info[i];
70a10e25 2866 ixgbevf_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
92915f71
GR		 2867 }
2868
2869 return count;
2870}
2871
70a10e25 2872static void ixgbevf_tx_queue(struct ixgbevf_ring *tx_ring, int tx_flags,
92915f71
GR		 2873 int count, u32 paylen, u8 hdr_len)
2874{
2875 union ixgbe_adv_tx_desc *tx_desc = NULL;
2876 struct ixgbevf_tx_buffer *tx_buffer_info;
2877 u32 olinfo_status = 0, cmd_type_len = 0;
2878 unsigned int i;
2879
2880 u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
2881
2882 cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
2883
2884 cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
2885
2886 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2887 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
2888
70a10e25
AD		 2889 if (tx_flags & IXGBE_TX_FLAGS_CSUM)
2890 olinfo_status |= IXGBE_ADVTXD_POPTS_TXSM;
2891
92915f71
GR		 2892 if (tx_flags & IXGBE_TX_FLAGS_TSO) {
2893 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
2894
92915f71
GR		 2895 /* use index 1 context for tso */
2896 olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
2897 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
70a10e25
AD		 2898 olinfo_status |= IXGBE_ADVTXD_POPTS_IXSM;
2899
2900 }
92915f71 2901
70a10e25
AD		 2902 /*
2903 * Check Context must be set if Tx switch is enabled, which it
2904 * always is for case where virtual functions are running
2905 */
2906 olinfo_status |= IXGBE_ADVTXD_CC;
92915f71
GR		 2907
2908 olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
2909
2910 i = tx_ring->next_to_use;
2911 while (count--) {
2912 tx_buffer_info = &tx_ring->tx_buffer_info[i];
908421f6 2913 tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
92915f71
GR		 2914 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
2915 tx_desc->read.cmd_type_len =
2916 cpu_to_le32(cmd_type_len | tx_buffer_info->length);
2917 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
2918 i++;
2919 if (i == tx_ring->count)
2920 i = 0;
2921 }
2922
2923 tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
2924
92915f71 2925 tx_ring->next_to_use = i;
92915f71
GR		 2926}
2927
fb40195c 2928static int __ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
92915f71 2929{
fb40195c 2930 struct ixgbevf_adapter *adapter = netdev_priv(tx_ring->netdev);
92915f71 2931
fb40195c 2932 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
92915f71
GR		 2933 /* Herbert's original patch had:
2934 * smp_mb__after_netif_stop_queue();
2935 * but since that doesn't exist yet, just open code it. */
2936 smp_mb();
2937
2938 /* We need to check again in a case another CPU has just
2939 * made room available. */
2940 if (likely(IXGBE_DESC_UNUSED(tx_ring) < size))
2941 return -EBUSY;
2942
2943 /* A reprieve! - use start_queue because it doesn't call schedule */
fb40195c 2944 netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
92915f71
GR		 2945 ++adapter->restart_queue;
2946 return 0;
2947}
2948
fb40195c 2949static int ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
92915f71
GR		 2950{
2951 if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size))
2952 return 0;
fb40195c 2953 return __ixgbevf_maybe_stop_tx(tx_ring, size);
92915f71
GR		 2954}
2955
2956static int ixgbevf_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2957{
2958 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2959 struct ixgbevf_ring *tx_ring;
2960 unsigned int first;
2961 unsigned int tx_flags = 0;
2962 u8 hdr_len = 0;
2963 int r_idx = 0, tso;
3595990a
AD		 2964 u16 count = TXD_USE_COUNT(skb_headlen(skb));
2965#if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
2966 unsigned short f;
2967#endif
f9d08f16 2968 u8 *dst_mac = skb_header_pointer(skb, 0, 0, NULL);
46acc460 2969 if (!dst_mac || is_link_local_ether_addr(dst_mac)) {
f9d08f16
GR		 2970 dev_kfree_skb(skb);
2971 return NETDEV_TX_OK;
2972 }
92915f71
GR		 2973
2974 tx_ring = &adapter->tx_ring[r_idx];
2975
3595990a
AD		 2976 /*
2977 * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
2978 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
2979 * + 2 desc gap to keep tail from touching head,
2980 * + 1 desc for context descriptor,
2981 * otherwise try next time
2982 */
2983#if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
2984 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
2985 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
2986#else
2987 count += skb_shinfo(skb)->nr_frags;
2988#endif
fb40195c 2989 if (ixgbevf_maybe_stop_tx(tx_ring, count + 3)) {
3595990a
AD		 2990 adapter->tx_busy++;
2991 return NETDEV_TX_BUSY;
2992 }
2993
eab6d18d 2994 if (vlan_tx_tag_present(skb)) {
92915f71
GR		 2995 tx_flags |= vlan_tx_tag_get(skb);
2996 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
2997 tx_flags |= IXGBE_TX_FLAGS_VLAN;
2998 }
2999
92915f71
GR		 3000 first = tx_ring->next_to_use;
3001
3002 if (skb->protocol == htons(ETH_P_IP))
3003 tx_flags |= IXGBE_TX_FLAGS_IPV4;
70a10e25 3004 tso = ixgbevf_tso(tx_ring, skb, tx_flags, &hdr_len);
92915f71
GR		 3005 if (tso < 0) {
3006 dev_kfree_skb_any(skb);
3007 return NETDEV_TX_OK;
3008 }
3009
3010 if (tso)
70a10e25
AD		 3011 tx_flags |= IXGBE_TX_FLAGS_TSO | IXGBE_TX_FLAGS_CSUM;
3012 else if (ixgbevf_tx_csum(tx_ring, skb, tx_flags))
92915f71
GR		 3013 tx_flags |= IXGBE_TX_FLAGS_CSUM;
3014
70a10e25
AD		 3015 ixgbevf_tx_queue(tx_ring, tx_flags,
3016 ixgbevf_tx_map(tx_ring, skb, tx_flags, first),
92915f71 3017 skb->len, hdr_len);
70a10e25
AD		 3018 /*
3019 * Force memory writes to complete before letting h/w
3020 * know there are new descriptors to fetch. (Only
3021 * applicable for weak-ordered memory model archs,
3022 * such as IA-64).
3023 */
3024 wmb();
3025
3026 writel(tx_ring->next_to_use, adapter->hw.hw_addr + tx_ring->tail);
92915f71 3027
fb40195c 3028 ixgbevf_maybe_stop_tx(tx_ring, DESC_NEEDED);
92915f71
GR		 3029
3030 return NETDEV_TX_OK;
3031}
3032
92915f71
GR		 3033/**
3034 * ixgbevf_set_mac - Change the Ethernet Address of the NIC
3035 * @netdev: network interface device structure
3036 * @p: pointer to an address structure
3037 *
3038 * Returns 0 on success, negative on failure
3039 **/
3040static int ixgbevf_set_mac(struct net_device *netdev, void *p)
3041{
3042 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3043 struct ixgbe_hw *hw = &adapter->hw;
3044 struct sockaddr *addr = p;
3045
3046 if (!is_valid_ether_addr(addr->sa_data))
3047 return -EADDRNOTAVAIL;
3048
3049 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3050 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
3051
55fdd45b 3052 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 3053
92fe0bf7 3054 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
92915f71 3055
55fdd45b 3056 spin_unlock_bh(&adapter->mbx_lock);
1c55ed76 3057
92915f71
GR		 3058 return 0;
3059}
3060
3061/**
3062 * ixgbevf_change_mtu - Change the Maximum Transfer Unit
3063 * @netdev: network interface device structure
3064 * @new_mtu: new value for maximum frame size
3065 *
3066 * Returns 0 on success, negative on failure
3067 **/
3068static int ixgbevf_change_mtu(struct net_device *netdev, int new_mtu)
3069{
3070 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3071 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
69bfbec4 3072 int max_possible_frame = MAXIMUM_ETHERNET_VLAN_SIZE;
69bfbec4 3073
56e94095
AD		 3074 switch (adapter->hw.api_version) {
3075 case ixgbe_mbox_api_11:
69bfbec4 3076 max_possible_frame = IXGBE_MAX_JUMBO_FRAME_SIZE;
56e94095
AD		 3077 break;
3078 default:
3079 if (adapter->hw.mac.type == ixgbe_mac_X540_vf)
3080 max_possible_frame = IXGBE_MAX_JUMBO_FRAME_SIZE;
3081 break;
3082 }
92915f71
GR		 3083
3084 /* MTU < 68 is an error and causes problems on some kernels */
69bfbec4 3085 if ((new_mtu < 68) || (max_frame > max_possible_frame))
92915f71
GR		 3086 return -EINVAL;
3087
3088 hw_dbg(&adapter->hw, "changing MTU from %d to %d\n",
3089 netdev->mtu, new_mtu);
3090 /* must set new MTU before calling down or up */
3091 netdev->mtu = new_mtu;
3092
3093 if (netif_running(netdev))
3094 ixgbevf_reinit_locked(adapter);
3095
3096 return 0;
3097}
3098
0ac1e8ce 3099static int ixgbevf_suspend(struct pci_dev *pdev, pm_message_t state)
92915f71
GR		 3100{
3101 struct net_device *netdev = pci_get_drvdata(pdev);
3102 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
0ac1e8ce
AD		 3103#ifdef CONFIG_PM
3104 int retval = 0;
3105#endif
92915f71
GR		 3106
3107 netif_device_detach(netdev);
3108
3109 if (netif_running(netdev)) {
0ac1e8ce 3110 rtnl_lock();
92915f71
GR		 3111 ixgbevf_down(adapter);
3112 ixgbevf_free_irq(adapter);
3113 ixgbevf_free_all_tx_resources(adapter);
3114 ixgbevf_free_all_rx_resources(adapter);
0ac1e8ce 3115 rtnl_unlock();
92915f71
GR		 3116 }
3117
0ac1e8ce 3118 ixgbevf_clear_interrupt_scheme(adapter);
92915f71 3119
0ac1e8ce
AD		 3120#ifdef CONFIG_PM
3121 retval = pci_save_state(pdev);
3122 if (retval)
3123 return retval;
92915f71 3124
0ac1e8ce 3125#endif
92915f71 3126 pci_disable_device(pdev);
0ac1e8ce
AD		 3127
3128 return 0;
3129}
3130
3131#ifdef CONFIG_PM
3132static int ixgbevf_resume(struct pci_dev *pdev)
3133{
3134 struct ixgbevf_adapter *adapter = pci_get_drvdata(pdev);
3135 struct net_device *netdev = adapter->netdev;
3136 u32 err;
3137
3138 pci_set_power_state(pdev, PCI_D0);
3139 pci_restore_state(pdev);
3140 /*
3141 * pci_restore_state clears dev->state_saved so call
3142 * pci_save_state to restore it.
3143 */
3144 pci_save_state(pdev);
3145
3146 err = pci_enable_device_mem(pdev);
3147 if (err) {
3148 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
3149 return err;
3150 }
3151 pci_set_master(pdev);
3152
3153 rtnl_lock();
3154 err = ixgbevf_init_interrupt_scheme(adapter);
3155 rtnl_unlock();
3156 if (err) {
3157 dev_err(&pdev->dev, "Cannot initialize interrupts\n");
3158 return err;
3159 }
3160
3161 ixgbevf_reset(adapter);
3162
3163 if (netif_running(netdev)) {
3164 err = ixgbevf_open(netdev);
3165 if (err)
3166 return err;
3167 }
3168
3169 netif_device_attach(netdev);
3170
3171 return err;
3172}
3173
3174#endif /* CONFIG_PM */
3175static void ixgbevf_shutdown(struct pci_dev *pdev)
3176{
3177 ixgbevf_suspend(pdev, PMSG_SUSPEND);
92915f71
GR		 3178}
3179
4197aa7b
ED		 3180static struct rtnl_link_stats64 *ixgbevf_get_stats(struct net_device *netdev,
3181 struct rtnl_link_stats64 *stats)
3182{
3183 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3184 unsigned int start;
3185 u64 bytes, packets;
3186 const struct ixgbevf_ring *ring;
3187 int i;
3188
3189 ixgbevf_update_stats(adapter);
3190
3191 stats->multicast = adapter->stats.vfmprc - adapter->stats.base_vfmprc;
3192
3193 for (i = 0; i < adapter->num_rx_queues; i++) {
3194 ring = &adapter->rx_ring[i];
3195 do {
3196 start = u64_stats_fetch_begin_bh(&ring->syncp);
3197 bytes = ring->total_bytes;
3198 packets = ring->total_packets;
3199 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
3200 stats->rx_bytes += bytes;
3201 stats->rx_packets += packets;
3202 }
3203
3204 for (i = 0; i < adapter->num_tx_queues; i++) {
3205 ring = &adapter->tx_ring[i];
3206 do {
3207 start = u64_stats_fetch_begin_bh(&ring->syncp);
3208 bytes = ring->total_bytes;
3209 packets = ring->total_packets;
3210 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
3211 stats->tx_bytes += bytes;
3212 stats->tx_packets += packets;
3213 }
3214
3215 return stats;
3216}
3217
0ac1e8ce 3218static const struct net_device_ops ixgbevf_netdev_ops = {
c12db769
SH		 3219 .ndo_open = ixgbevf_open,
3220 .ndo_stop = ixgbevf_close,
3221 .ndo_start_xmit = ixgbevf_xmit_frame,
3222 .ndo_set_rx_mode = ixgbevf_set_rx_mode,
4197aa7b 3223 .ndo_get_stats64 = ixgbevf_get_stats,
92915f71 3224 .ndo_validate_addr = eth_validate_addr,
c12db769
SH		 3225 .ndo_set_mac_address = ixgbevf_set_mac,
3226 .ndo_change_mtu = ixgbevf_change_mtu,
3227 .ndo_tx_timeout = ixgbevf_tx_timeout,
c12db769
SH		 3228 .ndo_vlan_rx_add_vid = ixgbevf_vlan_rx_add_vid,
3229 .ndo_vlan_rx_kill_vid = ixgbevf_vlan_rx_kill_vid,
92915f71 3230};
92915f71
GR		 3231
3232static void ixgbevf_assign_netdev_ops(struct net_device *dev)
3233{
0ac1e8ce 3234 dev->netdev_ops = &ixgbevf_netdev_ops;
92915f71
GR		 3235 ixgbevf_set_ethtool_ops(dev);
3236 dev->watchdog_timeo = 5 * HZ;
3237}
3238
3239/**
3240 * ixgbevf_probe - Device Initialization Routine
3241 * @pdev: PCI device information struct
3242 * @ent: entry in ixgbevf_pci_tbl
3243 *
3244 * Returns 0 on success, negative on failure
3245 *
3246 * ixgbevf_probe initializes an adapter identified by a pci_dev structure.
3247 * The OS initialization, configuring of the adapter private structure,
3248 * and a hardware reset occur.
3249 **/
3250static int __devinit ixgbevf_probe(struct pci_dev *pdev,
3251 const struct pci_device_id *ent)
3252{
3253 struct net_device *netdev;
3254 struct ixgbevf_adapter *adapter = NULL;
3255 struct ixgbe_hw *hw = NULL;
3256 const struct ixgbevf_info *ii = ixgbevf_info_tbl[ent->driver_data];
3257 static int cards_found;
3258 int err, pci_using_dac;
3259
3260 err = pci_enable_device(pdev);
3261 if (err)
3262 return err;
3263
2a1f8794
NN		 3264 if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) &&
3265 !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
92915f71
GR		 3266 pci_using_dac = 1;
3267 } else {
2a1f8794 3268 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
92915f71 3269 if (err) {
2a1f8794
NN		 3270 err = dma_set_coherent_mask(&pdev->dev,
3271 DMA_BIT_MASK(32));
92915f71
GR		 3272 if (err) {
3273 dev_err(&pdev->dev, "No usable DMA "
3274 "configuration, aborting\n");
3275 goto err_dma;
3276 }
3277 }
3278 pci_using_dac = 0;
3279 }
3280
3281 err = pci_request_regions(pdev, ixgbevf_driver_name);
3282 if (err) {
3283 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
3284 goto err_pci_reg;
3285 }
3286
3287 pci_set_master(pdev);
3288
92915f71
GR		 3289 netdev = alloc_etherdev_mq(sizeof(struct ixgbevf_adapter),
3290 MAX_TX_QUEUES);
92915f71
GR		 3291 if (!netdev) {
3292 err = -ENOMEM;
3293 goto err_alloc_etherdev;
3294 }
3295
3296 SET_NETDEV_DEV(netdev, &pdev->dev);
3297
3298 pci_set_drvdata(pdev, netdev);
3299 adapter = netdev_priv(netdev);
3300
3301 adapter->netdev = netdev;
3302 adapter->pdev = pdev;
3303 hw = &adapter->hw;
3304 hw->back = adapter;
b3f4d599 3305 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
92915f71
GR		 3306
3307 /*
3308 * call save state here in standalone driver because it relies on
3309 * adapter struct to exist, and needs to call netdev_priv
3310 */
3311 pci_save_state(pdev);
3312
3313 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
3314 pci_resource_len(pdev, 0));
3315 if (!hw->hw_addr) {
3316 err = -EIO;
3317 goto err_ioremap;
3318 }
3319
3320 ixgbevf_assign_netdev_ops(netdev);
3321
3322 adapter->bd_number = cards_found;
3323
3324 /* Setup hw api */
3325 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
3326 hw->mac.type = ii->mac;
3327
3328 memcpy(&hw->mbx.ops, &ixgbevf_mbx_ops,
f416dfc0 3329 sizeof(struct ixgbe_mbx_operations));
92915f71 3330
92915f71
GR		 3331 /* setup the private structure */
3332 err = ixgbevf_sw_init(adapter);
1a0d6ae5
DK		 3333 if (err)
3334 goto err_sw_init;
3335
3336 /* The HW MAC address was set and/or determined in sw_init */
3337 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
3338
3339 if (!is_valid_ether_addr(netdev->dev_addr)) {
3340 pr_err("invalid MAC address\n");
3341 err = -EIO;
3342 goto err_sw_init;
3343 }
92915f71 3344
471a76de 3345 netdev->hw_features = NETIF_F_SG |
92915f71 3346 NETIF_F_IP_CSUM |
471a76de
MM		 3347 NETIF_F_IPV6_CSUM |
3348 NETIF_F_TSO |
3349 NETIF_F_TSO6 |
3350 NETIF_F_RXCSUM;
3351
3352 netdev->features = netdev->hw_features |
92915f71
GR		 3353 NETIF_F_HW_VLAN_TX |
3354 NETIF_F_HW_VLAN_RX |
3355 NETIF_F_HW_VLAN_FILTER;
3356
92915f71
GR		 3357 netdev->vlan_features |= NETIF_F_TSO;
3358 netdev->vlan_features |= NETIF_F_TSO6;
3359 netdev->vlan_features |= NETIF_F_IP_CSUM;
3bfacf96 3360 netdev->vlan_features |= NETIF_F_IPV6_CSUM;
92915f71
GR		 3361 netdev->vlan_features |= NETIF_F_SG;
3362
3363 if (pci_using_dac)
3364 netdev->features |= NETIF_F_HIGHDMA;
3365
01789349
JP		 3366 netdev->priv_flags |= IFF_UNICAST_FLT;
3367
92915f71 3368 init_timer(&adapter->watchdog_timer);
c061b18d 3369 adapter->watchdog_timer.function = ixgbevf_watchdog;
92915f71
GR		 3370 adapter->watchdog_timer.data = (unsigned long)adapter;
3371
3372 INIT_WORK(&adapter->reset_task, ixgbevf_reset_task);
3373 INIT_WORK(&adapter->watchdog_task, ixgbevf_watchdog_task);
3374
3375 err = ixgbevf_init_interrupt_scheme(adapter);
3376 if (err)
3377 goto err_sw_init;
3378
92915f71
GR		 3379 strcpy(netdev->name, "eth%d");
3380
3381 err = register_netdev(netdev);
3382 if (err)
3383 goto err_register;
3384
5d426ad1
GR		 3385 netif_carrier_off(netdev);
3386
33bd9f60
GR		 3387 ixgbevf_init_last_counter_stats(adapter);
3388
92915f71 3389 /* print the MAC address */
f794e7ef 3390 hw_dbg(hw, "%pM\n", netdev->dev_addr);
92915f71
GR		 3391
3392 hw_dbg(hw, "MAC: %d\n", hw->mac.type);
3393
92915f71
GR		 3394 hw_dbg(hw, "Intel(R) 82599 Virtual Function\n");
3395 cards_found++;
3396 return 0;
3397
3398err_register:
0ac1e8ce 3399 ixgbevf_clear_interrupt_scheme(adapter);
92915f71
GR		 3400err_sw_init:
3401 ixgbevf_reset_interrupt_capability(adapter);
3402 iounmap(hw->hw_addr);
3403err_ioremap:
3404 free_netdev(netdev);
3405err_alloc_etherdev:
3406 pci_release_regions(pdev);
3407err_pci_reg:
3408err_dma:
3409 pci_disable_device(pdev);
3410 return err;
3411}
3412
3413/**
3414 * ixgbevf_remove - Device Removal Routine
3415 * @pdev: PCI device information struct
3416 *
3417 * ixgbevf_remove is called by the PCI subsystem to alert the driver
3418 * that it should release a PCI device. The could be caused by a
3419 * Hot-Plug event, or because the driver is going to be removed from
3420 * memory.
3421 **/
3422static void __devexit ixgbevf_remove(struct pci_dev *pdev)
3423{
3424 struct net_device *netdev = pci_get_drvdata(pdev);
3425 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3426
3427 set_bit(__IXGBEVF_DOWN, &adapter->state);
3428
3429 del_timer_sync(&adapter->watchdog_timer);
3430
23f333a2 3431 cancel_work_sync(&adapter->reset_task);
92915f71
GR		 3432 cancel_work_sync(&adapter->watchdog_task);
3433
fd13a9ab 3434 if (netdev->reg_state == NETREG_REGISTERED)
92915f71 3435 unregister_netdev(netdev);
92915f71 3436
0ac1e8ce 3437 ixgbevf_clear_interrupt_scheme(adapter);
92915f71
GR		 3438 ixgbevf_reset_interrupt_capability(adapter);
3439
3440 iounmap(adapter->hw.hw_addr);
3441 pci_release_regions(pdev);
3442
3443 hw_dbg(&adapter->hw, "Remove complete\n");
3444
3445 kfree(adapter->tx_ring);
3446 kfree(adapter->rx_ring);
3447
3448 free_netdev(netdev);
3449
3450 pci_disable_device(pdev);
3451}
3452
9f19f31d
AD		 3453/**
3454 * ixgbevf_io_error_detected - called when PCI error is detected
3455 * @pdev: Pointer to PCI device
3456 * @state: The current pci connection state
3457 *
3458 * This function is called after a PCI bus error affecting
3459 * this device has been detected.
3460 */
3461static pci_ers_result_t ixgbevf_io_error_detected(struct pci_dev *pdev,
3462 pci_channel_state_t state)
3463{
3464 struct net_device *netdev = pci_get_drvdata(pdev);
3465 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3466
3467 netif_device_detach(netdev);
3468
3469 if (state == pci_channel_io_perm_failure)
3470 return PCI_ERS_RESULT_DISCONNECT;
3471
3472 if (netif_running(netdev))
3473 ixgbevf_down(adapter);
3474
3475 pci_disable_device(pdev);
3476
3477 /* Request a slot slot reset. */
3478 return PCI_ERS_RESULT_NEED_RESET;
3479}
3480
3481/**
3482 * ixgbevf_io_slot_reset - called after the pci bus has been reset.
3483 * @pdev: Pointer to PCI device
3484 *
3485 * Restart the card from scratch, as if from a cold-boot. Implementation
3486 * resembles the first-half of the ixgbevf_resume routine.
3487 */
3488static pci_ers_result_t ixgbevf_io_slot_reset(struct pci_dev *pdev)
3489{
3490 struct net_device *netdev = pci_get_drvdata(pdev);
3491 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3492
3493 if (pci_enable_device_mem(pdev)) {
3494 dev_err(&pdev->dev,
3495 "Cannot re-enable PCI device after reset.\n");
3496 return PCI_ERS_RESULT_DISCONNECT;
3497 }
3498
3499 pci_set_master(pdev);
3500
3501 ixgbevf_reset(adapter);
3502
3503 return PCI_ERS_RESULT_RECOVERED;
3504}
3505
3506/**
3507 * ixgbevf_io_resume - called when traffic can start flowing again.
3508 * @pdev: Pointer to PCI device
3509 *
3510 * This callback is called when the error recovery driver tells us that
3511 * its OK to resume normal operation. Implementation resembles the
3512 * second-half of the ixgbevf_resume routine.
3513 */
3514static void ixgbevf_io_resume(struct pci_dev *pdev)
3515{
3516 struct net_device *netdev = pci_get_drvdata(pdev);
3517 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3518
3519 if (netif_running(netdev))
3520 ixgbevf_up(adapter);
3521
3522 netif_device_attach(netdev);
3523}
3524
3525/* PCI Error Recovery (ERS) */
3646f0e5 3526static const struct pci_error_handlers ixgbevf_err_handler = {
9f19f31d
AD		 3527 .error_detected = ixgbevf_io_error_detected,
3528 .slot_reset = ixgbevf_io_slot_reset,
3529 .resume = ixgbevf_io_resume,
3530};
3531
92915f71
GR		 3532static struct pci_driver ixgbevf_driver = {
3533 .name = ixgbevf_driver_name,
3534 .id_table = ixgbevf_pci_tbl,
3535 .probe = ixgbevf_probe,
3536 .remove = __devexit_p(ixgbevf_remove),
0ac1e8ce
AD		 3537#ifdef CONFIG_PM
3538 /* Power Management Hooks */
3539 .suspend = ixgbevf_suspend,
3540 .resume = ixgbevf_resume,
3541#endif
92915f71 3542 .shutdown = ixgbevf_shutdown,
9f19f31d 3543 .err_handler = &ixgbevf_err_handler
92915f71
GR		 3544};
3545
3546/**
65d676c8 3547 * ixgbevf_init_module - Driver Registration Routine
92915f71 3548 *
65d676c8 3549 * ixgbevf_init_module is the first routine called when the driver is
92915f71
GR		 3550 * loaded. All it does is register with the PCI subsystem.
3551 **/
3552static int __init ixgbevf_init_module(void)
3553{
3554 int ret;
dbd9636e
JK		 3555 pr_info("%s - version %s\n", ixgbevf_driver_string,
3556 ixgbevf_driver_version);
92915f71 3557
dbd9636e 3558 pr_info("%s\n", ixgbevf_copyright);
92915f71
GR		 3559
3560 ret = pci_register_driver(&ixgbevf_driver);
3561 return ret;
3562}
3563
3564module_init(ixgbevf_init_module);
3565
3566/**
65d676c8 3567 * ixgbevf_exit_module - Driver Exit Cleanup Routine
92915f71 3568 *
65d676c8 3569 * ixgbevf_exit_module is called just before the driver is removed
92915f71
GR		 3570 * from memory.
3571 **/
3572static void __exit ixgbevf_exit_module(void)
3573{
3574 pci_unregister_driver(&ixgbevf_driver);
3575}
3576
3577#ifdef DEBUG
3578/**
65d676c8 3579 * ixgbevf_get_hw_dev_name - return device name string
92915f71
GR		 3580 * used by hardware layer to print debugging information
3581 **/
3582char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw)
3583{
3584 struct ixgbevf_adapter *adapter = hw->back;
3585 return adapter->netdev->name;
3586}
3587
3588#endif
3589module_exit(ixgbevf_exit_module);
3590
3591/* ixgbevf_main.c */
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