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ixgbe: resolve shift of negative value warning
[mirror_ubuntu-artful-kernel.git] / drivers / net / ethernet / intel / ixgbevf / ixgbevf_main.c
CommitLineData
92915f71
GR		 1/*******************************************************************************
2
3 Intel 82599 Virtual Function driver
dec0d8e4 4 Copyright(c) 1999 - 2015 Intel Corporation.
92915f71
GR		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
dec0d8e4 16 this program; if not, see <http://www.gnu.org/licenses/>.
92915f71
GR		 17
18 The full GNU General Public License is included in this distribution in
19 the file called "COPYING".
20
21 Contact Information:
22 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24
25*******************************************************************************/
26
92915f71
GR		 27/******************************************************************************
28 Copyright (c)2006 - 2007 Myricom, Inc. for some LRO specific code
29******************************************************************************/
dbd9636e
JK		 30
31#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
32
92915f71 33#include <linux/types.h>
dadcd65f 34#include <linux/bitops.h>
92915f71
GR		 35#include <linux/module.h>
36#include <linux/pci.h>
37#include <linux/netdevice.h>
38#include <linux/vmalloc.h>
39#include <linux/string.h>
40#include <linux/in.h>
41#include <linux/ip.h>
42#include <linux/tcp.h>
70a10e25 43#include <linux/sctp.h>
92915f71 44#include <linux/ipv6.h>
5a0e3ad6 45#include <linux/slab.h>
92915f71
GR		 46#include <net/checksum.h>
47#include <net/ip6_checksum.h>
48#include <linux/ethtool.h>
01789349 49#include <linux/if.h>
92915f71 50#include <linux/if_vlan.h>
70c71606 51#include <linux/prefetch.h>
92915f71
GR		 52
53#include "ixgbevf.h"
54
3d8fe98f 55const char ixgbevf_driver_name[] = "ixgbevf";
92915f71 56static const char ixgbevf_driver_string[] =
422e05d1 57 "Intel(R) 10 Gigabit PCI Express Virtual Function Network Driver";
92915f71 58
86f359f6 59#define DRV_VERSION "2.12.1-k"
92915f71 60const char ixgbevf_driver_version[] = DRV_VERSION;
66c87bd5 61static char ixgbevf_copyright[] =
40a13e24 62 "Copyright (c) 2009 - 2015 Intel Corporation.";
92915f71
GR		 63
64static const struct ixgbevf_info *ixgbevf_info_tbl[] = {
2316aa2a
GR		 65 [board_82599_vf] = &ixgbevf_82599_vf_info,
66 [board_X540_vf] = &ixgbevf_X540_vf_info,
47068b0d
ET		 67 [board_X550_vf] = &ixgbevf_X550_vf_info,
68 [board_X550EM_x_vf] = &ixgbevf_X550EM_x_vf_info,
92915f71
GR		 69};
70
71/* ixgbevf_pci_tbl - PCI Device ID Table
72 *
73 * Wildcard entries (PCI_ANY_ID) should come last
74 * Last entry must be all 0s
75 *
76 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
77 * Class, Class Mask, private data (not used) }
78 */
9baa3c34 79static const struct pci_device_id ixgbevf_pci_tbl[] = {
39ba22b4
SH		 80 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF), board_82599_vf },
81 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540_VF), board_X540_vf },
47068b0d
ET		 82 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550_VF), board_X550_vf },
83 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_VF), board_X550EM_x_vf },
92915f71
GR		 84 /* required last entry */
85 {0, }
86};
87MODULE_DEVICE_TABLE(pci, ixgbevf_pci_tbl);
88
89MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
b8ce18cd 90MODULE_DESCRIPTION("Intel(R) 10 Gigabit Virtual Function Network Driver");
92915f71
GR		 91MODULE_LICENSE("GPL");
92MODULE_VERSION(DRV_VERSION);
93
b3f4d599 94#define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
95static int debug = -1;
96module_param(debug, int, 0);
97MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
92915f71 98
40a13e24
MR		 99static struct workqueue_struct *ixgbevf_wq;
100
9ac5c5cc
ET		 101static void ixgbevf_service_event_schedule(struct ixgbevf_adapter *adapter)
102{
103 if (!test_bit(__IXGBEVF_DOWN, &adapter->state) &&
104 !test_bit(__IXGBEVF_REMOVING, &adapter->state) &&
105 !test_and_set_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state))
40a13e24 106 queue_work(ixgbevf_wq, &adapter->service_task);
9ac5c5cc
ET		 107}
108
109static void ixgbevf_service_event_complete(struct ixgbevf_adapter *adapter)
110{
111 BUG_ON(!test_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state));
112
113 /* flush memory to make sure state is correct before next watchdog */
114 smp_mb__before_atomic();
115 clear_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state);
116}
117
92915f71 118/* forward decls */
220fe050 119static void ixgbevf_queue_reset_subtask(struct ixgbevf_adapter *adapter);
fa71ae27 120static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector);
56e94095 121static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter);
92915f71 122
dbf8b0d8
MR		 123static void ixgbevf_remove_adapter(struct ixgbe_hw *hw)
124{
125 struct ixgbevf_adapter *adapter = hw->back;
126
127 if (!hw->hw_addr)
128 return;
129 hw->hw_addr = NULL;
130 dev_err(&adapter->pdev->dev, "Adapter removed\n");
9ac5c5cc
ET		 131 if (test_bit(__IXGBEVF_SERVICE_INITED, &adapter->state))
132 ixgbevf_service_event_schedule(adapter);
dbf8b0d8
MR		 133}
134
135static void ixgbevf_check_remove(struct ixgbe_hw *hw, u32 reg)
136{
137 u32 value;
138
139 /* The following check not only optimizes a bit by not
140 * performing a read on the status register when the
141 * register just read was a status register read that
142 * returned IXGBE_FAILED_READ_REG. It also blocks any
143 * potential recursion.
144 */
145 if (reg == IXGBE_VFSTATUS) {
146 ixgbevf_remove_adapter(hw);
147 return;
148 }
32c74949 149 value = ixgbevf_read_reg(hw, IXGBE_VFSTATUS);
dbf8b0d8
MR		 150 if (value == IXGBE_FAILED_READ_REG)
151 ixgbevf_remove_adapter(hw);
152}
153
32c74949 154u32 ixgbevf_read_reg(struct ixgbe_hw *hw, u32 reg)
dbf8b0d8
MR		 155{
156 u8 __iomem *reg_addr = ACCESS_ONCE(hw->hw_addr);
157 u32 value;
158
159 if (IXGBE_REMOVED(reg_addr))
160 return IXGBE_FAILED_READ_REG;
161 value = readl(reg_addr + reg);
162 if (unlikely(value == IXGBE_FAILED_READ_REG))
163 ixgbevf_check_remove(hw, reg);
164 return value;
165}
166
49ce9c2c 167/**
65d676c8 168 * ixgbevf_set_ivar - set IVAR registers - maps interrupt causes to vectors
92915f71
GR		 169 * @adapter: pointer to adapter struct
170 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
171 * @queue: queue to map the corresponding interrupt to
172 * @msix_vector: the vector to map to the corresponding queue
dec0d8e4 173 **/
92915f71
GR		 174static void ixgbevf_set_ivar(struct ixgbevf_adapter *adapter, s8 direction,
175 u8 queue, u8 msix_vector)
176{
177 u32 ivar, index;
178 struct ixgbe_hw *hw = &adapter->hw;
dec0d8e4 179
92915f71
GR		 180 if (direction == -1) {
181 /* other causes */
182 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
183 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC);
184 ivar &= ~0xFF;
185 ivar |= msix_vector;
186 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar);
187 } else {
dec0d8e4 188 /* Tx or Rx causes */
92915f71
GR		 189 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
190 index = ((16 * (queue & 1)) + (8 * direction));
191 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(queue >> 1));
192 ivar &= ~(0xFF << index);
193 ivar |= (msix_vector << index);
194 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(queue >> 1), ivar);
195 }
196}
197
70a10e25 198static void ixgbevf_unmap_and_free_tx_resource(struct ixgbevf_ring *tx_ring,
9bdfefd2
ET		 199 struct ixgbevf_tx_buffer *tx_buffer)
200{
201 if (tx_buffer->skb) {
202 dev_kfree_skb_any(tx_buffer->skb);
203 if (dma_unmap_len(tx_buffer, len))
70a10e25 204 dma_unmap_single(tx_ring->dev,
9bdfefd2
ET		 205 dma_unmap_addr(tx_buffer, dma),
206 dma_unmap_len(tx_buffer, len),
2a1f8794 207 DMA_TO_DEVICE);
9bdfefd2
ET		 208 } else if (dma_unmap_len(tx_buffer, len)) {
209 dma_unmap_page(tx_ring->dev,
210 dma_unmap_addr(tx_buffer, dma),
211 dma_unmap_len(tx_buffer, len),
212 DMA_TO_DEVICE);
92915f71 213 }
9bdfefd2
ET		 214 tx_buffer->next_to_watch = NULL;
215 tx_buffer->skb = NULL;
216 dma_unmap_len_set(tx_buffer, len, 0);
217 /* tx_buffer must be completely set up in the transmit path */
92915f71
GR		 218}
219
e08400b7
ET		 220static u64 ixgbevf_get_tx_completed(struct ixgbevf_ring *ring)
221{
222 return ring->stats.packets;
223}
92915f71 224
e08400b7
ET		 225static u32 ixgbevf_get_tx_pending(struct ixgbevf_ring *ring)
226{
227 struct ixgbevf_adapter *adapter = netdev_priv(ring->netdev);
228 struct ixgbe_hw *hw = &adapter->hw;
92915f71 229
e08400b7
ET		 230 u32 head = IXGBE_READ_REG(hw, IXGBE_VFTDH(ring->reg_idx));
231 u32 tail = IXGBE_READ_REG(hw, IXGBE_VFTDT(ring->reg_idx));
232
233 if (head != tail)
234 return (head < tail) ?
235 tail - head : (tail + ring->count - head);
236
237 return 0;
238}
239
240static inline bool ixgbevf_check_tx_hang(struct ixgbevf_ring *tx_ring)
241{
242 u32 tx_done = ixgbevf_get_tx_completed(tx_ring);
243 u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
244 u32 tx_pending = ixgbevf_get_tx_pending(tx_ring);
245
246 clear_check_for_tx_hang(tx_ring);
247
248 /* Check for a hung queue, but be thorough. This verifies
249 * that a transmit has been completed since the previous
250 * check AND there is at least one packet pending. The
251 * ARMED bit is set to indicate a potential hang.
252 */
253 if ((tx_done_old == tx_done) && tx_pending) {
254 /* make sure it is true for two checks in a row */
255 return test_and_set_bit(__IXGBEVF_HANG_CHECK_ARMED,
256 &tx_ring->state);
257 }
258 /* reset the countdown */
259 clear_bit(__IXGBEVF_HANG_CHECK_ARMED, &tx_ring->state);
260
261 /* update completed stats and continue */
262 tx_ring->tx_stats.tx_done_old = tx_done;
263
264 return false;
265}
266
9ac5c5cc
ET		 267static void ixgbevf_tx_timeout_reset(struct ixgbevf_adapter *adapter)
268{
269 /* Do the reset outside of interrupt context */
270 if (!test_bit(__IXGBEVF_DOWN, &adapter->state)) {
d5dd7c3f 271 set_bit(__IXGBEVF_RESET_REQUESTED, &adapter->state);
9ac5c5cc
ET		 272 ixgbevf_service_event_schedule(adapter);
273 }
274}
275
e08400b7
ET		 276/**
277 * ixgbevf_tx_timeout - Respond to a Tx Hang
278 * @netdev: network interface device structure
279 **/
280static void ixgbevf_tx_timeout(struct net_device *netdev)
281{
282 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
283
9ac5c5cc 284 ixgbevf_tx_timeout_reset(adapter);
e08400b7 285}
92915f71
GR		 286
287/**
288 * ixgbevf_clean_tx_irq - Reclaim resources after transmit completes
fa71ae27 289 * @q_vector: board private structure
92915f71 290 * @tx_ring: tx ring to clean
8220bbc1 291 * @napi_budget: Used to determine if we are in netpoll
92915f71 292 **/
fa71ae27 293static bool ixgbevf_clean_tx_irq(struct ixgbevf_q_vector *q_vector,
8220bbc1 294 struct ixgbevf_ring *tx_ring, int napi_budget)
92915f71 295{
fa71ae27 296 struct ixgbevf_adapter *adapter = q_vector->adapter;
7ad1a093
ET		 297 struct ixgbevf_tx_buffer *tx_buffer;
298 union ixgbe_adv_tx_desc *tx_desc;
92915f71 299 unsigned int total_bytes = 0, total_packets = 0;
7ad1a093
ET		 300 unsigned int budget = tx_ring->count / 2;
301 unsigned int i = tx_ring->next_to_clean;
92915f71 302
10cc1bdd
AD		 303 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
304 return true;
305
7ad1a093
ET		 306 tx_buffer = &tx_ring->tx_buffer_info[i];
307 tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
308 i -= tx_ring->count;
92915f71 309
e757e3e1 310 do {
7ad1a093 311 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
e757e3e1
AD		 312
313 /* if next_to_watch is not set then there is no work pending */
314 if (!eop_desc)
315 break;
316
317 /* prevent any other reads prior to eop_desc */
318 read_barrier_depends();
319
320 /* if DD is not set pending work has not been completed */
321 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
322 break;
323
324 /* clear next_to_watch to prevent false hangs */
7ad1a093 325 tx_buffer->next_to_watch = NULL;
e757e3e1 326
7ad1a093
ET		 327 /* update the statistics for this packet */
328 total_bytes += tx_buffer->bytecount;
329 total_packets += tx_buffer->gso_segs;
92915f71 330
9bdfefd2 331 /* free the skb */
8220bbc1 332 napi_consume_skb(tx_buffer->skb, napi_budget);
9bdfefd2
ET		 333
334 /* unmap skb header data */
335 dma_unmap_single(tx_ring->dev,
336 dma_unmap_addr(tx_buffer, dma),
337 dma_unmap_len(tx_buffer, len),
338 DMA_TO_DEVICE);
339
7ad1a093 340 /* clear tx_buffer data */
9bdfefd2
ET		 341 tx_buffer->skb = NULL;
342 dma_unmap_len_set(tx_buffer, len, 0);
92915f71 343
7ad1a093
ET		 344 /* unmap remaining buffers */
345 while (tx_desc != eop_desc) {
7ad1a093
ET		 346 tx_buffer++;
347 tx_desc++;
92915f71 348 i++;
7ad1a093
ET		 349 if (unlikely(!i)) {
350 i -= tx_ring->count;
351 tx_buffer = tx_ring->tx_buffer_info;
352 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
353 }
e757e3e1 354
9bdfefd2
ET		 355 /* unmap any remaining paged data */
356 if (dma_unmap_len(tx_buffer, len)) {
357 dma_unmap_page(tx_ring->dev,
358 dma_unmap_addr(tx_buffer, dma),
359 dma_unmap_len(tx_buffer, len),
360 DMA_TO_DEVICE);
361 dma_unmap_len_set(tx_buffer, len, 0);
362 }
92915f71
GR		 363 }
364
7ad1a093
ET		 365 /* move us one more past the eop_desc for start of next pkt */
366 tx_buffer++;
367 tx_desc++;
368 i++;
369 if (unlikely(!i)) {
370 i -= tx_ring->count;
371 tx_buffer = tx_ring->tx_buffer_info;
372 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
373 }
374
375 /* issue prefetch for next Tx descriptor */
376 prefetch(tx_desc);
377
378 /* update budget accounting */
379 budget--;
380 } while (likely(budget));
381
382 i += tx_ring->count;
92915f71 383 tx_ring->next_to_clean = i;
7ad1a093
ET		 384 u64_stats_update_begin(&tx_ring->syncp);
385 tx_ring->stats.bytes += total_bytes;
386 tx_ring->stats.packets += total_packets;
387 u64_stats_update_end(&tx_ring->syncp);
388 q_vector->tx.total_bytes += total_bytes;
389 q_vector->tx.total_packets += total_packets;
92915f71 390
e08400b7
ET		 391 if (check_for_tx_hang(tx_ring) && ixgbevf_check_tx_hang(tx_ring)) {
392 struct ixgbe_hw *hw = &adapter->hw;
393 union ixgbe_adv_tx_desc *eop_desc;
394
395 eop_desc = tx_ring->tx_buffer_info[i].next_to_watch;
396
397 pr_err("Detected Tx Unit Hang\n"
398 " Tx Queue <%d>\n"
399 " TDH, TDT <%x>, <%x>\n"
400 " next_to_use <%x>\n"
401 " next_to_clean <%x>\n"
402 "tx_buffer_info[next_to_clean]\n"
403 " next_to_watch <%p>\n"
404 " eop_desc->wb.status <%x>\n"
405 " time_stamp <%lx>\n"
406 " jiffies <%lx>\n",
407 tx_ring->queue_index,
408 IXGBE_READ_REG(hw, IXGBE_VFTDH(tx_ring->reg_idx)),
409 IXGBE_READ_REG(hw, IXGBE_VFTDT(tx_ring->reg_idx)),
410 tx_ring->next_to_use, i,
411 eop_desc, (eop_desc ? eop_desc->wb.status : 0),
412 tx_ring->tx_buffer_info[i].time_stamp, jiffies);
413
414 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
415
416 /* schedule immediate reset if we believe we hung */
9ac5c5cc 417 ixgbevf_tx_timeout_reset(adapter);
e08400b7
ET		 418
419 return true;
420 }
421
92915f71 422#define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
7ad1a093 423 if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
f880d07b 424 (ixgbevf_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
92915f71
GR		 425 /* Make sure that anybody stopping the queue after this
426 * sees the new next_to_clean.
427 */
428 smp_mb();
7ad1a093 429
fb40195c
AD		 430 if (__netif_subqueue_stopped(tx_ring->netdev,
431 tx_ring->queue_index) &&
92915f71 432 !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
fb40195c
AD		 433 netif_wake_subqueue(tx_ring->netdev,
434 tx_ring->queue_index);
7ad1a093 435 ++tx_ring->tx_stats.restart_queue;
92915f71 436 }
92915f71
GR		 437 }
438
7ad1a093 439 return !!budget;
92915f71
GR		 440}
441
08681618
JK		 442/**
443 * ixgbevf_rx_skb - Helper function to determine proper Rx method
444 * @q_vector: structure containing interrupt and ring information
445 * @skb: packet to send up
08681618
JK		 446 **/
447static void ixgbevf_rx_skb(struct ixgbevf_q_vector *q_vector,
dff80520 448 struct sk_buff *skb)
08681618 449{
c777cdfa
JK		 450#ifdef CONFIG_NET_RX_BUSY_POLL
451 skb_mark_napi_id(skb, &q_vector->napi);
452
453 if (ixgbevf_qv_busy_polling(q_vector)) {
454 netif_receive_skb(skb);
455 /* exit early if we busy polled */
456 return;
457 }
458#endif /* CONFIG_NET_RX_BUSY_POLL */
688ff32d
ET		 459
460 napi_gro_receive(&q_vector->napi, skb);
08681618
JK		 461}
462
1e1429d6
FD		 463#define IXGBE_RSS_L4_TYPES_MASK \
464 ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
465 (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
466 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
467 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
468
469static inline void ixgbevf_rx_hash(struct ixgbevf_ring *ring,
470 union ixgbe_adv_rx_desc *rx_desc,
471 struct sk_buff *skb)
472{
473 u16 rss_type;
474
475 if (!(ring->netdev->features & NETIF_F_RXHASH))
476 return;
477
478 rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
479 IXGBE_RXDADV_RSSTYPE_MASK;
480
481 if (!rss_type)
482 return;
483
484 skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
485 (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
486 PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
487}
488
dec0d8e4
JK		 489/**
490 * ixgbevf_rx_checksum - indicate in skb if hw indicated a good cksum
ec62fe26
ET		 491 * @ring: structure containig ring specific data
492 * @rx_desc: current Rx descriptor being processed
92915f71 493 * @skb: skb currently being received and modified
dec0d8e4 494 **/
55fb277c 495static inline void ixgbevf_rx_checksum(struct ixgbevf_ring *ring,
ec62fe26
ET		 496 union ixgbe_adv_rx_desc *rx_desc,
497 struct sk_buff *skb)
92915f71 498{
bc8acf2c 499 skb_checksum_none_assert(skb);
92915f71
GR		 500
501 /* Rx csum disabled */
fb40195c 502 if (!(ring->netdev->features & NETIF_F_RXCSUM))
92915f71
GR		 503 return;
504
505 /* if IP and error */
ec62fe26
ET		 506 if (ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
507 ixgbevf_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
095e2617 508 ring->rx_stats.csum_err++;
92915f71
GR		 509 return;
510 }
511
ec62fe26 512 if (!ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
92915f71
GR		 513 return;
514
ec62fe26 515 if (ixgbevf_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
095e2617 516 ring->rx_stats.csum_err++;
92915f71
GR		 517 return;
518 }
519
520 /* It must be a TCP or UDP packet with a valid checksum */
521 skb->ip_summed = CHECKSUM_UNNECESSARY;
92915f71
GR		 522}
523
dec0d8e4
JK		 524/**
525 * ixgbevf_process_skb_fields - Populate skb header fields from Rx descriptor
dff80520
ET		 526 * @rx_ring: rx descriptor ring packet is being transacted on
527 * @rx_desc: pointer to the EOP Rx descriptor
528 * @skb: pointer to current skb being populated
529 *
530 * This function checks the ring, descriptor, and packet information in
531 * order to populate the checksum, VLAN, protocol, and other fields within
532 * the skb.
dec0d8e4 533 **/
dff80520
ET		 534static void ixgbevf_process_skb_fields(struct ixgbevf_ring *rx_ring,
535 union ixgbe_adv_rx_desc *rx_desc,
536 struct sk_buff *skb)
537{
1e1429d6 538 ixgbevf_rx_hash(rx_ring, rx_desc, skb);
dff80520
ET		 539 ixgbevf_rx_checksum(rx_ring, rx_desc, skb);
540
541 if (ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
542 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
543 unsigned long *active_vlans = netdev_priv(rx_ring->netdev);
544
545 if (test_bit(vid & VLAN_VID_MASK, active_vlans))
546 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
547 }
548
549 skb->protocol = eth_type_trans(skb, rx_ring->netdev);
550}
551
4b95fe3d
ET		 552/**
553 * ixgbevf_is_non_eop - process handling of non-EOP buffers
554 * @rx_ring: Rx ring being processed
555 * @rx_desc: Rx descriptor for current buffer
556 * @skb: current socket buffer containing buffer in progress
557 *
558 * This function updates next to clean. If the buffer is an EOP buffer
559 * this function exits returning false, otherwise it will place the
560 * sk_buff in the next buffer to be chained and return true indicating
561 * that this is in fact a non-EOP buffer.
562 **/
563static bool ixgbevf_is_non_eop(struct ixgbevf_ring *rx_ring,
bad17234 564 union ixgbe_adv_rx_desc *rx_desc)
4b95fe3d
ET		 565{
566 u32 ntc = rx_ring->next_to_clean + 1;
567
568 /* fetch, update, and store next to clean */
569 ntc = (ntc < rx_ring->count) ? ntc : 0;
570 rx_ring->next_to_clean = ntc;
571
572 prefetch(IXGBEVF_RX_DESC(rx_ring, ntc));
573
574 if (likely(ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
575 return false;
576
577 return true;
578}
579
bad17234
ET		 580static bool ixgbevf_alloc_mapped_page(struct ixgbevf_ring *rx_ring,
581 struct ixgbevf_rx_buffer *bi)
bafa578f 582{
bad17234 583 struct page *page = bi->page;
bafa578f
ET		 584 dma_addr_t dma = bi->dma;
585
bad17234
ET		 586 /* since we are recycling buffers we should seldom need to alloc */
587 if (likely(page))
bafa578f
ET		 588 return true;
589
bad17234
ET		 590 /* alloc new page for storage */
591 page = dev_alloc_page();
592 if (unlikely(!page)) {
593 rx_ring->rx_stats.alloc_rx_page_failed++;
bafa578f
ET		 594 return false;
595 }
596
bad17234
ET		 597 /* map page for use */
598 dma = dma_map_page(rx_ring->dev, page, 0,
599 PAGE_SIZE, DMA_FROM_DEVICE);
bafa578f
ET		 600
601 /* if mapping failed free memory back to system since
602 * there isn't much point in holding memory we can't use
603 */
604 if (dma_mapping_error(rx_ring->dev, dma)) {
bad17234 605 __free_page(page);
bafa578f
ET		 606
607 rx_ring->rx_stats.alloc_rx_buff_failed++;
608 return false;
609 }
610
bafa578f 611 bi->dma = dma;
bad17234
ET		 612 bi->page = page;
613 bi->page_offset = 0;
bafa578f
ET		 614
615 return true;
616}
617
92915f71
GR		 618/**
619 * ixgbevf_alloc_rx_buffers - Replace used receive buffers; packet split
095e2617 620 * @rx_ring: rx descriptor ring (for a specific queue) to setup buffers on
bafa578f 621 * @cleaned_count: number of buffers to replace
92915f71 622 **/
095e2617 623static void ixgbevf_alloc_rx_buffers(struct ixgbevf_ring *rx_ring,
bafa578f 624 u16 cleaned_count)
92915f71 625{
92915f71
GR		 626 union ixgbe_adv_rx_desc *rx_desc;
627 struct ixgbevf_rx_buffer *bi;
fb40195c 628 unsigned int i = rx_ring->next_to_use;
92915f71 629
bafa578f
ET		 630 /* nothing to do or no valid netdev defined */
631 if (!cleaned_count || !rx_ring->netdev)
632 return;
b9dd245b 633
bafa578f
ET		 634 rx_desc = IXGBEVF_RX_DESC(rx_ring, i);
635 bi = &rx_ring->rx_buffer_info[i];
636 i -= rx_ring->count;
05d063aa 637
bafa578f 638 do {
bad17234 639 if (!ixgbevf_alloc_mapped_page(rx_ring, bi))
bafa578f 640 break;
b9dd245b 641
bafa578f
ET		 642 /* Refresh the desc even if pkt_addr didn't change
643 * because each write-back erases this info.
644 */
bad17234 645 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
92915f71 646
bafa578f
ET		 647 rx_desc++;
648 bi++;
92915f71 649 i++;
bafa578f
ET		 650 if (unlikely(!i)) {
651 rx_desc = IXGBEVF_RX_DESC(rx_ring, 0);
652 bi = rx_ring->rx_buffer_info;
653 i -= rx_ring->count;
654 }
655
656 /* clear the hdr_addr for the next_to_use descriptor */
657 rx_desc->read.hdr_addr = 0;
658
659 cleaned_count--;
660 } while (cleaned_count);
661
662 i += rx_ring->count;
92915f71 663
bafa578f
ET		 664 if (rx_ring->next_to_use != i) {
665 /* record the next descriptor to use */
666 rx_ring->next_to_use = i;
667
bad17234
ET		 668 /* update next to alloc since we have filled the ring */
669 rx_ring->next_to_alloc = i;
670
bafa578f
ET		 671 /* Force memory writes to complete before letting h/w
672 * know there are new descriptors to fetch. (Only
673 * applicable for weak-ordered memory model archs,
674 * such as IA-64).
675 */
676 wmb();
677 ixgbevf_write_tail(rx_ring, i);
678 }
92915f71
GR		 679}
680
dec0d8e4
JK		 681/**
682 * ixgbevf_cleanup_headers - Correct corrupted or empty headers
bad17234
ET		 683 * @rx_ring: rx descriptor ring packet is being transacted on
684 * @rx_desc: pointer to the EOP Rx descriptor
685 * @skb: pointer to current skb being fixed
686 *
687 * Check for corrupted packet headers caused by senders on the local L2
688 * embedded NIC switch not setting up their Tx Descriptors right. These
689 * should be very rare.
690 *
691 * Also address the case where we are pulling data in on pages only
692 * and as such no data is present in the skb header.
693 *
694 * In addition if skb is not at least 60 bytes we need to pad it so that
695 * it is large enough to qualify as a valid Ethernet frame.
696 *
697 * Returns true if an error was encountered and skb was freed.
dec0d8e4 698 **/
bad17234
ET		 699static bool ixgbevf_cleanup_headers(struct ixgbevf_ring *rx_ring,
700 union ixgbe_adv_rx_desc *rx_desc,
701 struct sk_buff *skb)
702{
703 /* verify that the packet does not have any known errors */
704 if (unlikely(ixgbevf_test_staterr(rx_desc,
705 IXGBE_RXDADV_ERR_FRAME_ERR_MASK))) {
706 struct net_device *netdev = rx_ring->netdev;
707
708 if (!(netdev->features & NETIF_F_RXALL)) {
709 dev_kfree_skb_any(skb);
710 return true;
711 }
712 }
713
a94d9e22
AD		 714 /* if eth_skb_pad returns an error the skb was freed */
715 if (eth_skb_pad(skb))
716 return true;
bad17234
ET		 717
718 return false;
719}
720
dec0d8e4
JK		 721/**
722 * ixgbevf_reuse_rx_page - page flip buffer and store it back on the ring
bad17234
ET		 723 * @rx_ring: rx descriptor ring to store buffers on
724 * @old_buff: donor buffer to have page reused
725 *
726 * Synchronizes page for reuse by the adapter
dec0d8e4 727 **/
bad17234
ET		 728static void ixgbevf_reuse_rx_page(struct ixgbevf_ring *rx_ring,
729 struct ixgbevf_rx_buffer *old_buff)
730{
731 struct ixgbevf_rx_buffer *new_buff;
732 u16 nta = rx_ring->next_to_alloc;
733
734 new_buff = &rx_ring->rx_buffer_info[nta];
735
736 /* update, and store next to alloc */
737 nta++;
738 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
739
740 /* transfer page from old buffer to new buffer */
741 new_buff->page = old_buff->page;
742 new_buff->dma = old_buff->dma;
743 new_buff->page_offset = old_buff->page_offset;
744
745 /* sync the buffer for use by the device */
746 dma_sync_single_range_for_device(rx_ring->dev, new_buff->dma,
747 new_buff->page_offset,
748 IXGBEVF_RX_BUFSZ,
749 DMA_FROM_DEVICE);
750}
751
752static inline bool ixgbevf_page_is_reserved(struct page *page)
753{
2f064f34 754 return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
bad17234
ET		 755}
756
dec0d8e4
JK		 757/**
758 * ixgbevf_add_rx_frag - Add contents of Rx buffer to sk_buff
bad17234
ET		 759 * @rx_ring: rx descriptor ring to transact packets on
760 * @rx_buffer: buffer containing page to add
761 * @rx_desc: descriptor containing length of buffer written by hardware
762 * @skb: sk_buff to place the data into
763 *
764 * This function will add the data contained in rx_buffer->page to the skb.
765 * This is done either through a direct copy if the data in the buffer is
766 * less than the skb header size, otherwise it will just attach the page as
767 * a frag to the skb.
768 *
769 * The function will then update the page offset if necessary and return
770 * true if the buffer can be reused by the adapter.
dec0d8e4 771 **/
bad17234
ET		 772static bool ixgbevf_add_rx_frag(struct ixgbevf_ring *rx_ring,
773 struct ixgbevf_rx_buffer *rx_buffer,
774 union ixgbe_adv_rx_desc *rx_desc,
775 struct sk_buff *skb)
776{
777 struct page *page = rx_buffer->page;
5505bdb5 778 unsigned char *va = page_address(page) + rx_buffer->page_offset;
bad17234
ET		 779 unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
780#if (PAGE_SIZE < 8192)
781 unsigned int truesize = IXGBEVF_RX_BUFSZ;
782#else
783 unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
784#endif
5505bdb5 785 unsigned int pull_len;
bad17234 786
5505bdb5
AD		 787 if (unlikely(skb_is_nonlinear(skb)))
788 goto add_tail_frag;
bad17234 789
5505bdb5 790 if (likely(size <= IXGBEVF_RX_HDR_SIZE)) {
bad17234
ET		 791 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
792
793 /* page is not reserved, we can reuse buffer as is */
794 if (likely(!ixgbevf_page_is_reserved(page)))
795 return true;
796
797 /* this page cannot be reused so discard it */
798 put_page(page);
799 return false;
800 }
801
5505bdb5
AD		 802 /* we need the header to contain the greater of either ETH_HLEN or
803 * 60 bytes if the skb->len is less than 60 for skb_pad.
804 */
805 pull_len = eth_get_headlen(va, IXGBEVF_RX_HDR_SIZE);
806
807 /* align pull length to size of long to optimize memcpy performance */
808 memcpy(__skb_put(skb, pull_len), va, ALIGN(pull_len, sizeof(long)));
809
810 /* update all of the pointers */
811 va += pull_len;
812 size -= pull_len;
813
814add_tail_frag:
bad17234 815 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
5505bdb5 816 (unsigned long)va & ~PAGE_MASK, size, truesize);
bad17234
ET		 817
818 /* avoid re-using remote pages */
819 if (unlikely(ixgbevf_page_is_reserved(page)))
820 return false;
821
822#if (PAGE_SIZE < 8192)
823 /* if we are only owner of page we can reuse it */
824 if (unlikely(page_count(page) != 1))
825 return false;
826
827 /* flip page offset to other buffer */
828 rx_buffer->page_offset ^= IXGBEVF_RX_BUFSZ;
829
830#else
831 /* move offset up to the next cache line */
832 rx_buffer->page_offset += truesize;
833
834 if (rx_buffer->page_offset > (PAGE_SIZE - IXGBEVF_RX_BUFSZ))
835 return false;
836
837#endif
838 /* Even if we own the page, we are not allowed to use atomic_set()
839 * This would break get_page_unless_zero() users.
840 */
fe896d18 841 page_ref_inc(page);
bad17234
ET		 842
843 return true;
844}
845
846static struct sk_buff *ixgbevf_fetch_rx_buffer(struct ixgbevf_ring *rx_ring,
847 union ixgbe_adv_rx_desc *rx_desc,
848 struct sk_buff *skb)
849{
850 struct ixgbevf_rx_buffer *rx_buffer;
851 struct page *page;
852
853 rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
854 page = rx_buffer->page;
855 prefetchw(page);
856
857 if (likely(!skb)) {
858 void *page_addr = page_address(page) +
859 rx_buffer->page_offset;
860
861 /* prefetch first cache line of first page */
862 prefetch(page_addr);
863#if L1_CACHE_BYTES < 128
864 prefetch(page_addr + L1_CACHE_BYTES);
865#endif
866
867 /* allocate a skb to store the frags */
868 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
869 IXGBEVF_RX_HDR_SIZE);
870 if (unlikely(!skb)) {
871 rx_ring->rx_stats.alloc_rx_buff_failed++;
872 return NULL;
873 }
874
875 /* we will be copying header into skb->data in
876 * pskb_may_pull so it is in our interest to prefetch
877 * it now to avoid a possible cache miss
878 */
879 prefetchw(skb->data);
880 }
881
882 /* we are reusing so sync this buffer for CPU use */
883 dma_sync_single_range_for_cpu(rx_ring->dev,
884 rx_buffer->dma,
885 rx_buffer->page_offset,
886 IXGBEVF_RX_BUFSZ,
887 DMA_FROM_DEVICE);
888
889 /* pull page into skb */
890 if (ixgbevf_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
891 /* hand second half of page back to the ring */
892 ixgbevf_reuse_rx_page(rx_ring, rx_buffer);
893 } else {
894 /* we are not reusing the buffer so unmap it */
895 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
896 PAGE_SIZE, DMA_FROM_DEVICE);
897 }
898
899 /* clear contents of buffer_info */
900 rx_buffer->dma = 0;
901 rx_buffer->page = NULL;
902
903 return skb;
904}
905
92915f71 906static inline void ixgbevf_irq_enable_queues(struct ixgbevf_adapter *adapter,
5f3600eb 907 u32 qmask)
92915f71 908{
92915f71
GR		 909 struct ixgbe_hw *hw = &adapter->hw;
910
5f3600eb 911 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, qmask);
92915f71
GR		 912}
913
08e50a20
JK		 914static int ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector,
915 struct ixgbevf_ring *rx_ring,
916 int budget)
92915f71 917{
92915f71 918 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
bafa578f 919 u16 cleaned_count = ixgbevf_desc_unused(rx_ring);
bad17234 920 struct sk_buff *skb = rx_ring->skb;
92915f71 921
6622402a 922 while (likely(total_rx_packets < budget)) {
4b95fe3d 923 union ixgbe_adv_rx_desc *rx_desc;
b97fe3b1 924
0579eefc
ET		 925 /* return some buffers to hardware, one at a time is too slow */
926 if (cleaned_count >= IXGBEVF_RX_BUFFER_WRITE) {
927 ixgbevf_alloc_rx_buffers(rx_ring, cleaned_count);
928 cleaned_count = 0;
929 }
930
bad17234 931 rx_desc = IXGBEVF_RX_DESC(rx_ring, rx_ring->next_to_clean);
0579eefc
ET		 932
933 if (!ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_DD))
92915f71 934 break;
92915f71 935
0579eefc
ET		 936 /* This memory barrier is needed to keep us from reading
937 * any other fields out of the rx_desc until we know the
938 * RXD_STAT_DD bit is set
939 */
940 rmb();
ec62fe26 941
bad17234
ET		 942 /* retrieve a buffer from the ring */
943 skb = ixgbevf_fetch_rx_buffer(rx_ring, rx_desc, skb);
0579eefc 944
bad17234
ET		 945 /* exit if we failed to retrieve a buffer */
946 if (!skb)
947 break;
92915f71 948
b97fe3b1
ET		 949 cleaned_count++;
950
bad17234
ET		 951 /* fetch next buffer in frame if non-eop */
952 if (ixgbevf_is_non_eop(rx_ring, rx_desc))
0579eefc 953 continue;
5c60f81a 954
bad17234
ET		 955 /* verify the packet layout is correct */
956 if (ixgbevf_cleanup_headers(rx_ring, rx_desc, skb)) {
957 skb = NULL;
0579eefc 958 continue;
92915f71
GR		 959 }
960
92915f71
GR		 961 /* probably a little skewed due to removing CRC */
962 total_rx_bytes += skb->len;
92915f71 963
815cccbf
JF		 964 /* Workaround hardware that can't do proper VEPA multicast
965 * source pruning.
966 */
bd9d5592 967 if ((skb->pkt_type == PACKET_BROADCAST ||
dec0d8e4 968 skb->pkt_type == PACKET_MULTICAST) &&
095e2617 969 ether_addr_equal(rx_ring->netdev->dev_addr,
7367d0b5 970 eth_hdr(skb)->h_source)) {
815cccbf 971 dev_kfree_skb_irq(skb);
0579eefc 972 continue;
815cccbf
JF		 973 }
974
dff80520
ET		 975 /* populate checksum, VLAN, and protocol */
976 ixgbevf_process_skb_fields(rx_ring, rx_desc, skb);
977
978 ixgbevf_rx_skb(q_vector, skb);
92915f71 979
bad17234
ET		 980 /* reset skb pointer */
981 skb = NULL;
982
0579eefc 983 /* update budget accounting */
6622402a
ET		 984 total_rx_packets++;
985 }
92915f71 986
bad17234
ET		 987 /* place incomplete frames back on ring for completion */
988 rx_ring->skb = skb;
989
4197aa7b 990 u64_stats_update_begin(&rx_ring->syncp);
095e2617
ET		 991 rx_ring->stats.packets += total_rx_packets;
992 rx_ring->stats.bytes += total_rx_bytes;
4197aa7b 993 u64_stats_update_end(&rx_ring->syncp);
ac6ed8f0
GR		 994 q_vector->rx.total_packets += total_rx_packets;
995 q_vector->rx.total_bytes += total_rx_bytes;
92915f71 996
08e50a20 997 return total_rx_packets;
92915f71
GR		 998}
999
1000/**
fa71ae27 1001 * ixgbevf_poll - NAPI polling calback
92915f71
GR		 1002 * @napi: napi struct with our devices info in it
1003 * @budget: amount of work driver is allowed to do this pass, in packets
1004 *
fa71ae27 1005 * This function will clean more than one or more rings associated with a
92915f71
GR		 1006 * q_vector.
1007 **/
fa71ae27 1008static int ixgbevf_poll(struct napi_struct *napi, int budget)
92915f71
GR		 1009{
1010 struct ixgbevf_q_vector *q_vector =
1011 container_of(napi, struct ixgbevf_q_vector, napi);
1012 struct ixgbevf_adapter *adapter = q_vector->adapter;
fa71ae27 1013 struct ixgbevf_ring *ring;
32b3e08f 1014 int per_ring_budget, work_done = 0;
fa71ae27
AD		 1015 bool clean_complete = true;
1016
8220bbc1
AD		 1017 ixgbevf_for_each_ring(ring, q_vector->tx) {
1018 if (!ixgbevf_clean_tx_irq(q_vector, ring, budget))
1019 clean_complete = false;
1020 }
92915f71 1021
d0f71aff
WD		 1022 if (budget <= 0)
1023 return budget;
c777cdfa
JK		 1024#ifdef CONFIG_NET_RX_BUSY_POLL
1025 if (!ixgbevf_qv_lock_napi(q_vector))
1026 return budget;
1027#endif
1028
92915f71 1029 /* attempt to distribute budget to each queue fairly, but don't allow
dec0d8e4
JK		 1030 * the budget to go below 1 because we'll exit polling
1031 */
fa71ae27
AD		 1032 if (q_vector->rx.count > 1)
1033 per_ring_budget = max(budget/q_vector->rx.count, 1);
1034 else
1035 per_ring_budget = budget;
1036
32b3e08f
JB		 1037 ixgbevf_for_each_ring(ring, q_vector->rx) {
1038 int cleaned = ixgbevf_clean_rx_irq(q_vector, ring,
1039 per_ring_budget);
1040 work_done += cleaned;
8220bbc1
AD		 1041 if (cleaned >= per_ring_budget)
1042 clean_complete = false;
32b3e08f 1043 }
fa71ae27 1044
c777cdfa
JK		 1045#ifdef CONFIG_NET_RX_BUSY_POLL
1046 ixgbevf_qv_unlock_napi(q_vector);
1047#endif
1048
fa71ae27
AD		 1049 /* If all work not completed, return budget and keep polling */
1050 if (!clean_complete)
1051 return budget;
1052 /* all work done, exit the polling mode */
32b3e08f 1053 napi_complete_done(napi, work_done);
9ad3d6f7 1054 if (adapter->rx_itr_setting == 1)
fa71ae27 1055 ixgbevf_set_itr(q_vector);
2e7cfbdd
MR		 1056 if (!test_bit(__IXGBEVF_DOWN, &adapter->state) &&
1057 !test_bit(__IXGBEVF_REMOVING, &adapter->state))
fa71ae27
AD		 1058 ixgbevf_irq_enable_queues(adapter,
1059 1 << q_vector->v_idx);
92915f71 1060
fa71ae27 1061 return 0;
92915f71
GR		 1062}
1063
ce422606
GR		 1064/**
1065 * ixgbevf_write_eitr - write VTEITR register in hardware specific way
1066 * @q_vector: structure containing interrupt and ring information
dec0d8e4 1067 **/
3849623e 1068void ixgbevf_write_eitr(struct ixgbevf_q_vector *q_vector)
ce422606
GR		 1069{
1070 struct ixgbevf_adapter *adapter = q_vector->adapter;
1071 struct ixgbe_hw *hw = &adapter->hw;
1072 int v_idx = q_vector->v_idx;
1073 u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
1074
dec0d8e4 1075 /* set the WDIS bit to not clear the timer bits and cause an
ce422606
GR		 1076 * immediate assertion of the interrupt
1077 */
1078 itr_reg |= IXGBE_EITR_CNT_WDIS;
1079
1080 IXGBE_WRITE_REG(hw, IXGBE_VTEITR(v_idx), itr_reg);
1081}
92915f71 1082
c777cdfa
JK		 1083#ifdef CONFIG_NET_RX_BUSY_POLL
1084/* must be called with local_bh_disable()d */
1085static int ixgbevf_busy_poll_recv(struct napi_struct *napi)
1086{
1087 struct ixgbevf_q_vector *q_vector =
1088 container_of(napi, struct ixgbevf_q_vector, napi);
1089 struct ixgbevf_adapter *adapter = q_vector->adapter;
1090 struct ixgbevf_ring *ring;
1091 int found = 0;
1092
1093 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
1094 return LL_FLUSH_FAILED;
1095
1096 if (!ixgbevf_qv_lock_poll(q_vector))
1097 return LL_FLUSH_BUSY;
1098
1099 ixgbevf_for_each_ring(ring, q_vector->rx) {
1100 found = ixgbevf_clean_rx_irq(q_vector, ring, 4);
3b5dca26
JK		 1101#ifdef BP_EXTENDED_STATS
1102 if (found)
095e2617 1103 ring->stats.cleaned += found;
3b5dca26 1104 else
095e2617 1105 ring->stats.misses++;
3b5dca26 1106#endif
c777cdfa
JK		 1107 if (found)
1108 break;
1109 }
1110
1111 ixgbevf_qv_unlock_poll(q_vector);
1112
1113 return found;
1114}
1115#endif /* CONFIG_NET_RX_BUSY_POLL */
1116
92915f71
GR		 1117/**
1118 * ixgbevf_configure_msix - Configure MSI-X hardware
1119 * @adapter: board private structure
1120 *
1121 * ixgbevf_configure_msix sets up the hardware to properly generate MSI-X
1122 * interrupts.
1123 **/
1124static void ixgbevf_configure_msix(struct ixgbevf_adapter *adapter)
1125{
1126 struct ixgbevf_q_vector *q_vector;
6b43c446 1127 int q_vectors, v_idx;
92915f71
GR		 1128
1129 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
5f3600eb 1130 adapter->eims_enable_mask = 0;
92915f71 1131
dec0d8e4 1132 /* Populate the IVAR table and set the ITR values to the
92915f71
GR		 1133 * corresponding register.
1134 */
1135 for (v_idx = 0; v_idx < q_vectors; v_idx++) {
6b43c446 1136 struct ixgbevf_ring *ring;
dec0d8e4 1137
92915f71 1138 q_vector = adapter->q_vector[v_idx];
6b43c446
AD		 1139
1140 ixgbevf_for_each_ring(ring, q_vector->rx)
1141 ixgbevf_set_ivar(adapter, 0, ring->reg_idx, v_idx);
1142
1143 ixgbevf_for_each_ring(ring, q_vector->tx)
1144 ixgbevf_set_ivar(adapter, 1, ring->reg_idx, v_idx);
92915f71 1145
5f3600eb 1146 if (q_vector->tx.ring && !q_vector->rx.ring) {
dec0d8e4 1147 /* Tx only vector */
5f3600eb 1148 if (adapter->tx_itr_setting == 1)
8a9ca110 1149 q_vector->itr = IXGBE_12K_ITR;
5f3600eb
AD		 1150 else
1151 q_vector->itr = adapter->tx_itr_setting;
1152 } else {
dec0d8e4 1153 /* Rx or Rx/Tx vector */
5f3600eb
AD		 1154 if (adapter->rx_itr_setting == 1)
1155 q_vector->itr = IXGBE_20K_ITR;
1156 else
1157 q_vector->itr = adapter->rx_itr_setting;
1158 }
1159
1160 /* add q_vector eims value to global eims_enable_mask */
1161 adapter->eims_enable_mask |= 1 << v_idx;
92915f71 1162
5f3600eb 1163 ixgbevf_write_eitr(q_vector);
92915f71
GR		 1164 }
1165
1166 ixgbevf_set_ivar(adapter, -1, 1, v_idx);
5f3600eb
AD		 1167 /* setup eims_other and add value to global eims_enable_mask */
1168 adapter->eims_other = 1 << v_idx;
1169 adapter->eims_enable_mask |= adapter->eims_other;
92915f71
GR		 1170}
1171
1172enum latency_range {
1173 lowest_latency = 0,
1174 low_latency = 1,
1175 bulk_latency = 2,
1176 latency_invalid = 255
1177};
1178
1179/**
1180 * ixgbevf_update_itr - update the dynamic ITR value based on statistics
5f3600eb
AD		 1181 * @q_vector: structure containing interrupt and ring information
1182 * @ring_container: structure containing ring performance data
92915f71 1183 *
dec0d8e4
JK		 1184 * Stores a new ITR value based on packets and byte
1185 * counts during the last interrupt. The advantage of per interrupt
1186 * computation is faster updates and more accurate ITR for the current
1187 * traffic pattern. Constants in this function were computed
1188 * based on theoretical maximum wire speed and thresholds were set based
1189 * on testing data as well as attempting to minimize response time
1190 * while increasing bulk throughput.
92915f71 1191 **/
5f3600eb
AD		 1192static void ixgbevf_update_itr(struct ixgbevf_q_vector *q_vector,
1193 struct ixgbevf_ring_container *ring_container)
92915f71 1194{
5f3600eb
AD		 1195 int bytes = ring_container->total_bytes;
1196 int packets = ring_container->total_packets;
92915f71
GR		 1197 u32 timepassed_us;
1198 u64 bytes_perint;
5f3600eb 1199 u8 itr_setting = ring_container->itr;
92915f71
GR		 1200
1201 if (packets == 0)
5f3600eb 1202 return;
92915f71 1203
dec0d8e4 1204 /* simple throttle rate management
92915f71
GR		 1205 * 0-20MB/s lowest (100000 ints/s)
1206 * 20-100MB/s low (20000 ints/s)
8a9ca110 1207 * 100-1249MB/s bulk (12000 ints/s)
92915f71
GR		 1208 */
1209 /* what was last interrupt timeslice? */
5f3600eb 1210 timepassed_us = q_vector->itr >> 2;
92915f71
GR		 1211 bytes_perint = bytes / timepassed_us; /* bytes/usec */
1212
1213 switch (itr_setting) {
1214 case lowest_latency:
e2c28ce7 1215 if (bytes_perint > 10)
5f3600eb 1216 itr_setting = low_latency;
92915f71
GR		 1217 break;
1218 case low_latency:
e2c28ce7 1219 if (bytes_perint > 20)
5f3600eb 1220 itr_setting = bulk_latency;
e2c28ce7 1221 else if (bytes_perint <= 10)
5f3600eb 1222 itr_setting = lowest_latency;
92915f71
GR		 1223 break;
1224 case bulk_latency:
e2c28ce7 1225 if (bytes_perint <= 20)
5f3600eb 1226 itr_setting = low_latency;
92915f71
GR		 1227 break;
1228 }
1229
5f3600eb
AD		 1230 /* clear work counters since we have the values we need */
1231 ring_container->total_bytes = 0;
1232 ring_container->total_packets = 0;
1233
1234 /* write updated itr to ring container */
1235 ring_container->itr = itr_setting;
92915f71
GR		 1236}
1237
fa71ae27 1238static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector)
92915f71 1239{
5f3600eb
AD		 1240 u32 new_itr = q_vector->itr;
1241 u8 current_itr;
92915f71 1242
5f3600eb
AD		 1243 ixgbevf_update_itr(q_vector, &q_vector->tx);
1244 ixgbevf_update_itr(q_vector, &q_vector->rx);
92915f71 1245
6b43c446 1246 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
92915f71
GR		 1247
1248 switch (current_itr) {
1249 /* counts and packets in update_itr are dependent on these numbers */
1250 case lowest_latency:
5f3600eb 1251 new_itr = IXGBE_100K_ITR;
92915f71
GR		 1252 break;
1253 case low_latency:
5f3600eb 1254 new_itr = IXGBE_20K_ITR;
92915f71
GR		 1255 break;
1256 case bulk_latency:
8a9ca110 1257 new_itr = IXGBE_12K_ITR;
92915f71 1258 break;
9ad3d6f7
ET		 1259 default:
1260 break;
92915f71
GR		 1261 }
1262
5f3600eb 1263 if (new_itr != q_vector->itr) {
92915f71 1264 /* do an exponential smoothing */
5f3600eb
AD		 1265 new_itr = (10 * new_itr * q_vector->itr) /
1266 ((9 * new_itr) + q_vector->itr);
1267
1268 /* save the algorithm value here */
1269 q_vector->itr = new_itr;
1270
1271 ixgbevf_write_eitr(q_vector);
92915f71 1272 }
92915f71
GR		 1273}
1274
4b2cd27f 1275static irqreturn_t ixgbevf_msix_other(int irq, void *data)
92915f71 1276{
fa71ae27 1277 struct ixgbevf_adapter *adapter = data;
92915f71 1278 struct ixgbe_hw *hw = &adapter->hw;
08259594 1279
4b2cd27f 1280 hw->mac.get_link_status = 1;
1e72bfc3 1281
9ac5c5cc 1282 ixgbevf_service_event_schedule(adapter);
3a2c4033 1283
5f3600eb
AD		 1284 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_other);
1285
92915f71
GR		 1286 return IRQ_HANDLED;
1287}
1288
92915f71 1289/**
fa71ae27 1290 * ixgbevf_msix_clean_rings - single unshared vector rx clean (all queues)
92915f71
GR		 1291 * @irq: unused
1292 * @data: pointer to our q_vector struct for this interrupt vector
1293 **/
fa71ae27 1294static irqreturn_t ixgbevf_msix_clean_rings(int irq, void *data)
92915f71
GR		 1295{
1296 struct ixgbevf_q_vector *q_vector = data;
92915f71 1297
5f3600eb 1298 /* EIAM disabled interrupts (on this vector) for us */
fa71ae27 1299 if (q_vector->rx.ring || q_vector->tx.ring)
ef2662b2 1300 napi_schedule_irqoff(&q_vector->napi);
92915f71
GR		 1301
1302 return IRQ_HANDLED;
1303}
1304
1305static inline void map_vector_to_rxq(struct ixgbevf_adapter *a, int v_idx,
1306 int r_idx)
1307{
1308 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
1309
87e70ab9
DS		 1310 a->rx_ring[r_idx]->next = q_vector->rx.ring;
1311 q_vector->rx.ring = a->rx_ring[r_idx];
6b43c446 1312 q_vector->rx.count++;
92915f71
GR		 1313}
1314
1315static inline void map_vector_to_txq(struct ixgbevf_adapter *a, int v_idx,
1316 int t_idx)
1317{
1318 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
1319
87e70ab9
DS		 1320 a->tx_ring[t_idx]->next = q_vector->tx.ring;
1321 q_vector->tx.ring = a->tx_ring[t_idx];
6b43c446 1322 q_vector->tx.count++;
92915f71
GR		 1323}
1324
1325/**
1326 * ixgbevf_map_rings_to_vectors - Maps descriptor rings to vectors
1327 * @adapter: board private structure to initialize
1328 *
1329 * This function maps descriptor rings to the queue-specific vectors
1330 * we were allotted through the MSI-X enabling code. Ideally, we'd have
1331 * one vector per ring/queue, but on a constrained vector budget, we
1332 * group the rings as "efficiently" as possible. You would add new
1333 * mapping configurations in here.
1334 **/
1335static int ixgbevf_map_rings_to_vectors(struct ixgbevf_adapter *adapter)
1336{
1337 int q_vectors;
1338 int v_start = 0;
1339 int rxr_idx = 0, txr_idx = 0;
1340 int rxr_remaining = adapter->num_rx_queues;
1341 int txr_remaining = adapter->num_tx_queues;
1342 int i, j;
1343 int rqpv, tqpv;
92915f71
GR		 1344
1345 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1346
dec0d8e4 1347 /* The ideal configuration...
92915f71
GR		 1348 * We have enough vectors to map one per queue.
1349 */
1350 if (q_vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
1351 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
1352 map_vector_to_rxq(adapter, v_start, rxr_idx);
1353
1354 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
1355 map_vector_to_txq(adapter, v_start, txr_idx);
50985b5f 1356 return 0;
92915f71
GR		 1357 }
1358
dec0d8e4 1359 /* If we don't have enough vectors for a 1-to-1
92915f71
GR		 1360 * mapping, we'll have to group them so there are
1361 * multiple queues per vector.
1362 */
1363 /* Re-adjusting *qpv takes care of the remainder. */
1364 for (i = v_start; i < q_vectors; i++) {
1365 rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - i);
1366 for (j = 0; j < rqpv; j++) {
1367 map_vector_to_rxq(adapter, i, rxr_idx);
1368 rxr_idx++;
1369 rxr_remaining--;
1370 }
1371 }
1372 for (i = v_start; i < q_vectors; i++) {
1373 tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - i);
1374 for (j = 0; j < tqpv; j++) {
1375 map_vector_to_txq(adapter, i, txr_idx);
1376 txr_idx++;
1377 txr_remaining--;
1378 }
1379 }
1380
50985b5f 1381 return 0;
92915f71
GR		 1382}
1383
1384/**
1385 * ixgbevf_request_msix_irqs - Initialize MSI-X interrupts
1386 * @adapter: board private structure
1387 *
1388 * ixgbevf_request_msix_irqs allocates MSI-X vectors and requests
1389 * interrupts from the kernel.
1390 **/
1391static int ixgbevf_request_msix_irqs(struct ixgbevf_adapter *adapter)
1392{
1393 struct net_device *netdev = adapter->netdev;
fa71ae27
AD		 1394 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1395 int vector, err;
92915f71
GR		 1396 int ri = 0, ti = 0;
1397
92915f71 1398 for (vector = 0; vector < q_vectors; vector++) {
fa71ae27
AD		 1399 struct ixgbevf_q_vector *q_vector = adapter->q_vector[vector];
1400 struct msix_entry *entry = &adapter->msix_entries[vector];
1401
1402 if (q_vector->tx.ring && q_vector->rx.ring) {
1403 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
1404 "%s-%s-%d", netdev->name, "TxRx", ri++);
1405 ti++;
1406 } else if (q_vector->rx.ring) {
1407 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
1408 "%s-%s-%d", netdev->name, "rx", ri++);
1409 } else if (q_vector->tx.ring) {
1410 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
1411 "%s-%s-%d", netdev->name, "tx", ti++);
92915f71
GR		 1412 } else {
1413 /* skip this unused q_vector */
1414 continue;
1415 }
fa71ae27
AD		 1416 err = request_irq(entry->vector, &ixgbevf_msix_clean_rings, 0,
1417 q_vector->name, q_vector);
92915f71
GR		 1418 if (err) {
1419 hw_dbg(&adapter->hw,
dec0d8e4
JK		 1420 "request_irq failed for MSIX interrupt Error: %d\n",
1421 err);
92915f71
GR		 1422 goto free_queue_irqs;
1423 }
1424 }
1425
92915f71 1426 err = request_irq(adapter->msix_entries[vector].vector,
4b2cd27f 1427 &ixgbevf_msix_other, 0, netdev->name, adapter);
92915f71 1428 if (err) {
dec0d8e4
JK		 1429 hw_dbg(&adapter->hw, "request_irq for msix_other failed: %d\n",
1430 err);
92915f71
GR		 1431 goto free_queue_irqs;
1432 }
1433
1434 return 0;
1435
1436free_queue_irqs:
fa71ae27
AD		 1437 while (vector) {
1438 vector--;
1439 free_irq(adapter->msix_entries[vector].vector,
1440 adapter->q_vector[vector]);
1441 }
a1f6c6b1 1442 /* This failure is non-recoverable - it indicates the system is
1443 * out of MSIX vector resources and the VF driver cannot run
1444 * without them. Set the number of msix vectors to zero
1445 * indicating that not enough can be allocated. The error
1446 * will be returned to the user indicating device open failed.
1447 * Any further attempts to force the driver to open will also
1448 * fail. The only way to recover is to unload the driver and
1449 * reload it again. If the system has recovered some MSIX
1450 * vectors then it may succeed.
1451 */
1452 adapter->num_msix_vectors = 0;
92915f71
GR		 1453 return err;
1454}
1455
1456static inline void ixgbevf_reset_q_vectors(struct ixgbevf_adapter *adapter)
1457{
1458 int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1459
1460 for (i = 0; i < q_vectors; i++) {
1461 struct ixgbevf_q_vector *q_vector = adapter->q_vector[i];
dec0d8e4 1462
6b43c446
AD		 1463 q_vector->rx.ring = NULL;
1464 q_vector->tx.ring = NULL;
1465 q_vector->rx.count = 0;
1466 q_vector->tx.count = 0;
92915f71
GR		 1467 }
1468}
1469
1470/**
1471 * ixgbevf_request_irq - initialize interrupts
1472 * @adapter: board private structure
1473 *
1474 * Attempts to configure interrupts using the best available
1475 * capabilities of the hardware and kernel.
1476 **/
1477static int ixgbevf_request_irq(struct ixgbevf_adapter *adapter)
1478{
50985b5f 1479 int err = ixgbevf_request_msix_irqs(adapter);
92915f71
GR		 1480
1481 if (err)
dec0d8e4 1482 hw_dbg(&adapter->hw, "request_irq failed, Error %d\n", err);
92915f71
GR		 1483
1484 return err;
1485}
1486
1487static void ixgbevf_free_irq(struct ixgbevf_adapter *adapter)
1488{
92915f71
GR		 1489 int i, q_vectors;
1490
1491 q_vectors = adapter->num_msix_vectors;
92915f71
GR		 1492 i = q_vectors - 1;
1493
fa71ae27 1494 free_irq(adapter->msix_entries[i].vector, adapter);
92915f71
GR		 1495 i--;
1496
1497 for (; i >= 0; i--) {
fa71ae27
AD		 1498 /* free only the irqs that were actually requested */
1499 if (!adapter->q_vector[i]->rx.ring &&
1500 !adapter->q_vector[i]->tx.ring)
1501 continue;
1502
92915f71
GR		 1503 free_irq(adapter->msix_entries[i].vector,
1504 adapter->q_vector[i]);
1505 }
1506
1507 ixgbevf_reset_q_vectors(adapter);
1508}
1509
1510/**
1511 * ixgbevf_irq_disable - Mask off interrupt generation on the NIC
1512 * @adapter: board private structure
1513 **/
1514static inline void ixgbevf_irq_disable(struct ixgbevf_adapter *adapter)
1515{
92915f71 1516 struct ixgbe_hw *hw = &adapter->hw;
5f3600eb 1517 int i;
92915f71 1518
5f3600eb 1519 IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, 0);
92915f71 1520 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, ~0);
5f3600eb 1521 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, 0);
92915f71
GR		 1522
1523 IXGBE_WRITE_FLUSH(hw);
1524
1525 for (i = 0; i < adapter->num_msix_vectors; i++)
1526 synchronize_irq(adapter->msix_entries[i].vector);
1527}
1528
1529/**
1530 * ixgbevf_irq_enable - Enable default interrupt generation settings
1531 * @adapter: board private structure
1532 **/
5f3600eb 1533static inline void ixgbevf_irq_enable(struct ixgbevf_adapter *adapter)
92915f71
GR		 1534{
1535 struct ixgbe_hw *hw = &adapter->hw;
92915f71 1536
5f3600eb
AD		 1537 IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, adapter->eims_enable_mask);
1538 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, adapter->eims_enable_mask);
1539 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_enable_mask);
92915f71
GR		 1540}
1541
de02decb
DS		 1542/**
1543 * ixgbevf_configure_tx_ring - Configure 82599 VF Tx ring after Reset
1544 * @adapter: board private structure
1545 * @ring: structure containing ring specific data
1546 *
1547 * Configure the Tx descriptor ring after a reset.
1548 **/
1549static void ixgbevf_configure_tx_ring(struct ixgbevf_adapter *adapter,
1550 struct ixgbevf_ring *ring)
1551{
1552 struct ixgbe_hw *hw = &adapter->hw;
1553 u64 tdba = ring->dma;
1554 int wait_loop = 10;
1555 u32 txdctl = IXGBE_TXDCTL_ENABLE;
1556 u8 reg_idx = ring->reg_idx;
1557
1558 /* disable queue to avoid issues while updating state */
1559 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
1560 IXGBE_WRITE_FLUSH(hw);
1561
1562 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(reg_idx), tdba & DMA_BIT_MASK(32));
1563 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAH(reg_idx), tdba >> 32);
1564 IXGBE_WRITE_REG(hw, IXGBE_VFTDLEN(reg_idx),
1565 ring->count * sizeof(union ixgbe_adv_tx_desc));
1566
1567 /* disable head writeback */
1568 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(reg_idx), 0);
1569 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(reg_idx), 0);
1570
1571 /* enable relaxed ordering */
1572 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(reg_idx),
1573 (IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1574 IXGBE_DCA_TXCTRL_DATA_RRO_EN));
1575
1576 /* reset head and tail pointers */
1577 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(reg_idx), 0);
1578 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(reg_idx), 0);
dbf8b0d8 1579 ring->tail = adapter->io_addr + IXGBE_VFTDT(reg_idx);
de02decb
DS		 1580
1581 /* reset ntu and ntc to place SW in sync with hardwdare */
1582 ring->next_to_clean = 0;
1583 ring->next_to_use = 0;
1584
1585 /* In order to avoid issues WTHRESH + PTHRESH should always be equal
1586 * to or less than the number of on chip descriptors, which is
1587 * currently 40.
1588 */
1589 txdctl |= (8 << 16); /* WTHRESH = 8 */
1590
1591 /* Setting PTHRESH to 32 both improves performance */
1592 txdctl |= (1 << 8) | /* HTHRESH = 1 */
1593 32; /* PTHRESH = 32 */
1594
e08400b7
ET		 1595 clear_bit(__IXGBEVF_HANG_CHECK_ARMED, &ring->state);
1596
de02decb
DS		 1597 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), txdctl);
1598
1599 /* poll to verify queue is enabled */
1600 do {
1601 usleep_range(1000, 2000);
1602 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(reg_idx));
1603 } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
1604 if (!wait_loop)
1605 pr_err("Could not enable Tx Queue %d\n", reg_idx);
1606}
1607
92915f71
GR		 1608/**
1609 * ixgbevf_configure_tx - Configure 82599 VF Transmit Unit after Reset
1610 * @adapter: board private structure
1611 *
1612 * Configure the Tx unit of the MAC after a reset.
1613 **/
1614static void ixgbevf_configure_tx(struct ixgbevf_adapter *adapter)
1615{
de02decb 1616 u32 i;
92915f71
GR		 1617
1618 /* Setup the HW Tx Head and Tail descriptor pointers */
de02decb
DS		 1619 for (i = 0; i < adapter->num_tx_queues; i++)
1620 ixgbevf_configure_tx_ring(adapter, adapter->tx_ring[i]);
92915f71
GR		 1621}
1622
1623#define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1624
1625static void ixgbevf_configure_srrctl(struct ixgbevf_adapter *adapter, int index)
1626{
92915f71
GR		 1627 struct ixgbe_hw *hw = &adapter->hw;
1628 u32 srrctl;
1629
92915f71
GR		 1630 srrctl = IXGBE_SRRCTL_DROP_EN;
1631
bad17234
ET		 1632 srrctl |= IXGBEVF_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
1633 srrctl |= IXGBEVF_RX_BUFSZ >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
77d5dfca 1634 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
92915f71 1635
92915f71
GR		 1636 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(index), srrctl);
1637}
1638
1bb9c639
DS		 1639static void ixgbevf_setup_psrtype(struct ixgbevf_adapter *adapter)
1640{
1641 struct ixgbe_hw *hw = &adapter->hw;
1642
1643 /* PSRTYPE must be initialized in 82599 */
1644 u32 psrtype = IXGBE_PSRTYPE_TCPHDR | IXGBE_PSRTYPE_UDPHDR |
1645 IXGBE_PSRTYPE_IPV4HDR | IXGBE_PSRTYPE_IPV6HDR |
1646 IXGBE_PSRTYPE_L2HDR;
1647
1648 if (adapter->num_rx_queues > 1)
1649 psrtype |= 1 << 29;
1650
1651 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, psrtype);
1652}
1653
de02decb
DS		 1654#define IXGBEVF_MAX_RX_DESC_POLL 10
1655static void ixgbevf_disable_rx_queue(struct ixgbevf_adapter *adapter,
1656 struct ixgbevf_ring *ring)
1657{
1658 struct ixgbe_hw *hw = &adapter->hw;
1659 int wait_loop = IXGBEVF_MAX_RX_DESC_POLL;
1660 u32 rxdctl;
1661 u8 reg_idx = ring->reg_idx;
1662
26597802
MR		 1663 if (IXGBE_REMOVED(hw->hw_addr))
1664 return;
de02decb
DS		 1665 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1666 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
1667
1668 /* write value back with RXDCTL.ENABLE bit cleared */
1669 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(reg_idx), rxdctl);
1670
dec0d8e4 1671 /* the hardware may take up to 100us to really disable the Rx queue */
de02decb
DS		 1672 do {
1673 udelay(10);
1674 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1675 } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
1676
1677 if (!wait_loop)
1678 pr_err("RXDCTL.ENABLE queue %d not cleared while polling\n",
1679 reg_idx);
1680}
1681
1682static void ixgbevf_rx_desc_queue_enable(struct ixgbevf_adapter *adapter,
1683 struct ixgbevf_ring *ring)
1684{
1685 struct ixgbe_hw *hw = &adapter->hw;
1686 int wait_loop = IXGBEVF_MAX_RX_DESC_POLL;
1687 u32 rxdctl;
1688 u8 reg_idx = ring->reg_idx;
1689
26597802
MR		 1690 if (IXGBE_REMOVED(hw->hw_addr))
1691 return;
de02decb
DS		 1692 do {
1693 usleep_range(1000, 2000);
1694 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1695 } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
1696
1697 if (!wait_loop)
1698 pr_err("RXDCTL.ENABLE queue %d not set while polling\n",
1699 reg_idx);
1700}
1701
9295edb4
ET		 1702static void ixgbevf_setup_vfmrqc(struct ixgbevf_adapter *adapter)
1703{
1704 struct ixgbe_hw *hw = &adapter->hw;
1705 u32 vfmrqc = 0, vfreta = 0;
9295edb4 1706 u16 rss_i = adapter->num_rx_queues;
9cba434f 1707 u8 i, j;
9295edb4
ET		 1708
1709 /* Fill out hash function seeds */
9cba434f
ET		 1710 netdev_rss_key_fill(adapter->rss_key, sizeof(adapter->rss_key));
1711 for (i = 0; i < IXGBEVF_VFRSSRK_REGS; i++)
1712 IXGBE_WRITE_REG(hw, IXGBE_VFRSSRK(i), adapter->rss_key[i]);
9295edb4 1713
9cba434f 1714 for (i = 0, j = 0; i < IXGBEVF_X550_VFRETA_SIZE; i++, j++) {
9295edb4
ET		 1715 if (j == rss_i)
1716 j = 0;
9cba434f
ET		 1717
1718 adapter->rss_indir_tbl[i] = j;
1719
1720 vfreta |= j << (i & 0x3) * 8;
1721 if ((i & 3) == 3) {
9295edb4 1722 IXGBE_WRITE_REG(hw, IXGBE_VFRETA(i >> 2), vfreta);
9cba434f
ET		 1723 vfreta = 0;
1724 }
9295edb4
ET		 1725 }
1726
1727 /* Perform hash on these packet types */
1728 vfmrqc |= IXGBE_VFMRQC_RSS_FIELD_IPV4 |
1729 IXGBE_VFMRQC_RSS_FIELD_IPV4_TCP |
1730 IXGBE_VFMRQC_RSS_FIELD_IPV6 |
1731 IXGBE_VFMRQC_RSS_FIELD_IPV6_TCP;
1732
1733 vfmrqc |= IXGBE_VFMRQC_RSSEN;
1734
1735 IXGBE_WRITE_REG(hw, IXGBE_VFMRQC, vfmrqc);
1736}
1737
de02decb
DS		 1738static void ixgbevf_configure_rx_ring(struct ixgbevf_adapter *adapter,
1739 struct ixgbevf_ring *ring)
1740{
1741 struct ixgbe_hw *hw = &adapter->hw;
1742 u64 rdba = ring->dma;
1743 u32 rxdctl;
1744 u8 reg_idx = ring->reg_idx;
1745
1746 /* disable queue to avoid issues while updating state */
1747 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1748 ixgbevf_disable_rx_queue(adapter, ring);
1749
1750 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAL(reg_idx), rdba & DMA_BIT_MASK(32));
1751 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAH(reg_idx), rdba >> 32);
1752 IXGBE_WRITE_REG(hw, IXGBE_VFRDLEN(reg_idx),
1753 ring->count * sizeof(union ixgbe_adv_rx_desc));
1754
1755 /* enable relaxed ordering */
1756 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(reg_idx),
1757 IXGBE_DCA_RXCTRL_DESC_RRO_EN);
1758
1759 /* reset head and tail pointers */
1760 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(reg_idx), 0);
1761 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(reg_idx), 0);
dbf8b0d8 1762 ring->tail = adapter->io_addr + IXGBE_VFRDT(reg_idx);
de02decb
DS		 1763
1764 /* reset ntu and ntc to place SW in sync with hardwdare */
1765 ring->next_to_clean = 0;
1766 ring->next_to_use = 0;
bad17234 1767 ring->next_to_alloc = 0;
de02decb
DS		 1768
1769 ixgbevf_configure_srrctl(adapter, reg_idx);
1770
bad17234
ET		 1771 /* allow any size packet since we can handle overflow */
1772 rxdctl &= ~IXGBE_RXDCTL_RLPML_EN;
1773
de02decb
DS		 1774 rxdctl |= IXGBE_RXDCTL_ENABLE | IXGBE_RXDCTL_VME;
1775 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(reg_idx), rxdctl);
1776
1777 ixgbevf_rx_desc_queue_enable(adapter, ring);
095e2617 1778 ixgbevf_alloc_rx_buffers(ring, ixgbevf_desc_unused(ring));
de02decb
DS		 1779}
1780
92915f71
GR		 1781/**
1782 * ixgbevf_configure_rx - Configure 82599 VF Receive Unit after Reset
1783 * @adapter: board private structure
1784 *
1785 * Configure the Rx unit of the MAC after a reset.
1786 **/
1787static void ixgbevf_configure_rx(struct ixgbevf_adapter *adapter)
1788{
de02decb 1789 int i;
bad17234
ET		 1790 struct ixgbe_hw *hw = &adapter->hw;
1791 struct net_device *netdev = adapter->netdev;
92915f71 1792
1bb9c639 1793 ixgbevf_setup_psrtype(adapter);
9295edb4
ET		 1794 if (hw->mac.type >= ixgbe_mac_X550_vf)
1795 ixgbevf_setup_vfmrqc(adapter);
dd1fe113 1796
bad17234
ET		 1797 /* notify the PF of our intent to use this size of frame */
1798 ixgbevf_rlpml_set_vf(hw, netdev->mtu + ETH_HLEN + ETH_FCS_LEN);
92915f71 1799
92915f71 1800 /* Setup the HW Rx Head and Tail Descriptor Pointers and
dec0d8e4
JK		 1801 * the Base and Length of the Rx Descriptor Ring
1802 */
de02decb
DS		 1803 for (i = 0; i < adapter->num_rx_queues; i++)
1804 ixgbevf_configure_rx_ring(adapter, adapter->rx_ring[i]);
92915f71
GR		 1805}
1806
80d5c368
PM		 1807static int ixgbevf_vlan_rx_add_vid(struct net_device *netdev,
1808 __be16 proto, u16 vid)
92915f71
GR		 1809{
1810 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1811 struct ixgbe_hw *hw = &adapter->hw;
2ddc7fe1
AD		 1812 int err;
1813
55fdd45b 1814 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 1815
92915f71 1816 /* add VID to filter table */
2ddc7fe1 1817 err = hw->mac.ops.set_vfta(hw, vid, 0, true);
1c55ed76 1818
55fdd45b 1819 spin_unlock_bh(&adapter->mbx_lock);
1c55ed76 1820
2ddc7fe1
AD		 1821 /* translate error return types so error makes sense */
1822 if (err == IXGBE_ERR_MBX)
1823 return -EIO;
1824
1825 if (err == IXGBE_ERR_INVALID_ARGUMENT)
1826 return -EACCES;
1827
dadcd65f 1828 set_bit(vid, adapter->active_vlans);
8e586137 1829
2ddc7fe1 1830 return err;
92915f71
GR		 1831}
1832
80d5c368
PM		 1833static int ixgbevf_vlan_rx_kill_vid(struct net_device *netdev,
1834 __be16 proto, u16 vid)
92915f71
GR		 1835{
1836 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1837 struct ixgbe_hw *hw = &adapter->hw;
50985b5f 1838 int err;
92915f71 1839
55fdd45b 1840 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 1841
92915f71 1842 /* remove VID from filter table */
92fe0bf7 1843 err = hw->mac.ops.set_vfta(hw, vid, 0, false);
1c55ed76 1844
55fdd45b 1845 spin_unlock_bh(&adapter->mbx_lock);
1c55ed76 1846
dadcd65f 1847 clear_bit(vid, adapter->active_vlans);
8e586137 1848
2ddc7fe1 1849 return err;
92915f71
GR		 1850}
1851
1852static void ixgbevf_restore_vlan(struct ixgbevf_adapter *adapter)
1853{
dadcd65f 1854 u16 vid;
92915f71 1855
dadcd65f 1856 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
80d5c368
PM		 1857 ixgbevf_vlan_rx_add_vid(adapter->netdev,
1858 htons(ETH_P_8021Q), vid);
92915f71
GR		 1859}
1860
46ec20ff
GR		 1861static int ixgbevf_write_uc_addr_list(struct net_device *netdev)
1862{
1863 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1864 struct ixgbe_hw *hw = &adapter->hw;
1865 int count = 0;
1866
1867 if ((netdev_uc_count(netdev)) > 10) {
dbd9636e 1868 pr_err("Too many unicast filters - No Space\n");
46ec20ff
GR		 1869 return -ENOSPC;
1870 }
1871
1872 if (!netdev_uc_empty(netdev)) {
1873 struct netdev_hw_addr *ha;
dec0d8e4 1874
46ec20ff
GR		 1875 netdev_for_each_uc_addr(ha, netdev) {
1876 hw->mac.ops.set_uc_addr(hw, ++count, ha->addr);
1877 udelay(200);
1878 }
1879 } else {
dec0d8e4
JK		 1880 /* If the list is empty then send message to PF driver to
1881 * clear all MAC VLANs on this VF.
46ec20ff
GR		 1882 */
1883 hw->mac.ops.set_uc_addr(hw, 0, NULL);
1884 }
1885
1886 return count;
1887}
1888
92915f71 1889/**
dee847f5 1890 * ixgbevf_set_rx_mode - Multicast and unicast set
92915f71
GR		 1891 * @netdev: network interface device structure
1892 *
1893 * The set_rx_method entry point is called whenever the multicast address
dee847f5
GR		 1894 * list, unicast address list or the network interface flags are updated.
1895 * This routine is responsible for configuring the hardware for proper
1896 * multicast mode and configuring requested unicast filters.
92915f71
GR		 1897 **/
1898static void ixgbevf_set_rx_mode(struct net_device *netdev)
1899{
1900 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1901 struct ixgbe_hw *hw = &adapter->hw;
8443c1a4
HS		 1902 unsigned int flags = netdev->flags;
1903 int xcast_mode;
1904
1905 xcast_mode = (flags & IFF_ALLMULTI) ? IXGBEVF_XCAST_MODE_ALLMULTI :
1906 (flags & (IFF_BROADCAST | IFF_MULTICAST)) ?
1907 IXGBEVF_XCAST_MODE_MULTI : IXGBEVF_XCAST_MODE_NONE;
92915f71 1908
55fdd45b 1909 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 1910
8443c1a4
HS		 1911 hw->mac.ops.update_xcast_mode(hw, netdev, xcast_mode);
1912
92915f71 1913 /* reprogram multicast list */
92fe0bf7 1914 hw->mac.ops.update_mc_addr_list(hw, netdev);
46ec20ff
GR		 1915
1916 ixgbevf_write_uc_addr_list(netdev);
1c55ed76 1917
55fdd45b 1918 spin_unlock_bh(&adapter->mbx_lock);
92915f71
GR		 1919}
1920
1921static void ixgbevf_napi_enable_all(struct ixgbevf_adapter *adapter)
1922{
1923 int q_idx;
1924 struct ixgbevf_q_vector *q_vector;
1925 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1926
1927 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
92915f71 1928 q_vector = adapter->q_vector[q_idx];
c777cdfa
JK		 1929#ifdef CONFIG_NET_RX_BUSY_POLL
1930 ixgbevf_qv_init_lock(adapter->q_vector[q_idx]);
1931#endif
fa71ae27 1932 napi_enable(&q_vector->napi);
92915f71
GR		 1933 }
1934}
1935
1936static void ixgbevf_napi_disable_all(struct ixgbevf_adapter *adapter)
1937{
1938 int q_idx;
1939 struct ixgbevf_q_vector *q_vector;
1940 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1941
1942 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1943 q_vector = adapter->q_vector[q_idx];
92915f71 1944 napi_disable(&q_vector->napi);
c777cdfa
JK		 1945#ifdef CONFIG_NET_RX_BUSY_POLL
1946 while (!ixgbevf_qv_disable(adapter->q_vector[q_idx])) {
1947 pr_info("QV %d locked\n", q_idx);
1948 usleep_range(1000, 20000);
1949 }
1950#endif /* CONFIG_NET_RX_BUSY_POLL */
92915f71
GR		 1951 }
1952}
1953
220fe050
DS		 1954static int ixgbevf_configure_dcb(struct ixgbevf_adapter *adapter)
1955{
1956 struct ixgbe_hw *hw = &adapter->hw;
1957 unsigned int def_q = 0;
1958 unsigned int num_tcs = 0;
2dc571aa
ET		 1959 unsigned int num_rx_queues = adapter->num_rx_queues;
1960 unsigned int num_tx_queues = adapter->num_tx_queues;
220fe050
DS		 1961 int err;
1962
1963 spin_lock_bh(&adapter->mbx_lock);
1964
1965 /* fetch queue configuration from the PF */
1966 err = ixgbevf_get_queues(hw, &num_tcs, &def_q);
1967
1968 spin_unlock_bh(&adapter->mbx_lock);
1969
1970 if (err)
1971 return err;
1972
1973 if (num_tcs > 1) {
2dc571aa
ET		 1974 /* we need only one Tx queue */
1975 num_tx_queues = 1;
1976
220fe050 1977 /* update default Tx ring register index */
87e70ab9 1978 adapter->tx_ring[0]->reg_idx = def_q;
220fe050
DS		 1979
1980 /* we need as many queues as traffic classes */
1981 num_rx_queues = num_tcs;
1982 }
1983
1984 /* if we have a bad config abort request queue reset */
2dc571aa
ET		 1985 if ((adapter->num_rx_queues != num_rx_queues) ||
1986 (adapter->num_tx_queues != num_tx_queues)) {
220fe050
DS		 1987 /* force mailbox timeout to prevent further messages */
1988 hw->mbx.timeout = 0;
1989
1990 /* wait for watchdog to come around and bail us out */
d5dd7c3f 1991 set_bit(__IXGBEVF_QUEUE_RESET_REQUESTED, &adapter->state);
220fe050
DS		 1992 }
1993
1994 return 0;
1995}
1996
92915f71
GR		 1997static void ixgbevf_configure(struct ixgbevf_adapter *adapter)
1998{
220fe050
DS		 1999 ixgbevf_configure_dcb(adapter);
2000
de02decb 2001 ixgbevf_set_rx_mode(adapter->netdev);
92915f71
GR		 2002
2003 ixgbevf_restore_vlan(adapter);
2004
2005 ixgbevf_configure_tx(adapter);
2006 ixgbevf_configure_rx(adapter);
92915f71
GR		 2007}
2008
33bd9f60
GR		 2009static void ixgbevf_save_reset_stats(struct ixgbevf_adapter *adapter)
2010{
2011 /* Only save pre-reset stats if there are some */
2012 if (adapter->stats.vfgprc || adapter->stats.vfgptc) {
2013 adapter->stats.saved_reset_vfgprc += adapter->stats.vfgprc -
2014 adapter->stats.base_vfgprc;
2015 adapter->stats.saved_reset_vfgptc += adapter->stats.vfgptc -
2016 adapter->stats.base_vfgptc;
2017 adapter->stats.saved_reset_vfgorc += adapter->stats.vfgorc -
2018 adapter->stats.base_vfgorc;
2019 adapter->stats.saved_reset_vfgotc += adapter->stats.vfgotc -
2020 adapter->stats.base_vfgotc;
2021 adapter->stats.saved_reset_vfmprc += adapter->stats.vfmprc -
2022 adapter->stats.base_vfmprc;
2023 }
2024}
2025
2026static void ixgbevf_init_last_counter_stats(struct ixgbevf_adapter *adapter)
2027{
2028 struct ixgbe_hw *hw = &adapter->hw;
2029
2030 adapter->stats.last_vfgprc = IXGBE_READ_REG(hw, IXGBE_VFGPRC);
2031 adapter->stats.last_vfgorc = IXGBE_READ_REG(hw, IXGBE_VFGORC_LSB);
2032 adapter->stats.last_vfgorc |=
2033 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGORC_MSB))) << 32);
2034 adapter->stats.last_vfgptc = IXGBE_READ_REG(hw, IXGBE_VFGPTC);
2035 adapter->stats.last_vfgotc = IXGBE_READ_REG(hw, IXGBE_VFGOTC_LSB);
2036 adapter->stats.last_vfgotc |=
2037 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGOTC_MSB))) << 32);
2038 adapter->stats.last_vfmprc = IXGBE_READ_REG(hw, IXGBE_VFMPRC);
2039
2040 adapter->stats.base_vfgprc = adapter->stats.last_vfgprc;
2041 adapter->stats.base_vfgorc = adapter->stats.last_vfgorc;
2042 adapter->stats.base_vfgptc = adapter->stats.last_vfgptc;
2043 adapter->stats.base_vfgotc = adapter->stats.last_vfgotc;
2044 adapter->stats.base_vfmprc = adapter->stats.last_vfmprc;
2045}
2046
31186785
AD		 2047static void ixgbevf_negotiate_api(struct ixgbevf_adapter *adapter)
2048{
2049 struct ixgbe_hw *hw = &adapter->hw;
94cf66f8
VZ		 2050 int api[] = { ixgbe_mbox_api_12,
2051 ixgbe_mbox_api_11,
56e94095 2052 ixgbe_mbox_api_10,
31186785 2053 ixgbe_mbox_api_unknown };
50985b5f 2054 int err, idx = 0;
31186785 2055
55fdd45b 2056 spin_lock_bh(&adapter->mbx_lock);
31186785
AD		 2057
2058 while (api[idx] != ixgbe_mbox_api_unknown) {
2059 err = ixgbevf_negotiate_api_version(hw, api[idx]);
2060 if (!err)
2061 break;
2062 idx++;
2063 }
2064
55fdd45b 2065 spin_unlock_bh(&adapter->mbx_lock);
31186785
AD		 2066}
2067
795180d8 2068static void ixgbevf_up_complete(struct ixgbevf_adapter *adapter)
92915f71
GR		 2069{
2070 struct net_device *netdev = adapter->netdev;
2071 struct ixgbe_hw *hw = &adapter->hw;
92915f71
GR		 2072
2073 ixgbevf_configure_msix(adapter);
2074
55fdd45b 2075 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 2076
92fe0bf7
GR		 2077 if (is_valid_ether_addr(hw->mac.addr))
2078 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
2079 else
2080 hw->mac.ops.set_rar(hw, 0, hw->mac.perm_addr, 0);
92915f71 2081
55fdd45b 2082 spin_unlock_bh(&adapter->mbx_lock);
1c55ed76 2083
4e857c58 2084 smp_mb__before_atomic();
92915f71
GR		 2085 clear_bit(__IXGBEVF_DOWN, &adapter->state);
2086 ixgbevf_napi_enable_all(adapter);
2087
d9bdb57f
ET		 2088 /* clear any pending interrupts, may auto mask */
2089 IXGBE_READ_REG(hw, IXGBE_VTEICR);
2090 ixgbevf_irq_enable(adapter);
2091
92915f71
GR		 2092 /* enable transmits */
2093 netif_tx_start_all_queues(netdev);
2094
33bd9f60
GR		 2095 ixgbevf_save_reset_stats(adapter);
2096 ixgbevf_init_last_counter_stats(adapter);
2097
4b2cd27f 2098 hw->mac.get_link_status = 1;
9ac5c5cc 2099 mod_timer(&adapter->service_timer, jiffies);
92915f71
GR		 2100}
2101
795180d8 2102void ixgbevf_up(struct ixgbevf_adapter *adapter)
92915f71 2103{
92915f71
GR		 2104 ixgbevf_configure(adapter);
2105
795180d8 2106 ixgbevf_up_complete(adapter);
92915f71
GR		 2107}
2108
2109/**
2110 * ixgbevf_clean_rx_ring - Free Rx Buffers per Queue
92915f71
GR		 2111 * @rx_ring: ring to free buffers from
2112 **/
05d063aa 2113static void ixgbevf_clean_rx_ring(struct ixgbevf_ring *rx_ring)
92915f71 2114{
bad17234 2115 struct device *dev = rx_ring->dev;
92915f71
GR		 2116 unsigned long size;
2117 unsigned int i;
2118
bad17234
ET		 2119 /* Free Rx ring sk_buff */
2120 if (rx_ring->skb) {
2121 dev_kfree_skb(rx_ring->skb);
2122 rx_ring->skb = NULL;
2123 }
2124
2125 /* ring already cleared, nothing to do */
c0456c23
GR		 2126 if (!rx_ring->rx_buffer_info)
2127 return;
92915f71 2128
bad17234 2129 /* Free all the Rx ring pages */
92915f71 2130 for (i = 0; i < rx_ring->count; i++) {
bad17234 2131 struct ixgbevf_rx_buffer *rx_buffer;
92915f71 2132
bad17234
ET		 2133 rx_buffer = &rx_ring->rx_buffer_info[i];
2134 if (rx_buffer->dma)
2135 dma_unmap_page(dev, rx_buffer->dma,
2136 PAGE_SIZE, DMA_FROM_DEVICE);
2137 rx_buffer->dma = 0;
2138 if (rx_buffer->page)
2139 __free_page(rx_buffer->page);
2140 rx_buffer->page = NULL;
92915f71
GR		 2141 }
2142
2143 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
2144 memset(rx_ring->rx_buffer_info, 0, size);
2145
2146 /* Zero out the descriptor ring */
2147 memset(rx_ring->desc, 0, rx_ring->size);
92915f71
GR		 2148}
2149
2150/**
2151 * ixgbevf_clean_tx_ring - Free Tx Buffers
92915f71
GR		 2152 * @tx_ring: ring to be cleaned
2153 **/
05d063aa 2154static void ixgbevf_clean_tx_ring(struct ixgbevf_ring *tx_ring)
92915f71
GR		 2155{
2156 struct ixgbevf_tx_buffer *tx_buffer_info;
2157 unsigned long size;
2158 unsigned int i;
2159
c0456c23
GR		 2160 if (!tx_ring->tx_buffer_info)
2161 return;
2162
92915f71 2163 /* Free all the Tx ring sk_buffs */
92915f71
GR		 2164 for (i = 0; i < tx_ring->count; i++) {
2165 tx_buffer_info = &tx_ring->tx_buffer_info[i];
70a10e25 2166 ixgbevf_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
92915f71
GR		 2167 }
2168
2169 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
2170 memset(tx_ring->tx_buffer_info, 0, size);
2171
2172 memset(tx_ring->desc, 0, tx_ring->size);
92915f71
GR		 2173}
2174
2175/**
2176 * ixgbevf_clean_all_rx_rings - Free Rx Buffers for all queues
2177 * @adapter: board private structure
2178 **/
2179static void ixgbevf_clean_all_rx_rings(struct ixgbevf_adapter *adapter)
2180{
2181 int i;
2182
2183 for (i = 0; i < adapter->num_rx_queues; i++)
05d063aa 2184 ixgbevf_clean_rx_ring(adapter->rx_ring[i]);
92915f71
GR		 2185}
2186
2187/**
2188 * ixgbevf_clean_all_tx_rings - Free Tx Buffers for all queues
2189 * @adapter: board private structure
2190 **/
2191static void ixgbevf_clean_all_tx_rings(struct ixgbevf_adapter *adapter)
2192{
2193 int i;
2194
2195 for (i = 0; i < adapter->num_tx_queues; i++)
05d063aa 2196 ixgbevf_clean_tx_ring(adapter->tx_ring[i]);
92915f71
GR		 2197}
2198
2199void ixgbevf_down(struct ixgbevf_adapter *adapter)
2200{
2201 struct net_device *netdev = adapter->netdev;
2202 struct ixgbe_hw *hw = &adapter->hw;
de02decb 2203 int i;
92915f71
GR		 2204
2205 /* signal that we are down to the interrupt handler */
5b346dc9
MR		 2206 if (test_and_set_bit(__IXGBEVF_DOWN, &adapter->state))
2207 return; /* do nothing if already down */
858c3dda 2208
dec0d8e4 2209 /* disable all enabled Rx queues */
858c3dda 2210 for (i = 0; i < adapter->num_rx_queues; i++)
87e70ab9 2211 ixgbevf_disable_rx_queue(adapter, adapter->rx_ring[i]);
92915f71 2212
d9bdb57f 2213 usleep_range(10000, 20000);
92915f71
GR		 2214
2215 netif_tx_stop_all_queues(netdev);
2216
d9bdb57f
ET		 2217 /* call carrier off first to avoid false dev_watchdog timeouts */
2218 netif_carrier_off(netdev);
2219 netif_tx_disable(netdev);
2220
92915f71
GR		 2221 ixgbevf_irq_disable(adapter);
2222
2223 ixgbevf_napi_disable_all(adapter);
2224
9ac5c5cc 2225 del_timer_sync(&adapter->service_timer);
92915f71
GR		 2226
2227 /* disable transmits in the hardware now that interrupts are off */
2228 for (i = 0; i < adapter->num_tx_queues; i++) {
de02decb
DS		 2229 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
2230
2231 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx),
2232 IXGBE_TXDCTL_SWFLSH);
92915f71
GR		 2233 }
2234
92915f71
GR		 2235 if (!pci_channel_offline(adapter->pdev))
2236 ixgbevf_reset(adapter);
2237
2238 ixgbevf_clean_all_tx_rings(adapter);
2239 ixgbevf_clean_all_rx_rings(adapter);
2240}
2241
2242void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter)
2243{
2244 WARN_ON(in_interrupt());
c0456c23 2245
92915f71
GR		 2246 while (test_and_set_bit(__IXGBEVF_RESETTING, &adapter->state))
2247 msleep(1);
2248
4b2cd27f
AD		 2249 ixgbevf_down(adapter);
2250 ixgbevf_up(adapter);
92915f71
GR		 2251
2252 clear_bit(__IXGBEVF_RESETTING, &adapter->state);
2253}
2254
2255void ixgbevf_reset(struct ixgbevf_adapter *adapter)
2256{
2257 struct ixgbe_hw *hw = &adapter->hw;
2258 struct net_device *netdev = adapter->netdev;
2259
798e381a 2260 if (hw->mac.ops.reset_hw(hw)) {
92915f71 2261 hw_dbg(hw, "PF still resetting\n");
798e381a 2262 } else {
92915f71 2263 hw->mac.ops.init_hw(hw);
798e381a
DS		 2264 ixgbevf_negotiate_api(adapter);
2265 }
92915f71
GR		 2266
2267 if (is_valid_ether_addr(adapter->hw.mac.addr)) {
91a76baa
ET		 2268 ether_addr_copy(netdev->dev_addr, adapter->hw.mac.addr);
2269 ether_addr_copy(netdev->perm_addr, adapter->hw.mac.addr);
92915f71 2270 }
e66c92ad
ET		 2271
2272 adapter->last_reset = jiffies;
92915f71
GR		 2273}
2274
e45dd5fe
JK		 2275static int ixgbevf_acquire_msix_vectors(struct ixgbevf_adapter *adapter,
2276 int vectors)
92915f71 2277{
a5f9337b 2278 int vector_threshold;
92915f71 2279
fa71ae27
AD		 2280 /* We'll want at least 2 (vector_threshold):
2281 * 1) TxQ[0] + RxQ[0] handler
2282 * 2) Other (Link Status Change, etc.)
92915f71
GR		 2283 */
2284 vector_threshold = MIN_MSIX_COUNT;
2285
2286 /* The more we get, the more we will assign to Tx/Rx Cleanup
2287 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
2288 * Right now, we simply care about how many we'll get; we'll
2289 * set them up later while requesting irq's.
2290 */
5c1e3588
AG		 2291 vectors = pci_enable_msix_range(adapter->pdev, adapter->msix_entries,
2292 vector_threshold, vectors);
92915f71 2293
5c1e3588 2294 if (vectors < 0) {
e45dd5fe
JK		 2295 dev_err(&adapter->pdev->dev,
2296 "Unable to allocate MSI-X interrupts\n");
92915f71
GR		 2297 kfree(adapter->msix_entries);
2298 adapter->msix_entries = NULL;
5c1e3588 2299 return vectors;
92915f71 2300 }
dee847f5 2301
5c1e3588
AG		 2302 /* Adjust for only the vectors we'll use, which is minimum
2303 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
2304 * vectors we were allocated.
2305 */
2306 adapter->num_msix_vectors = vectors;
2307
2308 return 0;
92915f71
GR		 2309}
2310
49ce9c2c
BH		 2311/**
2312 * ixgbevf_set_num_queues - Allocate queues for device, feature dependent
92915f71
GR		 2313 * @adapter: board private structure to initialize
2314 *
2315 * This is the top level queue allocation routine. The order here is very
2316 * important, starting with the "most" number of features turned on at once,
2317 * and ending with the smallest set of features. This way large combinations
2318 * can be allocated if they're turned on, and smaller combinations are the
2319 * fallthrough conditions.
2320 *
2321 **/
2322static void ixgbevf_set_num_queues(struct ixgbevf_adapter *adapter)
2323{
220fe050
DS		 2324 struct ixgbe_hw *hw = &adapter->hw;
2325 unsigned int def_q = 0;
2326 unsigned int num_tcs = 0;
2327 int err;
2328
92915f71
GR		 2329 /* Start with base case */
2330 adapter->num_rx_queues = 1;
2331 adapter->num_tx_queues = 1;
220fe050
DS		 2332
2333 spin_lock_bh(&adapter->mbx_lock);
2334
2335 /* fetch queue configuration from the PF */
2336 err = ixgbevf_get_queues(hw, &num_tcs, &def_q);
2337
2338 spin_unlock_bh(&adapter->mbx_lock);
2339
2340 if (err)
2341 return;
2342
2343 /* we need as many queues as traffic classes */
2dc571aa 2344 if (num_tcs > 1) {
220fe050 2345 adapter->num_rx_queues = num_tcs;
2dc571aa
ET		 2346 } else {
2347 u16 rss = min_t(u16, num_online_cpus(), IXGBEVF_MAX_RSS_QUEUES);
2348
2349 switch (hw->api_version) {
2350 case ixgbe_mbox_api_11:
94cf66f8 2351 case ixgbe_mbox_api_12:
2dc571aa
ET		 2352 adapter->num_rx_queues = rss;
2353 adapter->num_tx_queues = rss;
2354 default:
2355 break;
2356 }
2357 }
92915f71
GR		 2358}
2359
2360/**
2361 * ixgbevf_alloc_queues - Allocate memory for all rings
2362 * @adapter: board private structure to initialize
2363 *
2364 * We allocate one ring per queue at run-time since we don't know the
2365 * number of queues at compile-time. The polling_netdev array is
2366 * intended for Multiqueue, but should work fine with a single queue.
2367 **/
2368static int ixgbevf_alloc_queues(struct ixgbevf_adapter *adapter)
2369{
87e70ab9
DS		 2370 struct ixgbevf_ring *ring;
2371 int rx = 0, tx = 0;
92915f71 2372
87e70ab9
DS		 2373 for (; tx < adapter->num_tx_queues; tx++) {
2374 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
2375 if (!ring)
2376 goto err_allocation;
92915f71 2377
87e70ab9
DS		 2378 ring->dev = &adapter->pdev->dev;
2379 ring->netdev = adapter->netdev;
2380 ring->count = adapter->tx_ring_count;
2381 ring->queue_index = tx;
2382 ring->reg_idx = tx;
92915f71 2383
87e70ab9 2384 adapter->tx_ring[tx] = ring;
92915f71
GR		 2385 }
2386
87e70ab9
DS		 2387 for (; rx < adapter->num_rx_queues; rx++) {
2388 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
2389 if (!ring)
2390 goto err_allocation;
2391
2392 ring->dev = &adapter->pdev->dev;
2393 ring->netdev = adapter->netdev;
2394
2395 ring->count = adapter->rx_ring_count;
2396 ring->queue_index = rx;
2397 ring->reg_idx = rx;
2398
2399 adapter->rx_ring[rx] = ring;
92915f71
GR		 2400 }
2401
2402 return 0;
2403
87e70ab9
DS		 2404err_allocation:
2405 while (tx) {
2406 kfree(adapter->tx_ring[--tx]);
2407 adapter->tx_ring[tx] = NULL;
2408 }
2409
2410 while (rx) {
2411 kfree(adapter->rx_ring[--rx]);
2412 adapter->rx_ring[rx] = NULL;
2413 }
92915f71
GR		 2414 return -ENOMEM;
2415}
2416
2417/**
2418 * ixgbevf_set_interrupt_capability - set MSI-X or FAIL if not supported
2419 * @adapter: board private structure to initialize
2420 *
2421 * Attempt to configure the interrupts using the best available
2422 * capabilities of the hardware and the kernel.
2423 **/
2424static int ixgbevf_set_interrupt_capability(struct ixgbevf_adapter *adapter)
2425{
91e2b89b 2426 struct net_device *netdev = adapter->netdev;
50985b5f 2427 int err;
92915f71
GR		 2428 int vector, v_budget;
2429
dec0d8e4 2430 /* It's easy to be greedy for MSI-X vectors, but it really
92915f71
GR		 2431 * doesn't do us much good if we have a lot more vectors
2432 * than CPU's. So let's be conservative and only ask for
fa71ae27
AD		 2433 * (roughly) the same number of vectors as there are CPU's.
2434 * The default is to use pairs of vectors.
92915f71 2435 */
fa71ae27
AD		 2436 v_budget = max(adapter->num_rx_queues, adapter->num_tx_queues);
2437 v_budget = min_t(int, v_budget, num_online_cpus());
2438 v_budget += NON_Q_VECTORS;
92915f71
GR		 2439
2440 /* A failure in MSI-X entry allocation isn't fatal, but it does
dec0d8e4
JK		 2441 * mean we disable MSI-X capabilities of the adapter.
2442 */
92915f71
GR		 2443 adapter->msix_entries = kcalloc(v_budget,
2444 sizeof(struct msix_entry), GFP_KERNEL);
50985b5f
MR		 2445 if (!adapter->msix_entries)
2446 return -ENOMEM;
92915f71
GR		 2447
2448 for (vector = 0; vector < v_budget; vector++)
2449 adapter->msix_entries[vector].entry = vector;
2450
e45dd5fe
JK		 2451 err = ixgbevf_acquire_msix_vectors(adapter, v_budget);
2452 if (err)
50985b5f 2453 return err;
92915f71 2454
91e2b89b
GR		 2455 err = netif_set_real_num_tx_queues(netdev, adapter->num_tx_queues);
2456 if (err)
50985b5f 2457 return err;
91e2b89b 2458
50985b5f 2459 return netif_set_real_num_rx_queues(netdev, adapter->num_rx_queues);
92915f71
GR		 2460}
2461
2462/**
2463 * ixgbevf_alloc_q_vectors - Allocate memory for interrupt vectors
2464 * @adapter: board private structure to initialize
2465 *
2466 * We allocate one q_vector per queue interrupt. If allocation fails we
2467 * return -ENOMEM.
2468 **/
2469static int ixgbevf_alloc_q_vectors(struct ixgbevf_adapter *adapter)
2470{
2471 int q_idx, num_q_vectors;
2472 struct ixgbevf_q_vector *q_vector;
92915f71
GR		 2473
2474 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
92915f71
GR		 2475
2476 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
2477 q_vector = kzalloc(sizeof(struct ixgbevf_q_vector), GFP_KERNEL);
2478 if (!q_vector)
2479 goto err_out;
2480 q_vector->adapter = adapter;
2481 q_vector->v_idx = q_idx;
fa71ae27
AD		 2482 netif_napi_add(adapter->netdev, &q_vector->napi,
2483 ixgbevf_poll, 64);
92915f71
GR		 2484 adapter->q_vector[q_idx] = q_vector;
2485 }
2486
2487 return 0;
2488
2489err_out:
2490 while (q_idx) {
2491 q_idx--;
2492 q_vector = adapter->q_vector[q_idx];
c777cdfa
JK		 2493#ifdef CONFIG_NET_RX_BUSY_POLL
2494 napi_hash_del(&q_vector->napi);
2495#endif
92915f71
GR		 2496 netif_napi_del(&q_vector->napi);
2497 kfree(q_vector);
2498 adapter->q_vector[q_idx] = NULL;
2499 }
2500 return -ENOMEM;
2501}
2502
2503/**
2504 * ixgbevf_free_q_vectors - Free memory allocated for interrupt vectors
2505 * @adapter: board private structure to initialize
2506 *
2507 * This function frees the memory allocated to the q_vectors. In addition if
2508 * NAPI is enabled it will delete any references to the NAPI struct prior
2509 * to freeing the q_vector.
2510 **/
2511static void ixgbevf_free_q_vectors(struct ixgbevf_adapter *adapter)
2512{
f4477702 2513 int q_idx, num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
92915f71
GR		 2514
2515 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
2516 struct ixgbevf_q_vector *q_vector = adapter->q_vector[q_idx];
2517
2518 adapter->q_vector[q_idx] = NULL;
c777cdfa
JK		 2519#ifdef CONFIG_NET_RX_BUSY_POLL
2520 napi_hash_del(&q_vector->napi);
2521#endif
f4477702 2522 netif_napi_del(&q_vector->napi);
92915f71
GR		 2523 kfree(q_vector);
2524 }
2525}
2526
2527/**
2528 * ixgbevf_reset_interrupt_capability - Reset MSIX setup
2529 * @adapter: board private structure
2530 *
2531 **/
2532static void ixgbevf_reset_interrupt_capability(struct ixgbevf_adapter *adapter)
2533{
2534 pci_disable_msix(adapter->pdev);
2535 kfree(adapter->msix_entries);
2536 adapter->msix_entries = NULL;
92915f71
GR		 2537}
2538
2539/**
2540 * ixgbevf_init_interrupt_scheme - Determine if MSIX is supported and init
2541 * @adapter: board private structure to initialize
2542 *
2543 **/
2544static int ixgbevf_init_interrupt_scheme(struct ixgbevf_adapter *adapter)
2545{
2546 int err;
2547
2548 /* Number of supported queues */
2549 ixgbevf_set_num_queues(adapter);
2550
2551 err = ixgbevf_set_interrupt_capability(adapter);
2552 if (err) {
2553 hw_dbg(&adapter->hw,
2554 "Unable to setup interrupt capabilities\n");
2555 goto err_set_interrupt;
2556 }
2557
2558 err = ixgbevf_alloc_q_vectors(adapter);
2559 if (err) {
dec0d8e4 2560 hw_dbg(&adapter->hw, "Unable to allocate memory for queue vectors\n");
92915f71
GR		 2561 goto err_alloc_q_vectors;
2562 }
2563
2564 err = ixgbevf_alloc_queues(adapter);
2565 if (err) {
dbd9636e 2566 pr_err("Unable to allocate memory for queues\n");
92915f71
GR		 2567 goto err_alloc_queues;
2568 }
2569
dec0d8e4 2570 hw_dbg(&adapter->hw, "Multiqueue %s: Rx Queue count = %u, Tx Queue count = %u\n",
92915f71
GR		 2571 (adapter->num_rx_queues > 1) ? "Enabled" :
2572 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
2573
2574 set_bit(__IXGBEVF_DOWN, &adapter->state);
2575
2576 return 0;
2577err_alloc_queues:
2578 ixgbevf_free_q_vectors(adapter);
2579err_alloc_q_vectors:
2580 ixgbevf_reset_interrupt_capability(adapter);
2581err_set_interrupt:
2582 return err;
2583}
2584
0ac1e8ce
AD		 2585/**
2586 * ixgbevf_clear_interrupt_scheme - Clear the current interrupt scheme settings
2587 * @adapter: board private structure to clear interrupt scheme on
2588 *
2589 * We go through and clear interrupt specific resources and reset the structure
2590 * to pre-load conditions
2591 **/
2592static void ixgbevf_clear_interrupt_scheme(struct ixgbevf_adapter *adapter)
2593{
87e70ab9
DS		 2594 int i;
2595
2596 for (i = 0; i < adapter->num_tx_queues; i++) {
2597 kfree(adapter->tx_ring[i]);
2598 adapter->tx_ring[i] = NULL;
2599 }
2600 for (i = 0; i < adapter->num_rx_queues; i++) {
2601 kfree(adapter->rx_ring[i]);
2602 adapter->rx_ring[i] = NULL;
2603 }
2604
0ac1e8ce
AD		 2605 adapter->num_tx_queues = 0;
2606 adapter->num_rx_queues = 0;
2607
2608 ixgbevf_free_q_vectors(adapter);
2609 ixgbevf_reset_interrupt_capability(adapter);
2610}
2611
92915f71
GR		 2612/**
2613 * ixgbevf_sw_init - Initialize general software structures
92915f71
GR		 2614 * @adapter: board private structure to initialize
2615 *
2616 * ixgbevf_sw_init initializes the Adapter private data structure.
2617 * Fields are initialized based on PCI device information and
2618 * OS network device settings (MTU size).
2619 **/
9f9a12f8 2620static int ixgbevf_sw_init(struct ixgbevf_adapter *adapter)
92915f71
GR		 2621{
2622 struct ixgbe_hw *hw = &adapter->hw;
2623 struct pci_dev *pdev = adapter->pdev;
e1941a74 2624 struct net_device *netdev = adapter->netdev;
92915f71
GR		 2625 int err;
2626
2627 /* PCI config space info */
92915f71
GR		 2628 hw->vendor_id = pdev->vendor;
2629 hw->device_id = pdev->device;
ff938e43 2630 hw->revision_id = pdev->revision;
92915f71
GR		 2631 hw->subsystem_vendor_id = pdev->subsystem_vendor;
2632 hw->subsystem_device_id = pdev->subsystem_device;
2633
2634 hw->mbx.ops.init_params(hw);
56e94095
AD		 2635
2636 /* assume legacy case in which PF would only give VF 2 queues */
2637 hw->mac.max_tx_queues = 2;
2638 hw->mac.max_rx_queues = 2;
2639
798e381a
DS		 2640 /* lock to protect mailbox accesses */
2641 spin_lock_init(&adapter->mbx_lock);
2642
92915f71
GR		 2643 err = hw->mac.ops.reset_hw(hw);
2644 if (err) {
2645 dev_info(&pdev->dev,
e1941a74 2646 "PF still in reset state. Is the PF interface up?\n");
92915f71
GR		 2647 } else {
2648 err = hw->mac.ops.init_hw(hw);
2649 if (err) {
dbd9636e 2650 pr_err("init_shared_code failed: %d\n", err);
92915f71
GR		 2651 goto out;
2652 }
798e381a 2653 ixgbevf_negotiate_api(adapter);
e1941a74
GR		 2654 err = hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
2655 if (err)
2656 dev_info(&pdev->dev, "Error reading MAC address\n");
2657 else if (is_zero_ether_addr(adapter->hw.mac.addr))
2658 dev_info(&pdev->dev,
2659 "MAC address not assigned by administrator.\n");
91a76baa 2660 ether_addr_copy(netdev->dev_addr, hw->mac.addr);
e1941a74
GR		 2661 }
2662
2663 if (!is_valid_ether_addr(netdev->dev_addr)) {
2664 dev_info(&pdev->dev, "Assigning random MAC address\n");
2665 eth_hw_addr_random(netdev);
91a76baa 2666 ether_addr_copy(hw->mac.addr, netdev->dev_addr);
465fc643 2667 ether_addr_copy(hw->mac.perm_addr, netdev->dev_addr);
92915f71
GR		 2668 }
2669
2670 /* Enable dynamic interrupt throttling rates */
5f3600eb
AD		 2671 adapter->rx_itr_setting = 1;
2672 adapter->tx_itr_setting = 1;
92915f71 2673
92915f71
GR		 2674 /* set default ring sizes */
2675 adapter->tx_ring_count = IXGBEVF_DEFAULT_TXD;
2676 adapter->rx_ring_count = IXGBEVF_DEFAULT_RXD;
2677
92915f71 2678 set_bit(__IXGBEVF_DOWN, &adapter->state);
1a0d6ae5 2679 return 0;
92915f71
GR		 2680
2681out:
2682 return err;
2683}
2684
92915f71
GR		 2685#define UPDATE_VF_COUNTER_32bit(reg, last_counter, counter) \
2686 { \
2687 u32 current_counter = IXGBE_READ_REG(hw, reg); \
2688 if (current_counter < last_counter) \
2689 counter += 0x100000000LL; \
2690 last_counter = current_counter; \
2691 counter &= 0xFFFFFFFF00000000LL; \
2692 counter |= current_counter; \
2693 }
2694
2695#define UPDATE_VF_COUNTER_36bit(reg_lsb, reg_msb, last_counter, counter) \
2696 { \
2697 u64 current_counter_lsb = IXGBE_READ_REG(hw, reg_lsb); \
2698 u64 current_counter_msb = IXGBE_READ_REG(hw, reg_msb); \
dec0d8e4
JK		 2699 u64 current_counter = (current_counter_msb << 32) | \
2700 current_counter_lsb; \
92915f71
GR		 2701 if (current_counter < last_counter) \
2702 counter += 0x1000000000LL; \
2703 last_counter = current_counter; \
2704 counter &= 0xFFFFFFF000000000LL; \
2705 counter |= current_counter; \
2706 }
2707/**
2708 * ixgbevf_update_stats - Update the board statistics counters.
2709 * @adapter: board private structure
2710 **/
2711void ixgbevf_update_stats(struct ixgbevf_adapter *adapter)
2712{
2713 struct ixgbe_hw *hw = &adapter->hw;
55fb277c 2714 int i;
92915f71 2715
e66c92ad
ET		 2716 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
2717 test_bit(__IXGBEVF_RESETTING, &adapter->state))
088245a3
GR		 2718 return;
2719
92915f71
GR		 2720 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPRC, adapter->stats.last_vfgprc,
2721 adapter->stats.vfgprc);
2722 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPTC, adapter->stats.last_vfgptc,
2723 adapter->stats.vfgptc);
2724 UPDATE_VF_COUNTER_36bit(IXGBE_VFGORC_LSB, IXGBE_VFGORC_MSB,
2725 adapter->stats.last_vfgorc,
2726 adapter->stats.vfgorc);
2727 UPDATE_VF_COUNTER_36bit(IXGBE_VFGOTC_LSB, IXGBE_VFGOTC_MSB,
2728 adapter->stats.last_vfgotc,
2729 adapter->stats.vfgotc);
2730 UPDATE_VF_COUNTER_32bit(IXGBE_VFMPRC, adapter->stats.last_vfmprc,
2731 adapter->stats.vfmprc);
55fb277c
GR		 2732
2733 for (i = 0; i < adapter->num_rx_queues; i++) {
2734 adapter->hw_csum_rx_error +=
87e70ab9 2735 adapter->rx_ring[i]->hw_csum_rx_error;
87e70ab9 2736 adapter->rx_ring[i]->hw_csum_rx_error = 0;
55fb277c 2737 }
92915f71
GR		 2738}
2739
2740/**
9ac5c5cc 2741 * ixgbevf_service_timer - Timer Call-back
92915f71
GR		 2742 * @data: pointer to adapter cast into an unsigned long
2743 **/
9ac5c5cc 2744static void ixgbevf_service_timer(unsigned long data)
92915f71
GR		 2745{
2746 struct ixgbevf_adapter *adapter = (struct ixgbevf_adapter *)data;
e66c92ad 2747
9ac5c5cc
ET		 2748 /* Reset the timer */
2749 mod_timer(&adapter->service_timer, (HZ * 2) + jiffies);
2750
2751 ixgbevf_service_event_schedule(adapter);
e66c92ad
ET		 2752}
2753
9ac5c5cc 2754static void ixgbevf_reset_subtask(struct ixgbevf_adapter *adapter)
e66c92ad 2755{
d5dd7c3f 2756 if (!test_and_clear_bit(__IXGBEVF_RESET_REQUESTED, &adapter->state))
9ac5c5cc 2757 return;
e66c92ad 2758
e66c92ad
ET		 2759 /* If we're already down or resetting, just bail */
2760 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
2761 test_bit(__IXGBEVF_RESETTING, &adapter->state))
2762 return;
2763
2764 adapter->tx_timeout_count++;
2765
2766 ixgbevf_reinit_locked(adapter);
2767}
2768
dec0d8e4
JK		 2769/**
2770 * ixgbevf_check_hang_subtask - check for hung queues and dropped interrupts
2771 * @adapter: pointer to the device adapter structure
e66c92ad
ET		 2772 *
2773 * This function serves two purposes. First it strobes the interrupt lines
2774 * in order to make certain interrupts are occurring. Secondly it sets the
2775 * bits needed to check for TX hangs. As a result we should immediately
2776 * determine if a hang has occurred.
dec0d8e4 2777 **/
e66c92ad
ET		 2778static void ixgbevf_check_hang_subtask(struct ixgbevf_adapter *adapter)
2779{
92915f71 2780 struct ixgbe_hw *hw = &adapter->hw;
5f3600eb 2781 u32 eics = 0;
92915f71
GR		 2782 int i;
2783
e66c92ad
ET		 2784 /* If we're down or resetting, just bail */
2785 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
2786 test_bit(__IXGBEVF_RESETTING, &adapter->state))
2787 return;
92915f71 2788
e08400b7
ET		 2789 /* Force detection of hung controller */
2790 if (netif_carrier_ok(adapter->netdev)) {
2791 for (i = 0; i < adapter->num_tx_queues; i++)
2792 set_check_for_tx_hang(adapter->tx_ring[i]);
2793 }
2794
dec0d8e4 2795 /* get one bit for every active Tx/Rx interrupt vector */
92915f71
GR		 2796 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
2797 struct ixgbevf_q_vector *qv = adapter->q_vector[i];
9ac5c5cc 2798
6b43c446 2799 if (qv->rx.ring || qv->tx.ring)
5f3600eb 2800 eics |= 1 << i;
92915f71
GR		 2801 }
2802
e66c92ad 2803 /* Cause software interrupt to ensure rings are cleaned */
5f3600eb 2804 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, eics);
e66c92ad 2805}
92915f71 2806
e66c92ad
ET		 2807/**
2808 * ixgbevf_watchdog_update_link - update the link status
dec0d8e4 2809 * @adapter: pointer to the device adapter structure
e66c92ad
ET		 2810 **/
2811static void ixgbevf_watchdog_update_link(struct ixgbevf_adapter *adapter)
2812{
2813 struct ixgbe_hw *hw = &adapter->hw;
2814 u32 link_speed = adapter->link_speed;
2815 bool link_up = adapter->link_up;
2816 s32 err;
2817
2818 spin_lock_bh(&adapter->mbx_lock);
2819
2820 err = hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
2821
2822 spin_unlock_bh(&adapter->mbx_lock);
2823
2824 /* if check for link returns error we will need to reset */
2825 if (err && time_after(jiffies, adapter->last_reset + (10 * HZ))) {
d5dd7c3f 2826 set_bit(__IXGBEVF_RESET_REQUESTED, &adapter->state);
e66c92ad
ET		 2827 link_up = false;
2828 }
2829
2830 adapter->link_up = link_up;
2831 adapter->link_speed = link_speed;
92915f71
GR		 2832}
2833
e66c92ad
ET		 2834/**
2835 * ixgbevf_watchdog_link_is_up - update netif_carrier status and
2836 * print link up message
dec0d8e4 2837 * @adapter: pointer to the device adapter structure
e66c92ad
ET		 2838 **/
2839static void ixgbevf_watchdog_link_is_up(struct ixgbevf_adapter *adapter)
92915f71 2840{
e66c92ad 2841 struct net_device *netdev = adapter->netdev;
92915f71 2842
e66c92ad
ET		 2843 /* only continue if link was previously down */
2844 if (netif_carrier_ok(netdev))
92915f71
GR		 2845 return;
2846
e66c92ad
ET		 2847 dev_info(&adapter->pdev->dev, "NIC Link is Up %s\n",
2848 (adapter->link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
2849 "10 Gbps" :
2850 (adapter->link_speed == IXGBE_LINK_SPEED_1GB_FULL) ?
2851 "1 Gbps" :
2852 (adapter->link_speed == IXGBE_LINK_SPEED_100_FULL) ?
2853 "100 Mbps" :
2854 "unknown speed");
92915f71 2855
e66c92ad
ET		 2856 netif_carrier_on(netdev);
2857}
2858
2859/**
2860 * ixgbevf_watchdog_link_is_down - update netif_carrier status and
2861 * print link down message
dec0d8e4 2862 * @adapter: pointer to the adapter structure
e66c92ad
ET		 2863 **/
2864static void ixgbevf_watchdog_link_is_down(struct ixgbevf_adapter *adapter)
2865{
2866 struct net_device *netdev = adapter->netdev;
2867
2868 adapter->link_speed = 0;
2869
2870 /* only continue if link was up previously */
2871 if (!netif_carrier_ok(netdev))
2872 return;
2873
2874 dev_info(&adapter->pdev->dev, "NIC Link is Down\n");
2875
2876 netif_carrier_off(netdev);
92915f71
GR		 2877}
2878
2879/**
9ac5c5cc
ET		 2880 * ixgbevf_watchdog_subtask - worker thread to bring link up
2881 * @work: pointer to work_struct containing our data
2882 **/
2883static void ixgbevf_watchdog_subtask(struct ixgbevf_adapter *adapter)
2884{
2885 /* if interface is down do nothing */
2886 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
2887 test_bit(__IXGBEVF_RESETTING, &adapter->state))
2888 return;
2889
2890 ixgbevf_watchdog_update_link(adapter);
2891
2892 if (adapter->link_up)
2893 ixgbevf_watchdog_link_is_up(adapter);
2894 else
2895 ixgbevf_watchdog_link_is_down(adapter);
2896
2897 ixgbevf_update_stats(adapter);
2898}
2899
2900/**
2901 * ixgbevf_service_task - manages and runs subtasks
92915f71
GR		 2902 * @work: pointer to work_struct containing our data
2903 **/
9ac5c5cc 2904static void ixgbevf_service_task(struct work_struct *work)
92915f71
GR		 2905{
2906 struct ixgbevf_adapter *adapter = container_of(work,
2907 struct ixgbevf_adapter,
9ac5c5cc 2908 service_task);
92915f71 2909 struct ixgbe_hw *hw = &adapter->hw;
92915f71 2910
26597802
MR		 2911 if (IXGBE_REMOVED(hw->hw_addr)) {
2912 if (!test_bit(__IXGBEVF_DOWN, &adapter->state)) {
2913 rtnl_lock();
2914 ixgbevf_down(adapter);
2915 rtnl_unlock();
2916 }
2917 return;
2918 }
e66c92ad 2919
220fe050 2920 ixgbevf_queue_reset_subtask(adapter);
9ac5c5cc
ET		 2921 ixgbevf_reset_subtask(adapter);
2922 ixgbevf_watchdog_subtask(adapter);
e66c92ad
ET		 2923 ixgbevf_check_hang_subtask(adapter);
2924
9ac5c5cc 2925 ixgbevf_service_event_complete(adapter);
92915f71
GR		 2926}
2927
2928/**
2929 * ixgbevf_free_tx_resources - Free Tx Resources per Queue
92915f71
GR		 2930 * @tx_ring: Tx descriptor ring for a specific queue
2931 *
2932 * Free all transmit software resources
2933 **/
05d063aa 2934void ixgbevf_free_tx_resources(struct ixgbevf_ring *tx_ring)
92915f71 2935{
05d063aa 2936 ixgbevf_clean_tx_ring(tx_ring);
92915f71
GR		 2937
2938 vfree(tx_ring->tx_buffer_info);
2939 tx_ring->tx_buffer_info = NULL;
2940
de02decb
DS		 2941 /* if not set, then don't free */
2942 if (!tx_ring->desc)
2943 return;
2944
05d063aa 2945 dma_free_coherent(tx_ring->dev, tx_ring->size, tx_ring->desc,
2a1f8794 2946 tx_ring->dma);
92915f71
GR		 2947
2948 tx_ring->desc = NULL;
2949}
2950
2951/**
2952 * ixgbevf_free_all_tx_resources - Free Tx Resources for All Queues
2953 * @adapter: board private structure
2954 *
2955 * Free all transmit software resources
2956 **/
2957static void ixgbevf_free_all_tx_resources(struct ixgbevf_adapter *adapter)
2958{
2959 int i;
2960
2961 for (i = 0; i < adapter->num_tx_queues; i++)
87e70ab9 2962 if (adapter->tx_ring[i]->desc)
05d063aa 2963 ixgbevf_free_tx_resources(adapter->tx_ring[i]);
92915f71
GR		 2964}
2965
2966/**
2967 * ixgbevf_setup_tx_resources - allocate Tx resources (Descriptors)
dec0d8e4 2968 * @tx_ring: Tx descriptor ring (for a specific queue) to setup
92915f71
GR		 2969 *
2970 * Return 0 on success, negative on failure
2971 **/
05d063aa 2972int ixgbevf_setup_tx_resources(struct ixgbevf_ring *tx_ring)
92915f71 2973{
92915f71
GR		 2974 int size;
2975
2976 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
89bf67f1 2977 tx_ring->tx_buffer_info = vzalloc(size);
92915f71
GR		 2978 if (!tx_ring->tx_buffer_info)
2979 goto err;
92915f71
GR		 2980
2981 /* round up to nearest 4K */
2982 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
2983 tx_ring->size = ALIGN(tx_ring->size, 4096);
2984
05d063aa 2985 tx_ring->desc = dma_alloc_coherent(tx_ring->dev, tx_ring->size,
2a1f8794 2986 &tx_ring->dma, GFP_KERNEL);
92915f71
GR		 2987 if (!tx_ring->desc)
2988 goto err;
2989
92915f71
GR		 2990 return 0;
2991
2992err:
2993 vfree(tx_ring->tx_buffer_info);
2994 tx_ring->tx_buffer_info = NULL;
dec0d8e4 2995 hw_dbg(&adapter->hw, "Unable to allocate memory for the transmit descriptor ring\n");
92915f71
GR		 2996 return -ENOMEM;
2997}
2998
2999/**
3000 * ixgbevf_setup_all_tx_resources - allocate all queues Tx resources
3001 * @adapter: board private structure
3002 *
3003 * If this function returns with an error, then it's possible one or
3004 * more of the rings is populated (while the rest are not). It is the
3005 * callers duty to clean those orphaned rings.
3006 *
3007 * Return 0 on success, negative on failure
3008 **/
3009static int ixgbevf_setup_all_tx_resources(struct ixgbevf_adapter *adapter)
3010{
3011 int i, err = 0;
3012
3013 for (i = 0; i < adapter->num_tx_queues; i++) {
05d063aa 3014 err = ixgbevf_setup_tx_resources(adapter->tx_ring[i]);
92915f71
GR		 3015 if (!err)
3016 continue;
dec0d8e4 3017 hw_dbg(&adapter->hw, "Allocation for Tx Queue %u failed\n", i);
92915f71
GR		 3018 break;
3019 }
3020
3021 return err;
3022}
3023
3024/**
3025 * ixgbevf_setup_rx_resources - allocate Rx resources (Descriptors)
dec0d8e4 3026 * @rx_ring: Rx descriptor ring (for a specific queue) to setup
92915f71
GR		 3027 *
3028 * Returns 0 on success, negative on failure
3029 **/
05d063aa 3030int ixgbevf_setup_rx_resources(struct ixgbevf_ring *rx_ring)
92915f71 3031{
92915f71
GR		 3032 int size;
3033
3034 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
89bf67f1 3035 rx_ring->rx_buffer_info = vzalloc(size);
e404decb 3036 if (!rx_ring->rx_buffer_info)
05d063aa 3037 goto err;
92915f71
GR		 3038
3039 /* Round up to nearest 4K */
3040 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
3041 rx_ring->size = ALIGN(rx_ring->size, 4096);
3042
05d063aa 3043 rx_ring->desc = dma_alloc_coherent(rx_ring->dev, rx_ring->size,
2a1f8794 3044 &rx_ring->dma, GFP_KERNEL);
92915f71 3045
05d063aa
ET		 3046 if (!rx_ring->desc)
3047 goto err;
92915f71 3048
92915f71 3049 return 0;
05d063aa
ET		 3050err:
3051 vfree(rx_ring->rx_buffer_info);
3052 rx_ring->rx_buffer_info = NULL;
3053 dev_err(rx_ring->dev, "Unable to allocate memory for the Rx descriptor ring\n");
92915f71
GR		 3054 return -ENOMEM;
3055}
3056
3057/**
3058 * ixgbevf_setup_all_rx_resources - allocate all queues Rx resources
3059 * @adapter: board private structure
3060 *
3061 * If this function returns with an error, then it's possible one or
3062 * more of the rings is populated (while the rest are not). It is the
3063 * callers duty to clean those orphaned rings.
3064 *
3065 * Return 0 on success, negative on failure
3066 **/
3067static int ixgbevf_setup_all_rx_resources(struct ixgbevf_adapter *adapter)
3068{
3069 int i, err = 0;
3070
3071 for (i = 0; i < adapter->num_rx_queues; i++) {
05d063aa 3072 err = ixgbevf_setup_rx_resources(adapter->rx_ring[i]);
92915f71
GR		 3073 if (!err)
3074 continue;
dec0d8e4 3075 hw_dbg(&adapter->hw, "Allocation for Rx Queue %u failed\n", i);
92915f71
GR		 3076 break;
3077 }
3078 return err;
3079}
3080
3081/**
3082 * ixgbevf_free_rx_resources - Free Rx Resources
92915f71
GR		 3083 * @rx_ring: ring to clean the resources from
3084 *
3085 * Free all receive software resources
3086 **/
05d063aa 3087void ixgbevf_free_rx_resources(struct ixgbevf_ring *rx_ring)
92915f71 3088{
05d063aa 3089 ixgbevf_clean_rx_ring(rx_ring);
92915f71
GR		 3090
3091 vfree(rx_ring->rx_buffer_info);
3092 rx_ring->rx_buffer_info = NULL;
3093
05d063aa 3094 dma_free_coherent(rx_ring->dev, rx_ring->size, rx_ring->desc,
2a1f8794 3095 rx_ring->dma);
92915f71
GR		 3096
3097 rx_ring->desc = NULL;
3098}
3099
3100/**
3101 * ixgbevf_free_all_rx_resources - Free Rx Resources for All Queues
3102 * @adapter: board private structure
3103 *
3104 * Free all receive software resources
3105 **/
3106static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter)
3107{
3108 int i;
3109
3110 for (i = 0; i < adapter->num_rx_queues; i++)
87e70ab9 3111 if (adapter->rx_ring[i]->desc)
05d063aa 3112 ixgbevf_free_rx_resources(adapter->rx_ring[i]);
92915f71
GR		 3113}
3114
3115/**
3116 * ixgbevf_open - Called when a network interface is made active
3117 * @netdev: network interface device structure
3118 *
3119 * Returns 0 on success, negative value on failure
3120 *
3121 * The open entry point is called when a network interface is made
3122 * active by the system (IFF_UP). At this point all resources needed
3123 * for transmit and receive operations are allocated, the interrupt
3124 * handler is registered with the OS, the watchdog timer is started,
3125 * and the stack is notified that the interface is ready.
3126 **/
324d0867 3127int ixgbevf_open(struct net_device *netdev)
92915f71
GR		 3128{
3129 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3130 struct ixgbe_hw *hw = &adapter->hw;
3131 int err;
3132
a1f6c6b1 3133 /* A previous failure to open the device because of a lack of
3134 * available MSIX vector resources may have reset the number
3135 * of msix vectors variable to zero. The only way to recover
3136 * is to unload/reload the driver and hope that the system has
3137 * been able to recover some MSIX vector resources.
3138 */
3139 if (!adapter->num_msix_vectors)
3140 return -ENOMEM;
3141
92915f71
GR		 3142 if (hw->adapter_stopped) {
3143 ixgbevf_reset(adapter);
3144 /* if adapter is still stopped then PF isn't up and
dec0d8e4
JK		 3145 * the VF can't start.
3146 */
92915f71
GR		 3147 if (hw->adapter_stopped) {
3148 err = IXGBE_ERR_MBX;
dec0d8e4 3149 pr_err("Unable to start - perhaps the PF Driver isn't up yet\n");
92915f71
GR		 3150 goto err_setup_reset;
3151 }
3152 }
3153
d9bdb57f
ET		 3154 /* disallow open during test */
3155 if (test_bit(__IXGBEVF_TESTING, &adapter->state))
3156 return -EBUSY;
3157
3158 netif_carrier_off(netdev);
3159
92915f71
GR		 3160 /* allocate transmit descriptors */
3161 err = ixgbevf_setup_all_tx_resources(adapter);
3162 if (err)
3163 goto err_setup_tx;
3164
3165 /* allocate receive descriptors */
3166 err = ixgbevf_setup_all_rx_resources(adapter);
3167 if (err)
3168 goto err_setup_rx;
3169
3170 ixgbevf_configure(adapter);
3171
dec0d8e4 3172 /* Map the Tx/Rx rings to the vectors we were allotted.
92915f71
GR		 3173 * if request_irq will be called in this function map_rings
3174 * must be called *before* up_complete
3175 */
3176 ixgbevf_map_rings_to_vectors(adapter);
3177
92915f71
GR		 3178 err = ixgbevf_request_irq(adapter);
3179 if (err)
3180 goto err_req_irq;
3181
d9bdb57f 3182 ixgbevf_up_complete(adapter);
92915f71
GR		 3183
3184 return 0;
3185
3186err_req_irq:
3187 ixgbevf_down(adapter);
92915f71
GR		 3188err_setup_rx:
3189 ixgbevf_free_all_rx_resources(adapter);
3190err_setup_tx:
3191 ixgbevf_free_all_tx_resources(adapter);
3192 ixgbevf_reset(adapter);
3193
3194err_setup_reset:
3195
3196 return err;
3197}
3198
3199/**
3200 * ixgbevf_close - Disables a network interface
3201 * @netdev: network interface device structure
3202 *
3203 * Returns 0, this is not allowed to fail
3204 *
3205 * The close entry point is called when an interface is de-activated
3206 * by the OS. The hardware is still under the drivers control, but
3207 * needs to be disabled. A global MAC reset is issued to stop the
3208 * hardware, and all transmit and receive resources are freed.
3209 **/
324d0867 3210int ixgbevf_close(struct net_device *netdev)
92915f71
GR		 3211{
3212 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3213
3214 ixgbevf_down(adapter);
3215 ixgbevf_free_irq(adapter);
3216
3217 ixgbevf_free_all_tx_resources(adapter);
3218 ixgbevf_free_all_rx_resources(adapter);
3219
3220 return 0;
3221}
3222
220fe050
DS		 3223static void ixgbevf_queue_reset_subtask(struct ixgbevf_adapter *adapter)
3224{
3225 struct net_device *dev = adapter->netdev;
3226
d5dd7c3f
ET		 3227 if (!test_and_clear_bit(__IXGBEVF_QUEUE_RESET_REQUESTED,
3228 &adapter->state))
220fe050
DS		 3229 return;
3230
220fe050
DS		 3231 /* if interface is down do nothing */
3232 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
3233 test_bit(__IXGBEVF_RESETTING, &adapter->state))
3234 return;
3235
3236 /* Hardware has to reinitialize queues and interrupts to
3237 * match packet buffer alignment. Unfortunately, the
3238 * hardware is not flexible enough to do this dynamically.
3239 */
3240 if (netif_running(dev))
3241 ixgbevf_close(dev);
3242
3243 ixgbevf_clear_interrupt_scheme(adapter);
3244 ixgbevf_init_interrupt_scheme(adapter);
3245
3246 if (netif_running(dev))
3247 ixgbevf_open(dev);
3248}
3249
70a10e25
AD		 3250static void ixgbevf_tx_ctxtdesc(struct ixgbevf_ring *tx_ring,
3251 u32 vlan_macip_lens, u32 type_tucmd,
3252 u32 mss_l4len_idx)
92915f71
GR		 3253{
3254 struct ixgbe_adv_tx_context_desc *context_desc;
70a10e25 3255 u16 i = tx_ring->next_to_use;
92915f71 3256
70a10e25 3257 context_desc = IXGBEVF_TX_CTXTDESC(tx_ring, i);
92915f71 3258
70a10e25
AD		 3259 i++;
3260 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
92915f71 3261
70a10e25
AD		 3262 /* set bits to identify this as an advanced context descriptor */
3263 type_tucmd |= IXGBE_TXD_CMD_DEXT | IXGBE_ADVTXD_DTYP_CTXT;
92915f71 3264
70a10e25
AD		 3265 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
3266 context_desc->seqnum_seed = 0;
3267 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd);
3268 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
3269}
3270
3271static int ixgbevf_tso(struct ixgbevf_ring *tx_ring,
7ad1a093
ET		 3272 struct ixgbevf_tx_buffer *first,
3273 u8 *hdr_len)
70a10e25 3274{
7ad1a093 3275 struct sk_buff *skb = first->skb;
70a10e25
AD		 3276 u32 vlan_macip_lens, type_tucmd;
3277 u32 mss_l4len_idx, l4len;
8f12c034 3278 int err;
70a10e25 3279
01a545cf
ET		 3280 if (skb->ip_summed != CHECKSUM_PARTIAL)
3281 return 0;
3282
70a10e25
AD		 3283 if (!skb_is_gso(skb))
3284 return 0;
92915f71 3285
8f12c034
FR		 3286 err = skb_cow_head(skb, 0);
3287 if (err < 0)
3288 return err;
92915f71 3289
70a10e25
AD		 3290 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
3291 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
3292
10e4fb33 3293 if (first->protocol == htons(ETH_P_IP)) {
70a10e25 3294 struct iphdr *iph = ip_hdr(skb);
dec0d8e4 3295
70a10e25
AD		 3296 iph->tot_len = 0;
3297 iph->check = 0;
3298 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
3299 iph->daddr, 0,
3300 IPPROTO_TCP,
3301 0);
3302 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
7ad1a093
ET		 3303 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
3304 IXGBE_TX_FLAGS_CSUM |
3305 IXGBE_TX_FLAGS_IPV4;
70a10e25
AD		 3306 } else if (skb_is_gso_v6(skb)) {
3307 ipv6_hdr(skb)->payload_len = 0;
3308 tcp_hdr(skb)->check =
3309 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
3310 &ipv6_hdr(skb)->daddr,
3311 0, IPPROTO_TCP, 0);
7ad1a093
ET		 3312 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
3313 IXGBE_TX_FLAGS_CSUM;
70a10e25
AD		 3314 }
3315
3316 /* compute header lengths */
3317 l4len = tcp_hdrlen(skb);
3318 *hdr_len += l4len;
3319 *hdr_len = skb_transport_offset(skb) + l4len;
3320
dec0d8e4 3321 /* update GSO size and bytecount with header size */
7ad1a093
ET		 3322 first->gso_segs = skb_shinfo(skb)->gso_segs;
3323 first->bytecount += (first->gso_segs - 1) * *hdr_len;
3324
70a10e25
AD		 3325 /* mss_l4len_id: use 1 as index for TSO */
3326 mss_l4len_idx = l4len << IXGBE_ADVTXD_L4LEN_SHIFT;
3327 mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
3328 mss_l4len_idx |= 1 << IXGBE_ADVTXD_IDX_SHIFT;
3329
3330 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
3331 vlan_macip_lens = skb_network_header_len(skb);
3332 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
7ad1a093 3333 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
70a10e25
AD		 3334
3335 ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens,
3336 type_tucmd, mss_l4len_idx);
3337
3338 return 1;
92915f71
GR		 3339}
3340
cb2b3edb
AD		 3341static inline bool ixgbevf_ipv6_csum_is_sctp(struct sk_buff *skb)
3342{
3343 unsigned int offset = 0;
3344
3345 ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
3346
3347 return offset == skb_checksum_start_offset(skb);
3348}
3349
7ad1a093
ET		 3350static void ixgbevf_tx_csum(struct ixgbevf_ring *tx_ring,
3351 struct ixgbevf_tx_buffer *first)
92915f71 3352{
7ad1a093 3353 struct sk_buff *skb = first->skb;
70a10e25 3354 u32 vlan_macip_lens = 0;
70a10e25 3355 u32 type_tucmd = 0;
92915f71 3356
cb2b3edb
AD		 3357 if (skb->ip_summed != CHECKSUM_PARTIAL)
3358 goto no_csum;
92915f71 3359
cb2b3edb
AD		 3360 switch (skb->csum_offset) {
3361 case offsetof(struct tcphdr, check):
3362 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
3363 /* fall through */
3364 case offsetof(struct udphdr, check):
3365 break;
3366 case offsetof(struct sctphdr, checksum):
3367 /* validate that this is actually an SCTP request */
3368 if (((first->protocol == htons(ETH_P_IP)) &&
3369 (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
3370 ((first->protocol == htons(ETH_P_IPV6)) &&
3371 ixgbevf_ipv6_csum_is_sctp(skb))) {
3372 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_SCTP;
70a10e25 3373 break;
70a10e25 3374 }
cb2b3edb
AD		 3375 /* fall through */
3376 default:
3377 skb_checksum_help(skb);
3378 goto no_csum;
92915f71 3379 }
cb2b3edb
AD		 3380 /* update TX checksum flag */
3381 first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
3382 vlan_macip_lens = skb_checksum_start_offset(skb) -
3383 skb_network_offset(skb);
d34a614a 3384no_csum:
70a10e25
AD		 3385 /* vlan_macip_lens: MACLEN, VLAN tag */
3386 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
7ad1a093 3387 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
70a10e25 3388
cb2b3edb 3389 ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, 0);
92915f71
GR		 3390}
3391
29d37fa1 3392static __le32 ixgbevf_tx_cmd_type(u32 tx_flags)
92915f71 3393{
29d37fa1
ET		 3394 /* set type for advanced descriptor with frame checksum insertion */
3395 __le32 cmd_type = cpu_to_le32(IXGBE_ADVTXD_DTYP_DATA |
3396 IXGBE_ADVTXD_DCMD_IFCS |
3397 IXGBE_ADVTXD_DCMD_DEXT);
92915f71 3398
dec0d8e4 3399 /* set HW VLAN bit if VLAN is present */
29d37fa1
ET		 3400 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3401 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_VLE);
92915f71 3402
29d37fa1
ET		 3403 /* set segmentation enable bits for TSO/FSO */
3404 if (tx_flags & IXGBE_TX_FLAGS_TSO)
3405 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_TSE);
92915f71 3406
29d37fa1
ET		 3407 return cmd_type;
3408}
92915f71 3409
29d37fa1
ET		 3410static void ixgbevf_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
3411 u32 tx_flags, unsigned int paylen)
3412{
3413 __le32 olinfo_status = cpu_to_le32(paylen << IXGBE_ADVTXD_PAYLEN_SHIFT);
9bdfefd2 3414
29d37fa1
ET		 3415 /* enable L4 checksum for TSO and TX checksum offload */
3416 if (tx_flags & IXGBE_TX_FLAGS_CSUM)
3417 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_TXSM);
92915f71 3418
29d37fa1
ET		 3419 /* enble IPv4 checksum for TSO */
3420 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
3421 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_IXSM);
92915f71 3422
29d37fa1
ET		 3423 /* use index 1 context for TSO/FSO/FCOE */
3424 if (tx_flags & IXGBE_TX_FLAGS_TSO)
3425 olinfo_status |= cpu_to_le32(1 << IXGBE_ADVTXD_IDX_SHIFT);
92915f71 3426
29d37fa1
ET		 3427 /* Check Context must be set if Tx switch is enabled, which it
3428 * always is for case where virtual functions are running
3429 */
3430 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_CC);
92915f71 3431
29d37fa1
ET		 3432 tx_desc->read.olinfo_status = olinfo_status;
3433}
92915f71 3434
29d37fa1
ET		 3435static void ixgbevf_tx_map(struct ixgbevf_ring *tx_ring,
3436 struct ixgbevf_tx_buffer *first,
3437 const u8 hdr_len)
3438{
3439 dma_addr_t dma;
3440 struct sk_buff *skb = first->skb;
3441 struct ixgbevf_tx_buffer *tx_buffer;
3442 union ixgbe_adv_tx_desc *tx_desc;
3443 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
3444 unsigned int data_len = skb->data_len;
3445 unsigned int size = skb_headlen(skb);
3446 unsigned int paylen = skb->len - hdr_len;
3447 u32 tx_flags = first->tx_flags;
3448 __le32 cmd_type;
3449 u16 i = tx_ring->next_to_use;
9bdfefd2 3450
29d37fa1 3451 tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
92915f71 3452
29d37fa1
ET		 3453 ixgbevf_tx_olinfo_status(tx_desc, tx_flags, paylen);
3454 cmd_type = ixgbevf_tx_cmd_type(tx_flags);
7ad1a093 3455
29d37fa1
ET		 3456 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
3457 if (dma_mapping_error(tx_ring->dev, dma))
3458 goto dma_error;
92915f71 3459
29d37fa1
ET		 3460 /* record length, and DMA address */
3461 dma_unmap_len_set(first, len, size);
3462 dma_unmap_addr_set(first, dma, dma);
92915f71 3463
29d37fa1 3464 tx_desc->read.buffer_addr = cpu_to_le64(dma);
92915f71 3465
29d37fa1
ET		 3466 for (;;) {
3467 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
3468 tx_desc->read.cmd_type_len =
3469 cmd_type | cpu_to_le32(IXGBE_MAX_DATA_PER_TXD);
92915f71 3470
29d37fa1
ET		 3471 i++;
3472 tx_desc++;
3473 if (i == tx_ring->count) {
3474 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
3475 i = 0;
3476 }
92915f71 3477
29d37fa1
ET		 3478 dma += IXGBE_MAX_DATA_PER_TXD;
3479 size -= IXGBE_MAX_DATA_PER_TXD;
92915f71 3480
29d37fa1
ET		 3481 tx_desc->read.buffer_addr = cpu_to_le64(dma);
3482 tx_desc->read.olinfo_status = 0;
3483 }
92915f71 3484
29d37fa1
ET		 3485 if (likely(!data_len))
3486 break;
92915f71 3487
29d37fa1 3488 tx_desc->read.cmd_type_len = cmd_type | cpu_to_le32(size);
92915f71 3489
29d37fa1
ET		 3490 i++;
3491 tx_desc++;
3492 if (i == tx_ring->count) {
3493 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
3494 i = 0;
3495 }
92915f71 3496
29d37fa1
ET		 3497 size = skb_frag_size(frag);
3498 data_len -= size;
92915f71 3499
29d37fa1
ET		 3500 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
3501 DMA_TO_DEVICE);
3502 if (dma_mapping_error(tx_ring->dev, dma))
3503 goto dma_error;
70a10e25 3504
29d37fa1
ET		 3505 tx_buffer = &tx_ring->tx_buffer_info[i];
3506 dma_unmap_len_set(tx_buffer, len, size);
3507 dma_unmap_addr_set(tx_buffer, dma, dma);
92915f71 3508
29d37fa1
ET		 3509 tx_desc->read.buffer_addr = cpu_to_le64(dma);
3510 tx_desc->read.olinfo_status = 0;
3511
3512 frag++;
70a10e25 3513 }
92915f71 3514
29d37fa1
ET		 3515 /* write last descriptor with RS and EOP bits */
3516 cmd_type |= cpu_to_le32(size) | cpu_to_le32(IXGBE_TXD_CMD);
3517 tx_desc->read.cmd_type_len = cmd_type;
3518
3519 /* set the timestamp */
3520 first->time_stamp = jiffies;
3521
3522 /* Force memory writes to complete before letting h/w know there
3523 * are new descriptors to fetch. (Only applicable for weak-ordered
3524 * memory model archs, such as IA-64).
3525 *
3526 * We also need this memory barrier (wmb) to make certain all of the
3527 * status bits have been updated before next_to_watch is written.
70a10e25 3528 */
29d37fa1 3529 wmb();
92915f71 3530
29d37fa1
ET		 3531 /* set next_to_watch value indicating a packet is present */
3532 first->next_to_watch = tx_desc;
92915f71 3533
29d37fa1
ET		 3534 i++;
3535 if (i == tx_ring->count)
3536 i = 0;
9bdfefd2 3537
29d37fa1 3538 tx_ring->next_to_use = i;
92915f71 3539
29d37fa1 3540 /* notify HW of packet */
06380db6 3541 ixgbevf_write_tail(tx_ring, i);
29d37fa1
ET		 3542
3543 return;
3544dma_error:
3545 dev_err(tx_ring->dev, "TX DMA map failed\n");
3546
3547 /* clear dma mappings for failed tx_buffer_info map */
3548 for (;;) {
3549 tx_buffer = &tx_ring->tx_buffer_info[i];
3550 ixgbevf_unmap_and_free_tx_resource(tx_ring, tx_buffer);
3551 if (tx_buffer == first)
3552 break;
3553 if (i == 0)
3554 i = tx_ring->count;
3555 i--;
3556 }
92915f71 3557
92915f71 3558 tx_ring->next_to_use = i;
92915f71
GR		 3559}
3560
fb40195c 3561static int __ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
92915f71 3562{
fb40195c 3563 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
92915f71
GR		 3564 /* Herbert's original patch had:
3565 * smp_mb__after_netif_stop_queue();
dec0d8e4
JK		 3566 * but since that doesn't exist yet, just open code it.
3567 */
92915f71
GR		 3568 smp_mb();
3569
3570 /* We need to check again in a case another CPU has just
dec0d8e4
JK		 3571 * made room available.
3572 */
f880d07b 3573 if (likely(ixgbevf_desc_unused(tx_ring) < size))
92915f71
GR		 3574 return -EBUSY;
3575
3576 /* A reprieve! - use start_queue because it doesn't call schedule */
fb40195c 3577 netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
095e2617
ET		 3578 ++tx_ring->tx_stats.restart_queue;
3579
92915f71
GR		 3580 return 0;
3581}
3582
fb40195c 3583static int ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
92915f71 3584{
f880d07b 3585 if (likely(ixgbevf_desc_unused(tx_ring) >= size))
92915f71 3586 return 0;
fb40195c 3587 return __ixgbevf_maybe_stop_tx(tx_ring, size);
92915f71
GR		 3588}
3589
3590static int ixgbevf_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3591{
3592 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
7ad1a093 3593 struct ixgbevf_tx_buffer *first;
92915f71 3594 struct ixgbevf_ring *tx_ring;
7ad1a093
ET		 3595 int tso;
3596 u32 tx_flags = 0;
3595990a
AD		 3597 u16 count = TXD_USE_COUNT(skb_headlen(skb));
3598#if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
3599 unsigned short f;
3600#endif
7ad1a093 3601 u8 hdr_len = 0;
f9d08f16 3602 u8 *dst_mac = skb_header_pointer(skb, 0, 0, NULL);
7ad1a093 3603
46acc460 3604 if (!dst_mac || is_link_local_ether_addr(dst_mac)) {
e7fcd543 3605 dev_kfree_skb_any(skb);
f9d08f16
GR		 3606 return NETDEV_TX_OK;
3607 }
92915f71 3608
7ad1a093 3609 tx_ring = adapter->tx_ring[skb->queue_mapping];
92915f71 3610
dec0d8e4 3611 /* need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
3595990a
AD		 3612 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
3613 * + 2 desc gap to keep tail from touching head,
3614 * + 1 desc for context descriptor,
3615 * otherwise try next time
3616 */
3617#if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
3618 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
3619 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
3620#else
3621 count += skb_shinfo(skb)->nr_frags;
3622#endif
fb40195c 3623 if (ixgbevf_maybe_stop_tx(tx_ring, count + 3)) {
095e2617 3624 tx_ring->tx_stats.tx_busy++;
3595990a
AD		 3625 return NETDEV_TX_BUSY;
3626 }
3627
7ad1a093
ET		 3628 /* record the location of the first descriptor for this packet */
3629 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
3630 first->skb = skb;
3631 first->bytecount = skb->len;
3632 first->gso_segs = 1;
3633
df8a39de
JP		 3634 if (skb_vlan_tag_present(skb)) {
3635 tx_flags |= skb_vlan_tag_get(skb);
92915f71
GR		 3636 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
3637 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3638 }
3639
7ad1a093
ET		 3640 /* record initial flags and protocol */
3641 first->tx_flags = tx_flags;
3642 first->protocol = vlan_get_protocol(skb);
92915f71 3643
7ad1a093
ET		 3644 tso = ixgbevf_tso(tx_ring, first, &hdr_len);
3645 if (tso < 0)
3646 goto out_drop;
b5d217f3 3647 else if (!tso)
7ad1a093 3648 ixgbevf_tx_csum(tx_ring, first);
92915f71 3649
29d37fa1 3650 ixgbevf_tx_map(tx_ring, first, hdr_len);
70a10e25 3651
fb40195c 3652 ixgbevf_maybe_stop_tx(tx_ring, DESC_NEEDED);
92915f71 3653
7ad1a093
ET		 3654 return NETDEV_TX_OK;
3655
3656out_drop:
3657 dev_kfree_skb_any(first->skb);
3658 first->skb = NULL;
3659
92915f71
GR		 3660 return NETDEV_TX_OK;
3661}
3662
92915f71
GR		 3663/**
3664 * ixgbevf_set_mac - Change the Ethernet Address of the NIC
3665 * @netdev: network interface device structure
3666 * @p: pointer to an address structure
3667 *
3668 * Returns 0 on success, negative on failure
3669 **/
3670static int ixgbevf_set_mac(struct net_device *netdev, void *p)
3671{
3672 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3673 struct ixgbe_hw *hw = &adapter->hw;
3674 struct sockaddr *addr = p;
32ca6868 3675 int err;
92915f71
GR		 3676
3677 if (!is_valid_ether_addr(addr->sa_data))
3678 return -EADDRNOTAVAIL;
3679
55fdd45b 3680 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 3681
32ca6868 3682 err = hw->mac.ops.set_rar(hw, 0, addr->sa_data, 0);
92915f71 3683
55fdd45b 3684 spin_unlock_bh(&adapter->mbx_lock);
1c55ed76 3685
32ca6868
ET		 3686 if (err)
3687 return -EPERM;
3688
3689 ether_addr_copy(hw->mac.addr, addr->sa_data);
3690 ether_addr_copy(netdev->dev_addr, addr->sa_data);
3691
92915f71
GR		 3692 return 0;
3693}
3694
3695/**
3696 * ixgbevf_change_mtu - Change the Maximum Transfer Unit
3697 * @netdev: network interface device structure
3698 * @new_mtu: new value for maximum frame size
3699 *
3700 * Returns 0 on success, negative on failure
3701 **/
3702static int ixgbevf_change_mtu(struct net_device *netdev, int new_mtu)
3703{
3704 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
bad17234 3705 struct ixgbe_hw *hw = &adapter->hw;
92915f71 3706 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
69bfbec4 3707 int max_possible_frame = MAXIMUM_ETHERNET_VLAN_SIZE;
69bfbec4 3708
56e94095
AD		 3709 switch (adapter->hw.api_version) {
3710 case ixgbe_mbox_api_11:
94cf66f8 3711 case ixgbe_mbox_api_12:
69bfbec4 3712 max_possible_frame = IXGBE_MAX_JUMBO_FRAME_SIZE;
56e94095
AD		 3713 break;
3714 default:
47068b0d 3715 if (adapter->hw.mac.type != ixgbe_mac_82599_vf)
56e94095
AD		 3716 max_possible_frame = IXGBE_MAX_JUMBO_FRAME_SIZE;
3717 break;
3718 }
92915f71
GR		 3719
3720 /* MTU < 68 is an error and causes problems on some kernels */
69bfbec4 3721 if ((new_mtu < 68) || (max_frame > max_possible_frame))
92915f71
GR		 3722 return -EINVAL;
3723
bad17234 3724 hw_dbg(hw, "changing MTU from %d to %d\n",
92915f71
GR		 3725 netdev->mtu, new_mtu);
3726 /* must set new MTU before calling down or up */
3727 netdev->mtu = new_mtu;
3728
bad17234
ET		 3729 /* notify the PF of our intent to use this size of frame */
3730 ixgbevf_rlpml_set_vf(hw, max_frame);
92915f71
GR		 3731
3732 return 0;
3733}
3734
688ff32d
ET		 3735#ifdef CONFIG_NET_POLL_CONTROLLER
3736/* Polling 'interrupt' - used by things like netconsole to send skbs
3737 * without having to re-enable interrupts. It's not called while
3738 * the interrupt routine is executing.
3739 */
3740static void ixgbevf_netpoll(struct net_device *netdev)
3741{
3742 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3743 int i;
3744
3745 /* if interface is down do nothing */
3746 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
3747 return;
3748 for (i = 0; i < adapter->num_rx_queues; i++)
3749 ixgbevf_msix_clean_rings(0, adapter->q_vector[i]);
3750}
3751#endif /* CONFIG_NET_POLL_CONTROLLER */
3752
0ac1e8ce 3753static int ixgbevf_suspend(struct pci_dev *pdev, pm_message_t state)
92915f71
GR		 3754{
3755 struct net_device *netdev = pci_get_drvdata(pdev);
3756 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
0ac1e8ce
AD		 3757#ifdef CONFIG_PM
3758 int retval = 0;
3759#endif
92915f71
GR		 3760
3761 netif_device_detach(netdev);
3762
3763 if (netif_running(netdev)) {
0ac1e8ce 3764 rtnl_lock();
92915f71
GR		 3765 ixgbevf_down(adapter);
3766 ixgbevf_free_irq(adapter);
3767 ixgbevf_free_all_tx_resources(adapter);
3768 ixgbevf_free_all_rx_resources(adapter);
0ac1e8ce 3769 rtnl_unlock();
92915f71
GR		 3770 }
3771
0ac1e8ce 3772 ixgbevf_clear_interrupt_scheme(adapter);
92915f71 3773
0ac1e8ce
AD		 3774#ifdef CONFIG_PM
3775 retval = pci_save_state(pdev);
3776 if (retval)
3777 return retval;
92915f71 3778
0ac1e8ce 3779#endif
bc0c7151
MR		 3780 if (!test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state))
3781 pci_disable_device(pdev);
0ac1e8ce
AD		 3782
3783 return 0;
3784}
3785
3786#ifdef CONFIG_PM
3787static int ixgbevf_resume(struct pci_dev *pdev)
3788{
27ae2967
WY		 3789 struct net_device *netdev = pci_get_drvdata(pdev);
3790 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
0ac1e8ce
AD		 3791 u32 err;
3792
0ac1e8ce 3793 pci_restore_state(pdev);
dec0d8e4 3794 /* pci_restore_state clears dev->state_saved so call
0ac1e8ce
AD		 3795 * pci_save_state to restore it.
3796 */
3797 pci_save_state(pdev);
3798
3799 err = pci_enable_device_mem(pdev);
3800 if (err) {
3801 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
3802 return err;
3803 }
4e857c58 3804 smp_mb__before_atomic();
bc0c7151 3805 clear_bit(__IXGBEVF_DISABLED, &adapter->state);
0ac1e8ce
AD		 3806 pci_set_master(pdev);
3807
798e381a
DS		 3808 ixgbevf_reset(adapter);
3809
0ac1e8ce
AD		 3810 rtnl_lock();
3811 err = ixgbevf_init_interrupt_scheme(adapter);
3812 rtnl_unlock();
3813 if (err) {
3814 dev_err(&pdev->dev, "Cannot initialize interrupts\n");
3815 return err;
3816 }
3817
0ac1e8ce
AD		 3818 if (netif_running(netdev)) {
3819 err = ixgbevf_open(netdev);
3820 if (err)
3821 return err;
3822 }
3823
3824 netif_device_attach(netdev);
3825
3826 return err;
3827}
3828
3829#endif /* CONFIG_PM */
3830static void ixgbevf_shutdown(struct pci_dev *pdev)
3831{
3832 ixgbevf_suspend(pdev, PMSG_SUSPEND);
92915f71
GR		 3833}
3834
4197aa7b
ED		 3835static struct rtnl_link_stats64 *ixgbevf_get_stats(struct net_device *netdev,
3836 struct rtnl_link_stats64 *stats)
3837{
3838 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3839 unsigned int start;
3840 u64 bytes, packets;
3841 const struct ixgbevf_ring *ring;
3842 int i;
3843
3844 ixgbevf_update_stats(adapter);
3845
3846 stats->multicast = adapter->stats.vfmprc - adapter->stats.base_vfmprc;
3847
3848 for (i = 0; i < adapter->num_rx_queues; i++) {
87e70ab9 3849 ring = adapter->rx_ring[i];
4197aa7b 3850 do {
57a7744e 3851 start = u64_stats_fetch_begin_irq(&ring->syncp);
095e2617
ET		 3852 bytes = ring->stats.bytes;
3853 packets = ring->stats.packets;
57a7744e 3854 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
4197aa7b
ED		 3855 stats->rx_bytes += bytes;
3856 stats->rx_packets += packets;
3857 }
3858
3859 for (i = 0; i < adapter->num_tx_queues; i++) {
87e70ab9 3860 ring = adapter->tx_ring[i];
4197aa7b 3861 do {
57a7744e 3862 start = u64_stats_fetch_begin_irq(&ring->syncp);
095e2617
ET		 3863 bytes = ring->stats.bytes;
3864 packets = ring->stats.packets;
57a7744e 3865 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
4197aa7b
ED		 3866 stats->tx_bytes += bytes;
3867 stats->tx_packets += packets;
3868 }
3869
3870 return stats;
3871}
3872
0ac1e8ce 3873static const struct net_device_ops ixgbevf_netdev_ops = {
c12db769
SH		 3874 .ndo_open = ixgbevf_open,
3875 .ndo_stop = ixgbevf_close,
3876 .ndo_start_xmit = ixgbevf_xmit_frame,
3877 .ndo_set_rx_mode = ixgbevf_set_rx_mode,
4197aa7b 3878 .ndo_get_stats64 = ixgbevf_get_stats,
92915f71 3879 .ndo_validate_addr = eth_validate_addr,
c12db769
SH		 3880 .ndo_set_mac_address = ixgbevf_set_mac,
3881 .ndo_change_mtu = ixgbevf_change_mtu,
3882 .ndo_tx_timeout = ixgbevf_tx_timeout,
c12db769
SH		 3883 .ndo_vlan_rx_add_vid = ixgbevf_vlan_rx_add_vid,
3884 .ndo_vlan_rx_kill_vid = ixgbevf_vlan_rx_kill_vid,
c777cdfa
JK		 3885#ifdef CONFIG_NET_RX_BUSY_POLL
3886 .ndo_busy_poll = ixgbevf_busy_poll_recv,
3887#endif
688ff32d
ET		 3888#ifdef CONFIG_NET_POLL_CONTROLLER
3889 .ndo_poll_controller = ixgbevf_netpoll,
3890#endif
0f90300f 3891 .ndo_features_check = passthru_features_check,
92915f71 3892};
92915f71
GR		 3893
3894static void ixgbevf_assign_netdev_ops(struct net_device *dev)
3895{
0ac1e8ce 3896 dev->netdev_ops = &ixgbevf_netdev_ops;
92915f71
GR		 3897 ixgbevf_set_ethtool_ops(dev);
3898 dev->watchdog_timeo = 5 * HZ;
3899}
3900
3901/**
3902 * ixgbevf_probe - Device Initialization Routine
3903 * @pdev: PCI device information struct
3904 * @ent: entry in ixgbevf_pci_tbl
3905 *
3906 * Returns 0 on success, negative on failure
3907 *
3908 * ixgbevf_probe initializes an adapter identified by a pci_dev structure.
3909 * The OS initialization, configuring of the adapter private structure,
3910 * and a hardware reset occur.
3911 **/
1dd06ae8 3912static int ixgbevf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
92915f71
GR		 3913{
3914 struct net_device *netdev;
3915 struct ixgbevf_adapter *adapter = NULL;
3916 struct ixgbe_hw *hw = NULL;
3917 const struct ixgbevf_info *ii = ixgbevf_info_tbl[ent->driver_data];
92915f71 3918 int err, pci_using_dac;
0333464f 3919 bool disable_dev = false;
92915f71
GR		 3920
3921 err = pci_enable_device(pdev);
3922 if (err)
3923 return err;
3924
53567aa4 3925 if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
92915f71
GR		 3926 pci_using_dac = 1;
3927 } else {
53567aa4 3928 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
92915f71 3929 if (err) {
dec0d8e4 3930 dev_err(&pdev->dev, "No usable DMA configuration, aborting\n");
53567aa4 3931 goto err_dma;
92915f71
GR		 3932 }
3933 pci_using_dac = 0;
3934 }
3935
3936 err = pci_request_regions(pdev, ixgbevf_driver_name);
3937 if (err) {
3938 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
3939 goto err_pci_reg;
3940 }
3941
3942 pci_set_master(pdev);
3943
92915f71
GR		 3944 netdev = alloc_etherdev_mq(sizeof(struct ixgbevf_adapter),
3945 MAX_TX_QUEUES);
92915f71
GR		 3946 if (!netdev) {
3947 err = -ENOMEM;
3948 goto err_alloc_etherdev;
3949 }
3950
3951 SET_NETDEV_DEV(netdev, &pdev->dev);
3952
92915f71
GR		 3953 adapter = netdev_priv(netdev);
3954
3955 adapter->netdev = netdev;
3956 adapter->pdev = pdev;
3957 hw = &adapter->hw;
3958 hw->back = adapter;
b3f4d599 3959 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
92915f71 3960
dec0d8e4 3961 /* call save state here in standalone driver because it relies on
92915f71
GR		 3962 * adapter struct to exist, and needs to call netdev_priv
3963 */
3964 pci_save_state(pdev);
3965
3966 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
3967 pci_resource_len(pdev, 0));
dbf8b0d8 3968 adapter->io_addr = hw->hw_addr;
92915f71
GR		 3969 if (!hw->hw_addr) {
3970 err = -EIO;
3971 goto err_ioremap;
3972 }
3973
3974 ixgbevf_assign_netdev_ops(netdev);
3975
dec0d8e4 3976 /* Setup HW API */
92915f71
GR		 3977 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
3978 hw->mac.type = ii->mac;
3979
3980 memcpy(&hw->mbx.ops, &ixgbevf_mbx_ops,
f416dfc0 3981 sizeof(struct ixgbe_mbx_operations));
92915f71 3982
92915f71
GR		 3983 /* setup the private structure */
3984 err = ixgbevf_sw_init(adapter);
1a0d6ae5
DK		 3985 if (err)
3986 goto err_sw_init;
3987
3988 /* The HW MAC address was set and/or determined in sw_init */
1a0d6ae5
DK		 3989 if (!is_valid_ether_addr(netdev->dev_addr)) {
3990 pr_err("invalid MAC address\n");
3991 err = -EIO;
3992 goto err_sw_init;
3993 }
92915f71 3994
471a76de 3995 netdev->hw_features = NETIF_F_SG |
dec0d8e4
JK		 3996 NETIF_F_TSO |
3997 NETIF_F_TSO6 |
cb2b3edb
AD		 3998 NETIF_F_RXCSUM |
3999 NETIF_F_HW_CSUM |
4000 NETIF_F_SCTP_CRC;
471a76de
MM		 4001
4002 netdev->features = netdev->hw_features |
f646968f
PM		 4003 NETIF_F_HW_VLAN_CTAG_TX |
4004 NETIF_F_HW_VLAN_CTAG_RX |
4005 NETIF_F_HW_VLAN_CTAG_FILTER;
92915f71 4006
cb2b3edb
AD		 4007 netdev->vlan_features |= NETIF_F_SG |
4008 NETIF_F_TSO |
39f35a37 4009 NETIF_F_TSO6 |
cb2b3edb
AD		 4010 NETIF_F_HW_CSUM |
4011 NETIF_F_SCTP_CRC;
4012
4013 netdev->mpls_features |= NETIF_F_HW_CSUM;
4014 netdev->hw_enc_features |= NETIF_F_HW_CSUM;
92915f71
GR		 4015
4016 if (pci_using_dac)
4017 netdev->features |= NETIF_F_HIGHDMA;
4018
01789349
JP		 4019 netdev->priv_flags |= IFF_UNICAST_FLT;
4020
ea699569
MR		 4021 if (IXGBE_REMOVED(hw->hw_addr)) {
4022 err = -EIO;
4023 goto err_sw_init;
4024 }
9ac5c5cc
ET		 4025
4026 setup_timer(&adapter->service_timer, &ixgbevf_service_timer,
4027 (unsigned long)adapter);
4028
4029 INIT_WORK(&adapter->service_task, ixgbevf_service_task);
4030 set_bit(__IXGBEVF_SERVICE_INITED, &adapter->state);
4031 clear_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state);
92915f71
GR		 4032
4033 err = ixgbevf_init_interrupt_scheme(adapter);
4034 if (err)
4035 goto err_sw_init;
4036
92915f71
GR		 4037 strcpy(netdev->name, "eth%d");
4038
4039 err = register_netdev(netdev);
4040 if (err)
4041 goto err_register;
4042
0333464f 4043 pci_set_drvdata(pdev, netdev);
5d426ad1
GR		 4044 netif_carrier_off(netdev);
4045
33bd9f60
GR		 4046 ixgbevf_init_last_counter_stats(adapter);
4047
47068b0d
ET		 4048 /* print the VF info */
4049 dev_info(&pdev->dev, "%pM\n", netdev->dev_addr);
4050 dev_info(&pdev->dev, "MAC: %d\n", hw->mac.type);
92915f71 4051
47068b0d
ET		 4052 switch (hw->mac.type) {
4053 case ixgbe_mac_X550_vf:
4054 dev_info(&pdev->dev, "Intel(R) X550 Virtual Function\n");
4055 break;
4056 case ixgbe_mac_X540_vf:
4057 dev_info(&pdev->dev, "Intel(R) X540 Virtual Function\n");
4058 break;
4059 case ixgbe_mac_82599_vf:
4060 default:
4061 dev_info(&pdev->dev, "Intel(R) 82599 Virtual Function\n");
4062 break;
4063 }
92915f71 4064
92915f71
GR		 4065 return 0;
4066
4067err_register:
0ac1e8ce 4068 ixgbevf_clear_interrupt_scheme(adapter);
92915f71
GR		 4069err_sw_init:
4070 ixgbevf_reset_interrupt_capability(adapter);
dbf8b0d8 4071 iounmap(adapter->io_addr);
92915f71 4072err_ioremap:
0333464f 4073 disable_dev = !test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state);
92915f71
GR		 4074 free_netdev(netdev);
4075err_alloc_etherdev:
4076 pci_release_regions(pdev);
4077err_pci_reg:
4078err_dma:
0333464f 4079 if (!adapter || disable_dev)
bc0c7151 4080 pci_disable_device(pdev);
92915f71
GR		 4081 return err;
4082}
4083
4084/**
4085 * ixgbevf_remove - Device Removal Routine
4086 * @pdev: PCI device information struct
4087 *
4088 * ixgbevf_remove is called by the PCI subsystem to alert the driver
4089 * that it should release a PCI device. The could be caused by a
4090 * Hot-Plug event, or because the driver is going to be removed from
4091 * memory.
4092 **/
9f9a12f8 4093static void ixgbevf_remove(struct pci_dev *pdev)
92915f71
GR		 4094{
4095 struct net_device *netdev = pci_get_drvdata(pdev);
0333464f
ET		 4096 struct ixgbevf_adapter *adapter;
4097 bool disable_dev;
4098
4099 if (!netdev)
4100 return;
4101
4102 adapter = netdev_priv(netdev);
92915f71 4103
2e7cfbdd 4104 set_bit(__IXGBEVF_REMOVING, &adapter->state);
9ac5c5cc 4105 cancel_work_sync(&adapter->service_task);
92915f71 4106
fd13a9ab 4107 if (netdev->reg_state == NETREG_REGISTERED)
92915f71 4108 unregister_netdev(netdev);
92915f71 4109
0ac1e8ce 4110 ixgbevf_clear_interrupt_scheme(adapter);
92915f71
GR		 4111 ixgbevf_reset_interrupt_capability(adapter);
4112
dbf8b0d8 4113 iounmap(adapter->io_addr);
92915f71
GR		 4114 pci_release_regions(pdev);
4115
4116 hw_dbg(&adapter->hw, "Remove complete\n");
4117
0333464f 4118 disable_dev = !test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state);
92915f71
GR		 4119 free_netdev(netdev);
4120
0333464f 4121 if (disable_dev)
bc0c7151 4122 pci_disable_device(pdev);
92915f71
GR		 4123}
4124
9f19f31d
AD		 4125/**
4126 * ixgbevf_io_error_detected - called when PCI error is detected
4127 * @pdev: Pointer to PCI device
4128 * @state: The current pci connection state
4129 *
4130 * This function is called after a PCI bus error affecting
4131 * this device has been detected.
dec0d8e4 4132 **/
9f19f31d
AD		 4133static pci_ers_result_t ixgbevf_io_error_detected(struct pci_dev *pdev,
4134 pci_channel_state_t state)
4135{
4136 struct net_device *netdev = pci_get_drvdata(pdev);
4137 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4138
9ac5c5cc 4139 if (!test_bit(__IXGBEVF_SERVICE_INITED, &adapter->state))
ea699569
MR		 4140 return PCI_ERS_RESULT_DISCONNECT;
4141
bc0c7151 4142 rtnl_lock();
9f19f31d
AD		 4143 netif_device_detach(netdev);
4144
bc0c7151
MR		 4145 if (state == pci_channel_io_perm_failure) {
4146 rtnl_unlock();
9f19f31d 4147 return PCI_ERS_RESULT_DISCONNECT;
bc0c7151 4148 }
9f19f31d
AD		 4149
4150 if (netif_running(netdev))
4151 ixgbevf_down(adapter);
4152
bc0c7151
MR		 4153 if (!test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state))
4154 pci_disable_device(pdev);
4155 rtnl_unlock();
9f19f31d
AD		 4156
4157 /* Request a slot slot reset. */
4158 return PCI_ERS_RESULT_NEED_RESET;
4159}
4160
4161/**
4162 * ixgbevf_io_slot_reset - called after the pci bus has been reset.
4163 * @pdev: Pointer to PCI device
4164 *
4165 * Restart the card from scratch, as if from a cold-boot. Implementation
4166 * resembles the first-half of the ixgbevf_resume routine.
dec0d8e4 4167 **/
9f19f31d
AD		 4168static pci_ers_result_t ixgbevf_io_slot_reset(struct pci_dev *pdev)
4169{
4170 struct net_device *netdev = pci_get_drvdata(pdev);
4171 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4172
4173 if (pci_enable_device_mem(pdev)) {
4174 dev_err(&pdev->dev,
4175 "Cannot re-enable PCI device after reset.\n");
4176 return PCI_ERS_RESULT_DISCONNECT;
4177 }
4178
4e857c58 4179 smp_mb__before_atomic();
bc0c7151 4180 clear_bit(__IXGBEVF_DISABLED, &adapter->state);
9f19f31d
AD		 4181 pci_set_master(pdev);
4182
4183 ixgbevf_reset(adapter);
4184
4185 return PCI_ERS_RESULT_RECOVERED;
4186}
4187
4188/**
4189 * ixgbevf_io_resume - called when traffic can start flowing again.
4190 * @pdev: Pointer to PCI device
4191 *
4192 * This callback is called when the error recovery driver tells us that
4193 * its OK to resume normal operation. Implementation resembles the
4194 * second-half of the ixgbevf_resume routine.
dec0d8e4 4195 **/
9f19f31d
AD		 4196static void ixgbevf_io_resume(struct pci_dev *pdev)
4197{
4198 struct net_device *netdev = pci_get_drvdata(pdev);
4199 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4200
4201 if (netif_running(netdev))
4202 ixgbevf_up(adapter);
4203
4204 netif_device_attach(netdev);
4205}
4206
4207/* PCI Error Recovery (ERS) */
3646f0e5 4208static const struct pci_error_handlers ixgbevf_err_handler = {
9f19f31d
AD		 4209 .error_detected = ixgbevf_io_error_detected,
4210 .slot_reset = ixgbevf_io_slot_reset,
4211 .resume = ixgbevf_io_resume,
4212};
4213
92915f71 4214static struct pci_driver ixgbevf_driver = {
dec0d8e4
JK		 4215 .name = ixgbevf_driver_name,
4216 .id_table = ixgbevf_pci_tbl,
4217 .probe = ixgbevf_probe,
4218 .remove = ixgbevf_remove,
0ac1e8ce
AD		 4219#ifdef CONFIG_PM
4220 /* Power Management Hooks */
dec0d8e4
JK		 4221 .suspend = ixgbevf_suspend,
4222 .resume = ixgbevf_resume,
0ac1e8ce 4223#endif
dec0d8e4
JK		 4224 .shutdown = ixgbevf_shutdown,
4225 .err_handler = &ixgbevf_err_handler
92915f71
GR		 4226};
4227
4228/**
65d676c8 4229 * ixgbevf_init_module - Driver Registration Routine
92915f71 4230 *
65d676c8 4231 * ixgbevf_init_module is the first routine called when the driver is
92915f71
GR		 4232 * loaded. All it does is register with the PCI subsystem.
4233 **/
4234static int __init ixgbevf_init_module(void)
4235{
dbd9636e
JK		 4236 pr_info("%s - version %s\n", ixgbevf_driver_string,
4237 ixgbevf_driver_version);
92915f71 4238
dbd9636e 4239 pr_info("%s\n", ixgbevf_copyright);
40a13e24
MR		 4240 ixgbevf_wq = create_singlethread_workqueue(ixgbevf_driver_name);
4241 if (!ixgbevf_wq) {
4242 pr_err("%s: Failed to create workqueue\n", ixgbevf_driver_name);
4243 return -ENOMEM;
4244 }
92915f71 4245
50985b5f 4246 return pci_register_driver(&ixgbevf_driver);
92915f71
GR		 4247}
4248
4249module_init(ixgbevf_init_module);
4250
4251/**
65d676c8 4252 * ixgbevf_exit_module - Driver Exit Cleanup Routine
92915f71 4253 *
65d676c8 4254 * ixgbevf_exit_module is called just before the driver is removed
92915f71
GR		 4255 * from memory.
4256 **/
4257static void __exit ixgbevf_exit_module(void)
4258{
4259 pci_unregister_driver(&ixgbevf_driver);
40a13e24
MR		 4260 if (ixgbevf_wq) {
4261 destroy_workqueue(ixgbevf_wq);
4262 ixgbevf_wq = NULL;
4263 }
92915f71
GR		 4264}
4265
4266#ifdef DEBUG
4267/**
65d676c8 4268 * ixgbevf_get_hw_dev_name - return device name string
92915f71
GR		 4269 * used by hardware layer to print debugging information
4270 **/
4271char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw)
4272{
4273 struct ixgbevf_adapter *adapter = hw->back;
dec0d8e4 4274
92915f71
GR		 4275 return adapter->netdev->name;
4276}
4277
4278#endif
4279module_exit(ixgbevf_exit_module);
4280
4281/* ixgbevf_main.c */
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