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ixgbevf: Fix handling of NAPI budget when multiple queues are enabled per vector
[mirror_ubuntu-artful-kernel.git] / drivers / net / ethernet / intel / ixgbevf / ixgbevf_main.c
CommitLineData
92915f71
GR		 1/*******************************************************************************
2
3 Intel 82599 Virtual Function driver
dec0d8e4 4 Copyright(c) 1999 - 2015 Intel Corporation.
92915f71
GR		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
dec0d8e4 16 this program; if not, see <http://www.gnu.org/licenses/>.
92915f71
GR		 17
18 The full GNU General Public License is included in this distribution in
19 the file called "COPYING".
20
21 Contact Information:
22 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24
25*******************************************************************************/
26
92915f71
GR		 27/******************************************************************************
28 Copyright (c)2006 - 2007 Myricom, Inc. for some LRO specific code
29******************************************************************************/
dbd9636e
JK		 30
31#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
32
92915f71 33#include <linux/types.h>
dadcd65f 34#include <linux/bitops.h>
92915f71
GR		 35#include <linux/module.h>
36#include <linux/pci.h>
37#include <linux/netdevice.h>
38#include <linux/vmalloc.h>
39#include <linux/string.h>
40#include <linux/in.h>
41#include <linux/ip.h>
42#include <linux/tcp.h>
70a10e25 43#include <linux/sctp.h>
92915f71 44#include <linux/ipv6.h>
5a0e3ad6 45#include <linux/slab.h>
92915f71
GR		 46#include <net/checksum.h>
47#include <net/ip6_checksum.h>
48#include <linux/ethtool.h>
01789349 49#include <linux/if.h>
92915f71 50#include <linux/if_vlan.h>
70c71606 51#include <linux/prefetch.h>
92915f71
GR		 52
53#include "ixgbevf.h"
54
3d8fe98f 55const char ixgbevf_driver_name[] = "ixgbevf";
92915f71 56static const char ixgbevf_driver_string[] =
422e05d1 57 "Intel(R) 10 Gigabit PCI Express Virtual Function Network Driver";
92915f71 58
86f359f6 59#define DRV_VERSION "2.12.1-k"
92915f71 60const char ixgbevf_driver_version[] = DRV_VERSION;
66c87bd5 61static char ixgbevf_copyright[] =
40a13e24 62 "Copyright (c) 2009 - 2015 Intel Corporation.";
92915f71
GR		 63
64static const struct ixgbevf_info *ixgbevf_info_tbl[] = {
2316aa2a
GR		 65 [board_82599_vf] = &ixgbevf_82599_vf_info,
66 [board_X540_vf] = &ixgbevf_X540_vf_info,
47068b0d
ET		 67 [board_X550_vf] = &ixgbevf_X550_vf_info,
68 [board_X550EM_x_vf] = &ixgbevf_X550EM_x_vf_info,
92915f71
GR		 69};
70
71/* ixgbevf_pci_tbl - PCI Device ID Table
72 *
73 * Wildcard entries (PCI_ANY_ID) should come last
74 * Last entry must be all 0s
75 *
76 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
77 * Class, Class Mask, private data (not used) }
78 */
9baa3c34 79static const struct pci_device_id ixgbevf_pci_tbl[] = {
39ba22b4
SH		 80 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF), board_82599_vf },
81 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540_VF), board_X540_vf },
47068b0d
ET		 82 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550_VF), board_X550_vf },
83 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_VF), board_X550EM_x_vf },
92915f71
GR		 84 /* required last entry */
85 {0, }
86};
87MODULE_DEVICE_TABLE(pci, ixgbevf_pci_tbl);
88
89MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
b8ce18cd 90MODULE_DESCRIPTION("Intel(R) 10 Gigabit Virtual Function Network Driver");
92915f71
GR		 91MODULE_LICENSE("GPL");
92MODULE_VERSION(DRV_VERSION);
93
b3f4d599 94#define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
95static int debug = -1;
96module_param(debug, int, 0);
97MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
92915f71 98
40a13e24
MR		 99static struct workqueue_struct *ixgbevf_wq;
100
9ac5c5cc
ET		 101static void ixgbevf_service_event_schedule(struct ixgbevf_adapter *adapter)
102{
103 if (!test_bit(__IXGBEVF_DOWN, &adapter->state) &&
104 !test_bit(__IXGBEVF_REMOVING, &adapter->state) &&
105 !test_and_set_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state))
40a13e24 106 queue_work(ixgbevf_wq, &adapter->service_task);
9ac5c5cc
ET		 107}
108
109static void ixgbevf_service_event_complete(struct ixgbevf_adapter *adapter)
110{
111 BUG_ON(!test_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state));
112
113 /* flush memory to make sure state is correct before next watchdog */
114 smp_mb__before_atomic();
115 clear_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state);
116}
117
92915f71 118/* forward decls */
220fe050 119static void ixgbevf_queue_reset_subtask(struct ixgbevf_adapter *adapter);
fa71ae27 120static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector);
56e94095 121static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter);
92915f71 122
dbf8b0d8
MR		 123static void ixgbevf_remove_adapter(struct ixgbe_hw *hw)
124{
125 struct ixgbevf_adapter *adapter = hw->back;
126
127 if (!hw->hw_addr)
128 return;
129 hw->hw_addr = NULL;
130 dev_err(&adapter->pdev->dev, "Adapter removed\n");
9ac5c5cc
ET		 131 if (test_bit(__IXGBEVF_SERVICE_INITED, &adapter->state))
132 ixgbevf_service_event_schedule(adapter);
dbf8b0d8
MR		 133}
134
135static void ixgbevf_check_remove(struct ixgbe_hw *hw, u32 reg)
136{
137 u32 value;
138
139 /* The following check not only optimizes a bit by not
140 * performing a read on the status register when the
141 * register just read was a status register read that
142 * returned IXGBE_FAILED_READ_REG. It also blocks any
143 * potential recursion.
144 */
145 if (reg == IXGBE_VFSTATUS) {
146 ixgbevf_remove_adapter(hw);
147 return;
148 }
32c74949 149 value = ixgbevf_read_reg(hw, IXGBE_VFSTATUS);
dbf8b0d8
MR		 150 if (value == IXGBE_FAILED_READ_REG)
151 ixgbevf_remove_adapter(hw);
152}
153
32c74949 154u32 ixgbevf_read_reg(struct ixgbe_hw *hw, u32 reg)
dbf8b0d8
MR		 155{
156 u8 __iomem *reg_addr = ACCESS_ONCE(hw->hw_addr);
157 u32 value;
158
159 if (IXGBE_REMOVED(reg_addr))
160 return IXGBE_FAILED_READ_REG;
161 value = readl(reg_addr + reg);
162 if (unlikely(value == IXGBE_FAILED_READ_REG))
163 ixgbevf_check_remove(hw, reg);
164 return value;
165}
166
49ce9c2c 167/**
65d676c8 168 * ixgbevf_set_ivar - set IVAR registers - maps interrupt causes to vectors
92915f71
GR		 169 * @adapter: pointer to adapter struct
170 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
171 * @queue: queue to map the corresponding interrupt to
172 * @msix_vector: the vector to map to the corresponding queue
dec0d8e4 173 **/
92915f71
GR		 174static void ixgbevf_set_ivar(struct ixgbevf_adapter *adapter, s8 direction,
175 u8 queue, u8 msix_vector)
176{
177 u32 ivar, index;
178 struct ixgbe_hw *hw = &adapter->hw;
dec0d8e4 179
92915f71
GR		 180 if (direction == -1) {
181 /* other causes */
182 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
183 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC);
184 ivar &= ~0xFF;
185 ivar |= msix_vector;
186 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar);
187 } else {
dec0d8e4 188 /* Tx or Rx causes */
92915f71
GR		 189 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
190 index = ((16 * (queue & 1)) + (8 * direction));
191 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(queue >> 1));
192 ivar &= ~(0xFF << index);
193 ivar |= (msix_vector << index);
194 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(queue >> 1), ivar);
195 }
196}
197
70a10e25 198static void ixgbevf_unmap_and_free_tx_resource(struct ixgbevf_ring *tx_ring,
9bdfefd2
ET		 199 struct ixgbevf_tx_buffer *tx_buffer)
200{
201 if (tx_buffer->skb) {
202 dev_kfree_skb_any(tx_buffer->skb);
203 if (dma_unmap_len(tx_buffer, len))
70a10e25 204 dma_unmap_single(tx_ring->dev,
9bdfefd2
ET		 205 dma_unmap_addr(tx_buffer, dma),
206 dma_unmap_len(tx_buffer, len),
2a1f8794 207 DMA_TO_DEVICE);
9bdfefd2
ET		 208 } else if (dma_unmap_len(tx_buffer, len)) {
209 dma_unmap_page(tx_ring->dev,
210 dma_unmap_addr(tx_buffer, dma),
211 dma_unmap_len(tx_buffer, len),
212 DMA_TO_DEVICE);
92915f71 213 }
9bdfefd2
ET		 214 tx_buffer->next_to_watch = NULL;
215 tx_buffer->skb = NULL;
216 dma_unmap_len_set(tx_buffer, len, 0);
217 /* tx_buffer must be completely set up in the transmit path */
92915f71
GR		 218}
219
e08400b7
ET		 220static u64 ixgbevf_get_tx_completed(struct ixgbevf_ring *ring)
221{
222 return ring->stats.packets;
223}
92915f71 224
e08400b7
ET		 225static u32 ixgbevf_get_tx_pending(struct ixgbevf_ring *ring)
226{
227 struct ixgbevf_adapter *adapter = netdev_priv(ring->netdev);
228 struct ixgbe_hw *hw = &adapter->hw;
92915f71 229
e08400b7
ET		 230 u32 head = IXGBE_READ_REG(hw, IXGBE_VFTDH(ring->reg_idx));
231 u32 tail = IXGBE_READ_REG(hw, IXGBE_VFTDT(ring->reg_idx));
232
233 if (head != tail)
234 return (head < tail) ?
235 tail - head : (tail + ring->count - head);
236
237 return 0;
238}
239
240static inline bool ixgbevf_check_tx_hang(struct ixgbevf_ring *tx_ring)
241{
242 u32 tx_done = ixgbevf_get_tx_completed(tx_ring);
243 u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
244 u32 tx_pending = ixgbevf_get_tx_pending(tx_ring);
245
246 clear_check_for_tx_hang(tx_ring);
247
248 /* Check for a hung queue, but be thorough. This verifies
249 * that a transmit has been completed since the previous
250 * check AND there is at least one packet pending. The
251 * ARMED bit is set to indicate a potential hang.
252 */
253 if ((tx_done_old == tx_done) && tx_pending) {
254 /* make sure it is true for two checks in a row */
255 return test_and_set_bit(__IXGBEVF_HANG_CHECK_ARMED,
256 &tx_ring->state);
257 }
258 /* reset the countdown */
259 clear_bit(__IXGBEVF_HANG_CHECK_ARMED, &tx_ring->state);
260
261 /* update completed stats and continue */
262 tx_ring->tx_stats.tx_done_old = tx_done;
263
264 return false;
265}
266
9ac5c5cc
ET		 267static void ixgbevf_tx_timeout_reset(struct ixgbevf_adapter *adapter)
268{
269 /* Do the reset outside of interrupt context */
270 if (!test_bit(__IXGBEVF_DOWN, &adapter->state)) {
271 adapter->flags |= IXGBEVF_FLAG_RESET_REQUESTED;
272 ixgbevf_service_event_schedule(adapter);
273 }
274}
275
e08400b7
ET		 276/**
277 * ixgbevf_tx_timeout - Respond to a Tx Hang
278 * @netdev: network interface device structure
279 **/
280static void ixgbevf_tx_timeout(struct net_device *netdev)
281{
282 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
283
9ac5c5cc 284 ixgbevf_tx_timeout_reset(adapter);
e08400b7 285}
92915f71
GR		 286
287/**
288 * ixgbevf_clean_tx_irq - Reclaim resources after transmit completes
fa71ae27 289 * @q_vector: board private structure
92915f71
GR		 290 * @tx_ring: tx ring to clean
291 **/
fa71ae27 292static bool ixgbevf_clean_tx_irq(struct ixgbevf_q_vector *q_vector,
92915f71
GR		 293 struct ixgbevf_ring *tx_ring)
294{
fa71ae27 295 struct ixgbevf_adapter *adapter = q_vector->adapter;
7ad1a093
ET		 296 struct ixgbevf_tx_buffer *tx_buffer;
297 union ixgbe_adv_tx_desc *tx_desc;
92915f71 298 unsigned int total_bytes = 0, total_packets = 0;
7ad1a093
ET		 299 unsigned int budget = tx_ring->count / 2;
300 unsigned int i = tx_ring->next_to_clean;
92915f71 301
10cc1bdd
AD		 302 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
303 return true;
304
7ad1a093
ET		 305 tx_buffer = &tx_ring->tx_buffer_info[i];
306 tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
307 i -= tx_ring->count;
92915f71 308
e757e3e1 309 do {
7ad1a093 310 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
e757e3e1
AD		 311
312 /* if next_to_watch is not set then there is no work pending */
313 if (!eop_desc)
314 break;
315
316 /* prevent any other reads prior to eop_desc */
317 read_barrier_depends();
318
319 /* if DD is not set pending work has not been completed */
320 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
321 break;
322
323 /* clear next_to_watch to prevent false hangs */
7ad1a093 324 tx_buffer->next_to_watch = NULL;
e757e3e1 325
7ad1a093
ET		 326 /* update the statistics for this packet */
327 total_bytes += tx_buffer->bytecount;
328 total_packets += tx_buffer->gso_segs;
92915f71 329
9bdfefd2
ET		 330 /* free the skb */
331 dev_kfree_skb_any(tx_buffer->skb);
332
333 /* unmap skb header data */
334 dma_unmap_single(tx_ring->dev,
335 dma_unmap_addr(tx_buffer, dma),
336 dma_unmap_len(tx_buffer, len),
337 DMA_TO_DEVICE);
338
7ad1a093 339 /* clear tx_buffer data */
9bdfefd2
ET		 340 tx_buffer->skb = NULL;
341 dma_unmap_len_set(tx_buffer, len, 0);
92915f71 342
7ad1a093
ET		 343 /* unmap remaining buffers */
344 while (tx_desc != eop_desc) {
7ad1a093
ET		 345 tx_buffer++;
346 tx_desc++;
92915f71 347 i++;
7ad1a093
ET		 348 if (unlikely(!i)) {
349 i -= tx_ring->count;
350 tx_buffer = tx_ring->tx_buffer_info;
351 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
352 }
e757e3e1 353
9bdfefd2
ET		 354 /* unmap any remaining paged data */
355 if (dma_unmap_len(tx_buffer, len)) {
356 dma_unmap_page(tx_ring->dev,
357 dma_unmap_addr(tx_buffer, dma),
358 dma_unmap_len(tx_buffer, len),
359 DMA_TO_DEVICE);
360 dma_unmap_len_set(tx_buffer, len, 0);
361 }
92915f71
GR		 362 }
363
7ad1a093
ET		 364 /* move us one more past the eop_desc for start of next pkt */
365 tx_buffer++;
366 tx_desc++;
367 i++;
368 if (unlikely(!i)) {
369 i -= tx_ring->count;
370 tx_buffer = tx_ring->tx_buffer_info;
371 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
372 }
373
374 /* issue prefetch for next Tx descriptor */
375 prefetch(tx_desc);
376
377 /* update budget accounting */
378 budget--;
379 } while (likely(budget));
380
381 i += tx_ring->count;
92915f71 382 tx_ring->next_to_clean = i;
7ad1a093
ET		 383 u64_stats_update_begin(&tx_ring->syncp);
384 tx_ring->stats.bytes += total_bytes;
385 tx_ring->stats.packets += total_packets;
386 u64_stats_update_end(&tx_ring->syncp);
387 q_vector->tx.total_bytes += total_bytes;
388 q_vector->tx.total_packets += total_packets;
92915f71 389
e08400b7
ET		 390 if (check_for_tx_hang(tx_ring) && ixgbevf_check_tx_hang(tx_ring)) {
391 struct ixgbe_hw *hw = &adapter->hw;
392 union ixgbe_adv_tx_desc *eop_desc;
393
394 eop_desc = tx_ring->tx_buffer_info[i].next_to_watch;
395
396 pr_err("Detected Tx Unit Hang\n"
397 " Tx Queue <%d>\n"
398 " TDH, TDT <%x>, <%x>\n"
399 " next_to_use <%x>\n"
400 " next_to_clean <%x>\n"
401 "tx_buffer_info[next_to_clean]\n"
402 " next_to_watch <%p>\n"
403 " eop_desc->wb.status <%x>\n"
404 " time_stamp <%lx>\n"
405 " jiffies <%lx>\n",
406 tx_ring->queue_index,
407 IXGBE_READ_REG(hw, IXGBE_VFTDH(tx_ring->reg_idx)),
408 IXGBE_READ_REG(hw, IXGBE_VFTDT(tx_ring->reg_idx)),
409 tx_ring->next_to_use, i,
410 eop_desc, (eop_desc ? eop_desc->wb.status : 0),
411 tx_ring->tx_buffer_info[i].time_stamp, jiffies);
412
413 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
414
415 /* schedule immediate reset if we believe we hung */
9ac5c5cc 416 ixgbevf_tx_timeout_reset(adapter);
e08400b7
ET		 417
418 return true;
419 }
420
92915f71 421#define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
7ad1a093 422 if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
f880d07b 423 (ixgbevf_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
92915f71
GR		 424 /* Make sure that anybody stopping the queue after this
425 * sees the new next_to_clean.
426 */
427 smp_mb();
7ad1a093 428
fb40195c
AD		 429 if (__netif_subqueue_stopped(tx_ring->netdev,
430 tx_ring->queue_index) &&
92915f71 431 !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
fb40195c
AD		 432 netif_wake_subqueue(tx_ring->netdev,
433 tx_ring->queue_index);
7ad1a093 434 ++tx_ring->tx_stats.restart_queue;
92915f71 435 }
92915f71
GR		 436 }
437
7ad1a093 438 return !!budget;
92915f71
GR		 439}
440
08681618
JK		 441/**
442 * ixgbevf_rx_skb - Helper function to determine proper Rx method
443 * @q_vector: structure containing interrupt and ring information
444 * @skb: packet to send up
08681618
JK		 445 **/
446static void ixgbevf_rx_skb(struct ixgbevf_q_vector *q_vector,
dff80520 447 struct sk_buff *skb)
08681618 448{
c777cdfa
JK		 449#ifdef CONFIG_NET_RX_BUSY_POLL
450 skb_mark_napi_id(skb, &q_vector->napi);
451
452 if (ixgbevf_qv_busy_polling(q_vector)) {
453 netif_receive_skb(skb);
454 /* exit early if we busy polled */
455 return;
456 }
457#endif /* CONFIG_NET_RX_BUSY_POLL */
688ff32d
ET		 458
459 napi_gro_receive(&q_vector->napi, skb);
08681618
JK		 460}
461
1e1429d6
FD		 462#define IXGBE_RSS_L4_TYPES_MASK \
463 ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
464 (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
465 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
466 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
467
468static inline void ixgbevf_rx_hash(struct ixgbevf_ring *ring,
469 union ixgbe_adv_rx_desc *rx_desc,
470 struct sk_buff *skb)
471{
472 u16 rss_type;
473
474 if (!(ring->netdev->features & NETIF_F_RXHASH))
475 return;
476
477 rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
478 IXGBE_RXDADV_RSSTYPE_MASK;
479
480 if (!rss_type)
481 return;
482
483 skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
484 (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
485 PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
486}
487
dec0d8e4
JK		 488/**
489 * ixgbevf_rx_checksum - indicate in skb if hw indicated a good cksum
ec62fe26
ET		 490 * @ring: structure containig ring specific data
491 * @rx_desc: current Rx descriptor being processed
92915f71 492 * @skb: skb currently being received and modified
dec0d8e4 493 **/
55fb277c 494static inline void ixgbevf_rx_checksum(struct ixgbevf_ring *ring,
ec62fe26
ET		 495 union ixgbe_adv_rx_desc *rx_desc,
496 struct sk_buff *skb)
92915f71 497{
bc8acf2c 498 skb_checksum_none_assert(skb);
92915f71
GR		 499
500 /* Rx csum disabled */
fb40195c 501 if (!(ring->netdev->features & NETIF_F_RXCSUM))
92915f71
GR		 502 return;
503
504 /* if IP and error */
ec62fe26
ET		 505 if (ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
506 ixgbevf_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
095e2617 507 ring->rx_stats.csum_err++;
92915f71
GR		 508 return;
509 }
510
ec62fe26 511 if (!ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
92915f71
GR		 512 return;
513
ec62fe26 514 if (ixgbevf_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
095e2617 515 ring->rx_stats.csum_err++;
92915f71
GR		 516 return;
517 }
518
519 /* It must be a TCP or UDP packet with a valid checksum */
520 skb->ip_summed = CHECKSUM_UNNECESSARY;
92915f71
GR		 521}
522
dec0d8e4
JK		 523/**
524 * ixgbevf_process_skb_fields - Populate skb header fields from Rx descriptor
dff80520
ET		 525 * @rx_ring: rx descriptor ring packet is being transacted on
526 * @rx_desc: pointer to the EOP Rx descriptor
527 * @skb: pointer to current skb being populated
528 *
529 * This function checks the ring, descriptor, and packet information in
530 * order to populate the checksum, VLAN, protocol, and other fields within
531 * the skb.
dec0d8e4 532 **/
dff80520
ET		 533static void ixgbevf_process_skb_fields(struct ixgbevf_ring *rx_ring,
534 union ixgbe_adv_rx_desc *rx_desc,
535 struct sk_buff *skb)
536{
1e1429d6 537 ixgbevf_rx_hash(rx_ring, rx_desc, skb);
dff80520
ET		 538 ixgbevf_rx_checksum(rx_ring, rx_desc, skb);
539
540 if (ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
541 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
542 unsigned long *active_vlans = netdev_priv(rx_ring->netdev);
543
544 if (test_bit(vid & VLAN_VID_MASK, active_vlans))
545 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
546 }
547
548 skb->protocol = eth_type_trans(skb, rx_ring->netdev);
549}
550
4b95fe3d
ET		 551/**
552 * ixgbevf_is_non_eop - process handling of non-EOP buffers
553 * @rx_ring: Rx ring being processed
554 * @rx_desc: Rx descriptor for current buffer
555 * @skb: current socket buffer containing buffer in progress
556 *
557 * This function updates next to clean. If the buffer is an EOP buffer
558 * this function exits returning false, otherwise it will place the
559 * sk_buff in the next buffer to be chained and return true indicating
560 * that this is in fact a non-EOP buffer.
561 **/
562static bool ixgbevf_is_non_eop(struct ixgbevf_ring *rx_ring,
bad17234 563 union ixgbe_adv_rx_desc *rx_desc)
4b95fe3d
ET		 564{
565 u32 ntc = rx_ring->next_to_clean + 1;
566
567 /* fetch, update, and store next to clean */
568 ntc = (ntc < rx_ring->count) ? ntc : 0;
569 rx_ring->next_to_clean = ntc;
570
571 prefetch(IXGBEVF_RX_DESC(rx_ring, ntc));
572
573 if (likely(ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
574 return false;
575
576 return true;
577}
578
bad17234
ET		 579static bool ixgbevf_alloc_mapped_page(struct ixgbevf_ring *rx_ring,
580 struct ixgbevf_rx_buffer *bi)
bafa578f 581{
bad17234 582 struct page *page = bi->page;
bafa578f
ET		 583 dma_addr_t dma = bi->dma;
584
bad17234
ET		 585 /* since we are recycling buffers we should seldom need to alloc */
586 if (likely(page))
bafa578f
ET		 587 return true;
588
bad17234
ET		 589 /* alloc new page for storage */
590 page = dev_alloc_page();
591 if (unlikely(!page)) {
592 rx_ring->rx_stats.alloc_rx_page_failed++;
bafa578f
ET		 593 return false;
594 }
595
bad17234
ET		 596 /* map page for use */
597 dma = dma_map_page(rx_ring->dev, page, 0,
598 PAGE_SIZE, DMA_FROM_DEVICE);
bafa578f
ET		 599
600 /* if mapping failed free memory back to system since
601 * there isn't much point in holding memory we can't use
602 */
603 if (dma_mapping_error(rx_ring->dev, dma)) {
bad17234 604 __free_page(page);
bafa578f
ET		 605
606 rx_ring->rx_stats.alloc_rx_buff_failed++;
607 return false;
608 }
609
bafa578f 610 bi->dma = dma;
bad17234
ET		 611 bi->page = page;
612 bi->page_offset = 0;
bafa578f
ET		 613
614 return true;
615}
616
92915f71
GR		 617/**
618 * ixgbevf_alloc_rx_buffers - Replace used receive buffers; packet split
095e2617 619 * @rx_ring: rx descriptor ring (for a specific queue) to setup buffers on
bafa578f 620 * @cleaned_count: number of buffers to replace
92915f71 621 **/
095e2617 622static void ixgbevf_alloc_rx_buffers(struct ixgbevf_ring *rx_ring,
bafa578f 623 u16 cleaned_count)
92915f71 624{
92915f71
GR		 625 union ixgbe_adv_rx_desc *rx_desc;
626 struct ixgbevf_rx_buffer *bi;
fb40195c 627 unsigned int i = rx_ring->next_to_use;
92915f71 628
bafa578f
ET		 629 /* nothing to do or no valid netdev defined */
630 if (!cleaned_count || !rx_ring->netdev)
631 return;
b9dd245b 632
bafa578f
ET		 633 rx_desc = IXGBEVF_RX_DESC(rx_ring, i);
634 bi = &rx_ring->rx_buffer_info[i];
635 i -= rx_ring->count;
05d063aa 636
bafa578f 637 do {
bad17234 638 if (!ixgbevf_alloc_mapped_page(rx_ring, bi))
bafa578f 639 break;
b9dd245b 640
bafa578f
ET		 641 /* Refresh the desc even if pkt_addr didn't change
642 * because each write-back erases this info.
643 */
bad17234 644 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
92915f71 645
bafa578f
ET		 646 rx_desc++;
647 bi++;
92915f71 648 i++;
bafa578f
ET		 649 if (unlikely(!i)) {
650 rx_desc = IXGBEVF_RX_DESC(rx_ring, 0);
651 bi = rx_ring->rx_buffer_info;
652 i -= rx_ring->count;
653 }
654
655 /* clear the hdr_addr for the next_to_use descriptor */
656 rx_desc->read.hdr_addr = 0;
657
658 cleaned_count--;
659 } while (cleaned_count);
660
661 i += rx_ring->count;
92915f71 662
bafa578f
ET		 663 if (rx_ring->next_to_use != i) {
664 /* record the next descriptor to use */
665 rx_ring->next_to_use = i;
666
bad17234
ET		 667 /* update next to alloc since we have filled the ring */
668 rx_ring->next_to_alloc = i;
669
bafa578f
ET		 670 /* Force memory writes to complete before letting h/w
671 * know there are new descriptors to fetch. (Only
672 * applicable for weak-ordered memory model archs,
673 * such as IA-64).
674 */
675 wmb();
676 ixgbevf_write_tail(rx_ring, i);
677 }
92915f71
GR		 678}
679
dec0d8e4
JK		 680/**
681 * ixgbevf_cleanup_headers - Correct corrupted or empty headers
bad17234
ET		 682 * @rx_ring: rx descriptor ring packet is being transacted on
683 * @rx_desc: pointer to the EOP Rx descriptor
684 * @skb: pointer to current skb being fixed
685 *
686 * Check for corrupted packet headers caused by senders on the local L2
687 * embedded NIC switch not setting up their Tx Descriptors right. These
688 * should be very rare.
689 *
690 * Also address the case where we are pulling data in on pages only
691 * and as such no data is present in the skb header.
692 *
693 * In addition if skb is not at least 60 bytes we need to pad it so that
694 * it is large enough to qualify as a valid Ethernet frame.
695 *
696 * Returns true if an error was encountered and skb was freed.
dec0d8e4 697 **/
bad17234
ET		 698static bool ixgbevf_cleanup_headers(struct ixgbevf_ring *rx_ring,
699 union ixgbe_adv_rx_desc *rx_desc,
700 struct sk_buff *skb)
701{
702 /* verify that the packet does not have any known errors */
703 if (unlikely(ixgbevf_test_staterr(rx_desc,
704 IXGBE_RXDADV_ERR_FRAME_ERR_MASK))) {
705 struct net_device *netdev = rx_ring->netdev;
706
707 if (!(netdev->features & NETIF_F_RXALL)) {
708 dev_kfree_skb_any(skb);
709 return true;
710 }
711 }
712
a94d9e22
AD		 713 /* if eth_skb_pad returns an error the skb was freed */
714 if (eth_skb_pad(skb))
715 return true;
bad17234
ET		 716
717 return false;
718}
719
dec0d8e4
JK		 720/**
721 * ixgbevf_reuse_rx_page - page flip buffer and store it back on the ring
bad17234
ET		 722 * @rx_ring: rx descriptor ring to store buffers on
723 * @old_buff: donor buffer to have page reused
724 *
725 * Synchronizes page for reuse by the adapter
dec0d8e4 726 **/
bad17234
ET		 727static void ixgbevf_reuse_rx_page(struct ixgbevf_ring *rx_ring,
728 struct ixgbevf_rx_buffer *old_buff)
729{
730 struct ixgbevf_rx_buffer *new_buff;
731 u16 nta = rx_ring->next_to_alloc;
732
733 new_buff = &rx_ring->rx_buffer_info[nta];
734
735 /* update, and store next to alloc */
736 nta++;
737 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
738
739 /* transfer page from old buffer to new buffer */
740 new_buff->page = old_buff->page;
741 new_buff->dma = old_buff->dma;
742 new_buff->page_offset = old_buff->page_offset;
743
744 /* sync the buffer for use by the device */
745 dma_sync_single_range_for_device(rx_ring->dev, new_buff->dma,
746 new_buff->page_offset,
747 IXGBEVF_RX_BUFSZ,
748 DMA_FROM_DEVICE);
749}
750
751static inline bool ixgbevf_page_is_reserved(struct page *page)
752{
2f064f34 753 return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
bad17234
ET		 754}
755
dec0d8e4
JK		 756/**
757 * ixgbevf_add_rx_frag - Add contents of Rx buffer to sk_buff
bad17234
ET		 758 * @rx_ring: rx descriptor ring to transact packets on
759 * @rx_buffer: buffer containing page to add
760 * @rx_desc: descriptor containing length of buffer written by hardware
761 * @skb: sk_buff to place the data into
762 *
763 * This function will add the data contained in rx_buffer->page to the skb.
764 * This is done either through a direct copy if the data in the buffer is
765 * less than the skb header size, otherwise it will just attach the page as
766 * a frag to the skb.
767 *
768 * The function will then update the page offset if necessary and return
769 * true if the buffer can be reused by the adapter.
dec0d8e4 770 **/
bad17234
ET		 771static bool ixgbevf_add_rx_frag(struct ixgbevf_ring *rx_ring,
772 struct ixgbevf_rx_buffer *rx_buffer,
773 union ixgbe_adv_rx_desc *rx_desc,
774 struct sk_buff *skb)
775{
776 struct page *page = rx_buffer->page;
5505bdb5 777 unsigned char *va = page_address(page) + rx_buffer->page_offset;
bad17234
ET		 778 unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
779#if (PAGE_SIZE < 8192)
780 unsigned int truesize = IXGBEVF_RX_BUFSZ;
781#else
782 unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
783#endif
5505bdb5 784 unsigned int pull_len;
bad17234 785
5505bdb5
AD		 786 if (unlikely(skb_is_nonlinear(skb)))
787 goto add_tail_frag;
bad17234 788
5505bdb5 789 if (likely(size <= IXGBEVF_RX_HDR_SIZE)) {
bad17234
ET		 790 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
791
792 /* page is not reserved, we can reuse buffer as is */
793 if (likely(!ixgbevf_page_is_reserved(page)))
794 return true;
795
796 /* this page cannot be reused so discard it */
797 put_page(page);
798 return false;
799 }
800
5505bdb5
AD		 801 /* we need the header to contain the greater of either ETH_HLEN or
802 * 60 bytes if the skb->len is less than 60 for skb_pad.
803 */
804 pull_len = eth_get_headlen(va, IXGBEVF_RX_HDR_SIZE);
805
806 /* align pull length to size of long to optimize memcpy performance */
807 memcpy(__skb_put(skb, pull_len), va, ALIGN(pull_len, sizeof(long)));
808
809 /* update all of the pointers */
810 va += pull_len;
811 size -= pull_len;
812
813add_tail_frag:
bad17234 814 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
5505bdb5 815 (unsigned long)va & ~PAGE_MASK, size, truesize);
bad17234
ET		 816
817 /* avoid re-using remote pages */
818 if (unlikely(ixgbevf_page_is_reserved(page)))
819 return false;
820
821#if (PAGE_SIZE < 8192)
822 /* if we are only owner of page we can reuse it */
823 if (unlikely(page_count(page) != 1))
824 return false;
825
826 /* flip page offset to other buffer */
827 rx_buffer->page_offset ^= IXGBEVF_RX_BUFSZ;
828
829#else
830 /* move offset up to the next cache line */
831 rx_buffer->page_offset += truesize;
832
833 if (rx_buffer->page_offset > (PAGE_SIZE - IXGBEVF_RX_BUFSZ))
834 return false;
835
836#endif
837 /* Even if we own the page, we are not allowed to use atomic_set()
838 * This would break get_page_unless_zero() users.
839 */
840 atomic_inc(&page->_count);
841
842 return true;
843}
844
845static struct sk_buff *ixgbevf_fetch_rx_buffer(struct ixgbevf_ring *rx_ring,
846 union ixgbe_adv_rx_desc *rx_desc,
847 struct sk_buff *skb)
848{
849 struct ixgbevf_rx_buffer *rx_buffer;
850 struct page *page;
851
852 rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
853 page = rx_buffer->page;
854 prefetchw(page);
855
856 if (likely(!skb)) {
857 void *page_addr = page_address(page) +
858 rx_buffer->page_offset;
859
860 /* prefetch first cache line of first page */
861 prefetch(page_addr);
862#if L1_CACHE_BYTES < 128
863 prefetch(page_addr + L1_CACHE_BYTES);
864#endif
865
866 /* allocate a skb to store the frags */
867 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
868 IXGBEVF_RX_HDR_SIZE);
869 if (unlikely(!skb)) {
870 rx_ring->rx_stats.alloc_rx_buff_failed++;
871 return NULL;
872 }
873
874 /* we will be copying header into skb->data in
875 * pskb_may_pull so it is in our interest to prefetch
876 * it now to avoid a possible cache miss
877 */
878 prefetchw(skb->data);
879 }
880
881 /* we are reusing so sync this buffer for CPU use */
882 dma_sync_single_range_for_cpu(rx_ring->dev,
883 rx_buffer->dma,
884 rx_buffer->page_offset,
885 IXGBEVF_RX_BUFSZ,
886 DMA_FROM_DEVICE);
887
888 /* pull page into skb */
889 if (ixgbevf_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
890 /* hand second half of page back to the ring */
891 ixgbevf_reuse_rx_page(rx_ring, rx_buffer);
892 } else {
893 /* we are not reusing the buffer so unmap it */
894 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
895 PAGE_SIZE, DMA_FROM_DEVICE);
896 }
897
898 /* clear contents of buffer_info */
899 rx_buffer->dma = 0;
900 rx_buffer->page = NULL;
901
902 return skb;
903}
904
92915f71 905static inline void ixgbevf_irq_enable_queues(struct ixgbevf_adapter *adapter,
5f3600eb 906 u32 qmask)
92915f71 907{
92915f71
GR		 908 struct ixgbe_hw *hw = &adapter->hw;
909
5f3600eb 910 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, qmask);
92915f71
GR		 911}
912
08e50a20
JK		 913static int ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector,
914 struct ixgbevf_ring *rx_ring,
915 int budget)
92915f71 916{
92915f71 917 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
bafa578f 918 u16 cleaned_count = ixgbevf_desc_unused(rx_ring);
bad17234 919 struct sk_buff *skb = rx_ring->skb;
92915f71 920
6622402a 921 while (likely(total_rx_packets < budget)) {
4b95fe3d 922 union ixgbe_adv_rx_desc *rx_desc;
b97fe3b1 923
0579eefc
ET		 924 /* return some buffers to hardware, one at a time is too slow */
925 if (cleaned_count >= IXGBEVF_RX_BUFFER_WRITE) {
926 ixgbevf_alloc_rx_buffers(rx_ring, cleaned_count);
927 cleaned_count = 0;
928 }
929
bad17234 930 rx_desc = IXGBEVF_RX_DESC(rx_ring, rx_ring->next_to_clean);
0579eefc
ET		 931
932 if (!ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_DD))
92915f71 933 break;
92915f71 934
0579eefc
ET		 935 /* This memory barrier is needed to keep us from reading
936 * any other fields out of the rx_desc until we know the
937 * RXD_STAT_DD bit is set
938 */
939 rmb();
ec62fe26 940
bad17234
ET		 941 /* retrieve a buffer from the ring */
942 skb = ixgbevf_fetch_rx_buffer(rx_ring, rx_desc, skb);
0579eefc 943
bad17234
ET		 944 /* exit if we failed to retrieve a buffer */
945 if (!skb)
946 break;
92915f71 947
b97fe3b1
ET		 948 cleaned_count++;
949
bad17234
ET		 950 /* fetch next buffer in frame if non-eop */
951 if (ixgbevf_is_non_eop(rx_ring, rx_desc))
0579eefc 952 continue;
5c60f81a 953
bad17234
ET		 954 /* verify the packet layout is correct */
955 if (ixgbevf_cleanup_headers(rx_ring, rx_desc, skb)) {
956 skb = NULL;
0579eefc 957 continue;
92915f71
GR		 958 }
959
92915f71
GR		 960 /* probably a little skewed due to removing CRC */
961 total_rx_bytes += skb->len;
92915f71 962
815cccbf
JF		 963 /* Workaround hardware that can't do proper VEPA multicast
964 * source pruning.
965 */
bd9d5592 966 if ((skb->pkt_type == PACKET_BROADCAST ||
dec0d8e4 967 skb->pkt_type == PACKET_MULTICAST) &&
095e2617 968 ether_addr_equal(rx_ring->netdev->dev_addr,
7367d0b5 969 eth_hdr(skb)->h_source)) {
815cccbf 970 dev_kfree_skb_irq(skb);
0579eefc 971 continue;
815cccbf
JF		 972 }
973
dff80520
ET		 974 /* populate checksum, VLAN, and protocol */
975 ixgbevf_process_skb_fields(rx_ring, rx_desc, skb);
976
977 ixgbevf_rx_skb(q_vector, skb);
92915f71 978
bad17234
ET		 979 /* reset skb pointer */
980 skb = NULL;
981
0579eefc 982 /* update budget accounting */
6622402a
ET		 983 total_rx_packets++;
984 }
92915f71 985
bad17234
ET		 986 /* place incomplete frames back on ring for completion */
987 rx_ring->skb = skb;
988
4197aa7b 989 u64_stats_update_begin(&rx_ring->syncp);
095e2617
ET		 990 rx_ring->stats.packets += total_rx_packets;
991 rx_ring->stats.bytes += total_rx_bytes;
4197aa7b 992 u64_stats_update_end(&rx_ring->syncp);
ac6ed8f0
GR		 993 q_vector->rx.total_packets += total_rx_packets;
994 q_vector->rx.total_bytes += total_rx_bytes;
92915f71 995
08e50a20 996 return total_rx_packets;
92915f71
GR		 997}
998
999/**
fa71ae27 1000 * ixgbevf_poll - NAPI polling calback
92915f71
GR		 1001 * @napi: napi struct with our devices info in it
1002 * @budget: amount of work driver is allowed to do this pass, in packets
1003 *
fa71ae27 1004 * This function will clean more than one or more rings associated with a
92915f71
GR		 1005 * q_vector.
1006 **/
fa71ae27 1007static int ixgbevf_poll(struct napi_struct *napi, int budget)
92915f71
GR		 1008{
1009 struct ixgbevf_q_vector *q_vector =
1010 container_of(napi, struct ixgbevf_q_vector, napi);
1011 struct ixgbevf_adapter *adapter = q_vector->adapter;
fa71ae27 1012 struct ixgbevf_ring *ring;
32b3e08f 1013 int per_ring_budget, work_done = 0;
fa71ae27
AD		 1014 bool clean_complete = true;
1015
1016 ixgbevf_for_each_ring(ring, q_vector->tx)
1017 clean_complete &= ixgbevf_clean_tx_irq(q_vector, ring);
92915f71 1018
d0f71aff
WD		 1019 if (budget <= 0)
1020 return budget;
c777cdfa
JK		 1021#ifdef CONFIG_NET_RX_BUSY_POLL
1022 if (!ixgbevf_qv_lock_napi(q_vector))
1023 return budget;
1024#endif
1025
92915f71 1026 /* attempt to distribute budget to each queue fairly, but don't allow
dec0d8e4
JK		 1027 * the budget to go below 1 because we'll exit polling
1028 */
fa71ae27
AD		 1029 if (q_vector->rx.count > 1)
1030 per_ring_budget = max(budget/q_vector->rx.count, 1);
1031 else
1032 per_ring_budget = budget;
1033
32b3e08f
JB		 1034 ixgbevf_for_each_ring(ring, q_vector->rx) {
1035 int cleaned = ixgbevf_clean_rx_irq(q_vector, ring,
1036 per_ring_budget);
1037 work_done += cleaned;
1038 clean_complete &= (cleaned < per_ring_budget);
1039 }
fa71ae27 1040
c777cdfa
JK		 1041#ifdef CONFIG_NET_RX_BUSY_POLL
1042 ixgbevf_qv_unlock_napi(q_vector);
1043#endif
1044
fa71ae27
AD		 1045 /* If all work not completed, return budget and keep polling */
1046 if (!clean_complete)
1047 return budget;
1048 /* all work done, exit the polling mode */
32b3e08f 1049 napi_complete_done(napi, work_done);
fa71ae27
AD		 1050 if (adapter->rx_itr_setting & 1)
1051 ixgbevf_set_itr(q_vector);
2e7cfbdd
MR		 1052 if (!test_bit(__IXGBEVF_DOWN, &adapter->state) &&
1053 !test_bit(__IXGBEVF_REMOVING, &adapter->state))
fa71ae27
AD		 1054 ixgbevf_irq_enable_queues(adapter,
1055 1 << q_vector->v_idx);
92915f71 1056
fa71ae27 1057 return 0;
92915f71
GR		 1058}
1059
ce422606
GR		 1060/**
1061 * ixgbevf_write_eitr - write VTEITR register in hardware specific way
1062 * @q_vector: structure containing interrupt and ring information
dec0d8e4 1063 **/
3849623e 1064void ixgbevf_write_eitr(struct ixgbevf_q_vector *q_vector)
ce422606
GR		 1065{
1066 struct ixgbevf_adapter *adapter = q_vector->adapter;
1067 struct ixgbe_hw *hw = &adapter->hw;
1068 int v_idx = q_vector->v_idx;
1069 u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
1070
dec0d8e4 1071 /* set the WDIS bit to not clear the timer bits and cause an
ce422606
GR		 1072 * immediate assertion of the interrupt
1073 */
1074 itr_reg |= IXGBE_EITR_CNT_WDIS;
1075
1076 IXGBE_WRITE_REG(hw, IXGBE_VTEITR(v_idx), itr_reg);
1077}
92915f71 1078
c777cdfa
JK		 1079#ifdef CONFIG_NET_RX_BUSY_POLL
1080/* must be called with local_bh_disable()d */
1081static int ixgbevf_busy_poll_recv(struct napi_struct *napi)
1082{
1083 struct ixgbevf_q_vector *q_vector =
1084 container_of(napi, struct ixgbevf_q_vector, napi);
1085 struct ixgbevf_adapter *adapter = q_vector->adapter;
1086 struct ixgbevf_ring *ring;
1087 int found = 0;
1088
1089 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
1090 return LL_FLUSH_FAILED;
1091
1092 if (!ixgbevf_qv_lock_poll(q_vector))
1093 return LL_FLUSH_BUSY;
1094
1095 ixgbevf_for_each_ring(ring, q_vector->rx) {
1096 found = ixgbevf_clean_rx_irq(q_vector, ring, 4);
3b5dca26
JK		 1097#ifdef BP_EXTENDED_STATS
1098 if (found)
095e2617 1099 ring->stats.cleaned += found;
3b5dca26 1100 else
095e2617 1101 ring->stats.misses++;
3b5dca26 1102#endif
c777cdfa
JK		 1103 if (found)
1104 break;
1105 }
1106
1107 ixgbevf_qv_unlock_poll(q_vector);
1108
1109 return found;
1110}
1111#endif /* CONFIG_NET_RX_BUSY_POLL */
1112
92915f71
GR		 1113/**
1114 * ixgbevf_configure_msix - Configure MSI-X hardware
1115 * @adapter: board private structure
1116 *
1117 * ixgbevf_configure_msix sets up the hardware to properly generate MSI-X
1118 * interrupts.
1119 **/
1120static void ixgbevf_configure_msix(struct ixgbevf_adapter *adapter)
1121{
1122 struct ixgbevf_q_vector *q_vector;
6b43c446 1123 int q_vectors, v_idx;
92915f71
GR		 1124
1125 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
5f3600eb 1126 adapter->eims_enable_mask = 0;
92915f71 1127
dec0d8e4 1128 /* Populate the IVAR table and set the ITR values to the
92915f71
GR		 1129 * corresponding register.
1130 */
1131 for (v_idx = 0; v_idx < q_vectors; v_idx++) {
6b43c446 1132 struct ixgbevf_ring *ring;
dec0d8e4 1133
92915f71 1134 q_vector = adapter->q_vector[v_idx];
6b43c446
AD		 1135
1136 ixgbevf_for_each_ring(ring, q_vector->rx)
1137 ixgbevf_set_ivar(adapter, 0, ring->reg_idx, v_idx);
1138
1139 ixgbevf_for_each_ring(ring, q_vector->tx)
1140 ixgbevf_set_ivar(adapter, 1, ring->reg_idx, v_idx);
92915f71 1141
5f3600eb 1142 if (q_vector->tx.ring && !q_vector->rx.ring) {
dec0d8e4 1143 /* Tx only vector */
5f3600eb 1144 if (adapter->tx_itr_setting == 1)
8a9ca110 1145 q_vector->itr = IXGBE_12K_ITR;
5f3600eb
AD		 1146 else
1147 q_vector->itr = adapter->tx_itr_setting;
1148 } else {
dec0d8e4 1149 /* Rx or Rx/Tx vector */
5f3600eb
AD		 1150 if (adapter->rx_itr_setting == 1)
1151 q_vector->itr = IXGBE_20K_ITR;
1152 else
1153 q_vector->itr = adapter->rx_itr_setting;
1154 }
1155
1156 /* add q_vector eims value to global eims_enable_mask */
1157 adapter->eims_enable_mask |= 1 << v_idx;
92915f71 1158
5f3600eb 1159 ixgbevf_write_eitr(q_vector);
92915f71
GR		 1160 }
1161
1162 ixgbevf_set_ivar(adapter, -1, 1, v_idx);
5f3600eb
AD		 1163 /* setup eims_other and add value to global eims_enable_mask */
1164 adapter->eims_other = 1 << v_idx;
1165 adapter->eims_enable_mask |= adapter->eims_other;
92915f71
GR		 1166}
1167
1168enum latency_range {
1169 lowest_latency = 0,
1170 low_latency = 1,
1171 bulk_latency = 2,
1172 latency_invalid = 255
1173};
1174
1175/**
1176 * ixgbevf_update_itr - update the dynamic ITR value based on statistics
5f3600eb
AD		 1177 * @q_vector: structure containing interrupt and ring information
1178 * @ring_container: structure containing ring performance data
92915f71 1179 *
dec0d8e4
JK		 1180 * Stores a new ITR value based on packets and byte
1181 * counts during the last interrupt. The advantage of per interrupt
1182 * computation is faster updates and more accurate ITR for the current
1183 * traffic pattern. Constants in this function were computed
1184 * based on theoretical maximum wire speed and thresholds were set based
1185 * on testing data as well as attempting to minimize response time
1186 * while increasing bulk throughput.
92915f71 1187 **/
5f3600eb
AD		 1188static void ixgbevf_update_itr(struct ixgbevf_q_vector *q_vector,
1189 struct ixgbevf_ring_container *ring_container)
92915f71 1190{
5f3600eb
AD		 1191 int bytes = ring_container->total_bytes;
1192 int packets = ring_container->total_packets;
92915f71
GR		 1193 u32 timepassed_us;
1194 u64 bytes_perint;
5f3600eb 1195 u8 itr_setting = ring_container->itr;
92915f71
GR		 1196
1197 if (packets == 0)
5f3600eb 1198 return;
92915f71 1199
dec0d8e4 1200 /* simple throttle rate management
92915f71
GR		 1201 * 0-20MB/s lowest (100000 ints/s)
1202 * 20-100MB/s low (20000 ints/s)
8a9ca110 1203 * 100-1249MB/s bulk (12000 ints/s)
92915f71
GR		 1204 */
1205 /* what was last interrupt timeslice? */
5f3600eb 1206 timepassed_us = q_vector->itr >> 2;
92915f71
GR		 1207 bytes_perint = bytes / timepassed_us; /* bytes/usec */
1208
1209 switch (itr_setting) {
1210 case lowest_latency:
e2c28ce7 1211 if (bytes_perint > 10)
5f3600eb 1212 itr_setting = low_latency;
92915f71
GR		 1213 break;
1214 case low_latency:
e2c28ce7 1215 if (bytes_perint > 20)
5f3600eb 1216 itr_setting = bulk_latency;
e2c28ce7 1217 else if (bytes_perint <= 10)
5f3600eb 1218 itr_setting = lowest_latency;
92915f71
GR		 1219 break;
1220 case bulk_latency:
e2c28ce7 1221 if (bytes_perint <= 20)
5f3600eb 1222 itr_setting = low_latency;
92915f71
GR		 1223 break;
1224 }
1225
5f3600eb
AD		 1226 /* clear work counters since we have the values we need */
1227 ring_container->total_bytes = 0;
1228 ring_container->total_packets = 0;
1229
1230 /* write updated itr to ring container */
1231 ring_container->itr = itr_setting;
92915f71
GR		 1232}
1233
fa71ae27 1234static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector)
92915f71 1235{
5f3600eb
AD		 1236 u32 new_itr = q_vector->itr;
1237 u8 current_itr;
92915f71 1238
5f3600eb
AD		 1239 ixgbevf_update_itr(q_vector, &q_vector->tx);
1240 ixgbevf_update_itr(q_vector, &q_vector->rx);
92915f71 1241
6b43c446 1242 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
92915f71
GR		 1243
1244 switch (current_itr) {
1245 /* counts and packets in update_itr are dependent on these numbers */
1246 case lowest_latency:
5f3600eb 1247 new_itr = IXGBE_100K_ITR;
92915f71
GR		 1248 break;
1249 case low_latency:
5f3600eb 1250 new_itr = IXGBE_20K_ITR;
92915f71
GR		 1251 break;
1252 case bulk_latency:
1253 default:
8a9ca110 1254 new_itr = IXGBE_12K_ITR;
92915f71
GR		 1255 break;
1256 }
1257
5f3600eb 1258 if (new_itr != q_vector->itr) {
92915f71 1259 /* do an exponential smoothing */
5f3600eb
AD		 1260 new_itr = (10 * new_itr * q_vector->itr) /
1261 ((9 * new_itr) + q_vector->itr);
1262
1263 /* save the algorithm value here */
1264 q_vector->itr = new_itr;
1265
1266 ixgbevf_write_eitr(q_vector);
92915f71 1267 }
92915f71
GR		 1268}
1269
4b2cd27f 1270static irqreturn_t ixgbevf_msix_other(int irq, void *data)
92915f71 1271{
fa71ae27 1272 struct ixgbevf_adapter *adapter = data;
92915f71 1273 struct ixgbe_hw *hw = &adapter->hw;
08259594 1274
4b2cd27f 1275 hw->mac.get_link_status = 1;
1e72bfc3 1276
9ac5c5cc 1277 ixgbevf_service_event_schedule(adapter);
3a2c4033 1278
5f3600eb
AD		 1279 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_other);
1280
92915f71
GR		 1281 return IRQ_HANDLED;
1282}
1283
92915f71 1284/**
fa71ae27 1285 * ixgbevf_msix_clean_rings - single unshared vector rx clean (all queues)
92915f71
GR		 1286 * @irq: unused
1287 * @data: pointer to our q_vector struct for this interrupt vector
1288 **/
fa71ae27 1289static irqreturn_t ixgbevf_msix_clean_rings(int irq, void *data)
92915f71
GR		 1290{
1291 struct ixgbevf_q_vector *q_vector = data;
92915f71 1292
5f3600eb 1293 /* EIAM disabled interrupts (on this vector) for us */
fa71ae27 1294 if (q_vector->rx.ring || q_vector->tx.ring)
ef2662b2 1295 napi_schedule_irqoff(&q_vector->napi);
92915f71
GR		 1296
1297 return IRQ_HANDLED;
1298}
1299
1300static inline void map_vector_to_rxq(struct ixgbevf_adapter *a, int v_idx,
1301 int r_idx)
1302{
1303 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
1304
87e70ab9
DS		 1305 a->rx_ring[r_idx]->next = q_vector->rx.ring;
1306 q_vector->rx.ring = a->rx_ring[r_idx];
6b43c446 1307 q_vector->rx.count++;
92915f71
GR		 1308}
1309
1310static inline void map_vector_to_txq(struct ixgbevf_adapter *a, int v_idx,
1311 int t_idx)
1312{
1313 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
1314
87e70ab9
DS		 1315 a->tx_ring[t_idx]->next = q_vector->tx.ring;
1316 q_vector->tx.ring = a->tx_ring[t_idx];
6b43c446 1317 q_vector->tx.count++;
92915f71
GR		 1318}
1319
1320/**
1321 * ixgbevf_map_rings_to_vectors - Maps descriptor rings to vectors
1322 * @adapter: board private structure to initialize
1323 *
1324 * This function maps descriptor rings to the queue-specific vectors
1325 * we were allotted through the MSI-X enabling code. Ideally, we'd have
1326 * one vector per ring/queue, but on a constrained vector budget, we
1327 * group the rings as "efficiently" as possible. You would add new
1328 * mapping configurations in here.
1329 **/
1330static int ixgbevf_map_rings_to_vectors(struct ixgbevf_adapter *adapter)
1331{
1332 int q_vectors;
1333 int v_start = 0;
1334 int rxr_idx = 0, txr_idx = 0;
1335 int rxr_remaining = adapter->num_rx_queues;
1336 int txr_remaining = adapter->num_tx_queues;
1337 int i, j;
1338 int rqpv, tqpv;
92915f71
GR		 1339
1340 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1341
dec0d8e4 1342 /* The ideal configuration...
92915f71
GR		 1343 * We have enough vectors to map one per queue.
1344 */
1345 if (q_vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
1346 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
1347 map_vector_to_rxq(adapter, v_start, rxr_idx);
1348
1349 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
1350 map_vector_to_txq(adapter, v_start, txr_idx);
50985b5f 1351 return 0;
92915f71
GR		 1352 }
1353
dec0d8e4 1354 /* If we don't have enough vectors for a 1-to-1
92915f71
GR		 1355 * mapping, we'll have to group them so there are
1356 * multiple queues per vector.
1357 */
1358 /* Re-adjusting *qpv takes care of the remainder. */
1359 for (i = v_start; i < q_vectors; i++) {
1360 rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - i);
1361 for (j = 0; j < rqpv; j++) {
1362 map_vector_to_rxq(adapter, i, rxr_idx);
1363 rxr_idx++;
1364 rxr_remaining--;
1365 }
1366 }
1367 for (i = v_start; i < q_vectors; i++) {
1368 tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - i);
1369 for (j = 0; j < tqpv; j++) {
1370 map_vector_to_txq(adapter, i, txr_idx);
1371 txr_idx++;
1372 txr_remaining--;
1373 }
1374 }
1375
50985b5f 1376 return 0;
92915f71
GR		 1377}
1378
1379/**
1380 * ixgbevf_request_msix_irqs - Initialize MSI-X interrupts
1381 * @adapter: board private structure
1382 *
1383 * ixgbevf_request_msix_irqs allocates MSI-X vectors and requests
1384 * interrupts from the kernel.
1385 **/
1386static int ixgbevf_request_msix_irqs(struct ixgbevf_adapter *adapter)
1387{
1388 struct net_device *netdev = adapter->netdev;
fa71ae27
AD		 1389 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1390 int vector, err;
92915f71
GR		 1391 int ri = 0, ti = 0;
1392
92915f71 1393 for (vector = 0; vector < q_vectors; vector++) {
fa71ae27
AD		 1394 struct ixgbevf_q_vector *q_vector = adapter->q_vector[vector];
1395 struct msix_entry *entry = &adapter->msix_entries[vector];
1396
1397 if (q_vector->tx.ring && q_vector->rx.ring) {
1398 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
1399 "%s-%s-%d", netdev->name, "TxRx", ri++);
1400 ti++;
1401 } else if (q_vector->rx.ring) {
1402 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
1403 "%s-%s-%d", netdev->name, "rx", ri++);
1404 } else if (q_vector->tx.ring) {
1405 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
1406 "%s-%s-%d", netdev->name, "tx", ti++);
92915f71
GR		 1407 } else {
1408 /* skip this unused q_vector */
1409 continue;
1410 }
fa71ae27
AD		 1411 err = request_irq(entry->vector, &ixgbevf_msix_clean_rings, 0,
1412 q_vector->name, q_vector);
92915f71
GR		 1413 if (err) {
1414 hw_dbg(&adapter->hw,
dec0d8e4
JK		 1415 "request_irq failed for MSIX interrupt Error: %d\n",
1416 err);
92915f71
GR		 1417 goto free_queue_irqs;
1418 }
1419 }
1420
92915f71 1421 err = request_irq(adapter->msix_entries[vector].vector,
4b2cd27f 1422 &ixgbevf_msix_other, 0, netdev->name, adapter);
92915f71 1423 if (err) {
dec0d8e4
JK		 1424 hw_dbg(&adapter->hw, "request_irq for msix_other failed: %d\n",
1425 err);
92915f71
GR		 1426 goto free_queue_irqs;
1427 }
1428
1429 return 0;
1430
1431free_queue_irqs:
fa71ae27
AD		 1432 while (vector) {
1433 vector--;
1434 free_irq(adapter->msix_entries[vector].vector,
1435 adapter->q_vector[vector]);
1436 }
a1f6c6b1 1437 /* This failure is non-recoverable - it indicates the system is
1438 * out of MSIX vector resources and the VF driver cannot run
1439 * without them. Set the number of msix vectors to zero
1440 * indicating that not enough can be allocated. The error
1441 * will be returned to the user indicating device open failed.
1442 * Any further attempts to force the driver to open will also
1443 * fail. The only way to recover is to unload the driver and
1444 * reload it again. If the system has recovered some MSIX
1445 * vectors then it may succeed.
1446 */
1447 adapter->num_msix_vectors = 0;
92915f71
GR		 1448 return err;
1449}
1450
1451static inline void ixgbevf_reset_q_vectors(struct ixgbevf_adapter *adapter)
1452{
1453 int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1454
1455 for (i = 0; i < q_vectors; i++) {
1456 struct ixgbevf_q_vector *q_vector = adapter->q_vector[i];
dec0d8e4 1457
6b43c446
AD		 1458 q_vector->rx.ring = NULL;
1459 q_vector->tx.ring = NULL;
1460 q_vector->rx.count = 0;
1461 q_vector->tx.count = 0;
92915f71
GR		 1462 }
1463}
1464
1465/**
1466 * ixgbevf_request_irq - initialize interrupts
1467 * @adapter: board private structure
1468 *
1469 * Attempts to configure interrupts using the best available
1470 * capabilities of the hardware and kernel.
1471 **/
1472static int ixgbevf_request_irq(struct ixgbevf_adapter *adapter)
1473{
50985b5f 1474 int err = ixgbevf_request_msix_irqs(adapter);
92915f71
GR		 1475
1476 if (err)
dec0d8e4 1477 hw_dbg(&adapter->hw, "request_irq failed, Error %d\n", err);
92915f71
GR		 1478
1479 return err;
1480}
1481
1482static void ixgbevf_free_irq(struct ixgbevf_adapter *adapter)
1483{
92915f71
GR		 1484 int i, q_vectors;
1485
1486 q_vectors = adapter->num_msix_vectors;
92915f71
GR		 1487 i = q_vectors - 1;
1488
fa71ae27 1489 free_irq(adapter->msix_entries[i].vector, adapter);
92915f71
GR		 1490 i--;
1491
1492 for (; i >= 0; i--) {
fa71ae27
AD		 1493 /* free only the irqs that were actually requested */
1494 if (!adapter->q_vector[i]->rx.ring &&
1495 !adapter->q_vector[i]->tx.ring)
1496 continue;
1497
92915f71
GR		 1498 free_irq(adapter->msix_entries[i].vector,
1499 adapter->q_vector[i]);
1500 }
1501
1502 ixgbevf_reset_q_vectors(adapter);
1503}
1504
1505/**
1506 * ixgbevf_irq_disable - Mask off interrupt generation on the NIC
1507 * @adapter: board private structure
1508 **/
1509static inline void ixgbevf_irq_disable(struct ixgbevf_adapter *adapter)
1510{
92915f71 1511 struct ixgbe_hw *hw = &adapter->hw;
5f3600eb 1512 int i;
92915f71 1513
5f3600eb 1514 IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, 0);
92915f71 1515 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, ~0);
5f3600eb 1516 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, 0);
92915f71
GR		 1517
1518 IXGBE_WRITE_FLUSH(hw);
1519
1520 for (i = 0; i < adapter->num_msix_vectors; i++)
1521 synchronize_irq(adapter->msix_entries[i].vector);
1522}
1523
1524/**
1525 * ixgbevf_irq_enable - Enable default interrupt generation settings
1526 * @adapter: board private structure
1527 **/
5f3600eb 1528static inline void ixgbevf_irq_enable(struct ixgbevf_adapter *adapter)
92915f71
GR		 1529{
1530 struct ixgbe_hw *hw = &adapter->hw;
92915f71 1531
5f3600eb
AD		 1532 IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, adapter->eims_enable_mask);
1533 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, adapter->eims_enable_mask);
1534 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_enable_mask);
92915f71
GR		 1535}
1536
de02decb
DS		 1537/**
1538 * ixgbevf_configure_tx_ring - Configure 82599 VF Tx ring after Reset
1539 * @adapter: board private structure
1540 * @ring: structure containing ring specific data
1541 *
1542 * Configure the Tx descriptor ring after a reset.
1543 **/
1544static void ixgbevf_configure_tx_ring(struct ixgbevf_adapter *adapter,
1545 struct ixgbevf_ring *ring)
1546{
1547 struct ixgbe_hw *hw = &adapter->hw;
1548 u64 tdba = ring->dma;
1549 int wait_loop = 10;
1550 u32 txdctl = IXGBE_TXDCTL_ENABLE;
1551 u8 reg_idx = ring->reg_idx;
1552
1553 /* disable queue to avoid issues while updating state */
1554 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
1555 IXGBE_WRITE_FLUSH(hw);
1556
1557 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(reg_idx), tdba & DMA_BIT_MASK(32));
1558 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAH(reg_idx), tdba >> 32);
1559 IXGBE_WRITE_REG(hw, IXGBE_VFTDLEN(reg_idx),
1560 ring->count * sizeof(union ixgbe_adv_tx_desc));
1561
1562 /* disable head writeback */
1563 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(reg_idx), 0);
1564 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(reg_idx), 0);
1565
1566 /* enable relaxed ordering */
1567 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(reg_idx),
1568 (IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1569 IXGBE_DCA_TXCTRL_DATA_RRO_EN));
1570
1571 /* reset head and tail pointers */
1572 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(reg_idx), 0);
1573 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(reg_idx), 0);
dbf8b0d8 1574 ring->tail = adapter->io_addr + IXGBE_VFTDT(reg_idx);
de02decb
DS		 1575
1576 /* reset ntu and ntc to place SW in sync with hardwdare */
1577 ring->next_to_clean = 0;
1578 ring->next_to_use = 0;
1579
1580 /* In order to avoid issues WTHRESH + PTHRESH should always be equal
1581 * to or less than the number of on chip descriptors, which is
1582 * currently 40.
1583 */
1584 txdctl |= (8 << 16); /* WTHRESH = 8 */
1585
1586 /* Setting PTHRESH to 32 both improves performance */
1587 txdctl |= (1 << 8) | /* HTHRESH = 1 */
1588 32; /* PTHRESH = 32 */
1589
e08400b7
ET		 1590 clear_bit(__IXGBEVF_HANG_CHECK_ARMED, &ring->state);
1591
de02decb
DS		 1592 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), txdctl);
1593
1594 /* poll to verify queue is enabled */
1595 do {
1596 usleep_range(1000, 2000);
1597 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(reg_idx));
1598 } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
1599 if (!wait_loop)
1600 pr_err("Could not enable Tx Queue %d\n", reg_idx);
1601}
1602
92915f71
GR		 1603/**
1604 * ixgbevf_configure_tx - Configure 82599 VF Transmit Unit after Reset
1605 * @adapter: board private structure
1606 *
1607 * Configure the Tx unit of the MAC after a reset.
1608 **/
1609static void ixgbevf_configure_tx(struct ixgbevf_adapter *adapter)
1610{
de02decb 1611 u32 i;
92915f71
GR		 1612
1613 /* Setup the HW Tx Head and Tail descriptor pointers */
de02decb
DS		 1614 for (i = 0; i < adapter->num_tx_queues; i++)
1615 ixgbevf_configure_tx_ring(adapter, adapter->tx_ring[i]);
92915f71
GR		 1616}
1617
1618#define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1619
1620static void ixgbevf_configure_srrctl(struct ixgbevf_adapter *adapter, int index)
1621{
92915f71
GR		 1622 struct ixgbe_hw *hw = &adapter->hw;
1623 u32 srrctl;
1624
92915f71
GR		 1625 srrctl = IXGBE_SRRCTL_DROP_EN;
1626
bad17234
ET		 1627 srrctl |= IXGBEVF_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
1628 srrctl |= IXGBEVF_RX_BUFSZ >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
77d5dfca 1629 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
92915f71 1630
92915f71
GR		 1631 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(index), srrctl);
1632}
1633
1bb9c639
DS		 1634static void ixgbevf_setup_psrtype(struct ixgbevf_adapter *adapter)
1635{
1636 struct ixgbe_hw *hw = &adapter->hw;
1637
1638 /* PSRTYPE must be initialized in 82599 */
1639 u32 psrtype = IXGBE_PSRTYPE_TCPHDR | IXGBE_PSRTYPE_UDPHDR |
1640 IXGBE_PSRTYPE_IPV4HDR | IXGBE_PSRTYPE_IPV6HDR |
1641 IXGBE_PSRTYPE_L2HDR;
1642
1643 if (adapter->num_rx_queues > 1)
1644 psrtype |= 1 << 29;
1645
1646 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, psrtype);
1647}
1648
de02decb
DS		 1649#define IXGBEVF_MAX_RX_DESC_POLL 10
1650static void ixgbevf_disable_rx_queue(struct ixgbevf_adapter *adapter,
1651 struct ixgbevf_ring *ring)
1652{
1653 struct ixgbe_hw *hw = &adapter->hw;
1654 int wait_loop = IXGBEVF_MAX_RX_DESC_POLL;
1655 u32 rxdctl;
1656 u8 reg_idx = ring->reg_idx;
1657
26597802
MR		 1658 if (IXGBE_REMOVED(hw->hw_addr))
1659 return;
de02decb
DS		 1660 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1661 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
1662
1663 /* write value back with RXDCTL.ENABLE bit cleared */
1664 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(reg_idx), rxdctl);
1665
dec0d8e4 1666 /* the hardware may take up to 100us to really disable the Rx queue */
de02decb
DS		 1667 do {
1668 udelay(10);
1669 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1670 } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
1671
1672 if (!wait_loop)
1673 pr_err("RXDCTL.ENABLE queue %d not cleared while polling\n",
1674 reg_idx);
1675}
1676
1677static void ixgbevf_rx_desc_queue_enable(struct ixgbevf_adapter *adapter,
1678 struct ixgbevf_ring *ring)
1679{
1680 struct ixgbe_hw *hw = &adapter->hw;
1681 int wait_loop = IXGBEVF_MAX_RX_DESC_POLL;
1682 u32 rxdctl;
1683 u8 reg_idx = ring->reg_idx;
1684
26597802
MR		 1685 if (IXGBE_REMOVED(hw->hw_addr))
1686 return;
de02decb
DS		 1687 do {
1688 usleep_range(1000, 2000);
1689 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1690 } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
1691
1692 if (!wait_loop)
1693 pr_err("RXDCTL.ENABLE queue %d not set while polling\n",
1694 reg_idx);
1695}
1696
9295edb4
ET		 1697static void ixgbevf_setup_vfmrqc(struct ixgbevf_adapter *adapter)
1698{
1699 struct ixgbe_hw *hw = &adapter->hw;
1700 u32 vfmrqc = 0, vfreta = 0;
9295edb4 1701 u16 rss_i = adapter->num_rx_queues;
9cba434f 1702 u8 i, j;
9295edb4
ET		 1703
1704 /* Fill out hash function seeds */
9cba434f
ET		 1705 netdev_rss_key_fill(adapter->rss_key, sizeof(adapter->rss_key));
1706 for (i = 0; i < IXGBEVF_VFRSSRK_REGS; i++)
1707 IXGBE_WRITE_REG(hw, IXGBE_VFRSSRK(i), adapter->rss_key[i]);
9295edb4 1708
9cba434f 1709 for (i = 0, j = 0; i < IXGBEVF_X550_VFRETA_SIZE; i++, j++) {
9295edb4
ET		 1710 if (j == rss_i)
1711 j = 0;
9cba434f
ET		 1712
1713 adapter->rss_indir_tbl[i] = j;
1714
1715 vfreta |= j << (i & 0x3) * 8;
1716 if ((i & 3) == 3) {
9295edb4 1717 IXGBE_WRITE_REG(hw, IXGBE_VFRETA(i >> 2), vfreta);
9cba434f
ET		 1718 vfreta = 0;
1719 }
9295edb4
ET		 1720 }
1721
1722 /* Perform hash on these packet types */
1723 vfmrqc |= IXGBE_VFMRQC_RSS_FIELD_IPV4 |
1724 IXGBE_VFMRQC_RSS_FIELD_IPV4_TCP |
1725 IXGBE_VFMRQC_RSS_FIELD_IPV6 |
1726 IXGBE_VFMRQC_RSS_FIELD_IPV6_TCP;
1727
1728 vfmrqc |= IXGBE_VFMRQC_RSSEN;
1729
1730 IXGBE_WRITE_REG(hw, IXGBE_VFMRQC, vfmrqc);
1731}
1732
de02decb
DS		 1733static void ixgbevf_configure_rx_ring(struct ixgbevf_adapter *adapter,
1734 struct ixgbevf_ring *ring)
1735{
1736 struct ixgbe_hw *hw = &adapter->hw;
1737 u64 rdba = ring->dma;
1738 u32 rxdctl;
1739 u8 reg_idx = ring->reg_idx;
1740
1741 /* disable queue to avoid issues while updating state */
1742 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1743 ixgbevf_disable_rx_queue(adapter, ring);
1744
1745 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAL(reg_idx), rdba & DMA_BIT_MASK(32));
1746 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAH(reg_idx), rdba >> 32);
1747 IXGBE_WRITE_REG(hw, IXGBE_VFRDLEN(reg_idx),
1748 ring->count * sizeof(union ixgbe_adv_rx_desc));
1749
1750 /* enable relaxed ordering */
1751 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(reg_idx),
1752 IXGBE_DCA_RXCTRL_DESC_RRO_EN);
1753
1754 /* reset head and tail pointers */
1755 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(reg_idx), 0);
1756 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(reg_idx), 0);
dbf8b0d8 1757 ring->tail = adapter->io_addr + IXGBE_VFRDT(reg_idx);
de02decb
DS		 1758
1759 /* reset ntu and ntc to place SW in sync with hardwdare */
1760 ring->next_to_clean = 0;
1761 ring->next_to_use = 0;
bad17234 1762 ring->next_to_alloc = 0;
de02decb
DS		 1763
1764 ixgbevf_configure_srrctl(adapter, reg_idx);
1765
bad17234
ET		 1766 /* allow any size packet since we can handle overflow */
1767 rxdctl &= ~IXGBE_RXDCTL_RLPML_EN;
1768
de02decb
DS		 1769 rxdctl |= IXGBE_RXDCTL_ENABLE | IXGBE_RXDCTL_VME;
1770 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(reg_idx), rxdctl);
1771
1772 ixgbevf_rx_desc_queue_enable(adapter, ring);
095e2617 1773 ixgbevf_alloc_rx_buffers(ring, ixgbevf_desc_unused(ring));
de02decb
DS		 1774}
1775
92915f71
GR		 1776/**
1777 * ixgbevf_configure_rx - Configure 82599 VF Receive Unit after Reset
1778 * @adapter: board private structure
1779 *
1780 * Configure the Rx unit of the MAC after a reset.
1781 **/
1782static void ixgbevf_configure_rx(struct ixgbevf_adapter *adapter)
1783{
de02decb 1784 int i;
bad17234
ET		 1785 struct ixgbe_hw *hw = &adapter->hw;
1786 struct net_device *netdev = adapter->netdev;
92915f71 1787
1bb9c639 1788 ixgbevf_setup_psrtype(adapter);
9295edb4
ET		 1789 if (hw->mac.type >= ixgbe_mac_X550_vf)
1790 ixgbevf_setup_vfmrqc(adapter);
dd1fe113 1791
bad17234
ET		 1792 /* notify the PF of our intent to use this size of frame */
1793 ixgbevf_rlpml_set_vf(hw, netdev->mtu + ETH_HLEN + ETH_FCS_LEN);
92915f71 1794
92915f71 1795 /* Setup the HW Rx Head and Tail Descriptor Pointers and
dec0d8e4
JK		 1796 * the Base and Length of the Rx Descriptor Ring
1797 */
de02decb
DS		 1798 for (i = 0; i < adapter->num_rx_queues; i++)
1799 ixgbevf_configure_rx_ring(adapter, adapter->rx_ring[i]);
92915f71
GR		 1800}
1801
80d5c368
PM		 1802static int ixgbevf_vlan_rx_add_vid(struct net_device *netdev,
1803 __be16 proto, u16 vid)
92915f71
GR		 1804{
1805 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1806 struct ixgbe_hw *hw = &adapter->hw;
2ddc7fe1
AD		 1807 int err;
1808
55fdd45b 1809 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 1810
92915f71 1811 /* add VID to filter table */
2ddc7fe1 1812 err = hw->mac.ops.set_vfta(hw, vid, 0, true);
1c55ed76 1813
55fdd45b 1814 spin_unlock_bh(&adapter->mbx_lock);
1c55ed76 1815
2ddc7fe1
AD		 1816 /* translate error return types so error makes sense */
1817 if (err == IXGBE_ERR_MBX)
1818 return -EIO;
1819
1820 if (err == IXGBE_ERR_INVALID_ARGUMENT)
1821 return -EACCES;
1822
dadcd65f 1823 set_bit(vid, adapter->active_vlans);
8e586137 1824
2ddc7fe1 1825 return err;
92915f71
GR		 1826}
1827
80d5c368
PM		 1828static int ixgbevf_vlan_rx_kill_vid(struct net_device *netdev,
1829 __be16 proto, u16 vid)
92915f71
GR		 1830{
1831 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1832 struct ixgbe_hw *hw = &adapter->hw;
50985b5f 1833 int err;
92915f71 1834
55fdd45b 1835 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 1836
92915f71 1837 /* remove VID from filter table */
92fe0bf7 1838 err = hw->mac.ops.set_vfta(hw, vid, 0, false);
1c55ed76 1839
55fdd45b 1840 spin_unlock_bh(&adapter->mbx_lock);
1c55ed76 1841
dadcd65f 1842 clear_bit(vid, adapter->active_vlans);
8e586137 1843
2ddc7fe1 1844 return err;
92915f71
GR		 1845}
1846
1847static void ixgbevf_restore_vlan(struct ixgbevf_adapter *adapter)
1848{
dadcd65f 1849 u16 vid;
92915f71 1850
dadcd65f 1851 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
80d5c368
PM		 1852 ixgbevf_vlan_rx_add_vid(adapter->netdev,
1853 htons(ETH_P_8021Q), vid);
92915f71
GR		 1854}
1855
46ec20ff
GR		 1856static int ixgbevf_write_uc_addr_list(struct net_device *netdev)
1857{
1858 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1859 struct ixgbe_hw *hw = &adapter->hw;
1860 int count = 0;
1861
1862 if ((netdev_uc_count(netdev)) > 10) {
dbd9636e 1863 pr_err("Too many unicast filters - No Space\n");
46ec20ff
GR		 1864 return -ENOSPC;
1865 }
1866
1867 if (!netdev_uc_empty(netdev)) {
1868 struct netdev_hw_addr *ha;
dec0d8e4 1869
46ec20ff
GR		 1870 netdev_for_each_uc_addr(ha, netdev) {
1871 hw->mac.ops.set_uc_addr(hw, ++count, ha->addr);
1872 udelay(200);
1873 }
1874 } else {
dec0d8e4
JK		 1875 /* If the list is empty then send message to PF driver to
1876 * clear all MAC VLANs on this VF.
46ec20ff
GR		 1877 */
1878 hw->mac.ops.set_uc_addr(hw, 0, NULL);
1879 }
1880
1881 return count;
1882}
1883
92915f71 1884/**
dee847f5 1885 * ixgbevf_set_rx_mode - Multicast and unicast set
92915f71
GR		 1886 * @netdev: network interface device structure
1887 *
1888 * The set_rx_method entry point is called whenever the multicast address
dee847f5
GR		 1889 * list, unicast address list or the network interface flags are updated.
1890 * This routine is responsible for configuring the hardware for proper
1891 * multicast mode and configuring requested unicast filters.
92915f71
GR		 1892 **/
1893static void ixgbevf_set_rx_mode(struct net_device *netdev)
1894{
1895 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1896 struct ixgbe_hw *hw = &adapter->hw;
8443c1a4
HS		 1897 unsigned int flags = netdev->flags;
1898 int xcast_mode;
1899
1900 xcast_mode = (flags & IFF_ALLMULTI) ? IXGBEVF_XCAST_MODE_ALLMULTI :
1901 (flags & (IFF_BROADCAST | IFF_MULTICAST)) ?
1902 IXGBEVF_XCAST_MODE_MULTI : IXGBEVF_XCAST_MODE_NONE;
92915f71 1903
55fdd45b 1904 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 1905
8443c1a4
HS		 1906 hw->mac.ops.update_xcast_mode(hw, netdev, xcast_mode);
1907
92915f71 1908 /* reprogram multicast list */
92fe0bf7 1909 hw->mac.ops.update_mc_addr_list(hw, netdev);
46ec20ff
GR		 1910
1911 ixgbevf_write_uc_addr_list(netdev);
1c55ed76 1912
55fdd45b 1913 spin_unlock_bh(&adapter->mbx_lock);
92915f71
GR		 1914}
1915
1916static void ixgbevf_napi_enable_all(struct ixgbevf_adapter *adapter)
1917{
1918 int q_idx;
1919 struct ixgbevf_q_vector *q_vector;
1920 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1921
1922 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
92915f71 1923 q_vector = adapter->q_vector[q_idx];
c777cdfa
JK		 1924#ifdef CONFIG_NET_RX_BUSY_POLL
1925 ixgbevf_qv_init_lock(adapter->q_vector[q_idx]);
1926#endif
fa71ae27 1927 napi_enable(&q_vector->napi);
92915f71
GR		 1928 }
1929}
1930
1931static void ixgbevf_napi_disable_all(struct ixgbevf_adapter *adapter)
1932{
1933 int q_idx;
1934 struct ixgbevf_q_vector *q_vector;
1935 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1936
1937 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1938 q_vector = adapter->q_vector[q_idx];
92915f71 1939 napi_disable(&q_vector->napi);
c777cdfa
JK		 1940#ifdef CONFIG_NET_RX_BUSY_POLL
1941 while (!ixgbevf_qv_disable(adapter->q_vector[q_idx])) {
1942 pr_info("QV %d locked\n", q_idx);
1943 usleep_range(1000, 20000);
1944 }
1945#endif /* CONFIG_NET_RX_BUSY_POLL */
92915f71
GR		 1946 }
1947}
1948
220fe050
DS		 1949static int ixgbevf_configure_dcb(struct ixgbevf_adapter *adapter)
1950{
1951 struct ixgbe_hw *hw = &adapter->hw;
1952 unsigned int def_q = 0;
1953 unsigned int num_tcs = 0;
2dc571aa
ET		 1954 unsigned int num_rx_queues = adapter->num_rx_queues;
1955 unsigned int num_tx_queues = adapter->num_tx_queues;
220fe050
DS		 1956 int err;
1957
1958 spin_lock_bh(&adapter->mbx_lock);
1959
1960 /* fetch queue configuration from the PF */
1961 err = ixgbevf_get_queues(hw, &num_tcs, &def_q);
1962
1963 spin_unlock_bh(&adapter->mbx_lock);
1964
1965 if (err)
1966 return err;
1967
1968 if (num_tcs > 1) {
2dc571aa
ET		 1969 /* we need only one Tx queue */
1970 num_tx_queues = 1;
1971
220fe050 1972 /* update default Tx ring register index */
87e70ab9 1973 adapter->tx_ring[0]->reg_idx = def_q;
220fe050
DS		 1974
1975 /* we need as many queues as traffic classes */
1976 num_rx_queues = num_tcs;
1977 }
1978
1979 /* if we have a bad config abort request queue reset */
2dc571aa
ET		 1980 if ((adapter->num_rx_queues != num_rx_queues) ||
1981 (adapter->num_tx_queues != num_tx_queues)) {
220fe050
DS		 1982 /* force mailbox timeout to prevent further messages */
1983 hw->mbx.timeout = 0;
1984
1985 /* wait for watchdog to come around and bail us out */
1986 adapter->flags |= IXGBEVF_FLAG_QUEUE_RESET_REQUESTED;
1987 }
1988
1989 return 0;
1990}
1991
92915f71
GR		 1992static void ixgbevf_configure(struct ixgbevf_adapter *adapter)
1993{
220fe050
DS		 1994 ixgbevf_configure_dcb(adapter);
1995
de02decb 1996 ixgbevf_set_rx_mode(adapter->netdev);
92915f71
GR		 1997
1998 ixgbevf_restore_vlan(adapter);
1999
2000 ixgbevf_configure_tx(adapter);
2001 ixgbevf_configure_rx(adapter);
92915f71
GR		 2002}
2003
33bd9f60
GR		 2004static void ixgbevf_save_reset_stats(struct ixgbevf_adapter *adapter)
2005{
2006 /* Only save pre-reset stats if there are some */
2007 if (adapter->stats.vfgprc || adapter->stats.vfgptc) {
2008 adapter->stats.saved_reset_vfgprc += adapter->stats.vfgprc -
2009 adapter->stats.base_vfgprc;
2010 adapter->stats.saved_reset_vfgptc += adapter->stats.vfgptc -
2011 adapter->stats.base_vfgptc;
2012 adapter->stats.saved_reset_vfgorc += adapter->stats.vfgorc -
2013 adapter->stats.base_vfgorc;
2014 adapter->stats.saved_reset_vfgotc += adapter->stats.vfgotc -
2015 adapter->stats.base_vfgotc;
2016 adapter->stats.saved_reset_vfmprc += adapter->stats.vfmprc -
2017 adapter->stats.base_vfmprc;
2018 }
2019}
2020
2021static void ixgbevf_init_last_counter_stats(struct ixgbevf_adapter *adapter)
2022{
2023 struct ixgbe_hw *hw = &adapter->hw;
2024
2025 adapter->stats.last_vfgprc = IXGBE_READ_REG(hw, IXGBE_VFGPRC);
2026 adapter->stats.last_vfgorc = IXGBE_READ_REG(hw, IXGBE_VFGORC_LSB);
2027 adapter->stats.last_vfgorc |=
2028 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGORC_MSB))) << 32);
2029 adapter->stats.last_vfgptc = IXGBE_READ_REG(hw, IXGBE_VFGPTC);
2030 adapter->stats.last_vfgotc = IXGBE_READ_REG(hw, IXGBE_VFGOTC_LSB);
2031 adapter->stats.last_vfgotc |=
2032 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGOTC_MSB))) << 32);
2033 adapter->stats.last_vfmprc = IXGBE_READ_REG(hw, IXGBE_VFMPRC);
2034
2035 adapter->stats.base_vfgprc = adapter->stats.last_vfgprc;
2036 adapter->stats.base_vfgorc = adapter->stats.last_vfgorc;
2037 adapter->stats.base_vfgptc = adapter->stats.last_vfgptc;
2038 adapter->stats.base_vfgotc = adapter->stats.last_vfgotc;
2039 adapter->stats.base_vfmprc = adapter->stats.last_vfmprc;
2040}
2041
31186785
AD		 2042static void ixgbevf_negotiate_api(struct ixgbevf_adapter *adapter)
2043{
2044 struct ixgbe_hw *hw = &adapter->hw;
94cf66f8
VZ		 2045 int api[] = { ixgbe_mbox_api_12,
2046 ixgbe_mbox_api_11,
56e94095 2047 ixgbe_mbox_api_10,
31186785 2048 ixgbe_mbox_api_unknown };
50985b5f 2049 int err, idx = 0;
31186785 2050
55fdd45b 2051 spin_lock_bh(&adapter->mbx_lock);
31186785
AD		 2052
2053 while (api[idx] != ixgbe_mbox_api_unknown) {
2054 err = ixgbevf_negotiate_api_version(hw, api[idx]);
2055 if (!err)
2056 break;
2057 idx++;
2058 }
2059
55fdd45b 2060 spin_unlock_bh(&adapter->mbx_lock);
31186785
AD		 2061}
2062
795180d8 2063static void ixgbevf_up_complete(struct ixgbevf_adapter *adapter)
92915f71
GR		 2064{
2065 struct net_device *netdev = adapter->netdev;
2066 struct ixgbe_hw *hw = &adapter->hw;
92915f71
GR		 2067
2068 ixgbevf_configure_msix(adapter);
2069
55fdd45b 2070 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 2071
92fe0bf7
GR		 2072 if (is_valid_ether_addr(hw->mac.addr))
2073 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
2074 else
2075 hw->mac.ops.set_rar(hw, 0, hw->mac.perm_addr, 0);
92915f71 2076
55fdd45b 2077 spin_unlock_bh(&adapter->mbx_lock);
1c55ed76 2078
4e857c58 2079 smp_mb__before_atomic();
92915f71
GR		 2080 clear_bit(__IXGBEVF_DOWN, &adapter->state);
2081 ixgbevf_napi_enable_all(adapter);
2082
d9bdb57f
ET		 2083 /* clear any pending interrupts, may auto mask */
2084 IXGBE_READ_REG(hw, IXGBE_VTEICR);
2085 ixgbevf_irq_enable(adapter);
2086
92915f71
GR		 2087 /* enable transmits */
2088 netif_tx_start_all_queues(netdev);
2089
33bd9f60
GR		 2090 ixgbevf_save_reset_stats(adapter);
2091 ixgbevf_init_last_counter_stats(adapter);
2092
4b2cd27f 2093 hw->mac.get_link_status = 1;
9ac5c5cc 2094 mod_timer(&adapter->service_timer, jiffies);
92915f71
GR		 2095}
2096
795180d8 2097void ixgbevf_up(struct ixgbevf_adapter *adapter)
92915f71 2098{
92915f71
GR		 2099 ixgbevf_configure(adapter);
2100
795180d8 2101 ixgbevf_up_complete(adapter);
92915f71
GR		 2102}
2103
2104/**
2105 * ixgbevf_clean_rx_ring - Free Rx Buffers per Queue
92915f71
GR		 2106 * @rx_ring: ring to free buffers from
2107 **/
05d063aa 2108static void ixgbevf_clean_rx_ring(struct ixgbevf_ring *rx_ring)
92915f71 2109{
bad17234 2110 struct device *dev = rx_ring->dev;
92915f71
GR		 2111 unsigned long size;
2112 unsigned int i;
2113
bad17234
ET		 2114 /* Free Rx ring sk_buff */
2115 if (rx_ring->skb) {
2116 dev_kfree_skb(rx_ring->skb);
2117 rx_ring->skb = NULL;
2118 }
2119
2120 /* ring already cleared, nothing to do */
c0456c23
GR		 2121 if (!rx_ring->rx_buffer_info)
2122 return;
92915f71 2123
bad17234 2124 /* Free all the Rx ring pages */
92915f71 2125 for (i = 0; i < rx_ring->count; i++) {
bad17234 2126 struct ixgbevf_rx_buffer *rx_buffer;
92915f71 2127
bad17234
ET		 2128 rx_buffer = &rx_ring->rx_buffer_info[i];
2129 if (rx_buffer->dma)
2130 dma_unmap_page(dev, rx_buffer->dma,
2131 PAGE_SIZE, DMA_FROM_DEVICE);
2132 rx_buffer->dma = 0;
2133 if (rx_buffer->page)
2134 __free_page(rx_buffer->page);
2135 rx_buffer->page = NULL;
92915f71
GR		 2136 }
2137
2138 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
2139 memset(rx_ring->rx_buffer_info, 0, size);
2140
2141 /* Zero out the descriptor ring */
2142 memset(rx_ring->desc, 0, rx_ring->size);
92915f71
GR		 2143}
2144
2145/**
2146 * ixgbevf_clean_tx_ring - Free Tx Buffers
92915f71
GR		 2147 * @tx_ring: ring to be cleaned
2148 **/
05d063aa 2149static void ixgbevf_clean_tx_ring(struct ixgbevf_ring *tx_ring)
92915f71
GR		 2150{
2151 struct ixgbevf_tx_buffer *tx_buffer_info;
2152 unsigned long size;
2153 unsigned int i;
2154
c0456c23
GR		 2155 if (!tx_ring->tx_buffer_info)
2156 return;
2157
92915f71 2158 /* Free all the Tx ring sk_buffs */
92915f71
GR		 2159 for (i = 0; i < tx_ring->count; i++) {
2160 tx_buffer_info = &tx_ring->tx_buffer_info[i];
70a10e25 2161 ixgbevf_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
92915f71
GR		 2162 }
2163
2164 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
2165 memset(tx_ring->tx_buffer_info, 0, size);
2166
2167 memset(tx_ring->desc, 0, tx_ring->size);
92915f71
GR		 2168}
2169
2170/**
2171 * ixgbevf_clean_all_rx_rings - Free Rx Buffers for all queues
2172 * @adapter: board private structure
2173 **/
2174static void ixgbevf_clean_all_rx_rings(struct ixgbevf_adapter *adapter)
2175{
2176 int i;
2177
2178 for (i = 0; i < adapter->num_rx_queues; i++)
05d063aa 2179 ixgbevf_clean_rx_ring(adapter->rx_ring[i]);
92915f71
GR		 2180}
2181
2182/**
2183 * ixgbevf_clean_all_tx_rings - Free Tx Buffers for all queues
2184 * @adapter: board private structure
2185 **/
2186static void ixgbevf_clean_all_tx_rings(struct ixgbevf_adapter *adapter)
2187{
2188 int i;
2189
2190 for (i = 0; i < adapter->num_tx_queues; i++)
05d063aa 2191 ixgbevf_clean_tx_ring(adapter->tx_ring[i]);
92915f71
GR		 2192}
2193
2194void ixgbevf_down(struct ixgbevf_adapter *adapter)
2195{
2196 struct net_device *netdev = adapter->netdev;
2197 struct ixgbe_hw *hw = &adapter->hw;
de02decb 2198 int i;
92915f71
GR		 2199
2200 /* signal that we are down to the interrupt handler */
5b346dc9
MR		 2201 if (test_and_set_bit(__IXGBEVF_DOWN, &adapter->state))
2202 return; /* do nothing if already down */
858c3dda 2203
dec0d8e4 2204 /* disable all enabled Rx queues */
858c3dda 2205 for (i = 0; i < adapter->num_rx_queues; i++)
87e70ab9 2206 ixgbevf_disable_rx_queue(adapter, adapter->rx_ring[i]);
92915f71 2207
d9bdb57f 2208 usleep_range(10000, 20000);
92915f71
GR		 2209
2210 netif_tx_stop_all_queues(netdev);
2211
d9bdb57f
ET		 2212 /* call carrier off first to avoid false dev_watchdog timeouts */
2213 netif_carrier_off(netdev);
2214 netif_tx_disable(netdev);
2215
92915f71
GR		 2216 ixgbevf_irq_disable(adapter);
2217
2218 ixgbevf_napi_disable_all(adapter);
2219
9ac5c5cc 2220 del_timer_sync(&adapter->service_timer);
92915f71
GR		 2221
2222 /* disable transmits in the hardware now that interrupts are off */
2223 for (i = 0; i < adapter->num_tx_queues; i++) {
de02decb
DS		 2224 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
2225
2226 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx),
2227 IXGBE_TXDCTL_SWFLSH);
92915f71
GR		 2228 }
2229
92915f71
GR		 2230 if (!pci_channel_offline(adapter->pdev))
2231 ixgbevf_reset(adapter);
2232
2233 ixgbevf_clean_all_tx_rings(adapter);
2234 ixgbevf_clean_all_rx_rings(adapter);
2235}
2236
2237void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter)
2238{
2239 WARN_ON(in_interrupt());
c0456c23 2240
92915f71
GR		 2241 while (test_and_set_bit(__IXGBEVF_RESETTING, &adapter->state))
2242 msleep(1);
2243
4b2cd27f
AD		 2244 ixgbevf_down(adapter);
2245 ixgbevf_up(adapter);
92915f71
GR		 2246
2247 clear_bit(__IXGBEVF_RESETTING, &adapter->state);
2248}
2249
2250void ixgbevf_reset(struct ixgbevf_adapter *adapter)
2251{
2252 struct ixgbe_hw *hw = &adapter->hw;
2253 struct net_device *netdev = adapter->netdev;
2254
798e381a 2255 if (hw->mac.ops.reset_hw(hw)) {
92915f71 2256 hw_dbg(hw, "PF still resetting\n");
798e381a 2257 } else {
92915f71 2258 hw->mac.ops.init_hw(hw);
798e381a
DS		 2259 ixgbevf_negotiate_api(adapter);
2260 }
92915f71
GR		 2261
2262 if (is_valid_ether_addr(adapter->hw.mac.addr)) {
91a76baa
ET		 2263 ether_addr_copy(netdev->dev_addr, adapter->hw.mac.addr);
2264 ether_addr_copy(netdev->perm_addr, adapter->hw.mac.addr);
92915f71 2265 }
e66c92ad
ET		 2266
2267 adapter->last_reset = jiffies;
92915f71
GR		 2268}
2269
e45dd5fe
JK		 2270static int ixgbevf_acquire_msix_vectors(struct ixgbevf_adapter *adapter,
2271 int vectors)
92915f71 2272{
a5f9337b 2273 int vector_threshold;
92915f71 2274
fa71ae27
AD		 2275 /* We'll want at least 2 (vector_threshold):
2276 * 1) TxQ[0] + RxQ[0] handler
2277 * 2) Other (Link Status Change, etc.)
92915f71
GR		 2278 */
2279 vector_threshold = MIN_MSIX_COUNT;
2280
2281 /* The more we get, the more we will assign to Tx/Rx Cleanup
2282 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
2283 * Right now, we simply care about how many we'll get; we'll
2284 * set them up later while requesting irq's.
2285 */
5c1e3588
AG		 2286 vectors = pci_enable_msix_range(adapter->pdev, adapter->msix_entries,
2287 vector_threshold, vectors);
92915f71 2288
5c1e3588 2289 if (vectors < 0) {
e45dd5fe
JK		 2290 dev_err(&adapter->pdev->dev,
2291 "Unable to allocate MSI-X interrupts\n");
92915f71
GR		 2292 kfree(adapter->msix_entries);
2293 adapter->msix_entries = NULL;
5c1e3588 2294 return vectors;
92915f71 2295 }
dee847f5 2296
5c1e3588
AG		 2297 /* Adjust for only the vectors we'll use, which is minimum
2298 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
2299 * vectors we were allocated.
2300 */
2301 adapter->num_msix_vectors = vectors;
2302
2303 return 0;
92915f71
GR		 2304}
2305
49ce9c2c
BH		 2306/**
2307 * ixgbevf_set_num_queues - Allocate queues for device, feature dependent
92915f71
GR		 2308 * @adapter: board private structure to initialize
2309 *
2310 * This is the top level queue allocation routine. The order here is very
2311 * important, starting with the "most" number of features turned on at once,
2312 * and ending with the smallest set of features. This way large combinations
2313 * can be allocated if they're turned on, and smaller combinations are the
2314 * fallthrough conditions.
2315 *
2316 **/
2317static void ixgbevf_set_num_queues(struct ixgbevf_adapter *adapter)
2318{
220fe050
DS		 2319 struct ixgbe_hw *hw = &adapter->hw;
2320 unsigned int def_q = 0;
2321 unsigned int num_tcs = 0;
2322 int err;
2323
92915f71
GR		 2324 /* Start with base case */
2325 adapter->num_rx_queues = 1;
2326 adapter->num_tx_queues = 1;
220fe050
DS		 2327
2328 spin_lock_bh(&adapter->mbx_lock);
2329
2330 /* fetch queue configuration from the PF */
2331 err = ixgbevf_get_queues(hw, &num_tcs, &def_q);
2332
2333 spin_unlock_bh(&adapter->mbx_lock);
2334
2335 if (err)
2336 return;
2337
2338 /* we need as many queues as traffic classes */
2dc571aa 2339 if (num_tcs > 1) {
220fe050 2340 adapter->num_rx_queues = num_tcs;
2dc571aa
ET		 2341 } else {
2342 u16 rss = min_t(u16, num_online_cpus(), IXGBEVF_MAX_RSS_QUEUES);
2343
2344 switch (hw->api_version) {
2345 case ixgbe_mbox_api_11:
94cf66f8 2346 case ixgbe_mbox_api_12:
2dc571aa
ET		 2347 adapter->num_rx_queues = rss;
2348 adapter->num_tx_queues = rss;
2349 default:
2350 break;
2351 }
2352 }
92915f71
GR		 2353}
2354
2355/**
2356 * ixgbevf_alloc_queues - Allocate memory for all rings
2357 * @adapter: board private structure to initialize
2358 *
2359 * We allocate one ring per queue at run-time since we don't know the
2360 * number of queues at compile-time. The polling_netdev array is
2361 * intended for Multiqueue, but should work fine with a single queue.
2362 **/
2363static int ixgbevf_alloc_queues(struct ixgbevf_adapter *adapter)
2364{
87e70ab9
DS		 2365 struct ixgbevf_ring *ring;
2366 int rx = 0, tx = 0;
92915f71 2367
87e70ab9
DS		 2368 for (; tx < adapter->num_tx_queues; tx++) {
2369 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
2370 if (!ring)
2371 goto err_allocation;
92915f71 2372
87e70ab9
DS		 2373 ring->dev = &adapter->pdev->dev;
2374 ring->netdev = adapter->netdev;
2375 ring->count = adapter->tx_ring_count;
2376 ring->queue_index = tx;
2377 ring->reg_idx = tx;
92915f71 2378
87e70ab9 2379 adapter->tx_ring[tx] = ring;
92915f71
GR		 2380 }
2381
87e70ab9
DS		 2382 for (; rx < adapter->num_rx_queues; rx++) {
2383 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
2384 if (!ring)
2385 goto err_allocation;
2386
2387 ring->dev = &adapter->pdev->dev;
2388 ring->netdev = adapter->netdev;
2389
2390 ring->count = adapter->rx_ring_count;
2391 ring->queue_index = rx;
2392 ring->reg_idx = rx;
2393
2394 adapter->rx_ring[rx] = ring;
92915f71
GR		 2395 }
2396
2397 return 0;
2398
87e70ab9
DS		 2399err_allocation:
2400 while (tx) {
2401 kfree(adapter->tx_ring[--tx]);
2402 adapter->tx_ring[tx] = NULL;
2403 }
2404
2405 while (rx) {
2406 kfree(adapter->rx_ring[--rx]);
2407 adapter->rx_ring[rx] = NULL;
2408 }
92915f71
GR		 2409 return -ENOMEM;
2410}
2411
2412/**
2413 * ixgbevf_set_interrupt_capability - set MSI-X or FAIL if not supported
2414 * @adapter: board private structure to initialize
2415 *
2416 * Attempt to configure the interrupts using the best available
2417 * capabilities of the hardware and the kernel.
2418 **/
2419static int ixgbevf_set_interrupt_capability(struct ixgbevf_adapter *adapter)
2420{
91e2b89b 2421 struct net_device *netdev = adapter->netdev;
50985b5f 2422 int err;
92915f71
GR		 2423 int vector, v_budget;
2424
dec0d8e4 2425 /* It's easy to be greedy for MSI-X vectors, but it really
92915f71
GR		 2426 * doesn't do us much good if we have a lot more vectors
2427 * than CPU's. So let's be conservative and only ask for
fa71ae27
AD		 2428 * (roughly) the same number of vectors as there are CPU's.
2429 * The default is to use pairs of vectors.
92915f71 2430 */
fa71ae27
AD		 2431 v_budget = max(adapter->num_rx_queues, adapter->num_tx_queues);
2432 v_budget = min_t(int, v_budget, num_online_cpus());
2433 v_budget += NON_Q_VECTORS;
92915f71
GR		 2434
2435 /* A failure in MSI-X entry allocation isn't fatal, but it does
dec0d8e4
JK		 2436 * mean we disable MSI-X capabilities of the adapter.
2437 */
92915f71
GR		 2438 adapter->msix_entries = kcalloc(v_budget,
2439 sizeof(struct msix_entry), GFP_KERNEL);
50985b5f
MR		 2440 if (!adapter->msix_entries)
2441 return -ENOMEM;
92915f71
GR		 2442
2443 for (vector = 0; vector < v_budget; vector++)
2444 adapter->msix_entries[vector].entry = vector;
2445
e45dd5fe
JK		 2446 err = ixgbevf_acquire_msix_vectors(adapter, v_budget);
2447 if (err)
50985b5f 2448 return err;
92915f71 2449
91e2b89b
GR		 2450 err = netif_set_real_num_tx_queues(netdev, adapter->num_tx_queues);
2451 if (err)
50985b5f 2452 return err;
91e2b89b 2453
50985b5f 2454 return netif_set_real_num_rx_queues(netdev, adapter->num_rx_queues);
92915f71
GR		 2455}
2456
2457/**
2458 * ixgbevf_alloc_q_vectors - Allocate memory for interrupt vectors
2459 * @adapter: board private structure to initialize
2460 *
2461 * We allocate one q_vector per queue interrupt. If allocation fails we
2462 * return -ENOMEM.
2463 **/
2464static int ixgbevf_alloc_q_vectors(struct ixgbevf_adapter *adapter)
2465{
2466 int q_idx, num_q_vectors;
2467 struct ixgbevf_q_vector *q_vector;
92915f71
GR		 2468
2469 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
92915f71
GR		 2470
2471 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
2472 q_vector = kzalloc(sizeof(struct ixgbevf_q_vector), GFP_KERNEL);
2473 if (!q_vector)
2474 goto err_out;
2475 q_vector->adapter = adapter;
2476 q_vector->v_idx = q_idx;
fa71ae27
AD		 2477 netif_napi_add(adapter->netdev, &q_vector->napi,
2478 ixgbevf_poll, 64);
92915f71
GR		 2479 adapter->q_vector[q_idx] = q_vector;
2480 }
2481
2482 return 0;
2483
2484err_out:
2485 while (q_idx) {
2486 q_idx--;
2487 q_vector = adapter->q_vector[q_idx];
c777cdfa
JK		 2488#ifdef CONFIG_NET_RX_BUSY_POLL
2489 napi_hash_del(&q_vector->napi);
2490#endif
92915f71
GR		 2491 netif_napi_del(&q_vector->napi);
2492 kfree(q_vector);
2493 adapter->q_vector[q_idx] = NULL;
2494 }
2495 return -ENOMEM;
2496}
2497
2498/**
2499 * ixgbevf_free_q_vectors - Free memory allocated for interrupt vectors
2500 * @adapter: board private structure to initialize
2501 *
2502 * This function frees the memory allocated to the q_vectors. In addition if
2503 * NAPI is enabled it will delete any references to the NAPI struct prior
2504 * to freeing the q_vector.
2505 **/
2506static void ixgbevf_free_q_vectors(struct ixgbevf_adapter *adapter)
2507{
f4477702 2508 int q_idx, num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
92915f71
GR		 2509
2510 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
2511 struct ixgbevf_q_vector *q_vector = adapter->q_vector[q_idx];
2512
2513 adapter->q_vector[q_idx] = NULL;
c777cdfa
JK		 2514#ifdef CONFIG_NET_RX_BUSY_POLL
2515 napi_hash_del(&q_vector->napi);
2516#endif
f4477702 2517 netif_napi_del(&q_vector->napi);
92915f71
GR		 2518 kfree(q_vector);
2519 }
2520}
2521
2522/**
2523 * ixgbevf_reset_interrupt_capability - Reset MSIX setup
2524 * @adapter: board private structure
2525 *
2526 **/
2527static void ixgbevf_reset_interrupt_capability(struct ixgbevf_adapter *adapter)
2528{
2529 pci_disable_msix(adapter->pdev);
2530 kfree(adapter->msix_entries);
2531 adapter->msix_entries = NULL;
92915f71
GR		 2532}
2533
2534/**
2535 * ixgbevf_init_interrupt_scheme - Determine if MSIX is supported and init
2536 * @adapter: board private structure to initialize
2537 *
2538 **/
2539static int ixgbevf_init_interrupt_scheme(struct ixgbevf_adapter *adapter)
2540{
2541 int err;
2542
2543 /* Number of supported queues */
2544 ixgbevf_set_num_queues(adapter);
2545
2546 err = ixgbevf_set_interrupt_capability(adapter);
2547 if (err) {
2548 hw_dbg(&adapter->hw,
2549 "Unable to setup interrupt capabilities\n");
2550 goto err_set_interrupt;
2551 }
2552
2553 err = ixgbevf_alloc_q_vectors(adapter);
2554 if (err) {
dec0d8e4 2555 hw_dbg(&adapter->hw, "Unable to allocate memory for queue vectors\n");
92915f71
GR		 2556 goto err_alloc_q_vectors;
2557 }
2558
2559 err = ixgbevf_alloc_queues(adapter);
2560 if (err) {
dbd9636e 2561 pr_err("Unable to allocate memory for queues\n");
92915f71
GR		 2562 goto err_alloc_queues;
2563 }
2564
dec0d8e4 2565 hw_dbg(&adapter->hw, "Multiqueue %s: Rx Queue count = %u, Tx Queue count = %u\n",
92915f71
GR		 2566 (adapter->num_rx_queues > 1) ? "Enabled" :
2567 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
2568
2569 set_bit(__IXGBEVF_DOWN, &adapter->state);
2570
2571 return 0;
2572err_alloc_queues:
2573 ixgbevf_free_q_vectors(adapter);
2574err_alloc_q_vectors:
2575 ixgbevf_reset_interrupt_capability(adapter);
2576err_set_interrupt:
2577 return err;
2578}
2579
0ac1e8ce
AD		 2580/**
2581 * ixgbevf_clear_interrupt_scheme - Clear the current interrupt scheme settings
2582 * @adapter: board private structure to clear interrupt scheme on
2583 *
2584 * We go through and clear interrupt specific resources and reset the structure
2585 * to pre-load conditions
2586 **/
2587static void ixgbevf_clear_interrupt_scheme(struct ixgbevf_adapter *adapter)
2588{
87e70ab9
DS		 2589 int i;
2590
2591 for (i = 0; i < adapter->num_tx_queues; i++) {
2592 kfree(adapter->tx_ring[i]);
2593 adapter->tx_ring[i] = NULL;
2594 }
2595 for (i = 0; i < adapter->num_rx_queues; i++) {
2596 kfree(adapter->rx_ring[i]);
2597 adapter->rx_ring[i] = NULL;
2598 }
2599
0ac1e8ce
AD		 2600 adapter->num_tx_queues = 0;
2601 adapter->num_rx_queues = 0;
2602
2603 ixgbevf_free_q_vectors(adapter);
2604 ixgbevf_reset_interrupt_capability(adapter);
2605}
2606
92915f71
GR		 2607/**
2608 * ixgbevf_sw_init - Initialize general software structures
92915f71
GR		 2609 * @adapter: board private structure to initialize
2610 *
2611 * ixgbevf_sw_init initializes the Adapter private data structure.
2612 * Fields are initialized based on PCI device information and
2613 * OS network device settings (MTU size).
2614 **/
9f9a12f8 2615static int ixgbevf_sw_init(struct ixgbevf_adapter *adapter)
92915f71
GR		 2616{
2617 struct ixgbe_hw *hw = &adapter->hw;
2618 struct pci_dev *pdev = adapter->pdev;
e1941a74 2619 struct net_device *netdev = adapter->netdev;
92915f71
GR		 2620 int err;
2621
2622 /* PCI config space info */
92915f71
GR		 2623 hw->vendor_id = pdev->vendor;
2624 hw->device_id = pdev->device;
ff938e43 2625 hw->revision_id = pdev->revision;
92915f71
GR		 2626 hw->subsystem_vendor_id = pdev->subsystem_vendor;
2627 hw->subsystem_device_id = pdev->subsystem_device;
2628
2629 hw->mbx.ops.init_params(hw);
56e94095
AD		 2630
2631 /* assume legacy case in which PF would only give VF 2 queues */
2632 hw->mac.max_tx_queues = 2;
2633 hw->mac.max_rx_queues = 2;
2634
798e381a
DS		 2635 /* lock to protect mailbox accesses */
2636 spin_lock_init(&adapter->mbx_lock);
2637
92915f71
GR		 2638 err = hw->mac.ops.reset_hw(hw);
2639 if (err) {
2640 dev_info(&pdev->dev,
e1941a74 2641 "PF still in reset state. Is the PF interface up?\n");
92915f71
GR		 2642 } else {
2643 err = hw->mac.ops.init_hw(hw);
2644 if (err) {
dbd9636e 2645 pr_err("init_shared_code failed: %d\n", err);
92915f71
GR		 2646 goto out;
2647 }
798e381a 2648 ixgbevf_negotiate_api(adapter);
e1941a74
GR		 2649 err = hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
2650 if (err)
2651 dev_info(&pdev->dev, "Error reading MAC address\n");
2652 else if (is_zero_ether_addr(adapter->hw.mac.addr))
2653 dev_info(&pdev->dev,
2654 "MAC address not assigned by administrator.\n");
91a76baa 2655 ether_addr_copy(netdev->dev_addr, hw->mac.addr);
e1941a74
GR		 2656 }
2657
2658 if (!is_valid_ether_addr(netdev->dev_addr)) {
2659 dev_info(&pdev->dev, "Assigning random MAC address\n");
2660 eth_hw_addr_random(netdev);
91a76baa 2661 ether_addr_copy(hw->mac.addr, netdev->dev_addr);
465fc643 2662 ether_addr_copy(hw->mac.perm_addr, netdev->dev_addr);
92915f71
GR		 2663 }
2664
2665 /* Enable dynamic interrupt throttling rates */
5f3600eb
AD		 2666 adapter->rx_itr_setting = 1;
2667 adapter->tx_itr_setting = 1;
92915f71 2668
92915f71
GR		 2669 /* set default ring sizes */
2670 adapter->tx_ring_count = IXGBEVF_DEFAULT_TXD;
2671 adapter->rx_ring_count = IXGBEVF_DEFAULT_RXD;
2672
92915f71 2673 set_bit(__IXGBEVF_DOWN, &adapter->state);
1a0d6ae5 2674 return 0;
92915f71
GR		 2675
2676out:
2677 return err;
2678}
2679
92915f71
GR		 2680#define UPDATE_VF_COUNTER_32bit(reg, last_counter, counter) \
2681 { \
2682 u32 current_counter = IXGBE_READ_REG(hw, reg); \
2683 if (current_counter < last_counter) \
2684 counter += 0x100000000LL; \
2685 last_counter = current_counter; \
2686 counter &= 0xFFFFFFFF00000000LL; \
2687 counter |= current_counter; \
2688 }
2689
2690#define UPDATE_VF_COUNTER_36bit(reg_lsb, reg_msb, last_counter, counter) \
2691 { \
2692 u64 current_counter_lsb = IXGBE_READ_REG(hw, reg_lsb); \
2693 u64 current_counter_msb = IXGBE_READ_REG(hw, reg_msb); \
dec0d8e4
JK		 2694 u64 current_counter = (current_counter_msb << 32) | \
2695 current_counter_lsb; \
92915f71
GR		 2696 if (current_counter < last_counter) \
2697 counter += 0x1000000000LL; \
2698 last_counter = current_counter; \
2699 counter &= 0xFFFFFFF000000000LL; \
2700 counter |= current_counter; \
2701 }
2702/**
2703 * ixgbevf_update_stats - Update the board statistics counters.
2704 * @adapter: board private structure
2705 **/
2706void ixgbevf_update_stats(struct ixgbevf_adapter *adapter)
2707{
2708 struct ixgbe_hw *hw = &adapter->hw;
55fb277c 2709 int i;
92915f71 2710
e66c92ad
ET		 2711 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
2712 test_bit(__IXGBEVF_RESETTING, &adapter->state))
088245a3
GR		 2713 return;
2714
92915f71
GR		 2715 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPRC, adapter->stats.last_vfgprc,
2716 adapter->stats.vfgprc);
2717 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPTC, adapter->stats.last_vfgptc,
2718 adapter->stats.vfgptc);
2719 UPDATE_VF_COUNTER_36bit(IXGBE_VFGORC_LSB, IXGBE_VFGORC_MSB,
2720 adapter->stats.last_vfgorc,
2721 adapter->stats.vfgorc);
2722 UPDATE_VF_COUNTER_36bit(IXGBE_VFGOTC_LSB, IXGBE_VFGOTC_MSB,
2723 adapter->stats.last_vfgotc,
2724 adapter->stats.vfgotc);
2725 UPDATE_VF_COUNTER_32bit(IXGBE_VFMPRC, adapter->stats.last_vfmprc,
2726 adapter->stats.vfmprc);
55fb277c
GR		 2727
2728 for (i = 0; i < adapter->num_rx_queues; i++) {
2729 adapter->hw_csum_rx_error +=
87e70ab9 2730 adapter->rx_ring[i]->hw_csum_rx_error;
87e70ab9 2731 adapter->rx_ring[i]->hw_csum_rx_error = 0;
55fb277c 2732 }
92915f71
GR		 2733}
2734
2735/**
9ac5c5cc 2736 * ixgbevf_service_timer - Timer Call-back
92915f71
GR		 2737 * @data: pointer to adapter cast into an unsigned long
2738 **/
9ac5c5cc 2739static void ixgbevf_service_timer(unsigned long data)
92915f71
GR		 2740{
2741 struct ixgbevf_adapter *adapter = (struct ixgbevf_adapter *)data;
e66c92ad 2742
9ac5c5cc
ET		 2743 /* Reset the timer */
2744 mod_timer(&adapter->service_timer, (HZ * 2) + jiffies);
2745
2746 ixgbevf_service_event_schedule(adapter);
e66c92ad
ET		 2747}
2748
9ac5c5cc 2749static void ixgbevf_reset_subtask(struct ixgbevf_adapter *adapter)
e66c92ad 2750{
9ac5c5cc
ET		 2751 if (!(adapter->flags & IXGBEVF_FLAG_RESET_REQUESTED))
2752 return;
e66c92ad 2753
9ac5c5cc 2754 adapter->flags &= ~IXGBEVF_FLAG_RESET_REQUESTED;
e66c92ad
ET		 2755
2756 /* If we're already down or resetting, just bail */
2757 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
2758 test_bit(__IXGBEVF_RESETTING, &adapter->state))
2759 return;
2760
2761 adapter->tx_timeout_count++;
2762
2763 ixgbevf_reinit_locked(adapter);
2764}
2765
dec0d8e4
JK		 2766/**
2767 * ixgbevf_check_hang_subtask - check for hung queues and dropped interrupts
2768 * @adapter: pointer to the device adapter structure
e66c92ad
ET		 2769 *
2770 * This function serves two purposes. First it strobes the interrupt lines
2771 * in order to make certain interrupts are occurring. Secondly it sets the
2772 * bits needed to check for TX hangs. As a result we should immediately
2773 * determine if a hang has occurred.
dec0d8e4 2774 **/
e66c92ad
ET		 2775static void ixgbevf_check_hang_subtask(struct ixgbevf_adapter *adapter)
2776{
92915f71 2777 struct ixgbe_hw *hw = &adapter->hw;
5f3600eb 2778 u32 eics = 0;
92915f71
GR		 2779 int i;
2780
e66c92ad
ET		 2781 /* If we're down or resetting, just bail */
2782 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
2783 test_bit(__IXGBEVF_RESETTING, &adapter->state))
2784 return;
92915f71 2785
e08400b7
ET		 2786 /* Force detection of hung controller */
2787 if (netif_carrier_ok(adapter->netdev)) {
2788 for (i = 0; i < adapter->num_tx_queues; i++)
2789 set_check_for_tx_hang(adapter->tx_ring[i]);
2790 }
2791
dec0d8e4 2792 /* get one bit for every active Tx/Rx interrupt vector */
92915f71
GR		 2793 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
2794 struct ixgbevf_q_vector *qv = adapter->q_vector[i];
9ac5c5cc 2795
6b43c446 2796 if (qv->rx.ring || qv->tx.ring)
5f3600eb 2797 eics |= 1 << i;
92915f71
GR		 2798 }
2799
e66c92ad 2800 /* Cause software interrupt to ensure rings are cleaned */
5f3600eb 2801 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, eics);
e66c92ad 2802}
92915f71 2803
e66c92ad
ET		 2804/**
2805 * ixgbevf_watchdog_update_link - update the link status
dec0d8e4 2806 * @adapter: pointer to the device adapter structure
e66c92ad
ET		 2807 **/
2808static void ixgbevf_watchdog_update_link(struct ixgbevf_adapter *adapter)
2809{
2810 struct ixgbe_hw *hw = &adapter->hw;
2811 u32 link_speed = adapter->link_speed;
2812 bool link_up = adapter->link_up;
2813 s32 err;
2814
2815 spin_lock_bh(&adapter->mbx_lock);
2816
2817 err = hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
2818
2819 spin_unlock_bh(&adapter->mbx_lock);
2820
2821 /* if check for link returns error we will need to reset */
2822 if (err && time_after(jiffies, adapter->last_reset + (10 * HZ))) {
9ac5c5cc 2823 adapter->flags |= IXGBEVF_FLAG_RESET_REQUESTED;
e66c92ad
ET		 2824 link_up = false;
2825 }
2826
2827 adapter->link_up = link_up;
2828 adapter->link_speed = link_speed;
92915f71
GR		 2829}
2830
e66c92ad
ET		 2831/**
2832 * ixgbevf_watchdog_link_is_up - update netif_carrier status and
2833 * print link up message
dec0d8e4 2834 * @adapter: pointer to the device adapter structure
e66c92ad
ET		 2835 **/
2836static void ixgbevf_watchdog_link_is_up(struct ixgbevf_adapter *adapter)
92915f71 2837{
e66c92ad 2838 struct net_device *netdev = adapter->netdev;
92915f71 2839
e66c92ad
ET		 2840 /* only continue if link was previously down */
2841 if (netif_carrier_ok(netdev))
92915f71
GR		 2842 return;
2843
e66c92ad
ET		 2844 dev_info(&adapter->pdev->dev, "NIC Link is Up %s\n",
2845 (adapter->link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
2846 "10 Gbps" :
2847 (adapter->link_speed == IXGBE_LINK_SPEED_1GB_FULL) ?
2848 "1 Gbps" :
2849 (adapter->link_speed == IXGBE_LINK_SPEED_100_FULL) ?
2850 "100 Mbps" :
2851 "unknown speed");
92915f71 2852
e66c92ad
ET		 2853 netif_carrier_on(netdev);
2854}
2855
2856/**
2857 * ixgbevf_watchdog_link_is_down - update netif_carrier status and
2858 * print link down message
dec0d8e4 2859 * @adapter: pointer to the adapter structure
e66c92ad
ET		 2860 **/
2861static void ixgbevf_watchdog_link_is_down(struct ixgbevf_adapter *adapter)
2862{
2863 struct net_device *netdev = adapter->netdev;
2864
2865 adapter->link_speed = 0;
2866
2867 /* only continue if link was up previously */
2868 if (!netif_carrier_ok(netdev))
2869 return;
2870
2871 dev_info(&adapter->pdev->dev, "NIC Link is Down\n");
2872
2873 netif_carrier_off(netdev);
92915f71
GR		 2874}
2875
2876/**
9ac5c5cc
ET		 2877 * ixgbevf_watchdog_subtask - worker thread to bring link up
2878 * @work: pointer to work_struct containing our data
2879 **/
2880static void ixgbevf_watchdog_subtask(struct ixgbevf_adapter *adapter)
2881{
2882 /* if interface is down do nothing */
2883 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
2884 test_bit(__IXGBEVF_RESETTING, &adapter->state))
2885 return;
2886
2887 ixgbevf_watchdog_update_link(adapter);
2888
2889 if (adapter->link_up)
2890 ixgbevf_watchdog_link_is_up(adapter);
2891 else
2892 ixgbevf_watchdog_link_is_down(adapter);
2893
2894 ixgbevf_update_stats(adapter);
2895}
2896
2897/**
2898 * ixgbevf_service_task - manages and runs subtasks
92915f71
GR		 2899 * @work: pointer to work_struct containing our data
2900 **/
9ac5c5cc 2901static void ixgbevf_service_task(struct work_struct *work)
92915f71
GR		 2902{
2903 struct ixgbevf_adapter *adapter = container_of(work,
2904 struct ixgbevf_adapter,
9ac5c5cc 2905 service_task);
92915f71 2906 struct ixgbe_hw *hw = &adapter->hw;
92915f71 2907
26597802
MR		 2908 if (IXGBE_REMOVED(hw->hw_addr)) {
2909 if (!test_bit(__IXGBEVF_DOWN, &adapter->state)) {
2910 rtnl_lock();
2911 ixgbevf_down(adapter);
2912 rtnl_unlock();
2913 }
2914 return;
2915 }
e66c92ad 2916
220fe050 2917 ixgbevf_queue_reset_subtask(adapter);
9ac5c5cc
ET		 2918 ixgbevf_reset_subtask(adapter);
2919 ixgbevf_watchdog_subtask(adapter);
e66c92ad
ET		 2920 ixgbevf_check_hang_subtask(adapter);
2921
9ac5c5cc 2922 ixgbevf_service_event_complete(adapter);
92915f71
GR		 2923}
2924
2925/**
2926 * ixgbevf_free_tx_resources - Free Tx Resources per Queue
92915f71
GR		 2927 * @tx_ring: Tx descriptor ring for a specific queue
2928 *
2929 * Free all transmit software resources
2930 **/
05d063aa 2931void ixgbevf_free_tx_resources(struct ixgbevf_ring *tx_ring)
92915f71 2932{
05d063aa 2933 ixgbevf_clean_tx_ring(tx_ring);
92915f71
GR		 2934
2935 vfree(tx_ring->tx_buffer_info);
2936 tx_ring->tx_buffer_info = NULL;
2937
de02decb
DS		 2938 /* if not set, then don't free */
2939 if (!tx_ring->desc)
2940 return;
2941
05d063aa 2942 dma_free_coherent(tx_ring->dev, tx_ring->size, tx_ring->desc,
2a1f8794 2943 tx_ring->dma);
92915f71
GR		 2944
2945 tx_ring->desc = NULL;
2946}
2947
2948/**
2949 * ixgbevf_free_all_tx_resources - Free Tx Resources for All Queues
2950 * @adapter: board private structure
2951 *
2952 * Free all transmit software resources
2953 **/
2954static void ixgbevf_free_all_tx_resources(struct ixgbevf_adapter *adapter)
2955{
2956 int i;
2957
2958 for (i = 0; i < adapter->num_tx_queues; i++)
87e70ab9 2959 if (adapter->tx_ring[i]->desc)
05d063aa 2960 ixgbevf_free_tx_resources(adapter->tx_ring[i]);
92915f71
GR		 2961}
2962
2963/**
2964 * ixgbevf_setup_tx_resources - allocate Tx resources (Descriptors)
dec0d8e4 2965 * @tx_ring: Tx descriptor ring (for a specific queue) to setup
92915f71
GR		 2966 *
2967 * Return 0 on success, negative on failure
2968 **/
05d063aa 2969int ixgbevf_setup_tx_resources(struct ixgbevf_ring *tx_ring)
92915f71 2970{
92915f71
GR		 2971 int size;
2972
2973 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
89bf67f1 2974 tx_ring->tx_buffer_info = vzalloc(size);
92915f71
GR		 2975 if (!tx_ring->tx_buffer_info)
2976 goto err;
92915f71
GR		 2977
2978 /* round up to nearest 4K */
2979 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
2980 tx_ring->size = ALIGN(tx_ring->size, 4096);
2981
05d063aa 2982 tx_ring->desc = dma_alloc_coherent(tx_ring->dev, tx_ring->size,
2a1f8794 2983 &tx_ring->dma, GFP_KERNEL);
92915f71
GR		 2984 if (!tx_ring->desc)
2985 goto err;
2986
92915f71
GR		 2987 return 0;
2988
2989err:
2990 vfree(tx_ring->tx_buffer_info);
2991 tx_ring->tx_buffer_info = NULL;
dec0d8e4 2992 hw_dbg(&adapter->hw, "Unable to allocate memory for the transmit descriptor ring\n");
92915f71
GR		 2993 return -ENOMEM;
2994}
2995
2996/**
2997 * ixgbevf_setup_all_tx_resources - allocate all queues Tx resources
2998 * @adapter: board private structure
2999 *
3000 * If this function returns with an error, then it's possible one or
3001 * more of the rings is populated (while the rest are not). It is the
3002 * callers duty to clean those orphaned rings.
3003 *
3004 * Return 0 on success, negative on failure
3005 **/
3006static int ixgbevf_setup_all_tx_resources(struct ixgbevf_adapter *adapter)
3007{
3008 int i, err = 0;
3009
3010 for (i = 0; i < adapter->num_tx_queues; i++) {
05d063aa 3011 err = ixgbevf_setup_tx_resources(adapter->tx_ring[i]);
92915f71
GR		 3012 if (!err)
3013 continue;
dec0d8e4 3014 hw_dbg(&adapter->hw, "Allocation for Tx Queue %u failed\n", i);
92915f71
GR		 3015 break;
3016 }
3017
3018 return err;
3019}
3020
3021/**
3022 * ixgbevf_setup_rx_resources - allocate Rx resources (Descriptors)
dec0d8e4 3023 * @rx_ring: Rx descriptor ring (for a specific queue) to setup
92915f71
GR		 3024 *
3025 * Returns 0 on success, negative on failure
3026 **/
05d063aa 3027int ixgbevf_setup_rx_resources(struct ixgbevf_ring *rx_ring)
92915f71 3028{
92915f71
GR		 3029 int size;
3030
3031 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
89bf67f1 3032 rx_ring->rx_buffer_info = vzalloc(size);
e404decb 3033 if (!rx_ring->rx_buffer_info)
05d063aa 3034 goto err;
92915f71
GR		 3035
3036 /* Round up to nearest 4K */
3037 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
3038 rx_ring->size = ALIGN(rx_ring->size, 4096);
3039
05d063aa 3040 rx_ring->desc = dma_alloc_coherent(rx_ring->dev, rx_ring->size,
2a1f8794 3041 &rx_ring->dma, GFP_KERNEL);
92915f71 3042
05d063aa
ET		 3043 if (!rx_ring->desc)
3044 goto err;
92915f71 3045
92915f71 3046 return 0;
05d063aa
ET		 3047err:
3048 vfree(rx_ring->rx_buffer_info);
3049 rx_ring->rx_buffer_info = NULL;
3050 dev_err(rx_ring->dev, "Unable to allocate memory for the Rx descriptor ring\n");
92915f71
GR		 3051 return -ENOMEM;
3052}
3053
3054/**
3055 * ixgbevf_setup_all_rx_resources - allocate all queues Rx resources
3056 * @adapter: board private structure
3057 *
3058 * If this function returns with an error, then it's possible one or
3059 * more of the rings is populated (while the rest are not). It is the
3060 * callers duty to clean those orphaned rings.
3061 *
3062 * Return 0 on success, negative on failure
3063 **/
3064static int ixgbevf_setup_all_rx_resources(struct ixgbevf_adapter *adapter)
3065{
3066 int i, err = 0;
3067
3068 for (i = 0; i < adapter->num_rx_queues; i++) {
05d063aa 3069 err = ixgbevf_setup_rx_resources(adapter->rx_ring[i]);
92915f71
GR		 3070 if (!err)
3071 continue;
dec0d8e4 3072 hw_dbg(&adapter->hw, "Allocation for Rx Queue %u failed\n", i);
92915f71
GR		 3073 break;
3074 }
3075 return err;
3076}
3077
3078/**
3079 * ixgbevf_free_rx_resources - Free Rx Resources
92915f71
GR		 3080 * @rx_ring: ring to clean the resources from
3081 *
3082 * Free all receive software resources
3083 **/
05d063aa 3084void ixgbevf_free_rx_resources(struct ixgbevf_ring *rx_ring)
92915f71 3085{
05d063aa 3086 ixgbevf_clean_rx_ring(rx_ring);
92915f71
GR		 3087
3088 vfree(rx_ring->rx_buffer_info);
3089 rx_ring->rx_buffer_info = NULL;
3090
05d063aa 3091 dma_free_coherent(rx_ring->dev, rx_ring->size, rx_ring->desc,
2a1f8794 3092 rx_ring->dma);
92915f71
GR		 3093
3094 rx_ring->desc = NULL;
3095}
3096
3097/**
3098 * ixgbevf_free_all_rx_resources - Free Rx Resources for All Queues
3099 * @adapter: board private structure
3100 *
3101 * Free all receive software resources
3102 **/
3103static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter)
3104{
3105 int i;
3106
3107 for (i = 0; i < adapter->num_rx_queues; i++)
87e70ab9 3108 if (adapter->rx_ring[i]->desc)
05d063aa 3109 ixgbevf_free_rx_resources(adapter->rx_ring[i]);
92915f71
GR		 3110}
3111
3112/**
3113 * ixgbevf_open - Called when a network interface is made active
3114 * @netdev: network interface device structure
3115 *
3116 * Returns 0 on success, negative value on failure
3117 *
3118 * The open entry point is called when a network interface is made
3119 * active by the system (IFF_UP). At this point all resources needed
3120 * for transmit and receive operations are allocated, the interrupt
3121 * handler is registered with the OS, the watchdog timer is started,
3122 * and the stack is notified that the interface is ready.
3123 **/
3124static int ixgbevf_open(struct net_device *netdev)
3125{
3126 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3127 struct ixgbe_hw *hw = &adapter->hw;
3128 int err;
3129
a1f6c6b1 3130 /* A previous failure to open the device because of a lack of
3131 * available MSIX vector resources may have reset the number
3132 * of msix vectors variable to zero. The only way to recover
3133 * is to unload/reload the driver and hope that the system has
3134 * been able to recover some MSIX vector resources.
3135 */
3136 if (!adapter->num_msix_vectors)
3137 return -ENOMEM;
3138
92915f71
GR		 3139 if (hw->adapter_stopped) {
3140 ixgbevf_reset(adapter);
3141 /* if adapter is still stopped then PF isn't up and
dec0d8e4
JK		 3142 * the VF can't start.
3143 */
92915f71
GR		 3144 if (hw->adapter_stopped) {
3145 err = IXGBE_ERR_MBX;
dec0d8e4 3146 pr_err("Unable to start - perhaps the PF Driver isn't up yet\n");
92915f71
GR		 3147 goto err_setup_reset;
3148 }
3149 }
3150
d9bdb57f
ET		 3151 /* disallow open during test */
3152 if (test_bit(__IXGBEVF_TESTING, &adapter->state))
3153 return -EBUSY;
3154
3155 netif_carrier_off(netdev);
3156
92915f71
GR		 3157 /* allocate transmit descriptors */
3158 err = ixgbevf_setup_all_tx_resources(adapter);
3159 if (err)
3160 goto err_setup_tx;
3161
3162 /* allocate receive descriptors */
3163 err = ixgbevf_setup_all_rx_resources(adapter);
3164 if (err)
3165 goto err_setup_rx;
3166
3167 ixgbevf_configure(adapter);
3168
dec0d8e4 3169 /* Map the Tx/Rx rings to the vectors we were allotted.
92915f71
GR		 3170 * if request_irq will be called in this function map_rings
3171 * must be called *before* up_complete
3172 */
3173 ixgbevf_map_rings_to_vectors(adapter);
3174
92915f71
GR		 3175 err = ixgbevf_request_irq(adapter);
3176 if (err)
3177 goto err_req_irq;
3178
d9bdb57f 3179 ixgbevf_up_complete(adapter);
92915f71
GR		 3180
3181 return 0;
3182
3183err_req_irq:
3184 ixgbevf_down(adapter);
92915f71
GR		 3185err_setup_rx:
3186 ixgbevf_free_all_rx_resources(adapter);
3187err_setup_tx:
3188 ixgbevf_free_all_tx_resources(adapter);
3189 ixgbevf_reset(adapter);
3190
3191err_setup_reset:
3192
3193 return err;
3194}
3195
3196/**
3197 * ixgbevf_close - Disables a network interface
3198 * @netdev: network interface device structure
3199 *
3200 * Returns 0, this is not allowed to fail
3201 *
3202 * The close entry point is called when an interface is de-activated
3203 * by the OS. The hardware is still under the drivers control, but
3204 * needs to be disabled. A global MAC reset is issued to stop the
3205 * hardware, and all transmit and receive resources are freed.
3206 **/
3207static int ixgbevf_close(struct net_device *netdev)
3208{
3209 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3210
3211 ixgbevf_down(adapter);
3212 ixgbevf_free_irq(adapter);
3213
3214 ixgbevf_free_all_tx_resources(adapter);
3215 ixgbevf_free_all_rx_resources(adapter);
3216
3217 return 0;
3218}
3219
220fe050
DS		 3220static void ixgbevf_queue_reset_subtask(struct ixgbevf_adapter *adapter)
3221{
3222 struct net_device *dev = adapter->netdev;
3223
3224 if (!(adapter->flags & IXGBEVF_FLAG_QUEUE_RESET_REQUESTED))
3225 return;
3226
3227 adapter->flags &= ~IXGBEVF_FLAG_QUEUE_RESET_REQUESTED;
3228
3229 /* if interface is down do nothing */
3230 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
3231 test_bit(__IXGBEVF_RESETTING, &adapter->state))
3232 return;
3233
3234 /* Hardware has to reinitialize queues and interrupts to
3235 * match packet buffer alignment. Unfortunately, the
3236 * hardware is not flexible enough to do this dynamically.
3237 */
3238 if (netif_running(dev))
3239 ixgbevf_close(dev);
3240
3241 ixgbevf_clear_interrupt_scheme(adapter);
3242 ixgbevf_init_interrupt_scheme(adapter);
3243
3244 if (netif_running(dev))
3245 ixgbevf_open(dev);
3246}
3247
70a10e25
AD		 3248static void ixgbevf_tx_ctxtdesc(struct ixgbevf_ring *tx_ring,
3249 u32 vlan_macip_lens, u32 type_tucmd,
3250 u32 mss_l4len_idx)
92915f71
GR		 3251{
3252 struct ixgbe_adv_tx_context_desc *context_desc;
70a10e25 3253 u16 i = tx_ring->next_to_use;
92915f71 3254
70a10e25 3255 context_desc = IXGBEVF_TX_CTXTDESC(tx_ring, i);
92915f71 3256
70a10e25
AD		 3257 i++;
3258 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
92915f71 3259
70a10e25
AD		 3260 /* set bits to identify this as an advanced context descriptor */
3261 type_tucmd |= IXGBE_TXD_CMD_DEXT | IXGBE_ADVTXD_DTYP_CTXT;
92915f71 3262
70a10e25
AD		 3263 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
3264 context_desc->seqnum_seed = 0;
3265 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd);
3266 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
3267}
3268
3269static int ixgbevf_tso(struct ixgbevf_ring *tx_ring,
7ad1a093
ET		 3270 struct ixgbevf_tx_buffer *first,
3271 u8 *hdr_len)
70a10e25 3272{
7ad1a093 3273 struct sk_buff *skb = first->skb;
70a10e25
AD		 3274 u32 vlan_macip_lens, type_tucmd;
3275 u32 mss_l4len_idx, l4len;
8f12c034 3276 int err;
70a10e25 3277
01a545cf
ET		 3278 if (skb->ip_summed != CHECKSUM_PARTIAL)
3279 return 0;
3280
70a10e25
AD		 3281 if (!skb_is_gso(skb))
3282 return 0;
92915f71 3283
8f12c034
FR		 3284 err = skb_cow_head(skb, 0);
3285 if (err < 0)
3286 return err;
92915f71 3287
70a10e25
AD		 3288 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
3289 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
3290
10e4fb33 3291 if (first->protocol == htons(ETH_P_IP)) {
70a10e25 3292 struct iphdr *iph = ip_hdr(skb);
dec0d8e4 3293
70a10e25
AD		 3294 iph->tot_len = 0;
3295 iph->check = 0;
3296 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
3297 iph->daddr, 0,
3298 IPPROTO_TCP,
3299 0);
3300 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
7ad1a093
ET		 3301 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
3302 IXGBE_TX_FLAGS_CSUM |
3303 IXGBE_TX_FLAGS_IPV4;
70a10e25
AD		 3304 } else if (skb_is_gso_v6(skb)) {
3305 ipv6_hdr(skb)->payload_len = 0;
3306 tcp_hdr(skb)->check =
3307 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
3308 &ipv6_hdr(skb)->daddr,
3309 0, IPPROTO_TCP, 0);
7ad1a093
ET		 3310 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
3311 IXGBE_TX_FLAGS_CSUM;
70a10e25
AD		 3312 }
3313
3314 /* compute header lengths */
3315 l4len = tcp_hdrlen(skb);
3316 *hdr_len += l4len;
3317 *hdr_len = skb_transport_offset(skb) + l4len;
3318
dec0d8e4 3319 /* update GSO size and bytecount with header size */
7ad1a093
ET		 3320 first->gso_segs = skb_shinfo(skb)->gso_segs;
3321 first->bytecount += (first->gso_segs - 1) * *hdr_len;
3322
70a10e25
AD		 3323 /* mss_l4len_id: use 1 as index for TSO */
3324 mss_l4len_idx = l4len << IXGBE_ADVTXD_L4LEN_SHIFT;
3325 mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
3326 mss_l4len_idx |= 1 << IXGBE_ADVTXD_IDX_SHIFT;
3327
3328 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
3329 vlan_macip_lens = skb_network_header_len(skb);
3330 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
7ad1a093 3331 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
70a10e25
AD		 3332
3333 ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens,
3334 type_tucmd, mss_l4len_idx);
3335
3336 return 1;
92915f71
GR		 3337}
3338
7ad1a093
ET		 3339static void ixgbevf_tx_csum(struct ixgbevf_ring *tx_ring,
3340 struct ixgbevf_tx_buffer *first)
92915f71 3341{
7ad1a093 3342 struct sk_buff *skb = first->skb;
70a10e25
AD		 3343 u32 vlan_macip_lens = 0;
3344 u32 mss_l4len_idx = 0;
3345 u32 type_tucmd = 0;
92915f71 3346
70a10e25
AD		 3347 if (skb->ip_summed == CHECKSUM_PARTIAL) {
3348 u8 l4_hdr = 0;
d34a614a 3349 __be16 frag_off;
dec0d8e4 3350
10e4fb33 3351 switch (first->protocol) {
0933ce4a 3352 case htons(ETH_P_IP):
70a10e25
AD		 3353 vlan_macip_lens |= skb_network_header_len(skb);
3354 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
3355 l4_hdr = ip_hdr(skb)->protocol;
3356 break;
0933ce4a 3357 case htons(ETH_P_IPV6):
70a10e25
AD		 3358 vlan_macip_lens |= skb_network_header_len(skb);
3359 l4_hdr = ipv6_hdr(skb)->nexthdr;
d34a614a
MR		 3360 if (likely(skb_network_header_len(skb) ==
3361 sizeof(struct ipv6hdr)))
3362 break;
3363 ipv6_skip_exthdr(skb, skb_network_offset(skb) +
3364 sizeof(struct ipv6hdr),
3365 &l4_hdr, &frag_off);
3366 if (unlikely(frag_off))
3367 l4_hdr = NEXTHDR_FRAGMENT;
70a10e25
AD		 3368 break;
3369 default:
70a10e25
AD		 3370 break;
3371 }
92915f71 3372
70a10e25
AD		 3373 switch (l4_hdr) {
3374 case IPPROTO_TCP:
3375 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
3376 mss_l4len_idx = tcp_hdrlen(skb) <<
3377 IXGBE_ADVTXD_L4LEN_SHIFT;
3378 break;
3379 case IPPROTO_SCTP:
3380 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_SCTP;
3381 mss_l4len_idx = sizeof(struct sctphdr) <<
3382 IXGBE_ADVTXD_L4LEN_SHIFT;
3383 break;
3384 case IPPROTO_UDP:
3385 mss_l4len_idx = sizeof(struct udphdr) <<
3386 IXGBE_ADVTXD_L4LEN_SHIFT;
3387 break;
3388 default:
3389 if (unlikely(net_ratelimit())) {
3390 dev_warn(tx_ring->dev,
d34a614a
MR		 3391 "partial checksum, l3 proto=%x, l4 proto=%x\n",
3392 first->protocol, l4_hdr);
70a10e25 3393 }
d34a614a
MR		 3394 skb_checksum_help(skb);
3395 goto no_csum;
70a10e25 3396 }
7ad1a093
ET		 3397
3398 /* update TX checksum flag */
3399 first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
92915f71
GR		 3400 }
3401
d34a614a 3402no_csum:
70a10e25
AD		 3403 /* vlan_macip_lens: MACLEN, VLAN tag */
3404 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
7ad1a093 3405 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
70a10e25
AD		 3406
3407 ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens,
3408 type_tucmd, mss_l4len_idx);
92915f71
GR		 3409}
3410
29d37fa1 3411static __le32 ixgbevf_tx_cmd_type(u32 tx_flags)
92915f71 3412{
29d37fa1
ET		 3413 /* set type for advanced descriptor with frame checksum insertion */
3414 __le32 cmd_type = cpu_to_le32(IXGBE_ADVTXD_DTYP_DATA |
3415 IXGBE_ADVTXD_DCMD_IFCS |
3416 IXGBE_ADVTXD_DCMD_DEXT);
92915f71 3417
dec0d8e4 3418 /* set HW VLAN bit if VLAN is present */
29d37fa1
ET		 3419 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3420 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_VLE);
92915f71 3421
29d37fa1
ET		 3422 /* set segmentation enable bits for TSO/FSO */
3423 if (tx_flags & IXGBE_TX_FLAGS_TSO)
3424 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_TSE);
92915f71 3425
29d37fa1
ET		 3426 return cmd_type;
3427}
92915f71 3428
29d37fa1
ET		 3429static void ixgbevf_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
3430 u32 tx_flags, unsigned int paylen)
3431{
3432 __le32 olinfo_status = cpu_to_le32(paylen << IXGBE_ADVTXD_PAYLEN_SHIFT);
9bdfefd2 3433
29d37fa1
ET		 3434 /* enable L4 checksum for TSO and TX checksum offload */
3435 if (tx_flags & IXGBE_TX_FLAGS_CSUM)
3436 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_TXSM);
92915f71 3437
29d37fa1
ET		 3438 /* enble IPv4 checksum for TSO */
3439 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
3440 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_IXSM);
92915f71 3441
29d37fa1
ET		 3442 /* use index 1 context for TSO/FSO/FCOE */
3443 if (tx_flags & IXGBE_TX_FLAGS_TSO)
3444 olinfo_status |= cpu_to_le32(1 << IXGBE_ADVTXD_IDX_SHIFT);
92915f71 3445
29d37fa1
ET		 3446 /* Check Context must be set if Tx switch is enabled, which it
3447 * always is for case where virtual functions are running
3448 */
3449 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_CC);
92915f71 3450
29d37fa1
ET		 3451 tx_desc->read.olinfo_status = olinfo_status;
3452}
92915f71 3453
29d37fa1
ET		 3454static void ixgbevf_tx_map(struct ixgbevf_ring *tx_ring,
3455 struct ixgbevf_tx_buffer *first,
3456 const u8 hdr_len)
3457{
3458 dma_addr_t dma;
3459 struct sk_buff *skb = first->skb;
3460 struct ixgbevf_tx_buffer *tx_buffer;
3461 union ixgbe_adv_tx_desc *tx_desc;
3462 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
3463 unsigned int data_len = skb->data_len;
3464 unsigned int size = skb_headlen(skb);
3465 unsigned int paylen = skb->len - hdr_len;
3466 u32 tx_flags = first->tx_flags;
3467 __le32 cmd_type;
3468 u16 i = tx_ring->next_to_use;
9bdfefd2 3469
29d37fa1 3470 tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
92915f71 3471
29d37fa1
ET		 3472 ixgbevf_tx_olinfo_status(tx_desc, tx_flags, paylen);
3473 cmd_type = ixgbevf_tx_cmd_type(tx_flags);
7ad1a093 3474
29d37fa1
ET		 3475 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
3476 if (dma_mapping_error(tx_ring->dev, dma))
3477 goto dma_error;
92915f71 3478
29d37fa1
ET		 3479 /* record length, and DMA address */
3480 dma_unmap_len_set(first, len, size);
3481 dma_unmap_addr_set(first, dma, dma);
92915f71 3482
29d37fa1 3483 tx_desc->read.buffer_addr = cpu_to_le64(dma);
92915f71 3484
29d37fa1
ET		 3485 for (;;) {
3486 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
3487 tx_desc->read.cmd_type_len =
3488 cmd_type | cpu_to_le32(IXGBE_MAX_DATA_PER_TXD);
92915f71 3489
29d37fa1
ET		 3490 i++;
3491 tx_desc++;
3492 if (i == tx_ring->count) {
3493 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
3494 i = 0;
3495 }
92915f71 3496
29d37fa1
ET		 3497 dma += IXGBE_MAX_DATA_PER_TXD;
3498 size -= IXGBE_MAX_DATA_PER_TXD;
92915f71 3499
29d37fa1
ET		 3500 tx_desc->read.buffer_addr = cpu_to_le64(dma);
3501 tx_desc->read.olinfo_status = 0;
3502 }
92915f71 3503
29d37fa1
ET		 3504 if (likely(!data_len))
3505 break;
92915f71 3506
29d37fa1 3507 tx_desc->read.cmd_type_len = cmd_type | cpu_to_le32(size);
92915f71 3508
29d37fa1
ET		 3509 i++;
3510 tx_desc++;
3511 if (i == tx_ring->count) {
3512 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
3513 i = 0;
3514 }
92915f71 3515
29d37fa1
ET		 3516 size = skb_frag_size(frag);
3517 data_len -= size;
92915f71 3518
29d37fa1
ET		 3519 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
3520 DMA_TO_DEVICE);
3521 if (dma_mapping_error(tx_ring->dev, dma))
3522 goto dma_error;
70a10e25 3523
29d37fa1
ET		 3524 tx_buffer = &tx_ring->tx_buffer_info[i];
3525 dma_unmap_len_set(tx_buffer, len, size);
3526 dma_unmap_addr_set(tx_buffer, dma, dma);
92915f71 3527
29d37fa1
ET		 3528 tx_desc->read.buffer_addr = cpu_to_le64(dma);
3529 tx_desc->read.olinfo_status = 0;
3530
3531 frag++;
70a10e25 3532 }
92915f71 3533
29d37fa1
ET		 3534 /* write last descriptor with RS and EOP bits */
3535 cmd_type |= cpu_to_le32(size) | cpu_to_le32(IXGBE_TXD_CMD);
3536 tx_desc->read.cmd_type_len = cmd_type;
3537
3538 /* set the timestamp */
3539 first->time_stamp = jiffies;
3540
3541 /* Force memory writes to complete before letting h/w know there
3542 * are new descriptors to fetch. (Only applicable for weak-ordered
3543 * memory model archs, such as IA-64).
3544 *
3545 * We also need this memory barrier (wmb) to make certain all of the
3546 * status bits have been updated before next_to_watch is written.
70a10e25 3547 */
29d37fa1 3548 wmb();
92915f71 3549
29d37fa1
ET		 3550 /* set next_to_watch value indicating a packet is present */
3551 first->next_to_watch = tx_desc;
92915f71 3552
29d37fa1
ET		 3553 i++;
3554 if (i == tx_ring->count)
3555 i = 0;
9bdfefd2 3556
29d37fa1 3557 tx_ring->next_to_use = i;
92915f71 3558
29d37fa1 3559 /* notify HW of packet */
06380db6 3560 ixgbevf_write_tail(tx_ring, i);
29d37fa1
ET		 3561
3562 return;
3563dma_error:
3564 dev_err(tx_ring->dev, "TX DMA map failed\n");
3565
3566 /* clear dma mappings for failed tx_buffer_info map */
3567 for (;;) {
3568 tx_buffer = &tx_ring->tx_buffer_info[i];
3569 ixgbevf_unmap_and_free_tx_resource(tx_ring, tx_buffer);
3570 if (tx_buffer == first)
3571 break;
3572 if (i == 0)
3573 i = tx_ring->count;
3574 i--;
3575 }
92915f71 3576
92915f71 3577 tx_ring->next_to_use = i;
92915f71
GR		 3578}
3579
fb40195c 3580static int __ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
92915f71 3581{
fb40195c 3582 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
92915f71
GR		 3583 /* Herbert's original patch had:
3584 * smp_mb__after_netif_stop_queue();
dec0d8e4
JK		 3585 * but since that doesn't exist yet, just open code it.
3586 */
92915f71
GR		 3587 smp_mb();
3588
3589 /* We need to check again in a case another CPU has just
dec0d8e4
JK		 3590 * made room available.
3591 */
f880d07b 3592 if (likely(ixgbevf_desc_unused(tx_ring) < size))
92915f71
GR		 3593 return -EBUSY;
3594
3595 /* A reprieve! - use start_queue because it doesn't call schedule */
fb40195c 3596 netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
095e2617
ET		 3597 ++tx_ring->tx_stats.restart_queue;
3598
92915f71
GR		 3599 return 0;
3600}
3601
fb40195c 3602static int ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
92915f71 3603{
f880d07b 3604 if (likely(ixgbevf_desc_unused(tx_ring) >= size))
92915f71 3605 return 0;
fb40195c 3606 return __ixgbevf_maybe_stop_tx(tx_ring, size);
92915f71
GR		 3607}
3608
3609static int ixgbevf_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3610{
3611 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
7ad1a093 3612 struct ixgbevf_tx_buffer *first;
92915f71 3613 struct ixgbevf_ring *tx_ring;
7ad1a093
ET		 3614 int tso;
3615 u32 tx_flags = 0;
3595990a
AD		 3616 u16 count = TXD_USE_COUNT(skb_headlen(skb));
3617#if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
3618 unsigned short f;
3619#endif
7ad1a093 3620 u8 hdr_len = 0;
f9d08f16 3621 u8 *dst_mac = skb_header_pointer(skb, 0, 0, NULL);
7ad1a093 3622
46acc460 3623 if (!dst_mac || is_link_local_ether_addr(dst_mac)) {
e7fcd543 3624 dev_kfree_skb_any(skb);
f9d08f16
GR		 3625 return NETDEV_TX_OK;
3626 }
92915f71 3627
7ad1a093 3628 tx_ring = adapter->tx_ring[skb->queue_mapping];
92915f71 3629
dec0d8e4 3630 /* need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
3595990a
AD		 3631 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
3632 * + 2 desc gap to keep tail from touching head,
3633 * + 1 desc for context descriptor,
3634 * otherwise try next time
3635 */
3636#if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
3637 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
3638 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
3639#else
3640 count += skb_shinfo(skb)->nr_frags;
3641#endif
fb40195c 3642 if (ixgbevf_maybe_stop_tx(tx_ring, count + 3)) {
095e2617 3643 tx_ring->tx_stats.tx_busy++;
3595990a
AD		 3644 return NETDEV_TX_BUSY;
3645 }
3646
7ad1a093
ET		 3647 /* record the location of the first descriptor for this packet */
3648 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
3649 first->skb = skb;
3650 first->bytecount = skb->len;
3651 first->gso_segs = 1;
3652
df8a39de
JP		 3653 if (skb_vlan_tag_present(skb)) {
3654 tx_flags |= skb_vlan_tag_get(skb);
92915f71
GR		 3655 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
3656 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3657 }
3658
7ad1a093
ET		 3659 /* record initial flags and protocol */
3660 first->tx_flags = tx_flags;
3661 first->protocol = vlan_get_protocol(skb);
92915f71 3662
7ad1a093
ET		 3663 tso = ixgbevf_tso(tx_ring, first, &hdr_len);
3664 if (tso < 0)
3665 goto out_drop;
b5d217f3 3666 else if (!tso)
7ad1a093 3667 ixgbevf_tx_csum(tx_ring, first);
92915f71 3668
29d37fa1 3669 ixgbevf_tx_map(tx_ring, first, hdr_len);
70a10e25 3670
fb40195c 3671 ixgbevf_maybe_stop_tx(tx_ring, DESC_NEEDED);
92915f71 3672
7ad1a093
ET		 3673 return NETDEV_TX_OK;
3674
3675out_drop:
3676 dev_kfree_skb_any(first->skb);
3677 first->skb = NULL;
3678
92915f71
GR		 3679 return NETDEV_TX_OK;
3680}
3681
92915f71
GR		 3682/**
3683 * ixgbevf_set_mac - Change the Ethernet Address of the NIC
3684 * @netdev: network interface device structure
3685 * @p: pointer to an address structure
3686 *
3687 * Returns 0 on success, negative on failure
3688 **/
3689static int ixgbevf_set_mac(struct net_device *netdev, void *p)
3690{
3691 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3692 struct ixgbe_hw *hw = &adapter->hw;
3693 struct sockaddr *addr = p;
3694
3695 if (!is_valid_ether_addr(addr->sa_data))
3696 return -EADDRNOTAVAIL;
3697
91a76baa
ET		 3698 ether_addr_copy(netdev->dev_addr, addr->sa_data);
3699 ether_addr_copy(hw->mac.addr, addr->sa_data);
92915f71 3700
55fdd45b 3701 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 3702
92fe0bf7 3703 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
92915f71 3704
55fdd45b 3705 spin_unlock_bh(&adapter->mbx_lock);
1c55ed76 3706
92915f71
GR		 3707 return 0;
3708}
3709
3710/**
3711 * ixgbevf_change_mtu - Change the Maximum Transfer Unit
3712 * @netdev: network interface device structure
3713 * @new_mtu: new value for maximum frame size
3714 *
3715 * Returns 0 on success, negative on failure
3716 **/
3717static int ixgbevf_change_mtu(struct net_device *netdev, int new_mtu)
3718{
3719 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
bad17234 3720 struct ixgbe_hw *hw = &adapter->hw;
92915f71 3721 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
69bfbec4 3722 int max_possible_frame = MAXIMUM_ETHERNET_VLAN_SIZE;
69bfbec4 3723
56e94095
AD		 3724 switch (adapter->hw.api_version) {
3725 case ixgbe_mbox_api_11:
94cf66f8 3726 case ixgbe_mbox_api_12:
69bfbec4 3727 max_possible_frame = IXGBE_MAX_JUMBO_FRAME_SIZE;
56e94095
AD		 3728 break;
3729 default:
47068b0d 3730 if (adapter->hw.mac.type != ixgbe_mac_82599_vf)
56e94095
AD		 3731 max_possible_frame = IXGBE_MAX_JUMBO_FRAME_SIZE;
3732 break;
3733 }
92915f71
GR		 3734
3735 /* MTU < 68 is an error and causes problems on some kernels */
69bfbec4 3736 if ((new_mtu < 68) || (max_frame > max_possible_frame))
92915f71
GR		 3737 return -EINVAL;
3738
bad17234 3739 hw_dbg(hw, "changing MTU from %d to %d\n",
92915f71
GR		 3740 netdev->mtu, new_mtu);
3741 /* must set new MTU before calling down or up */
3742 netdev->mtu = new_mtu;
3743
bad17234
ET		 3744 /* notify the PF of our intent to use this size of frame */
3745 ixgbevf_rlpml_set_vf(hw, max_frame);
92915f71
GR		 3746
3747 return 0;
3748}
3749
688ff32d
ET		 3750#ifdef CONFIG_NET_POLL_CONTROLLER
3751/* Polling 'interrupt' - used by things like netconsole to send skbs
3752 * without having to re-enable interrupts. It's not called while
3753 * the interrupt routine is executing.
3754 */
3755static void ixgbevf_netpoll(struct net_device *netdev)
3756{
3757 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3758 int i;
3759
3760 /* if interface is down do nothing */
3761 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
3762 return;
3763 for (i = 0; i < adapter->num_rx_queues; i++)
3764 ixgbevf_msix_clean_rings(0, adapter->q_vector[i]);
3765}
3766#endif /* CONFIG_NET_POLL_CONTROLLER */
3767
0ac1e8ce 3768static int ixgbevf_suspend(struct pci_dev *pdev, pm_message_t state)
92915f71
GR		 3769{
3770 struct net_device *netdev = pci_get_drvdata(pdev);
3771 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
0ac1e8ce
AD		 3772#ifdef CONFIG_PM
3773 int retval = 0;
3774#endif
92915f71
GR		 3775
3776 netif_device_detach(netdev);
3777
3778 if (netif_running(netdev)) {
0ac1e8ce 3779 rtnl_lock();
92915f71
GR		 3780 ixgbevf_down(adapter);
3781 ixgbevf_free_irq(adapter);
3782 ixgbevf_free_all_tx_resources(adapter);
3783 ixgbevf_free_all_rx_resources(adapter);
0ac1e8ce 3784 rtnl_unlock();
92915f71
GR		 3785 }
3786
0ac1e8ce 3787 ixgbevf_clear_interrupt_scheme(adapter);
92915f71 3788
0ac1e8ce
AD		 3789#ifdef CONFIG_PM
3790 retval = pci_save_state(pdev);
3791 if (retval)
3792 return retval;
92915f71 3793
0ac1e8ce 3794#endif
bc0c7151
MR		 3795 if (!test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state))
3796 pci_disable_device(pdev);
0ac1e8ce
AD		 3797
3798 return 0;
3799}
3800
3801#ifdef CONFIG_PM
3802static int ixgbevf_resume(struct pci_dev *pdev)
3803{
27ae2967
WY		 3804 struct net_device *netdev = pci_get_drvdata(pdev);
3805 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
0ac1e8ce
AD		 3806 u32 err;
3807
0ac1e8ce 3808 pci_restore_state(pdev);
dec0d8e4 3809 /* pci_restore_state clears dev->state_saved so call
0ac1e8ce
AD		 3810 * pci_save_state to restore it.
3811 */
3812 pci_save_state(pdev);
3813
3814 err = pci_enable_device_mem(pdev);
3815 if (err) {
3816 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
3817 return err;
3818 }
4e857c58 3819 smp_mb__before_atomic();
bc0c7151 3820 clear_bit(__IXGBEVF_DISABLED, &adapter->state);
0ac1e8ce
AD		 3821 pci_set_master(pdev);
3822
798e381a
DS		 3823 ixgbevf_reset(adapter);
3824
0ac1e8ce
AD		 3825 rtnl_lock();
3826 err = ixgbevf_init_interrupt_scheme(adapter);
3827 rtnl_unlock();
3828 if (err) {
3829 dev_err(&pdev->dev, "Cannot initialize interrupts\n");
3830 return err;
3831 }
3832
0ac1e8ce
AD		 3833 if (netif_running(netdev)) {
3834 err = ixgbevf_open(netdev);
3835 if (err)
3836 return err;
3837 }
3838
3839 netif_device_attach(netdev);
3840
3841 return err;
3842}
3843
3844#endif /* CONFIG_PM */
3845static void ixgbevf_shutdown(struct pci_dev *pdev)
3846{
3847 ixgbevf_suspend(pdev, PMSG_SUSPEND);
92915f71
GR		 3848}
3849
4197aa7b
ED		 3850static struct rtnl_link_stats64 *ixgbevf_get_stats(struct net_device *netdev,
3851 struct rtnl_link_stats64 *stats)
3852{
3853 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3854 unsigned int start;
3855 u64 bytes, packets;
3856 const struct ixgbevf_ring *ring;
3857 int i;
3858
3859 ixgbevf_update_stats(adapter);
3860
3861 stats->multicast = adapter->stats.vfmprc - adapter->stats.base_vfmprc;
3862
3863 for (i = 0; i < adapter->num_rx_queues; i++) {
87e70ab9 3864 ring = adapter->rx_ring[i];
4197aa7b 3865 do {
57a7744e 3866 start = u64_stats_fetch_begin_irq(&ring->syncp);
095e2617
ET		 3867 bytes = ring->stats.bytes;
3868 packets = ring->stats.packets;
57a7744e 3869 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
4197aa7b
ED		 3870 stats->rx_bytes += bytes;
3871 stats->rx_packets += packets;
3872 }
3873
3874 for (i = 0; i < adapter->num_tx_queues; i++) {
87e70ab9 3875 ring = adapter->tx_ring[i];
4197aa7b 3876 do {
57a7744e 3877 start = u64_stats_fetch_begin_irq(&ring->syncp);
095e2617
ET		 3878 bytes = ring->stats.bytes;
3879 packets = ring->stats.packets;
57a7744e 3880 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
4197aa7b
ED		 3881 stats->tx_bytes += bytes;
3882 stats->tx_packets += packets;
3883 }
3884
3885 return stats;
3886}
3887
0ac1e8ce 3888static const struct net_device_ops ixgbevf_netdev_ops = {
c12db769
SH		 3889 .ndo_open = ixgbevf_open,
3890 .ndo_stop = ixgbevf_close,
3891 .ndo_start_xmit = ixgbevf_xmit_frame,
3892 .ndo_set_rx_mode = ixgbevf_set_rx_mode,
4197aa7b 3893 .ndo_get_stats64 = ixgbevf_get_stats,
92915f71 3894 .ndo_validate_addr = eth_validate_addr,
c12db769
SH		 3895 .ndo_set_mac_address = ixgbevf_set_mac,
3896 .ndo_change_mtu = ixgbevf_change_mtu,
3897 .ndo_tx_timeout = ixgbevf_tx_timeout,
c12db769
SH		 3898 .ndo_vlan_rx_add_vid = ixgbevf_vlan_rx_add_vid,
3899 .ndo_vlan_rx_kill_vid = ixgbevf_vlan_rx_kill_vid,
c777cdfa
JK		 3900#ifdef CONFIG_NET_RX_BUSY_POLL
3901 .ndo_busy_poll = ixgbevf_busy_poll_recv,
3902#endif
688ff32d
ET		 3903#ifdef CONFIG_NET_POLL_CONTROLLER
3904 .ndo_poll_controller = ixgbevf_netpoll,
3905#endif
0f90300f 3906 .ndo_features_check = passthru_features_check,
92915f71 3907};
92915f71
GR		 3908
3909static void ixgbevf_assign_netdev_ops(struct net_device *dev)
3910{
0ac1e8ce 3911 dev->netdev_ops = &ixgbevf_netdev_ops;
92915f71
GR		 3912 ixgbevf_set_ethtool_ops(dev);
3913 dev->watchdog_timeo = 5 * HZ;
3914}
3915
3916/**
3917 * ixgbevf_probe - Device Initialization Routine
3918 * @pdev: PCI device information struct
3919 * @ent: entry in ixgbevf_pci_tbl
3920 *
3921 * Returns 0 on success, negative on failure
3922 *
3923 * ixgbevf_probe initializes an adapter identified by a pci_dev structure.
3924 * The OS initialization, configuring of the adapter private structure,
3925 * and a hardware reset occur.
3926 **/
1dd06ae8 3927static int ixgbevf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
92915f71
GR		 3928{
3929 struct net_device *netdev;
3930 struct ixgbevf_adapter *adapter = NULL;
3931 struct ixgbe_hw *hw = NULL;
3932 const struct ixgbevf_info *ii = ixgbevf_info_tbl[ent->driver_data];
92915f71 3933 int err, pci_using_dac;
0333464f 3934 bool disable_dev = false;
92915f71
GR		 3935
3936 err = pci_enable_device(pdev);
3937 if (err)
3938 return err;
3939
53567aa4 3940 if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
92915f71
GR		 3941 pci_using_dac = 1;
3942 } else {
53567aa4 3943 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
92915f71 3944 if (err) {
dec0d8e4 3945 dev_err(&pdev->dev, "No usable DMA configuration, aborting\n");
53567aa4 3946 goto err_dma;
92915f71
GR		 3947 }
3948 pci_using_dac = 0;
3949 }
3950
3951 err = pci_request_regions(pdev, ixgbevf_driver_name);
3952 if (err) {
3953 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
3954 goto err_pci_reg;
3955 }
3956
3957 pci_set_master(pdev);
3958
92915f71
GR		 3959 netdev = alloc_etherdev_mq(sizeof(struct ixgbevf_adapter),
3960 MAX_TX_QUEUES);
92915f71
GR		 3961 if (!netdev) {
3962 err = -ENOMEM;
3963 goto err_alloc_etherdev;
3964 }
3965
3966 SET_NETDEV_DEV(netdev, &pdev->dev);
3967
92915f71
GR		 3968 adapter = netdev_priv(netdev);
3969
3970 adapter->netdev = netdev;
3971 adapter->pdev = pdev;
3972 hw = &adapter->hw;
3973 hw->back = adapter;
b3f4d599 3974 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
92915f71 3975
dec0d8e4 3976 /* call save state here in standalone driver because it relies on
92915f71
GR		 3977 * adapter struct to exist, and needs to call netdev_priv
3978 */
3979 pci_save_state(pdev);
3980
3981 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
3982 pci_resource_len(pdev, 0));
dbf8b0d8 3983 adapter->io_addr = hw->hw_addr;
92915f71
GR		 3984 if (!hw->hw_addr) {
3985 err = -EIO;
3986 goto err_ioremap;
3987 }
3988
3989 ixgbevf_assign_netdev_ops(netdev);
3990
dec0d8e4 3991 /* Setup HW API */
92915f71
GR		 3992 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
3993 hw->mac.type = ii->mac;
3994
3995 memcpy(&hw->mbx.ops, &ixgbevf_mbx_ops,
f416dfc0 3996 sizeof(struct ixgbe_mbx_operations));
92915f71 3997
92915f71
GR		 3998 /* setup the private structure */
3999 err = ixgbevf_sw_init(adapter);
1a0d6ae5
DK		 4000 if (err)
4001 goto err_sw_init;
4002
4003 /* The HW MAC address was set and/or determined in sw_init */
1a0d6ae5
DK		 4004 if (!is_valid_ether_addr(netdev->dev_addr)) {
4005 pr_err("invalid MAC address\n");
4006 err = -EIO;
4007 goto err_sw_init;
4008 }
92915f71 4009
471a76de 4010 netdev->hw_features = NETIF_F_SG |
dec0d8e4
JK		 4011 NETIF_F_IP_CSUM |
4012 NETIF_F_IPV6_CSUM |
4013 NETIF_F_TSO |
4014 NETIF_F_TSO6 |
4015 NETIF_F_RXCSUM;
471a76de
MM		 4016
4017 netdev->features = netdev->hw_features |
f646968f
PM		 4018 NETIF_F_HW_VLAN_CTAG_TX |
4019 NETIF_F_HW_VLAN_CTAG_RX |
4020 NETIF_F_HW_VLAN_CTAG_FILTER;
92915f71 4021
39f35a37
ET		 4022 netdev->vlan_features |= NETIF_F_TSO |
4023 NETIF_F_TSO6 |
4024 NETIF_F_IP_CSUM |
4025 NETIF_F_IPV6_CSUM |
4026 NETIF_F_SG;
92915f71
GR		 4027
4028 if (pci_using_dac)
4029 netdev->features |= NETIF_F_HIGHDMA;
4030
01789349
JP		 4031 netdev->priv_flags |= IFF_UNICAST_FLT;
4032
ea699569
MR		 4033 if (IXGBE_REMOVED(hw->hw_addr)) {
4034 err = -EIO;
4035 goto err_sw_init;
4036 }
9ac5c5cc
ET		 4037
4038 setup_timer(&adapter->service_timer, &ixgbevf_service_timer,
4039 (unsigned long)adapter);
4040
4041 INIT_WORK(&adapter->service_task, ixgbevf_service_task);
4042 set_bit(__IXGBEVF_SERVICE_INITED, &adapter->state);
4043 clear_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state);
92915f71
GR		 4044
4045 err = ixgbevf_init_interrupt_scheme(adapter);
4046 if (err)
4047 goto err_sw_init;
4048
92915f71
GR		 4049 strcpy(netdev->name, "eth%d");
4050
4051 err = register_netdev(netdev);
4052 if (err)
4053 goto err_register;
4054
0333464f 4055 pci_set_drvdata(pdev, netdev);
5d426ad1
GR		 4056 netif_carrier_off(netdev);
4057
33bd9f60
GR		 4058 ixgbevf_init_last_counter_stats(adapter);
4059
47068b0d
ET		 4060 /* print the VF info */
4061 dev_info(&pdev->dev, "%pM\n", netdev->dev_addr);
4062 dev_info(&pdev->dev, "MAC: %d\n", hw->mac.type);
92915f71 4063
47068b0d
ET		 4064 switch (hw->mac.type) {
4065 case ixgbe_mac_X550_vf:
4066 dev_info(&pdev->dev, "Intel(R) X550 Virtual Function\n");
4067 break;
4068 case ixgbe_mac_X540_vf:
4069 dev_info(&pdev->dev, "Intel(R) X540 Virtual Function\n");
4070 break;
4071 case ixgbe_mac_82599_vf:
4072 default:
4073 dev_info(&pdev->dev, "Intel(R) 82599 Virtual Function\n");
4074 break;
4075 }
92915f71 4076
92915f71
GR		 4077 return 0;
4078
4079err_register:
0ac1e8ce 4080 ixgbevf_clear_interrupt_scheme(adapter);
92915f71
GR		 4081err_sw_init:
4082 ixgbevf_reset_interrupt_capability(adapter);
dbf8b0d8 4083 iounmap(adapter->io_addr);
92915f71 4084err_ioremap:
0333464f 4085 disable_dev = !test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state);
92915f71
GR		 4086 free_netdev(netdev);
4087err_alloc_etherdev:
4088 pci_release_regions(pdev);
4089err_pci_reg:
4090err_dma:
0333464f 4091 if (!adapter || disable_dev)
bc0c7151 4092 pci_disable_device(pdev);
92915f71
GR		 4093 return err;
4094}
4095
4096/**
4097 * ixgbevf_remove - Device Removal Routine
4098 * @pdev: PCI device information struct
4099 *
4100 * ixgbevf_remove is called by the PCI subsystem to alert the driver
4101 * that it should release a PCI device. The could be caused by a
4102 * Hot-Plug event, or because the driver is going to be removed from
4103 * memory.
4104 **/
9f9a12f8 4105static void ixgbevf_remove(struct pci_dev *pdev)
92915f71
GR		 4106{
4107 struct net_device *netdev = pci_get_drvdata(pdev);
0333464f
ET		 4108 struct ixgbevf_adapter *adapter;
4109 bool disable_dev;
4110
4111 if (!netdev)
4112 return;
4113
4114 adapter = netdev_priv(netdev);
92915f71 4115
2e7cfbdd 4116 set_bit(__IXGBEVF_REMOVING, &adapter->state);
9ac5c5cc 4117 cancel_work_sync(&adapter->service_task);
92915f71 4118
fd13a9ab 4119 if (netdev->reg_state == NETREG_REGISTERED)
92915f71 4120 unregister_netdev(netdev);
92915f71 4121
0ac1e8ce 4122 ixgbevf_clear_interrupt_scheme(adapter);
92915f71
GR		 4123 ixgbevf_reset_interrupt_capability(adapter);
4124
dbf8b0d8 4125 iounmap(adapter->io_addr);
92915f71
GR		 4126 pci_release_regions(pdev);
4127
4128 hw_dbg(&adapter->hw, "Remove complete\n");
4129
0333464f 4130 disable_dev = !test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state);
92915f71
GR		 4131 free_netdev(netdev);
4132
0333464f 4133 if (disable_dev)
bc0c7151 4134 pci_disable_device(pdev);
92915f71
GR		 4135}
4136
9f19f31d
AD		 4137/**
4138 * ixgbevf_io_error_detected - called when PCI error is detected
4139 * @pdev: Pointer to PCI device
4140 * @state: The current pci connection state
4141 *
4142 * This function is called after a PCI bus error affecting
4143 * this device has been detected.
dec0d8e4 4144 **/
9f19f31d
AD		 4145static pci_ers_result_t ixgbevf_io_error_detected(struct pci_dev *pdev,
4146 pci_channel_state_t state)
4147{
4148 struct net_device *netdev = pci_get_drvdata(pdev);
4149 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4150
9ac5c5cc 4151 if (!test_bit(__IXGBEVF_SERVICE_INITED, &adapter->state))
ea699569
MR		 4152 return PCI_ERS_RESULT_DISCONNECT;
4153
bc0c7151 4154 rtnl_lock();
9f19f31d
AD		 4155 netif_device_detach(netdev);
4156
bc0c7151
MR		 4157 if (state == pci_channel_io_perm_failure) {
4158 rtnl_unlock();
9f19f31d 4159 return PCI_ERS_RESULT_DISCONNECT;
bc0c7151 4160 }
9f19f31d
AD		 4161
4162 if (netif_running(netdev))
4163 ixgbevf_down(adapter);
4164
bc0c7151
MR		 4165 if (!test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state))
4166 pci_disable_device(pdev);
4167 rtnl_unlock();
9f19f31d
AD		 4168
4169 /* Request a slot slot reset. */
4170 return PCI_ERS_RESULT_NEED_RESET;
4171}
4172
4173/**
4174 * ixgbevf_io_slot_reset - called after the pci bus has been reset.
4175 * @pdev: Pointer to PCI device
4176 *
4177 * Restart the card from scratch, as if from a cold-boot. Implementation
4178 * resembles the first-half of the ixgbevf_resume routine.
dec0d8e4 4179 **/
9f19f31d
AD		 4180static pci_ers_result_t ixgbevf_io_slot_reset(struct pci_dev *pdev)
4181{
4182 struct net_device *netdev = pci_get_drvdata(pdev);
4183 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4184
4185 if (pci_enable_device_mem(pdev)) {
4186 dev_err(&pdev->dev,
4187 "Cannot re-enable PCI device after reset.\n");
4188 return PCI_ERS_RESULT_DISCONNECT;
4189 }
4190
4e857c58 4191 smp_mb__before_atomic();
bc0c7151 4192 clear_bit(__IXGBEVF_DISABLED, &adapter->state);
9f19f31d
AD		 4193 pci_set_master(pdev);
4194
4195 ixgbevf_reset(adapter);
4196
4197 return PCI_ERS_RESULT_RECOVERED;
4198}
4199
4200/**
4201 * ixgbevf_io_resume - called when traffic can start flowing again.
4202 * @pdev: Pointer to PCI device
4203 *
4204 * This callback is called when the error recovery driver tells us that
4205 * its OK to resume normal operation. Implementation resembles the
4206 * second-half of the ixgbevf_resume routine.
dec0d8e4 4207 **/
9f19f31d
AD		 4208static void ixgbevf_io_resume(struct pci_dev *pdev)
4209{
4210 struct net_device *netdev = pci_get_drvdata(pdev);
4211 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4212
4213 if (netif_running(netdev))
4214 ixgbevf_up(adapter);
4215
4216 netif_device_attach(netdev);
4217}
4218
4219/* PCI Error Recovery (ERS) */
3646f0e5 4220static const struct pci_error_handlers ixgbevf_err_handler = {
9f19f31d
AD		 4221 .error_detected = ixgbevf_io_error_detected,
4222 .slot_reset = ixgbevf_io_slot_reset,
4223 .resume = ixgbevf_io_resume,
4224};
4225
92915f71 4226static struct pci_driver ixgbevf_driver = {
dec0d8e4
JK		 4227 .name = ixgbevf_driver_name,
4228 .id_table = ixgbevf_pci_tbl,
4229 .probe = ixgbevf_probe,
4230 .remove = ixgbevf_remove,
0ac1e8ce
AD		 4231#ifdef CONFIG_PM
4232 /* Power Management Hooks */
dec0d8e4
JK		 4233 .suspend = ixgbevf_suspend,
4234 .resume = ixgbevf_resume,
0ac1e8ce 4235#endif
dec0d8e4
JK		 4236 .shutdown = ixgbevf_shutdown,
4237 .err_handler = &ixgbevf_err_handler
92915f71
GR		 4238};
4239
4240/**
65d676c8 4241 * ixgbevf_init_module - Driver Registration Routine
92915f71 4242 *
65d676c8 4243 * ixgbevf_init_module is the first routine called when the driver is
92915f71
GR		 4244 * loaded. All it does is register with the PCI subsystem.
4245 **/
4246static int __init ixgbevf_init_module(void)
4247{
dbd9636e
JK		 4248 pr_info("%s - version %s\n", ixgbevf_driver_string,
4249 ixgbevf_driver_version);
92915f71 4250
dbd9636e 4251 pr_info("%s\n", ixgbevf_copyright);
40a13e24
MR		 4252 ixgbevf_wq = create_singlethread_workqueue(ixgbevf_driver_name);
4253 if (!ixgbevf_wq) {
4254 pr_err("%s: Failed to create workqueue\n", ixgbevf_driver_name);
4255 return -ENOMEM;
4256 }
92915f71 4257
50985b5f 4258 return pci_register_driver(&ixgbevf_driver);
92915f71
GR		 4259}
4260
4261module_init(ixgbevf_init_module);
4262
4263/**
65d676c8 4264 * ixgbevf_exit_module - Driver Exit Cleanup Routine
92915f71 4265 *
65d676c8 4266 * ixgbevf_exit_module is called just before the driver is removed
92915f71
GR		 4267 * from memory.
4268 **/
4269static void __exit ixgbevf_exit_module(void)
4270{
4271 pci_unregister_driver(&ixgbevf_driver);
40a13e24
MR		 4272 if (ixgbevf_wq) {
4273 destroy_workqueue(ixgbevf_wq);
4274 ixgbevf_wq = NULL;
4275 }
92915f71
GR		 4276}
4277
4278#ifdef DEBUG
4279/**
65d676c8 4280 * ixgbevf_get_hw_dev_name - return device name string
92915f71
GR		 4281 * used by hardware layer to print debugging information
4282 **/
4283char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw)
4284{
4285 struct ixgbevf_adapter *adapter = hw->back;
dec0d8e4 4286
92915f71
GR		 4287 return adapter->netdev->name;
4288}
4289
4290#endif
4291module_exit(ixgbevf_exit_module);
4292
4293/* ixgbevf_main.c */
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