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Merge tag 'for-linus-20170825' of git://git.infradead.org/linux-mtd
[mirror_ubuntu-artful-kernel.git] / drivers / net / ethernet / intel / ixgbevf / ixgbevf_main.c
CommitLineData
92915f71
GR		 1/*******************************************************************************
2
3 Intel 82599 Virtual Function driver
dec0d8e4 4 Copyright(c) 1999 - 2015 Intel Corporation.
92915f71
GR		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
dec0d8e4 16 this program; if not, see <http://www.gnu.org/licenses/>.
92915f71
GR		 17
18 The full GNU General Public License is included in this distribution in
19 the file called "COPYING".
20
21 Contact Information:
22 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24
25*******************************************************************************/
26
92915f71
GR		 27/******************************************************************************
28 Copyright (c)2006 - 2007 Myricom, Inc. for some LRO specific code
29******************************************************************************/
dbd9636e
JK		 30
31#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
32
92915f71 33#include <linux/types.h>
dadcd65f 34#include <linux/bitops.h>
92915f71
GR		 35#include <linux/module.h>
36#include <linux/pci.h>
37#include <linux/netdevice.h>
38#include <linux/vmalloc.h>
39#include <linux/string.h>
40#include <linux/in.h>
41#include <linux/ip.h>
42#include <linux/tcp.h>
70a10e25 43#include <linux/sctp.h>
92915f71 44#include <linux/ipv6.h>
5a0e3ad6 45#include <linux/slab.h>
92915f71
GR		 46#include <net/checksum.h>
47#include <net/ip6_checksum.h>
48#include <linux/ethtool.h>
01789349 49#include <linux/if.h>
92915f71 50#include <linux/if_vlan.h>
70c71606 51#include <linux/prefetch.h>
2a20525b 52#include <net/mpls.h>
92915f71
GR		 53
54#include "ixgbevf.h"
55
3d8fe98f 56const char ixgbevf_driver_name[] = "ixgbevf";
92915f71 57static const char ixgbevf_driver_string[] =
422e05d1 58 "Intel(R) 10 Gigabit PCI Express Virtual Function Network Driver";
92915f71 59
adc2c83e 60#define DRV_VERSION "4.1.0-k"
92915f71 61const char ixgbevf_driver_version[] = DRV_VERSION;
66c87bd5 62static char ixgbevf_copyright[] =
40a13e24 63 "Copyright (c) 2009 - 2015 Intel Corporation.";
92915f71
GR		 64
65static const struct ixgbevf_info *ixgbevf_info_tbl[] = {
c6d45171
KS		 66 [board_82599_vf] = &ixgbevf_82599_vf_info,
67 [board_82599_vf_hv] = &ixgbevf_82599_vf_hv_info,
68 [board_X540_vf] = &ixgbevf_X540_vf_info,
69 [board_X540_vf_hv] = &ixgbevf_X540_vf_hv_info,
70 [board_X550_vf] = &ixgbevf_X550_vf_info,
71 [board_X550_vf_hv] = &ixgbevf_X550_vf_hv_info,
72 [board_X550EM_x_vf] = &ixgbevf_X550EM_x_vf_info,
73 [board_X550EM_x_vf_hv] = &ixgbevf_X550EM_x_vf_hv_info,
1d94f987 74 [board_x550em_a_vf] = &ixgbevf_x550em_a_vf_info,
92915f71
GR		 75};
76
77/* ixgbevf_pci_tbl - PCI Device ID Table
78 *
79 * Wildcard entries (PCI_ANY_ID) should come last
80 * Last entry must be all 0s
81 *
82 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
83 * Class, Class Mask, private data (not used) }
84 */
9baa3c34 85static const struct pci_device_id ixgbevf_pci_tbl[] = {
39ba22b4 86 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF), board_82599_vf },
c6d45171 87 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF_HV), board_82599_vf_hv },
39ba22b4 88 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540_VF), board_X540_vf },
c6d45171 89 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540_VF_HV), board_X540_vf_hv },
47068b0d 90 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550_VF), board_X550_vf },
c6d45171 91 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550_VF_HV), board_X550_vf_hv },
47068b0d 92 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_VF), board_X550EM_x_vf },
c6d45171 93 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_VF_HV), board_X550EM_x_vf_hv},
1d94f987 94 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_VF), board_x550em_a_vf },
92915f71
GR		 95 /* required last entry */
96 {0, }
97};
98MODULE_DEVICE_TABLE(pci, ixgbevf_pci_tbl);
99
100MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
b8ce18cd 101MODULE_DESCRIPTION("Intel(R) 10 Gigabit Virtual Function Network Driver");
92915f71
GR		 102MODULE_LICENSE("GPL");
103MODULE_VERSION(DRV_VERSION);
104
b3f4d599 105#define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
106static int debug = -1;
107module_param(debug, int, 0);
108MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
92915f71 109
40a13e24
MR		 110static struct workqueue_struct *ixgbevf_wq;
111
9ac5c5cc
ET		 112static void ixgbevf_service_event_schedule(struct ixgbevf_adapter *adapter)
113{
114 if (!test_bit(__IXGBEVF_DOWN, &adapter->state) &&
115 !test_bit(__IXGBEVF_REMOVING, &adapter->state) &&
116 !test_and_set_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state))
40a13e24 117 queue_work(ixgbevf_wq, &adapter->service_task);
9ac5c5cc
ET		 118}
119
120static void ixgbevf_service_event_complete(struct ixgbevf_adapter *adapter)
121{
122 BUG_ON(!test_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state));
123
124 /* flush memory to make sure state is correct before next watchdog */
125 smp_mb__before_atomic();
126 clear_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state);
127}
128
92915f71 129/* forward decls */
220fe050 130static void ixgbevf_queue_reset_subtask(struct ixgbevf_adapter *adapter);
fa71ae27 131static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector);
56e94095 132static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter);
92915f71 133
dbf8b0d8
MR		 134static void ixgbevf_remove_adapter(struct ixgbe_hw *hw)
135{
136 struct ixgbevf_adapter *adapter = hw->back;
137
138 if (!hw->hw_addr)
139 return;
140 hw->hw_addr = NULL;
141 dev_err(&adapter->pdev->dev, "Adapter removed\n");
9ac5c5cc
ET		 142 if (test_bit(__IXGBEVF_SERVICE_INITED, &adapter->state))
143 ixgbevf_service_event_schedule(adapter);
dbf8b0d8
MR		 144}
145
146static void ixgbevf_check_remove(struct ixgbe_hw *hw, u32 reg)
147{
148 u32 value;
149
150 /* The following check not only optimizes a bit by not
151 * performing a read on the status register when the
152 * register just read was a status register read that
153 * returned IXGBE_FAILED_READ_REG. It also blocks any
154 * potential recursion.
155 */
156 if (reg == IXGBE_VFSTATUS) {
157 ixgbevf_remove_adapter(hw);
158 return;
159 }
32c74949 160 value = ixgbevf_read_reg(hw, IXGBE_VFSTATUS);
dbf8b0d8
MR		 161 if (value == IXGBE_FAILED_READ_REG)
162 ixgbevf_remove_adapter(hw);
163}
164
32c74949 165u32 ixgbevf_read_reg(struct ixgbe_hw *hw, u32 reg)
dbf8b0d8
MR		 166{
167 u8 __iomem *reg_addr = ACCESS_ONCE(hw->hw_addr);
168 u32 value;
169
170 if (IXGBE_REMOVED(reg_addr))
171 return IXGBE_FAILED_READ_REG;
172 value = readl(reg_addr + reg);
173 if (unlikely(value == IXGBE_FAILED_READ_REG))
174 ixgbevf_check_remove(hw, reg);
175 return value;
176}
177
49ce9c2c 178/**
65d676c8 179 * ixgbevf_set_ivar - set IVAR registers - maps interrupt causes to vectors
92915f71
GR		 180 * @adapter: pointer to adapter struct
181 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
182 * @queue: queue to map the corresponding interrupt to
183 * @msix_vector: the vector to map to the corresponding queue
dec0d8e4 184 **/
92915f71
GR		 185static void ixgbevf_set_ivar(struct ixgbevf_adapter *adapter, s8 direction,
186 u8 queue, u8 msix_vector)
187{
188 u32 ivar, index;
189 struct ixgbe_hw *hw = &adapter->hw;
dec0d8e4 190
92915f71
GR		 191 if (direction == -1) {
192 /* other causes */
193 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
194 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC);
195 ivar &= ~0xFF;
196 ivar |= msix_vector;
197 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar);
198 } else {
dec0d8e4 199 /* Tx or Rx causes */
92915f71
GR		 200 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
201 index = ((16 * (queue & 1)) + (8 * direction));
202 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(queue >> 1));
203 ivar &= ~(0xFF << index);
204 ivar |= (msix_vector << index);
205 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(queue >> 1), ivar);
206 }
207}
208
70a10e25 209static void ixgbevf_unmap_and_free_tx_resource(struct ixgbevf_ring *tx_ring,
9bdfefd2
ET		 210 struct ixgbevf_tx_buffer *tx_buffer)
211{
212 if (tx_buffer->skb) {
213 dev_kfree_skb_any(tx_buffer->skb);
214 if (dma_unmap_len(tx_buffer, len))
70a10e25 215 dma_unmap_single(tx_ring->dev,
9bdfefd2
ET		 216 dma_unmap_addr(tx_buffer, dma),
217 dma_unmap_len(tx_buffer, len),
2a1f8794 218 DMA_TO_DEVICE);
9bdfefd2
ET		 219 } else if (dma_unmap_len(tx_buffer, len)) {
220 dma_unmap_page(tx_ring->dev,
221 dma_unmap_addr(tx_buffer, dma),
222 dma_unmap_len(tx_buffer, len),
223 DMA_TO_DEVICE);
92915f71 224 }
9bdfefd2
ET		 225 tx_buffer->next_to_watch = NULL;
226 tx_buffer->skb = NULL;
227 dma_unmap_len_set(tx_buffer, len, 0);
228 /* tx_buffer must be completely set up in the transmit path */
92915f71
GR		 229}
230
e08400b7
ET		 231static u64 ixgbevf_get_tx_completed(struct ixgbevf_ring *ring)
232{
233 return ring->stats.packets;
234}
92915f71 235
e08400b7
ET		 236static u32 ixgbevf_get_tx_pending(struct ixgbevf_ring *ring)
237{
238 struct ixgbevf_adapter *adapter = netdev_priv(ring->netdev);
239 struct ixgbe_hw *hw = &adapter->hw;
92915f71 240
e08400b7
ET		 241 u32 head = IXGBE_READ_REG(hw, IXGBE_VFTDH(ring->reg_idx));
242 u32 tail = IXGBE_READ_REG(hw, IXGBE_VFTDT(ring->reg_idx));
243
244 if (head != tail)
245 return (head < tail) ?
246 tail - head : (tail + ring->count - head);
247
248 return 0;
249}
250
251static inline bool ixgbevf_check_tx_hang(struct ixgbevf_ring *tx_ring)
252{
253 u32 tx_done = ixgbevf_get_tx_completed(tx_ring);
254 u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
255 u32 tx_pending = ixgbevf_get_tx_pending(tx_ring);
256
257 clear_check_for_tx_hang(tx_ring);
258
259 /* Check for a hung queue, but be thorough. This verifies
260 * that a transmit has been completed since the previous
261 * check AND there is at least one packet pending. The
262 * ARMED bit is set to indicate a potential hang.
263 */
264 if ((tx_done_old == tx_done) && tx_pending) {
265 /* make sure it is true for two checks in a row */
266 return test_and_set_bit(__IXGBEVF_HANG_CHECK_ARMED,
267 &tx_ring->state);
268 }
269 /* reset the countdown */
270 clear_bit(__IXGBEVF_HANG_CHECK_ARMED, &tx_ring->state);
271
272 /* update completed stats and continue */
273 tx_ring->tx_stats.tx_done_old = tx_done;
274
275 return false;
276}
277
9ac5c5cc
ET		 278static void ixgbevf_tx_timeout_reset(struct ixgbevf_adapter *adapter)
279{
280 /* Do the reset outside of interrupt context */
281 if (!test_bit(__IXGBEVF_DOWN, &adapter->state)) {
d5dd7c3f 282 set_bit(__IXGBEVF_RESET_REQUESTED, &adapter->state);
9ac5c5cc
ET		 283 ixgbevf_service_event_schedule(adapter);
284 }
285}
286
e08400b7
ET		 287/**
288 * ixgbevf_tx_timeout - Respond to a Tx Hang
289 * @netdev: network interface device structure
290 **/
291static void ixgbevf_tx_timeout(struct net_device *netdev)
292{
293 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
294
9ac5c5cc 295 ixgbevf_tx_timeout_reset(adapter);
e08400b7 296}
92915f71
GR		 297
298/**
299 * ixgbevf_clean_tx_irq - Reclaim resources after transmit completes
fa71ae27 300 * @q_vector: board private structure
92915f71 301 * @tx_ring: tx ring to clean
8220bbc1 302 * @napi_budget: Used to determine if we are in netpoll
92915f71 303 **/
fa71ae27 304static bool ixgbevf_clean_tx_irq(struct ixgbevf_q_vector *q_vector,
8220bbc1 305 struct ixgbevf_ring *tx_ring, int napi_budget)
92915f71 306{
fa71ae27 307 struct ixgbevf_adapter *adapter = q_vector->adapter;
7ad1a093
ET		 308 struct ixgbevf_tx_buffer *tx_buffer;
309 union ixgbe_adv_tx_desc *tx_desc;
92915f71 310 unsigned int total_bytes = 0, total_packets = 0;
7ad1a093
ET		 311 unsigned int budget = tx_ring->count / 2;
312 unsigned int i = tx_ring->next_to_clean;
92915f71 313
10cc1bdd
AD		 314 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
315 return true;
316
7ad1a093
ET		 317 tx_buffer = &tx_ring->tx_buffer_info[i];
318 tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
319 i -= tx_ring->count;
92915f71 320
e757e3e1 321 do {
7ad1a093 322 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
e757e3e1
AD		 323
324 /* if next_to_watch is not set then there is no work pending */
325 if (!eop_desc)
326 break;
327
328 /* prevent any other reads prior to eop_desc */
329 read_barrier_depends();
330
331 /* if DD is not set pending work has not been completed */
332 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
333 break;
334
335 /* clear next_to_watch to prevent false hangs */
7ad1a093 336 tx_buffer->next_to_watch = NULL;
e757e3e1 337
7ad1a093
ET		 338 /* update the statistics for this packet */
339 total_bytes += tx_buffer->bytecount;
340 total_packets += tx_buffer->gso_segs;
92915f71 341
9bdfefd2 342 /* free the skb */
8220bbc1 343 napi_consume_skb(tx_buffer->skb, napi_budget);
9bdfefd2
ET		 344
345 /* unmap skb header data */
346 dma_unmap_single(tx_ring->dev,
347 dma_unmap_addr(tx_buffer, dma),
348 dma_unmap_len(tx_buffer, len),
349 DMA_TO_DEVICE);
350
7ad1a093 351 /* clear tx_buffer data */
9bdfefd2
ET		 352 tx_buffer->skb = NULL;
353 dma_unmap_len_set(tx_buffer, len, 0);
92915f71 354
7ad1a093
ET		 355 /* unmap remaining buffers */
356 while (tx_desc != eop_desc) {
7ad1a093
ET		 357 tx_buffer++;
358 tx_desc++;
92915f71 359 i++;
7ad1a093
ET		 360 if (unlikely(!i)) {
361 i -= tx_ring->count;
362 tx_buffer = tx_ring->tx_buffer_info;
363 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
364 }
e757e3e1 365
9bdfefd2
ET		 366 /* unmap any remaining paged data */
367 if (dma_unmap_len(tx_buffer, len)) {
368 dma_unmap_page(tx_ring->dev,
369 dma_unmap_addr(tx_buffer, dma),
370 dma_unmap_len(tx_buffer, len),
371 DMA_TO_DEVICE);
372 dma_unmap_len_set(tx_buffer, len, 0);
373 }
92915f71
GR		 374 }
375
7ad1a093
ET		 376 /* move us one more past the eop_desc for start of next pkt */
377 tx_buffer++;
378 tx_desc++;
379 i++;
380 if (unlikely(!i)) {
381 i -= tx_ring->count;
382 tx_buffer = tx_ring->tx_buffer_info;
383 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
384 }
385
386 /* issue prefetch for next Tx descriptor */
387 prefetch(tx_desc);
388
389 /* update budget accounting */
390 budget--;
391 } while (likely(budget));
392
393 i += tx_ring->count;
92915f71 394 tx_ring->next_to_clean = i;
7ad1a093
ET		 395 u64_stats_update_begin(&tx_ring->syncp);
396 tx_ring->stats.bytes += total_bytes;
397 tx_ring->stats.packets += total_packets;
398 u64_stats_update_end(&tx_ring->syncp);
399 q_vector->tx.total_bytes += total_bytes;
400 q_vector->tx.total_packets += total_packets;
92915f71 401
e08400b7
ET		 402 if (check_for_tx_hang(tx_ring) && ixgbevf_check_tx_hang(tx_ring)) {
403 struct ixgbe_hw *hw = &adapter->hw;
404 union ixgbe_adv_tx_desc *eop_desc;
405
406 eop_desc = tx_ring->tx_buffer_info[i].next_to_watch;
407
408 pr_err("Detected Tx Unit Hang\n"
409 " Tx Queue <%d>\n"
410 " TDH, TDT <%x>, <%x>\n"
411 " next_to_use <%x>\n"
412 " next_to_clean <%x>\n"
413 "tx_buffer_info[next_to_clean]\n"
414 " next_to_watch <%p>\n"
415 " eop_desc->wb.status <%x>\n"
416 " time_stamp <%lx>\n"
417 " jiffies <%lx>\n",
418 tx_ring->queue_index,
419 IXGBE_READ_REG(hw, IXGBE_VFTDH(tx_ring->reg_idx)),
420 IXGBE_READ_REG(hw, IXGBE_VFTDT(tx_ring->reg_idx)),
421 tx_ring->next_to_use, i,
422 eop_desc, (eop_desc ? eop_desc->wb.status : 0),
423 tx_ring->tx_buffer_info[i].time_stamp, jiffies);
424
425 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
426
427 /* schedule immediate reset if we believe we hung */
9ac5c5cc 428 ixgbevf_tx_timeout_reset(adapter);
e08400b7
ET		 429
430 return true;
431 }
432
92915f71 433#define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
7ad1a093 434 if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
f880d07b 435 (ixgbevf_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
92915f71
GR		 436 /* Make sure that anybody stopping the queue after this
437 * sees the new next_to_clean.
438 */
439 smp_mb();
7ad1a093 440
fb40195c
AD		 441 if (__netif_subqueue_stopped(tx_ring->netdev,
442 tx_ring->queue_index) &&
92915f71 443 !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
fb40195c
AD		 444 netif_wake_subqueue(tx_ring->netdev,
445 tx_ring->queue_index);
7ad1a093 446 ++tx_ring->tx_stats.restart_queue;
92915f71 447 }
92915f71
GR		 448 }
449
7ad1a093 450 return !!budget;
92915f71
GR		 451}
452
08681618
JK		 453/**
454 * ixgbevf_rx_skb - Helper function to determine proper Rx method
455 * @q_vector: structure containing interrupt and ring information
456 * @skb: packet to send up
08681618
JK		 457 **/
458static void ixgbevf_rx_skb(struct ixgbevf_q_vector *q_vector,
dff80520 459 struct sk_buff *skb)
08681618 460{
688ff32d 461 napi_gro_receive(&q_vector->napi, skb);
08681618
JK		 462}
463
1e1429d6
FD		 464#define IXGBE_RSS_L4_TYPES_MASK \
465 ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
466 (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
467 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
468 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
469
470static inline void ixgbevf_rx_hash(struct ixgbevf_ring *ring,
471 union ixgbe_adv_rx_desc *rx_desc,
472 struct sk_buff *skb)
473{
474 u16 rss_type;
475
476 if (!(ring->netdev->features & NETIF_F_RXHASH))
477 return;
478
479 rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
480 IXGBE_RXDADV_RSSTYPE_MASK;
481
482 if (!rss_type)
483 return;
484
485 skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
486 (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
487 PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
488}
489
dec0d8e4
JK		 490/**
491 * ixgbevf_rx_checksum - indicate in skb if hw indicated a good cksum
ec62fe26
ET		 492 * @ring: structure containig ring specific data
493 * @rx_desc: current Rx descriptor being processed
92915f71 494 * @skb: skb currently being received and modified
dec0d8e4 495 **/
55fb277c 496static inline void ixgbevf_rx_checksum(struct ixgbevf_ring *ring,
ec62fe26
ET		 497 union ixgbe_adv_rx_desc *rx_desc,
498 struct sk_buff *skb)
92915f71 499{
bc8acf2c 500 skb_checksum_none_assert(skb);
92915f71
GR		 501
502 /* Rx csum disabled */
fb40195c 503 if (!(ring->netdev->features & NETIF_F_RXCSUM))
92915f71
GR		 504 return;
505
506 /* if IP and error */
ec62fe26
ET		 507 if (ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
508 ixgbevf_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
095e2617 509 ring->rx_stats.csum_err++;
92915f71
GR		 510 return;
511 }
512
ec62fe26 513 if (!ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
92915f71
GR		 514 return;
515
ec62fe26 516 if (ixgbevf_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
095e2617 517 ring->rx_stats.csum_err++;
92915f71
GR		 518 return;
519 }
520
521 /* It must be a TCP or UDP packet with a valid checksum */
522 skb->ip_summed = CHECKSUM_UNNECESSARY;
92915f71
GR		 523}
524
dec0d8e4
JK		 525/**
526 * ixgbevf_process_skb_fields - Populate skb header fields from Rx descriptor
dff80520
ET		 527 * @rx_ring: rx descriptor ring packet is being transacted on
528 * @rx_desc: pointer to the EOP Rx descriptor
529 * @skb: pointer to current skb being populated
530 *
531 * This function checks the ring, descriptor, and packet information in
532 * order to populate the checksum, VLAN, protocol, and other fields within
533 * the skb.
dec0d8e4 534 **/
dff80520
ET		 535static void ixgbevf_process_skb_fields(struct ixgbevf_ring *rx_ring,
536 union ixgbe_adv_rx_desc *rx_desc,
537 struct sk_buff *skb)
538{
1e1429d6 539 ixgbevf_rx_hash(rx_ring, rx_desc, skb);
dff80520
ET		 540 ixgbevf_rx_checksum(rx_ring, rx_desc, skb);
541
542 if (ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
543 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
544 unsigned long *active_vlans = netdev_priv(rx_ring->netdev);
545
546 if (test_bit(vid & VLAN_VID_MASK, active_vlans))
547 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
548 }
549
550 skb->protocol = eth_type_trans(skb, rx_ring->netdev);
551}
552
4b95fe3d
ET		 553/**
554 * ixgbevf_is_non_eop - process handling of non-EOP buffers
555 * @rx_ring: Rx ring being processed
556 * @rx_desc: Rx descriptor for current buffer
557 * @skb: current socket buffer containing buffer in progress
558 *
559 * This function updates next to clean. If the buffer is an EOP buffer
560 * this function exits returning false, otherwise it will place the
561 * sk_buff in the next buffer to be chained and return true indicating
562 * that this is in fact a non-EOP buffer.
563 **/
564static bool ixgbevf_is_non_eop(struct ixgbevf_ring *rx_ring,
bad17234 565 union ixgbe_adv_rx_desc *rx_desc)
4b95fe3d
ET		 566{
567 u32 ntc = rx_ring->next_to_clean + 1;
568
569 /* fetch, update, and store next to clean */
570 ntc = (ntc < rx_ring->count) ? ntc : 0;
571 rx_ring->next_to_clean = ntc;
572
573 prefetch(IXGBEVF_RX_DESC(rx_ring, ntc));
574
575 if (likely(ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
576 return false;
577
578 return true;
579}
580
bad17234
ET		 581static bool ixgbevf_alloc_mapped_page(struct ixgbevf_ring *rx_ring,
582 struct ixgbevf_rx_buffer *bi)
bafa578f 583{
bad17234 584 struct page *page = bi->page;
bafa578f
ET		 585 dma_addr_t dma = bi->dma;
586
bad17234
ET		 587 /* since we are recycling buffers we should seldom need to alloc */
588 if (likely(page))
bafa578f
ET		 589 return true;
590
bad17234
ET		 591 /* alloc new page for storage */
592 page = dev_alloc_page();
593 if (unlikely(!page)) {
594 rx_ring->rx_stats.alloc_rx_page_failed++;
bafa578f
ET		 595 return false;
596 }
597
bad17234
ET		 598 /* map page for use */
599 dma = dma_map_page(rx_ring->dev, page, 0,
600 PAGE_SIZE, DMA_FROM_DEVICE);
bafa578f
ET		 601
602 /* if mapping failed free memory back to system since
603 * there isn't much point in holding memory we can't use
604 */
605 if (dma_mapping_error(rx_ring->dev, dma)) {
bad17234 606 __free_page(page);
bafa578f
ET		 607
608 rx_ring->rx_stats.alloc_rx_buff_failed++;
609 return false;
610 }
611
bafa578f 612 bi->dma = dma;
bad17234
ET		 613 bi->page = page;
614 bi->page_offset = 0;
bafa578f
ET		 615
616 return true;
617}
618
92915f71
GR		 619/**
620 * ixgbevf_alloc_rx_buffers - Replace used receive buffers; packet split
095e2617 621 * @rx_ring: rx descriptor ring (for a specific queue) to setup buffers on
bafa578f 622 * @cleaned_count: number of buffers to replace
92915f71 623 **/
095e2617 624static void ixgbevf_alloc_rx_buffers(struct ixgbevf_ring *rx_ring,
bafa578f 625 u16 cleaned_count)
92915f71 626{
92915f71
GR		 627 union ixgbe_adv_rx_desc *rx_desc;
628 struct ixgbevf_rx_buffer *bi;
fb40195c 629 unsigned int i = rx_ring->next_to_use;
92915f71 630
bafa578f
ET		 631 /* nothing to do or no valid netdev defined */
632 if (!cleaned_count || !rx_ring->netdev)
633 return;
b9dd245b 634
bafa578f
ET		 635 rx_desc = IXGBEVF_RX_DESC(rx_ring, i);
636 bi = &rx_ring->rx_buffer_info[i];
637 i -= rx_ring->count;
05d063aa 638
bafa578f 639 do {
bad17234 640 if (!ixgbevf_alloc_mapped_page(rx_ring, bi))
bafa578f 641 break;
b9dd245b 642
bafa578f
ET		 643 /* Refresh the desc even if pkt_addr didn't change
644 * because each write-back erases this info.
645 */
bad17234 646 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
92915f71 647
bafa578f
ET		 648 rx_desc++;
649 bi++;
92915f71 650 i++;
bafa578f
ET		 651 if (unlikely(!i)) {
652 rx_desc = IXGBEVF_RX_DESC(rx_ring, 0);
653 bi = rx_ring->rx_buffer_info;
654 i -= rx_ring->count;
655 }
656
657 /* clear the hdr_addr for the next_to_use descriptor */
658 rx_desc->read.hdr_addr = 0;
659
660 cleaned_count--;
661 } while (cleaned_count);
662
663 i += rx_ring->count;
92915f71 664
bafa578f
ET		 665 if (rx_ring->next_to_use != i) {
666 /* record the next descriptor to use */
667 rx_ring->next_to_use = i;
668
bad17234
ET		 669 /* update next to alloc since we have filled the ring */
670 rx_ring->next_to_alloc = i;
671
bafa578f
ET		 672 /* Force memory writes to complete before letting h/w
673 * know there are new descriptors to fetch. (Only
674 * applicable for weak-ordered memory model archs,
675 * such as IA-64).
676 */
677 wmb();
678 ixgbevf_write_tail(rx_ring, i);
679 }
92915f71
GR		 680}
681
dec0d8e4
JK		 682/**
683 * ixgbevf_cleanup_headers - Correct corrupted or empty headers
bad17234
ET		 684 * @rx_ring: rx descriptor ring packet is being transacted on
685 * @rx_desc: pointer to the EOP Rx descriptor
686 * @skb: pointer to current skb being fixed
687 *
688 * Check for corrupted packet headers caused by senders on the local L2
689 * embedded NIC switch not setting up their Tx Descriptors right. These
690 * should be very rare.
691 *
692 * Also address the case where we are pulling data in on pages only
693 * and as such no data is present in the skb header.
694 *
695 * In addition if skb is not at least 60 bytes we need to pad it so that
696 * it is large enough to qualify as a valid Ethernet frame.
697 *
698 * Returns true if an error was encountered and skb was freed.
dec0d8e4 699 **/
bad17234
ET		 700static bool ixgbevf_cleanup_headers(struct ixgbevf_ring *rx_ring,
701 union ixgbe_adv_rx_desc *rx_desc,
702 struct sk_buff *skb)
703{
704 /* verify that the packet does not have any known errors */
705 if (unlikely(ixgbevf_test_staterr(rx_desc,
706 IXGBE_RXDADV_ERR_FRAME_ERR_MASK))) {
707 struct net_device *netdev = rx_ring->netdev;
708
709 if (!(netdev->features & NETIF_F_RXALL)) {
710 dev_kfree_skb_any(skb);
711 return true;
712 }
713 }
714
a94d9e22
AD		 715 /* if eth_skb_pad returns an error the skb was freed */
716 if (eth_skb_pad(skb))
717 return true;
bad17234
ET		 718
719 return false;
720}
721
dec0d8e4
JK		 722/**
723 * ixgbevf_reuse_rx_page - page flip buffer and store it back on the ring
bad17234
ET		 724 * @rx_ring: rx descriptor ring to store buffers on
725 * @old_buff: donor buffer to have page reused
726 *
727 * Synchronizes page for reuse by the adapter
dec0d8e4 728 **/
bad17234
ET		 729static void ixgbevf_reuse_rx_page(struct ixgbevf_ring *rx_ring,
730 struct ixgbevf_rx_buffer *old_buff)
731{
732 struct ixgbevf_rx_buffer *new_buff;
733 u16 nta = rx_ring->next_to_alloc;
734
735 new_buff = &rx_ring->rx_buffer_info[nta];
736
737 /* update, and store next to alloc */
738 nta++;
739 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
740
741 /* transfer page from old buffer to new buffer */
742 new_buff->page = old_buff->page;
743 new_buff->dma = old_buff->dma;
744 new_buff->page_offset = old_buff->page_offset;
745
746 /* sync the buffer for use by the device */
747 dma_sync_single_range_for_device(rx_ring->dev, new_buff->dma,
748 new_buff->page_offset,
749 IXGBEVF_RX_BUFSZ,
750 DMA_FROM_DEVICE);
751}
752
753static inline bool ixgbevf_page_is_reserved(struct page *page)
754{
2f064f34 755 return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
bad17234
ET		 756}
757
dec0d8e4
JK		 758/**
759 * ixgbevf_add_rx_frag - Add contents of Rx buffer to sk_buff
bad17234
ET		 760 * @rx_ring: rx descriptor ring to transact packets on
761 * @rx_buffer: buffer containing page to add
762 * @rx_desc: descriptor containing length of buffer written by hardware
763 * @skb: sk_buff to place the data into
764 *
765 * This function will add the data contained in rx_buffer->page to the skb.
766 * This is done either through a direct copy if the data in the buffer is
767 * less than the skb header size, otherwise it will just attach the page as
768 * a frag to the skb.
769 *
770 * The function will then update the page offset if necessary and return
771 * true if the buffer can be reused by the adapter.
dec0d8e4 772 **/
bad17234
ET		 773static bool ixgbevf_add_rx_frag(struct ixgbevf_ring *rx_ring,
774 struct ixgbevf_rx_buffer *rx_buffer,
775 union ixgbe_adv_rx_desc *rx_desc,
776 struct sk_buff *skb)
777{
778 struct page *page = rx_buffer->page;
5505bdb5 779 unsigned char *va = page_address(page) + rx_buffer->page_offset;
bad17234
ET		 780 unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
781#if (PAGE_SIZE < 8192)
782 unsigned int truesize = IXGBEVF_RX_BUFSZ;
783#else
784 unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
785#endif
5505bdb5 786 unsigned int pull_len;
bad17234 787
5505bdb5
AD		 788 if (unlikely(skb_is_nonlinear(skb)))
789 goto add_tail_frag;
bad17234 790
5505bdb5 791 if (likely(size <= IXGBEVF_RX_HDR_SIZE)) {
bad17234
ET		 792 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
793
794 /* page is not reserved, we can reuse buffer as is */
795 if (likely(!ixgbevf_page_is_reserved(page)))
796 return true;
797
798 /* this page cannot be reused so discard it */
799 put_page(page);
800 return false;
801 }
802
5505bdb5
AD		 803 /* we need the header to contain the greater of either ETH_HLEN or
804 * 60 bytes if the skb->len is less than 60 for skb_pad.
805 */
806 pull_len = eth_get_headlen(va, IXGBEVF_RX_HDR_SIZE);
807
808 /* align pull length to size of long to optimize memcpy performance */
809 memcpy(__skb_put(skb, pull_len), va, ALIGN(pull_len, sizeof(long)));
810
811 /* update all of the pointers */
812 va += pull_len;
813 size -= pull_len;
814
815add_tail_frag:
bad17234 816 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
5505bdb5 817 (unsigned long)va & ~PAGE_MASK, size, truesize);
bad17234
ET		 818
819 /* avoid re-using remote pages */
820 if (unlikely(ixgbevf_page_is_reserved(page)))
821 return false;
822
823#if (PAGE_SIZE < 8192)
824 /* if we are only owner of page we can reuse it */
825 if (unlikely(page_count(page) != 1))
826 return false;
827
828 /* flip page offset to other buffer */
829 rx_buffer->page_offset ^= IXGBEVF_RX_BUFSZ;
830
831#else
832 /* move offset up to the next cache line */
833 rx_buffer->page_offset += truesize;
834
835 if (rx_buffer->page_offset > (PAGE_SIZE - IXGBEVF_RX_BUFSZ))
836 return false;
837
838#endif
839 /* Even if we own the page, we are not allowed to use atomic_set()
840 * This would break get_page_unless_zero() users.
841 */
fe896d18 842 page_ref_inc(page);
bad17234
ET		 843
844 return true;
845}
846
847static struct sk_buff *ixgbevf_fetch_rx_buffer(struct ixgbevf_ring *rx_ring,
848 union ixgbe_adv_rx_desc *rx_desc,
849 struct sk_buff *skb)
850{
851 struct ixgbevf_rx_buffer *rx_buffer;
852 struct page *page;
853
854 rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
855 page = rx_buffer->page;
856 prefetchw(page);
857
858 if (likely(!skb)) {
859 void *page_addr = page_address(page) +
860 rx_buffer->page_offset;
861
862 /* prefetch first cache line of first page */
863 prefetch(page_addr);
864#if L1_CACHE_BYTES < 128
865 prefetch(page_addr + L1_CACHE_BYTES);
866#endif
867
868 /* allocate a skb to store the frags */
869 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
870 IXGBEVF_RX_HDR_SIZE);
871 if (unlikely(!skb)) {
872 rx_ring->rx_stats.alloc_rx_buff_failed++;
873 return NULL;
874 }
875
876 /* we will be copying header into skb->data in
877 * pskb_may_pull so it is in our interest to prefetch
878 * it now to avoid a possible cache miss
879 */
880 prefetchw(skb->data);
881 }
882
883 /* we are reusing so sync this buffer for CPU use */
884 dma_sync_single_range_for_cpu(rx_ring->dev,
885 rx_buffer->dma,
886 rx_buffer->page_offset,
887 IXGBEVF_RX_BUFSZ,
888 DMA_FROM_DEVICE);
889
890 /* pull page into skb */
891 if (ixgbevf_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
892 /* hand second half of page back to the ring */
893 ixgbevf_reuse_rx_page(rx_ring, rx_buffer);
894 } else {
895 /* we are not reusing the buffer so unmap it */
896 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
897 PAGE_SIZE, DMA_FROM_DEVICE);
898 }
899
900 /* clear contents of buffer_info */
901 rx_buffer->dma = 0;
902 rx_buffer->page = NULL;
903
904 return skb;
905}
906
92915f71 907static inline void ixgbevf_irq_enable_queues(struct ixgbevf_adapter *adapter,
5f3600eb 908 u32 qmask)
92915f71 909{
92915f71
GR		 910 struct ixgbe_hw *hw = &adapter->hw;
911
5f3600eb 912 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, qmask);
92915f71
GR		 913}
914
08e50a20
JK		 915static int ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector,
916 struct ixgbevf_ring *rx_ring,
917 int budget)
92915f71 918{
92915f71 919 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
bafa578f 920 u16 cleaned_count = ixgbevf_desc_unused(rx_ring);
bad17234 921 struct sk_buff *skb = rx_ring->skb;
92915f71 922
6622402a 923 while (likely(total_rx_packets < budget)) {
4b95fe3d 924 union ixgbe_adv_rx_desc *rx_desc;
b97fe3b1 925
0579eefc
ET		 926 /* return some buffers to hardware, one at a time is too slow */
927 if (cleaned_count >= IXGBEVF_RX_BUFFER_WRITE) {
928 ixgbevf_alloc_rx_buffers(rx_ring, cleaned_count);
929 cleaned_count = 0;
930 }
931
bad17234 932 rx_desc = IXGBEVF_RX_DESC(rx_ring, rx_ring->next_to_clean);
0579eefc
ET		 933
934 if (!ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_DD))
92915f71 935 break;
92915f71 936
0579eefc
ET		 937 /* This memory barrier is needed to keep us from reading
938 * any other fields out of the rx_desc until we know the
939 * RXD_STAT_DD bit is set
940 */
941 rmb();
ec62fe26 942
bad17234
ET		 943 /* retrieve a buffer from the ring */
944 skb = ixgbevf_fetch_rx_buffer(rx_ring, rx_desc, skb);
0579eefc 945
bad17234
ET		 946 /* exit if we failed to retrieve a buffer */
947 if (!skb)
948 break;
92915f71 949
b97fe3b1
ET		 950 cleaned_count++;
951
bad17234
ET		 952 /* fetch next buffer in frame if non-eop */
953 if (ixgbevf_is_non_eop(rx_ring, rx_desc))
0579eefc 954 continue;
5c60f81a 955
bad17234
ET		 956 /* verify the packet layout is correct */
957 if (ixgbevf_cleanup_headers(rx_ring, rx_desc, skb)) {
958 skb = NULL;
0579eefc 959 continue;
92915f71
GR		 960 }
961
92915f71
GR		 962 /* probably a little skewed due to removing CRC */
963 total_rx_bytes += skb->len;
92915f71 964
815cccbf
JF		 965 /* Workaround hardware that can't do proper VEPA multicast
966 * source pruning.
967 */
bd9d5592 968 if ((skb->pkt_type == PACKET_BROADCAST ||
dec0d8e4 969 skb->pkt_type == PACKET_MULTICAST) &&
095e2617 970 ether_addr_equal(rx_ring->netdev->dev_addr,
7367d0b5 971 eth_hdr(skb)->h_source)) {
815cccbf 972 dev_kfree_skb_irq(skb);
0579eefc 973 continue;
815cccbf
JF		 974 }
975
dff80520
ET		 976 /* populate checksum, VLAN, and protocol */
977 ixgbevf_process_skb_fields(rx_ring, rx_desc, skb);
978
979 ixgbevf_rx_skb(q_vector, skb);
92915f71 980
bad17234
ET		 981 /* reset skb pointer */
982 skb = NULL;
983
0579eefc 984 /* update budget accounting */
6622402a
ET		 985 total_rx_packets++;
986 }
92915f71 987
bad17234
ET		 988 /* place incomplete frames back on ring for completion */
989 rx_ring->skb = skb;
990
4197aa7b 991 u64_stats_update_begin(&rx_ring->syncp);
095e2617
ET		 992 rx_ring->stats.packets += total_rx_packets;
993 rx_ring->stats.bytes += total_rx_bytes;
4197aa7b 994 u64_stats_update_end(&rx_ring->syncp);
ac6ed8f0
GR		 995 q_vector->rx.total_packets += total_rx_packets;
996 q_vector->rx.total_bytes += total_rx_bytes;
92915f71 997
08e50a20 998 return total_rx_packets;
92915f71
GR		 999}
1000
1001/**
fa71ae27 1002 * ixgbevf_poll - NAPI polling calback
92915f71
GR		 1003 * @napi: napi struct with our devices info in it
1004 * @budget: amount of work driver is allowed to do this pass, in packets
1005 *
fa71ae27 1006 * This function will clean more than one or more rings associated with a
92915f71
GR		 1007 * q_vector.
1008 **/
fa71ae27 1009static int ixgbevf_poll(struct napi_struct *napi, int budget)
92915f71
GR		 1010{
1011 struct ixgbevf_q_vector *q_vector =
1012 container_of(napi, struct ixgbevf_q_vector, napi);
1013 struct ixgbevf_adapter *adapter = q_vector->adapter;
fa71ae27 1014 struct ixgbevf_ring *ring;
32b3e08f 1015 int per_ring_budget, work_done = 0;
fa71ae27
AD		 1016 bool clean_complete = true;
1017
8220bbc1
AD		 1018 ixgbevf_for_each_ring(ring, q_vector->tx) {
1019 if (!ixgbevf_clean_tx_irq(q_vector, ring, budget))
1020 clean_complete = false;
1021 }
92915f71 1022
d0f71aff
WD		 1023 if (budget <= 0)
1024 return budget;
c777cdfa 1025
92915f71 1026 /* attempt to distribute budget to each queue fairly, but don't allow
dec0d8e4
JK		 1027 * the budget to go below 1 because we'll exit polling
1028 */
fa71ae27
AD		 1029 if (q_vector->rx.count > 1)
1030 per_ring_budget = max(budget/q_vector->rx.count, 1);
1031 else
1032 per_ring_budget = budget;
1033
32b3e08f
JB		 1034 ixgbevf_for_each_ring(ring, q_vector->rx) {
1035 int cleaned = ixgbevf_clean_rx_irq(q_vector, ring,
1036 per_ring_budget);
1037 work_done += cleaned;
8220bbc1
AD		 1038 if (cleaned >= per_ring_budget)
1039 clean_complete = false;
32b3e08f 1040 }
fa71ae27
AD		 1041
1042 /* If all work not completed, return budget and keep polling */
1043 if (!clean_complete)
1044 return budget;
1045 /* all work done, exit the polling mode */
32b3e08f 1046 napi_complete_done(napi, work_done);
9ad3d6f7 1047 if (adapter->rx_itr_setting == 1)
fa71ae27 1048 ixgbevf_set_itr(q_vector);
2e7cfbdd
MR		 1049 if (!test_bit(__IXGBEVF_DOWN, &adapter->state) &&
1050 !test_bit(__IXGBEVF_REMOVING, &adapter->state))
fa71ae27 1051 ixgbevf_irq_enable_queues(adapter,
8d055cc0 1052 BIT(q_vector->v_idx));
92915f71 1053
fa71ae27 1054 return 0;
92915f71
GR		 1055}
1056
ce422606
GR		 1057/**
1058 * ixgbevf_write_eitr - write VTEITR register in hardware specific way
1059 * @q_vector: structure containing interrupt and ring information
dec0d8e4 1060 **/
3849623e 1061void ixgbevf_write_eitr(struct ixgbevf_q_vector *q_vector)
ce422606
GR		 1062{
1063 struct ixgbevf_adapter *adapter = q_vector->adapter;
1064 struct ixgbe_hw *hw = &adapter->hw;
1065 int v_idx = q_vector->v_idx;
1066 u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
1067
dec0d8e4 1068 /* set the WDIS bit to not clear the timer bits and cause an
ce422606
GR		 1069 * immediate assertion of the interrupt
1070 */
1071 itr_reg |= IXGBE_EITR_CNT_WDIS;
1072
1073 IXGBE_WRITE_REG(hw, IXGBE_VTEITR(v_idx), itr_reg);
1074}
92915f71
GR		 1075
1076/**
1077 * ixgbevf_configure_msix - Configure MSI-X hardware
1078 * @adapter: board private structure
1079 *
1080 * ixgbevf_configure_msix sets up the hardware to properly generate MSI-X
1081 * interrupts.
1082 **/
1083static void ixgbevf_configure_msix(struct ixgbevf_adapter *adapter)
1084{
1085 struct ixgbevf_q_vector *q_vector;
6b43c446 1086 int q_vectors, v_idx;
92915f71
GR		 1087
1088 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
5f3600eb 1089 adapter->eims_enable_mask = 0;
92915f71 1090
dec0d8e4 1091 /* Populate the IVAR table and set the ITR values to the
92915f71
GR		 1092 * corresponding register.
1093 */
1094 for (v_idx = 0; v_idx < q_vectors; v_idx++) {
6b43c446 1095 struct ixgbevf_ring *ring;
dec0d8e4 1096
92915f71 1097 q_vector = adapter->q_vector[v_idx];
6b43c446
AD		 1098
1099 ixgbevf_for_each_ring(ring, q_vector->rx)
1100 ixgbevf_set_ivar(adapter, 0, ring->reg_idx, v_idx);
1101
1102 ixgbevf_for_each_ring(ring, q_vector->tx)
1103 ixgbevf_set_ivar(adapter, 1, ring->reg_idx, v_idx);
92915f71 1104
5f3600eb 1105 if (q_vector->tx.ring && !q_vector->rx.ring) {
dec0d8e4 1106 /* Tx only vector */
5f3600eb 1107 if (adapter->tx_itr_setting == 1)
8a9ca110 1108 q_vector->itr = IXGBE_12K_ITR;
5f3600eb
AD		 1109 else
1110 q_vector->itr = adapter->tx_itr_setting;
1111 } else {
dec0d8e4 1112 /* Rx or Rx/Tx vector */
5f3600eb
AD		 1113 if (adapter->rx_itr_setting == 1)
1114 q_vector->itr = IXGBE_20K_ITR;
1115 else
1116 q_vector->itr = adapter->rx_itr_setting;
1117 }
1118
1119 /* add q_vector eims value to global eims_enable_mask */
8d055cc0 1120 adapter->eims_enable_mask |= BIT(v_idx);
92915f71 1121
5f3600eb 1122 ixgbevf_write_eitr(q_vector);
92915f71
GR		 1123 }
1124
1125 ixgbevf_set_ivar(adapter, -1, 1, v_idx);
5f3600eb 1126 /* setup eims_other and add value to global eims_enable_mask */
8d055cc0 1127 adapter->eims_other = BIT(v_idx);
5f3600eb 1128 adapter->eims_enable_mask |= adapter->eims_other;
92915f71
GR		 1129}
1130
1131enum latency_range {
1132 lowest_latency = 0,
1133 low_latency = 1,
1134 bulk_latency = 2,
1135 latency_invalid = 255
1136};
1137
1138/**
1139 * ixgbevf_update_itr - update the dynamic ITR value based on statistics
5f3600eb
AD		 1140 * @q_vector: structure containing interrupt and ring information
1141 * @ring_container: structure containing ring performance data
92915f71 1142 *
dec0d8e4
JK		 1143 * Stores a new ITR value based on packets and byte
1144 * counts during the last interrupt. The advantage of per interrupt
1145 * computation is faster updates and more accurate ITR for the current
1146 * traffic pattern. Constants in this function were computed
1147 * based on theoretical maximum wire speed and thresholds were set based
1148 * on testing data as well as attempting to minimize response time
1149 * while increasing bulk throughput.
92915f71 1150 **/
5f3600eb
AD		 1151static void ixgbevf_update_itr(struct ixgbevf_q_vector *q_vector,
1152 struct ixgbevf_ring_container *ring_container)
92915f71 1153{
5f3600eb
AD		 1154 int bytes = ring_container->total_bytes;
1155 int packets = ring_container->total_packets;
92915f71
GR		 1156 u32 timepassed_us;
1157 u64 bytes_perint;
5f3600eb 1158 u8 itr_setting = ring_container->itr;
92915f71
GR		 1159
1160 if (packets == 0)
5f3600eb 1161 return;
92915f71 1162
dec0d8e4 1163 /* simple throttle rate management
92915f71
GR		 1164 * 0-20MB/s lowest (100000 ints/s)
1165 * 20-100MB/s low (20000 ints/s)
8a9ca110 1166 * 100-1249MB/s bulk (12000 ints/s)
92915f71
GR		 1167 */
1168 /* what was last interrupt timeslice? */
5f3600eb 1169 timepassed_us = q_vector->itr >> 2;
92915f71
GR		 1170 bytes_perint = bytes / timepassed_us; /* bytes/usec */
1171
1172 switch (itr_setting) {
1173 case lowest_latency:
e2c28ce7 1174 if (bytes_perint > 10)
5f3600eb 1175 itr_setting = low_latency;
92915f71
GR		 1176 break;
1177 case low_latency:
e2c28ce7 1178 if (bytes_perint > 20)
5f3600eb 1179 itr_setting = bulk_latency;
e2c28ce7 1180 else if (bytes_perint <= 10)
5f3600eb 1181 itr_setting = lowest_latency;
92915f71
GR		 1182 break;
1183 case bulk_latency:
e2c28ce7 1184 if (bytes_perint <= 20)
5f3600eb 1185 itr_setting = low_latency;
92915f71
GR		 1186 break;
1187 }
1188
5f3600eb
AD		 1189 /* clear work counters since we have the values we need */
1190 ring_container->total_bytes = 0;
1191 ring_container->total_packets = 0;
1192
1193 /* write updated itr to ring container */
1194 ring_container->itr = itr_setting;
92915f71
GR		 1195}
1196
fa71ae27 1197static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector)
92915f71 1198{
5f3600eb
AD		 1199 u32 new_itr = q_vector->itr;
1200 u8 current_itr;
92915f71 1201
5f3600eb
AD		 1202 ixgbevf_update_itr(q_vector, &q_vector->tx);
1203 ixgbevf_update_itr(q_vector, &q_vector->rx);
92915f71 1204
6b43c446 1205 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
92915f71
GR		 1206
1207 switch (current_itr) {
1208 /* counts and packets in update_itr are dependent on these numbers */
1209 case lowest_latency:
5f3600eb 1210 new_itr = IXGBE_100K_ITR;
92915f71
GR		 1211 break;
1212 case low_latency:
5f3600eb 1213 new_itr = IXGBE_20K_ITR;
92915f71
GR		 1214 break;
1215 case bulk_latency:
8a9ca110 1216 new_itr = IXGBE_12K_ITR;
92915f71 1217 break;
9ad3d6f7
ET		 1218 default:
1219 break;
92915f71
GR		 1220 }
1221
5f3600eb 1222 if (new_itr != q_vector->itr) {
92915f71 1223 /* do an exponential smoothing */
5f3600eb
AD		 1224 new_itr = (10 * new_itr * q_vector->itr) /
1225 ((9 * new_itr) + q_vector->itr);
1226
1227 /* save the algorithm value here */
1228 q_vector->itr = new_itr;
1229
1230 ixgbevf_write_eitr(q_vector);
92915f71 1231 }
92915f71
GR		 1232}
1233
4b2cd27f 1234static irqreturn_t ixgbevf_msix_other(int irq, void *data)
92915f71 1235{
fa71ae27 1236 struct ixgbevf_adapter *adapter = data;
92915f71 1237 struct ixgbe_hw *hw = &adapter->hw;
08259594 1238
4b2cd27f 1239 hw->mac.get_link_status = 1;
1e72bfc3 1240
9ac5c5cc 1241 ixgbevf_service_event_schedule(adapter);
3a2c4033 1242
5f3600eb
AD		 1243 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_other);
1244
92915f71
GR		 1245 return IRQ_HANDLED;
1246}
1247
92915f71 1248/**
fa71ae27 1249 * ixgbevf_msix_clean_rings - single unshared vector rx clean (all queues)
92915f71
GR		 1250 * @irq: unused
1251 * @data: pointer to our q_vector struct for this interrupt vector
1252 **/
fa71ae27 1253static irqreturn_t ixgbevf_msix_clean_rings(int irq, void *data)
92915f71
GR		 1254{
1255 struct ixgbevf_q_vector *q_vector = data;
92915f71 1256
5f3600eb 1257 /* EIAM disabled interrupts (on this vector) for us */
fa71ae27 1258 if (q_vector->rx.ring || q_vector->tx.ring)
ef2662b2 1259 napi_schedule_irqoff(&q_vector->napi);
92915f71
GR		 1260
1261 return IRQ_HANDLED;
1262}
1263
1264static inline void map_vector_to_rxq(struct ixgbevf_adapter *a, int v_idx,
1265 int r_idx)
1266{
1267 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
1268
87e70ab9
DS		 1269 a->rx_ring[r_idx]->next = q_vector->rx.ring;
1270 q_vector->rx.ring = a->rx_ring[r_idx];
6b43c446 1271 q_vector->rx.count++;
92915f71
GR		 1272}
1273
1274static inline void map_vector_to_txq(struct ixgbevf_adapter *a, int v_idx,
1275 int t_idx)
1276{
1277 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
1278
87e70ab9
DS		 1279 a->tx_ring[t_idx]->next = q_vector->tx.ring;
1280 q_vector->tx.ring = a->tx_ring[t_idx];
6b43c446 1281 q_vector->tx.count++;
92915f71
GR		 1282}
1283
1284/**
1285 * ixgbevf_map_rings_to_vectors - Maps descriptor rings to vectors
1286 * @adapter: board private structure to initialize
1287 *
1288 * This function maps descriptor rings to the queue-specific vectors
1289 * we were allotted through the MSI-X enabling code. Ideally, we'd have
1290 * one vector per ring/queue, but on a constrained vector budget, we
1291 * group the rings as "efficiently" as possible. You would add new
1292 * mapping configurations in here.
1293 **/
1294static int ixgbevf_map_rings_to_vectors(struct ixgbevf_adapter *adapter)
1295{
1296 int q_vectors;
1297 int v_start = 0;
1298 int rxr_idx = 0, txr_idx = 0;
1299 int rxr_remaining = adapter->num_rx_queues;
1300 int txr_remaining = adapter->num_tx_queues;
1301 int i, j;
1302 int rqpv, tqpv;
92915f71
GR		 1303
1304 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1305
dec0d8e4 1306 /* The ideal configuration...
92915f71
GR		 1307 * We have enough vectors to map one per queue.
1308 */
1309 if (q_vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
1310 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
1311 map_vector_to_rxq(adapter, v_start, rxr_idx);
1312
1313 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
1314 map_vector_to_txq(adapter, v_start, txr_idx);
50985b5f 1315 return 0;
92915f71
GR		 1316 }
1317
dec0d8e4 1318 /* If we don't have enough vectors for a 1-to-1
92915f71
GR		 1319 * mapping, we'll have to group them so there are
1320 * multiple queues per vector.
1321 */
1322 /* Re-adjusting *qpv takes care of the remainder. */
1323 for (i = v_start; i < q_vectors; i++) {
1324 rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - i);
1325 for (j = 0; j < rqpv; j++) {
1326 map_vector_to_rxq(adapter, i, rxr_idx);
1327 rxr_idx++;
1328 rxr_remaining--;
1329 }
1330 }
1331 for (i = v_start; i < q_vectors; i++) {
1332 tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - i);
1333 for (j = 0; j < tqpv; j++) {
1334 map_vector_to_txq(adapter, i, txr_idx);
1335 txr_idx++;
1336 txr_remaining--;
1337 }
1338 }
1339
50985b5f 1340 return 0;
92915f71
GR		 1341}
1342
1343/**
1344 * ixgbevf_request_msix_irqs - Initialize MSI-X interrupts
1345 * @adapter: board private structure
1346 *
1347 * ixgbevf_request_msix_irqs allocates MSI-X vectors and requests
1348 * interrupts from the kernel.
1349 **/
1350static int ixgbevf_request_msix_irqs(struct ixgbevf_adapter *adapter)
1351{
1352 struct net_device *netdev = adapter->netdev;
fa71ae27 1353 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
31f5d9b1 1354 unsigned int ri = 0, ti = 0;
fa71ae27 1355 int vector, err;
92915f71 1356
92915f71 1357 for (vector = 0; vector < q_vectors; vector++) {
fa71ae27
AD		 1358 struct ixgbevf_q_vector *q_vector = adapter->q_vector[vector];
1359 struct msix_entry *entry = &adapter->msix_entries[vector];
1360
1361 if (q_vector->tx.ring && q_vector->rx.ring) {
31f5d9b1
TN		 1362 snprintf(q_vector->name, sizeof(q_vector->name),
1363 "%s-TxRx-%u", netdev->name, ri++);
fa71ae27
AD		 1364 ti++;
1365 } else if (q_vector->rx.ring) {
31f5d9b1
TN		 1366 snprintf(q_vector->name, sizeof(q_vector->name),
1367 "%s-rx-%u", netdev->name, ri++);
fa71ae27 1368 } else if (q_vector->tx.ring) {
31f5d9b1
TN		 1369 snprintf(q_vector->name, sizeof(q_vector->name),
1370 "%s-tx-%u", netdev->name, ti++);
92915f71
GR		 1371 } else {
1372 /* skip this unused q_vector */
1373 continue;
1374 }
fa71ae27
AD		 1375 err = request_irq(entry->vector, &ixgbevf_msix_clean_rings, 0,
1376 q_vector->name, q_vector);
92915f71
GR		 1377 if (err) {
1378 hw_dbg(&adapter->hw,
dec0d8e4
JK		 1379 "request_irq failed for MSIX interrupt Error: %d\n",
1380 err);
92915f71
GR		 1381 goto free_queue_irqs;
1382 }
1383 }
1384
92915f71 1385 err = request_irq(adapter->msix_entries[vector].vector,
4b2cd27f 1386 &ixgbevf_msix_other, 0, netdev->name, adapter);
92915f71 1387 if (err) {
dec0d8e4
JK		 1388 hw_dbg(&adapter->hw, "request_irq for msix_other failed: %d\n",
1389 err);
92915f71
GR		 1390 goto free_queue_irqs;
1391 }
1392
1393 return 0;
1394
1395free_queue_irqs:
fa71ae27
AD		 1396 while (vector) {
1397 vector--;
1398 free_irq(adapter->msix_entries[vector].vector,
1399 adapter->q_vector[vector]);
1400 }
a1f6c6b1 1401 /* This failure is non-recoverable - it indicates the system is
1402 * out of MSIX vector resources and the VF driver cannot run
1403 * without them. Set the number of msix vectors to zero
1404 * indicating that not enough can be allocated. The error
1405 * will be returned to the user indicating device open failed.
1406 * Any further attempts to force the driver to open will also
1407 * fail. The only way to recover is to unload the driver and
1408 * reload it again. If the system has recovered some MSIX
1409 * vectors then it may succeed.
1410 */
1411 adapter->num_msix_vectors = 0;
92915f71
GR		 1412 return err;
1413}
1414
1415static inline void ixgbevf_reset_q_vectors(struct ixgbevf_adapter *adapter)
1416{
1417 int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1418
1419 for (i = 0; i < q_vectors; i++) {
1420 struct ixgbevf_q_vector *q_vector = adapter->q_vector[i];
dec0d8e4 1421
6b43c446
AD		 1422 q_vector->rx.ring = NULL;
1423 q_vector->tx.ring = NULL;
1424 q_vector->rx.count = 0;
1425 q_vector->tx.count = 0;
92915f71
GR		 1426 }
1427}
1428
1429/**
1430 * ixgbevf_request_irq - initialize interrupts
1431 * @adapter: board private structure
1432 *
1433 * Attempts to configure interrupts using the best available
1434 * capabilities of the hardware and kernel.
1435 **/
1436static int ixgbevf_request_irq(struct ixgbevf_adapter *adapter)
1437{
50985b5f 1438 int err = ixgbevf_request_msix_irqs(adapter);
92915f71
GR		 1439
1440 if (err)
dec0d8e4 1441 hw_dbg(&adapter->hw, "request_irq failed, Error %d\n", err);
92915f71
GR		 1442
1443 return err;
1444}
1445
1446static void ixgbevf_free_irq(struct ixgbevf_adapter *adapter)
1447{
92915f71
GR		 1448 int i, q_vectors;
1449
eeffceee
MR		 1450 if (!adapter->msix_entries)
1451 return;
1452
92915f71 1453 q_vectors = adapter->num_msix_vectors;
92915f71
GR		 1454 i = q_vectors - 1;
1455
fa71ae27 1456 free_irq(adapter->msix_entries[i].vector, adapter);
92915f71
GR		 1457 i--;
1458
1459 for (; i >= 0; i--) {
fa71ae27
AD		 1460 /* free only the irqs that were actually requested */
1461 if (!adapter->q_vector[i]->rx.ring &&
1462 !adapter->q_vector[i]->tx.ring)
1463 continue;
1464
92915f71
GR		 1465 free_irq(adapter->msix_entries[i].vector,
1466 adapter->q_vector[i]);
1467 }
1468
1469 ixgbevf_reset_q_vectors(adapter);
1470}
1471
1472/**
1473 * ixgbevf_irq_disable - Mask off interrupt generation on the NIC
1474 * @adapter: board private structure
1475 **/
1476static inline void ixgbevf_irq_disable(struct ixgbevf_adapter *adapter)
1477{
92915f71 1478 struct ixgbe_hw *hw = &adapter->hw;
5f3600eb 1479 int i;
92915f71 1480
5f3600eb 1481 IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, 0);
92915f71 1482 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, ~0);
5f3600eb 1483 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, 0);
92915f71
GR		 1484
1485 IXGBE_WRITE_FLUSH(hw);
1486
1487 for (i = 0; i < adapter->num_msix_vectors; i++)
1488 synchronize_irq(adapter->msix_entries[i].vector);
1489}
1490
1491/**
1492 * ixgbevf_irq_enable - Enable default interrupt generation settings
1493 * @adapter: board private structure
1494 **/
5f3600eb 1495static inline void ixgbevf_irq_enable(struct ixgbevf_adapter *adapter)
92915f71
GR		 1496{
1497 struct ixgbe_hw *hw = &adapter->hw;
92915f71 1498
5f3600eb
AD		 1499 IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, adapter->eims_enable_mask);
1500 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, adapter->eims_enable_mask);
1501 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_enable_mask);
92915f71
GR		 1502}
1503
de02decb
DS		 1504/**
1505 * ixgbevf_configure_tx_ring - Configure 82599 VF Tx ring after Reset
1506 * @adapter: board private structure
1507 * @ring: structure containing ring specific data
1508 *
1509 * Configure the Tx descriptor ring after a reset.
1510 **/
1511static void ixgbevf_configure_tx_ring(struct ixgbevf_adapter *adapter,
1512 struct ixgbevf_ring *ring)
1513{
1514 struct ixgbe_hw *hw = &adapter->hw;
1515 u64 tdba = ring->dma;
1516 int wait_loop = 10;
1517 u32 txdctl = IXGBE_TXDCTL_ENABLE;
1518 u8 reg_idx = ring->reg_idx;
1519
1520 /* disable queue to avoid issues while updating state */
1521 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
1522 IXGBE_WRITE_FLUSH(hw);
1523
1524 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(reg_idx), tdba & DMA_BIT_MASK(32));
1525 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAH(reg_idx), tdba >> 32);
1526 IXGBE_WRITE_REG(hw, IXGBE_VFTDLEN(reg_idx),
1527 ring->count * sizeof(union ixgbe_adv_tx_desc));
1528
1529 /* disable head writeback */
1530 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(reg_idx), 0);
1531 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(reg_idx), 0);
1532
1533 /* enable relaxed ordering */
1534 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(reg_idx),
1535 (IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1536 IXGBE_DCA_TXCTRL_DATA_RRO_EN));
1537
1538 /* reset head and tail pointers */
1539 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(reg_idx), 0);
1540 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(reg_idx), 0);
dbf8b0d8 1541 ring->tail = adapter->io_addr + IXGBE_VFTDT(reg_idx);
de02decb
DS		 1542
1543 /* reset ntu and ntc to place SW in sync with hardwdare */
1544 ring->next_to_clean = 0;
1545 ring->next_to_use = 0;
1546
1547 /* In order to avoid issues WTHRESH + PTHRESH should always be equal
1548 * to or less than the number of on chip descriptors, which is
1549 * currently 40.
1550 */
1551 txdctl |= (8 << 16); /* WTHRESH = 8 */
1552
1553 /* Setting PTHRESH to 32 both improves performance */
8d055cc0
JK		 1554 txdctl |= (1u << 8) | /* HTHRESH = 1 */
1555 32; /* PTHRESH = 32 */
de02decb 1556
e08400b7
ET		 1557 clear_bit(__IXGBEVF_HANG_CHECK_ARMED, &ring->state);
1558
de02decb
DS		 1559 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), txdctl);
1560
1561 /* poll to verify queue is enabled */
1562 do {
1563 usleep_range(1000, 2000);
1564 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(reg_idx));
1565 } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
1566 if (!wait_loop)
ee95053f 1567 hw_dbg(hw, "Could not enable Tx Queue %d\n", reg_idx);
de02decb
DS		 1568}
1569
92915f71
GR		 1570/**
1571 * ixgbevf_configure_tx - Configure 82599 VF Transmit Unit after Reset
1572 * @adapter: board private structure
1573 *
1574 * Configure the Tx unit of the MAC after a reset.
1575 **/
1576static void ixgbevf_configure_tx(struct ixgbevf_adapter *adapter)
1577{
de02decb 1578 u32 i;
92915f71
GR		 1579
1580 /* Setup the HW Tx Head and Tail descriptor pointers */
de02decb
DS		 1581 for (i = 0; i < adapter->num_tx_queues; i++)
1582 ixgbevf_configure_tx_ring(adapter, adapter->tx_ring[i]);
92915f71
GR		 1583}
1584
1585#define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1586
1587static void ixgbevf_configure_srrctl(struct ixgbevf_adapter *adapter, int index)
1588{
92915f71
GR		 1589 struct ixgbe_hw *hw = &adapter->hw;
1590 u32 srrctl;
1591
92915f71
GR		 1592 srrctl = IXGBE_SRRCTL_DROP_EN;
1593
bad17234
ET		 1594 srrctl |= IXGBEVF_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
1595 srrctl |= IXGBEVF_RX_BUFSZ >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
77d5dfca 1596 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
92915f71 1597
92915f71
GR		 1598 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(index), srrctl);
1599}
1600
1bb9c639
DS		 1601static void ixgbevf_setup_psrtype(struct ixgbevf_adapter *adapter)
1602{
1603 struct ixgbe_hw *hw = &adapter->hw;
1604
1605 /* PSRTYPE must be initialized in 82599 */
1606 u32 psrtype = IXGBE_PSRTYPE_TCPHDR | IXGBE_PSRTYPE_UDPHDR |
1607 IXGBE_PSRTYPE_IPV4HDR | IXGBE_PSRTYPE_IPV6HDR |
1608 IXGBE_PSRTYPE_L2HDR;
1609
1610 if (adapter->num_rx_queues > 1)
8d055cc0 1611 psrtype |= BIT(29);
1bb9c639
DS		 1612
1613 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, psrtype);
1614}
1615
de02decb
DS		 1616#define IXGBEVF_MAX_RX_DESC_POLL 10
1617static void ixgbevf_disable_rx_queue(struct ixgbevf_adapter *adapter,
1618 struct ixgbevf_ring *ring)
1619{
1620 struct ixgbe_hw *hw = &adapter->hw;
1621 int wait_loop = IXGBEVF_MAX_RX_DESC_POLL;
1622 u32 rxdctl;
1623 u8 reg_idx = ring->reg_idx;
1624
26597802
MR		 1625 if (IXGBE_REMOVED(hw->hw_addr))
1626 return;
de02decb
DS		 1627 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1628 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
1629
1630 /* write value back with RXDCTL.ENABLE bit cleared */
1631 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(reg_idx), rxdctl);
1632
dec0d8e4 1633 /* the hardware may take up to 100us to really disable the Rx queue */
de02decb
DS		 1634 do {
1635 udelay(10);
1636 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1637 } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
1638
1639 if (!wait_loop)
1640 pr_err("RXDCTL.ENABLE queue %d not cleared while polling\n",
1641 reg_idx);
1642}
1643
1644static void ixgbevf_rx_desc_queue_enable(struct ixgbevf_adapter *adapter,
1645 struct ixgbevf_ring *ring)
1646{
1647 struct ixgbe_hw *hw = &adapter->hw;
1648 int wait_loop = IXGBEVF_MAX_RX_DESC_POLL;
1649 u32 rxdctl;
1650 u8 reg_idx = ring->reg_idx;
1651
26597802
MR		 1652 if (IXGBE_REMOVED(hw->hw_addr))
1653 return;
de02decb
DS		 1654 do {
1655 usleep_range(1000, 2000);
1656 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1657 } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
1658
1659 if (!wait_loop)
1660 pr_err("RXDCTL.ENABLE queue %d not set while polling\n",
1661 reg_idx);
1662}
1663
e60ae003
TN		 1664/**
1665 * ixgbevf_init_rss_key - Initialize adapter RSS key
1666 * @adapter: device handle
1667 *
1668 * Allocates and initializes the RSS key if it is not allocated.
1669 **/
1670static inline int ixgbevf_init_rss_key(struct ixgbevf_adapter *adapter)
1671{
1672 u32 *rss_key;
1673
1674 if (!adapter->rss_key) {
1675 rss_key = kzalloc(IXGBEVF_RSS_HASH_KEY_SIZE, GFP_KERNEL);
1676 if (unlikely(!rss_key))
1677 return -ENOMEM;
1678
1679 netdev_rss_key_fill(rss_key, IXGBEVF_RSS_HASH_KEY_SIZE);
1680 adapter->rss_key = rss_key;
1681 }
1682
1683 return 0;
1684}
1685
9295edb4
ET		 1686static void ixgbevf_setup_vfmrqc(struct ixgbevf_adapter *adapter)
1687{
1688 struct ixgbe_hw *hw = &adapter->hw;
1689 u32 vfmrqc = 0, vfreta = 0;
9295edb4 1690 u16 rss_i = adapter->num_rx_queues;
9cba434f 1691 u8 i, j;
9295edb4
ET		 1692
1693 /* Fill out hash function seeds */
9cba434f 1694 for (i = 0; i < IXGBEVF_VFRSSRK_REGS; i++)
e60ae003 1695 IXGBE_WRITE_REG(hw, IXGBE_VFRSSRK(i), *(adapter->rss_key + i));
9295edb4 1696
9cba434f 1697 for (i = 0, j = 0; i < IXGBEVF_X550_VFRETA_SIZE; i++, j++) {
9295edb4
ET		 1698 if (j == rss_i)
1699 j = 0;
9cba434f
ET		 1700
1701 adapter->rss_indir_tbl[i] = j;
1702
1703 vfreta |= j << (i & 0x3) * 8;
1704 if ((i & 3) == 3) {
9295edb4 1705 IXGBE_WRITE_REG(hw, IXGBE_VFRETA(i >> 2), vfreta);
9cba434f
ET		 1706 vfreta = 0;
1707 }
9295edb4
ET		 1708 }
1709
1710 /* Perform hash on these packet types */
1711 vfmrqc |= IXGBE_VFMRQC_RSS_FIELD_IPV4 |
1712 IXGBE_VFMRQC_RSS_FIELD_IPV4_TCP |
1713 IXGBE_VFMRQC_RSS_FIELD_IPV6 |
1714 IXGBE_VFMRQC_RSS_FIELD_IPV6_TCP;
1715
1716 vfmrqc |= IXGBE_VFMRQC_RSSEN;
1717
1718 IXGBE_WRITE_REG(hw, IXGBE_VFMRQC, vfmrqc);
1719}
1720
de02decb
DS		 1721static void ixgbevf_configure_rx_ring(struct ixgbevf_adapter *adapter,
1722 struct ixgbevf_ring *ring)
1723{
1724 struct ixgbe_hw *hw = &adapter->hw;
1725 u64 rdba = ring->dma;
1726 u32 rxdctl;
1727 u8 reg_idx = ring->reg_idx;
1728
1729 /* disable queue to avoid issues while updating state */
1730 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1731 ixgbevf_disable_rx_queue(adapter, ring);
1732
1733 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAL(reg_idx), rdba & DMA_BIT_MASK(32));
1734 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAH(reg_idx), rdba >> 32);
1735 IXGBE_WRITE_REG(hw, IXGBE_VFRDLEN(reg_idx),
1736 ring->count * sizeof(union ixgbe_adv_rx_desc));
1737
33b0eb15 1738#ifndef CONFIG_SPARC
de02decb
DS		 1739 /* enable relaxed ordering */
1740 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(reg_idx),
1741 IXGBE_DCA_RXCTRL_DESC_RRO_EN);
33b0eb15
BM		 1742#else
1743 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(reg_idx),
1744 IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1745 IXGBE_DCA_RXCTRL_DATA_WRO_EN);
1746#endif
de02decb
DS		 1747
1748 /* reset head and tail pointers */
1749 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(reg_idx), 0);
1750 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(reg_idx), 0);
dbf8b0d8 1751 ring->tail = adapter->io_addr + IXGBE_VFRDT(reg_idx);
de02decb
DS		 1752
1753 /* reset ntu and ntc to place SW in sync with hardwdare */
1754 ring->next_to_clean = 0;
1755 ring->next_to_use = 0;
bad17234 1756 ring->next_to_alloc = 0;
de02decb
DS		 1757
1758 ixgbevf_configure_srrctl(adapter, reg_idx);
1759
bad17234
ET		 1760 /* allow any size packet since we can handle overflow */
1761 rxdctl &= ~IXGBE_RXDCTL_RLPML_EN;
1762
de02decb
DS		 1763 rxdctl |= IXGBE_RXDCTL_ENABLE | IXGBE_RXDCTL_VME;
1764 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(reg_idx), rxdctl);
1765
1766 ixgbevf_rx_desc_queue_enable(adapter, ring);
095e2617 1767 ixgbevf_alloc_rx_buffers(ring, ixgbevf_desc_unused(ring));
de02decb
DS		 1768}
1769
92915f71
GR		 1770/**
1771 * ixgbevf_configure_rx - Configure 82599 VF Receive Unit after Reset
1772 * @adapter: board private structure
1773 *
1774 * Configure the Rx unit of the MAC after a reset.
1775 **/
1776static void ixgbevf_configure_rx(struct ixgbevf_adapter *adapter)
1777{
bad17234
ET		 1778 struct ixgbe_hw *hw = &adapter->hw;
1779 struct net_device *netdev = adapter->netdev;
6a11e52b 1780 int i, ret;
92915f71 1781
1bb9c639 1782 ixgbevf_setup_psrtype(adapter);
9295edb4
ET		 1783 if (hw->mac.type >= ixgbe_mac_X550_vf)
1784 ixgbevf_setup_vfmrqc(adapter);
dd1fe113 1785
14b22cd9 1786 spin_lock_bh(&adapter->mbx_lock);
bad17234 1787 /* notify the PF of our intent to use this size of frame */
6a11e52b 1788 ret = hw->mac.ops.set_rlpml(hw, netdev->mtu + ETH_HLEN + ETH_FCS_LEN);
14b22cd9 1789 spin_unlock_bh(&adapter->mbx_lock);
6a11e52b
TN		 1790 if (ret)
1791 dev_err(&adapter->pdev->dev,
1792 "Failed to set MTU at %d\n", netdev->mtu);
92915f71 1793
92915f71 1794 /* Setup the HW Rx Head and Tail Descriptor Pointers and
dec0d8e4
JK		 1795 * the Base and Length of the Rx Descriptor Ring
1796 */
de02decb
DS		 1797 for (i = 0; i < adapter->num_rx_queues; i++)
1798 ixgbevf_configure_rx_ring(adapter, adapter->rx_ring[i]);
92915f71
GR		 1799}
1800
80d5c368
PM		 1801static int ixgbevf_vlan_rx_add_vid(struct net_device *netdev,
1802 __be16 proto, u16 vid)
92915f71
GR		 1803{
1804 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1805 struct ixgbe_hw *hw = &adapter->hw;
2ddc7fe1
AD		 1806 int err;
1807
55fdd45b 1808 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 1809
92915f71 1810 /* add VID to filter table */
2ddc7fe1 1811 err = hw->mac.ops.set_vfta(hw, vid, 0, true);
1c55ed76 1812
55fdd45b 1813 spin_unlock_bh(&adapter->mbx_lock);
1c55ed76 1814
2ddc7fe1
AD		 1815 /* translate error return types so error makes sense */
1816 if (err == IXGBE_ERR_MBX)
1817 return -EIO;
1818
1819 if (err == IXGBE_ERR_INVALID_ARGUMENT)
1820 return -EACCES;
1821
dadcd65f 1822 set_bit(vid, adapter->active_vlans);
8e586137 1823
2ddc7fe1 1824 return err;
92915f71
GR		 1825}
1826
80d5c368
PM		 1827static int ixgbevf_vlan_rx_kill_vid(struct net_device *netdev,
1828 __be16 proto, u16 vid)
92915f71
GR		 1829{
1830 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1831 struct ixgbe_hw *hw = &adapter->hw;
50985b5f 1832 int err;
92915f71 1833
55fdd45b 1834 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 1835
92915f71 1836 /* remove VID from filter table */
92fe0bf7 1837 err = hw->mac.ops.set_vfta(hw, vid, 0, false);
1c55ed76 1838
55fdd45b 1839 spin_unlock_bh(&adapter->mbx_lock);
1c55ed76 1840
dadcd65f 1841 clear_bit(vid, adapter->active_vlans);
8e586137 1842
2ddc7fe1 1843 return err;
92915f71
GR		 1844}
1845
1846static void ixgbevf_restore_vlan(struct ixgbevf_adapter *adapter)
1847{
dadcd65f 1848 u16 vid;
92915f71 1849
dadcd65f 1850 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
80d5c368
PM		 1851 ixgbevf_vlan_rx_add_vid(adapter->netdev,
1852 htons(ETH_P_8021Q), vid);
92915f71
GR		 1853}
1854
46ec20ff
GR		 1855static int ixgbevf_write_uc_addr_list(struct net_device *netdev)
1856{
1857 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1858 struct ixgbe_hw *hw = &adapter->hw;
1859 int count = 0;
1860
1861 if ((netdev_uc_count(netdev)) > 10) {
dbd9636e 1862 pr_err("Too many unicast filters - No Space\n");
46ec20ff
GR		 1863 return -ENOSPC;
1864 }
1865
1866 if (!netdev_uc_empty(netdev)) {
1867 struct netdev_hw_addr *ha;
dec0d8e4 1868
46ec20ff
GR		 1869 netdev_for_each_uc_addr(ha, netdev) {
1870 hw->mac.ops.set_uc_addr(hw, ++count, ha->addr);
1871 udelay(200);
1872 }
1873 } else {
dec0d8e4
JK		 1874 /* If the list is empty then send message to PF driver to
1875 * clear all MAC VLANs on this VF.
46ec20ff
GR		 1876 */
1877 hw->mac.ops.set_uc_addr(hw, 0, NULL);
1878 }
1879
1880 return count;
1881}
1882
92915f71 1883/**
dee847f5 1884 * ixgbevf_set_rx_mode - Multicast and unicast set
92915f71
GR		 1885 * @netdev: network interface device structure
1886 *
1887 * The set_rx_method entry point is called whenever the multicast address
dee847f5
GR		 1888 * list, unicast address list or the network interface flags are updated.
1889 * This routine is responsible for configuring the hardware for proper
1890 * multicast mode and configuring requested unicast filters.
92915f71
GR		 1891 **/
1892static void ixgbevf_set_rx_mode(struct net_device *netdev)
1893{
1894 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1895 struct ixgbe_hw *hw = &adapter->hw;
8443c1a4
HS		 1896 unsigned int flags = netdev->flags;
1897 int xcast_mode;
1898
1899 xcast_mode = (flags & IFF_ALLMULTI) ? IXGBEVF_XCAST_MODE_ALLMULTI :
1900 (flags & (IFF_BROADCAST | IFF_MULTICAST)) ?
1901 IXGBEVF_XCAST_MODE_MULTI : IXGBEVF_XCAST_MODE_NONE;
92915f71 1902
41e544cd
DS		 1903 /* request the most inclusive mode we need */
1904 if (flags & IFF_PROMISC)
1905 xcast_mode = IXGBEVF_XCAST_MODE_PROMISC;
1906 else if (flags & IFF_ALLMULTI)
1907 xcast_mode = IXGBEVF_XCAST_MODE_ALLMULTI;
1908 else if (flags & (IFF_BROADCAST | IFF_MULTICAST))
1909 xcast_mode = IXGBEVF_XCAST_MODE_MULTI;
1910 else
1911 xcast_mode = IXGBEVF_XCAST_MODE_NONE;
1912
55fdd45b 1913 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 1914
8b44a8a0 1915 hw->mac.ops.update_xcast_mode(hw, xcast_mode);
8443c1a4 1916
92915f71 1917 /* reprogram multicast list */
92fe0bf7 1918 hw->mac.ops.update_mc_addr_list(hw, netdev);
46ec20ff
GR		 1919
1920 ixgbevf_write_uc_addr_list(netdev);
1c55ed76 1921
55fdd45b 1922 spin_unlock_bh(&adapter->mbx_lock);
92915f71
GR		 1923}
1924
1925static void ixgbevf_napi_enable_all(struct ixgbevf_adapter *adapter)
1926{
1927 int q_idx;
1928 struct ixgbevf_q_vector *q_vector;
1929 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1930
1931 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
92915f71 1932 q_vector = adapter->q_vector[q_idx];
fa71ae27 1933 napi_enable(&q_vector->napi);
92915f71
GR		 1934 }
1935}
1936
1937static void ixgbevf_napi_disable_all(struct ixgbevf_adapter *adapter)
1938{
1939 int q_idx;
1940 struct ixgbevf_q_vector *q_vector;
1941 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1942
1943 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1944 q_vector = adapter->q_vector[q_idx];
92915f71
GR		 1945 napi_disable(&q_vector->napi);
1946 }
1947}
1948
220fe050
DS		 1949static int ixgbevf_configure_dcb(struct ixgbevf_adapter *adapter)
1950{
1951 struct ixgbe_hw *hw = &adapter->hw;
1952 unsigned int def_q = 0;
1953 unsigned int num_tcs = 0;
2dc571aa
ET		 1954 unsigned int num_rx_queues = adapter->num_rx_queues;
1955 unsigned int num_tx_queues = adapter->num_tx_queues;
220fe050
DS		 1956 int err;
1957
1958 spin_lock_bh(&adapter->mbx_lock);
1959
1960 /* fetch queue configuration from the PF */
1961 err = ixgbevf_get_queues(hw, &num_tcs, &def_q);
1962
1963 spin_unlock_bh(&adapter->mbx_lock);
1964
1965 if (err)
1966 return err;
1967
1968 if (num_tcs > 1) {
2dc571aa
ET		 1969 /* we need only one Tx queue */
1970 num_tx_queues = 1;
1971
220fe050 1972 /* update default Tx ring register index */
87e70ab9 1973 adapter->tx_ring[0]->reg_idx = def_q;
220fe050
DS		 1974
1975 /* we need as many queues as traffic classes */
1976 num_rx_queues = num_tcs;
1977 }
1978
1979 /* if we have a bad config abort request queue reset */
2dc571aa
ET		 1980 if ((adapter->num_rx_queues != num_rx_queues) ||
1981 (adapter->num_tx_queues != num_tx_queues)) {
220fe050
DS		 1982 /* force mailbox timeout to prevent further messages */
1983 hw->mbx.timeout = 0;
1984
1985 /* wait for watchdog to come around and bail us out */
d5dd7c3f 1986 set_bit(__IXGBEVF_QUEUE_RESET_REQUESTED, &adapter->state);
220fe050
DS		 1987 }
1988
1989 return 0;
1990}
1991
92915f71
GR		 1992static void ixgbevf_configure(struct ixgbevf_adapter *adapter)
1993{
220fe050
DS		 1994 ixgbevf_configure_dcb(adapter);
1995
de02decb 1996 ixgbevf_set_rx_mode(adapter->netdev);
92915f71
GR		 1997
1998 ixgbevf_restore_vlan(adapter);
1999
2000 ixgbevf_configure_tx(adapter);
2001 ixgbevf_configure_rx(adapter);
92915f71
GR		 2002}
2003
33bd9f60
GR		 2004static void ixgbevf_save_reset_stats(struct ixgbevf_adapter *adapter)
2005{
2006 /* Only save pre-reset stats if there are some */
2007 if (adapter->stats.vfgprc || adapter->stats.vfgptc) {
2008 adapter->stats.saved_reset_vfgprc += adapter->stats.vfgprc -
2009 adapter->stats.base_vfgprc;
2010 adapter->stats.saved_reset_vfgptc += adapter->stats.vfgptc -
2011 adapter->stats.base_vfgptc;
2012 adapter->stats.saved_reset_vfgorc += adapter->stats.vfgorc -
2013 adapter->stats.base_vfgorc;
2014 adapter->stats.saved_reset_vfgotc += adapter->stats.vfgotc -
2015 adapter->stats.base_vfgotc;
2016 adapter->stats.saved_reset_vfmprc += adapter->stats.vfmprc -
2017 adapter->stats.base_vfmprc;
2018 }
2019}
2020
2021static void ixgbevf_init_last_counter_stats(struct ixgbevf_adapter *adapter)
2022{
2023 struct ixgbe_hw *hw = &adapter->hw;
2024
2025 adapter->stats.last_vfgprc = IXGBE_READ_REG(hw, IXGBE_VFGPRC);
2026 adapter->stats.last_vfgorc = IXGBE_READ_REG(hw, IXGBE_VFGORC_LSB);
2027 adapter->stats.last_vfgorc |=
2028 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGORC_MSB))) << 32);
2029 adapter->stats.last_vfgptc = IXGBE_READ_REG(hw, IXGBE_VFGPTC);
2030 adapter->stats.last_vfgotc = IXGBE_READ_REG(hw, IXGBE_VFGOTC_LSB);
2031 adapter->stats.last_vfgotc |=
2032 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGOTC_MSB))) << 32);
2033 adapter->stats.last_vfmprc = IXGBE_READ_REG(hw, IXGBE_VFMPRC);
2034
2035 adapter->stats.base_vfgprc = adapter->stats.last_vfgprc;
2036 adapter->stats.base_vfgorc = adapter->stats.last_vfgorc;
2037 adapter->stats.base_vfgptc = adapter->stats.last_vfgptc;
2038 adapter->stats.base_vfgotc = adapter->stats.last_vfgotc;
2039 adapter->stats.base_vfmprc = adapter->stats.last_vfmprc;
2040}
2041
31186785
AD		 2042static void ixgbevf_negotiate_api(struct ixgbevf_adapter *adapter)
2043{
2044 struct ixgbe_hw *hw = &adapter->hw;
41e544cd
DS		 2045 int api[] = { ixgbe_mbox_api_13,
2046 ixgbe_mbox_api_12,
94cf66f8 2047 ixgbe_mbox_api_11,
56e94095 2048 ixgbe_mbox_api_10,
31186785 2049 ixgbe_mbox_api_unknown };
50985b5f 2050 int err, idx = 0;
31186785 2051
55fdd45b 2052 spin_lock_bh(&adapter->mbx_lock);
31186785
AD		 2053
2054 while (api[idx] != ixgbe_mbox_api_unknown) {
2f8214fe 2055 err = hw->mac.ops.negotiate_api_version(hw, api[idx]);
31186785
AD		 2056 if (!err)
2057 break;
2058 idx++;
2059 }
2060
55fdd45b 2061 spin_unlock_bh(&adapter->mbx_lock);
31186785
AD		 2062}
2063
795180d8 2064static void ixgbevf_up_complete(struct ixgbevf_adapter *adapter)
92915f71
GR		 2065{
2066 struct net_device *netdev = adapter->netdev;
2067 struct ixgbe_hw *hw = &adapter->hw;
92915f71
GR		 2068
2069 ixgbevf_configure_msix(adapter);
2070
55fdd45b 2071 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 2072
92fe0bf7
GR		 2073 if (is_valid_ether_addr(hw->mac.addr))
2074 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
2075 else
2076 hw->mac.ops.set_rar(hw, 0, hw->mac.perm_addr, 0);
92915f71 2077
55fdd45b 2078 spin_unlock_bh(&adapter->mbx_lock);
1c55ed76 2079
4e857c58 2080 smp_mb__before_atomic();
92915f71
GR		 2081 clear_bit(__IXGBEVF_DOWN, &adapter->state);
2082 ixgbevf_napi_enable_all(adapter);
2083
d9bdb57f
ET		 2084 /* clear any pending interrupts, may auto mask */
2085 IXGBE_READ_REG(hw, IXGBE_VTEICR);
2086 ixgbevf_irq_enable(adapter);
2087
92915f71
GR		 2088 /* enable transmits */
2089 netif_tx_start_all_queues(netdev);
2090
33bd9f60
GR		 2091 ixgbevf_save_reset_stats(adapter);
2092 ixgbevf_init_last_counter_stats(adapter);
2093
4b2cd27f 2094 hw->mac.get_link_status = 1;
9ac5c5cc 2095 mod_timer(&adapter->service_timer, jiffies);
92915f71
GR		 2096}
2097
795180d8 2098void ixgbevf_up(struct ixgbevf_adapter *adapter)
92915f71 2099{
92915f71
GR		 2100 ixgbevf_configure(adapter);
2101
795180d8 2102 ixgbevf_up_complete(adapter);
92915f71
GR		 2103}
2104
2105/**
2106 * ixgbevf_clean_rx_ring - Free Rx Buffers per Queue
92915f71
GR		 2107 * @rx_ring: ring to free buffers from
2108 **/
05d063aa 2109static void ixgbevf_clean_rx_ring(struct ixgbevf_ring *rx_ring)
92915f71 2110{
bad17234 2111 struct device *dev = rx_ring->dev;
92915f71
GR		 2112 unsigned long size;
2113 unsigned int i;
2114
bad17234
ET		 2115 /* Free Rx ring sk_buff */
2116 if (rx_ring->skb) {
2117 dev_kfree_skb(rx_ring->skb);
2118 rx_ring->skb = NULL;
2119 }
2120
2121 /* ring already cleared, nothing to do */
c0456c23
GR		 2122 if (!rx_ring->rx_buffer_info)
2123 return;
92915f71 2124
bad17234 2125 /* Free all the Rx ring pages */
92915f71 2126 for (i = 0; i < rx_ring->count; i++) {
bad17234 2127 struct ixgbevf_rx_buffer *rx_buffer;
92915f71 2128
bad17234
ET		 2129 rx_buffer = &rx_ring->rx_buffer_info[i];
2130 if (rx_buffer->dma)
2131 dma_unmap_page(dev, rx_buffer->dma,
2132 PAGE_SIZE, DMA_FROM_DEVICE);
2133 rx_buffer->dma = 0;
2134 if (rx_buffer->page)
2135 __free_page(rx_buffer->page);
2136 rx_buffer->page = NULL;
92915f71
GR		 2137 }
2138
2139 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
2140 memset(rx_ring->rx_buffer_info, 0, size);
2141
2142 /* Zero out the descriptor ring */
2143 memset(rx_ring->desc, 0, rx_ring->size);
92915f71
GR		 2144}
2145
2146/**
2147 * ixgbevf_clean_tx_ring - Free Tx Buffers
92915f71
GR		 2148 * @tx_ring: ring to be cleaned
2149 **/
05d063aa 2150static void ixgbevf_clean_tx_ring(struct ixgbevf_ring *tx_ring)
92915f71
GR		 2151{
2152 struct ixgbevf_tx_buffer *tx_buffer_info;
2153 unsigned long size;
2154 unsigned int i;
2155
c0456c23
GR		 2156 if (!tx_ring->tx_buffer_info)
2157 return;
2158
92915f71 2159 /* Free all the Tx ring sk_buffs */
92915f71
GR		 2160 for (i = 0; i < tx_ring->count; i++) {
2161 tx_buffer_info = &tx_ring->tx_buffer_info[i];
70a10e25 2162 ixgbevf_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
92915f71
GR		 2163 }
2164
2165 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
2166 memset(tx_ring->tx_buffer_info, 0, size);
2167
2168 memset(tx_ring->desc, 0, tx_ring->size);
92915f71
GR		 2169}
2170
2171/**
2172 * ixgbevf_clean_all_rx_rings - Free Rx Buffers for all queues
2173 * @adapter: board private structure
2174 **/
2175static void ixgbevf_clean_all_rx_rings(struct ixgbevf_adapter *adapter)
2176{
2177 int i;
2178
2179 for (i = 0; i < adapter->num_rx_queues; i++)
05d063aa 2180 ixgbevf_clean_rx_ring(adapter->rx_ring[i]);
92915f71
GR		 2181}
2182
2183/**
2184 * ixgbevf_clean_all_tx_rings - Free Tx Buffers for all queues
2185 * @adapter: board private structure
2186 **/
2187static void ixgbevf_clean_all_tx_rings(struct ixgbevf_adapter *adapter)
2188{
2189 int i;
2190
2191 for (i = 0; i < adapter->num_tx_queues; i++)
05d063aa 2192 ixgbevf_clean_tx_ring(adapter->tx_ring[i]);
92915f71
GR		 2193}
2194
2195void ixgbevf_down(struct ixgbevf_adapter *adapter)
2196{
2197 struct net_device *netdev = adapter->netdev;
2198 struct ixgbe_hw *hw = &adapter->hw;
de02decb 2199 int i;
92915f71
GR		 2200
2201 /* signal that we are down to the interrupt handler */
5b346dc9
MR		 2202 if (test_and_set_bit(__IXGBEVF_DOWN, &adapter->state))
2203 return; /* do nothing if already down */
858c3dda 2204
dec0d8e4 2205 /* disable all enabled Rx queues */
858c3dda 2206 for (i = 0; i < adapter->num_rx_queues; i++)
87e70ab9 2207 ixgbevf_disable_rx_queue(adapter, adapter->rx_ring[i]);
92915f71 2208
d9bdb57f 2209 usleep_range(10000, 20000);
92915f71
GR		 2210
2211 netif_tx_stop_all_queues(netdev);
2212
d9bdb57f
ET		 2213 /* call carrier off first to avoid false dev_watchdog timeouts */
2214 netif_carrier_off(netdev);
2215 netif_tx_disable(netdev);
2216
92915f71
GR		 2217 ixgbevf_irq_disable(adapter);
2218
2219 ixgbevf_napi_disable_all(adapter);
2220
9ac5c5cc 2221 del_timer_sync(&adapter->service_timer);
92915f71
GR		 2222
2223 /* disable transmits in the hardware now that interrupts are off */
2224 for (i = 0; i < adapter->num_tx_queues; i++) {
de02decb
DS		 2225 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
2226
2227 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx),
2228 IXGBE_TXDCTL_SWFLSH);
92915f71
GR		 2229 }
2230
92915f71
GR		 2231 if (!pci_channel_offline(adapter->pdev))
2232 ixgbevf_reset(adapter);
2233
2234 ixgbevf_clean_all_tx_rings(adapter);
2235 ixgbevf_clean_all_rx_rings(adapter);
2236}
2237
2238void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter)
2239{
2240 WARN_ON(in_interrupt());
c0456c23 2241
92915f71
GR		 2242 while (test_and_set_bit(__IXGBEVF_RESETTING, &adapter->state))
2243 msleep(1);
2244
4b2cd27f
AD		 2245 ixgbevf_down(adapter);
2246 ixgbevf_up(adapter);
92915f71
GR		 2247
2248 clear_bit(__IXGBEVF_RESETTING, &adapter->state);
2249}
2250
2251void ixgbevf_reset(struct ixgbevf_adapter *adapter)
2252{
2253 struct ixgbe_hw *hw = &adapter->hw;
2254 struct net_device *netdev = adapter->netdev;
2255
798e381a 2256 if (hw->mac.ops.reset_hw(hw)) {
92915f71 2257 hw_dbg(hw, "PF still resetting\n");
798e381a 2258 } else {
92915f71 2259 hw->mac.ops.init_hw(hw);
798e381a
DS		 2260 ixgbevf_negotiate_api(adapter);
2261 }
92915f71
GR		 2262
2263 if (is_valid_ether_addr(adapter->hw.mac.addr)) {
91a76baa
ET		 2264 ether_addr_copy(netdev->dev_addr, adapter->hw.mac.addr);
2265 ether_addr_copy(netdev->perm_addr, adapter->hw.mac.addr);
92915f71 2266 }
e66c92ad
ET		 2267
2268 adapter->last_reset = jiffies;
92915f71
GR		 2269}
2270
e45dd5fe
JK		 2271static int ixgbevf_acquire_msix_vectors(struct ixgbevf_adapter *adapter,
2272 int vectors)
92915f71 2273{
a5f9337b 2274 int vector_threshold;
92915f71 2275
fa71ae27
AD		 2276 /* We'll want at least 2 (vector_threshold):
2277 * 1) TxQ[0] + RxQ[0] handler
2278 * 2) Other (Link Status Change, etc.)
92915f71
GR		 2279 */
2280 vector_threshold = MIN_MSIX_COUNT;
2281
2282 /* The more we get, the more we will assign to Tx/Rx Cleanup
2283 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
2284 * Right now, we simply care about how many we'll get; we'll
2285 * set them up later while requesting irq's.
2286 */
5c1e3588
AG		 2287 vectors = pci_enable_msix_range(adapter->pdev, adapter->msix_entries,
2288 vector_threshold, vectors);
92915f71 2289
5c1e3588 2290 if (vectors < 0) {
e45dd5fe
JK		 2291 dev_err(&adapter->pdev->dev,
2292 "Unable to allocate MSI-X interrupts\n");
92915f71
GR		 2293 kfree(adapter->msix_entries);
2294 adapter->msix_entries = NULL;
5c1e3588 2295 return vectors;
92915f71 2296 }
dee847f5 2297
5c1e3588
AG		 2298 /* Adjust for only the vectors we'll use, which is minimum
2299 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
2300 * vectors we were allocated.
2301 */
2302 adapter->num_msix_vectors = vectors;
2303
2304 return 0;
92915f71
GR		 2305}
2306
49ce9c2c
BH		 2307/**
2308 * ixgbevf_set_num_queues - Allocate queues for device, feature dependent
92915f71
GR		 2309 * @adapter: board private structure to initialize
2310 *
2311 * This is the top level queue allocation routine. The order here is very
2312 * important, starting with the "most" number of features turned on at once,
2313 * and ending with the smallest set of features. This way large combinations
2314 * can be allocated if they're turned on, and smaller combinations are the
2315 * fallthrough conditions.
2316 *
2317 **/
2318static void ixgbevf_set_num_queues(struct ixgbevf_adapter *adapter)
2319{
220fe050
DS		 2320 struct ixgbe_hw *hw = &adapter->hw;
2321 unsigned int def_q = 0;
2322 unsigned int num_tcs = 0;
2323 int err;
2324
92915f71
GR		 2325 /* Start with base case */
2326 adapter->num_rx_queues = 1;
2327 adapter->num_tx_queues = 1;
220fe050
DS		 2328
2329 spin_lock_bh(&adapter->mbx_lock);
2330
2331 /* fetch queue configuration from the PF */
2332 err = ixgbevf_get_queues(hw, &num_tcs, &def_q);
2333
2334 spin_unlock_bh(&adapter->mbx_lock);
2335
2336 if (err)
2337 return;
2338
2339 /* we need as many queues as traffic classes */
2dc571aa 2340 if (num_tcs > 1) {
220fe050 2341 adapter->num_rx_queues = num_tcs;
2dc571aa
ET		 2342 } else {
2343 u16 rss = min_t(u16, num_online_cpus(), IXGBEVF_MAX_RSS_QUEUES);
2344
2345 switch (hw->api_version) {
2346 case ixgbe_mbox_api_11:
94cf66f8 2347 case ixgbe_mbox_api_12:
41e544cd 2348 case ixgbe_mbox_api_13:
2dc571aa
ET		 2349 adapter->num_rx_queues = rss;
2350 adapter->num_tx_queues = rss;
2351 default:
2352 break;
2353 }
2354 }
92915f71
GR		 2355}
2356
2357/**
2358 * ixgbevf_alloc_queues - Allocate memory for all rings
2359 * @adapter: board private structure to initialize
2360 *
2361 * We allocate one ring per queue at run-time since we don't know the
2362 * number of queues at compile-time. The polling_netdev array is
2363 * intended for Multiqueue, but should work fine with a single queue.
2364 **/
2365static int ixgbevf_alloc_queues(struct ixgbevf_adapter *adapter)
2366{
87e70ab9
DS		 2367 struct ixgbevf_ring *ring;
2368 int rx = 0, tx = 0;
92915f71 2369
87e70ab9
DS		 2370 for (; tx < adapter->num_tx_queues; tx++) {
2371 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
2372 if (!ring)
2373 goto err_allocation;
92915f71 2374
87e70ab9
DS		 2375 ring->dev = &adapter->pdev->dev;
2376 ring->netdev = adapter->netdev;
2377 ring->count = adapter->tx_ring_count;
2378 ring->queue_index = tx;
2379 ring->reg_idx = tx;
92915f71 2380
87e70ab9 2381 adapter->tx_ring[tx] = ring;
92915f71
GR		 2382 }
2383
87e70ab9
DS		 2384 for (; rx < adapter->num_rx_queues; rx++) {
2385 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
2386 if (!ring)
2387 goto err_allocation;
2388
2389 ring->dev = &adapter->pdev->dev;
2390 ring->netdev = adapter->netdev;
2391
2392 ring->count = adapter->rx_ring_count;
2393 ring->queue_index = rx;
2394 ring->reg_idx = rx;
2395
2396 adapter->rx_ring[rx] = ring;
92915f71
GR		 2397 }
2398
2399 return 0;
2400
87e70ab9
DS		 2401err_allocation:
2402 while (tx) {
2403 kfree(adapter->tx_ring[--tx]);
2404 adapter->tx_ring[tx] = NULL;
2405 }
2406
2407 while (rx) {
2408 kfree(adapter->rx_ring[--rx]);
2409 adapter->rx_ring[rx] = NULL;
2410 }
92915f71
GR		 2411 return -ENOMEM;
2412}
2413
2414/**
2415 * ixgbevf_set_interrupt_capability - set MSI-X or FAIL if not supported
2416 * @adapter: board private structure to initialize
2417 *
2418 * Attempt to configure the interrupts using the best available
2419 * capabilities of the hardware and the kernel.
2420 **/
2421static int ixgbevf_set_interrupt_capability(struct ixgbevf_adapter *adapter)
2422{
91e2b89b 2423 struct net_device *netdev = adapter->netdev;
50985b5f 2424 int err;
92915f71
GR		 2425 int vector, v_budget;
2426
dec0d8e4 2427 /* It's easy to be greedy for MSI-X vectors, but it really
92915f71
GR		 2428 * doesn't do us much good if we have a lot more vectors
2429 * than CPU's. So let's be conservative and only ask for
fa71ae27
AD		 2430 * (roughly) the same number of vectors as there are CPU's.
2431 * The default is to use pairs of vectors.
92915f71 2432 */
fa71ae27
AD		 2433 v_budget = max(adapter->num_rx_queues, adapter->num_tx_queues);
2434 v_budget = min_t(int, v_budget, num_online_cpus());
2435 v_budget += NON_Q_VECTORS;
92915f71
GR		 2436
2437 /* A failure in MSI-X entry allocation isn't fatal, but it does
dec0d8e4
JK		 2438 * mean we disable MSI-X capabilities of the adapter.
2439 */
92915f71
GR		 2440 adapter->msix_entries = kcalloc(v_budget,
2441 sizeof(struct msix_entry), GFP_KERNEL);
50985b5f
MR		 2442 if (!adapter->msix_entries)
2443 return -ENOMEM;
92915f71
GR		 2444
2445 for (vector = 0; vector < v_budget; vector++)
2446 adapter->msix_entries[vector].entry = vector;
2447
e45dd5fe
JK		 2448 err = ixgbevf_acquire_msix_vectors(adapter, v_budget);
2449 if (err)
50985b5f 2450 return err;
92915f71 2451
91e2b89b
GR		 2452 err = netif_set_real_num_tx_queues(netdev, adapter->num_tx_queues);
2453 if (err)
50985b5f 2454 return err;
91e2b89b 2455
50985b5f 2456 return netif_set_real_num_rx_queues(netdev, adapter->num_rx_queues);
92915f71
GR		 2457}
2458
2459/**
2460 * ixgbevf_alloc_q_vectors - Allocate memory for interrupt vectors
2461 * @adapter: board private structure to initialize
2462 *
2463 * We allocate one q_vector per queue interrupt. If allocation fails we
2464 * return -ENOMEM.
2465 **/
2466static int ixgbevf_alloc_q_vectors(struct ixgbevf_adapter *adapter)
2467{
2468 int q_idx, num_q_vectors;
2469 struct ixgbevf_q_vector *q_vector;
92915f71
GR		 2470
2471 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
92915f71
GR		 2472
2473 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
2474 q_vector = kzalloc(sizeof(struct ixgbevf_q_vector), GFP_KERNEL);
2475 if (!q_vector)
2476 goto err_out;
2477 q_vector->adapter = adapter;
2478 q_vector->v_idx = q_idx;
fa71ae27
AD		 2479 netif_napi_add(adapter->netdev, &q_vector->napi,
2480 ixgbevf_poll, 64);
92915f71
GR		 2481 adapter->q_vector[q_idx] = q_vector;
2482 }
2483
2484 return 0;
2485
2486err_out:
2487 while (q_idx) {
2488 q_idx--;
2489 q_vector = adapter->q_vector[q_idx];
c777cdfa
JK		 2490#ifdef CONFIG_NET_RX_BUSY_POLL
2491 napi_hash_del(&q_vector->napi);
2492#endif
92915f71
GR		 2493 netif_napi_del(&q_vector->napi);
2494 kfree(q_vector);
2495 adapter->q_vector[q_idx] = NULL;
2496 }
2497 return -ENOMEM;
2498}
2499
2500/**
2501 * ixgbevf_free_q_vectors - Free memory allocated for interrupt vectors
2502 * @adapter: board private structure to initialize
2503 *
2504 * This function frees the memory allocated to the q_vectors. In addition if
2505 * NAPI is enabled it will delete any references to the NAPI struct prior
2506 * to freeing the q_vector.
2507 **/
2508static void ixgbevf_free_q_vectors(struct ixgbevf_adapter *adapter)
2509{
f4477702 2510 int q_idx, num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
92915f71
GR		 2511
2512 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
2513 struct ixgbevf_q_vector *q_vector = adapter->q_vector[q_idx];
2514
2515 adapter->q_vector[q_idx] = NULL;
c777cdfa
JK		 2516#ifdef CONFIG_NET_RX_BUSY_POLL
2517 napi_hash_del(&q_vector->napi);
2518#endif
f4477702 2519 netif_napi_del(&q_vector->napi);
92915f71
GR		 2520 kfree(q_vector);
2521 }
2522}
2523
2524/**
2525 * ixgbevf_reset_interrupt_capability - Reset MSIX setup
2526 * @adapter: board private structure
2527 *
2528 **/
2529static void ixgbevf_reset_interrupt_capability(struct ixgbevf_adapter *adapter)
2530{
eeffceee
MR		 2531 if (!adapter->msix_entries)
2532 return;
2533
92915f71
GR		 2534 pci_disable_msix(adapter->pdev);
2535 kfree(adapter->msix_entries);
2536 adapter->msix_entries = NULL;
92915f71
GR		 2537}
2538
2539/**
2540 * ixgbevf_init_interrupt_scheme - Determine if MSIX is supported and init
2541 * @adapter: board private structure to initialize
2542 *
2543 **/
2544static int ixgbevf_init_interrupt_scheme(struct ixgbevf_adapter *adapter)
2545{
2546 int err;
2547
2548 /* Number of supported queues */
2549 ixgbevf_set_num_queues(adapter);
2550
2551 err = ixgbevf_set_interrupt_capability(adapter);
2552 if (err) {
2553 hw_dbg(&adapter->hw,
2554 "Unable to setup interrupt capabilities\n");
2555 goto err_set_interrupt;
2556 }
2557
2558 err = ixgbevf_alloc_q_vectors(adapter);
2559 if (err) {
dec0d8e4 2560 hw_dbg(&adapter->hw, "Unable to allocate memory for queue vectors\n");
92915f71
GR		 2561 goto err_alloc_q_vectors;
2562 }
2563
2564 err = ixgbevf_alloc_queues(adapter);
2565 if (err) {
dbd9636e 2566 pr_err("Unable to allocate memory for queues\n");
92915f71
GR		 2567 goto err_alloc_queues;
2568 }
2569
dec0d8e4 2570 hw_dbg(&adapter->hw, "Multiqueue %s: Rx Queue count = %u, Tx Queue count = %u\n",
92915f71
GR		 2571 (adapter->num_rx_queues > 1) ? "Enabled" :
2572 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
2573
2574 set_bit(__IXGBEVF_DOWN, &adapter->state);
2575
2576 return 0;
2577err_alloc_queues:
2578 ixgbevf_free_q_vectors(adapter);
2579err_alloc_q_vectors:
2580 ixgbevf_reset_interrupt_capability(adapter);
2581err_set_interrupt:
2582 return err;
2583}
2584
0ac1e8ce
AD		 2585/**
2586 * ixgbevf_clear_interrupt_scheme - Clear the current interrupt scheme settings
2587 * @adapter: board private structure to clear interrupt scheme on
2588 *
2589 * We go through and clear interrupt specific resources and reset the structure
2590 * to pre-load conditions
2591 **/
2592static void ixgbevf_clear_interrupt_scheme(struct ixgbevf_adapter *adapter)
2593{
87e70ab9
DS		 2594 int i;
2595
2596 for (i = 0; i < adapter->num_tx_queues; i++) {
2597 kfree(adapter->tx_ring[i]);
2598 adapter->tx_ring[i] = NULL;
2599 }
2600 for (i = 0; i < adapter->num_rx_queues; i++) {
2601 kfree(adapter->rx_ring[i]);
2602 adapter->rx_ring[i] = NULL;
2603 }
2604
0ac1e8ce
AD		 2605 adapter->num_tx_queues = 0;
2606 adapter->num_rx_queues = 0;
2607
2608 ixgbevf_free_q_vectors(adapter);
2609 ixgbevf_reset_interrupt_capability(adapter);
2610}
2611
92915f71
GR		 2612/**
2613 * ixgbevf_sw_init - Initialize general software structures
92915f71
GR		 2614 * @adapter: board private structure to initialize
2615 *
2616 * ixgbevf_sw_init initializes the Adapter private data structure.
2617 * Fields are initialized based on PCI device information and
2618 * OS network device settings (MTU size).
2619 **/
9f9a12f8 2620static int ixgbevf_sw_init(struct ixgbevf_adapter *adapter)
92915f71
GR		 2621{
2622 struct ixgbe_hw *hw = &adapter->hw;
2623 struct pci_dev *pdev = adapter->pdev;
e1941a74 2624 struct net_device *netdev = adapter->netdev;
92915f71
GR		 2625 int err;
2626
2627 /* PCI config space info */
92915f71
GR		 2628 hw->vendor_id = pdev->vendor;
2629 hw->device_id = pdev->device;
ff938e43 2630 hw->revision_id = pdev->revision;
92915f71
GR		 2631 hw->subsystem_vendor_id = pdev->subsystem_vendor;
2632 hw->subsystem_device_id = pdev->subsystem_device;
2633
2634 hw->mbx.ops.init_params(hw);
56e94095 2635
e60ae003
TN		 2636 if (hw->mac.type >= ixgbe_mac_X550_vf) {
2637 err = ixgbevf_init_rss_key(adapter);
2638 if (err)
2639 goto out;
2640 }
2641
56e94095
AD		 2642 /* assume legacy case in which PF would only give VF 2 queues */
2643 hw->mac.max_tx_queues = 2;
2644 hw->mac.max_rx_queues = 2;
2645
798e381a
DS		 2646 /* lock to protect mailbox accesses */
2647 spin_lock_init(&adapter->mbx_lock);
2648
92915f71
GR		 2649 err = hw->mac.ops.reset_hw(hw);
2650 if (err) {
2651 dev_info(&pdev->dev,
e1941a74 2652 "PF still in reset state. Is the PF interface up?\n");
92915f71
GR		 2653 } else {
2654 err = hw->mac.ops.init_hw(hw);
2655 if (err) {
dbd9636e 2656 pr_err("init_shared_code failed: %d\n", err);
92915f71
GR		 2657 goto out;
2658 }
798e381a 2659 ixgbevf_negotiate_api(adapter);
e1941a74
GR		 2660 err = hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
2661 if (err)
2662 dev_info(&pdev->dev, "Error reading MAC address\n");
2663 else if (is_zero_ether_addr(adapter->hw.mac.addr))
2664 dev_info(&pdev->dev,
2665 "MAC address not assigned by administrator.\n");
91a76baa 2666 ether_addr_copy(netdev->dev_addr, hw->mac.addr);
e1941a74
GR		 2667 }
2668
2669 if (!is_valid_ether_addr(netdev->dev_addr)) {
2670 dev_info(&pdev->dev, "Assigning random MAC address\n");
2671 eth_hw_addr_random(netdev);
91a76baa 2672 ether_addr_copy(hw->mac.addr, netdev->dev_addr);
465fc643 2673 ether_addr_copy(hw->mac.perm_addr, netdev->dev_addr);
92915f71
GR		 2674 }
2675
2676 /* Enable dynamic interrupt throttling rates */
5f3600eb
AD		 2677 adapter->rx_itr_setting = 1;
2678 adapter->tx_itr_setting = 1;
92915f71 2679
92915f71
GR		 2680 /* set default ring sizes */
2681 adapter->tx_ring_count = IXGBEVF_DEFAULT_TXD;
2682 adapter->rx_ring_count = IXGBEVF_DEFAULT_RXD;
2683
92915f71 2684 set_bit(__IXGBEVF_DOWN, &adapter->state);
1a0d6ae5 2685 return 0;
92915f71
GR		 2686
2687out:
2688 return err;
2689}
2690
92915f71
GR		 2691#define UPDATE_VF_COUNTER_32bit(reg, last_counter, counter) \
2692 { \
2693 u32 current_counter = IXGBE_READ_REG(hw, reg); \
2694 if (current_counter < last_counter) \
2695 counter += 0x100000000LL; \
2696 last_counter = current_counter; \
2697 counter &= 0xFFFFFFFF00000000LL; \
2698 counter |= current_counter; \
2699 }
2700
2701#define UPDATE_VF_COUNTER_36bit(reg_lsb, reg_msb, last_counter, counter) \
2702 { \
2703 u64 current_counter_lsb = IXGBE_READ_REG(hw, reg_lsb); \
2704 u64 current_counter_msb = IXGBE_READ_REG(hw, reg_msb); \
dec0d8e4
JK		 2705 u64 current_counter = (current_counter_msb << 32) | \
2706 current_counter_lsb; \
92915f71
GR		 2707 if (current_counter < last_counter) \
2708 counter += 0x1000000000LL; \
2709 last_counter = current_counter; \
2710 counter &= 0xFFFFFFF000000000LL; \
2711 counter |= current_counter; \
2712 }
2713/**
2714 * ixgbevf_update_stats - Update the board statistics counters.
2715 * @adapter: board private structure
2716 **/
2717void ixgbevf_update_stats(struct ixgbevf_adapter *adapter)
2718{
2719 struct ixgbe_hw *hw = &adapter->hw;
55fb277c 2720 int i;
92915f71 2721
e66c92ad
ET		 2722 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
2723 test_bit(__IXGBEVF_RESETTING, &adapter->state))
088245a3
GR		 2724 return;
2725
92915f71
GR		 2726 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPRC, adapter->stats.last_vfgprc,
2727 adapter->stats.vfgprc);
2728 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPTC, adapter->stats.last_vfgptc,
2729 adapter->stats.vfgptc);
2730 UPDATE_VF_COUNTER_36bit(IXGBE_VFGORC_LSB, IXGBE_VFGORC_MSB,
2731 adapter->stats.last_vfgorc,
2732 adapter->stats.vfgorc);
2733 UPDATE_VF_COUNTER_36bit(IXGBE_VFGOTC_LSB, IXGBE_VFGOTC_MSB,
2734 adapter->stats.last_vfgotc,
2735 adapter->stats.vfgotc);
2736 UPDATE_VF_COUNTER_32bit(IXGBE_VFMPRC, adapter->stats.last_vfmprc,
2737 adapter->stats.vfmprc);
55fb277c
GR		 2738
2739 for (i = 0; i < adapter->num_rx_queues; i++) {
2740 adapter->hw_csum_rx_error +=
87e70ab9 2741 adapter->rx_ring[i]->hw_csum_rx_error;
87e70ab9 2742 adapter->rx_ring[i]->hw_csum_rx_error = 0;
55fb277c 2743 }
92915f71
GR		 2744}
2745
2746/**
9ac5c5cc 2747 * ixgbevf_service_timer - Timer Call-back
92915f71
GR		 2748 * @data: pointer to adapter cast into an unsigned long
2749 **/
9ac5c5cc 2750static void ixgbevf_service_timer(unsigned long data)
92915f71
GR		 2751{
2752 struct ixgbevf_adapter *adapter = (struct ixgbevf_adapter *)data;
e66c92ad 2753
9ac5c5cc
ET		 2754 /* Reset the timer */
2755 mod_timer(&adapter->service_timer, (HZ * 2) + jiffies);
2756
2757 ixgbevf_service_event_schedule(adapter);
e66c92ad
ET		 2758}
2759
9ac5c5cc 2760static void ixgbevf_reset_subtask(struct ixgbevf_adapter *adapter)
e66c92ad 2761{
d5dd7c3f 2762 if (!test_and_clear_bit(__IXGBEVF_RESET_REQUESTED, &adapter->state))
9ac5c5cc 2763 return;
e66c92ad 2764
e66c92ad
ET		 2765 /* If we're already down or resetting, just bail */
2766 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
6e469ed0 2767 test_bit(__IXGBEVF_REMOVING, &adapter->state) ||
e66c92ad
ET		 2768 test_bit(__IXGBEVF_RESETTING, &adapter->state))
2769 return;
2770
2771 adapter->tx_timeout_count++;
2772
8e8247ab 2773 rtnl_lock();
e66c92ad 2774 ixgbevf_reinit_locked(adapter);
8e8247ab 2775 rtnl_unlock();
e66c92ad
ET		 2776}
2777
dec0d8e4
JK		 2778/**
2779 * ixgbevf_check_hang_subtask - check for hung queues and dropped interrupts
2780 * @adapter: pointer to the device adapter structure
e66c92ad
ET		 2781 *
2782 * This function serves two purposes. First it strobes the interrupt lines
2783 * in order to make certain interrupts are occurring. Secondly it sets the
2784 * bits needed to check for TX hangs. As a result we should immediately
2785 * determine if a hang has occurred.
dec0d8e4 2786 **/
e66c92ad
ET		 2787static void ixgbevf_check_hang_subtask(struct ixgbevf_adapter *adapter)
2788{
92915f71 2789 struct ixgbe_hw *hw = &adapter->hw;
5f3600eb 2790 u32 eics = 0;
92915f71
GR		 2791 int i;
2792
e66c92ad
ET		 2793 /* If we're down or resetting, just bail */
2794 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
2795 test_bit(__IXGBEVF_RESETTING, &adapter->state))
2796 return;
92915f71 2797
e08400b7
ET		 2798 /* Force detection of hung controller */
2799 if (netif_carrier_ok(adapter->netdev)) {
2800 for (i = 0; i < adapter->num_tx_queues; i++)
2801 set_check_for_tx_hang(adapter->tx_ring[i]);
2802 }
2803
dec0d8e4 2804 /* get one bit for every active Tx/Rx interrupt vector */
92915f71
GR		 2805 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
2806 struct ixgbevf_q_vector *qv = adapter->q_vector[i];
9ac5c5cc 2807
6b43c446 2808 if (qv->rx.ring || qv->tx.ring)
8d055cc0 2809 eics |= BIT(i);
92915f71
GR		 2810 }
2811
e66c92ad 2812 /* Cause software interrupt to ensure rings are cleaned */
5f3600eb 2813 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, eics);
e66c92ad 2814}
92915f71 2815
e66c92ad
ET		 2816/**
2817 * ixgbevf_watchdog_update_link - update the link status
dec0d8e4 2818 * @adapter: pointer to the device adapter structure
e66c92ad
ET		 2819 **/
2820static void ixgbevf_watchdog_update_link(struct ixgbevf_adapter *adapter)
2821{
2822 struct ixgbe_hw *hw = &adapter->hw;
2823 u32 link_speed = adapter->link_speed;
2824 bool link_up = adapter->link_up;
2825 s32 err;
2826
2827 spin_lock_bh(&adapter->mbx_lock);
2828
2829 err = hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
2830
2831 spin_unlock_bh(&adapter->mbx_lock);
2832
2833 /* if check for link returns error we will need to reset */
2834 if (err && time_after(jiffies, adapter->last_reset + (10 * HZ))) {
d5dd7c3f 2835 set_bit(__IXGBEVF_RESET_REQUESTED, &adapter->state);
e66c92ad
ET		 2836 link_up = false;
2837 }
2838
2839 adapter->link_up = link_up;
2840 adapter->link_speed = link_speed;
92915f71
GR		 2841}
2842
e66c92ad
ET		 2843/**
2844 * ixgbevf_watchdog_link_is_up - update netif_carrier status and
2845 * print link up message
dec0d8e4 2846 * @adapter: pointer to the device adapter structure
e66c92ad
ET		 2847 **/
2848static void ixgbevf_watchdog_link_is_up(struct ixgbevf_adapter *adapter)
92915f71 2849{
e66c92ad 2850 struct net_device *netdev = adapter->netdev;
92915f71 2851
e66c92ad
ET		 2852 /* only continue if link was previously down */
2853 if (netif_carrier_ok(netdev))
92915f71
GR		 2854 return;
2855
e66c92ad
ET		 2856 dev_info(&adapter->pdev->dev, "NIC Link is Up %s\n",
2857 (adapter->link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
2858 "10 Gbps" :
2859 (adapter->link_speed == IXGBE_LINK_SPEED_1GB_FULL) ?
2860 "1 Gbps" :
2861 (adapter->link_speed == IXGBE_LINK_SPEED_100_FULL) ?
2862 "100 Mbps" :
2863 "unknown speed");
92915f71 2864
e66c92ad
ET		 2865 netif_carrier_on(netdev);
2866}
2867
2868/**
2869 * ixgbevf_watchdog_link_is_down - update netif_carrier status and
2870 * print link down message
dec0d8e4 2871 * @adapter: pointer to the adapter structure
e66c92ad
ET		 2872 **/
2873static void ixgbevf_watchdog_link_is_down(struct ixgbevf_adapter *adapter)
2874{
2875 struct net_device *netdev = adapter->netdev;
2876
2877 adapter->link_speed = 0;
2878
2879 /* only continue if link was up previously */
2880 if (!netif_carrier_ok(netdev))
2881 return;
2882
2883 dev_info(&adapter->pdev->dev, "NIC Link is Down\n");
2884
2885 netif_carrier_off(netdev);
92915f71
GR		 2886}
2887
2888/**
9ac5c5cc
ET		 2889 * ixgbevf_watchdog_subtask - worker thread to bring link up
2890 * @work: pointer to work_struct containing our data
2891 **/
2892static void ixgbevf_watchdog_subtask(struct ixgbevf_adapter *adapter)
2893{
2894 /* if interface is down do nothing */
2895 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
2896 test_bit(__IXGBEVF_RESETTING, &adapter->state))
2897 return;
2898
2899 ixgbevf_watchdog_update_link(adapter);
2900
2901 if (adapter->link_up)
2902 ixgbevf_watchdog_link_is_up(adapter);
2903 else
2904 ixgbevf_watchdog_link_is_down(adapter);
2905
2906 ixgbevf_update_stats(adapter);
2907}
2908
2909/**
2910 * ixgbevf_service_task - manages and runs subtasks
92915f71
GR		 2911 * @work: pointer to work_struct containing our data
2912 **/
9ac5c5cc 2913static void ixgbevf_service_task(struct work_struct *work)
92915f71
GR		 2914{
2915 struct ixgbevf_adapter *adapter = container_of(work,
2916 struct ixgbevf_adapter,
9ac5c5cc 2917 service_task);
92915f71 2918 struct ixgbe_hw *hw = &adapter->hw;
92915f71 2919
26597802
MR		 2920 if (IXGBE_REMOVED(hw->hw_addr)) {
2921 if (!test_bit(__IXGBEVF_DOWN, &adapter->state)) {
2922 rtnl_lock();
2923 ixgbevf_down(adapter);
2924 rtnl_unlock();
2925 }
2926 return;
2927 }
e66c92ad 2928
220fe050 2929 ixgbevf_queue_reset_subtask(adapter);
9ac5c5cc
ET		 2930 ixgbevf_reset_subtask(adapter);
2931 ixgbevf_watchdog_subtask(adapter);
e66c92ad
ET		 2932 ixgbevf_check_hang_subtask(adapter);
2933
9ac5c5cc 2934 ixgbevf_service_event_complete(adapter);
92915f71
GR		 2935}
2936
2937/**
2938 * ixgbevf_free_tx_resources - Free Tx Resources per Queue
92915f71
GR		 2939 * @tx_ring: Tx descriptor ring for a specific queue
2940 *
2941 * Free all transmit software resources
2942 **/
05d063aa 2943void ixgbevf_free_tx_resources(struct ixgbevf_ring *tx_ring)
92915f71 2944{
05d063aa 2945 ixgbevf_clean_tx_ring(tx_ring);
92915f71
GR		 2946
2947 vfree(tx_ring->tx_buffer_info);
2948 tx_ring->tx_buffer_info = NULL;
2949
de02decb
DS		 2950 /* if not set, then don't free */
2951 if (!tx_ring->desc)
2952 return;
2953
05d063aa 2954 dma_free_coherent(tx_ring->dev, tx_ring->size, tx_ring->desc,
2a1f8794 2955 tx_ring->dma);
92915f71
GR		 2956
2957 tx_ring->desc = NULL;
2958}
2959
2960/**
2961 * ixgbevf_free_all_tx_resources - Free Tx Resources for All Queues
2962 * @adapter: board private structure
2963 *
2964 * Free all transmit software resources
2965 **/
2966static void ixgbevf_free_all_tx_resources(struct ixgbevf_adapter *adapter)
2967{
2968 int i;
2969
2970 for (i = 0; i < adapter->num_tx_queues; i++)
87e70ab9 2971 if (adapter->tx_ring[i]->desc)
05d063aa 2972 ixgbevf_free_tx_resources(adapter->tx_ring[i]);
92915f71
GR		 2973}
2974
2975/**
2976 * ixgbevf_setup_tx_resources - allocate Tx resources (Descriptors)
dec0d8e4 2977 * @tx_ring: Tx descriptor ring (for a specific queue) to setup
92915f71
GR		 2978 *
2979 * Return 0 on success, negative on failure
2980 **/
05d063aa 2981int ixgbevf_setup_tx_resources(struct ixgbevf_ring *tx_ring)
92915f71 2982{
4ad6af02 2983 struct ixgbevf_adapter *adapter = netdev_priv(tx_ring->netdev);
92915f71
GR		 2984 int size;
2985
2986 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
89bf67f1 2987 tx_ring->tx_buffer_info = vzalloc(size);
92915f71
GR		 2988 if (!tx_ring->tx_buffer_info)
2989 goto err;
92915f71 2990
7c3a4626
FF		 2991 u64_stats_init(&tx_ring->syncp);
2992
92915f71
GR		 2993 /* round up to nearest 4K */
2994 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
2995 tx_ring->size = ALIGN(tx_ring->size, 4096);
2996
05d063aa 2997 tx_ring->desc = dma_alloc_coherent(tx_ring->dev, tx_ring->size,
2a1f8794 2998 &tx_ring->dma, GFP_KERNEL);
92915f71
GR		 2999 if (!tx_ring->desc)
3000 goto err;
3001
92915f71
GR		 3002 return 0;
3003
3004err:
3005 vfree(tx_ring->tx_buffer_info);
3006 tx_ring->tx_buffer_info = NULL;
dec0d8e4 3007 hw_dbg(&adapter->hw, "Unable to allocate memory for the transmit descriptor ring\n");
92915f71
GR		 3008 return -ENOMEM;
3009}
3010
3011/**
3012 * ixgbevf_setup_all_tx_resources - allocate all queues Tx resources
3013 * @adapter: board private structure
3014 *
3015 * If this function returns with an error, then it's possible one or
3016 * more of the rings is populated (while the rest are not). It is the
3017 * callers duty to clean those orphaned rings.
3018 *
3019 * Return 0 on success, negative on failure
3020 **/
3021static int ixgbevf_setup_all_tx_resources(struct ixgbevf_adapter *adapter)
3022{
3023 int i, err = 0;
3024
3025 for (i = 0; i < adapter->num_tx_queues; i++) {
05d063aa 3026 err = ixgbevf_setup_tx_resources(adapter->tx_ring[i]);
92915f71
GR		 3027 if (!err)
3028 continue;
dec0d8e4 3029 hw_dbg(&adapter->hw, "Allocation for Tx Queue %u failed\n", i);
92915f71
GR		 3030 break;
3031 }
3032
3033 return err;
3034}
3035
3036/**
3037 * ixgbevf_setup_rx_resources - allocate Rx resources (Descriptors)
dec0d8e4 3038 * @rx_ring: Rx descriptor ring (for a specific queue) to setup
92915f71
GR		 3039 *
3040 * Returns 0 on success, negative on failure
3041 **/
05d063aa 3042int ixgbevf_setup_rx_resources(struct ixgbevf_ring *rx_ring)
92915f71 3043{
92915f71
GR		 3044 int size;
3045
3046 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
89bf67f1 3047 rx_ring->rx_buffer_info = vzalloc(size);
e404decb 3048 if (!rx_ring->rx_buffer_info)
05d063aa 3049 goto err;
92915f71 3050
7c3a4626
FF		 3051 u64_stats_init(&rx_ring->syncp);
3052
92915f71
GR		 3053 /* Round up to nearest 4K */
3054 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
3055 rx_ring->size = ALIGN(rx_ring->size, 4096);
3056
05d063aa 3057 rx_ring->desc = dma_alloc_coherent(rx_ring->dev, rx_ring->size,
2a1f8794 3058 &rx_ring->dma, GFP_KERNEL);
92915f71 3059
05d063aa
ET		 3060 if (!rx_ring->desc)
3061 goto err;
92915f71 3062
92915f71 3063 return 0;
05d063aa
ET		 3064err:
3065 vfree(rx_ring->rx_buffer_info);
3066 rx_ring->rx_buffer_info = NULL;
3067 dev_err(rx_ring->dev, "Unable to allocate memory for the Rx descriptor ring\n");
92915f71
GR		 3068 return -ENOMEM;
3069}
3070
3071/**
3072 * ixgbevf_setup_all_rx_resources - allocate all queues Rx resources
3073 * @adapter: board private structure
3074 *
3075 * If this function returns with an error, then it's possible one or
3076 * more of the rings is populated (while the rest are not). It is the
3077 * callers duty to clean those orphaned rings.
3078 *
3079 * Return 0 on success, negative on failure
3080 **/
3081static int ixgbevf_setup_all_rx_resources(struct ixgbevf_adapter *adapter)
3082{
3083 int i, err = 0;
3084
3085 for (i = 0; i < adapter->num_rx_queues; i++) {
05d063aa 3086 err = ixgbevf_setup_rx_resources(adapter->rx_ring[i]);
92915f71
GR		 3087 if (!err)
3088 continue;
dec0d8e4 3089 hw_dbg(&adapter->hw, "Allocation for Rx Queue %u failed\n", i);
92915f71
GR		 3090 break;
3091 }
3092 return err;
3093}
3094
3095/**
3096 * ixgbevf_free_rx_resources - Free Rx Resources
92915f71
GR		 3097 * @rx_ring: ring to clean the resources from
3098 *
3099 * Free all receive software resources
3100 **/
05d063aa 3101void ixgbevf_free_rx_resources(struct ixgbevf_ring *rx_ring)
92915f71 3102{
05d063aa 3103 ixgbevf_clean_rx_ring(rx_ring);
92915f71
GR		 3104
3105 vfree(rx_ring->rx_buffer_info);
3106 rx_ring->rx_buffer_info = NULL;
3107
05d063aa 3108 dma_free_coherent(rx_ring->dev, rx_ring->size, rx_ring->desc,
2a1f8794 3109 rx_ring->dma);
92915f71
GR		 3110
3111 rx_ring->desc = NULL;
3112}
3113
3114/**
3115 * ixgbevf_free_all_rx_resources - Free Rx Resources for All Queues
3116 * @adapter: board private structure
3117 *
3118 * Free all receive software resources
3119 **/
3120static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter)
3121{
3122 int i;
3123
3124 for (i = 0; i < adapter->num_rx_queues; i++)
87e70ab9 3125 if (adapter->rx_ring[i]->desc)
05d063aa 3126 ixgbevf_free_rx_resources(adapter->rx_ring[i]);
92915f71
GR		 3127}
3128
3129/**
3130 * ixgbevf_open - Called when a network interface is made active
3131 * @netdev: network interface device structure
3132 *
3133 * Returns 0 on success, negative value on failure
3134 *
3135 * The open entry point is called when a network interface is made
3136 * active by the system (IFF_UP). At this point all resources needed
3137 * for transmit and receive operations are allocated, the interrupt
3138 * handler is registered with the OS, the watchdog timer is started,
3139 * and the stack is notified that the interface is ready.
3140 **/
324d0867 3141int ixgbevf_open(struct net_device *netdev)
92915f71
GR		 3142{
3143 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3144 struct ixgbe_hw *hw = &adapter->hw;
3145 int err;
3146
a1f6c6b1 3147 /* A previous failure to open the device because of a lack of
3148 * available MSIX vector resources may have reset the number
3149 * of msix vectors variable to zero. The only way to recover
3150 * is to unload/reload the driver and hope that the system has
3151 * been able to recover some MSIX vector resources.
3152 */
3153 if (!adapter->num_msix_vectors)
3154 return -ENOMEM;
3155
92915f71
GR		 3156 if (hw->adapter_stopped) {
3157 ixgbevf_reset(adapter);
3158 /* if adapter is still stopped then PF isn't up and
dec0d8e4
JK		 3159 * the VF can't start.
3160 */
92915f71
GR		 3161 if (hw->adapter_stopped) {
3162 err = IXGBE_ERR_MBX;
dec0d8e4 3163 pr_err("Unable to start - perhaps the PF Driver isn't up yet\n");
92915f71
GR		 3164 goto err_setup_reset;
3165 }
3166 }
3167
d9bdb57f
ET		 3168 /* disallow open during test */
3169 if (test_bit(__IXGBEVF_TESTING, &adapter->state))
3170 return -EBUSY;
3171
3172 netif_carrier_off(netdev);
3173
92915f71
GR		 3174 /* allocate transmit descriptors */
3175 err = ixgbevf_setup_all_tx_resources(adapter);
3176 if (err)
3177 goto err_setup_tx;
3178
3179 /* allocate receive descriptors */
3180 err = ixgbevf_setup_all_rx_resources(adapter);
3181 if (err)
3182 goto err_setup_rx;
3183
3184 ixgbevf_configure(adapter);
3185
dec0d8e4 3186 /* Map the Tx/Rx rings to the vectors we were allotted.
92915f71
GR		 3187 * if request_irq will be called in this function map_rings
3188 * must be called *before* up_complete
3189 */
3190 ixgbevf_map_rings_to_vectors(adapter);
3191
92915f71
GR		 3192 err = ixgbevf_request_irq(adapter);
3193 if (err)
3194 goto err_req_irq;
3195
d9bdb57f 3196 ixgbevf_up_complete(adapter);
92915f71
GR		 3197
3198 return 0;
3199
3200err_req_irq:
3201 ixgbevf_down(adapter);
92915f71
GR		 3202err_setup_rx:
3203 ixgbevf_free_all_rx_resources(adapter);
3204err_setup_tx:
3205 ixgbevf_free_all_tx_resources(adapter);
3206 ixgbevf_reset(adapter);
3207
3208err_setup_reset:
3209
3210 return err;
3211}
3212
b19cf6ee
ET		 3213/**
3214 * ixgbevf_close_suspend - actions necessary to both suspend and close flows
3215 * @adapter: the private adapter struct
3216 *
3217 * This function should contain the necessary work common to both suspending
3218 * and closing of the device.
3219 */
3220static void ixgbevf_close_suspend(struct ixgbevf_adapter *adapter)
3221{
3222 ixgbevf_down(adapter);
3223 ixgbevf_free_irq(adapter);
3224 ixgbevf_free_all_tx_resources(adapter);
3225 ixgbevf_free_all_rx_resources(adapter);
3226}
3227
92915f71
GR		 3228/**
3229 * ixgbevf_close - Disables a network interface
3230 * @netdev: network interface device structure
3231 *
3232 * Returns 0, this is not allowed to fail
3233 *
3234 * The close entry point is called when an interface is de-activated
3235 * by the OS. The hardware is still under the drivers control, but
3236 * needs to be disabled. A global MAC reset is issued to stop the
3237 * hardware, and all transmit and receive resources are freed.
3238 **/
324d0867 3239int ixgbevf_close(struct net_device *netdev)
92915f71
GR		 3240{
3241 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3242
b19cf6ee
ET		 3243 if (netif_device_present(netdev))
3244 ixgbevf_close_suspend(adapter);
92915f71
GR		 3245
3246 return 0;
3247}
3248
220fe050
DS		 3249static void ixgbevf_queue_reset_subtask(struct ixgbevf_adapter *adapter)
3250{
3251 struct net_device *dev = adapter->netdev;
3252
d5dd7c3f
ET		 3253 if (!test_and_clear_bit(__IXGBEVF_QUEUE_RESET_REQUESTED,
3254 &adapter->state))
220fe050
DS		 3255 return;
3256
220fe050
DS		 3257 /* if interface is down do nothing */
3258 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
3259 test_bit(__IXGBEVF_RESETTING, &adapter->state))
3260 return;
3261
3262 /* Hardware has to reinitialize queues and interrupts to
3263 * match packet buffer alignment. Unfortunately, the
3264 * hardware is not flexible enough to do this dynamically.
3265 */
2dad7b27
ET		 3266 rtnl_lock();
3267
220fe050
DS		 3268 if (netif_running(dev))
3269 ixgbevf_close(dev);
3270
3271 ixgbevf_clear_interrupt_scheme(adapter);
3272 ixgbevf_init_interrupt_scheme(adapter);
3273
3274 if (netif_running(dev))
3275 ixgbevf_open(dev);
2dad7b27
ET		 3276
3277 rtnl_unlock();
220fe050
DS		 3278}
3279
70a10e25
AD		 3280static void ixgbevf_tx_ctxtdesc(struct ixgbevf_ring *tx_ring,
3281 u32 vlan_macip_lens, u32 type_tucmd,
3282 u32 mss_l4len_idx)
92915f71
GR		 3283{
3284 struct ixgbe_adv_tx_context_desc *context_desc;
70a10e25 3285 u16 i = tx_ring->next_to_use;
92915f71 3286
70a10e25 3287 context_desc = IXGBEVF_TX_CTXTDESC(tx_ring, i);
92915f71 3288
70a10e25
AD		 3289 i++;
3290 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
92915f71 3291
70a10e25
AD		 3292 /* set bits to identify this as an advanced context descriptor */
3293 type_tucmd |= IXGBE_TXD_CMD_DEXT | IXGBE_ADVTXD_DTYP_CTXT;
92915f71 3294
70a10e25
AD		 3295 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
3296 context_desc->seqnum_seed = 0;
3297 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd);
3298 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
3299}
3300
3301static int ixgbevf_tso(struct ixgbevf_ring *tx_ring,
7ad1a093
ET		 3302 struct ixgbevf_tx_buffer *first,
3303 u8 *hdr_len)
70a10e25 3304{
b83e3010 3305 u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
7ad1a093 3306 struct sk_buff *skb = first->skb;
b83e3010
AD		 3307 union {
3308 struct iphdr *v4;
3309 struct ipv6hdr *v6;
3310 unsigned char *hdr;
3311 } ip;
3312 union {
3313 struct tcphdr *tcp;
3314 unsigned char *hdr;
3315 } l4;
3316 u32 paylen, l4_offset;
8f12c034 3317 int err;
70a10e25 3318
01a545cf
ET		 3319 if (skb->ip_summed != CHECKSUM_PARTIAL)
3320 return 0;
3321
70a10e25
AD		 3322 if (!skb_is_gso(skb))
3323 return 0;
92915f71 3324
8f12c034
FR		 3325 err = skb_cow_head(skb, 0);
3326 if (err < 0)
3327 return err;
92915f71 3328
2a20525b
SP		 3329 if (eth_p_mpls(first->protocol))
3330 ip.hdr = skb_inner_network_header(skb);
3331 else
3332 ip.hdr = skb_network_header(skb);
b83e3010
AD		 3333 l4.hdr = skb_checksum_start(skb);
3334
70a10e25
AD		 3335 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
3336 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
3337
b83e3010
AD		 3338 /* initialize outer IP header fields */
3339 if (ip.v4->version == 4) {
c54cdc31
AD		 3340 unsigned char *csum_start = skb_checksum_start(skb);
3341 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
3342
b83e3010
AD		 3343 /* IP header will have to cancel out any data that
3344 * is not a part of the outer IP header
3345 */
c54cdc31
AD		 3346 ip.v4->check = csum_fold(csum_partial(trans_start,
3347 csum_start - trans_start,
3348 0));
70a10e25 3349 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
b83e3010
AD		 3350
3351 ip.v4->tot_len = 0;
7ad1a093
ET		 3352 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
3353 IXGBE_TX_FLAGS_CSUM |
3354 IXGBE_TX_FLAGS_IPV4;
b83e3010
AD		 3355 } else {
3356 ip.v6->payload_len = 0;
7ad1a093
ET		 3357 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
3358 IXGBE_TX_FLAGS_CSUM;
70a10e25
AD		 3359 }
3360
b83e3010
AD		 3361 /* determine offset of inner transport header */
3362 l4_offset = l4.hdr - skb->data;
3363
3364 /* compute length of segmentation header */
3365 *hdr_len = (l4.tcp->doff * 4) + l4_offset;
70a10e25 3366
b83e3010
AD		 3367 /* remove payload length from inner checksum */
3368 paylen = skb->len - l4_offset;
3369 csum_replace_by_diff(&l4.tcp->check, htonl(paylen));
3370
3371 /* update gso size and bytecount with header size */
7ad1a093
ET		 3372 first->gso_segs = skb_shinfo(skb)->gso_segs;
3373 first->bytecount += (first->gso_segs - 1) * *hdr_len;
3374
70a10e25 3375 /* mss_l4len_id: use 1 as index for TSO */
b83e3010 3376 mss_l4len_idx = (*hdr_len - l4_offset) << IXGBE_ADVTXD_L4LEN_SHIFT;
70a10e25 3377 mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
8d055cc0 3378 mss_l4len_idx |= (1u << IXGBE_ADVTXD_IDX_SHIFT);
70a10e25
AD		 3379
3380 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
b83e3010
AD		 3381 vlan_macip_lens = l4.hdr - ip.hdr;
3382 vlan_macip_lens |= (ip.hdr - skb->data) << IXGBE_ADVTXD_MACLEN_SHIFT;
7ad1a093 3383 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
70a10e25
AD		 3384
3385 ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens,
3386 type_tucmd, mss_l4len_idx);
3387
3388 return 1;
92915f71
GR		 3389}
3390
cb2b3edb
AD		 3391static inline bool ixgbevf_ipv6_csum_is_sctp(struct sk_buff *skb)
3392{
3393 unsigned int offset = 0;
3394
3395 ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
3396
3397 return offset == skb_checksum_start_offset(skb);
3398}
3399
7ad1a093
ET		 3400static void ixgbevf_tx_csum(struct ixgbevf_ring *tx_ring,
3401 struct ixgbevf_tx_buffer *first)
92915f71 3402{
7ad1a093 3403 struct sk_buff *skb = first->skb;
70a10e25 3404 u32 vlan_macip_lens = 0;
70a10e25 3405 u32 type_tucmd = 0;
92915f71 3406
cb2b3edb
AD		 3407 if (skb->ip_summed != CHECKSUM_PARTIAL)
3408 goto no_csum;
92915f71 3409
cb2b3edb
AD		 3410 switch (skb->csum_offset) {
3411 case offsetof(struct tcphdr, check):
3412 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
3413 /* fall through */
3414 case offsetof(struct udphdr, check):
3415 break;
3416 case offsetof(struct sctphdr, checksum):
3417 /* validate that this is actually an SCTP request */
3418 if (((first->protocol == htons(ETH_P_IP)) &&
3419 (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
3420 ((first->protocol == htons(ETH_P_IPV6)) &&
3421 ixgbevf_ipv6_csum_is_sctp(skb))) {
3422 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_SCTP;
70a10e25 3423 break;
70a10e25 3424 }
cb2b3edb
AD		 3425 /* fall through */
3426 default:
3427 skb_checksum_help(skb);
3428 goto no_csum;
92915f71 3429 }
cb2b3edb
AD		 3430 /* update TX checksum flag */
3431 first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
3432 vlan_macip_lens = skb_checksum_start_offset(skb) -
3433 skb_network_offset(skb);
d34a614a 3434no_csum:
70a10e25
AD		 3435 /* vlan_macip_lens: MACLEN, VLAN tag */
3436 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
7ad1a093 3437 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
70a10e25 3438
cb2b3edb 3439 ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, 0);
92915f71
GR		 3440}
3441
29d37fa1 3442static __le32 ixgbevf_tx_cmd_type(u32 tx_flags)
92915f71 3443{
29d37fa1
ET		 3444 /* set type for advanced descriptor with frame checksum insertion */
3445 __le32 cmd_type = cpu_to_le32(IXGBE_ADVTXD_DTYP_DATA |
3446 IXGBE_ADVTXD_DCMD_IFCS |
3447 IXGBE_ADVTXD_DCMD_DEXT);
92915f71 3448
dec0d8e4 3449 /* set HW VLAN bit if VLAN is present */
29d37fa1
ET		 3450 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3451 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_VLE);
92915f71 3452
29d37fa1
ET		 3453 /* set segmentation enable bits for TSO/FSO */
3454 if (tx_flags & IXGBE_TX_FLAGS_TSO)
3455 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_TSE);
92915f71 3456
29d37fa1
ET		 3457 return cmd_type;
3458}
92915f71 3459
29d37fa1
ET		 3460static void ixgbevf_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
3461 u32 tx_flags, unsigned int paylen)
3462{
3463 __le32 olinfo_status = cpu_to_le32(paylen << IXGBE_ADVTXD_PAYLEN_SHIFT);
9bdfefd2 3464
29d37fa1
ET		 3465 /* enable L4 checksum for TSO and TX checksum offload */
3466 if (tx_flags & IXGBE_TX_FLAGS_CSUM)
3467 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_TXSM);
92915f71 3468
29d37fa1
ET		 3469 /* enble IPv4 checksum for TSO */
3470 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
3471 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_IXSM);
92915f71 3472
29d37fa1
ET		 3473 /* use index 1 context for TSO/FSO/FCOE */
3474 if (tx_flags & IXGBE_TX_FLAGS_TSO)
8d055cc0 3475 olinfo_status |= cpu_to_le32(1u << IXGBE_ADVTXD_IDX_SHIFT);
92915f71 3476
29d37fa1
ET		 3477 /* Check Context must be set if Tx switch is enabled, which it
3478 * always is for case where virtual functions are running
3479 */
3480 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_CC);
92915f71 3481
29d37fa1
ET		 3482 tx_desc->read.olinfo_status = olinfo_status;
3483}
92915f71 3484
29d37fa1
ET		 3485static void ixgbevf_tx_map(struct ixgbevf_ring *tx_ring,
3486 struct ixgbevf_tx_buffer *first,
3487 const u8 hdr_len)
3488{
3489 dma_addr_t dma;
3490 struct sk_buff *skb = first->skb;
3491 struct ixgbevf_tx_buffer *tx_buffer;
3492 union ixgbe_adv_tx_desc *tx_desc;
3493 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
3494 unsigned int data_len = skb->data_len;
3495 unsigned int size = skb_headlen(skb);
3496 unsigned int paylen = skb->len - hdr_len;
3497 u32 tx_flags = first->tx_flags;
3498 __le32 cmd_type;
3499 u16 i = tx_ring->next_to_use;
9bdfefd2 3500
29d37fa1 3501 tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
92915f71 3502
29d37fa1
ET		 3503 ixgbevf_tx_olinfo_status(tx_desc, tx_flags, paylen);
3504 cmd_type = ixgbevf_tx_cmd_type(tx_flags);
7ad1a093 3505
29d37fa1
ET		 3506 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
3507 if (dma_mapping_error(tx_ring->dev, dma))
3508 goto dma_error;
92915f71 3509
29d37fa1
ET		 3510 /* record length, and DMA address */
3511 dma_unmap_len_set(first, len, size);
3512 dma_unmap_addr_set(first, dma, dma);
92915f71 3513
29d37fa1 3514 tx_desc->read.buffer_addr = cpu_to_le64(dma);
92915f71 3515
29d37fa1
ET		 3516 for (;;) {
3517 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
3518 tx_desc->read.cmd_type_len =
3519 cmd_type | cpu_to_le32(IXGBE_MAX_DATA_PER_TXD);
92915f71 3520
29d37fa1
ET		 3521 i++;
3522 tx_desc++;
3523 if (i == tx_ring->count) {
3524 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
3525 i = 0;
3526 }
92915f71 3527
29d37fa1
ET		 3528 dma += IXGBE_MAX_DATA_PER_TXD;
3529 size -= IXGBE_MAX_DATA_PER_TXD;
92915f71 3530
29d37fa1
ET		 3531 tx_desc->read.buffer_addr = cpu_to_le64(dma);
3532 tx_desc->read.olinfo_status = 0;
3533 }
92915f71 3534
29d37fa1
ET		 3535 if (likely(!data_len))
3536 break;
92915f71 3537
29d37fa1 3538 tx_desc->read.cmd_type_len = cmd_type | cpu_to_le32(size);
92915f71 3539
29d37fa1
ET		 3540 i++;
3541 tx_desc++;
3542 if (i == tx_ring->count) {
3543 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
3544 i = 0;
3545 }
92915f71 3546
29d37fa1
ET		 3547 size = skb_frag_size(frag);
3548 data_len -= size;
92915f71 3549
29d37fa1
ET		 3550 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
3551 DMA_TO_DEVICE);
3552 if (dma_mapping_error(tx_ring->dev, dma))
3553 goto dma_error;
70a10e25 3554
29d37fa1
ET		 3555 tx_buffer = &tx_ring->tx_buffer_info[i];
3556 dma_unmap_len_set(tx_buffer, len, size);
3557 dma_unmap_addr_set(tx_buffer, dma, dma);
92915f71 3558
29d37fa1
ET		 3559 tx_desc->read.buffer_addr = cpu_to_le64(dma);
3560 tx_desc->read.olinfo_status = 0;
3561
3562 frag++;
70a10e25 3563 }
92915f71 3564
29d37fa1
ET		 3565 /* write last descriptor with RS and EOP bits */
3566 cmd_type |= cpu_to_le32(size) | cpu_to_le32(IXGBE_TXD_CMD);
3567 tx_desc->read.cmd_type_len = cmd_type;
3568
3569 /* set the timestamp */
3570 first->time_stamp = jiffies;
3571
3572 /* Force memory writes to complete before letting h/w know there
3573 * are new descriptors to fetch. (Only applicable for weak-ordered
3574 * memory model archs, such as IA-64).
3575 *
3576 * We also need this memory barrier (wmb) to make certain all of the
3577 * status bits have been updated before next_to_watch is written.
70a10e25 3578 */
29d37fa1 3579 wmb();
92915f71 3580
29d37fa1
ET		 3581 /* set next_to_watch value indicating a packet is present */
3582 first->next_to_watch = tx_desc;
92915f71 3583
29d37fa1
ET		 3584 i++;
3585 if (i == tx_ring->count)
3586 i = 0;
9bdfefd2 3587
29d37fa1 3588 tx_ring->next_to_use = i;
92915f71 3589
29d37fa1 3590 /* notify HW of packet */
06380db6 3591 ixgbevf_write_tail(tx_ring, i);
29d37fa1
ET		 3592
3593 return;
3594dma_error:
3595 dev_err(tx_ring->dev, "TX DMA map failed\n");
3596
3597 /* clear dma mappings for failed tx_buffer_info map */
3598 for (;;) {
3599 tx_buffer = &tx_ring->tx_buffer_info[i];
3600 ixgbevf_unmap_and_free_tx_resource(tx_ring, tx_buffer);
3601 if (tx_buffer == first)
3602 break;
3603 if (i == 0)
3604 i = tx_ring->count;
3605 i--;
3606 }
92915f71 3607
92915f71 3608 tx_ring->next_to_use = i;
92915f71
GR		 3609}
3610
fb40195c 3611static int __ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
92915f71 3612{
fb40195c 3613 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
92915f71
GR		 3614 /* Herbert's original patch had:
3615 * smp_mb__after_netif_stop_queue();
dec0d8e4
JK		 3616 * but since that doesn't exist yet, just open code it.
3617 */
92915f71
GR		 3618 smp_mb();
3619
3620 /* We need to check again in a case another CPU has just
dec0d8e4
JK		 3621 * made room available.
3622 */
f880d07b 3623 if (likely(ixgbevf_desc_unused(tx_ring) < size))
92915f71
GR		 3624 return -EBUSY;
3625
3626 /* A reprieve! - use start_queue because it doesn't call schedule */
fb40195c 3627 netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
095e2617
ET		 3628 ++tx_ring->tx_stats.restart_queue;
3629
92915f71
GR		 3630 return 0;
3631}
3632
fb40195c 3633static int ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
92915f71 3634{
f880d07b 3635 if (likely(ixgbevf_desc_unused(tx_ring) >= size))
92915f71 3636 return 0;
fb40195c 3637 return __ixgbevf_maybe_stop_tx(tx_ring, size);
92915f71
GR		 3638}
3639
3640static int ixgbevf_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3641{
3642 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
7ad1a093 3643 struct ixgbevf_tx_buffer *first;
92915f71 3644 struct ixgbevf_ring *tx_ring;
7ad1a093
ET		 3645 int tso;
3646 u32 tx_flags = 0;
3595990a
AD		 3647 u16 count = TXD_USE_COUNT(skb_headlen(skb));
3648#if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
3649 unsigned short f;
3650#endif
7ad1a093 3651 u8 hdr_len = 0;
f9d08f16 3652 u8 *dst_mac = skb_header_pointer(skb, 0, 0, NULL);
7ad1a093 3653
46acc460 3654 if (!dst_mac || is_link_local_ether_addr(dst_mac)) {
e7fcd543 3655 dev_kfree_skb_any(skb);
f9d08f16
GR		 3656 return NETDEV_TX_OK;
3657 }
92915f71 3658
7ad1a093 3659 tx_ring = adapter->tx_ring[skb->queue_mapping];
92915f71 3660
dec0d8e4 3661 /* need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
3595990a
AD		 3662 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
3663 * + 2 desc gap to keep tail from touching head,
3664 * + 1 desc for context descriptor,
3665 * otherwise try next time
3666 */
3667#if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
3668 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
3669 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
3670#else
3671 count += skb_shinfo(skb)->nr_frags;
3672#endif
fb40195c 3673 if (ixgbevf_maybe_stop_tx(tx_ring, count + 3)) {
095e2617 3674 tx_ring->tx_stats.tx_busy++;
3595990a
AD		 3675 return NETDEV_TX_BUSY;
3676 }
3677
7ad1a093
ET		 3678 /* record the location of the first descriptor for this packet */
3679 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
3680 first->skb = skb;
3681 first->bytecount = skb->len;
3682 first->gso_segs = 1;
3683
df8a39de
JP		 3684 if (skb_vlan_tag_present(skb)) {
3685 tx_flags |= skb_vlan_tag_get(skb);
92915f71
GR		 3686 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
3687 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3688 }
3689
7ad1a093
ET		 3690 /* record initial flags and protocol */
3691 first->tx_flags = tx_flags;
3692 first->protocol = vlan_get_protocol(skb);
92915f71 3693
7ad1a093
ET		 3694 tso = ixgbevf_tso(tx_ring, first, &hdr_len);
3695 if (tso < 0)
3696 goto out_drop;
b5d217f3 3697 else if (!tso)
7ad1a093 3698 ixgbevf_tx_csum(tx_ring, first);
92915f71 3699
29d37fa1 3700 ixgbevf_tx_map(tx_ring, first, hdr_len);
70a10e25 3701
fb40195c 3702 ixgbevf_maybe_stop_tx(tx_ring, DESC_NEEDED);
92915f71 3703
7ad1a093
ET		 3704 return NETDEV_TX_OK;
3705
3706out_drop:
3707 dev_kfree_skb_any(first->skb);
3708 first->skb = NULL;
3709
92915f71
GR		 3710 return NETDEV_TX_OK;
3711}
3712
92915f71
GR		 3713/**
3714 * ixgbevf_set_mac - Change the Ethernet Address of the NIC
3715 * @netdev: network interface device structure
3716 * @p: pointer to an address structure
3717 *
3718 * Returns 0 on success, negative on failure
3719 **/
3720static int ixgbevf_set_mac(struct net_device *netdev, void *p)
3721{
3722 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3723 struct ixgbe_hw *hw = &adapter->hw;
3724 struct sockaddr *addr = p;
32ca6868 3725 int err;
92915f71
GR		 3726
3727 if (!is_valid_ether_addr(addr->sa_data))
3728 return -EADDRNOTAVAIL;
3729
55fdd45b 3730 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 3731
32ca6868 3732 err = hw->mac.ops.set_rar(hw, 0, addr->sa_data, 0);
92915f71 3733
55fdd45b 3734 spin_unlock_bh(&adapter->mbx_lock);
1c55ed76 3735
32ca6868
ET		 3736 if (err)
3737 return -EPERM;
3738
3739 ether_addr_copy(hw->mac.addr, addr->sa_data);
3740 ether_addr_copy(netdev->dev_addr, addr->sa_data);
3741
92915f71
GR		 3742 return 0;
3743}
3744
3745/**
3746 * ixgbevf_change_mtu - Change the Maximum Transfer Unit
3747 * @netdev: network interface device structure
3748 * @new_mtu: new value for maximum frame size
3749 *
3750 * Returns 0 on success, negative on failure
3751 **/
3752static int ixgbevf_change_mtu(struct net_device *netdev, int new_mtu)
3753{
3754 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
bad17234 3755 struct ixgbe_hw *hw = &adapter->hw;
92915f71 3756 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
6a11e52b 3757 int ret;
69bfbec4 3758
14b22cd9 3759 spin_lock_bh(&adapter->mbx_lock);
6a11e52b
TN		 3760 /* notify the PF of our intent to use this size of frame */
3761 ret = hw->mac.ops.set_rlpml(hw, max_frame);
14b22cd9 3762 spin_unlock_bh(&adapter->mbx_lock);
6a11e52b
TN		 3763 if (ret)
3764 return -EINVAL;
3765
bad17234 3766 hw_dbg(hw, "changing MTU from %d to %d\n",
92915f71 3767 netdev->mtu, new_mtu);
6a11e52b 3768
92915f71
GR		 3769 /* must set new MTU before calling down or up */
3770 netdev->mtu = new_mtu;
3771
92915f71
GR		 3772 return 0;
3773}
3774
688ff32d
ET		 3775#ifdef CONFIG_NET_POLL_CONTROLLER
3776/* Polling 'interrupt' - used by things like netconsole to send skbs
3777 * without having to re-enable interrupts. It's not called while
3778 * the interrupt routine is executing.
3779 */
3780static void ixgbevf_netpoll(struct net_device *netdev)
3781{
3782 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3783 int i;
3784
3785 /* if interface is down do nothing */
3786 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
3787 return;
3788 for (i = 0; i < adapter->num_rx_queues; i++)
3789 ixgbevf_msix_clean_rings(0, adapter->q_vector[i]);
3790}
3791#endif /* CONFIG_NET_POLL_CONTROLLER */
3792
0ac1e8ce 3793static int ixgbevf_suspend(struct pci_dev *pdev, pm_message_t state)
92915f71
GR		 3794{
3795 struct net_device *netdev = pci_get_drvdata(pdev);
3796 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
0ac1e8ce
AD		 3797#ifdef CONFIG_PM
3798 int retval = 0;
3799#endif
92915f71 3800
2dad7b27 3801 rtnl_lock();
92915f71
GR		 3802 netif_device_detach(netdev);
3803
b19cf6ee
ET		 3804 if (netif_running(netdev))
3805 ixgbevf_close_suspend(adapter);
3806
3807 ixgbevf_clear_interrupt_scheme(adapter);
2dad7b27 3808 rtnl_unlock();
92915f71 3809
0ac1e8ce
AD		 3810#ifdef CONFIG_PM
3811 retval = pci_save_state(pdev);
3812 if (retval)
3813 return retval;
92915f71 3814
0ac1e8ce 3815#endif
bc0c7151
MR		 3816 if (!test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state))
3817 pci_disable_device(pdev);
0ac1e8ce
AD		 3818
3819 return 0;
3820}
3821
3822#ifdef CONFIG_PM
3823static int ixgbevf_resume(struct pci_dev *pdev)
3824{
27ae2967
WY		 3825 struct net_device *netdev = pci_get_drvdata(pdev);
3826 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
0ac1e8ce
AD		 3827 u32 err;
3828
0ac1e8ce 3829 pci_restore_state(pdev);
dec0d8e4 3830 /* pci_restore_state clears dev->state_saved so call
0ac1e8ce
AD		 3831 * pci_save_state to restore it.
3832 */
3833 pci_save_state(pdev);
3834
3835 err = pci_enable_device_mem(pdev);
3836 if (err) {
3837 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
3838 return err;
3839 }
26403b7f
ET		 3840
3841 adapter->hw.hw_addr = adapter->io_addr;
4e857c58 3842 smp_mb__before_atomic();
bc0c7151 3843 clear_bit(__IXGBEVF_DISABLED, &adapter->state);
0ac1e8ce
AD		 3844 pci_set_master(pdev);
3845
798e381a
DS		 3846 ixgbevf_reset(adapter);
3847
0ac1e8ce
AD		 3848 rtnl_lock();
3849 err = ixgbevf_init_interrupt_scheme(adapter);
3850 rtnl_unlock();
3851 if (err) {
3852 dev_err(&pdev->dev, "Cannot initialize interrupts\n");
3853 return err;
3854 }
3855
0ac1e8ce
AD		 3856 if (netif_running(netdev)) {
3857 err = ixgbevf_open(netdev);
3858 if (err)
3859 return err;
3860 }
3861
3862 netif_device_attach(netdev);
3863
3864 return err;
3865}
3866
3867#endif /* CONFIG_PM */
3868static void ixgbevf_shutdown(struct pci_dev *pdev)
3869{
3870 ixgbevf_suspend(pdev, PMSG_SUSPEND);
92915f71
GR		 3871}
3872
bc1f4470 3873static void ixgbevf_get_stats(struct net_device *netdev,
3874 struct rtnl_link_stats64 *stats)
4197aa7b
ED		 3875{
3876 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3877 unsigned int start;
3878 u64 bytes, packets;
3879 const struct ixgbevf_ring *ring;
3880 int i;
3881
3882 ixgbevf_update_stats(adapter);
3883
3884 stats->multicast = adapter->stats.vfmprc - adapter->stats.base_vfmprc;
3885
3886 for (i = 0; i < adapter->num_rx_queues; i++) {
87e70ab9 3887 ring = adapter->rx_ring[i];
4197aa7b 3888 do {
57a7744e 3889 start = u64_stats_fetch_begin_irq(&ring->syncp);
095e2617
ET		 3890 bytes = ring->stats.bytes;
3891 packets = ring->stats.packets;
57a7744e 3892 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
4197aa7b
ED		 3893 stats->rx_bytes += bytes;
3894 stats->rx_packets += packets;
3895 }
3896
3897 for (i = 0; i < adapter->num_tx_queues; i++) {
87e70ab9 3898 ring = adapter->tx_ring[i];
4197aa7b 3899 do {
57a7744e 3900 start = u64_stats_fetch_begin_irq(&ring->syncp);
095e2617
ET		 3901 bytes = ring->stats.bytes;
3902 packets = ring->stats.packets;
57a7744e 3903 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
4197aa7b
ED		 3904 stats->tx_bytes += bytes;
3905 stats->tx_packets += packets;
3906 }
4197aa7b
ED		 3907}
3908
b83e3010
AD		 3909#define IXGBEVF_MAX_MAC_HDR_LEN 127
3910#define IXGBEVF_MAX_NETWORK_HDR_LEN 511
3911
3912static netdev_features_t
3913ixgbevf_features_check(struct sk_buff *skb, struct net_device *dev,
3914 netdev_features_t features)
3915{
3916 unsigned int network_hdr_len, mac_hdr_len;
3917
3918 /* Make certain the headers can be described by a context descriptor */
3919 mac_hdr_len = skb_network_header(skb) - skb->data;
3920 if (unlikely(mac_hdr_len > IXGBEVF_MAX_MAC_HDR_LEN))
3921 return features & ~(NETIF_F_HW_CSUM |
3922 NETIF_F_SCTP_CRC |
3923 NETIF_F_HW_VLAN_CTAG_TX |
3924 NETIF_F_TSO |
3925 NETIF_F_TSO6);
3926
3927 network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
3928 if (unlikely(network_hdr_len > IXGBEVF_MAX_NETWORK_HDR_LEN))
3929 return features & ~(NETIF_F_HW_CSUM |
3930 NETIF_F_SCTP_CRC |
3931 NETIF_F_TSO |
3932 NETIF_F_TSO6);
3933
3934 /* We can only support IPV4 TSO in tunnels if we can mangle the
3935 * inner IP ID field, so strip TSO if MANGLEID is not supported.
3936 */
3937 if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID))
3938 features &= ~NETIF_F_TSO;
3939
3940 return features;
3941}
3942
0ac1e8ce 3943static const struct net_device_ops ixgbevf_netdev_ops = {
c12db769
SH		 3944 .ndo_open = ixgbevf_open,
3945 .ndo_stop = ixgbevf_close,
3946 .ndo_start_xmit = ixgbevf_xmit_frame,
3947 .ndo_set_rx_mode = ixgbevf_set_rx_mode,
4197aa7b 3948 .ndo_get_stats64 = ixgbevf_get_stats,
92915f71 3949 .ndo_validate_addr = eth_validate_addr,
c12db769
SH		 3950 .ndo_set_mac_address = ixgbevf_set_mac,
3951 .ndo_change_mtu = ixgbevf_change_mtu,
3952 .ndo_tx_timeout = ixgbevf_tx_timeout,
c12db769
SH		 3953 .ndo_vlan_rx_add_vid = ixgbevf_vlan_rx_add_vid,
3954 .ndo_vlan_rx_kill_vid = ixgbevf_vlan_rx_kill_vid,
688ff32d
ET		 3955#ifdef CONFIG_NET_POLL_CONTROLLER
3956 .ndo_poll_controller = ixgbevf_netpoll,
3957#endif
b83e3010 3958 .ndo_features_check = ixgbevf_features_check,
92915f71 3959};
92915f71
GR		 3960
3961static void ixgbevf_assign_netdev_ops(struct net_device *dev)
3962{
0ac1e8ce 3963 dev->netdev_ops = &ixgbevf_netdev_ops;
92915f71
GR		 3964 ixgbevf_set_ethtool_ops(dev);
3965 dev->watchdog_timeo = 5 * HZ;
3966}
3967
3968/**
3969 * ixgbevf_probe - Device Initialization Routine
3970 * @pdev: PCI device information struct
3971 * @ent: entry in ixgbevf_pci_tbl
3972 *
3973 * Returns 0 on success, negative on failure
3974 *
3975 * ixgbevf_probe initializes an adapter identified by a pci_dev structure.
3976 * The OS initialization, configuring of the adapter private structure,
3977 * and a hardware reset occur.
3978 **/
1dd06ae8 3979static int ixgbevf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
92915f71
GR		 3980{
3981 struct net_device *netdev;
3982 struct ixgbevf_adapter *adapter = NULL;
3983 struct ixgbe_hw *hw = NULL;
3984 const struct ixgbevf_info *ii = ixgbevf_info_tbl[ent->driver_data];
92915f71 3985 int err, pci_using_dac;
0333464f 3986 bool disable_dev = false;
92915f71
GR		 3987
3988 err = pci_enable_device(pdev);
3989 if (err)
3990 return err;
3991
53567aa4 3992 if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
92915f71
GR		 3993 pci_using_dac = 1;
3994 } else {
53567aa4 3995 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
92915f71 3996 if (err) {
dec0d8e4 3997 dev_err(&pdev->dev, "No usable DMA configuration, aborting\n");
53567aa4 3998 goto err_dma;
92915f71
GR		 3999 }
4000 pci_using_dac = 0;
4001 }
4002
4003 err = pci_request_regions(pdev, ixgbevf_driver_name);
4004 if (err) {
4005 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
4006 goto err_pci_reg;
4007 }
4008
4009 pci_set_master(pdev);
4010
92915f71
GR		 4011 netdev = alloc_etherdev_mq(sizeof(struct ixgbevf_adapter),
4012 MAX_TX_QUEUES);
92915f71
GR		 4013 if (!netdev) {
4014 err = -ENOMEM;
4015 goto err_alloc_etherdev;
4016 }
4017
4018 SET_NETDEV_DEV(netdev, &pdev->dev);
4019
92915f71
GR		 4020 adapter = netdev_priv(netdev);
4021
4022 adapter->netdev = netdev;
4023 adapter->pdev = pdev;
4024 hw = &adapter->hw;
4025 hw->back = adapter;
b3f4d599 4026 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
92915f71 4027
dec0d8e4 4028 /* call save state here in standalone driver because it relies on
92915f71
GR		 4029 * adapter struct to exist, and needs to call netdev_priv
4030 */
4031 pci_save_state(pdev);
4032
4033 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
4034 pci_resource_len(pdev, 0));
dbf8b0d8 4035 adapter->io_addr = hw->hw_addr;
92915f71
GR		 4036 if (!hw->hw_addr) {
4037 err = -EIO;
4038 goto err_ioremap;
4039 }
4040
4041 ixgbevf_assign_netdev_ops(netdev);
4042
dec0d8e4 4043 /* Setup HW API */
92915f71
GR		 4044 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
4045 hw->mac.type = ii->mac;
4046
4047 memcpy(&hw->mbx.ops, &ixgbevf_mbx_ops,
f416dfc0 4048 sizeof(struct ixgbe_mbx_operations));
92915f71 4049
92915f71
GR		 4050 /* setup the private structure */
4051 err = ixgbevf_sw_init(adapter);
1a0d6ae5
DK		 4052 if (err)
4053 goto err_sw_init;
4054
4055 /* The HW MAC address was set and/or determined in sw_init */
1a0d6ae5
DK		 4056 if (!is_valid_ether_addr(netdev->dev_addr)) {
4057 pr_err("invalid MAC address\n");
4058 err = -EIO;
4059 goto err_sw_init;
4060 }
92915f71 4061
471a76de 4062 netdev->hw_features = NETIF_F_SG |
dec0d8e4
JK		 4063 NETIF_F_TSO |
4064 NETIF_F_TSO6 |
cb2b3edb
AD		 4065 NETIF_F_RXCSUM |
4066 NETIF_F_HW_CSUM |
4067 NETIF_F_SCTP_CRC;
471a76de 4068
b83e3010
AD		 4069#define IXGBEVF_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
4070 NETIF_F_GSO_GRE_CSUM | \
7e13318d 4071 NETIF_F_GSO_IPXIP4 | \
bf2d1df3 4072 NETIF_F_GSO_IPXIP6 | \
b83e3010
AD		 4073 NETIF_F_GSO_UDP_TUNNEL | \
4074 NETIF_F_GSO_UDP_TUNNEL_CSUM)
92915f71 4075
b83e3010
AD		 4076 netdev->gso_partial_features = IXGBEVF_GSO_PARTIAL_FEATURES;
4077 netdev->hw_features |= NETIF_F_GSO_PARTIAL |
4078 IXGBEVF_GSO_PARTIAL_FEATURES;
cb2b3edb 4079
b83e3010 4080 netdev->features = netdev->hw_features;
92915f71
GR		 4081
4082 if (pci_using_dac)
4083 netdev->features |= NETIF_F_HIGHDMA;
4084
b83e3010 4085 netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
2a20525b
SP		 4086 netdev->mpls_features |= NETIF_F_SG |
4087 NETIF_F_TSO |
4088 NETIF_F_TSO6 |
4089 NETIF_F_HW_CSUM;
4090 netdev->mpls_features |= IXGBEVF_GSO_PARTIAL_FEATURES;
b83e3010
AD		 4091 netdev->hw_enc_features |= netdev->vlan_features;
4092
4093 /* set this bit last since it cannot be part of vlan_features */
4094 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
4095 NETIF_F_HW_VLAN_CTAG_RX |
4096 NETIF_F_HW_VLAN_CTAG_TX;
4097
01789349
JP		 4098 netdev->priv_flags |= IFF_UNICAST_FLT;
4099
91c527a5
JW		 4100 /* MTU range: 68 - 1504 or 9710 */
4101 netdev->min_mtu = ETH_MIN_MTU;
4102 switch (adapter->hw.api_version) {
4103 case ixgbe_mbox_api_11:
4104 case ixgbe_mbox_api_12:
41e544cd 4105 case ixgbe_mbox_api_13:
91c527a5
JW		 4106 netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE -
4107 (ETH_HLEN + ETH_FCS_LEN);
4108 break;
4109 default:
4110 if (adapter->hw.mac.type != ixgbe_mac_82599_vf)
4111 netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE -
4112 (ETH_HLEN + ETH_FCS_LEN);
4113 else
4114 netdev->max_mtu = ETH_DATA_LEN + ETH_FCS_LEN;
4115 break;
4116 }
4117
ea699569
MR		 4118 if (IXGBE_REMOVED(hw->hw_addr)) {
4119 err = -EIO;
4120 goto err_sw_init;
4121 }
9ac5c5cc
ET		 4122
4123 setup_timer(&adapter->service_timer, &ixgbevf_service_timer,
4124 (unsigned long)adapter);
4125
4126 INIT_WORK(&adapter->service_task, ixgbevf_service_task);
4127 set_bit(__IXGBEVF_SERVICE_INITED, &adapter->state);
4128 clear_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state);
92915f71
GR		 4129
4130 err = ixgbevf_init_interrupt_scheme(adapter);
4131 if (err)
4132 goto err_sw_init;
4133
92915f71
GR		 4134 strcpy(netdev->name, "eth%d");
4135
4136 err = register_netdev(netdev);
4137 if (err)
4138 goto err_register;
4139
0333464f 4140 pci_set_drvdata(pdev, netdev);
5d426ad1
GR		 4141 netif_carrier_off(netdev);
4142
33bd9f60
GR		 4143 ixgbevf_init_last_counter_stats(adapter);
4144
47068b0d
ET		 4145 /* print the VF info */
4146 dev_info(&pdev->dev, "%pM\n", netdev->dev_addr);
4147 dev_info(&pdev->dev, "MAC: %d\n", hw->mac.type);
92915f71 4148
47068b0d
ET		 4149 switch (hw->mac.type) {
4150 case ixgbe_mac_X550_vf:
4151 dev_info(&pdev->dev, "Intel(R) X550 Virtual Function\n");
4152 break;
4153 case ixgbe_mac_X540_vf:
4154 dev_info(&pdev->dev, "Intel(R) X540 Virtual Function\n");
4155 break;
4156 case ixgbe_mac_82599_vf:
4157 default:
4158 dev_info(&pdev->dev, "Intel(R) 82599 Virtual Function\n");
4159 break;
4160 }
92915f71 4161
92915f71
GR		 4162 return 0;
4163
4164err_register:
0ac1e8ce 4165 ixgbevf_clear_interrupt_scheme(adapter);
92915f71
GR		 4166err_sw_init:
4167 ixgbevf_reset_interrupt_capability(adapter);
dbf8b0d8 4168 iounmap(adapter->io_addr);
e60ae003 4169 kfree(adapter->rss_key);
92915f71 4170err_ioremap:
0333464f 4171 disable_dev = !test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state);
92915f71
GR		 4172 free_netdev(netdev);
4173err_alloc_etherdev:
4174 pci_release_regions(pdev);
4175err_pci_reg:
4176err_dma:
0333464f 4177 if (!adapter || disable_dev)
bc0c7151 4178 pci_disable_device(pdev);
92915f71
GR		 4179 return err;
4180}
4181
4182/**
4183 * ixgbevf_remove - Device Removal Routine
4184 * @pdev: PCI device information struct
4185 *
4186 * ixgbevf_remove is called by the PCI subsystem to alert the driver
4187 * that it should release a PCI device. The could be caused by a
4188 * Hot-Plug event, or because the driver is going to be removed from
4189 * memory.
4190 **/
9f9a12f8 4191static void ixgbevf_remove(struct pci_dev *pdev)
92915f71
GR		 4192{
4193 struct net_device *netdev = pci_get_drvdata(pdev);
0333464f
ET		 4194 struct ixgbevf_adapter *adapter;
4195 bool disable_dev;
4196
4197 if (!netdev)
4198 return;
4199
4200 adapter = netdev_priv(netdev);
92915f71 4201
2e7cfbdd 4202 set_bit(__IXGBEVF_REMOVING, &adapter->state);
9ac5c5cc 4203 cancel_work_sync(&adapter->service_task);
92915f71 4204
fd13a9ab 4205 if (netdev->reg_state == NETREG_REGISTERED)
92915f71 4206 unregister_netdev(netdev);
92915f71 4207
0ac1e8ce 4208 ixgbevf_clear_interrupt_scheme(adapter);
92915f71
GR		 4209 ixgbevf_reset_interrupt_capability(adapter);
4210
dbf8b0d8 4211 iounmap(adapter->io_addr);
92915f71
GR		 4212 pci_release_regions(pdev);
4213
4214 hw_dbg(&adapter->hw, "Remove complete\n");
4215
e60ae003 4216 kfree(adapter->rss_key);
0333464f 4217 disable_dev = !test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state);
92915f71
GR		 4218 free_netdev(netdev);
4219
0333464f 4220 if (disable_dev)
bc0c7151 4221 pci_disable_device(pdev);
92915f71
GR		 4222}
4223
9f19f31d
AD		 4224/**
4225 * ixgbevf_io_error_detected - called when PCI error is detected
4226 * @pdev: Pointer to PCI device
4227 * @state: The current pci connection state
4228 *
4229 * This function is called after a PCI bus error affecting
4230 * this device has been detected.
dec0d8e4 4231 **/
9f19f31d
AD		 4232static pci_ers_result_t ixgbevf_io_error_detected(struct pci_dev *pdev,
4233 pci_channel_state_t state)
4234{
4235 struct net_device *netdev = pci_get_drvdata(pdev);
4236 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4237
9ac5c5cc 4238 if (!test_bit(__IXGBEVF_SERVICE_INITED, &adapter->state))
ea699569
MR		 4239 return PCI_ERS_RESULT_DISCONNECT;
4240
bc0c7151 4241 rtnl_lock();
9f19f31d
AD		 4242 netif_device_detach(netdev);
4243
bc0c7151
MR		 4244 if (state == pci_channel_io_perm_failure) {
4245 rtnl_unlock();
9f19f31d 4246 return PCI_ERS_RESULT_DISCONNECT;
bc0c7151 4247 }
9f19f31d
AD		 4248
4249 if (netif_running(netdev))
b19cf6ee 4250 ixgbevf_close_suspend(adapter);
9f19f31d 4251
bc0c7151
MR		 4252 if (!test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state))
4253 pci_disable_device(pdev);
4254 rtnl_unlock();
9f19f31d
AD		 4255
4256 /* Request a slot slot reset. */
4257 return PCI_ERS_RESULT_NEED_RESET;
4258}
4259
4260/**
4261 * ixgbevf_io_slot_reset - called after the pci bus has been reset.
4262 * @pdev: Pointer to PCI device
4263 *
4264 * Restart the card from scratch, as if from a cold-boot. Implementation
4265 * resembles the first-half of the ixgbevf_resume routine.
dec0d8e4 4266 **/
9f19f31d
AD		 4267static pci_ers_result_t ixgbevf_io_slot_reset(struct pci_dev *pdev)
4268{
4269 struct net_device *netdev = pci_get_drvdata(pdev);
4270 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4271
4272 if (pci_enable_device_mem(pdev)) {
4273 dev_err(&pdev->dev,
4274 "Cannot re-enable PCI device after reset.\n");
4275 return PCI_ERS_RESULT_DISCONNECT;
4276 }
4277
26403b7f 4278 adapter->hw.hw_addr = adapter->io_addr;
4e857c58 4279 smp_mb__before_atomic();
bc0c7151 4280 clear_bit(__IXGBEVF_DISABLED, &adapter->state);
9f19f31d
AD		 4281 pci_set_master(pdev);
4282
4283 ixgbevf_reset(adapter);
4284
4285 return PCI_ERS_RESULT_RECOVERED;
4286}
4287
4288/**
4289 * ixgbevf_io_resume - called when traffic can start flowing again.
4290 * @pdev: Pointer to PCI device
4291 *
4292 * This callback is called when the error recovery driver tells us that
4293 * its OK to resume normal operation. Implementation resembles the
4294 * second-half of the ixgbevf_resume routine.
dec0d8e4 4295 **/
9f19f31d
AD		 4296static void ixgbevf_io_resume(struct pci_dev *pdev)
4297{
4298 struct net_device *netdev = pci_get_drvdata(pdev);
9f19f31d 4299
b19cf6ee 4300 rtnl_lock();
9f19f31d 4301 if (netif_running(netdev))
b19cf6ee 4302 ixgbevf_open(netdev);
9f19f31d
AD		 4303
4304 netif_device_attach(netdev);
b19cf6ee 4305 rtnl_unlock();
9f19f31d
AD		 4306}
4307
4308/* PCI Error Recovery (ERS) */
3646f0e5 4309static const struct pci_error_handlers ixgbevf_err_handler = {
9f19f31d
AD		 4310 .error_detected = ixgbevf_io_error_detected,
4311 .slot_reset = ixgbevf_io_slot_reset,
4312 .resume = ixgbevf_io_resume,
4313};
4314
92915f71 4315static struct pci_driver ixgbevf_driver = {
dec0d8e4
JK		 4316 .name = ixgbevf_driver_name,
4317 .id_table = ixgbevf_pci_tbl,
4318 .probe = ixgbevf_probe,
4319 .remove = ixgbevf_remove,
0ac1e8ce
AD		 4320#ifdef CONFIG_PM
4321 /* Power Management Hooks */
dec0d8e4
JK		 4322 .suspend = ixgbevf_suspend,
4323 .resume = ixgbevf_resume,
0ac1e8ce 4324#endif
dec0d8e4
JK		 4325 .shutdown = ixgbevf_shutdown,
4326 .err_handler = &ixgbevf_err_handler
92915f71
GR		 4327};
4328
4329/**
65d676c8 4330 * ixgbevf_init_module - Driver Registration Routine
92915f71 4331 *
65d676c8 4332 * ixgbevf_init_module is the first routine called when the driver is
92915f71
GR		 4333 * loaded. All it does is register with the PCI subsystem.
4334 **/
4335static int __init ixgbevf_init_module(void)
4336{
dbd9636e
JK		 4337 pr_info("%s - version %s\n", ixgbevf_driver_string,
4338 ixgbevf_driver_version);
92915f71 4339
dbd9636e 4340 pr_info("%s\n", ixgbevf_copyright);
40a13e24
MR		 4341 ixgbevf_wq = create_singlethread_workqueue(ixgbevf_driver_name);
4342 if (!ixgbevf_wq) {
4343 pr_err("%s: Failed to create workqueue\n", ixgbevf_driver_name);
4344 return -ENOMEM;
4345 }
92915f71 4346
50985b5f 4347 return pci_register_driver(&ixgbevf_driver);
92915f71
GR		 4348}
4349
4350module_init(ixgbevf_init_module);
4351
4352/**
65d676c8 4353 * ixgbevf_exit_module - Driver Exit Cleanup Routine
92915f71 4354 *
65d676c8 4355 * ixgbevf_exit_module is called just before the driver is removed
92915f71
GR		 4356 * from memory.
4357 **/
4358static void __exit ixgbevf_exit_module(void)
4359{
4360 pci_unregister_driver(&ixgbevf_driver);
40a13e24
MR		 4361 if (ixgbevf_wq) {
4362 destroy_workqueue(ixgbevf_wq);
4363 ixgbevf_wq = NULL;
4364 }
92915f71
GR		 4365}
4366
4367#ifdef DEBUG
4368/**
65d676c8 4369 * ixgbevf_get_hw_dev_name - return device name string
92915f71
GR		 4370 * used by hardware layer to print debugging information
4371 **/
4372char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw)
4373{
4374 struct ixgbevf_adapter *adapter = hw->back;
dec0d8e4 4375
92915f71
GR		 4376 return adapter->netdev->name;
4377}
4378
4379#endif
4380module_exit(ixgbevf_exit_module);
4381
4382/* ixgbevf_main.c */
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