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[mirror_ubuntu-artful-kernel.git] / drivers / net / ethernet / intel / ixgbevf / ixgbevf_main.c
CommitLineData
92915f71
GR		 1/*******************************************************************************
2
3 Intel 82599 Virtual Function driver
5c47a2b6 4 Copyright(c) 1999 - 2012 Intel Corporation.
92915f71
GR		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26*******************************************************************************/
27
28
29/******************************************************************************
30 Copyright (c)2006 - 2007 Myricom, Inc. for some LRO specific code
31******************************************************************************/
dbd9636e
JK		 32
33#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
34
92915f71 35#include <linux/types.h>
dadcd65f 36#include <linux/bitops.h>
92915f71
GR		 37#include <linux/module.h>
38#include <linux/pci.h>
39#include <linux/netdevice.h>
40#include <linux/vmalloc.h>
41#include <linux/string.h>
42#include <linux/in.h>
43#include <linux/ip.h>
44#include <linux/tcp.h>
70a10e25 45#include <linux/sctp.h>
92915f71 46#include <linux/ipv6.h>
5a0e3ad6 47#include <linux/slab.h>
92915f71
GR		 48#include <net/checksum.h>
49#include <net/ip6_checksum.h>
50#include <linux/ethtool.h>
01789349 51#include <linux/if.h>
92915f71 52#include <linux/if_vlan.h>
70c71606 53#include <linux/prefetch.h>
92915f71
GR		 54
55#include "ixgbevf.h"
56
3d8fe98f 57const char ixgbevf_driver_name[] = "ixgbevf";
92915f71 58static const char ixgbevf_driver_string[] =
422e05d1 59 "Intel(R) 10 Gigabit PCI Express Virtual Function Network Driver";
92915f71 60
9cd9130d 61#define DRV_VERSION "2.6.0-k"
92915f71 62const char ixgbevf_driver_version[] = DRV_VERSION;
66c87bd5 63static char ixgbevf_copyright[] =
5c47a2b6 64 "Copyright (c) 2009 - 2012 Intel Corporation.";
92915f71
GR		 65
66static const struct ixgbevf_info *ixgbevf_info_tbl[] = {
2316aa2a
GR		 67 [board_82599_vf] = &ixgbevf_82599_vf_info,
68 [board_X540_vf] = &ixgbevf_X540_vf_info,
92915f71
GR		 69};
70
71/* ixgbevf_pci_tbl - PCI Device ID Table
72 *
73 * Wildcard entries (PCI_ANY_ID) should come last
74 * Last entry must be all 0s
75 *
76 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
77 * Class, Class Mask, private data (not used) }
78 */
79static struct pci_device_id ixgbevf_pci_tbl[] = {
80 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF),
81 board_82599_vf},
2316aa2a
GR		 82 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540_VF),
83 board_X540_vf},
92915f71
GR		 84
85 /* required last entry */
86 {0, }
87};
88MODULE_DEVICE_TABLE(pci, ixgbevf_pci_tbl);
89
90MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
91MODULE_DESCRIPTION("Intel(R) 82599 Virtual Function Driver");
92MODULE_LICENSE("GPL");
93MODULE_VERSION(DRV_VERSION);
94
b3f4d599 95#define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
96static int debug = -1;
97module_param(debug, int, 0);
98MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
92915f71
GR		 99
100/* forward decls */
fa71ae27 101static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector);
92915f71
GR		 102
103static inline void ixgbevf_release_rx_desc(struct ixgbe_hw *hw,
104 struct ixgbevf_ring *rx_ring,
105 u32 val)
106{
107 /*
108 * Force memory writes to complete before letting h/w
109 * know there are new descriptors to fetch. (Only
110 * applicable for weak-ordered memory model archs,
111 * such as IA-64).
112 */
113 wmb();
114 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(rx_ring->reg_idx), val);
115}
116
49ce9c2c 117/**
65d676c8 118 * ixgbevf_set_ivar - set IVAR registers - maps interrupt causes to vectors
92915f71
GR		 119 * @adapter: pointer to adapter struct
120 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
121 * @queue: queue to map the corresponding interrupt to
122 * @msix_vector: the vector to map to the corresponding queue
123 *
124 */
125static void ixgbevf_set_ivar(struct ixgbevf_adapter *adapter, s8 direction,
126 u8 queue, u8 msix_vector)
127{
128 u32 ivar, index;
129 struct ixgbe_hw *hw = &adapter->hw;
130 if (direction == -1) {
131 /* other causes */
132 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
133 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC);
134 ivar &= ~0xFF;
135 ivar |= msix_vector;
136 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar);
137 } else {
138 /* tx or rx causes */
139 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
140 index = ((16 * (queue & 1)) + (8 * direction));
141 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(queue >> 1));
142 ivar &= ~(0xFF << index);
143 ivar |= (msix_vector << index);
144 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(queue >> 1), ivar);
145 }
146}
147
70a10e25 148static void ixgbevf_unmap_and_free_tx_resource(struct ixgbevf_ring *tx_ring,
92915f71
GR		 149 struct ixgbevf_tx_buffer
150 *tx_buffer_info)
151{
152 if (tx_buffer_info->dma) {
153 if (tx_buffer_info->mapped_as_page)
70a10e25 154 dma_unmap_page(tx_ring->dev,
92915f71
GR		 155 tx_buffer_info->dma,
156 tx_buffer_info->length,
2a1f8794 157 DMA_TO_DEVICE);
92915f71 158 else
70a10e25 159 dma_unmap_single(tx_ring->dev,
92915f71
GR		 160 tx_buffer_info->dma,
161 tx_buffer_info->length,
2a1f8794 162 DMA_TO_DEVICE);
92915f71
GR		 163 tx_buffer_info->dma = 0;
164 }
165 if (tx_buffer_info->skb) {
166 dev_kfree_skb_any(tx_buffer_info->skb);
167 tx_buffer_info->skb = NULL;
168 }
169 tx_buffer_info->time_stamp = 0;
170 /* tx_buffer_info must be completely set up in the transmit path */
171}
172
92915f71
GR		 173#define IXGBE_MAX_TXD_PWR 14
174#define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
175
176/* Tx Descriptors needed, worst case */
3595990a
AD		 177#define TXD_USE_COUNT(S) DIV_ROUND_UP((S), IXGBE_MAX_DATA_PER_TXD)
178#define DESC_NEEDED (MAX_SKB_FRAGS + 4)
92915f71
GR		 179
180static void ixgbevf_tx_timeout(struct net_device *netdev);
181
182/**
183 * ixgbevf_clean_tx_irq - Reclaim resources after transmit completes
fa71ae27 184 * @q_vector: board private structure
92915f71
GR		 185 * @tx_ring: tx ring to clean
186 **/
fa71ae27 187static bool ixgbevf_clean_tx_irq(struct ixgbevf_q_vector *q_vector,
92915f71
GR		 188 struct ixgbevf_ring *tx_ring)
189{
fa71ae27 190 struct ixgbevf_adapter *adapter = q_vector->adapter;
92915f71
GR		 191 union ixgbe_adv_tx_desc *tx_desc, *eop_desc;
192 struct ixgbevf_tx_buffer *tx_buffer_info;
193 unsigned int i, eop, count = 0;
194 unsigned int total_bytes = 0, total_packets = 0;
195
10cc1bdd
AD		 196 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
197 return true;
198
92915f71
GR		 199 i = tx_ring->next_to_clean;
200 eop = tx_ring->tx_buffer_info[i].next_to_watch;
908421f6 201 eop_desc = IXGBEVF_TX_DESC(tx_ring, eop);
92915f71
GR		 202
203 while ((eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)) &&
fa71ae27 204 (count < tx_ring->count)) {
92915f71 205 bool cleaned = false;
2d0bb1c1 206 rmb(); /* read buffer_info after eop_desc */
98b9e48f
GR		 207 /* eop could change between read and DD-check */
208 if (unlikely(eop != tx_ring->tx_buffer_info[i].next_to_watch))
209 goto cont_loop;
92915f71
GR		 210 for ( ; !cleaned; count++) {
211 struct sk_buff *skb;
908421f6 212 tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
92915f71
GR		 213 tx_buffer_info = &tx_ring->tx_buffer_info[i];
214 cleaned = (i == eop);
215 skb = tx_buffer_info->skb;
216
217 if (cleaned && skb) {
218 unsigned int segs, bytecount;
219
220 /* gso_segs is currently only valid for tcp */
221 segs = skb_shinfo(skb)->gso_segs ?: 1;
222 /* multiply data chunks by size of headers */
223 bytecount = ((segs - 1) * skb_headlen(skb)) +
224 skb->len;
225 total_packets += segs;
226 total_bytes += bytecount;
227 }
228
70a10e25 229 ixgbevf_unmap_and_free_tx_resource(tx_ring,
92915f71
GR		 230 tx_buffer_info);
231
232 tx_desc->wb.status = 0;
233
234 i++;
235 if (i == tx_ring->count)
236 i = 0;
237 }
238
98b9e48f 239cont_loop:
92915f71 240 eop = tx_ring->tx_buffer_info[i].next_to_watch;
908421f6 241 eop_desc = IXGBEVF_TX_DESC(tx_ring, eop);
92915f71
GR		 242 }
243
244 tx_ring->next_to_clean = i;
245
246#define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
fb40195c 247 if (unlikely(count && netif_carrier_ok(tx_ring->netdev) &&
92915f71
GR		 248 (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
249 /* Make sure that anybody stopping the queue after this
250 * sees the new next_to_clean.
251 */
252 smp_mb();
fb40195c
AD		 253 if (__netif_subqueue_stopped(tx_ring->netdev,
254 tx_ring->queue_index) &&
92915f71 255 !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
fb40195c
AD		 256 netif_wake_subqueue(tx_ring->netdev,
257 tx_ring->queue_index);
92915f71
GR		 258 ++adapter->restart_queue;
259 }
92915f71
GR		 260 }
261
4197aa7b 262 u64_stats_update_begin(&tx_ring->syncp);
92915f71
GR		 263 tx_ring->total_bytes += total_bytes;
264 tx_ring->total_packets += total_packets;
4197aa7b 265 u64_stats_update_end(&tx_ring->syncp);
92915f71 266
fa71ae27 267 return count < tx_ring->count;
92915f71
GR		 268}
269
270/**
271 * ixgbevf_receive_skb - Send a completed packet up the stack
272 * @q_vector: structure containing interrupt and ring information
273 * @skb: packet to send up
274 * @status: hardware indication of status of receive
275 * @rx_ring: rx descriptor ring (for a specific queue) to setup
276 * @rx_desc: rx descriptor
277 **/
278static void ixgbevf_receive_skb(struct ixgbevf_q_vector *q_vector,
279 struct sk_buff *skb, u8 status,
280 struct ixgbevf_ring *ring,
281 union ixgbe_adv_rx_desc *rx_desc)
282{
283 struct ixgbevf_adapter *adapter = q_vector->adapter;
284 bool is_vlan = (status & IXGBE_RXD_STAT_VP);
dd1ed3b7 285 u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan);
92915f71 286
5d9a533b 287 if (is_vlan && test_bit(tag & VLAN_VID_MASK, adapter->active_vlans))
dadcd65f 288 __vlan_hwaccel_put_tag(skb, tag);
dadcd65f 289
77d5dfca 290 napi_gro_receive(&q_vector->napi, skb);
92915f71
GR		 291}
292
293/**
294 * ixgbevf_rx_checksum - indicate in skb if hw indicated a good cksum
295 * @adapter: address of board private structure
296 * @status_err: hardware indication of status of receive
297 * @skb: skb currently being received and modified
298 **/
299static inline void ixgbevf_rx_checksum(struct ixgbevf_adapter *adapter,
fb40195c 300 struct ixgbevf_ring *ring,
92915f71
GR		 301 u32 status_err, struct sk_buff *skb)
302{
bc8acf2c 303 skb_checksum_none_assert(skb);
92915f71
GR		 304
305 /* Rx csum disabled */
fb40195c 306 if (!(ring->netdev->features & NETIF_F_RXCSUM))
92915f71
GR		 307 return;
308
309 /* if IP and error */
310 if ((status_err & IXGBE_RXD_STAT_IPCS) &&
311 (status_err & IXGBE_RXDADV_ERR_IPE)) {
312 adapter->hw_csum_rx_error++;
313 return;
314 }
315
316 if (!(status_err & IXGBE_RXD_STAT_L4CS))
317 return;
318
319 if (status_err & IXGBE_RXDADV_ERR_TCPE) {
320 adapter->hw_csum_rx_error++;
321 return;
322 }
323
324 /* It must be a TCP or UDP packet with a valid checksum */
325 skb->ip_summed = CHECKSUM_UNNECESSARY;
326 adapter->hw_csum_rx_good++;
327}
328
329/**
330 * ixgbevf_alloc_rx_buffers - Replace used receive buffers; packet split
331 * @adapter: address of board private structure
332 **/
333static void ixgbevf_alloc_rx_buffers(struct ixgbevf_adapter *adapter,
334 struct ixgbevf_ring *rx_ring,
335 int cleaned_count)
336{
337 struct pci_dev *pdev = adapter->pdev;
338 union ixgbe_adv_rx_desc *rx_desc;
339 struct ixgbevf_rx_buffer *bi;
340 struct sk_buff *skb;
fb40195c 341 unsigned int i = rx_ring->next_to_use;
92915f71 342
92915f71
GR		 343 bi = &rx_ring->rx_buffer_info[i];
344
345 while (cleaned_count--) {
908421f6 346 rx_desc = IXGBEVF_RX_DESC(rx_ring, i);
92915f71
GR		 347 skb = bi->skb;
348 if (!skb) {
fb40195c
AD		 349 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
350 rx_ring->rx_buf_len);
92915f71
GR		 351 if (!skb) {
352 adapter->alloc_rx_buff_failed++;
353 goto no_buffers;
354 }
92915f71
GR		 355 bi->skb = skb;
356 }
357 if (!bi->dma) {
2a1f8794 358 bi->dma = dma_map_single(&pdev->dev, skb->data,
92915f71 359 rx_ring->rx_buf_len,
2a1f8794 360 DMA_FROM_DEVICE);
92915f71 361 }
77d5dfca 362 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
92915f71
GR		 363
364 i++;
365 if (i == rx_ring->count)
366 i = 0;
367 bi = &rx_ring->rx_buffer_info[i];
368 }
369
370no_buffers:
371 if (rx_ring->next_to_use != i) {
372 rx_ring->next_to_use = i;
92915f71
GR		 373
374 ixgbevf_release_rx_desc(&adapter->hw, rx_ring, i);
375 }
376}
377
378static inline void ixgbevf_irq_enable_queues(struct ixgbevf_adapter *adapter,
5f3600eb 379 u32 qmask)
92915f71 380{
92915f71
GR		 381 struct ixgbe_hw *hw = &adapter->hw;
382
5f3600eb 383 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, qmask);
92915f71
GR		 384}
385
92915f71
GR		 386static bool ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector,
387 struct ixgbevf_ring *rx_ring,
fa71ae27 388 int budget)
92915f71
GR		 389{
390 struct ixgbevf_adapter *adapter = q_vector->adapter;
391 struct pci_dev *pdev = adapter->pdev;
392 union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
393 struct ixgbevf_rx_buffer *rx_buffer_info, *next_buffer;
394 struct sk_buff *skb;
395 unsigned int i;
396 u32 len, staterr;
92915f71
GR		 397 int cleaned_count = 0;
398 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
399
400 i = rx_ring->next_to_clean;
908421f6 401 rx_desc = IXGBEVF_RX_DESC(rx_ring, i);
92915f71
GR		 402 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
403 rx_buffer_info = &rx_ring->rx_buffer_info[i];
404
405 while (staterr & IXGBE_RXD_STAT_DD) {
fa71ae27 406 if (!budget)
92915f71 407 break;
fa71ae27 408 budget--;
92915f71 409
2d0bb1c1 410 rmb(); /* read descriptor and rx_buffer_info after status DD */
77d5dfca 411 len = le16_to_cpu(rx_desc->wb.upper.length);
92915f71
GR		 412 skb = rx_buffer_info->skb;
413 prefetch(skb->data - NET_IP_ALIGN);
414 rx_buffer_info->skb = NULL;
415
416 if (rx_buffer_info->dma) {
2a1f8794 417 dma_unmap_single(&pdev->dev, rx_buffer_info->dma,
92915f71 418 rx_ring->rx_buf_len,
2a1f8794 419 DMA_FROM_DEVICE);
92915f71
GR		 420 rx_buffer_info->dma = 0;
421 skb_put(skb, len);
422 }
423
92915f71
GR		 424 i++;
425 if (i == rx_ring->count)
426 i = 0;
427
908421f6 428 next_rxd = IXGBEVF_RX_DESC(rx_ring, i);
92915f71
GR		 429 prefetch(next_rxd);
430 cleaned_count++;
431
432 next_buffer = &rx_ring->rx_buffer_info[i];
433
434 if (!(staterr & IXGBE_RXD_STAT_EOP)) {
77d5dfca
AD		 435 skb->next = next_buffer->skb;
436 skb->next->prev = skb;
92915f71
GR		 437 adapter->non_eop_descs++;
438 goto next_desc;
439 }
440
441 /* ERR_MASK will only have valid bits if EOP set */
442 if (unlikely(staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK)) {
443 dev_kfree_skb_irq(skb);
444 goto next_desc;
445 }
446
fb40195c 447 ixgbevf_rx_checksum(adapter, rx_ring, staterr, skb);
92915f71
GR		 448
449 /* probably a little skewed due to removing CRC */
450 total_rx_bytes += skb->len;
451 total_rx_packets++;
452
453 /*
454 * Work around issue of some types of VM to VM loop back
455 * packets not getting split correctly
456 */
457 if (staterr & IXGBE_RXD_STAT_LB) {
e743d313 458 u32 header_fixup_len = skb_headlen(skb);
92915f71
GR		 459 if (header_fixup_len < 14)
460 skb_push(skb, header_fixup_len);
461 }
fb40195c 462 skb->protocol = eth_type_trans(skb, rx_ring->netdev);
92915f71
GR		 463
464 ixgbevf_receive_skb(q_vector, skb, staterr, rx_ring, rx_desc);
92915f71
GR		 465
466next_desc:
467 rx_desc->wb.upper.status_error = 0;
468
469 /* return some buffers to hardware, one at a time is too slow */
470 if (cleaned_count >= IXGBEVF_RX_BUFFER_WRITE) {
471 ixgbevf_alloc_rx_buffers(adapter, rx_ring,
472 cleaned_count);
473 cleaned_count = 0;
474 }
475
476 /* use prefetched values */
477 rx_desc = next_rxd;
478 rx_buffer_info = &rx_ring->rx_buffer_info[i];
479
480 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
481 }
482
483 rx_ring->next_to_clean = i;
484 cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
485
486 if (cleaned_count)
487 ixgbevf_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
488
4197aa7b 489 u64_stats_update_begin(&rx_ring->syncp);
92915f71
GR		 490 rx_ring->total_packets += total_rx_packets;
491 rx_ring->total_bytes += total_rx_bytes;
4197aa7b 492 u64_stats_update_end(&rx_ring->syncp);
92915f71 493
fa71ae27 494 return !!budget;
92915f71
GR		 495}
496
497/**
fa71ae27 498 * ixgbevf_poll - NAPI polling calback
92915f71
GR		 499 * @napi: napi struct with our devices info in it
500 * @budget: amount of work driver is allowed to do this pass, in packets
501 *
fa71ae27 502 * This function will clean more than one or more rings associated with a
92915f71
GR		 503 * q_vector.
504 **/
fa71ae27 505static int ixgbevf_poll(struct napi_struct *napi, int budget)
92915f71
GR		 506{
507 struct ixgbevf_q_vector *q_vector =
508 container_of(napi, struct ixgbevf_q_vector, napi);
509 struct ixgbevf_adapter *adapter = q_vector->adapter;
fa71ae27
AD		 510 struct ixgbevf_ring *ring;
511 int per_ring_budget;
512 bool clean_complete = true;
513
514 ixgbevf_for_each_ring(ring, q_vector->tx)
515 clean_complete &= ixgbevf_clean_tx_irq(q_vector, ring);
92915f71
GR		 516
517 /* attempt to distribute budget to each queue fairly, but don't allow
518 * the budget to go below 1 because we'll exit polling */
fa71ae27
AD		 519 if (q_vector->rx.count > 1)
520 per_ring_budget = max(budget/q_vector->rx.count, 1);
521 else
522 per_ring_budget = budget;
523
524 ixgbevf_for_each_ring(ring, q_vector->rx)
525 clean_complete &= ixgbevf_clean_rx_irq(q_vector, ring,
526 per_ring_budget);
527
528 /* If all work not completed, return budget and keep polling */
529 if (!clean_complete)
530 return budget;
531 /* all work done, exit the polling mode */
532 napi_complete(napi);
533 if (adapter->rx_itr_setting & 1)
534 ixgbevf_set_itr(q_vector);
535 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
536 ixgbevf_irq_enable_queues(adapter,
537 1 << q_vector->v_idx);
92915f71 538
fa71ae27 539 return 0;
92915f71
GR		 540}
541
ce422606
GR		 542/**
543 * ixgbevf_write_eitr - write VTEITR register in hardware specific way
544 * @q_vector: structure containing interrupt and ring information
545 */
546static void ixgbevf_write_eitr(struct ixgbevf_q_vector *q_vector)
547{
548 struct ixgbevf_adapter *adapter = q_vector->adapter;
549 struct ixgbe_hw *hw = &adapter->hw;
550 int v_idx = q_vector->v_idx;
551 u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
552
553 /*
554 * set the WDIS bit to not clear the timer bits and cause an
555 * immediate assertion of the interrupt
556 */
557 itr_reg |= IXGBE_EITR_CNT_WDIS;
558
559 IXGBE_WRITE_REG(hw, IXGBE_VTEITR(v_idx), itr_reg);
560}
92915f71
GR		 561
562/**
563 * ixgbevf_configure_msix - Configure MSI-X hardware
564 * @adapter: board private structure
565 *
566 * ixgbevf_configure_msix sets up the hardware to properly generate MSI-X
567 * interrupts.
568 **/
569static void ixgbevf_configure_msix(struct ixgbevf_adapter *adapter)
570{
571 struct ixgbevf_q_vector *q_vector;
6b43c446 572 int q_vectors, v_idx;
92915f71
GR		 573
574 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
5f3600eb 575 adapter->eims_enable_mask = 0;
92915f71
GR		 576
577 /*
578 * Populate the IVAR table and set the ITR values to the
579 * corresponding register.
580 */
581 for (v_idx = 0; v_idx < q_vectors; v_idx++) {
6b43c446 582 struct ixgbevf_ring *ring;
92915f71 583 q_vector = adapter->q_vector[v_idx];
6b43c446
AD		 584
585 ixgbevf_for_each_ring(ring, q_vector->rx)
586 ixgbevf_set_ivar(adapter, 0, ring->reg_idx, v_idx);
587
588 ixgbevf_for_each_ring(ring, q_vector->tx)
589 ixgbevf_set_ivar(adapter, 1, ring->reg_idx, v_idx);
92915f71 590
5f3600eb
AD		 591 if (q_vector->tx.ring && !q_vector->rx.ring) {
592 /* tx only vector */
593 if (adapter->tx_itr_setting == 1)
594 q_vector->itr = IXGBE_10K_ITR;
595 else
596 q_vector->itr = adapter->tx_itr_setting;
597 } else {
598 /* rx or rx/tx vector */
599 if (adapter->rx_itr_setting == 1)
600 q_vector->itr = IXGBE_20K_ITR;
601 else
602 q_vector->itr = adapter->rx_itr_setting;
603 }
604
605 /* add q_vector eims value to global eims_enable_mask */
606 adapter->eims_enable_mask |= 1 << v_idx;
92915f71 607
5f3600eb 608 ixgbevf_write_eitr(q_vector);
92915f71
GR		 609 }
610
611 ixgbevf_set_ivar(adapter, -1, 1, v_idx);
5f3600eb
AD		 612 /* setup eims_other and add value to global eims_enable_mask */
613 adapter->eims_other = 1 << v_idx;
614 adapter->eims_enable_mask |= adapter->eims_other;
92915f71
GR		 615}
616
617enum latency_range {
618 lowest_latency = 0,
619 low_latency = 1,
620 bulk_latency = 2,
621 latency_invalid = 255
622};
623
624/**
625 * ixgbevf_update_itr - update the dynamic ITR value based on statistics
5f3600eb
AD		 626 * @q_vector: structure containing interrupt and ring information
627 * @ring_container: structure containing ring performance data
92915f71
GR		 628 *
629 * Stores a new ITR value based on packets and byte
630 * counts during the last interrupt. The advantage of per interrupt
631 * computation is faster updates and more accurate ITR for the current
632 * traffic pattern. Constants in this function were computed
633 * based on theoretical maximum wire speed and thresholds were set based
634 * on testing data as well as attempting to minimize response time
635 * while increasing bulk throughput.
636 **/
5f3600eb
AD		 637static void ixgbevf_update_itr(struct ixgbevf_q_vector *q_vector,
638 struct ixgbevf_ring_container *ring_container)
92915f71 639{
5f3600eb
AD		 640 int bytes = ring_container->total_bytes;
641 int packets = ring_container->total_packets;
92915f71
GR		 642 u32 timepassed_us;
643 u64 bytes_perint;
5f3600eb 644 u8 itr_setting = ring_container->itr;
92915f71
GR		 645
646 if (packets == 0)
5f3600eb 647 return;
92915f71
GR		 648
649 /* simple throttlerate management
650 * 0-20MB/s lowest (100000 ints/s)
651 * 20-100MB/s low (20000 ints/s)
652 * 100-1249MB/s bulk (8000 ints/s)
653 */
654 /* what was last interrupt timeslice? */
5f3600eb 655 timepassed_us = q_vector->itr >> 2;
92915f71
GR		 656 bytes_perint = bytes / timepassed_us; /* bytes/usec */
657
658 switch (itr_setting) {
659 case lowest_latency:
e2c28ce7 660 if (bytes_perint > 10)
5f3600eb 661 itr_setting = low_latency;
92915f71
GR		 662 break;
663 case low_latency:
e2c28ce7 664 if (bytes_perint > 20)
5f3600eb 665 itr_setting = bulk_latency;
e2c28ce7 666 else if (bytes_perint <= 10)
5f3600eb 667 itr_setting = lowest_latency;
92915f71
GR		 668 break;
669 case bulk_latency:
e2c28ce7 670 if (bytes_perint <= 20)
5f3600eb 671 itr_setting = low_latency;
92915f71
GR		 672 break;
673 }
674
5f3600eb
AD		 675 /* clear work counters since we have the values we need */
676 ring_container->total_bytes = 0;
677 ring_container->total_packets = 0;
678
679 /* write updated itr to ring container */
680 ring_container->itr = itr_setting;
92915f71
GR		 681}
682
fa71ae27 683static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector)
92915f71 684{
5f3600eb
AD		 685 u32 new_itr = q_vector->itr;
686 u8 current_itr;
92915f71 687
5f3600eb
AD		 688 ixgbevf_update_itr(q_vector, &q_vector->tx);
689 ixgbevf_update_itr(q_vector, &q_vector->rx);
92915f71 690
6b43c446 691 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
92915f71
GR		 692
693 switch (current_itr) {
694 /* counts and packets in update_itr are dependent on these numbers */
695 case lowest_latency:
5f3600eb 696 new_itr = IXGBE_100K_ITR;
92915f71
GR		 697 break;
698 case low_latency:
5f3600eb 699 new_itr = IXGBE_20K_ITR;
92915f71
GR		 700 break;
701 case bulk_latency:
702 default:
5f3600eb 703 new_itr = IXGBE_8K_ITR;
92915f71
GR		 704 break;
705 }
706
5f3600eb 707 if (new_itr != q_vector->itr) {
92915f71 708 /* do an exponential smoothing */
5f3600eb
AD		 709 new_itr = (10 * new_itr * q_vector->itr) /
710 ((9 * new_itr) + q_vector->itr);
711
712 /* save the algorithm value here */
713 q_vector->itr = new_itr;
714
715 ixgbevf_write_eitr(q_vector);
92915f71 716 }
92915f71
GR		 717}
718
719static irqreturn_t ixgbevf_msix_mbx(int irq, void *data)
720{
fa71ae27 721 struct ixgbevf_adapter *adapter = data;
92915f71 722 struct ixgbe_hw *hw = &adapter->hw;
a9ee25a2 723 u32 msg;
375b27cf 724 bool got_ack = false;
92915f71 725
375b27cf
GR		 726 if (!hw->mbx.ops.check_for_ack(hw))
727 got_ack = true;
08259594 728
375b27cf
GR		 729 if (!hw->mbx.ops.check_for_msg(hw)) {
730 hw->mbx.ops.read(hw, &msg, 1);
a9ee25a2 731
375b27cf
GR		 732 if ((msg & IXGBE_MBVFICR_VFREQ_MASK) == IXGBE_PF_CONTROL_MSG)
733 mod_timer(&adapter->watchdog_timer,
734 round_jiffies(jiffies + 1));
a9ee25a2 735
375b27cf
GR		 736 if (msg & IXGBE_VT_MSGTYPE_NACK)
737 pr_warn("Last Request of type %2.2x to PF Nacked\n",
738 msg & 0xFF);
3a2c4033
GR		 739 /*
740 * Restore the PFSTS bit in case someone is polling for a
741 * return message from the PF
742 */
743 hw->mbx.v2p_mailbox |= IXGBE_VFMAILBOX_PFSTS;
375b27cf
GR		 744 }
745
746 /*
747 * checking for the ack clears the PFACK bit. Place
748 * it back in the v2p_mailbox cache so that anyone
749 * polling for an ack will not miss it
750 */
751 if (got_ack)
752 hw->mbx.v2p_mailbox |= IXGBE_VFMAILBOX_PFACK;
3a2c4033 753
5f3600eb
AD		 754 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_other);
755
92915f71
GR		 756 return IRQ_HANDLED;
757}
758
92915f71
GR		 759
760/**
fa71ae27 761 * ixgbevf_msix_clean_rings - single unshared vector rx clean (all queues)
92915f71
GR		 762 * @irq: unused
763 * @data: pointer to our q_vector struct for this interrupt vector
764 **/
fa71ae27 765static irqreturn_t ixgbevf_msix_clean_rings(int irq, void *data)
92915f71
GR		 766{
767 struct ixgbevf_q_vector *q_vector = data;
92915f71 768
5f3600eb 769 /* EIAM disabled interrupts (on this vector) for us */
fa71ae27
AD		 770 if (q_vector->rx.ring || q_vector->tx.ring)
771 napi_schedule(&q_vector->napi);
92915f71
GR		 772
773 return IRQ_HANDLED;
774}
775
776static inline void map_vector_to_rxq(struct ixgbevf_adapter *a, int v_idx,
777 int r_idx)
778{
779 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
780
6b43c446
AD		 781 a->rx_ring[r_idx].next = q_vector->rx.ring;
782 q_vector->rx.ring = &a->rx_ring[r_idx];
783 q_vector->rx.count++;
92915f71
GR		 784}
785
786static inline void map_vector_to_txq(struct ixgbevf_adapter *a, int v_idx,
787 int t_idx)
788{
789 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
790
6b43c446
AD		 791 a->tx_ring[t_idx].next = q_vector->tx.ring;
792 q_vector->tx.ring = &a->tx_ring[t_idx];
793 q_vector->tx.count++;
92915f71
GR		 794}
795
796/**
797 * ixgbevf_map_rings_to_vectors - Maps descriptor rings to vectors
798 * @adapter: board private structure to initialize
799 *
800 * This function maps descriptor rings to the queue-specific vectors
801 * we were allotted through the MSI-X enabling code. Ideally, we'd have
802 * one vector per ring/queue, but on a constrained vector budget, we
803 * group the rings as "efficiently" as possible. You would add new
804 * mapping configurations in here.
805 **/
806static int ixgbevf_map_rings_to_vectors(struct ixgbevf_adapter *adapter)
807{
808 int q_vectors;
809 int v_start = 0;
810 int rxr_idx = 0, txr_idx = 0;
811 int rxr_remaining = adapter->num_rx_queues;
812 int txr_remaining = adapter->num_tx_queues;
813 int i, j;
814 int rqpv, tqpv;
815 int err = 0;
816
817 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
818
819 /*
820 * The ideal configuration...
821 * We have enough vectors to map one per queue.
822 */
823 if (q_vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
824 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
825 map_vector_to_rxq(adapter, v_start, rxr_idx);
826
827 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
828 map_vector_to_txq(adapter, v_start, txr_idx);
829 goto out;
830 }
831
832 /*
833 * If we don't have enough vectors for a 1-to-1
834 * mapping, we'll have to group them so there are
835 * multiple queues per vector.
836 */
837 /* Re-adjusting *qpv takes care of the remainder. */
838 for (i = v_start; i < q_vectors; i++) {
839 rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - i);
840 for (j = 0; j < rqpv; j++) {
841 map_vector_to_rxq(adapter, i, rxr_idx);
842 rxr_idx++;
843 rxr_remaining--;
844 }
845 }
846 for (i = v_start; i < q_vectors; i++) {
847 tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - i);
848 for (j = 0; j < tqpv; j++) {
849 map_vector_to_txq(adapter, i, txr_idx);
850 txr_idx++;
851 txr_remaining--;
852 }
853 }
854
855out:
856 return err;
857}
858
859/**
860 * ixgbevf_request_msix_irqs - Initialize MSI-X interrupts
861 * @adapter: board private structure
862 *
863 * ixgbevf_request_msix_irqs allocates MSI-X vectors and requests
864 * interrupts from the kernel.
865 **/
866static int ixgbevf_request_msix_irqs(struct ixgbevf_adapter *adapter)
867{
868 struct net_device *netdev = adapter->netdev;
fa71ae27
AD		 869 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
870 int vector, err;
92915f71
GR		 871 int ri = 0, ti = 0;
872
92915f71 873 for (vector = 0; vector < q_vectors; vector++) {
fa71ae27
AD		 874 struct ixgbevf_q_vector *q_vector = adapter->q_vector[vector];
875 struct msix_entry *entry = &adapter->msix_entries[vector];
876
877 if (q_vector->tx.ring && q_vector->rx.ring) {
878 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
879 "%s-%s-%d", netdev->name, "TxRx", ri++);
880 ti++;
881 } else if (q_vector->rx.ring) {
882 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
883 "%s-%s-%d", netdev->name, "rx", ri++);
884 } else if (q_vector->tx.ring) {
885 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
886 "%s-%s-%d", netdev->name, "tx", ti++);
92915f71
GR		 887 } else {
888 /* skip this unused q_vector */
889 continue;
890 }
fa71ae27
AD		 891 err = request_irq(entry->vector, &ixgbevf_msix_clean_rings, 0,
892 q_vector->name, q_vector);
92915f71
GR		 893 if (err) {
894 hw_dbg(&adapter->hw,
895 "request_irq failed for MSIX interrupt "
896 "Error: %d\n", err);
897 goto free_queue_irqs;
898 }
899 }
900
92915f71 901 err = request_irq(adapter->msix_entries[vector].vector,
fa71ae27 902 &ixgbevf_msix_mbx, 0, netdev->name, adapter);
92915f71
GR		 903 if (err) {
904 hw_dbg(&adapter->hw,
905 "request_irq for msix_mbx failed: %d\n", err);
906 goto free_queue_irqs;
907 }
908
909 return 0;
910
911free_queue_irqs:
fa71ae27
AD		 912 while (vector) {
913 vector--;
914 free_irq(adapter->msix_entries[vector].vector,
915 adapter->q_vector[vector]);
916 }
92915f71
GR		 917 pci_disable_msix(adapter->pdev);
918 kfree(adapter->msix_entries);
919 adapter->msix_entries = NULL;
920 return err;
921}
922
923static inline void ixgbevf_reset_q_vectors(struct ixgbevf_adapter *adapter)
924{
925 int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
926
927 for (i = 0; i < q_vectors; i++) {
928 struct ixgbevf_q_vector *q_vector = adapter->q_vector[i];
6b43c446
AD		 929 q_vector->rx.ring = NULL;
930 q_vector->tx.ring = NULL;
931 q_vector->rx.count = 0;
932 q_vector->tx.count = 0;
92915f71
GR		 933 }
934}
935
936/**
937 * ixgbevf_request_irq - initialize interrupts
938 * @adapter: board private structure
939 *
940 * Attempts to configure interrupts using the best available
941 * capabilities of the hardware and kernel.
942 **/
943static int ixgbevf_request_irq(struct ixgbevf_adapter *adapter)
944{
945 int err = 0;
946
947 err = ixgbevf_request_msix_irqs(adapter);
948
949 if (err)
950 hw_dbg(&adapter->hw,
951 "request_irq failed, Error %d\n", err);
952
953 return err;
954}
955
956static void ixgbevf_free_irq(struct ixgbevf_adapter *adapter)
957{
92915f71
GR		 958 int i, q_vectors;
959
960 q_vectors = adapter->num_msix_vectors;
92915f71
GR		 961 i = q_vectors - 1;
962
fa71ae27 963 free_irq(adapter->msix_entries[i].vector, adapter);
92915f71
GR		 964 i--;
965
966 for (; i >= 0; i--) {
fa71ae27
AD		 967 /* free only the irqs that were actually requested */
968 if (!adapter->q_vector[i]->rx.ring &&
969 !adapter->q_vector[i]->tx.ring)
970 continue;
971
92915f71
GR		 972 free_irq(adapter->msix_entries[i].vector,
973 adapter->q_vector[i]);
974 }
975
976 ixgbevf_reset_q_vectors(adapter);
977}
978
979/**
980 * ixgbevf_irq_disable - Mask off interrupt generation on the NIC
981 * @adapter: board private structure
982 **/
983static inline void ixgbevf_irq_disable(struct ixgbevf_adapter *adapter)
984{
92915f71 985 struct ixgbe_hw *hw = &adapter->hw;
5f3600eb 986 int i;
92915f71 987
5f3600eb 988 IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, 0);
92915f71 989 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, ~0);
5f3600eb 990 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, 0);
92915f71
GR		 991
992 IXGBE_WRITE_FLUSH(hw);
993
994 for (i = 0; i < adapter->num_msix_vectors; i++)
995 synchronize_irq(adapter->msix_entries[i].vector);
996}
997
998/**
999 * ixgbevf_irq_enable - Enable default interrupt generation settings
1000 * @adapter: board private structure
1001 **/
5f3600eb 1002static inline void ixgbevf_irq_enable(struct ixgbevf_adapter *adapter)
92915f71
GR		 1003{
1004 struct ixgbe_hw *hw = &adapter->hw;
92915f71 1005
5f3600eb
AD		 1006 IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, adapter->eims_enable_mask);
1007 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, adapter->eims_enable_mask);
1008 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_enable_mask);
92915f71
GR		 1009}
1010
1011/**
1012 * ixgbevf_configure_tx - Configure 82599 VF Transmit Unit after Reset
1013 * @adapter: board private structure
1014 *
1015 * Configure the Tx unit of the MAC after a reset.
1016 **/
1017static void ixgbevf_configure_tx(struct ixgbevf_adapter *adapter)
1018{
1019 u64 tdba;
1020 struct ixgbe_hw *hw = &adapter->hw;
1021 u32 i, j, tdlen, txctrl;
1022
1023 /* Setup the HW Tx Head and Tail descriptor pointers */
1024 for (i = 0; i < adapter->num_tx_queues; i++) {
1025 struct ixgbevf_ring *ring = &adapter->tx_ring[i];
1026 j = ring->reg_idx;
1027 tdba = ring->dma;
1028 tdlen = ring->count * sizeof(union ixgbe_adv_tx_desc);
1029 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(j),
1030 (tdba & DMA_BIT_MASK(32)));
1031 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAH(j), (tdba >> 32));
1032 IXGBE_WRITE_REG(hw, IXGBE_VFTDLEN(j), tdlen);
1033 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(j), 0);
1034 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(j), 0);
1035 adapter->tx_ring[i].head = IXGBE_VFTDH(j);
1036 adapter->tx_ring[i].tail = IXGBE_VFTDT(j);
1037 /* Disable Tx Head Writeback RO bit, since this hoses
1038 * bookkeeping if things aren't delivered in order.
1039 */
1040 txctrl = IXGBE_READ_REG(hw, IXGBE_VFDCA_TXCTRL(j));
1041 txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN;
1042 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(j), txctrl);
1043 }
1044}
1045
1046#define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1047
1048static void ixgbevf_configure_srrctl(struct ixgbevf_adapter *adapter, int index)
1049{
1050 struct ixgbevf_ring *rx_ring;
1051 struct ixgbe_hw *hw = &adapter->hw;
1052 u32 srrctl;
1053
1054 rx_ring = &adapter->rx_ring[index];
1055
1056 srrctl = IXGBE_SRRCTL_DROP_EN;
1057
77d5dfca 1058 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
92915f71 1059
dd1fe113
AD		 1060 srrctl |= ALIGN(rx_ring->rx_buf_len, 1024) >>
1061 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1062
92915f71
GR		 1063 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(index), srrctl);
1064}
1065
dd1fe113
AD		 1066static void ixgbevf_set_rx_buffer_len(struct ixgbevf_adapter *adapter)
1067{
1068 struct ixgbe_hw *hw = &adapter->hw;
1069 struct net_device *netdev = adapter->netdev;
1070 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1071 int i;
1072 u16 rx_buf_len;
1073
1074 /* notify the PF of our intent to use this size of frame */
1075 ixgbevf_rlpml_set_vf(hw, max_frame);
1076
1077 /* PF will allow an extra 4 bytes past for vlan tagged frames */
1078 max_frame += VLAN_HLEN;
1079
1080 /*
1081 * Make best use of allocation by using all but 1K of a
1082 * power of 2 allocation that will be used for skb->head.
1083 */
1084 if ((hw->mac.type == ixgbe_mac_X540_vf) &&
1085 (max_frame <= MAXIMUM_ETHERNET_VLAN_SIZE))
1086 rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1087 else if (max_frame <= IXGBEVF_RXBUFFER_3K)
1088 rx_buf_len = IXGBEVF_RXBUFFER_3K;
1089 else if (max_frame <= IXGBEVF_RXBUFFER_7K)
1090 rx_buf_len = IXGBEVF_RXBUFFER_7K;
1091 else if (max_frame <= IXGBEVF_RXBUFFER_15K)
1092 rx_buf_len = IXGBEVF_RXBUFFER_15K;
1093 else
1094 rx_buf_len = IXGBEVF_MAX_RXBUFFER;
1095
1096 for (i = 0; i < adapter->num_rx_queues; i++)
1097 adapter->rx_ring[i].rx_buf_len = rx_buf_len;
1098}
1099
92915f71
GR		 1100/**
1101 * ixgbevf_configure_rx - Configure 82599 VF Receive Unit after Reset
1102 * @adapter: board private structure
1103 *
1104 * Configure the Rx unit of the MAC after a reset.
1105 **/
1106static void ixgbevf_configure_rx(struct ixgbevf_adapter *adapter)
1107{
1108 u64 rdba;
1109 struct ixgbe_hw *hw = &adapter->hw;
92915f71
GR		 1110 int i, j;
1111 u32 rdlen;
92915f71 1112
77d5dfca
AD		 1113 /* PSRTYPE must be initialized in 82599 */
1114 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0);
dd1fe113
AD		 1115
1116 /* set_rx_buffer_len must be called before ring initialization */
1117 ixgbevf_set_rx_buffer_len(adapter);
92915f71
GR		 1118
1119 rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
1120 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1121 * the Base and Length of the Rx Descriptor Ring */
1122 for (i = 0; i < adapter->num_rx_queues; i++) {
1123 rdba = adapter->rx_ring[i].dma;
1124 j = adapter->rx_ring[i].reg_idx;
1125 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAL(j),
1126 (rdba & DMA_BIT_MASK(32)));
1127 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAH(j), (rdba >> 32));
1128 IXGBE_WRITE_REG(hw, IXGBE_VFRDLEN(j), rdlen);
1129 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(j), 0);
1130 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(j), 0);
1131 adapter->rx_ring[i].head = IXGBE_VFRDH(j);
1132 adapter->rx_ring[i].tail = IXGBE_VFRDT(j);
92915f71
GR		 1133
1134 ixgbevf_configure_srrctl(adapter, j);
1135 }
1136}
1137
8e586137 1138static int ixgbevf_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
92915f71
GR		 1139{
1140 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1141 struct ixgbe_hw *hw = &adapter->hw;
92915f71 1142
1c55ed76
AD		 1143 spin_lock(&adapter->mbx_lock);
1144
92915f71
GR		 1145 /* add VID to filter table */
1146 if (hw->mac.ops.set_vfta)
1147 hw->mac.ops.set_vfta(hw, vid, 0, true);
1c55ed76
AD		 1148
1149 spin_unlock(&adapter->mbx_lock);
1150
dadcd65f 1151 set_bit(vid, adapter->active_vlans);
8e586137
JP		 1152
1153 return 0;
92915f71
GR		 1154}
1155
8e586137 1156static int ixgbevf_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
92915f71
GR		 1157{
1158 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1159 struct ixgbe_hw *hw = &adapter->hw;
1160
1c55ed76
AD		 1161 spin_lock(&adapter->mbx_lock);
1162
92915f71
GR		 1163 /* remove VID from filter table */
1164 if (hw->mac.ops.set_vfta)
1165 hw->mac.ops.set_vfta(hw, vid, 0, false);
1c55ed76
AD		 1166
1167 spin_unlock(&adapter->mbx_lock);
1168
dadcd65f 1169 clear_bit(vid, adapter->active_vlans);
8e586137
JP		 1170
1171 return 0;
92915f71
GR		 1172}
1173
1174static void ixgbevf_restore_vlan(struct ixgbevf_adapter *adapter)
1175{
dadcd65f 1176 u16 vid;
92915f71 1177
dadcd65f
JP		 1178 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
1179 ixgbevf_vlan_rx_add_vid(adapter->netdev, vid);
92915f71
GR		 1180}
1181
46ec20ff
GR		 1182static int ixgbevf_write_uc_addr_list(struct net_device *netdev)
1183{
1184 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1185 struct ixgbe_hw *hw = &adapter->hw;
1186 int count = 0;
1187
1188 if ((netdev_uc_count(netdev)) > 10) {
dbd9636e 1189 pr_err("Too many unicast filters - No Space\n");
46ec20ff
GR		 1190 return -ENOSPC;
1191 }
1192
1193 if (!netdev_uc_empty(netdev)) {
1194 struct netdev_hw_addr *ha;
1195 netdev_for_each_uc_addr(ha, netdev) {
1196 hw->mac.ops.set_uc_addr(hw, ++count, ha->addr);
1197 udelay(200);
1198 }
1199 } else {
1200 /*
1201 * If the list is empty then send message to PF driver to
1202 * clear all macvlans on this VF.
1203 */
1204 hw->mac.ops.set_uc_addr(hw, 0, NULL);
1205 }
1206
1207 return count;
1208}
1209
92915f71
GR		 1210/**
1211 * ixgbevf_set_rx_mode - Multicast set
1212 * @netdev: network interface device structure
1213 *
1214 * The set_rx_method entry point is called whenever the multicast address
1215 * list or the network interface flags are updated. This routine is
1216 * responsible for configuring the hardware for proper multicast mode.
1217 **/
1218static void ixgbevf_set_rx_mode(struct net_device *netdev)
1219{
1220 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1221 struct ixgbe_hw *hw = &adapter->hw;
92915f71 1222
1c55ed76
AD		 1223 spin_lock(&adapter->mbx_lock);
1224
92915f71 1225 /* reprogram multicast list */
92915f71 1226 if (hw->mac.ops.update_mc_addr_list)
5c58c47a 1227 hw->mac.ops.update_mc_addr_list(hw, netdev);
46ec20ff
GR		 1228
1229 ixgbevf_write_uc_addr_list(netdev);
1c55ed76
AD		 1230
1231 spin_unlock(&adapter->mbx_lock);
92915f71
GR		 1232}
1233
1234static void ixgbevf_napi_enable_all(struct ixgbevf_adapter *adapter)
1235{
1236 int q_idx;
1237 struct ixgbevf_q_vector *q_vector;
1238 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1239
1240 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
92915f71 1241 q_vector = adapter->q_vector[q_idx];
fa71ae27 1242 napi_enable(&q_vector->napi);
92915f71
GR		 1243 }
1244}
1245
1246static void ixgbevf_napi_disable_all(struct ixgbevf_adapter *adapter)
1247{
1248 int q_idx;
1249 struct ixgbevf_q_vector *q_vector;
1250 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1251
1252 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1253 q_vector = adapter->q_vector[q_idx];
92915f71
GR		 1254 napi_disable(&q_vector->napi);
1255 }
1256}
1257
1258static void ixgbevf_configure(struct ixgbevf_adapter *adapter)
1259{
1260 struct net_device *netdev = adapter->netdev;
1261 int i;
1262
1263 ixgbevf_set_rx_mode(netdev);
1264
1265 ixgbevf_restore_vlan(adapter);
1266
1267 ixgbevf_configure_tx(adapter);
1268 ixgbevf_configure_rx(adapter);
1269 for (i = 0; i < adapter->num_rx_queues; i++) {
1270 struct ixgbevf_ring *ring = &adapter->rx_ring[i];
18c63089
AD		 1271 ixgbevf_alloc_rx_buffers(adapter, ring,
1272 IXGBE_DESC_UNUSED(ring));
92915f71
GR		 1273 }
1274}
1275
1276#define IXGBE_MAX_RX_DESC_POLL 10
1277static inline void ixgbevf_rx_desc_queue_enable(struct ixgbevf_adapter *adapter,
1278 int rxr)
1279{
1280 struct ixgbe_hw *hw = &adapter->hw;
1281 int j = adapter->rx_ring[rxr].reg_idx;
1282 int k;
1283
1284 for (k = 0; k < IXGBE_MAX_RX_DESC_POLL; k++) {
1285 if (IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j)) & IXGBE_RXDCTL_ENABLE)
1286 break;
1287 else
1288 msleep(1);
1289 }
1290 if (k >= IXGBE_MAX_RX_DESC_POLL) {
1291 hw_dbg(hw, "RXDCTL.ENABLE on Rx queue %d "
1292 "not set within the polling period\n", rxr);
1293 }
1294
1295 ixgbevf_release_rx_desc(&adapter->hw, &adapter->rx_ring[rxr],
1296 (adapter->rx_ring[rxr].count - 1));
1297}
1298
33bd9f60
GR		 1299static void ixgbevf_save_reset_stats(struct ixgbevf_adapter *adapter)
1300{
1301 /* Only save pre-reset stats if there are some */
1302 if (adapter->stats.vfgprc || adapter->stats.vfgptc) {
1303 adapter->stats.saved_reset_vfgprc += adapter->stats.vfgprc -
1304 adapter->stats.base_vfgprc;
1305 adapter->stats.saved_reset_vfgptc += adapter->stats.vfgptc -
1306 adapter->stats.base_vfgptc;
1307 adapter->stats.saved_reset_vfgorc += adapter->stats.vfgorc -
1308 adapter->stats.base_vfgorc;
1309 adapter->stats.saved_reset_vfgotc += adapter->stats.vfgotc -
1310 adapter->stats.base_vfgotc;
1311 adapter->stats.saved_reset_vfmprc += adapter->stats.vfmprc -
1312 adapter->stats.base_vfmprc;
1313 }
1314}
1315
1316static void ixgbevf_init_last_counter_stats(struct ixgbevf_adapter *adapter)
1317{
1318 struct ixgbe_hw *hw = &adapter->hw;
1319
1320 adapter->stats.last_vfgprc = IXGBE_READ_REG(hw, IXGBE_VFGPRC);
1321 adapter->stats.last_vfgorc = IXGBE_READ_REG(hw, IXGBE_VFGORC_LSB);
1322 adapter->stats.last_vfgorc |=
1323 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGORC_MSB))) << 32);
1324 adapter->stats.last_vfgptc = IXGBE_READ_REG(hw, IXGBE_VFGPTC);
1325 adapter->stats.last_vfgotc = IXGBE_READ_REG(hw, IXGBE_VFGOTC_LSB);
1326 adapter->stats.last_vfgotc |=
1327 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGOTC_MSB))) << 32);
1328 adapter->stats.last_vfmprc = IXGBE_READ_REG(hw, IXGBE_VFMPRC);
1329
1330 adapter->stats.base_vfgprc = adapter->stats.last_vfgprc;
1331 adapter->stats.base_vfgorc = adapter->stats.last_vfgorc;
1332 adapter->stats.base_vfgptc = adapter->stats.last_vfgptc;
1333 adapter->stats.base_vfgotc = adapter->stats.last_vfgotc;
1334 adapter->stats.base_vfmprc = adapter->stats.last_vfmprc;
1335}
1336
795180d8 1337static void ixgbevf_up_complete(struct ixgbevf_adapter *adapter)
92915f71
GR		 1338{
1339 struct net_device *netdev = adapter->netdev;
1340 struct ixgbe_hw *hw = &adapter->hw;
1341 int i, j = 0;
1342 int num_rx_rings = adapter->num_rx_queues;
1343 u32 txdctl, rxdctl;
1344
1345 for (i = 0; i < adapter->num_tx_queues; i++) {
1346 j = adapter->tx_ring[i].reg_idx;
1347 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1348 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
1349 txdctl |= (8 << 16);
1350 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl);
1351 }
1352
1353 for (i = 0; i < adapter->num_tx_queues; i++) {
1354 j = adapter->tx_ring[i].reg_idx;
1355 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1356 txdctl |= IXGBE_TXDCTL_ENABLE;
1357 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl);
1358 }
1359
1360 for (i = 0; i < num_rx_rings; i++) {
1361 j = adapter->rx_ring[i].reg_idx;
1362 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j));
dadcd65f 1363 rxdctl |= IXGBE_RXDCTL_ENABLE | IXGBE_RXDCTL_VME;
69bfbec4
GR		 1364 if (hw->mac.type == ixgbe_mac_X540_vf) {
1365 rxdctl &= ~IXGBE_RXDCTL_RLPMLMASK;
1366 rxdctl |= ((netdev->mtu + ETH_HLEN + ETH_FCS_LEN) |
1367 IXGBE_RXDCTL_RLPML_EN);
1368 }
92915f71
GR		 1369 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(j), rxdctl);
1370 ixgbevf_rx_desc_queue_enable(adapter, i);
1371 }
1372
1373 ixgbevf_configure_msix(adapter);
1374
1c55ed76
AD		 1375 spin_lock(&adapter->mbx_lock);
1376
92915f71
GR		 1377 if (hw->mac.ops.set_rar) {
1378 if (is_valid_ether_addr(hw->mac.addr))
1379 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
1380 else
1381 hw->mac.ops.set_rar(hw, 0, hw->mac.perm_addr, 0);
1382 }
1383
1c55ed76
AD		 1384 spin_unlock(&adapter->mbx_lock);
1385
92915f71
GR		 1386 clear_bit(__IXGBEVF_DOWN, &adapter->state);
1387 ixgbevf_napi_enable_all(adapter);
1388
1389 /* enable transmits */
1390 netif_tx_start_all_queues(netdev);
1391
33bd9f60
GR		 1392 ixgbevf_save_reset_stats(adapter);
1393 ixgbevf_init_last_counter_stats(adapter);
1394
92915f71 1395 mod_timer(&adapter->watchdog_timer, jiffies);
92915f71
GR		 1396}
1397
795180d8 1398void ixgbevf_up(struct ixgbevf_adapter *adapter)
92915f71 1399{
92915f71
GR		 1400 struct ixgbe_hw *hw = &adapter->hw;
1401
1402 ixgbevf_configure(adapter);
1403
795180d8 1404 ixgbevf_up_complete(adapter);
92915f71
GR		 1405
1406 /* clear any pending interrupts, may auto mask */
1407 IXGBE_READ_REG(hw, IXGBE_VTEICR);
1408
5f3600eb 1409 ixgbevf_irq_enable(adapter);
92915f71
GR		 1410}
1411
1412/**
1413 * ixgbevf_clean_rx_ring - Free Rx Buffers per Queue
1414 * @adapter: board private structure
1415 * @rx_ring: ring to free buffers from
1416 **/
1417static void ixgbevf_clean_rx_ring(struct ixgbevf_adapter *adapter,
1418 struct ixgbevf_ring *rx_ring)
1419{
1420 struct pci_dev *pdev = adapter->pdev;
1421 unsigned long size;
1422 unsigned int i;
1423
c0456c23
GR		 1424 if (!rx_ring->rx_buffer_info)
1425 return;
92915f71 1426
c0456c23 1427 /* Free all the Rx ring sk_buffs */
92915f71
GR		 1428 for (i = 0; i < rx_ring->count; i++) {
1429 struct ixgbevf_rx_buffer *rx_buffer_info;
1430
1431 rx_buffer_info = &rx_ring->rx_buffer_info[i];
1432 if (rx_buffer_info->dma) {
2a1f8794 1433 dma_unmap_single(&pdev->dev, rx_buffer_info->dma,
92915f71 1434 rx_ring->rx_buf_len,
2a1f8794 1435 DMA_FROM_DEVICE);
92915f71
GR		 1436 rx_buffer_info->dma = 0;
1437 }
1438 if (rx_buffer_info->skb) {
1439 struct sk_buff *skb = rx_buffer_info->skb;
1440 rx_buffer_info->skb = NULL;
1441 do {
1442 struct sk_buff *this = skb;
1443 skb = skb->prev;
1444 dev_kfree_skb(this);
1445 } while (skb);
1446 }
92915f71
GR		 1447 }
1448
1449 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
1450 memset(rx_ring->rx_buffer_info, 0, size);
1451
1452 /* Zero out the descriptor ring */
1453 memset(rx_ring->desc, 0, rx_ring->size);
1454
1455 rx_ring->next_to_clean = 0;
1456 rx_ring->next_to_use = 0;
1457
1458 if (rx_ring->head)
1459 writel(0, adapter->hw.hw_addr + rx_ring->head);
1460 if (rx_ring->tail)
1461 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1462}
1463
1464/**
1465 * ixgbevf_clean_tx_ring - Free Tx Buffers
1466 * @adapter: board private structure
1467 * @tx_ring: ring to be cleaned
1468 **/
1469static void ixgbevf_clean_tx_ring(struct ixgbevf_adapter *adapter,
1470 struct ixgbevf_ring *tx_ring)
1471{
1472 struct ixgbevf_tx_buffer *tx_buffer_info;
1473 unsigned long size;
1474 unsigned int i;
1475
c0456c23
GR		 1476 if (!tx_ring->tx_buffer_info)
1477 return;
1478
92915f71
GR		 1479 /* Free all the Tx ring sk_buffs */
1480
1481 for (i = 0; i < tx_ring->count; i++) {
1482 tx_buffer_info = &tx_ring->tx_buffer_info[i];
70a10e25 1483 ixgbevf_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
92915f71
GR		 1484 }
1485
1486 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
1487 memset(tx_ring->tx_buffer_info, 0, size);
1488
1489 memset(tx_ring->desc, 0, tx_ring->size);
1490
1491 tx_ring->next_to_use = 0;
1492 tx_ring->next_to_clean = 0;
1493
1494 if (tx_ring->head)
1495 writel(0, adapter->hw.hw_addr + tx_ring->head);
1496 if (tx_ring->tail)
1497 writel(0, adapter->hw.hw_addr + tx_ring->tail);
1498}
1499
1500/**
1501 * ixgbevf_clean_all_rx_rings - Free Rx Buffers for all queues
1502 * @adapter: board private structure
1503 **/
1504static void ixgbevf_clean_all_rx_rings(struct ixgbevf_adapter *adapter)
1505{
1506 int i;
1507
1508 for (i = 0; i < adapter->num_rx_queues; i++)
1509 ixgbevf_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1510}
1511
1512/**
1513 * ixgbevf_clean_all_tx_rings - Free Tx Buffers for all queues
1514 * @adapter: board private structure
1515 **/
1516static void ixgbevf_clean_all_tx_rings(struct ixgbevf_adapter *adapter)
1517{
1518 int i;
1519
1520 for (i = 0; i < adapter->num_tx_queues; i++)
1521 ixgbevf_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1522}
1523
1524void ixgbevf_down(struct ixgbevf_adapter *adapter)
1525{
1526 struct net_device *netdev = adapter->netdev;
1527 struct ixgbe_hw *hw = &adapter->hw;
1528 u32 txdctl;
1529 int i, j;
1530
1531 /* signal that we are down to the interrupt handler */
1532 set_bit(__IXGBEVF_DOWN, &adapter->state);
1533 /* disable receives */
1534
1535 netif_tx_disable(netdev);
1536
1537 msleep(10);
1538
1539 netif_tx_stop_all_queues(netdev);
1540
1541 ixgbevf_irq_disable(adapter);
1542
1543 ixgbevf_napi_disable_all(adapter);
1544
1545 del_timer_sync(&adapter->watchdog_timer);
1546 /* can't call flush scheduled work here because it can deadlock
1547 * if linkwatch_event tries to acquire the rtnl_lock which we are
1548 * holding */
1549 while (adapter->flags & IXGBE_FLAG_IN_WATCHDOG_TASK)
1550 msleep(1);
1551
1552 /* disable transmits in the hardware now that interrupts are off */
1553 for (i = 0; i < adapter->num_tx_queues; i++) {
1554 j = adapter->tx_ring[i].reg_idx;
1555 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1556 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j),
1557 (txdctl & ~IXGBE_TXDCTL_ENABLE));
1558 }
1559
1560 netif_carrier_off(netdev);
1561
1562 if (!pci_channel_offline(adapter->pdev))
1563 ixgbevf_reset(adapter);
1564
1565 ixgbevf_clean_all_tx_rings(adapter);
1566 ixgbevf_clean_all_rx_rings(adapter);
1567}
1568
1569void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter)
1570{
c0456c23
GR		 1571 struct ixgbe_hw *hw = &adapter->hw;
1572
92915f71 1573 WARN_ON(in_interrupt());
c0456c23 1574
92915f71
GR		 1575 while (test_and_set_bit(__IXGBEVF_RESETTING, &adapter->state))
1576 msleep(1);
1577
c0456c23
GR		 1578 /*
1579 * Check if PF is up before re-init. If not then skip until
1580 * later when the PF is up and ready to service requests from
1581 * the VF via mailbox. If the VF is up and running then the
1582 * watchdog task will continue to schedule reset tasks until
1583 * the PF is up and running.
1584 */
1585 if (!hw->mac.ops.reset_hw(hw)) {
1586 ixgbevf_down(adapter);
1587 ixgbevf_up(adapter);
1588 }
92915f71
GR		 1589
1590 clear_bit(__IXGBEVF_RESETTING, &adapter->state);
1591}
1592
1593void ixgbevf_reset(struct ixgbevf_adapter *adapter)
1594{
1595 struct ixgbe_hw *hw = &adapter->hw;
1596 struct net_device *netdev = adapter->netdev;
1597
1c55ed76
AD		 1598 spin_lock(&adapter->mbx_lock);
1599
92915f71
GR		 1600 if (hw->mac.ops.reset_hw(hw))
1601 hw_dbg(hw, "PF still resetting\n");
1602 else
1603 hw->mac.ops.init_hw(hw);
1604
1c55ed76
AD		 1605 spin_unlock(&adapter->mbx_lock);
1606
92915f71
GR		 1607 if (is_valid_ether_addr(adapter->hw.mac.addr)) {
1608 memcpy(netdev->dev_addr, adapter->hw.mac.addr,
1609 netdev->addr_len);
1610 memcpy(netdev->perm_addr, adapter->hw.mac.addr,
1611 netdev->addr_len);
1612 }
1613}
1614
1615static void ixgbevf_acquire_msix_vectors(struct ixgbevf_adapter *adapter,
1616 int vectors)
1617{
1618 int err, vector_threshold;
1619
fa71ae27
AD		 1620 /* We'll want at least 2 (vector_threshold):
1621 * 1) TxQ[0] + RxQ[0] handler
1622 * 2) Other (Link Status Change, etc.)
92915f71
GR		 1623 */
1624 vector_threshold = MIN_MSIX_COUNT;
1625
1626 /* The more we get, the more we will assign to Tx/Rx Cleanup
1627 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
1628 * Right now, we simply care about how many we'll get; we'll
1629 * set them up later while requesting irq's.
1630 */
1631 while (vectors >= vector_threshold) {
1632 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
1633 vectors);
1634 if (!err) /* Success in acquiring all requested vectors. */
1635 break;
1636 else if (err < 0)
1637 vectors = 0; /* Nasty failure, quit now */
1638 else /* err == number of vectors we should try again with */
1639 vectors = err;
1640 }
1641
1642 if (vectors < vector_threshold) {
1643 /* Can't allocate enough MSI-X interrupts? Oh well.
1644 * This just means we'll go with either a single MSI
1645 * vector or fall back to legacy interrupts.
1646 */
1647 hw_dbg(&adapter->hw,
1648 "Unable to allocate MSI-X interrupts\n");
1649 kfree(adapter->msix_entries);
1650 adapter->msix_entries = NULL;
1651 } else {
1652 /*
1653 * Adjust for only the vectors we'll use, which is minimum
1654 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
1655 * vectors we were allocated.
1656 */
1657 adapter->num_msix_vectors = vectors;
1658 }
1659}
1660
49ce9c2c
BH		 1661/**
1662 * ixgbevf_set_num_queues - Allocate queues for device, feature dependent
92915f71
GR		 1663 * @adapter: board private structure to initialize
1664 *
1665 * This is the top level queue allocation routine. The order here is very
1666 * important, starting with the "most" number of features turned on at once,
1667 * and ending with the smallest set of features. This way large combinations
1668 * can be allocated if they're turned on, and smaller combinations are the
1669 * fallthrough conditions.
1670 *
1671 **/
1672static void ixgbevf_set_num_queues(struct ixgbevf_adapter *adapter)
1673{
1674 /* Start with base case */
1675 adapter->num_rx_queues = 1;
1676 adapter->num_tx_queues = 1;
92915f71
GR		 1677}
1678
1679/**
1680 * ixgbevf_alloc_queues - Allocate memory for all rings
1681 * @adapter: board private structure to initialize
1682 *
1683 * We allocate one ring per queue at run-time since we don't know the
1684 * number of queues at compile-time. The polling_netdev array is
1685 * intended for Multiqueue, but should work fine with a single queue.
1686 **/
1687static int ixgbevf_alloc_queues(struct ixgbevf_adapter *adapter)
1688{
1689 int i;
1690
1691 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1692 sizeof(struct ixgbevf_ring), GFP_KERNEL);
1693 if (!adapter->tx_ring)
1694 goto err_tx_ring_allocation;
1695
1696 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1697 sizeof(struct ixgbevf_ring), GFP_KERNEL);
1698 if (!adapter->rx_ring)
1699 goto err_rx_ring_allocation;
1700
1701 for (i = 0; i < adapter->num_tx_queues; i++) {
1702 adapter->tx_ring[i].count = adapter->tx_ring_count;
1703 adapter->tx_ring[i].queue_index = i;
1704 adapter->tx_ring[i].reg_idx = i;
fb40195c
AD		 1705 adapter->tx_ring[i].dev = &adapter->pdev->dev;
1706 adapter->tx_ring[i].netdev = adapter->netdev;
92915f71
GR		 1707 }
1708
1709 for (i = 0; i < adapter->num_rx_queues; i++) {
1710 adapter->rx_ring[i].count = adapter->rx_ring_count;
1711 adapter->rx_ring[i].queue_index = i;
1712 adapter->rx_ring[i].reg_idx = i;
fb40195c
AD		 1713 adapter->rx_ring[i].dev = &adapter->pdev->dev;
1714 adapter->rx_ring[i].netdev = adapter->netdev;
92915f71
GR		 1715 }
1716
1717 return 0;
1718
1719err_rx_ring_allocation:
1720 kfree(adapter->tx_ring);
1721err_tx_ring_allocation:
1722 return -ENOMEM;
1723}
1724
1725/**
1726 * ixgbevf_set_interrupt_capability - set MSI-X or FAIL if not supported
1727 * @adapter: board private structure to initialize
1728 *
1729 * Attempt to configure the interrupts using the best available
1730 * capabilities of the hardware and the kernel.
1731 **/
1732static int ixgbevf_set_interrupt_capability(struct ixgbevf_adapter *adapter)
1733{
1734 int err = 0;
1735 int vector, v_budget;
1736
1737 /*
1738 * It's easy to be greedy for MSI-X vectors, but it really
1739 * doesn't do us much good if we have a lot more vectors
1740 * than CPU's. So let's be conservative and only ask for
fa71ae27
AD		 1741 * (roughly) the same number of vectors as there are CPU's.
1742 * The default is to use pairs of vectors.
92915f71 1743 */
fa71ae27
AD		 1744 v_budget = max(adapter->num_rx_queues, adapter->num_tx_queues);
1745 v_budget = min_t(int, v_budget, num_online_cpus());
1746 v_budget += NON_Q_VECTORS;
92915f71
GR		 1747
1748 /* A failure in MSI-X entry allocation isn't fatal, but it does
1749 * mean we disable MSI-X capabilities of the adapter. */
1750 adapter->msix_entries = kcalloc(v_budget,
1751 sizeof(struct msix_entry), GFP_KERNEL);
1752 if (!adapter->msix_entries) {
1753 err = -ENOMEM;
1754 goto out;
1755 }
1756
1757 for (vector = 0; vector < v_budget; vector++)
1758 adapter->msix_entries[vector].entry = vector;
1759
1760 ixgbevf_acquire_msix_vectors(adapter, v_budget);
1761
1762out:
1763 return err;
1764}
1765
1766/**
1767 * ixgbevf_alloc_q_vectors - Allocate memory for interrupt vectors
1768 * @adapter: board private structure to initialize
1769 *
1770 * We allocate one q_vector per queue interrupt. If allocation fails we
1771 * return -ENOMEM.
1772 **/
1773static int ixgbevf_alloc_q_vectors(struct ixgbevf_adapter *adapter)
1774{
1775 int q_idx, num_q_vectors;
1776 struct ixgbevf_q_vector *q_vector;
92915f71
GR		 1777
1778 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
92915f71
GR		 1779
1780 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
1781 q_vector = kzalloc(sizeof(struct ixgbevf_q_vector), GFP_KERNEL);
1782 if (!q_vector)
1783 goto err_out;
1784 q_vector->adapter = adapter;
1785 q_vector->v_idx = q_idx;
fa71ae27
AD		 1786 netif_napi_add(adapter->netdev, &q_vector->napi,
1787 ixgbevf_poll, 64);
92915f71
GR		 1788 adapter->q_vector[q_idx] = q_vector;
1789 }
1790
1791 return 0;
1792
1793err_out:
1794 while (q_idx) {
1795 q_idx--;
1796 q_vector = adapter->q_vector[q_idx];
1797 netif_napi_del(&q_vector->napi);
1798 kfree(q_vector);
1799 adapter->q_vector[q_idx] = NULL;
1800 }
1801 return -ENOMEM;
1802}
1803
1804/**
1805 * ixgbevf_free_q_vectors - Free memory allocated for interrupt vectors
1806 * @adapter: board private structure to initialize
1807 *
1808 * This function frees the memory allocated to the q_vectors. In addition if
1809 * NAPI is enabled it will delete any references to the NAPI struct prior
1810 * to freeing the q_vector.
1811 **/
1812static void ixgbevf_free_q_vectors(struct ixgbevf_adapter *adapter)
1813{
1814 int q_idx, num_q_vectors;
1815 int napi_vectors;
1816
1817 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1818 napi_vectors = adapter->num_rx_queues;
1819
1820 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
1821 struct ixgbevf_q_vector *q_vector = adapter->q_vector[q_idx];
1822
1823 adapter->q_vector[q_idx] = NULL;
1824 if (q_idx < napi_vectors)
1825 netif_napi_del(&q_vector->napi);
1826 kfree(q_vector);
1827 }
1828}
1829
1830/**
1831 * ixgbevf_reset_interrupt_capability - Reset MSIX setup
1832 * @adapter: board private structure
1833 *
1834 **/
1835static void ixgbevf_reset_interrupt_capability(struct ixgbevf_adapter *adapter)
1836{
1837 pci_disable_msix(adapter->pdev);
1838 kfree(adapter->msix_entries);
1839 adapter->msix_entries = NULL;
92915f71
GR		 1840}
1841
1842/**
1843 * ixgbevf_init_interrupt_scheme - Determine if MSIX is supported and init
1844 * @adapter: board private structure to initialize
1845 *
1846 **/
1847static int ixgbevf_init_interrupt_scheme(struct ixgbevf_adapter *adapter)
1848{
1849 int err;
1850
1851 /* Number of supported queues */
1852 ixgbevf_set_num_queues(adapter);
1853
1854 err = ixgbevf_set_interrupt_capability(adapter);
1855 if (err) {
1856 hw_dbg(&adapter->hw,
1857 "Unable to setup interrupt capabilities\n");
1858 goto err_set_interrupt;
1859 }
1860
1861 err = ixgbevf_alloc_q_vectors(adapter);
1862 if (err) {
1863 hw_dbg(&adapter->hw, "Unable to allocate memory for queue "
1864 "vectors\n");
1865 goto err_alloc_q_vectors;
1866 }
1867
1868 err = ixgbevf_alloc_queues(adapter);
1869 if (err) {
dbd9636e 1870 pr_err("Unable to allocate memory for queues\n");
92915f71
GR		 1871 goto err_alloc_queues;
1872 }
1873
1874 hw_dbg(&adapter->hw, "Multiqueue %s: Rx Queue count = %u, "
1875 "Tx Queue count = %u\n",
1876 (adapter->num_rx_queues > 1) ? "Enabled" :
1877 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
1878
1879 set_bit(__IXGBEVF_DOWN, &adapter->state);
1880
1881 return 0;
1882err_alloc_queues:
1883 ixgbevf_free_q_vectors(adapter);
1884err_alloc_q_vectors:
1885 ixgbevf_reset_interrupt_capability(adapter);
1886err_set_interrupt:
1887 return err;
1888}
1889
0ac1e8ce
AD		 1890/**
1891 * ixgbevf_clear_interrupt_scheme - Clear the current interrupt scheme settings
1892 * @adapter: board private structure to clear interrupt scheme on
1893 *
1894 * We go through and clear interrupt specific resources and reset the structure
1895 * to pre-load conditions
1896 **/
1897static void ixgbevf_clear_interrupt_scheme(struct ixgbevf_adapter *adapter)
1898{
1899 adapter->num_tx_queues = 0;
1900 adapter->num_rx_queues = 0;
1901
1902 ixgbevf_free_q_vectors(adapter);
1903 ixgbevf_reset_interrupt_capability(adapter);
1904}
1905
92915f71
GR		 1906/**
1907 * ixgbevf_sw_init - Initialize general software structures
1908 * (struct ixgbevf_adapter)
1909 * @adapter: board private structure to initialize
1910 *
1911 * ixgbevf_sw_init initializes the Adapter private data structure.
1912 * Fields are initialized based on PCI device information and
1913 * OS network device settings (MTU size).
1914 **/
1915static int __devinit ixgbevf_sw_init(struct ixgbevf_adapter *adapter)
1916{
1917 struct ixgbe_hw *hw = &adapter->hw;
1918 struct pci_dev *pdev = adapter->pdev;
1919 int err;
1920
1921 /* PCI config space info */
1922
1923 hw->vendor_id = pdev->vendor;
1924 hw->device_id = pdev->device;
ff938e43 1925 hw->revision_id = pdev->revision;
92915f71
GR		 1926 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1927 hw->subsystem_device_id = pdev->subsystem_device;
1928
1929 hw->mbx.ops.init_params(hw);
1930 hw->mac.max_tx_queues = MAX_TX_QUEUES;
1931 hw->mac.max_rx_queues = MAX_RX_QUEUES;
1932 err = hw->mac.ops.reset_hw(hw);
1933 if (err) {
1934 dev_info(&pdev->dev,
1935 "PF still in reset state, assigning new address\n");
1a0d6ae5
DK		 1936 eth_hw_addr_random(adapter->netdev);
1937 memcpy(adapter->hw.mac.addr, adapter->netdev->dev_addr,
1938 adapter->netdev->addr_len);
92915f71
GR		 1939 } else {
1940 err = hw->mac.ops.init_hw(hw);
1941 if (err) {
dbd9636e 1942 pr_err("init_shared_code failed: %d\n", err);
92915f71
GR		 1943 goto out;
1944 }
1a0d6ae5
DK		 1945 memcpy(adapter->netdev->dev_addr, adapter->hw.mac.addr,
1946 adapter->netdev->addr_len);
92915f71
GR		 1947 }
1948
1c55ed76
AD		 1949 /* lock to protect mailbox accesses */
1950 spin_lock_init(&adapter->mbx_lock);
1951
92915f71 1952 /* Enable dynamic interrupt throttling rates */
5f3600eb
AD		 1953 adapter->rx_itr_setting = 1;
1954 adapter->tx_itr_setting = 1;
92915f71 1955
92915f71
GR		 1956 /* set default ring sizes */
1957 adapter->tx_ring_count = IXGBEVF_DEFAULT_TXD;
1958 adapter->rx_ring_count = IXGBEVF_DEFAULT_RXD;
1959
92915f71 1960 set_bit(__IXGBEVF_DOWN, &adapter->state);
1a0d6ae5 1961 return 0;
92915f71
GR		 1962
1963out:
1964 return err;
1965}
1966
92915f71
GR		 1967#define UPDATE_VF_COUNTER_32bit(reg, last_counter, counter) \
1968 { \
1969 u32 current_counter = IXGBE_READ_REG(hw, reg); \
1970 if (current_counter < last_counter) \
1971 counter += 0x100000000LL; \
1972 last_counter = current_counter; \
1973 counter &= 0xFFFFFFFF00000000LL; \
1974 counter |= current_counter; \
1975 }
1976
1977#define UPDATE_VF_COUNTER_36bit(reg_lsb, reg_msb, last_counter, counter) \
1978 { \
1979 u64 current_counter_lsb = IXGBE_READ_REG(hw, reg_lsb); \
1980 u64 current_counter_msb = IXGBE_READ_REG(hw, reg_msb); \
1981 u64 current_counter = (current_counter_msb << 32) | \
1982 current_counter_lsb; \
1983 if (current_counter < last_counter) \
1984 counter += 0x1000000000LL; \
1985 last_counter = current_counter; \
1986 counter &= 0xFFFFFFF000000000LL; \
1987 counter |= current_counter; \
1988 }
1989/**
1990 * ixgbevf_update_stats - Update the board statistics counters.
1991 * @adapter: board private structure
1992 **/
1993void ixgbevf_update_stats(struct ixgbevf_adapter *adapter)
1994{
1995 struct ixgbe_hw *hw = &adapter->hw;
1996
1997 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPRC, adapter->stats.last_vfgprc,
1998 adapter->stats.vfgprc);
1999 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPTC, adapter->stats.last_vfgptc,
2000 adapter->stats.vfgptc);
2001 UPDATE_VF_COUNTER_36bit(IXGBE_VFGORC_LSB, IXGBE_VFGORC_MSB,
2002 adapter->stats.last_vfgorc,
2003 adapter->stats.vfgorc);
2004 UPDATE_VF_COUNTER_36bit(IXGBE_VFGOTC_LSB, IXGBE_VFGOTC_MSB,
2005 adapter->stats.last_vfgotc,
2006 adapter->stats.vfgotc);
2007 UPDATE_VF_COUNTER_32bit(IXGBE_VFMPRC, adapter->stats.last_vfmprc,
2008 adapter->stats.vfmprc);
92915f71
GR		 2009}
2010
2011/**
2012 * ixgbevf_watchdog - Timer Call-back
2013 * @data: pointer to adapter cast into an unsigned long
2014 **/
2015static void ixgbevf_watchdog(unsigned long data)
2016{
2017 struct ixgbevf_adapter *adapter = (struct ixgbevf_adapter *)data;
2018 struct ixgbe_hw *hw = &adapter->hw;
5f3600eb 2019 u32 eics = 0;
92915f71
GR		 2020 int i;
2021
2022 /*
2023 * Do the watchdog outside of interrupt context due to the lovely
2024 * delays that some of the newer hardware requires
2025 */
2026
2027 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
2028 goto watchdog_short_circuit;
2029
2030 /* get one bit for every active tx/rx interrupt vector */
2031 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
2032 struct ixgbevf_q_vector *qv = adapter->q_vector[i];
6b43c446 2033 if (qv->rx.ring || qv->tx.ring)
5f3600eb 2034 eics |= 1 << i;
92915f71
GR		 2035 }
2036
5f3600eb 2037 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, eics);
92915f71
GR		 2038
2039watchdog_short_circuit:
2040 schedule_work(&adapter->watchdog_task);
2041}
2042
2043/**
2044 * ixgbevf_tx_timeout - Respond to a Tx Hang
2045 * @netdev: network interface device structure
2046 **/
2047static void ixgbevf_tx_timeout(struct net_device *netdev)
2048{
2049 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2050
2051 /* Do the reset outside of interrupt context */
2052 schedule_work(&adapter->reset_task);
2053}
2054
2055static void ixgbevf_reset_task(struct work_struct *work)
2056{
2057 struct ixgbevf_adapter *adapter;
2058 adapter = container_of(work, struct ixgbevf_adapter, reset_task);
2059
2060 /* If we're already down or resetting, just bail */
2061 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
2062 test_bit(__IXGBEVF_RESETTING, &adapter->state))
2063 return;
2064
2065 adapter->tx_timeout_count++;
2066
2067 ixgbevf_reinit_locked(adapter);
2068}
2069
2070/**
2071 * ixgbevf_watchdog_task - worker thread to bring link up
2072 * @work: pointer to work_struct containing our data
2073 **/
2074static void ixgbevf_watchdog_task(struct work_struct *work)
2075{
2076 struct ixgbevf_adapter *adapter = container_of(work,
2077 struct ixgbevf_adapter,
2078 watchdog_task);
2079 struct net_device *netdev = adapter->netdev;
2080 struct ixgbe_hw *hw = &adapter->hw;
2081 u32 link_speed = adapter->link_speed;
2082 bool link_up = adapter->link_up;
2083
2084 adapter->flags |= IXGBE_FLAG_IN_WATCHDOG_TASK;
2085
2086 /*
2087 * Always check the link on the watchdog because we have
2088 * no LSC interrupt
2089 */
2090 if (hw->mac.ops.check_link) {
1c55ed76
AD		 2091 s32 need_reset;
2092
2093 spin_lock(&adapter->mbx_lock);
2094
2095 need_reset = hw->mac.ops.check_link(hw, &link_speed,
2096 &link_up, false);
2097
2098 spin_unlock(&adapter->mbx_lock);
2099
2100 if (need_reset) {
92915f71
GR		 2101 adapter->link_up = link_up;
2102 adapter->link_speed = link_speed;
da6b3330
GR		 2103 netif_carrier_off(netdev);
2104 netif_tx_stop_all_queues(netdev);
92915f71
GR		 2105 schedule_work(&adapter->reset_task);
2106 goto pf_has_reset;
2107 }
2108 } else {
2109 /* always assume link is up, if no check link
2110 * function */
2111 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
2112 link_up = true;
2113 }
2114 adapter->link_up = link_up;
2115 adapter->link_speed = link_speed;
2116
2117 if (link_up) {
2118 if (!netif_carrier_ok(netdev)) {
300bc060
JP		 2119 hw_dbg(&adapter->hw, "NIC Link is Up, %u Gbps\n",
2120 (link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
2121 10 : 1);
92915f71
GR		 2122 netif_carrier_on(netdev);
2123 netif_tx_wake_all_queues(netdev);
92915f71
GR		 2124 }
2125 } else {
2126 adapter->link_up = false;
2127 adapter->link_speed = 0;
2128 if (netif_carrier_ok(netdev)) {
2129 hw_dbg(&adapter->hw, "NIC Link is Down\n");
2130 netif_carrier_off(netdev);
2131 netif_tx_stop_all_queues(netdev);
2132 }
2133 }
2134
92915f71
GR		 2135 ixgbevf_update_stats(adapter);
2136
33bd9f60 2137pf_has_reset:
92915f71
GR		 2138 /* Reset the timer */
2139 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
2140 mod_timer(&adapter->watchdog_timer,
2141 round_jiffies(jiffies + (2 * HZ)));
2142
2143 adapter->flags &= ~IXGBE_FLAG_IN_WATCHDOG_TASK;
2144}
2145
2146/**
2147 * ixgbevf_free_tx_resources - Free Tx Resources per Queue
2148 * @adapter: board private structure
2149 * @tx_ring: Tx descriptor ring for a specific queue
2150 *
2151 * Free all transmit software resources
2152 **/
2153void ixgbevf_free_tx_resources(struct ixgbevf_adapter *adapter,
2154 struct ixgbevf_ring *tx_ring)
2155{
2156 struct pci_dev *pdev = adapter->pdev;
2157
92915f71
GR		 2158 ixgbevf_clean_tx_ring(adapter, tx_ring);
2159
2160 vfree(tx_ring->tx_buffer_info);
2161 tx_ring->tx_buffer_info = NULL;
2162
2a1f8794
NN		 2163 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2164 tx_ring->dma);
92915f71
GR		 2165
2166 tx_ring->desc = NULL;
2167}
2168
2169/**
2170 * ixgbevf_free_all_tx_resources - Free Tx Resources for All Queues
2171 * @adapter: board private structure
2172 *
2173 * Free all transmit software resources
2174 **/
2175static void ixgbevf_free_all_tx_resources(struct ixgbevf_adapter *adapter)
2176{
2177 int i;
2178
2179 for (i = 0; i < adapter->num_tx_queues; i++)
2180 if (adapter->tx_ring[i].desc)
2181 ixgbevf_free_tx_resources(adapter,
2182 &adapter->tx_ring[i]);
2183
2184}
2185
2186/**
2187 * ixgbevf_setup_tx_resources - allocate Tx resources (Descriptors)
2188 * @adapter: board private structure
2189 * @tx_ring: tx descriptor ring (for a specific queue) to setup
2190 *
2191 * Return 0 on success, negative on failure
2192 **/
2193int ixgbevf_setup_tx_resources(struct ixgbevf_adapter *adapter,
2194 struct ixgbevf_ring *tx_ring)
2195{
2196 struct pci_dev *pdev = adapter->pdev;
2197 int size;
2198
2199 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
89bf67f1 2200 tx_ring->tx_buffer_info = vzalloc(size);
92915f71
GR		 2201 if (!tx_ring->tx_buffer_info)
2202 goto err;
92915f71
GR		 2203
2204 /* round up to nearest 4K */
2205 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
2206 tx_ring->size = ALIGN(tx_ring->size, 4096);
2207
2a1f8794
NN		 2208 tx_ring->desc = dma_alloc_coherent(&pdev->dev, tx_ring->size,
2209 &tx_ring->dma, GFP_KERNEL);
92915f71
GR		 2210 if (!tx_ring->desc)
2211 goto err;
2212
2213 tx_ring->next_to_use = 0;
2214 tx_ring->next_to_clean = 0;
92915f71
GR		 2215 return 0;
2216
2217err:
2218 vfree(tx_ring->tx_buffer_info);
2219 tx_ring->tx_buffer_info = NULL;
2220 hw_dbg(&adapter->hw, "Unable to allocate memory for the transmit "
2221 "descriptor ring\n");
2222 return -ENOMEM;
2223}
2224
2225/**
2226 * ixgbevf_setup_all_tx_resources - allocate all queues Tx resources
2227 * @adapter: board private structure
2228 *
2229 * If this function returns with an error, then it's possible one or
2230 * more of the rings is populated (while the rest are not). It is the
2231 * callers duty to clean those orphaned rings.
2232 *
2233 * Return 0 on success, negative on failure
2234 **/
2235static int ixgbevf_setup_all_tx_resources(struct ixgbevf_adapter *adapter)
2236{
2237 int i, err = 0;
2238
2239 for (i = 0; i < adapter->num_tx_queues; i++) {
2240 err = ixgbevf_setup_tx_resources(adapter, &adapter->tx_ring[i]);
2241 if (!err)
2242 continue;
2243 hw_dbg(&adapter->hw,
2244 "Allocation for Tx Queue %u failed\n", i);
2245 break;
2246 }
2247
2248 return err;
2249}
2250
2251/**
2252 * ixgbevf_setup_rx_resources - allocate Rx resources (Descriptors)
2253 * @adapter: board private structure
2254 * @rx_ring: rx descriptor ring (for a specific queue) to setup
2255 *
2256 * Returns 0 on success, negative on failure
2257 **/
2258int ixgbevf_setup_rx_resources(struct ixgbevf_adapter *adapter,
2259 struct ixgbevf_ring *rx_ring)
2260{
2261 struct pci_dev *pdev = adapter->pdev;
2262 int size;
2263
2264 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
89bf67f1 2265 rx_ring->rx_buffer_info = vzalloc(size);
e404decb 2266 if (!rx_ring->rx_buffer_info)
92915f71 2267 goto alloc_failed;
92915f71
GR		 2268
2269 /* Round up to nearest 4K */
2270 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
2271 rx_ring->size = ALIGN(rx_ring->size, 4096);
2272
2a1f8794
NN		 2273 rx_ring->desc = dma_alloc_coherent(&pdev->dev, rx_ring->size,
2274 &rx_ring->dma, GFP_KERNEL);
92915f71
GR		 2275
2276 if (!rx_ring->desc) {
2277 hw_dbg(&adapter->hw,
2278 "Unable to allocate memory for "
2279 "the receive descriptor ring\n");
2280 vfree(rx_ring->rx_buffer_info);
2281 rx_ring->rx_buffer_info = NULL;
2282 goto alloc_failed;
2283 }
2284
2285 rx_ring->next_to_clean = 0;
2286 rx_ring->next_to_use = 0;
2287
2288 return 0;
2289alloc_failed:
2290 return -ENOMEM;
2291}
2292
2293/**
2294 * ixgbevf_setup_all_rx_resources - allocate all queues Rx resources
2295 * @adapter: board private structure
2296 *
2297 * If this function returns with an error, then it's possible one or
2298 * more of the rings is populated (while the rest are not). It is the
2299 * callers duty to clean those orphaned rings.
2300 *
2301 * Return 0 on success, negative on failure
2302 **/
2303static int ixgbevf_setup_all_rx_resources(struct ixgbevf_adapter *adapter)
2304{
2305 int i, err = 0;
2306
2307 for (i = 0; i < adapter->num_rx_queues; i++) {
2308 err = ixgbevf_setup_rx_resources(adapter, &adapter->rx_ring[i]);
2309 if (!err)
2310 continue;
2311 hw_dbg(&adapter->hw,
2312 "Allocation for Rx Queue %u failed\n", i);
2313 break;
2314 }
2315 return err;
2316}
2317
2318/**
2319 * ixgbevf_free_rx_resources - Free Rx Resources
2320 * @adapter: board private structure
2321 * @rx_ring: ring to clean the resources from
2322 *
2323 * Free all receive software resources
2324 **/
2325void ixgbevf_free_rx_resources(struct ixgbevf_adapter *adapter,
2326 struct ixgbevf_ring *rx_ring)
2327{
2328 struct pci_dev *pdev = adapter->pdev;
2329
2330 ixgbevf_clean_rx_ring(adapter, rx_ring);
2331
2332 vfree(rx_ring->rx_buffer_info);
2333 rx_ring->rx_buffer_info = NULL;
2334
2a1f8794
NN		 2335 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2336 rx_ring->dma);
92915f71
GR		 2337
2338 rx_ring->desc = NULL;
2339}
2340
2341/**
2342 * ixgbevf_free_all_rx_resources - Free Rx Resources for All Queues
2343 * @adapter: board private structure
2344 *
2345 * Free all receive software resources
2346 **/
2347static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter)
2348{
2349 int i;
2350
2351 for (i = 0; i < adapter->num_rx_queues; i++)
2352 if (adapter->rx_ring[i].desc)
2353 ixgbevf_free_rx_resources(adapter,
2354 &adapter->rx_ring[i]);
2355}
2356
2357/**
2358 * ixgbevf_open - Called when a network interface is made active
2359 * @netdev: network interface device structure
2360 *
2361 * Returns 0 on success, negative value on failure
2362 *
2363 * The open entry point is called when a network interface is made
2364 * active by the system (IFF_UP). At this point all resources needed
2365 * for transmit and receive operations are allocated, the interrupt
2366 * handler is registered with the OS, the watchdog timer is started,
2367 * and the stack is notified that the interface is ready.
2368 **/
2369static int ixgbevf_open(struct net_device *netdev)
2370{
2371 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2372 struct ixgbe_hw *hw = &adapter->hw;
2373 int err;
2374
2375 /* disallow open during test */
2376 if (test_bit(__IXGBEVF_TESTING, &adapter->state))
2377 return -EBUSY;
2378
2379 if (hw->adapter_stopped) {
2380 ixgbevf_reset(adapter);
2381 /* if adapter is still stopped then PF isn't up and
2382 * the vf can't start. */
2383 if (hw->adapter_stopped) {
2384 err = IXGBE_ERR_MBX;
dbd9636e
JK		 2385 pr_err("Unable to start - perhaps the PF Driver isn't "
2386 "up yet\n");
92915f71
GR		 2387 goto err_setup_reset;
2388 }
2389 }
2390
2391 /* allocate transmit descriptors */
2392 err = ixgbevf_setup_all_tx_resources(adapter);
2393 if (err)
2394 goto err_setup_tx;
2395
2396 /* allocate receive descriptors */
2397 err = ixgbevf_setup_all_rx_resources(adapter);
2398 if (err)
2399 goto err_setup_rx;
2400
2401 ixgbevf_configure(adapter);
2402
2403 /*
2404 * Map the Tx/Rx rings to the vectors we were allotted.
2405 * if request_irq will be called in this function map_rings
2406 * must be called *before* up_complete
2407 */
2408 ixgbevf_map_rings_to_vectors(adapter);
2409
795180d8 2410 ixgbevf_up_complete(adapter);
92915f71
GR		 2411
2412 /* clear any pending interrupts, may auto mask */
2413 IXGBE_READ_REG(hw, IXGBE_VTEICR);
2414 err = ixgbevf_request_irq(adapter);
2415 if (err)
2416 goto err_req_irq;
2417
5f3600eb 2418 ixgbevf_irq_enable(adapter);
92915f71
GR		 2419
2420 return 0;
2421
2422err_req_irq:
2423 ixgbevf_down(adapter);
92915f71
GR		 2424 ixgbevf_free_irq(adapter);
2425err_setup_rx:
2426 ixgbevf_free_all_rx_resources(adapter);
2427err_setup_tx:
2428 ixgbevf_free_all_tx_resources(adapter);
2429 ixgbevf_reset(adapter);
2430
2431err_setup_reset:
2432
2433 return err;
2434}
2435
2436/**
2437 * ixgbevf_close - Disables a network interface
2438 * @netdev: network interface device structure
2439 *
2440 * Returns 0, this is not allowed to fail
2441 *
2442 * The close entry point is called when an interface is de-activated
2443 * by the OS. The hardware is still under the drivers control, but
2444 * needs to be disabled. A global MAC reset is issued to stop the
2445 * hardware, and all transmit and receive resources are freed.
2446 **/
2447static int ixgbevf_close(struct net_device *netdev)
2448{
2449 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2450
2451 ixgbevf_down(adapter);
2452 ixgbevf_free_irq(adapter);
2453
2454 ixgbevf_free_all_tx_resources(adapter);
2455 ixgbevf_free_all_rx_resources(adapter);
2456
2457 return 0;
2458}
2459
70a10e25
AD		 2460static void ixgbevf_tx_ctxtdesc(struct ixgbevf_ring *tx_ring,
2461 u32 vlan_macip_lens, u32 type_tucmd,
2462 u32 mss_l4len_idx)
92915f71
GR		 2463{
2464 struct ixgbe_adv_tx_context_desc *context_desc;
70a10e25 2465 u16 i = tx_ring->next_to_use;
92915f71 2466
70a10e25 2467 context_desc = IXGBEVF_TX_CTXTDESC(tx_ring, i);
92915f71 2468
70a10e25
AD		 2469 i++;
2470 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
92915f71 2471
70a10e25
AD		 2472 /* set bits to identify this as an advanced context descriptor */
2473 type_tucmd |= IXGBE_TXD_CMD_DEXT | IXGBE_ADVTXD_DTYP_CTXT;
92915f71 2474
70a10e25
AD		 2475 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2476 context_desc->seqnum_seed = 0;
2477 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd);
2478 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
2479}
2480
2481static int ixgbevf_tso(struct ixgbevf_ring *tx_ring,
2482 struct sk_buff *skb, u32 tx_flags, u8 *hdr_len)
2483{
2484 u32 vlan_macip_lens, type_tucmd;
2485 u32 mss_l4len_idx, l4len;
2486
2487 if (!skb_is_gso(skb))
2488 return 0;
92915f71 2489
70a10e25
AD		 2490 if (skb_header_cloned(skb)) {
2491 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2492 if (err)
2493 return err;
92915f71
GR		 2494 }
2495
70a10e25
AD		 2496 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2497 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
2498
2499 if (skb->protocol == htons(ETH_P_IP)) {
2500 struct iphdr *iph = ip_hdr(skb);
2501 iph->tot_len = 0;
2502 iph->check = 0;
2503 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2504 iph->daddr, 0,
2505 IPPROTO_TCP,
2506 0);
2507 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
2508 } else if (skb_is_gso_v6(skb)) {
2509 ipv6_hdr(skb)->payload_len = 0;
2510 tcp_hdr(skb)->check =
2511 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2512 &ipv6_hdr(skb)->daddr,
2513 0, IPPROTO_TCP, 0);
2514 }
2515
2516 /* compute header lengths */
2517 l4len = tcp_hdrlen(skb);
2518 *hdr_len += l4len;
2519 *hdr_len = skb_transport_offset(skb) + l4len;
2520
2521 /* mss_l4len_id: use 1 as index for TSO */
2522 mss_l4len_idx = l4len << IXGBE_ADVTXD_L4LEN_SHIFT;
2523 mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
2524 mss_l4len_idx |= 1 << IXGBE_ADVTXD_IDX_SHIFT;
2525
2526 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
2527 vlan_macip_lens = skb_network_header_len(skb);
2528 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
2529 vlan_macip_lens |= tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
2530
2531 ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens,
2532 type_tucmd, mss_l4len_idx);
2533
2534 return 1;
92915f71
GR		 2535}
2536
70a10e25 2537static bool ixgbevf_tx_csum(struct ixgbevf_ring *tx_ring,
92915f71
GR		 2538 struct sk_buff *skb, u32 tx_flags)
2539{
92915f71 2540
92915f71 2541
92915f71 2542
70a10e25
AD		 2543 u32 vlan_macip_lens = 0;
2544 u32 mss_l4len_idx = 0;
2545 u32 type_tucmd = 0;
92915f71 2546
70a10e25
AD		 2547 if (skb->ip_summed == CHECKSUM_PARTIAL) {
2548 u8 l4_hdr = 0;
2549 switch (skb->protocol) {
2550 case __constant_htons(ETH_P_IP):
2551 vlan_macip_lens |= skb_network_header_len(skb);
2552 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
2553 l4_hdr = ip_hdr(skb)->protocol;
2554 break;
2555 case __constant_htons(ETH_P_IPV6):
2556 vlan_macip_lens |= skb_network_header_len(skb);
2557 l4_hdr = ipv6_hdr(skb)->nexthdr;
2558 break;
2559 default:
2560 if (unlikely(net_ratelimit())) {
2561 dev_warn(tx_ring->dev,
2562 "partial checksum but proto=%x!\n",
2563 skb->protocol);
2564 }
2565 break;
2566 }
92915f71 2567
70a10e25
AD		 2568 switch (l4_hdr) {
2569 case IPPROTO_TCP:
2570 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
2571 mss_l4len_idx = tcp_hdrlen(skb) <<
2572 IXGBE_ADVTXD_L4LEN_SHIFT;
2573 break;
2574 case IPPROTO_SCTP:
2575 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_SCTP;
2576 mss_l4len_idx = sizeof(struct sctphdr) <<
2577 IXGBE_ADVTXD_L4LEN_SHIFT;
2578 break;
2579 case IPPROTO_UDP:
2580 mss_l4len_idx = sizeof(struct udphdr) <<
2581 IXGBE_ADVTXD_L4LEN_SHIFT;
2582 break;
2583 default:
2584 if (unlikely(net_ratelimit())) {
2585 dev_warn(tx_ring->dev,
2586 "partial checksum but l4 proto=%x!\n",
2587 l4_hdr);
2588 }
2589 break;
2590 }
92915f71
GR		 2591 }
2592
70a10e25
AD		 2593 /* vlan_macip_lens: MACLEN, VLAN tag */
2594 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
2595 vlan_macip_lens |= tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
2596
2597 ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens,
2598 type_tucmd, mss_l4len_idx);
2599
2600 return (skb->ip_summed == CHECKSUM_PARTIAL);
92915f71
GR		 2601}
2602
70a10e25 2603static int ixgbevf_tx_map(struct ixgbevf_ring *tx_ring,
92915f71
GR		 2604 struct sk_buff *skb, u32 tx_flags,
2605 unsigned int first)
2606{
92915f71
GR		 2607 struct ixgbevf_tx_buffer *tx_buffer_info;
2608 unsigned int len;
2609 unsigned int total = skb->len;
2540ddb5
KV		 2610 unsigned int offset = 0, size;
2611 int count = 0;
92915f71
GR		 2612 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
2613 unsigned int f;
65deeed7 2614 int i;
92915f71
GR		 2615
2616 i = tx_ring->next_to_use;
2617
2618 len = min(skb_headlen(skb), total);
2619 while (len) {
2620 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2621 size = min(len, (unsigned int)IXGBE_MAX_DATA_PER_TXD);
2622
2623 tx_buffer_info->length = size;
2624 tx_buffer_info->mapped_as_page = false;
70a10e25 2625 tx_buffer_info->dma = dma_map_single(tx_ring->dev,
92915f71 2626 skb->data + offset,
2a1f8794 2627 size, DMA_TO_DEVICE);
70a10e25 2628 if (dma_mapping_error(tx_ring->dev, tx_buffer_info->dma))
92915f71 2629 goto dma_error;
92915f71
GR		 2630 tx_buffer_info->next_to_watch = i;
2631
2632 len -= size;
2633 total -= size;
2634 offset += size;
2635 count++;
2636 i++;
2637 if (i == tx_ring->count)
2638 i = 0;
2639 }
2640
2641 for (f = 0; f < nr_frags; f++) {
9e903e08 2642 const struct skb_frag_struct *frag;
92915f71
GR		 2643
2644 frag = &skb_shinfo(skb)->frags[f];
9e903e08 2645 len = min((unsigned int)skb_frag_size(frag), total);
877749bf 2646 offset = 0;
92915f71
GR		 2647
2648 while (len) {
2649 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2650 size = min(len, (unsigned int)IXGBE_MAX_DATA_PER_TXD);
2651
2652 tx_buffer_info->length = size;
877749bf 2653 tx_buffer_info->dma =
70a10e25 2654 skb_frag_dma_map(tx_ring->dev, frag,
877749bf 2655 offset, size, DMA_TO_DEVICE);
92915f71 2656 tx_buffer_info->mapped_as_page = true;
70a10e25
AD		 2657 if (dma_mapping_error(tx_ring->dev,
2658 tx_buffer_info->dma))
92915f71 2659 goto dma_error;
92915f71
GR		 2660 tx_buffer_info->next_to_watch = i;
2661
2662 len -= size;
2663 total -= size;
2664 offset += size;
2665 count++;
2666 i++;
2667 if (i == tx_ring->count)
2668 i = 0;
2669 }
2670 if (total == 0)
2671 break;
2672 }
2673
2674 if (i == 0)
2675 i = tx_ring->count - 1;
2676 else
2677 i = i - 1;
2678 tx_ring->tx_buffer_info[i].skb = skb;
2679 tx_ring->tx_buffer_info[first].next_to_watch = i;
70a10e25 2680 tx_ring->tx_buffer_info[first].time_stamp = jiffies;
92915f71
GR		 2681
2682 return count;
2683
2684dma_error:
70a10e25 2685 dev_err(tx_ring->dev, "TX DMA map failed\n");
92915f71
GR		 2686
2687 /* clear timestamp and dma mappings for failed tx_buffer_info map */
2688 tx_buffer_info->dma = 0;
92915f71
GR		 2689 tx_buffer_info->next_to_watch = 0;
2690 count--;
2691
2692 /* clear timestamp and dma mappings for remaining portion of packet */
2693 while (count >= 0) {
2694 count--;
2695 i--;
2696 if (i < 0)
2697 i += tx_ring->count;
2698 tx_buffer_info = &tx_ring->tx_buffer_info[i];
70a10e25 2699 ixgbevf_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
92915f71
GR		 2700 }
2701
2702 return count;
2703}
2704
70a10e25 2705static void ixgbevf_tx_queue(struct ixgbevf_ring *tx_ring, int tx_flags,
92915f71
GR		 2706 int count, u32 paylen, u8 hdr_len)
2707{
2708 union ixgbe_adv_tx_desc *tx_desc = NULL;
2709 struct ixgbevf_tx_buffer *tx_buffer_info;
2710 u32 olinfo_status = 0, cmd_type_len = 0;
2711 unsigned int i;
2712
2713 u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
2714
2715 cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
2716
2717 cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
2718
2719 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2720 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
2721
70a10e25
AD		 2722 if (tx_flags & IXGBE_TX_FLAGS_CSUM)
2723 olinfo_status |= IXGBE_ADVTXD_POPTS_TXSM;
2724
92915f71
GR		 2725 if (tx_flags & IXGBE_TX_FLAGS_TSO) {
2726 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
2727
92915f71
GR		 2728 /* use index 1 context for tso */
2729 olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
2730 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
70a10e25
AD		 2731 olinfo_status |= IXGBE_ADVTXD_POPTS_IXSM;
2732
2733 }
92915f71 2734
70a10e25
AD		 2735 /*
2736 * Check Context must be set if Tx switch is enabled, which it
2737 * always is for case where virtual functions are running
2738 */
2739 olinfo_status |= IXGBE_ADVTXD_CC;
92915f71
GR		 2740
2741 olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
2742
2743 i = tx_ring->next_to_use;
2744 while (count--) {
2745 tx_buffer_info = &tx_ring->tx_buffer_info[i];
908421f6 2746 tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
92915f71
GR		 2747 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
2748 tx_desc->read.cmd_type_len =
2749 cpu_to_le32(cmd_type_len | tx_buffer_info->length);
2750 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
2751 i++;
2752 if (i == tx_ring->count)
2753 i = 0;
2754 }
2755
2756 tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
2757
92915f71 2758 tx_ring->next_to_use = i;
92915f71
GR		 2759}
2760
fb40195c 2761static int __ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
92915f71 2762{
fb40195c 2763 struct ixgbevf_adapter *adapter = netdev_priv(tx_ring->netdev);
92915f71 2764
fb40195c 2765 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
92915f71
GR		 2766 /* Herbert's original patch had:
2767 * smp_mb__after_netif_stop_queue();
2768 * but since that doesn't exist yet, just open code it. */
2769 smp_mb();
2770
2771 /* We need to check again in a case another CPU has just
2772 * made room available. */
2773 if (likely(IXGBE_DESC_UNUSED(tx_ring) < size))
2774 return -EBUSY;
2775
2776 /* A reprieve! - use start_queue because it doesn't call schedule */
fb40195c 2777 netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
92915f71
GR		 2778 ++adapter->restart_queue;
2779 return 0;
2780}
2781
fb40195c 2782static int ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
92915f71
GR		 2783{
2784 if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size))
2785 return 0;
fb40195c 2786 return __ixgbevf_maybe_stop_tx(tx_ring, size);
92915f71
GR		 2787}
2788
2789static int ixgbevf_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2790{
2791 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2792 struct ixgbevf_ring *tx_ring;
2793 unsigned int first;
2794 unsigned int tx_flags = 0;
2795 u8 hdr_len = 0;
2796 int r_idx = 0, tso;
3595990a
AD		 2797 u16 count = TXD_USE_COUNT(skb_headlen(skb));
2798#if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
2799 unsigned short f;
2800#endif
92915f71
GR		 2801
2802 tx_ring = &adapter->tx_ring[r_idx];
2803
3595990a
AD		 2804 /*
2805 * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
2806 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
2807 * + 2 desc gap to keep tail from touching head,
2808 * + 1 desc for context descriptor,
2809 * otherwise try next time
2810 */
2811#if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
2812 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
2813 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
2814#else
2815 count += skb_shinfo(skb)->nr_frags;
2816#endif
fb40195c 2817 if (ixgbevf_maybe_stop_tx(tx_ring, count + 3)) {
3595990a
AD		 2818 adapter->tx_busy++;
2819 return NETDEV_TX_BUSY;
2820 }
2821
eab6d18d 2822 if (vlan_tx_tag_present(skb)) {
92915f71
GR		 2823 tx_flags |= vlan_tx_tag_get(skb);
2824 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
2825 tx_flags |= IXGBE_TX_FLAGS_VLAN;
2826 }
2827
92915f71
GR		 2828 first = tx_ring->next_to_use;
2829
2830 if (skb->protocol == htons(ETH_P_IP))
2831 tx_flags |= IXGBE_TX_FLAGS_IPV4;
70a10e25 2832 tso = ixgbevf_tso(tx_ring, skb, tx_flags, &hdr_len);
92915f71
GR		 2833 if (tso < 0) {
2834 dev_kfree_skb_any(skb);
2835 return NETDEV_TX_OK;
2836 }
2837
2838 if (tso)
70a10e25
AD		 2839 tx_flags |= IXGBE_TX_FLAGS_TSO | IXGBE_TX_FLAGS_CSUM;
2840 else if (ixgbevf_tx_csum(tx_ring, skb, tx_flags))
92915f71
GR		 2841 tx_flags |= IXGBE_TX_FLAGS_CSUM;
2842
70a10e25
AD		 2843 ixgbevf_tx_queue(tx_ring, tx_flags,
2844 ixgbevf_tx_map(tx_ring, skb, tx_flags, first),
92915f71 2845 skb->len, hdr_len);
70a10e25
AD		 2846 /*
2847 * Force memory writes to complete before letting h/w
2848 * know there are new descriptors to fetch. (Only
2849 * applicable for weak-ordered memory model archs,
2850 * such as IA-64).
2851 */
2852 wmb();
2853
2854 writel(tx_ring->next_to_use, adapter->hw.hw_addr + tx_ring->tail);
92915f71 2855
fb40195c 2856 ixgbevf_maybe_stop_tx(tx_ring, DESC_NEEDED);
92915f71
GR		 2857
2858 return NETDEV_TX_OK;
2859}
2860
92915f71
GR		 2861/**
2862 * ixgbevf_set_mac - Change the Ethernet Address of the NIC
2863 * @netdev: network interface device structure
2864 * @p: pointer to an address structure
2865 *
2866 * Returns 0 on success, negative on failure
2867 **/
2868static int ixgbevf_set_mac(struct net_device *netdev, void *p)
2869{
2870 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2871 struct ixgbe_hw *hw = &adapter->hw;
2872 struct sockaddr *addr = p;
2873
2874 if (!is_valid_ether_addr(addr->sa_data))
2875 return -EADDRNOTAVAIL;
2876
2877 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2878 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
2879
1c55ed76
AD		 2880 spin_lock(&adapter->mbx_lock);
2881
92915f71
GR		 2882 if (hw->mac.ops.set_rar)
2883 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
2884
1c55ed76
AD		 2885 spin_unlock(&adapter->mbx_lock);
2886
92915f71
GR		 2887 return 0;
2888}
2889
2890/**
2891 * ixgbevf_change_mtu - Change the Maximum Transfer Unit
2892 * @netdev: network interface device structure
2893 * @new_mtu: new value for maximum frame size
2894 *
2895 * Returns 0 on success, negative on failure
2896 **/
2897static int ixgbevf_change_mtu(struct net_device *netdev, int new_mtu)
2898{
2899 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2900 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
69bfbec4 2901 int max_possible_frame = MAXIMUM_ETHERNET_VLAN_SIZE;
69bfbec4
GR		 2902
2903 if (adapter->hw.mac.type == ixgbe_mac_X540_vf)
2904 max_possible_frame = IXGBE_MAX_JUMBO_FRAME_SIZE;
92915f71
GR		 2905
2906 /* MTU < 68 is an error and causes problems on some kernels */
69bfbec4 2907 if ((new_mtu < 68) || (max_frame > max_possible_frame))
92915f71
GR		 2908 return -EINVAL;
2909
2910 hw_dbg(&adapter->hw, "changing MTU from %d to %d\n",
2911 netdev->mtu, new_mtu);
2912 /* must set new MTU before calling down or up */
2913 netdev->mtu = new_mtu;
2914
2915 if (netif_running(netdev))
2916 ixgbevf_reinit_locked(adapter);
2917
2918 return 0;
2919}
2920
0ac1e8ce 2921static int ixgbevf_suspend(struct pci_dev *pdev, pm_message_t state)
92915f71
GR		 2922{
2923 struct net_device *netdev = pci_get_drvdata(pdev);
2924 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
0ac1e8ce
AD		 2925#ifdef CONFIG_PM
2926 int retval = 0;
2927#endif
92915f71
GR		 2928
2929 netif_device_detach(netdev);
2930
2931 if (netif_running(netdev)) {
0ac1e8ce 2932 rtnl_lock();
92915f71
GR		 2933 ixgbevf_down(adapter);
2934 ixgbevf_free_irq(adapter);
2935 ixgbevf_free_all_tx_resources(adapter);
2936 ixgbevf_free_all_rx_resources(adapter);
0ac1e8ce 2937 rtnl_unlock();
92915f71
GR		 2938 }
2939
0ac1e8ce
AD		 2940 ixgbevf_clear_interrupt_scheme(adapter);
2941
2942#ifdef CONFIG_PM
2943 retval = pci_save_state(pdev);
2944 if (retval)
2945 return retval;
92915f71 2946
0ac1e8ce 2947#endif
92915f71 2948 pci_disable_device(pdev);
0ac1e8ce
AD		 2949
2950 return 0;
2951}
2952
2953#ifdef CONFIG_PM
2954static int ixgbevf_resume(struct pci_dev *pdev)
2955{
2956 struct ixgbevf_adapter *adapter = pci_get_drvdata(pdev);
2957 struct net_device *netdev = adapter->netdev;
2958 u32 err;
2959
2960 pci_set_power_state(pdev, PCI_D0);
2961 pci_restore_state(pdev);
2962 /*
2963 * pci_restore_state clears dev->state_saved so call
2964 * pci_save_state to restore it.
2965 */
2966 pci_save_state(pdev);
2967
2968 err = pci_enable_device_mem(pdev);
2969 if (err) {
2970 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
2971 return err;
2972 }
2973 pci_set_master(pdev);
2974
2975 rtnl_lock();
2976 err = ixgbevf_init_interrupt_scheme(adapter);
2977 rtnl_unlock();
2978 if (err) {
2979 dev_err(&pdev->dev, "Cannot initialize interrupts\n");
2980 return err;
2981 }
2982
2983 ixgbevf_reset(adapter);
2984
2985 if (netif_running(netdev)) {
2986 err = ixgbevf_open(netdev);
2987 if (err)
2988 return err;
2989 }
2990
2991 netif_device_attach(netdev);
2992
2993 return err;
2994}
2995
2996#endif /* CONFIG_PM */
2997static void ixgbevf_shutdown(struct pci_dev *pdev)
2998{
2999 ixgbevf_suspend(pdev, PMSG_SUSPEND);
92915f71
GR		 3000}
3001
4197aa7b
ED		 3002static struct rtnl_link_stats64 *ixgbevf_get_stats(struct net_device *netdev,
3003 struct rtnl_link_stats64 *stats)
3004{
3005 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3006 unsigned int start;
3007 u64 bytes, packets;
3008 const struct ixgbevf_ring *ring;
3009 int i;
3010
3011 ixgbevf_update_stats(adapter);
3012
3013 stats->multicast = adapter->stats.vfmprc - adapter->stats.base_vfmprc;
3014
3015 for (i = 0; i < adapter->num_rx_queues; i++) {
3016 ring = &adapter->rx_ring[i];
3017 do {
3018 start = u64_stats_fetch_begin_bh(&ring->syncp);
3019 bytes = ring->total_bytes;
3020 packets = ring->total_packets;
3021 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
3022 stats->rx_bytes += bytes;
3023 stats->rx_packets += packets;
3024 }
3025
3026 for (i = 0; i < adapter->num_tx_queues; i++) {
3027 ring = &adapter->tx_ring[i];
3028 do {
3029 start = u64_stats_fetch_begin_bh(&ring->syncp);
3030 bytes = ring->total_bytes;
3031 packets = ring->total_packets;
3032 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
3033 stats->tx_bytes += bytes;
3034 stats->tx_packets += packets;
3035 }
3036
3037 return stats;
3038}
3039
0ac1e8ce 3040static const struct net_device_ops ixgbevf_netdev_ops = {
c12db769
SH		 3041 .ndo_open = ixgbevf_open,
3042 .ndo_stop = ixgbevf_close,
3043 .ndo_start_xmit = ixgbevf_xmit_frame,
3044 .ndo_set_rx_mode = ixgbevf_set_rx_mode,
4197aa7b 3045 .ndo_get_stats64 = ixgbevf_get_stats,
92915f71 3046 .ndo_validate_addr = eth_validate_addr,
c12db769
SH		 3047 .ndo_set_mac_address = ixgbevf_set_mac,
3048 .ndo_change_mtu = ixgbevf_change_mtu,
3049 .ndo_tx_timeout = ixgbevf_tx_timeout,
c12db769
SH		 3050 .ndo_vlan_rx_add_vid = ixgbevf_vlan_rx_add_vid,
3051 .ndo_vlan_rx_kill_vid = ixgbevf_vlan_rx_kill_vid,
92915f71 3052};
92915f71
GR		 3053
3054static void ixgbevf_assign_netdev_ops(struct net_device *dev)
3055{
0ac1e8ce 3056 dev->netdev_ops = &ixgbevf_netdev_ops;
92915f71
GR		 3057 ixgbevf_set_ethtool_ops(dev);
3058 dev->watchdog_timeo = 5 * HZ;
3059}
3060
3061/**
3062 * ixgbevf_probe - Device Initialization Routine
3063 * @pdev: PCI device information struct
3064 * @ent: entry in ixgbevf_pci_tbl
3065 *
3066 * Returns 0 on success, negative on failure
3067 *
3068 * ixgbevf_probe initializes an adapter identified by a pci_dev structure.
3069 * The OS initialization, configuring of the adapter private structure,
3070 * and a hardware reset occur.
3071 **/
3072static int __devinit ixgbevf_probe(struct pci_dev *pdev,
3073 const struct pci_device_id *ent)
3074{
3075 struct net_device *netdev;
3076 struct ixgbevf_adapter *adapter = NULL;
3077 struct ixgbe_hw *hw = NULL;
3078 const struct ixgbevf_info *ii = ixgbevf_info_tbl[ent->driver_data];
3079 static int cards_found;
3080 int err, pci_using_dac;
3081
3082 err = pci_enable_device(pdev);
3083 if (err)
3084 return err;
3085
2a1f8794
NN		 3086 if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) &&
3087 !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
92915f71
GR		 3088 pci_using_dac = 1;
3089 } else {
2a1f8794 3090 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
92915f71 3091 if (err) {
2a1f8794
NN		 3092 err = dma_set_coherent_mask(&pdev->dev,
3093 DMA_BIT_MASK(32));
92915f71
GR		 3094 if (err) {
3095 dev_err(&pdev->dev, "No usable DMA "
3096 "configuration, aborting\n");
3097 goto err_dma;
3098 }
3099 }
3100 pci_using_dac = 0;
3101 }
3102
3103 err = pci_request_regions(pdev, ixgbevf_driver_name);
3104 if (err) {
3105 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
3106 goto err_pci_reg;
3107 }
3108
3109 pci_set_master(pdev);
3110
92915f71
GR		 3111 netdev = alloc_etherdev_mq(sizeof(struct ixgbevf_adapter),
3112 MAX_TX_QUEUES);
92915f71
GR		 3113 if (!netdev) {
3114 err = -ENOMEM;
3115 goto err_alloc_etherdev;
3116 }
3117
3118 SET_NETDEV_DEV(netdev, &pdev->dev);
3119
3120 pci_set_drvdata(pdev, netdev);
3121 adapter = netdev_priv(netdev);
3122
3123 adapter->netdev = netdev;
3124 adapter->pdev = pdev;
3125 hw = &adapter->hw;
3126 hw->back = adapter;
b3f4d599 3127 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
92915f71
GR		 3128
3129 /*
3130 * call save state here in standalone driver because it relies on
3131 * adapter struct to exist, and needs to call netdev_priv
3132 */
3133 pci_save_state(pdev);
3134
3135 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
3136 pci_resource_len(pdev, 0));
3137 if (!hw->hw_addr) {
3138 err = -EIO;
3139 goto err_ioremap;
3140 }
3141
3142 ixgbevf_assign_netdev_ops(netdev);
3143
3144 adapter->bd_number = cards_found;
3145
3146 /* Setup hw api */
3147 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
3148 hw->mac.type = ii->mac;
3149
3150 memcpy(&hw->mbx.ops, &ixgbevf_mbx_ops,
f416dfc0 3151 sizeof(struct ixgbe_mbx_operations));
92915f71 3152
92915f71
GR		 3153 /* setup the private structure */
3154 err = ixgbevf_sw_init(adapter);
1a0d6ae5
DK		 3155 if (err)
3156 goto err_sw_init;
3157
3158 /* The HW MAC address was set and/or determined in sw_init */
3159 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
3160
3161 if (!is_valid_ether_addr(netdev->dev_addr)) {
3162 pr_err("invalid MAC address\n");
3163 err = -EIO;
3164 goto err_sw_init;
3165 }
92915f71 3166
471a76de 3167 netdev->hw_features = NETIF_F_SG |
92915f71 3168 NETIF_F_IP_CSUM |
471a76de
MM		 3169 NETIF_F_IPV6_CSUM |
3170 NETIF_F_TSO |
3171 NETIF_F_TSO6 |
3172 NETIF_F_RXCSUM;
3173
3174 netdev->features = netdev->hw_features |
92915f71
GR		 3175 NETIF_F_HW_VLAN_TX |
3176 NETIF_F_HW_VLAN_RX |
3177 NETIF_F_HW_VLAN_FILTER;
3178
92915f71
GR		 3179 netdev->vlan_features |= NETIF_F_TSO;
3180 netdev->vlan_features |= NETIF_F_TSO6;
3181 netdev->vlan_features |= NETIF_F_IP_CSUM;
3bfacf96 3182 netdev->vlan_features |= NETIF_F_IPV6_CSUM;
92915f71
GR		 3183 netdev->vlan_features |= NETIF_F_SG;
3184
3185 if (pci_using_dac)
3186 netdev->features |= NETIF_F_HIGHDMA;
3187
01789349
JP		 3188 netdev->priv_flags |= IFF_UNICAST_FLT;
3189
92915f71 3190 init_timer(&adapter->watchdog_timer);
c061b18d 3191 adapter->watchdog_timer.function = ixgbevf_watchdog;
92915f71
GR		 3192 adapter->watchdog_timer.data = (unsigned long)adapter;
3193
3194 INIT_WORK(&adapter->reset_task, ixgbevf_reset_task);
3195 INIT_WORK(&adapter->watchdog_task, ixgbevf_watchdog_task);
3196
3197 err = ixgbevf_init_interrupt_scheme(adapter);
3198 if (err)
3199 goto err_sw_init;
3200
3201 /* pick up the PCI bus settings for reporting later */
3202 if (hw->mac.ops.get_bus_info)
3203 hw->mac.ops.get_bus_info(hw);
3204
92915f71
GR		 3205 strcpy(netdev->name, "eth%d");
3206
3207 err = register_netdev(netdev);
3208 if (err)
3209 goto err_register;
3210
5d426ad1
GR		 3211 netif_carrier_off(netdev);
3212
33bd9f60
GR		 3213 ixgbevf_init_last_counter_stats(adapter);
3214
92915f71 3215 /* print the MAC address */
f794e7ef 3216 hw_dbg(hw, "%pM\n", netdev->dev_addr);
92915f71
GR		 3217
3218 hw_dbg(hw, "MAC: %d\n", hw->mac.type);
3219
92915f71
GR		 3220 hw_dbg(hw, "Intel(R) 82599 Virtual Function\n");
3221 cards_found++;
3222 return 0;
3223
3224err_register:
0ac1e8ce 3225 ixgbevf_clear_interrupt_scheme(adapter);
92915f71
GR		 3226err_sw_init:
3227 ixgbevf_reset_interrupt_capability(adapter);
3228 iounmap(hw->hw_addr);
3229err_ioremap:
3230 free_netdev(netdev);
3231err_alloc_etherdev:
3232 pci_release_regions(pdev);
3233err_pci_reg:
3234err_dma:
3235 pci_disable_device(pdev);
3236 return err;
3237}
3238
3239/**
3240 * ixgbevf_remove - Device Removal Routine
3241 * @pdev: PCI device information struct
3242 *
3243 * ixgbevf_remove is called by the PCI subsystem to alert the driver
3244 * that it should release a PCI device. The could be caused by a
3245 * Hot-Plug event, or because the driver is going to be removed from
3246 * memory.
3247 **/
3248static void __devexit ixgbevf_remove(struct pci_dev *pdev)
3249{
3250 struct net_device *netdev = pci_get_drvdata(pdev);
3251 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3252
3253 set_bit(__IXGBEVF_DOWN, &adapter->state);
3254
3255 del_timer_sync(&adapter->watchdog_timer);
3256
23f333a2 3257 cancel_work_sync(&adapter->reset_task);
92915f71
GR		 3258 cancel_work_sync(&adapter->watchdog_task);
3259
fd13a9ab 3260 if (netdev->reg_state == NETREG_REGISTERED)
92915f71 3261 unregister_netdev(netdev);
92915f71 3262
0ac1e8ce 3263 ixgbevf_clear_interrupt_scheme(adapter);
92915f71
GR		 3264 ixgbevf_reset_interrupt_capability(adapter);
3265
3266 iounmap(adapter->hw.hw_addr);
3267 pci_release_regions(pdev);
3268
3269 hw_dbg(&adapter->hw, "Remove complete\n");
3270
3271 kfree(adapter->tx_ring);
3272 kfree(adapter->rx_ring);
3273
3274 free_netdev(netdev);
3275
3276 pci_disable_device(pdev);
3277}
3278
9f19f31d
AD		 3279/**
3280 * ixgbevf_io_error_detected - called when PCI error is detected
3281 * @pdev: Pointer to PCI device
3282 * @state: The current pci connection state
3283 *
3284 * This function is called after a PCI bus error affecting
3285 * this device has been detected.
3286 */
3287static pci_ers_result_t ixgbevf_io_error_detected(struct pci_dev *pdev,
3288 pci_channel_state_t state)
3289{
3290 struct net_device *netdev = pci_get_drvdata(pdev);
3291 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3292
3293 netif_device_detach(netdev);
3294
3295 if (state == pci_channel_io_perm_failure)
3296 return PCI_ERS_RESULT_DISCONNECT;
3297
3298 if (netif_running(netdev))
3299 ixgbevf_down(adapter);
3300
3301 pci_disable_device(pdev);
3302
3303 /* Request a slot slot reset. */
3304 return PCI_ERS_RESULT_NEED_RESET;
3305}
3306
3307/**
3308 * ixgbevf_io_slot_reset - called after the pci bus has been reset.
3309 * @pdev: Pointer to PCI device
3310 *
3311 * Restart the card from scratch, as if from a cold-boot. Implementation
3312 * resembles the first-half of the ixgbevf_resume routine.
3313 */
3314static pci_ers_result_t ixgbevf_io_slot_reset(struct pci_dev *pdev)
3315{
3316 struct net_device *netdev = pci_get_drvdata(pdev);
3317 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3318
3319 if (pci_enable_device_mem(pdev)) {
3320 dev_err(&pdev->dev,
3321 "Cannot re-enable PCI device after reset.\n");
3322 return PCI_ERS_RESULT_DISCONNECT;
3323 }
3324
3325 pci_set_master(pdev);
3326
3327 ixgbevf_reset(adapter);
3328
3329 return PCI_ERS_RESULT_RECOVERED;
3330}
3331
3332/**
3333 * ixgbevf_io_resume - called when traffic can start flowing again.
3334 * @pdev: Pointer to PCI device
3335 *
3336 * This callback is called when the error recovery driver tells us that
3337 * its OK to resume normal operation. Implementation resembles the
3338 * second-half of the ixgbevf_resume routine.
3339 */
3340static void ixgbevf_io_resume(struct pci_dev *pdev)
3341{
3342 struct net_device *netdev = pci_get_drvdata(pdev);
3343 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3344
3345 if (netif_running(netdev))
3346 ixgbevf_up(adapter);
3347
3348 netif_device_attach(netdev);
3349}
3350
3351/* PCI Error Recovery (ERS) */
3352static struct pci_error_handlers ixgbevf_err_handler = {
3353 .error_detected = ixgbevf_io_error_detected,
3354 .slot_reset = ixgbevf_io_slot_reset,
3355 .resume = ixgbevf_io_resume,
3356};
3357
92915f71
GR		 3358static struct pci_driver ixgbevf_driver = {
3359 .name = ixgbevf_driver_name,
3360 .id_table = ixgbevf_pci_tbl,
3361 .probe = ixgbevf_probe,
3362 .remove = __devexit_p(ixgbevf_remove),
0ac1e8ce
AD		 3363#ifdef CONFIG_PM
3364 /* Power Management Hooks */
3365 .suspend = ixgbevf_suspend,
3366 .resume = ixgbevf_resume,
3367#endif
92915f71 3368 .shutdown = ixgbevf_shutdown,
9f19f31d 3369 .err_handler = &ixgbevf_err_handler
92915f71
GR		 3370};
3371
3372/**
65d676c8 3373 * ixgbevf_init_module - Driver Registration Routine
92915f71 3374 *
65d676c8 3375 * ixgbevf_init_module is the first routine called when the driver is
92915f71
GR		 3376 * loaded. All it does is register with the PCI subsystem.
3377 **/
3378static int __init ixgbevf_init_module(void)
3379{
3380 int ret;
dbd9636e
JK		 3381 pr_info("%s - version %s\n", ixgbevf_driver_string,
3382 ixgbevf_driver_version);
92915f71 3383
dbd9636e 3384 pr_info("%s\n", ixgbevf_copyright);
92915f71
GR		 3385
3386 ret = pci_register_driver(&ixgbevf_driver);
3387 return ret;
3388}
3389
3390module_init(ixgbevf_init_module);
3391
3392/**
65d676c8 3393 * ixgbevf_exit_module - Driver Exit Cleanup Routine
92915f71 3394 *
65d676c8 3395 * ixgbevf_exit_module is called just before the driver is removed
92915f71
GR		 3396 * from memory.
3397 **/
3398static void __exit ixgbevf_exit_module(void)
3399{
3400 pci_unregister_driver(&ixgbevf_driver);
3401}
3402
3403#ifdef DEBUG
3404/**
65d676c8 3405 * ixgbevf_get_hw_dev_name - return device name string
92915f71
GR		 3406 * used by hardware layer to print debugging information
3407 **/
3408char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw)
3409{
3410 struct ixgbevf_adapter *adapter = hw->back;
3411 return adapter->netdev->name;
3412}
3413
3414#endif
3415module_exit(ixgbevf_exit_module);
3416
3417/* ixgbevf_main.c */
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