]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - drivers/net/ethernet/intel/ixgbevf/vf.c
ixgbevf: Add VF DCB + SR-IOV support
[mirror_ubuntu-artful-kernel.git] / drivers / net / ethernet / intel / ixgbevf / vf.c
CommitLineData
3047f90b
GR
1/*******************************************************************************
2
3 Intel 82599 Virtual Function driver
5c47a2b6 4 Copyright(c) 1999 - 2012 Intel Corporation.
3047f90b
GR
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26*******************************************************************************/
27
28#include "vf.h"
b5417bf8 29#include "ixgbevf.h"
3047f90b
GR
30
31/**
32 * ixgbevf_start_hw_vf - Prepare hardware for Tx/Rx
33 * @hw: pointer to hardware structure
34 *
35 * Starts the hardware by filling the bus info structure and media type, clears
36 * all on chip counters, initializes receive address registers, multicast
37 * table, VLAN filter table, calls routine to set up link and flow control
38 * settings, and leaves transmit and receive units disabled and uninitialized
39 **/
40static s32 ixgbevf_start_hw_vf(struct ixgbe_hw *hw)
41{
42 /* Clear adapter stopped flag */
43 hw->adapter_stopped = false;
44
45 return 0;
46}
47
48/**
49 * ixgbevf_init_hw_vf - virtual function hardware initialization
50 * @hw: pointer to hardware structure
51 *
52 * Initialize the hardware by resetting the hardware and then starting
53 * the hardware
54 **/
55static s32 ixgbevf_init_hw_vf(struct ixgbe_hw *hw)
56{
57 s32 status = hw->mac.ops.start_hw(hw);
58
59 hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
60
61 return status;
62}
63
64/**
65 * ixgbevf_reset_hw_vf - Performs hardware reset
66 * @hw: pointer to hardware structure
67 *
68 * Resets the hardware by reseting the transmit and receive units, masks and
69 * clears all interrupts.
70 **/
71static s32 ixgbevf_reset_hw_vf(struct ixgbe_hw *hw)
72{
73 struct ixgbe_mbx_info *mbx = &hw->mbx;
74 u32 timeout = IXGBE_VF_INIT_TIMEOUT;
75 s32 ret_val = IXGBE_ERR_INVALID_MAC_ADDR;
76 u32 msgbuf[IXGBE_VF_PERMADDR_MSG_LEN];
77 u8 *addr = (u8 *)(&msgbuf[1]);
78
79 /* Call adapter stop to disable tx/rx and clear interrupts */
80 hw->mac.ops.stop_adapter(hw);
81
31186785
AD
82 /* reset the api version */
83 hw->api_version = ixgbe_mbox_api_10;
84
3047f90b
GR
85 IXGBE_WRITE_REG(hw, IXGBE_VFCTRL, IXGBE_CTRL_RST);
86 IXGBE_WRITE_FLUSH(hw);
87
88 /* we cannot reset while the RSTI / RSTD bits are asserted */
89 while (!mbx->ops.check_for_rst(hw) && timeout) {
90 timeout--;
91 udelay(5);
92 }
93
94 if (!timeout)
95 return IXGBE_ERR_RESET_FAILED;
96
97 /* mailbox timeout can now become active */
98 mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT;
99
100 msgbuf[0] = IXGBE_VF_RESET;
101 mbx->ops.write_posted(hw, msgbuf, 1);
102
012dc19a 103 mdelay(10);
3047f90b
GR
104
105 /* set our "perm_addr" based on info provided by PF */
106 /* also set up the mc_filter_type which is piggy backed
107 * on the mac address in word 3 */
108 ret_val = mbx->ops.read_posted(hw, msgbuf, IXGBE_VF_PERMADDR_MSG_LEN);
109 if (ret_val)
110 return ret_val;
111
112 if (msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK))
113 return IXGBE_ERR_INVALID_MAC_ADDR;
114
ea99d832 115 memcpy(hw->mac.perm_addr, addr, ETH_ALEN);
3047f90b
GR
116 hw->mac.mc_filter_type = msgbuf[IXGBE_VF_MC_TYPE_WORD];
117
118 return 0;
119}
120
121/**
122 * ixgbevf_stop_hw_vf - Generic stop Tx/Rx units
123 * @hw: pointer to hardware structure
124 *
125 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
126 * disables transmit and receive units. The adapter_stopped flag is used by
127 * the shared code and drivers to determine if the adapter is in a stopped
128 * state and should not touch the hardware.
129 **/
130static s32 ixgbevf_stop_hw_vf(struct ixgbe_hw *hw)
131{
132 u32 number_of_queues;
133 u32 reg_val;
134 u16 i;
135
136 /*
137 * Set the adapter_stopped flag so other driver functions stop touching
138 * the hardware
139 */
140 hw->adapter_stopped = true;
141
142 /* Disable the receive unit by stopped each queue */
143 number_of_queues = hw->mac.max_rx_queues;
144 for (i = 0; i < number_of_queues; i++) {
145 reg_val = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(i));
146 if (reg_val & IXGBE_RXDCTL_ENABLE) {
147 reg_val &= ~IXGBE_RXDCTL_ENABLE;
148 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val);
149 }
150 }
151
152 IXGBE_WRITE_FLUSH(hw);
153
154 /* Clear interrupt mask to stop from interrupts being generated */
155 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK);
156
157 /* Clear any pending interrupts */
158 IXGBE_READ_REG(hw, IXGBE_VTEICR);
159
160 /* Disable the transmit unit. Each queue must be disabled. */
161 number_of_queues = hw->mac.max_tx_queues;
162 for (i = 0; i < number_of_queues; i++) {
163 reg_val = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(i));
164 if (reg_val & IXGBE_TXDCTL_ENABLE) {
165 reg_val &= ~IXGBE_TXDCTL_ENABLE;
166 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), reg_val);
167 }
168 }
169
170 return 0;
171}
172
173/**
174 * ixgbevf_mta_vector - Determines bit-vector in multicast table to set
175 * @hw: pointer to hardware structure
176 * @mc_addr: the multicast address
177 *
178 * Extracts the 12 bits, from a multicast address, to determine which
179 * bit-vector to set in the multicast table. The hardware uses 12 bits, from
180 * incoming rx multicast addresses, to determine the bit-vector to check in
181 * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set
182 * by the MO field of the MCSTCTRL. The MO field is set during initialization
183 * to mc_filter_type.
184 **/
185static s32 ixgbevf_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr)
186{
187 u32 vector = 0;
188
189 switch (hw->mac.mc_filter_type) {
190 case 0: /* use bits [47:36] of the address */
191 vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4));
192 break;
193 case 1: /* use bits [46:35] of the address */
194 vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5));
195 break;
196 case 2: /* use bits [45:34] of the address */
197 vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6));
198 break;
199 case 3: /* use bits [43:32] of the address */
200 vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8));
201 break;
202 default: /* Invalid mc_filter_type */
203 break;
204 }
205
206 /* vector can only be 12-bits or boundary will be exceeded */
207 vector &= 0xFFF;
208 return vector;
209}
210
211/**
212 * ixgbevf_get_mac_addr_vf - Read device MAC address
213 * @hw: pointer to the HW structure
214 * @mac_addr: pointer to storage for retrieved MAC address
215 **/
216static s32 ixgbevf_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr)
217{
ea99d832 218 memcpy(mac_addr, hw->mac.perm_addr, ETH_ALEN);
3047f90b
GR
219
220 return 0;
221}
222
46ec20ff
GR
223static s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr)
224{
225 struct ixgbe_mbx_info *mbx = &hw->mbx;
226 u32 msgbuf[3];
227 u8 *msg_addr = (u8 *)(&msgbuf[1]);
228 s32 ret_val;
229
230 memset(msgbuf, 0, sizeof(msgbuf));
231 /*
232 * If index is one then this is the start of a new list and needs
233 * indication to the PF so it can do it's own list management.
234 * If it is zero then that tells the PF to just clear all of
235 * this VF's macvlans and there is no new list.
236 */
237 msgbuf[0] |= index << IXGBE_VT_MSGINFO_SHIFT;
238 msgbuf[0] |= IXGBE_VF_SET_MACVLAN;
239 if (addr)
240 memcpy(msg_addr, addr, 6);
241 ret_val = mbx->ops.write_posted(hw, msgbuf, 3);
242
243 if (!ret_val)
244 ret_val = mbx->ops.read_posted(hw, msgbuf, 3);
245
246 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
247
248 if (!ret_val)
249 if (msgbuf[0] ==
250 (IXGBE_VF_SET_MACVLAN | IXGBE_VT_MSGTYPE_NACK))
251 ret_val = -ENOMEM;
252
253 return ret_val;
254}
255
3047f90b
GR
256/**
257 * ixgbevf_set_rar_vf - set device MAC address
258 * @hw: pointer to hardware structure
259 * @index: Receive address register to write
260 * @addr: Address to put into receive address register
261 * @vmdq: Unused in this implementation
262 **/
263static s32 ixgbevf_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr,
264 u32 vmdq)
265{
266 struct ixgbe_mbx_info *mbx = &hw->mbx;
267 u32 msgbuf[3];
268 u8 *msg_addr = (u8 *)(&msgbuf[1]);
269 s32 ret_val;
270
271 memset(msgbuf, 0, sizeof(msgbuf));
272 msgbuf[0] = IXGBE_VF_SET_MAC_ADDR;
273 memcpy(msg_addr, addr, 6);
274 ret_val = mbx->ops.write_posted(hw, msgbuf, 3);
275
276 if (!ret_val)
277 ret_val = mbx->ops.read_posted(hw, msgbuf, 3);
278
279 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
280
281 /* if nacked the address was rejected, use "perm_addr" */
282 if (!ret_val &&
283 (msgbuf[0] == (IXGBE_VF_SET_MAC_ADDR | IXGBE_VT_MSGTYPE_NACK)))
284 ixgbevf_get_mac_addr_vf(hw, hw->mac.addr);
285
286 return ret_val;
287}
288
3a2c4033
GR
289static void ixgbevf_write_msg_read_ack(struct ixgbe_hw *hw,
290 u32 *msg, u16 size)
291{
292 struct ixgbe_mbx_info *mbx = &hw->mbx;
293 u32 retmsg[IXGBE_VFMAILBOX_SIZE];
294 s32 retval = mbx->ops.write_posted(hw, msg, size);
295
296 if (!retval)
297 mbx->ops.read_posted(hw, retmsg, size);
298}
299
3047f90b
GR
300/**
301 * ixgbevf_update_mc_addr_list_vf - Update Multicast addresses
302 * @hw: pointer to the HW structure
5c58c47a 303 * @netdev: pointer to net device structure
3047f90b
GR
304 *
305 * Updates the Multicast Table Array.
306 **/
5c58c47a
JP
307static s32 ixgbevf_update_mc_addr_list_vf(struct ixgbe_hw *hw,
308 struct net_device *netdev)
3047f90b 309{
22bedad3 310 struct netdev_hw_addr *ha;
3047f90b
GR
311 u32 msgbuf[IXGBE_VFMAILBOX_SIZE];
312 u16 *vector_list = (u16 *)&msgbuf[1];
3047f90b 313 u32 cnt, i;
3047f90b
GR
314
315 /* Each entry in the list uses 1 16 bit word. We have 30
316 * 16 bit words available in our HW msg buffer (minus 1 for the
317 * msg type). That's 30 hash values if we pack 'em right. If
318 * there are more than 30 MC addresses to add then punt the
319 * extras for now and then add code to handle more than 30 later.
320 * It would be unusual for a server to request that many multi-cast
321 * addresses except for in large enterprise network environments.
322 */
323
5c58c47a
JP
324 cnt = netdev_mc_count(netdev);
325 if (cnt > 30)
326 cnt = 30;
3047f90b
GR
327 msgbuf[0] = IXGBE_VF_SET_MULTICAST;
328 msgbuf[0] |= cnt << IXGBE_VT_MSGINFO_SHIFT;
329
5c58c47a 330 i = 0;
22bedad3 331 netdev_for_each_mc_addr(ha, netdev) {
5c58c47a
JP
332 if (i == cnt)
333 break;
22bedad3 334 vector_list[i++] = ixgbevf_mta_vector(hw, ha->addr);
3047f90b
GR
335 }
336
3a2c4033 337 ixgbevf_write_msg_read_ack(hw, msgbuf, IXGBE_VFMAILBOX_SIZE);
3047f90b
GR
338
339 return 0;
340}
341
342/**
343 * ixgbevf_set_vfta_vf - Set/Unset vlan filter table address
344 * @hw: pointer to the HW structure
345 * @vlan: 12 bit VLAN ID
346 * @vind: unused by VF drivers
347 * @vlan_on: if true then set bit, else clear bit
348 **/
349static s32 ixgbevf_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind,
350 bool vlan_on)
351{
2ddc7fe1 352 struct ixgbe_mbx_info *mbx = &hw->mbx;
3047f90b 353 u32 msgbuf[2];
2ddc7fe1 354 s32 err;
3047f90b
GR
355
356 msgbuf[0] = IXGBE_VF_SET_VLAN;
357 msgbuf[1] = vlan;
358 /* Setting the 8 bit field MSG INFO to TRUE indicates "add" */
359 msgbuf[0] |= vlan_on << IXGBE_VT_MSGINFO_SHIFT;
360
2ddc7fe1
AD
361 err = mbx->ops.write_posted(hw, msgbuf, 2);
362 if (err)
363 goto mbx_err;
3a2c4033 364
2ddc7fe1
AD
365 err = mbx->ops.read_posted(hw, msgbuf, 2);
366 if (err)
367 goto mbx_err;
368
369 /* remove extra bits from the message */
370 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
371 msgbuf[0] &= ~(0xFF << IXGBE_VT_MSGINFO_SHIFT);
372
373 if (msgbuf[0] != (IXGBE_VF_SET_VLAN | IXGBE_VT_MSGTYPE_ACK))
374 err = IXGBE_ERR_INVALID_ARGUMENT;
375
376mbx_err:
377 return err;
3047f90b
GR
378}
379
380/**
381 * ixgbevf_setup_mac_link_vf - Setup MAC link settings
382 * @hw: pointer to hardware structure
383 * @speed: Unused in this implementation
384 * @autoneg: Unused in this implementation
385 * @autoneg_wait_to_complete: Unused in this implementation
386 *
387 * Do nothing and return success. VF drivers are not allowed to change
388 * global settings. Maintained for driver compatibility.
389 **/
390static s32 ixgbevf_setup_mac_link_vf(struct ixgbe_hw *hw,
391 ixgbe_link_speed speed, bool autoneg,
392 bool autoneg_wait_to_complete)
393{
394 return 0;
395}
396
397/**
398 * ixgbevf_check_mac_link_vf - Get link/speed status
399 * @hw: pointer to hardware structure
400 * @speed: pointer to link speed
401 * @link_up: true is link is up, false otherwise
402 * @autoneg_wait_to_complete: true when waiting for completion is needed
403 *
404 * Reads the links register to determine if link is up and the current speed
405 **/
406static s32 ixgbevf_check_mac_link_vf(struct ixgbe_hw *hw,
407 ixgbe_link_speed *speed,
408 bool *link_up,
409 bool autoneg_wait_to_complete)
410{
4b2cd27f
AD
411 struct ixgbe_mbx_info *mbx = &hw->mbx;
412 struct ixgbe_mac_info *mac = &hw->mac;
413 s32 ret_val = 0;
3047f90b 414 u32 links_reg;
4b2cd27f 415 u32 in_msg = 0;
3047f90b 416
4b2cd27f
AD
417 /* If we were hit with a reset drop the link */
418 if (!mbx->ops.check_for_rst(hw) || !mbx->timeout)
419 mac->get_link_status = true;
3047f90b 420
4b2cd27f
AD
421 if (!mac->get_link_status)
422 goto out;
3047f90b 423
4b2cd27f
AD
424 /* if link status is down no point in checking to see if pf is up */
425 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS);
426 if (!(links_reg & IXGBE_LINKS_UP))
427 goto out;
3047f90b 428
31a1b375
GR
429 switch (links_reg & IXGBE_LINKS_SPEED_82599) {
430 case IXGBE_LINKS_SPEED_10G_82599:
3047f90b 431 *speed = IXGBE_LINK_SPEED_10GB_FULL;
31a1b375
GR
432 break;
433 case IXGBE_LINKS_SPEED_1G_82599:
3047f90b 434 *speed = IXGBE_LINK_SPEED_1GB_FULL;
31a1b375
GR
435 break;
436 case IXGBE_LINKS_SPEED_100_82599:
437 *speed = IXGBE_LINK_SPEED_100_FULL;
438 break;
439 }
3047f90b 440
4b2cd27f
AD
441 /* if the read failed it could just be a mailbox collision, best wait
442 * until we are called again and don't report an error */
443 if (mbx->ops.read(hw, &in_msg, 1))
444 goto out;
445
446 if (!(in_msg & IXGBE_VT_MSGTYPE_CTS)) {
447 /* msg is not CTS and is NACK we must have lost CTS status */
448 if (in_msg & IXGBE_VT_MSGTYPE_NACK)
449 ret_val = -1;
450 goto out;
451 }
452
453 /* the pf is talking, if we timed out in the past we reinit */
454 if (!mbx->timeout) {
455 ret_val = -1;
456 goto out;
457 }
458
459 /* if we passed all the tests above then the link is up and we no
460 * longer need to check for link */
461 mac->get_link_status = false;
462
463out:
464 *link_up = !mac->get_link_status;
465 return ret_val;
3047f90b
GR
466}
467
dd1fe113
AD
468/**
469 * ixgbevf_rlpml_set_vf - Set the maximum receive packet length
470 * @hw: pointer to the HW structure
471 * @max_size: value to assign to max frame size
472 **/
473void ixgbevf_rlpml_set_vf(struct ixgbe_hw *hw, u16 max_size)
474{
475 u32 msgbuf[2];
476
477 msgbuf[0] = IXGBE_VF_SET_LPE;
478 msgbuf[1] = max_size;
479 ixgbevf_write_msg_read_ack(hw, msgbuf, 2);
480}
481
31186785
AD
482/**
483 * ixgbevf_negotiate_api_version - Negotiate supported API version
484 * @hw: pointer to the HW structure
485 * @api: integer containing requested API version
486 **/
487int ixgbevf_negotiate_api_version(struct ixgbe_hw *hw, int api)
488{
489 int err;
490 u32 msg[3];
491
492 /* Negotiate the mailbox API version */
493 msg[0] = IXGBE_VF_API_NEGOTIATE;
494 msg[1] = api;
495 msg[2] = 0;
496 err = hw->mbx.ops.write_posted(hw, msg, 3);
497
498 if (!err)
499 err = hw->mbx.ops.read_posted(hw, msg, 3);
500
501 if (!err) {
502 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS;
503
504 /* Store value and return 0 on success */
505 if (msg[0] == (IXGBE_VF_API_NEGOTIATE | IXGBE_VT_MSGTYPE_ACK)) {
506 hw->api_version = api;
507 return 0;
508 }
509
510 err = IXGBE_ERR_INVALID_ARGUMENT;
511 }
512
513 return err;
514}
515
56e94095
AD
516int ixgbevf_get_queues(struct ixgbe_hw *hw, unsigned int *num_tcs,
517 unsigned int *default_tc)
518{
519 int err;
520 u32 msg[5];
521
522 /* do nothing if API doesn't support ixgbevf_get_queues */
523 switch (hw->api_version) {
524 case ixgbe_mbox_api_11:
525 break;
526 default:
527 return 0;
528 }
529
530 /* Fetch queue configuration from the PF */
531 msg[0] = IXGBE_VF_GET_QUEUE;
532 msg[1] = msg[2] = msg[3] = msg[4] = 0;
533 err = hw->mbx.ops.write_posted(hw, msg, 5);
534
535 if (!err)
536 err = hw->mbx.ops.read_posted(hw, msg, 5);
537
538 if (!err) {
539 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS;
540
541 /*
542 * if we we didn't get an ACK there must have been
543 * some sort of mailbox error so we should treat it
544 * as such
545 */
546 if (msg[0] != (IXGBE_VF_GET_QUEUE | IXGBE_VT_MSGTYPE_ACK))
547 return IXGBE_ERR_MBX;
548
549 /* record and validate values from message */
550 hw->mac.max_tx_queues = msg[IXGBE_VF_TX_QUEUES];
551 if (hw->mac.max_tx_queues == 0 ||
552 hw->mac.max_tx_queues > IXGBE_VF_MAX_TX_QUEUES)
553 hw->mac.max_tx_queues = IXGBE_VF_MAX_TX_QUEUES;
554
555 hw->mac.max_rx_queues = msg[IXGBE_VF_RX_QUEUES];
556 if (hw->mac.max_rx_queues == 0 ||
557 hw->mac.max_rx_queues > IXGBE_VF_MAX_RX_QUEUES)
558 hw->mac.max_rx_queues = IXGBE_VF_MAX_RX_QUEUES;
559
560 *num_tcs = msg[IXGBE_VF_TRANS_VLAN];
561 /* in case of unknown state assume we cannot tag frames */
562 if (*num_tcs > hw->mac.max_rx_queues)
563 *num_tcs = 1;
564
565 *default_tc = msg[IXGBE_VF_DEF_QUEUE];
566 /* default to queue 0 on out-of-bounds queue number */
567 if (*default_tc >= hw->mac.max_tx_queues)
568 *default_tc = 0;
569 }
570
571 return err;
572}
573
3d8fe98f 574static const struct ixgbe_mac_operations ixgbevf_mac_ops = {
3047f90b
GR
575 .init_hw = ixgbevf_init_hw_vf,
576 .reset_hw = ixgbevf_reset_hw_vf,
577 .start_hw = ixgbevf_start_hw_vf,
578 .get_mac_addr = ixgbevf_get_mac_addr_vf,
579 .stop_adapter = ixgbevf_stop_hw_vf,
580 .setup_link = ixgbevf_setup_mac_link_vf,
581 .check_link = ixgbevf_check_mac_link_vf,
582 .set_rar = ixgbevf_set_rar_vf,
583 .update_mc_addr_list = ixgbevf_update_mc_addr_list_vf,
46ec20ff 584 .set_uc_addr = ixgbevf_set_uc_addr_vf,
3047f90b
GR
585 .set_vfta = ixgbevf_set_vfta_vf,
586};
587
3d8fe98f 588const struct ixgbevf_info ixgbevf_82599_vf_info = {
3047f90b
GR
589 .mac = ixgbe_mac_82599_vf,
590 .mac_ops = &ixgbevf_mac_ops,
591};
592
3d8fe98f 593const struct ixgbevf_info ixgbevf_X540_vf_info = {
2316aa2a
GR
594 .mac = ixgbe_mac_X540_vf,
595 .mac_ops = &ixgbevf_mac_ops,
596};