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net/mlx4: Move Ethernet related functionality from mlx4_core to mlx4_en
[mirror_ubuntu-zesty-kernel.git] / drivers / net / ethernet / mellanox / mlx4 / en_netdev.c
CommitLineData
c27a02cd
YP		 1/*
2 * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 *
32 */
33
34#include <linux/etherdevice.h>
35#include <linux/tcp.h>
36#include <linux/if_vlan.h>
37#include <linux/delay.h>
5a0e3ad6 38#include <linux/slab.h>
1eb8c695
AV		 39#include <linux/hash.h>
40#include <net/ip.h>
c27a02cd
YP		 41
42#include <linux/mlx4/driver.h>
43#include <linux/mlx4/device.h>
44#include <linux/mlx4/cmd.h>
45#include <linux/mlx4/cq.h>
46
47#include "mlx4_en.h"
48#include "en_port.h"
49
d317966b 50int mlx4_en_setup_tc(struct net_device *dev, u8 up)
897d7846 51{
bc6a4744
AV		 52 struct mlx4_en_priv *priv = netdev_priv(dev);
53 int i;
d317966b 54 unsigned int offset = 0;
bc6a4744
AV		 55
56 if (up && up != MLX4_EN_NUM_UP)
897d7846
AV		 57 return -EINVAL;
58
bc6a4744
AV		 59 netdev_set_num_tc(dev, up);
60
61 /* Partition Tx queues evenly amongst UP's */
bc6a4744 62 for (i = 0; i < up; i++) {
d317966b
AV		 63 netdev_set_tc_queue(dev, i, priv->num_tx_rings_p_up, offset);
64 offset += priv->num_tx_rings_p_up;
bc6a4744
AV		 65 }
66
897d7846
AV		 67 return 0;
68}
69
1eb8c695
AV		 70#ifdef CONFIG_RFS_ACCEL
71
72struct mlx4_en_filter {
73 struct list_head next;
74 struct work_struct work;
75
76 __be32 src_ip;
77 __be32 dst_ip;
78 __be16 src_port;
79 __be16 dst_port;
80
81 int rxq_index;
82 struct mlx4_en_priv *priv;
83 u32 flow_id; /* RFS infrastructure id */
84 int id; /* mlx4_en driver id */
85 u64 reg_id; /* Flow steering API id */
86 u8 activated; /* Used to prevent expiry before filter
87 * is attached
88 */
89 struct hlist_node filter_chain;
90};
91
92static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv);
93
94static void mlx4_en_filter_work(struct work_struct *work)
95{
96 struct mlx4_en_filter *filter = container_of(work,
97 struct mlx4_en_filter,
98 work);
99 struct mlx4_en_priv *priv = filter->priv;
100 struct mlx4_spec_list spec_tcp = {
101 .id = MLX4_NET_TRANS_RULE_ID_TCP,
102 {
103 .tcp_udp = {
104 .dst_port = filter->dst_port,
105 .dst_port_msk = (__force __be16)-1,
106 .src_port = filter->src_port,
107 .src_port_msk = (__force __be16)-1,
108 },
109 },
110 };
111 struct mlx4_spec_list spec_ip = {
112 .id = MLX4_NET_TRANS_RULE_ID_IPV4,
113 {
114 .ipv4 = {
115 .dst_ip = filter->dst_ip,
116 .dst_ip_msk = (__force __be32)-1,
117 .src_ip = filter->src_ip,
118 .src_ip_msk = (__force __be32)-1,
119 },
120 },
121 };
122 struct mlx4_spec_list spec_eth = {
123 .id = MLX4_NET_TRANS_RULE_ID_ETH,
124 };
125 struct mlx4_net_trans_rule rule = {
126 .list = LIST_HEAD_INIT(rule.list),
127 .queue_mode = MLX4_NET_TRANS_Q_LIFO,
128 .exclusive = 1,
129 .allow_loopback = 1,
130 .promisc_mode = MLX4_FS_PROMISC_NONE,
131 .port = priv->port,
132 .priority = MLX4_DOMAIN_RFS,
133 };
134 int rc;
1eb8c695
AV		 135 __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
136
137 list_add_tail(&spec_eth.list, &rule.list);
138 list_add_tail(&spec_ip.list, &rule.list);
139 list_add_tail(&spec_tcp.list, &rule.list);
140
1eb8c695 141 rule.qpn = priv->rss_map.qps[filter->rxq_index].qpn;
6bbb6d99 142 memcpy(spec_eth.eth.dst_mac, priv->dev->dev_addr, ETH_ALEN);
1eb8c695
AV		 143 memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
144
145 filter->activated = 0;
146
147 if (filter->reg_id) {
148 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
149 if (rc && rc != -ENOENT)
150 en_err(priv, "Error detaching flow. rc = %d\n", rc);
151 }
152
153 rc = mlx4_flow_attach(priv->mdev->dev, &rule, &filter->reg_id);
154 if (rc)
155 en_err(priv, "Error attaching flow. err = %d\n", rc);
156
157 mlx4_en_filter_rfs_expire(priv);
158
159 filter->activated = 1;
160}
161
162static inline struct hlist_head *
163filter_hash_bucket(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
164 __be16 src_port, __be16 dst_port)
165{
166 unsigned long l;
167 int bucket_idx;
168
169 l = (__force unsigned long)src_port |
170 ((__force unsigned long)dst_port << 2);
171 l ^= (__force unsigned long)(src_ip ^ dst_ip);
172
173 bucket_idx = hash_long(l, MLX4_EN_FILTER_HASH_SHIFT);
174
175 return &priv->filter_hash[bucket_idx];
176}
177
178static struct mlx4_en_filter *
179mlx4_en_filter_alloc(struct mlx4_en_priv *priv, int rxq_index, __be32 src_ip,
180 __be32 dst_ip, __be16 src_port, __be16 dst_port,
181 u32 flow_id)
182{
183 struct mlx4_en_filter *filter = NULL;
184
185 filter = kzalloc(sizeof(struct mlx4_en_filter), GFP_ATOMIC);
186 if (!filter)
187 return NULL;
188
189 filter->priv = priv;
190 filter->rxq_index = rxq_index;
191 INIT_WORK(&filter->work, mlx4_en_filter_work);
192
193 filter->src_ip = src_ip;
194 filter->dst_ip = dst_ip;
195 filter->src_port = src_port;
196 filter->dst_port = dst_port;
197
198 filter->flow_id = flow_id;
199
ee64c0ee 200 filter->id = priv->last_filter_id++ % RPS_NO_FILTER;
1eb8c695
AV		 201
202 list_add_tail(&filter->next, &priv->filters);
203 hlist_add_head(&filter->filter_chain,
204 filter_hash_bucket(priv, src_ip, dst_ip, src_port,
205 dst_port));
206
207 return filter;
208}
209
210static void mlx4_en_filter_free(struct mlx4_en_filter *filter)
211{
212 struct mlx4_en_priv *priv = filter->priv;
213 int rc;
214
215 list_del(&filter->next);
216
217 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
218 if (rc && rc != -ENOENT)
219 en_err(priv, "Error detaching flow. rc = %d\n", rc);
220
221 kfree(filter);
222}
223
224static inline struct mlx4_en_filter *
225mlx4_en_filter_find(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
226 __be16 src_port, __be16 dst_port)
227{
228 struct hlist_node *elem;
229 struct mlx4_en_filter *filter;
230 struct mlx4_en_filter *ret = NULL;
231
232 hlist_for_each_entry(filter, elem,
233 filter_hash_bucket(priv, src_ip, dst_ip,
234 src_port, dst_port),
235 filter_chain) {
236 if (filter->src_ip == src_ip &&
237 filter->dst_ip == dst_ip &&
238 filter->src_port == src_port &&
239 filter->dst_port == dst_port) {
240 ret = filter;
241 break;
242 }
243 }
244
245 return ret;
246}
247
248static int
249mlx4_en_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb,
250 u16 rxq_index, u32 flow_id)
251{
252 struct mlx4_en_priv *priv = netdev_priv(net_dev);
253 struct mlx4_en_filter *filter;
254 const struct iphdr *ip;
255 const __be16 *ports;
256 __be32 src_ip;
257 __be32 dst_ip;
258 __be16 src_port;
259 __be16 dst_port;
260 int nhoff = skb_network_offset(skb);
261 int ret = 0;
262
263 if (skb->protocol != htons(ETH_P_IP))
264 return -EPROTONOSUPPORT;
265
266 ip = (const struct iphdr *)(skb->data + nhoff);
267 if (ip_is_fragment(ip))
268 return -EPROTONOSUPPORT;
269
270 ports = (const __be16 *)(skb->data + nhoff + 4 * ip->ihl);
271
272 src_ip = ip->saddr;
273 dst_ip = ip->daddr;
274 src_port = ports[0];
275 dst_port = ports[1];
276
277 if (ip->protocol != IPPROTO_TCP)
278 return -EPROTONOSUPPORT;
279
280 spin_lock_bh(&priv->filters_lock);
281 filter = mlx4_en_filter_find(priv, src_ip, dst_ip, src_port, dst_port);
282 if (filter) {
283 if (filter->rxq_index == rxq_index)
284 goto out;
285
286 filter->rxq_index = rxq_index;
287 } else {
288 filter = mlx4_en_filter_alloc(priv, rxq_index,
289 src_ip, dst_ip,
290 src_port, dst_port, flow_id);
291 if (!filter) {
292 ret = -ENOMEM;
293 goto err;
294 }
295 }
296
297 queue_work(priv->mdev->workqueue, &filter->work);
298
299out:
300 ret = filter->id;
301err:
302 spin_unlock_bh(&priv->filters_lock);
303
304 return ret;
305}
306
307void mlx4_en_cleanup_filters(struct mlx4_en_priv *priv,
308 struct mlx4_en_rx_ring *rx_ring)
309{
310 struct mlx4_en_filter *filter, *tmp;
311 LIST_HEAD(del_list);
312
313 spin_lock_bh(&priv->filters_lock);
314 list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
315 list_move(&filter->next, &del_list);
316 hlist_del(&filter->filter_chain);
317 }
318 spin_unlock_bh(&priv->filters_lock);
319
320 list_for_each_entry_safe(filter, tmp, &del_list, next) {
321 cancel_work_sync(&filter->work);
322 mlx4_en_filter_free(filter);
323 }
324}
325
326static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv)
327{
328 struct mlx4_en_filter *filter = NULL, *tmp, *last_filter = NULL;
329 LIST_HEAD(del_list);
330 int i = 0;
331
332 spin_lock_bh(&priv->filters_lock);
333 list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
334 if (i > MLX4_EN_FILTER_EXPIRY_QUOTA)
335 break;
336
337 if (filter->activated &&
338 !work_pending(&filter->work) &&
339 rps_may_expire_flow(priv->dev,
340 filter->rxq_index, filter->flow_id,
341 filter->id)) {
342 list_move(&filter->next, &del_list);
343 hlist_del(&filter->filter_chain);
344 } else
345 last_filter = filter;
346
347 i++;
348 }
349
350 if (last_filter && (&last_filter->next != priv->filters.next))
351 list_move(&priv->filters, &last_filter->next);
352
353 spin_unlock_bh(&priv->filters_lock);
354
355 list_for_each_entry_safe(filter, tmp, &del_list, next)
356 mlx4_en_filter_free(filter);
357}
358#endif
359
8e586137 360static int mlx4_en_vlan_rx_add_vid(struct net_device *dev, unsigned short vid)
c27a02cd
YP		 361{
362 struct mlx4_en_priv *priv = netdev_priv(dev);
363 struct mlx4_en_dev *mdev = priv->mdev;
364 int err;
4c3eb3ca 365 int idx;
c27a02cd 366
f1b553fb 367 en_dbg(HW, priv, "adding VLAN:%d\n", vid);
c27a02cd 368
f1b553fb 369 set_bit(vid, priv->active_vlans);
c27a02cd
YP		 370
371 /* Add VID to port VLAN filter */
372 mutex_lock(&mdev->state_lock);
373 if (mdev->device_up && priv->port_up) {
f1b553fb 374 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
c27a02cd 375 if (err)
453a6082 376 en_err(priv, "Failed configuring VLAN filter\n");
c27a02cd 377 }
4c3eb3ca
EC		 378 if (mlx4_register_vlan(mdev->dev, priv->port, vid, &idx))
379 en_err(priv, "failed adding vlan %d\n", vid);
c27a02cd 380 mutex_unlock(&mdev->state_lock);
4c3eb3ca 381
8e586137 382 return 0;
c27a02cd
YP		 383}
384
8e586137 385static int mlx4_en_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
c27a02cd
YP		 386{
387 struct mlx4_en_priv *priv = netdev_priv(dev);
388 struct mlx4_en_dev *mdev = priv->mdev;
389 int err;
4c3eb3ca 390 int idx;
c27a02cd 391
f1b553fb 392 en_dbg(HW, priv, "Killing VID:%d\n", vid);
c27a02cd 393
f1b553fb 394 clear_bit(vid, priv->active_vlans);
c27a02cd
YP		 395
396 /* Remove VID from port VLAN filter */
397 mutex_lock(&mdev->state_lock);
4c3eb3ca
EC		 398 if (!mlx4_find_cached_vlan(mdev->dev, priv->port, vid, &idx))
399 mlx4_unregister_vlan(mdev->dev, priv->port, idx);
400 else
401 en_err(priv, "could not find vid %d in cache\n", vid);
402
c27a02cd 403 if (mdev->device_up && priv->port_up) {
f1b553fb 404 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
c27a02cd 405 if (err)
453a6082 406 en_err(priv, "Failed configuring VLAN filter\n");
c27a02cd
YP		 407 }
408 mutex_unlock(&mdev->state_lock);
8e586137
JP		 409
410 return 0;
c27a02cd
YP		 411}
412
6bbb6d99
YB		 413static void mlx4_en_u64_to_mac(unsigned char dst_mac[ETH_ALEN + 2], u64 src_mac)
414{
415 unsigned int i;
416 for (i = ETH_ALEN - 1; i; --i) {
417 dst_mac[i] = src_mac & 0xff;
418 src_mac >>= 8;
419 }
420 memset(&dst_mac[ETH_ALEN], 0, 2);
421}
422
16a10ffd
YB		 423static int mlx4_en_uc_steer_add(struct mlx4_en_priv *priv,
424 unsigned char *mac, int *qpn, u64 *reg_id)
425{
426 struct mlx4_en_dev *mdev = priv->mdev;
427 struct mlx4_dev *dev = mdev->dev;
428 int err;
429
430 switch (dev->caps.steering_mode) {
431 case MLX4_STEERING_MODE_B0: {
432 struct mlx4_qp qp;
433 u8 gid[16] = {0};
434
435 qp.qpn = *qpn;
436 memcpy(&gid[10], mac, ETH_ALEN);
437 gid[5] = priv->port;
438
439 err = mlx4_unicast_attach(dev, &qp, gid, 0, MLX4_PROT_ETH);
440 break;
441 }
442 case MLX4_STEERING_MODE_DEVICE_MANAGED: {
443 struct mlx4_spec_list spec_eth = { {NULL} };
444 __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
445
446 struct mlx4_net_trans_rule rule = {
447 .queue_mode = MLX4_NET_TRANS_Q_FIFO,
448 .exclusive = 0,
449 .allow_loopback = 1,
450 .promisc_mode = MLX4_FS_PROMISC_NONE,
451 .priority = MLX4_DOMAIN_NIC,
452 };
453
454 rule.port = priv->port;
455 rule.qpn = *qpn;
456 INIT_LIST_HEAD(&rule.list);
457
458 spec_eth.id = MLX4_NET_TRANS_RULE_ID_ETH;
459 memcpy(spec_eth.eth.dst_mac, mac, ETH_ALEN);
460 memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
461 list_add_tail(&spec_eth.list, &rule.list);
462
463 err = mlx4_flow_attach(dev, &rule, reg_id);
464 break;
465 }
466 default:
467 return -EINVAL;
468 }
469 if (err)
470 en_warn(priv, "Failed Attaching Unicast\n");
471
472 return err;
473}
474
475static void mlx4_en_uc_steer_release(struct mlx4_en_priv *priv,
476 unsigned char *mac, int qpn, u64 reg_id)
477{
478 struct mlx4_en_dev *mdev = priv->mdev;
479 struct mlx4_dev *dev = mdev->dev;
480
481 switch (dev->caps.steering_mode) {
482 case MLX4_STEERING_MODE_B0: {
483 struct mlx4_qp qp;
484 u8 gid[16] = {0};
485
486 qp.qpn = qpn;
487 memcpy(&gid[10], mac, ETH_ALEN);
488 gid[5] = priv->port;
489
490 mlx4_unicast_detach(dev, &qp, gid, MLX4_PROT_ETH);
491 break;
492 }
493 case MLX4_STEERING_MODE_DEVICE_MANAGED: {
494 mlx4_flow_detach(dev, reg_id);
495 break;
496 }
497 default:
498 en_err(priv, "Invalid steering mode.\n");
499 }
500}
501
502static int mlx4_en_get_qp(struct mlx4_en_priv *priv)
503{
504 struct mlx4_en_dev *mdev = priv->mdev;
505 struct mlx4_dev *dev = mdev->dev;
506 struct mlx4_mac_entry *entry;
507 int index = 0;
508 int err = 0;
509 u64 reg_id;
510 int *qpn = &priv->base_qpn;
511 u64 mac = mlx4_en_mac_to_u64(priv->dev->dev_addr);
512
513 en_dbg(DRV, priv, "Registering MAC: %pM for adding\n",
514 priv->dev->dev_addr);
515 index = mlx4_register_mac(dev, priv->port, mac);
516 if (index < 0) {
517 err = index;
518 en_err(priv, "Failed adding MAC: %pM\n",
519 priv->dev->dev_addr);
520 return err;
521 }
522
523 if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
524 int base_qpn = mlx4_get_base_qpn(dev, priv->port);
525 *qpn = base_qpn + index;
526 return 0;
527 }
528
529 err = mlx4_qp_reserve_range(dev, 1, 1, qpn);
530 en_dbg(DRV, priv, "Reserved qp %d\n", *qpn);
531 if (err) {
532 en_err(priv, "Failed to reserve qp for mac registration\n");
533 goto qp_err;
534 }
535
536 err = mlx4_en_uc_steer_add(priv, priv->dev->dev_addr, qpn, &reg_id);
537 if (err)
538 goto steer_err;
539
540 entry = kmalloc(sizeof(*entry), GFP_KERNEL);
541 if (!entry) {
542 err = -ENOMEM;
543 goto alloc_err;
544 }
545 memcpy(entry->mac, priv->dev->dev_addr, sizeof(entry->mac));
546 entry->reg_id = reg_id;
547
548 err = radix_tree_insert(&priv->mac_tree, *qpn, entry);
549 if (err)
550 goto insert_err;
551 return 0;
552
553insert_err:
554 kfree(entry);
555
556alloc_err:
557 mlx4_en_uc_steer_release(priv, priv->dev->dev_addr, *qpn, reg_id);
558
559steer_err:
560 mlx4_qp_release_range(dev, *qpn, 1);
561
562qp_err:
563 mlx4_unregister_mac(dev, priv->port, mac);
564 return err;
565}
566
567static void mlx4_en_put_qp(struct mlx4_en_priv *priv)
568{
569 struct mlx4_en_dev *mdev = priv->mdev;
570 struct mlx4_dev *dev = mdev->dev;
571 struct mlx4_mac_entry *entry;
572 int qpn = priv->base_qpn;
573 u64 mac = mlx4_en_mac_to_u64(priv->dev->dev_addr);
574
575 en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n",
576 priv->dev->dev_addr);
577 mlx4_unregister_mac(dev, priv->port, mac);
578
579 if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) {
580 entry = radix_tree_lookup(&priv->mac_tree, qpn);
581 if (entry) {
582 en_dbg(DRV, priv, "Releasing qp: port %d, MAC %pM, qpn %d\n",
583 priv->port, entry->mac, qpn);
584 mlx4_en_uc_steer_release(priv, entry->mac,
585 qpn, entry->reg_id);
586 mlx4_qp_release_range(dev, qpn, 1);
587 radix_tree_delete(&priv->mac_tree, qpn);
588 kfree(entry);
589 }
590 }
591}
592
593static int mlx4_en_replace_mac(struct mlx4_en_priv *priv, int qpn,
594 unsigned char *new_mac)
595{
596 struct mlx4_en_dev *mdev = priv->mdev;
597 struct mlx4_dev *dev = mdev->dev;
598 struct mlx4_mac_entry *entry;
599 int err = 0;
600 u64 new_mac_u64 = mlx4_en_mac_to_u64(new_mac);
601
602 if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) {
603 u64 prev_mac_u64;
604
605 entry = radix_tree_lookup(&priv->mac_tree, qpn);
606 if (!entry)
607 return -EINVAL;
608 prev_mac_u64 = mlx4_en_mac_to_u64(entry->mac);
609 mlx4_en_uc_steer_release(priv, entry->mac,
610 qpn, entry->reg_id);
611 mlx4_unregister_mac(dev, priv->port, prev_mac_u64);
612 memcpy(entry->mac, new_mac, ETH_ALEN);
613 entry->reg_id = 0;
614 mlx4_register_mac(dev, priv->port, new_mac_u64);
615 err = mlx4_en_uc_steer_add(priv, new_mac,
616 &qpn, &entry->reg_id);
617 return err;
618 }
619
620 return __mlx4_replace_mac(dev, priv->port, qpn, new_mac_u64);
621}
622
e7c1c2c4 623u64 mlx4_en_mac_to_u64(u8 *addr)
c27a02cd
YP		 624{
625 u64 mac = 0;
626 int i;
627
628 for (i = 0; i < ETH_ALEN; i++) {
629 mac <<= 8;
630 mac |= addr[i];
631 }
632 return mac;
633}
634
635static int mlx4_en_set_mac(struct net_device *dev, void *addr)
636{
637 struct mlx4_en_priv *priv = netdev_priv(dev);
638 struct mlx4_en_dev *mdev = priv->mdev;
639 struct sockaddr *saddr = addr;
640
641 if (!is_valid_ether_addr(saddr->sa_data))
642 return -EADDRNOTAVAIL;
643
644 memcpy(dev->dev_addr, saddr->sa_data, ETH_ALEN);
c27a02cd
YP		 645 queue_work(mdev->workqueue, &priv->mac_task);
646 return 0;
647}
648
649static void mlx4_en_do_set_mac(struct work_struct *work)
650{
651 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
652 mac_task);
653 struct mlx4_en_dev *mdev = priv->mdev;
654 int err = 0;
655
656 mutex_lock(&mdev->state_lock);
657 if (priv->port_up) {
658 /* Remove old MAC and insert the new one */
16a10ffd
YB		 659 err = mlx4_en_replace_mac(priv, priv->base_qpn,
660 priv->dev->dev_addr);
c27a02cd 661 if (err)
453a6082 662 en_err(priv, "Failed changing HW MAC address\n");
6bbb6d99
YB		 663 memcpy(priv->prev_mac, priv->dev->dev_addr,
664 sizeof(priv->prev_mac));
c27a02cd 665 } else
48e551ff 666 en_dbg(HW, priv, "Port is down while registering mac, exiting...\n");
c27a02cd
YP		 667
668 mutex_unlock(&mdev->state_lock);
669}
670
671static void mlx4_en_clear_list(struct net_device *dev)
672{
673 struct mlx4_en_priv *priv = netdev_priv(dev);
6d199937 674 struct mlx4_en_mc_list *tmp, *mc_to_del;
c27a02cd 675
6d199937
YP		 676 list_for_each_entry_safe(mc_to_del, tmp, &priv->mc_list, list) {
677 list_del(&mc_to_del->list);
678 kfree(mc_to_del);
679 }
c27a02cd
YP		 680}
681
682static void mlx4_en_cache_mclist(struct net_device *dev)
683{
684 struct mlx4_en_priv *priv = netdev_priv(dev);
22bedad3 685 struct netdev_hw_addr *ha;
6d199937 686 struct mlx4_en_mc_list *tmp;
ff6e2163 687
0e03567a 688 mlx4_en_clear_list(dev);
6d199937
YP		 689 netdev_for_each_mc_addr(ha, dev) {
690 tmp = kzalloc(sizeof(struct mlx4_en_mc_list), GFP_ATOMIC);
691 if (!tmp) {
692 en_err(priv, "failed to allocate multicast list\n");
693 mlx4_en_clear_list(dev);
694 return;
695 }
696 memcpy(tmp->addr, ha->addr, ETH_ALEN);
697 list_add_tail(&tmp->list, &priv->mc_list);
698 }
c27a02cd
YP		 699}
700
6d199937
YP		 701static void update_mclist_flags(struct mlx4_en_priv *priv,
702 struct list_head *dst,
703 struct list_head *src)
704{
705 struct mlx4_en_mc_list *dst_tmp, *src_tmp, *new_mc;
706 bool found;
707
708 /* Find all the entries that should be removed from dst,
709 * These are the entries that are not found in src
710 */
711 list_for_each_entry(dst_tmp, dst, list) {
712 found = false;
713 list_for_each_entry(src_tmp, src, list) {
714 if (!memcmp(dst_tmp->addr, src_tmp->addr, ETH_ALEN)) {
715 found = true;
716 break;
717 }
718 }
719 if (!found)
720 dst_tmp->action = MCLIST_REM;
721 }
722
723 /* Add entries that exist in src but not in dst
724 * mark them as need to add
725 */
726 list_for_each_entry(src_tmp, src, list) {
727 found = false;
728 list_for_each_entry(dst_tmp, dst, list) {
729 if (!memcmp(dst_tmp->addr, src_tmp->addr, ETH_ALEN)) {
730 dst_tmp->action = MCLIST_NONE;
731 found = true;
732 break;
733 }
734 }
735 if (!found) {
736 new_mc = kmalloc(sizeof(struct mlx4_en_mc_list),
737 GFP_KERNEL);
738 if (!new_mc) {
739 en_err(priv, "Failed to allocate current multicast list\n");
740 return;
741 }
742 memcpy(new_mc, src_tmp,
743 sizeof(struct mlx4_en_mc_list));
744 new_mc->action = MCLIST_ADD;
745 list_add_tail(&new_mc->list, dst);
746 }
747 }
748}
c27a02cd
YP		 749
750static void mlx4_en_set_multicast(struct net_device *dev)
751{
752 struct mlx4_en_priv *priv = netdev_priv(dev);
753
754 if (!priv->port_up)
755 return;
756
757 queue_work(priv->mdev->workqueue, &priv->mcast_task);
758}
759
760static void mlx4_en_do_set_multicast(struct work_struct *work)
761{
762 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
763 mcast_task);
764 struct mlx4_en_dev *mdev = priv->mdev;
765 struct net_device *dev = priv->dev;
6d199937 766 struct mlx4_en_mc_list *mclist, *tmp;
c27a02cd 767 u64 mcast_addr = 0;
1679200f 768 u8 mc_list[16] = {0};
c96d97f4 769 int err = 0;
c27a02cd
YP		 770
771 mutex_lock(&mdev->state_lock);
772 if (!mdev->device_up) {
48e551ff 773 en_dbg(HW, priv, "Card is not up, ignoring multicast change.\n");
c27a02cd
YP		 774 goto out;
775 }
776 if (!priv->port_up) {
48e551ff 777 en_dbg(HW, priv, "Port is down, ignoring multicast change.\n");
c27a02cd
YP		 778 goto out;
779 }
780
ffe455ad
EE		 781 if (!netif_carrier_ok(dev)) {
782 if (!mlx4_en_QUERY_PORT(mdev, priv->port)) {
783 if (priv->port_state.link_state) {
784 priv->last_link_state = MLX4_DEV_EVENT_PORT_UP;
785 netif_carrier_on(dev);
786 en_dbg(LINK, priv, "Link Up\n");
787 }
788 }
789 }
790
c27a02cd
YP		 791 /*
792 * Promsicuous mode: disable all filters
793 */
794
795 if (dev->flags & IFF_PROMISC) {
796 if (!(priv->flags & MLX4_EN_FLAG_PROMISC)) {
797 if (netif_msg_rx_status(priv))
453a6082 798 en_warn(priv, "Entering promiscuous mode\n");
c27a02cd
YP		 799 priv->flags |= MLX4_EN_FLAG_PROMISC;
800
801 /* Enable promiscouos mode */
c96d97f4 802 switch (mdev->dev->caps.steering_mode) {
592e49dd
HHZ		 803 case MLX4_STEERING_MODE_DEVICE_MANAGED:
804 err = mlx4_flow_steer_promisc_add(mdev->dev,
805 priv->port,
806 priv->base_qpn,
807 MLX4_FS_PROMISC_UPLINK);
808 if (err)
809 en_err(priv, "Failed enabling promiscuous mode\n");
810 priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
811 break;
812
c96d97f4
HHZ		 813 case MLX4_STEERING_MODE_B0:
814 err = mlx4_unicast_promisc_add(mdev->dev,
815 priv->base_qpn,
1679200f 816 priv->port);
c96d97f4
HHZ		 817 if (err)
818 en_err(priv, "Failed enabling unicast promiscuous mode\n");
819
820 /* Add the default qp number as multicast
821 * promisc
822 */
823 if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
824 err = mlx4_multicast_promisc_add(mdev->dev,
825 priv->base_qpn,
826 priv->port);
827 if (err)
828 en_err(priv, "Failed enabling multicast promiscuous mode\n");
829 priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
830 }
831 break;
832
833 case MLX4_STEERING_MODE_A0:
834 err = mlx4_SET_PORT_qpn_calc(mdev->dev,
835 priv->port,
836 priv->base_qpn,
837 1);
838 if (err)
839 en_err(priv, "Failed enabling promiscuous mode\n");
840 break;
841 }
c27a02cd
YP		 842
843 /* Disable port multicast filter (unconditionally) */
844 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
845 0, MLX4_MCAST_DISABLE);
846 if (err)
48e551ff 847 en_err(priv, "Failed disabling multicast filter\n");
c27a02cd 848
f1b553fb
JP		 849 /* Disable port VLAN filter */
850 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
851 if (err)
852 en_err(priv, "Failed disabling VLAN filter\n");
c27a02cd
YP		 853 }
854 goto out;
855 }
856
857 /*
25985edc 858 * Not in promiscuous mode
c27a02cd
YP		 859 */
860
861 if (priv->flags & MLX4_EN_FLAG_PROMISC) {
862 if (netif_msg_rx_status(priv))
453a6082 863 en_warn(priv, "Leaving promiscuous mode\n");
c27a02cd
YP		 864 priv->flags &= ~MLX4_EN_FLAG_PROMISC;
865
866 /* Disable promiscouos mode */
c96d97f4 867 switch (mdev->dev->caps.steering_mode) {
592e49dd
HHZ		 868 case MLX4_STEERING_MODE_DEVICE_MANAGED:
869 err = mlx4_flow_steer_promisc_remove(mdev->dev,
870 priv->port,
871 MLX4_FS_PROMISC_UPLINK);
872 if (err)
873 en_err(priv, "Failed disabling promiscuous mode\n");
874 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
875 break;
876
c96d97f4
HHZ		 877 case MLX4_STEERING_MODE_B0:
878 err = mlx4_unicast_promisc_remove(mdev->dev,
879 priv->base_qpn,
1679200f 880 priv->port);
c96d97f4
HHZ		 881 if (err)
882 en_err(priv, "Failed disabling unicast promiscuous mode\n");
883 /* Disable Multicast promisc */
884 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
885 err = mlx4_multicast_promisc_remove(mdev->dev,
886 priv->base_qpn,
887 priv->port);
888 if (err)
889 en_err(priv, "Failed disabling multicast promiscuous mode\n");
890 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
891 }
892 break;
c27a02cd 893
c96d97f4
HHZ		 894 case MLX4_STEERING_MODE_A0:
895 err = mlx4_SET_PORT_qpn_calc(mdev->dev,
896 priv->port,
897 priv->base_qpn, 0);
1679200f 898 if (err)
c96d97f4
HHZ		 899 en_err(priv, "Failed disabling promiscuous mode\n");
900 break;
1679200f
YP		 901 }
902
c27a02cd 903 /* Enable port VLAN filter */
f1b553fb 904 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
c27a02cd 905 if (err)
453a6082 906 en_err(priv, "Failed enabling VLAN filter\n");
c27a02cd
YP		 907 }
908
909 /* Enable/disable the multicast filter according to IFF_ALLMULTI */
910 if (dev->flags & IFF_ALLMULTI) {
911 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
912 0, MLX4_MCAST_DISABLE);
913 if (err)
453a6082 914 en_err(priv, "Failed disabling multicast filter\n");
1679200f
YP		 915
916 /* Add the default qp number as multicast promisc */
917 if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
c96d97f4 918 switch (mdev->dev->caps.steering_mode) {
592e49dd
HHZ		 919 case MLX4_STEERING_MODE_DEVICE_MANAGED:
920 err = mlx4_flow_steer_promisc_add(mdev->dev,
921 priv->port,
922 priv->base_qpn,
923 MLX4_FS_PROMISC_ALL_MULTI);
924 break;
925
c96d97f4
HHZ		 926 case MLX4_STEERING_MODE_B0:
927 err = mlx4_multicast_promisc_add(mdev->dev,
928 priv->base_qpn,
929 priv->port);
930 break;
931
932 case MLX4_STEERING_MODE_A0:
933 break;
934 }
1679200f
YP		 935 if (err)
936 en_err(priv, "Failed entering multicast promisc mode\n");
937 priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
938 }
c27a02cd 939 } else {
1679200f
YP		 940 /* Disable Multicast promisc */
941 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
c96d97f4 942 switch (mdev->dev->caps.steering_mode) {
592e49dd
HHZ		 943 case MLX4_STEERING_MODE_DEVICE_MANAGED:
944 err = mlx4_flow_steer_promisc_remove(mdev->dev,
945 priv->port,
946 MLX4_FS_PROMISC_ALL_MULTI);
947 break;
948
c96d97f4
HHZ		 949 case MLX4_STEERING_MODE_B0:
950 err = mlx4_multicast_promisc_remove(mdev->dev,
951 priv->base_qpn,
952 priv->port);
953 break;
954
955 case MLX4_STEERING_MODE_A0:
956 break;
957 }
1679200f 958 if (err)
25985edc 959 en_err(priv, "Failed disabling multicast promiscuous mode\n");
1679200f
YP		 960 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
961 }
ff6e2163 962
c27a02cd
YP		 963 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
964 0, MLX4_MCAST_DISABLE);
965 if (err)
453a6082 966 en_err(priv, "Failed disabling multicast filter\n");
c27a02cd
YP		 967
968 /* Flush mcast filter and init it with broadcast address */
969 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, ETH_BCAST,
970 1, MLX4_MCAST_CONFIG);
971
972 /* Update multicast list - we cache all addresses so they won't
973 * change while HW is updated holding the command semaphor */
dbd501a8 974 netif_addr_lock_bh(dev);
c27a02cd 975 mlx4_en_cache_mclist(dev);
dbd501a8 976 netif_addr_unlock_bh(dev);
6d199937
YP		 977 list_for_each_entry(mclist, &priv->mc_list, list) {
978 mcast_addr = mlx4_en_mac_to_u64(mclist->addr);
c27a02cd
YP		 979 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port,
980 mcast_addr, 0, MLX4_MCAST_CONFIG);
981 }
982 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
983 0, MLX4_MCAST_ENABLE);
984 if (err)
453a6082 985 en_err(priv, "Failed enabling multicast filter\n");
6d199937
YP		 986
987 update_mclist_flags(priv, &priv->curr_list, &priv->mc_list);
988 list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
989 if (mclist->action == MCLIST_REM) {
990 /* detach this address and delete from list */
991 memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
992 mc_list[5] = priv->port;
993 err = mlx4_multicast_detach(mdev->dev,
994 &priv->rss_map.indir_qp,
995 mc_list,
0ff1fb65
HHZ		 996 MLX4_PROT_ETH,
997 mclist->reg_id);
6d199937
YP		 998 if (err)
999 en_err(priv, "Fail to detach multicast address\n");
1000
1001 /* remove from list */
1002 list_del(&mclist->list);
1003 kfree(mclist);
9c64508a 1004 } else if (mclist->action == MCLIST_ADD) {
6d199937
YP		 1005 /* attach the address */
1006 memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
0ff1fb65 1007 /* needed for B0 steering support */
6d199937
YP		 1008 mc_list[5] = priv->port;
1009 err = mlx4_multicast_attach(mdev->dev,
1010 &priv->rss_map.indir_qp,
0ff1fb65
HHZ		 1011 mc_list,
1012 priv->port, 0,
1013 MLX4_PROT_ETH,
1014 &mclist->reg_id);
6d199937
YP		 1015 if (err)
1016 en_err(priv, "Fail to attach multicast address\n");
1017
1018 }
1019 }
c27a02cd
YP		 1020 }
1021out:
1022 mutex_unlock(&mdev->state_lock);
1023}
1024
1025#ifdef CONFIG_NET_POLL_CONTROLLER
1026static void mlx4_en_netpoll(struct net_device *dev)
1027{
1028 struct mlx4_en_priv *priv = netdev_priv(dev);
1029 struct mlx4_en_cq *cq;
1030 unsigned long flags;
1031 int i;
1032
1033 for (i = 0; i < priv->rx_ring_num; i++) {
1034 cq = &priv->rx_cq[i];
1035 spin_lock_irqsave(&cq->lock, flags);
1036 napi_synchronize(&cq->napi);
1037 mlx4_en_process_rx_cq(dev, cq, 0);
1038 spin_unlock_irqrestore(&cq->lock, flags);
1039 }
1040}
1041#endif
1042
1043static void mlx4_en_tx_timeout(struct net_device *dev)
1044{
1045 struct mlx4_en_priv *priv = netdev_priv(dev);
1046 struct mlx4_en_dev *mdev = priv->mdev;
1047
1048 if (netif_msg_timer(priv))
453a6082 1049 en_warn(priv, "Tx timeout called on port:%d\n", priv->port);
c27a02cd 1050
1e338db5 1051 priv->port_stats.tx_timeout++;
453a6082 1052 en_dbg(DRV, priv, "Scheduling watchdog\n");
1e338db5 1053 queue_work(mdev->workqueue, &priv->watchdog_task);
c27a02cd
YP		 1054}
1055
1056
1057static struct net_device_stats *mlx4_en_get_stats(struct net_device *dev)
1058{
1059 struct mlx4_en_priv *priv = netdev_priv(dev);
1060
1061 spin_lock_bh(&priv->stats_lock);
1062 memcpy(&priv->ret_stats, &priv->stats, sizeof(priv->stats));
1063 spin_unlock_bh(&priv->stats_lock);
1064
1065 return &priv->ret_stats;
1066}
1067
1068static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv)
1069{
c27a02cd
YP		 1070 struct mlx4_en_cq *cq;
1071 int i;
1072
1073 /* If we haven't received a specific coalescing setting
98a1708d 1074 * (module param), we set the moderation parameters as follows:
c27a02cd 1075 * - moder_cnt is set to the number of mtu sized packets to
ecfd2ce1 1076 * satisfy our coalescing target.
c27a02cd
YP		 1077 * - moder_time is set to a fixed value.
1078 */
3db36fb2 1079 priv->rx_frames = MLX4_EN_RX_COAL_TARGET;
60b9f9e5 1080 priv->rx_usecs = MLX4_EN_RX_COAL_TIME;
a19a848a
YP		 1081 priv->tx_frames = MLX4_EN_TX_COAL_PKTS;
1082 priv->tx_usecs = MLX4_EN_TX_COAL_TIME;
48e551ff
YB		 1083 en_dbg(INTR, priv, "Default coalesing params for mtu:%d - rx_frames:%d rx_usecs:%d\n",
1084 priv->dev->mtu, priv->rx_frames, priv->rx_usecs);
c27a02cd
YP		 1085
1086 /* Setup cq moderation params */
1087 for (i = 0; i < priv->rx_ring_num; i++) {
1088 cq = &priv->rx_cq[i];
1089 cq->moder_cnt = priv->rx_frames;
1090 cq->moder_time = priv->rx_usecs;
6b4d8d9f
AG		 1091 priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
1092 priv->last_moder_packets[i] = 0;
1093 priv->last_moder_bytes[i] = 0;
c27a02cd
YP		 1094 }
1095
1096 for (i = 0; i < priv->tx_ring_num; i++) {
1097 cq = &priv->tx_cq[i];
a19a848a
YP		 1098 cq->moder_cnt = priv->tx_frames;
1099 cq->moder_time = priv->tx_usecs;
c27a02cd
YP		 1100 }
1101
1102 /* Reset auto-moderation params */
1103 priv->pkt_rate_low = MLX4_EN_RX_RATE_LOW;
1104 priv->rx_usecs_low = MLX4_EN_RX_COAL_TIME_LOW;
1105 priv->pkt_rate_high = MLX4_EN_RX_RATE_HIGH;
1106 priv->rx_usecs_high = MLX4_EN_RX_COAL_TIME_HIGH;
1107 priv->sample_interval = MLX4_EN_SAMPLE_INTERVAL;
60b9f9e5 1108 priv->adaptive_rx_coal = 1;
c27a02cd 1109 priv->last_moder_jiffies = 0;
c27a02cd 1110 priv->last_moder_tx_packets = 0;
c27a02cd
YP		 1111}
1112
1113static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv)
1114{
1115 unsigned long period = (unsigned long) (jiffies - priv->last_moder_jiffies);
c27a02cd
YP		 1116 struct mlx4_en_cq *cq;
1117 unsigned long packets;
1118 unsigned long rate;
1119 unsigned long avg_pkt_size;
1120 unsigned long rx_packets;
1121 unsigned long rx_bytes;
c27a02cd
YP		 1122 unsigned long rx_pkt_diff;
1123 int moder_time;
6b4d8d9f 1124 int ring, err;
c27a02cd
YP		 1125
1126 if (!priv->adaptive_rx_coal || period < priv->sample_interval * HZ)
1127 return;
1128
6b4d8d9f
AG		 1129 for (ring = 0; ring < priv->rx_ring_num; ring++) {
1130 spin_lock_bh(&priv->stats_lock);
1131 rx_packets = priv->rx_ring[ring].packets;
1132 rx_bytes = priv->rx_ring[ring].bytes;
1133 spin_unlock_bh(&priv->stats_lock);
1134
1135 rx_pkt_diff = ((unsigned long) (rx_packets -
1136 priv->last_moder_packets[ring]));
1137 packets = rx_pkt_diff;
1138 rate = packets * HZ / period;
1139 avg_pkt_size = packets ? ((unsigned long) (rx_bytes -
1140 priv->last_moder_bytes[ring])) / packets : 0;
1141
1142 /* Apply auto-moderation only when packet rate
1143 * exceeds a rate that it matters */
1144 if (rate > (MLX4_EN_RX_RATE_THRESH / priv->rx_ring_num) &&
1145 avg_pkt_size > MLX4_EN_AVG_PKT_SMALL) {
c27a02cd
YP		 1146 if (rate < priv->pkt_rate_low)
1147 moder_time = priv->rx_usecs_low;
1148 else if (rate > priv->pkt_rate_high)
1149 moder_time = priv->rx_usecs_high;
1150 else
1151 moder_time = (rate - priv->pkt_rate_low) *
1152 (priv->rx_usecs_high - priv->rx_usecs_low) /
1153 (priv->pkt_rate_high - priv->pkt_rate_low) +
1154 priv->rx_usecs_low;
6b4d8d9f
AG		 1155 } else {
1156 moder_time = priv->rx_usecs_low;
c27a02cd 1157 }
c27a02cd 1158
6b4d8d9f
AG		 1159 if (moder_time != priv->last_moder_time[ring]) {
1160 priv->last_moder_time[ring] = moder_time;
1161 cq = &priv->rx_cq[ring];
c27a02cd
YP		 1162 cq->moder_time = moder_time;
1163 err = mlx4_en_set_cq_moder(priv, cq);
6b4d8d9f 1164 if (err)
48e551ff
YB		 1165 en_err(priv, "Failed modifying moderation for cq:%d\n",
1166 ring);
c27a02cd 1167 }
6b4d8d9f
AG		 1168 priv->last_moder_packets[ring] = rx_packets;
1169 priv->last_moder_bytes[ring] = rx_bytes;
c27a02cd
YP		 1170 }
1171
c27a02cd
YP		 1172 priv->last_moder_jiffies = jiffies;
1173}
1174
1175static void mlx4_en_do_get_stats(struct work_struct *work)
1176{
bf6aede7 1177 struct delayed_work *delay = to_delayed_work(work);
c27a02cd
YP		 1178 struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
1179 stats_task);
1180 struct mlx4_en_dev *mdev = priv->mdev;
1181 int err;
1182
c27a02cd
YP		 1183 mutex_lock(&mdev->state_lock);
1184 if (mdev->device_up) {
2d51837f
EE		 1185 err = mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 0);
1186 if (err)
1187 en_dbg(HW, priv, "Could not update stats\n");
1188
c27a02cd
YP		 1189 if (priv->port_up)
1190 mlx4_en_auto_moderation(priv);
1191
1192 queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
1193 }
d7e1a487
YP		 1194 if (mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port]) {
1195 queue_work(mdev->workqueue, &priv->mac_task);
1196 mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port] = 0;
1197 }
c27a02cd
YP		 1198 mutex_unlock(&mdev->state_lock);
1199}
1200
1201static void mlx4_en_linkstate(struct work_struct *work)
1202{
1203 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
1204 linkstate_task);
1205 struct mlx4_en_dev *mdev = priv->mdev;
1206 int linkstate = priv->link_state;
1207
1208 mutex_lock(&mdev->state_lock);
1209 /* If observable port state changed set carrier state and
1210 * report to system log */
1211 if (priv->last_link_state != linkstate) {
1212 if (linkstate == MLX4_DEV_EVENT_PORT_DOWN) {
e5cc44b2 1213 en_info(priv, "Link Down\n");
c27a02cd
YP		 1214 netif_carrier_off(priv->dev);
1215 } else {
e5cc44b2 1216 en_info(priv, "Link Up\n");
c27a02cd
YP		 1217 netif_carrier_on(priv->dev);
1218 }
1219 }
1220 priv->last_link_state = linkstate;
1221 mutex_unlock(&mdev->state_lock);
1222}
1223
1224
18cc42a3 1225int mlx4_en_start_port(struct net_device *dev)
c27a02cd
YP		 1226{
1227 struct mlx4_en_priv *priv = netdev_priv(dev);
1228 struct mlx4_en_dev *mdev = priv->mdev;
1229 struct mlx4_en_cq *cq;
1230 struct mlx4_en_tx_ring *tx_ring;
c27a02cd
YP		 1231 int rx_index = 0;
1232 int tx_index = 0;
c27a02cd
YP		 1233 int err = 0;
1234 int i;
1235 int j;
1679200f 1236 u8 mc_list[16] = {0};
c27a02cd
YP		 1237
1238 if (priv->port_up) {
453a6082 1239 en_dbg(DRV, priv, "start port called while port already up\n");
c27a02cd
YP		 1240 return 0;
1241 }
1242
6d199937
YP		 1243 INIT_LIST_HEAD(&priv->mc_list);
1244 INIT_LIST_HEAD(&priv->curr_list);
0d256c0e
HHZ		 1245 INIT_LIST_HEAD(&priv->ethtool_list);
1246 memset(&priv->ethtool_rules[0], 0,
1247 sizeof(struct ethtool_flow_id) * MAX_NUM_OF_FS_RULES);
6d199937 1248
c27a02cd
YP		 1249 /* Calculate Rx buf size */
1250 dev->mtu = min(dev->mtu, priv->max_mtu);
1251 mlx4_en_calc_rx_buf(dev);
453a6082 1252 en_dbg(DRV, priv, "Rx buf size:%d\n", priv->rx_skb_size);
38aab07c 1253
c27a02cd 1254 /* Configure rx cq's and rings */
38aab07c
YP		 1255 err = mlx4_en_activate_rx_rings(priv);
1256 if (err) {
453a6082 1257 en_err(priv, "Failed to activate RX rings\n");
38aab07c
YP		 1258 return err;
1259 }
c27a02cd
YP		 1260 for (i = 0; i < priv->rx_ring_num; i++) {
1261 cq = &priv->rx_cq[i];
c27a02cd 1262
76532d0c 1263 err = mlx4_en_activate_cq(priv, cq, i);
c27a02cd 1264 if (err) {
453a6082 1265 en_err(priv, "Failed activating Rx CQ\n");
a4233304 1266 goto cq_err;
c27a02cd
YP		 1267 }
1268 for (j = 0; j < cq->size; j++)
1269 cq->buf[j].owner_sr_opcode = MLX4_CQE_OWNER_MASK;
1270 err = mlx4_en_set_cq_moder(priv, cq);
1271 if (err) {
453a6082 1272 en_err(priv, "Failed setting cq moderation parameters");
c27a02cd
YP		 1273 mlx4_en_deactivate_cq(priv, cq);
1274 goto cq_err;
1275 }
1276 mlx4_en_arm_cq(priv, cq);
38aab07c 1277 priv->rx_ring[i].cqn = cq->mcq.cqn;
c27a02cd
YP		 1278 ++rx_index;
1279 }
1280
ffe455ad
EE		 1281 /* Set qp number */
1282 en_dbg(DRV, priv, "Getting qp number for port %d\n", priv->port);
16a10ffd 1283 err = mlx4_en_get_qp(priv);
1679200f 1284 if (err) {
ffe455ad 1285 en_err(priv, "Failed getting eth qp\n");
1679200f
YP		 1286 goto cq_err;
1287 }
1288 mdev->mac_removed[priv->port] = 0;
1289
c27a02cd
YP		 1290 err = mlx4_en_config_rss_steer(priv);
1291 if (err) {
453a6082 1292 en_err(priv, "Failed configuring rss steering\n");
1679200f 1293 goto mac_err;
c27a02cd
YP		 1294 }
1295
cabdc8ee
HHZ		 1296 err = mlx4_en_create_drop_qp(priv);
1297 if (err)
1298 goto rss_err;
1299
c27a02cd
YP		 1300 /* Configure tx cq's and rings */
1301 for (i = 0; i < priv->tx_ring_num; i++) {
1302 /* Configure cq */
1303 cq = &priv->tx_cq[i];
76532d0c 1304 err = mlx4_en_activate_cq(priv, cq, i);
c27a02cd 1305 if (err) {
453a6082 1306 en_err(priv, "Failed allocating Tx CQ\n");
c27a02cd
YP		 1307 goto tx_err;
1308 }
1309 err = mlx4_en_set_cq_moder(priv, cq);
1310 if (err) {
453a6082 1311 en_err(priv, "Failed setting cq moderation parameters");
c27a02cd
YP		 1312 mlx4_en_deactivate_cq(priv, cq);
1313 goto tx_err;
1314 }
453a6082 1315 en_dbg(DRV, priv, "Resetting index of collapsed CQ:%d to -1\n", i);
c27a02cd
YP		 1316 cq->buf->wqe_index = cpu_to_be16(0xffff);
1317
1318 /* Configure ring */
1319 tx_ring = &priv->tx_ring[i];
0e98b523 1320 err = mlx4_en_activate_tx_ring(priv, tx_ring, cq->mcq.cqn,
d317966b 1321 i / priv->num_tx_rings_p_up);
c27a02cd 1322 if (err) {
453a6082 1323 en_err(priv, "Failed allocating Tx ring\n");
c27a02cd
YP		 1324 mlx4_en_deactivate_cq(priv, cq);
1325 goto tx_err;
1326 }
5b263f53 1327 tx_ring->tx_queue = netdev_get_tx_queue(dev, i);
e22979d9
YP		 1328
1329 /* Arm CQ for TX completions */
1330 mlx4_en_arm_cq(priv, cq);
1331
c27a02cd
YP		 1332 /* Set initial ownership of all Tx TXBBs to SW (1) */
1333 for (j = 0; j < tx_ring->buf_size; j += STAMP_STRIDE)
1334 *((u32 *) (tx_ring->buf + j)) = 0xffffffff;
1335 ++tx_index;
1336 }
1337
1338 /* Configure port */
1339 err = mlx4_SET_PORT_general(mdev->dev, priv->port,
1340 priv->rx_skb_size + ETH_FCS_LEN,
d53b93f2
YP		 1341 priv->prof->tx_pause,
1342 priv->prof->tx_ppp,
1343 priv->prof->rx_pause,
1344 priv->prof->rx_ppp);
c27a02cd 1345 if (err) {
48e551ff
YB		 1346 en_err(priv, "Failed setting port general configurations for port %d, with error %d\n",
1347 priv->port, err);
c27a02cd
YP		 1348 goto tx_err;
1349 }
1350 /* Set default qp number */
1351 err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, priv->base_qpn, 0);
1352 if (err) {
453a6082 1353 en_err(priv, "Failed setting default qp numbers\n");
c27a02cd
YP		 1354 goto tx_err;
1355 }
c27a02cd
YP		 1356
1357 /* Init port */
453a6082 1358 en_dbg(HW, priv, "Initializing port\n");
c27a02cd
YP		 1359 err = mlx4_INIT_PORT(mdev->dev, priv->port);
1360 if (err) {
453a6082 1361 en_err(priv, "Failed Initializing port\n");
1679200f 1362 goto tx_err;
c27a02cd
YP		 1363 }
1364
1679200f
YP		 1365 /* Attach rx QP to bradcast address */
1366 memset(&mc_list[10], 0xff, ETH_ALEN);
0ff1fb65 1367 mc_list[5] = priv->port; /* needed for B0 steering support */
1679200f 1368 if (mlx4_multicast_attach(mdev->dev, &priv->rss_map.indir_qp, mc_list,
0ff1fb65
HHZ		 1369 priv->port, 0, MLX4_PROT_ETH,
1370 &priv->broadcast_id))
1679200f
YP		 1371 mlx4_warn(mdev, "Failed Attaching Broadcast\n");
1372
b5845f98
HX		 1373 /* Must redo promiscuous mode setup. */
1374 priv->flags &= ~(MLX4_EN_FLAG_PROMISC | MLX4_EN_FLAG_MC_PROMISC);
1375
c27a02cd
YP		 1376 /* Schedule multicast task to populate multicast list */
1377 queue_work(mdev->workqueue, &priv->mcast_task);
1378
93ece0c1
EE		 1379 mlx4_set_stats_bitmap(mdev->dev, &priv->stats_bitmap);
1380
c27a02cd 1381 priv->port_up = true;
a11faac7 1382 netif_tx_start_all_queues(dev);
3484aac1
AV		 1383 netif_device_attach(dev);
1384
c27a02cd
YP		 1385 return 0;
1386
c27a02cd
YP		 1387tx_err:
1388 while (tx_index--) {
1389 mlx4_en_deactivate_tx_ring(priv, &priv->tx_ring[tx_index]);
1390 mlx4_en_deactivate_cq(priv, &priv->tx_cq[tx_index]);
1391 }
cabdc8ee
HHZ		 1392 mlx4_en_destroy_drop_qp(priv);
1393rss_err:
c27a02cd 1394 mlx4_en_release_rss_steer(priv);
1679200f 1395mac_err:
16a10ffd 1396 mlx4_en_put_qp(priv);
c27a02cd
YP		 1397cq_err:
1398 while (rx_index--)
1399 mlx4_en_deactivate_cq(priv, &priv->rx_cq[rx_index]);
38aab07c
YP		 1400 for (i = 0; i < priv->rx_ring_num; i++)
1401 mlx4_en_deactivate_rx_ring(priv, &priv->rx_ring[i]);
c27a02cd
YP		 1402
1403 return err; /* need to close devices */
1404}
1405
1406
3484aac1 1407void mlx4_en_stop_port(struct net_device *dev, int detach)
c27a02cd
YP		 1408{
1409 struct mlx4_en_priv *priv = netdev_priv(dev);
1410 struct mlx4_en_dev *mdev = priv->mdev;
6d199937 1411 struct mlx4_en_mc_list *mclist, *tmp;
0d256c0e 1412 struct ethtool_flow_id *flow, *tmp_flow;
c27a02cd 1413 int i;
1679200f 1414 u8 mc_list[16] = {0};
c27a02cd
YP		 1415
1416 if (!priv->port_up) {
453a6082 1417 en_dbg(DRV, priv, "stop port called while port already down\n");
c27a02cd
YP		 1418 return;
1419 }
c27a02cd
YP		 1420
1421 /* Synchronize with tx routine */
1422 netif_tx_lock_bh(dev);
3484aac1
AV		 1423 if (detach)
1424 netif_device_detach(dev);
3c05f5ef 1425 netif_tx_stop_all_queues(dev);
c27a02cd
YP		 1426 netif_tx_unlock_bh(dev);
1427
3484aac1
AV		 1428 netif_tx_disable(dev);
1429
7c287380 1430 /* Set port as not active */
3c05f5ef 1431 priv->port_up = false;
c27a02cd 1432
db0e7cba
AY		 1433 /* Promsicuous mode */
1434 if (mdev->dev->caps.steering_mode ==
1435 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1436 priv->flags &= ~(MLX4_EN_FLAG_PROMISC |
1437 MLX4_EN_FLAG_MC_PROMISC);
1438 mlx4_flow_steer_promisc_remove(mdev->dev,
1439 priv->port,
1440 MLX4_FS_PROMISC_UPLINK);
1441 mlx4_flow_steer_promisc_remove(mdev->dev,
1442 priv->port,
1443 MLX4_FS_PROMISC_ALL_MULTI);
1444 } else if (priv->flags & MLX4_EN_FLAG_PROMISC) {
1445 priv->flags &= ~MLX4_EN_FLAG_PROMISC;
1446
1447 /* Disable promiscouos mode */
1448 mlx4_unicast_promisc_remove(mdev->dev, priv->base_qpn,
1449 priv->port);
1450
1451 /* Disable Multicast promisc */
1452 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
1453 mlx4_multicast_promisc_remove(mdev->dev, priv->base_qpn,
1454 priv->port);
1455 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
1456 }
1457 }
1458
1679200f
YP		 1459 /* Detach All multicasts */
1460 memset(&mc_list[10], 0xff, ETH_ALEN);
0ff1fb65 1461 mc_list[5] = priv->port; /* needed for B0 steering support */
1679200f 1462 mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp, mc_list,
0ff1fb65 1463 MLX4_PROT_ETH, priv->broadcast_id);
6d199937
YP		 1464 list_for_each_entry(mclist, &priv->curr_list, list) {
1465 memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
1679200f
YP		 1466 mc_list[5] = priv->port;
1467 mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp,
0ff1fb65 1468 mc_list, MLX4_PROT_ETH, mclist->reg_id);
1679200f
YP		 1469 }
1470 mlx4_en_clear_list(dev);
6d199937
YP		 1471 list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
1472 list_del(&mclist->list);
1473 kfree(mclist);
1474 }
1475
1679200f
YP		 1476 /* Flush multicast filter */
1477 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1, MLX4_MCAST_CONFIG);
1478
cabdc8ee
HHZ		 1479 mlx4_en_destroy_drop_qp(priv);
1480
c27a02cd
YP		 1481 /* Free TX Rings */
1482 for (i = 0; i < priv->tx_ring_num; i++) {
1483 mlx4_en_deactivate_tx_ring(priv, &priv->tx_ring[i]);
1484 mlx4_en_deactivate_cq(priv, &priv->tx_cq[i]);
1485 }
1486 msleep(10);
1487
1488 for (i = 0; i < priv->tx_ring_num; i++)
1489 mlx4_en_free_tx_buf(dev, &priv->tx_ring[i]);
1490
1491 /* Free RSS qps */
1492 mlx4_en_release_rss_steer(priv);
1493
ffe455ad 1494 /* Unregister Mac address for the port */
16a10ffd 1495 mlx4_en_put_qp(priv);
955154fa
MB		 1496 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAGS2_REASSIGN_MAC_EN))
1497 mdev->mac_removed[priv->port] = 1;
ffe455ad 1498
0d256c0e
HHZ		 1499 /* Remove flow steering rules for the port*/
1500 if (mdev->dev->caps.steering_mode ==
1501 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1502 ASSERT_RTNL();
1503 list_for_each_entry_safe(flow, tmp_flow,
1504 &priv->ethtool_list, list) {
1505 mlx4_flow_detach(mdev->dev, flow->id);
1506 list_del(&flow->list);
1507 }
1508 }
1509
c27a02cd
YP		 1510 /* Free RX Rings */
1511 for (i = 0; i < priv->rx_ring_num; i++) {
1512 mlx4_en_deactivate_rx_ring(priv, &priv->rx_ring[i]);
1513 while (test_bit(NAPI_STATE_SCHED, &priv->rx_cq[i].napi.state))
1514 msleep(1);
1515 mlx4_en_deactivate_cq(priv, &priv->rx_cq[i]);
1516 }
7c287380
YP		 1517
1518 /* close port*/
1519 mlx4_CLOSE_PORT(mdev->dev, priv->port);
c27a02cd
YP		 1520}
1521
1522static void mlx4_en_restart(struct work_struct *work)
1523{
1524 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
1525 watchdog_task);
1526 struct mlx4_en_dev *mdev = priv->mdev;
1527 struct net_device *dev = priv->dev;
5b263f53 1528 int i;
c27a02cd 1529
453a6082 1530 en_dbg(DRV, priv, "Watchdog task called for port %d\n", priv->port);
1e338db5
YP		 1531
1532 mutex_lock(&mdev->state_lock);
1533 if (priv->port_up) {
3484aac1 1534 mlx4_en_stop_port(dev, 1);
5b263f53
YP		 1535 for (i = 0; i < priv->tx_ring_num; i++)
1536 netdev_tx_reset_queue(priv->tx_ring[i].tx_queue);
1e338db5 1537 if (mlx4_en_start_port(dev))
453a6082 1538 en_err(priv, "Failed restarting port %d\n", priv->port);
1e338db5
YP		 1539 }
1540 mutex_unlock(&mdev->state_lock);
c27a02cd
YP		 1541}
1542
b477ba62 1543static void mlx4_en_clear_stats(struct net_device *dev)
c27a02cd
YP		 1544{
1545 struct mlx4_en_priv *priv = netdev_priv(dev);
1546 struct mlx4_en_dev *mdev = priv->mdev;
1547 int i;
c27a02cd 1548
c27a02cd 1549 if (mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 1))
453a6082 1550 en_dbg(HW, priv, "Failed dumping statistics\n");
c27a02cd
YP		 1551
1552 memset(&priv->stats, 0, sizeof(priv->stats));
1553 memset(&priv->pstats, 0, sizeof(priv->pstats));
b477ba62
EE		 1554 memset(&priv->pkstats, 0, sizeof(priv->pkstats));
1555 memset(&priv->port_stats, 0, sizeof(priv->port_stats));
c27a02cd
YP		 1556
1557 for (i = 0; i < priv->tx_ring_num; i++) {
1558 priv->tx_ring[i].bytes = 0;
1559 priv->tx_ring[i].packets = 0;
b477ba62 1560 priv->tx_ring[i].tx_csum = 0;
c27a02cd
YP		 1561 }
1562 for (i = 0; i < priv->rx_ring_num; i++) {
1563 priv->rx_ring[i].bytes = 0;
1564 priv->rx_ring[i].packets = 0;
b477ba62
EE		 1565 priv->rx_ring[i].csum_ok = 0;
1566 priv->rx_ring[i].csum_none = 0;
c27a02cd 1567 }
b477ba62
EE		 1568}
1569
1570static int mlx4_en_open(struct net_device *dev)
1571{
1572 struct mlx4_en_priv *priv = netdev_priv(dev);
1573 struct mlx4_en_dev *mdev = priv->mdev;
1574 int err = 0;
1575
1576 mutex_lock(&mdev->state_lock);
1577
1578 if (!mdev->device_up) {
1579 en_err(priv, "Cannot open - device down/disabled\n");
1580 err = -EBUSY;
1581 goto out;
1582 }
1583
1584 /* Reset HW statistics and SW counters */
1585 mlx4_en_clear_stats(dev);
c27a02cd 1586
c27a02cd
YP		 1587 err = mlx4_en_start_port(dev);
1588 if (err)
453a6082 1589 en_err(priv, "Failed starting port:%d\n", priv->port);
c27a02cd
YP		 1590
1591out:
1592 mutex_unlock(&mdev->state_lock);
1593 return err;
1594}
1595
1596
1597static int mlx4_en_close(struct net_device *dev)
1598{
1599 struct mlx4_en_priv *priv = netdev_priv(dev);
1600 struct mlx4_en_dev *mdev = priv->mdev;
1601
453a6082 1602 en_dbg(IFDOWN, priv, "Close port called\n");
c27a02cd
YP		 1603
1604 mutex_lock(&mdev->state_lock);
1605
3484aac1 1606 mlx4_en_stop_port(dev, 0);
c27a02cd
YP		 1607 netif_carrier_off(dev);
1608
1609 mutex_unlock(&mdev->state_lock);
1610 return 0;
1611}
1612
fe0af03c 1613void mlx4_en_free_resources(struct mlx4_en_priv *priv)
c27a02cd
YP		 1614{
1615 int i;
1616
1eb8c695
AV		 1617#ifdef CONFIG_RFS_ACCEL
1618 free_irq_cpu_rmap(priv->dev->rx_cpu_rmap);
1619 priv->dev->rx_cpu_rmap = NULL;
1620#endif
1621
c27a02cd
YP		 1622 for (i = 0; i < priv->tx_ring_num; i++) {
1623 if (priv->tx_ring[i].tx_info)
1624 mlx4_en_destroy_tx_ring(priv, &priv->tx_ring[i]);
1625 if (priv->tx_cq[i].buf)
fe0af03c 1626 mlx4_en_destroy_cq(priv, &priv->tx_cq[i]);
c27a02cd
YP		 1627 }
1628
1629 for (i = 0; i < priv->rx_ring_num; i++) {
1630 if (priv->rx_ring[i].rx_info)
68355f71
TLSC		 1631 mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
1632 priv->prof->rx_ring_size, priv->stride);
c27a02cd 1633 if (priv->rx_cq[i].buf)
fe0af03c 1634 mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
c27a02cd 1635 }
044ca2a5
YP		 1636
1637 if (priv->base_tx_qpn) {
1638 mlx4_qp_release_range(priv->mdev->dev, priv->base_tx_qpn, priv->tx_ring_num);
1639 priv->base_tx_qpn = 0;
1640 }
c27a02cd
YP		 1641}
1642
18cc42a3 1643int mlx4_en_alloc_resources(struct mlx4_en_priv *priv)
c27a02cd 1644{
c27a02cd
YP		 1645 struct mlx4_en_port_profile *prof = priv->prof;
1646 int i;
044ca2a5 1647 int err;
87a5c389 1648
044ca2a5 1649 err = mlx4_qp_reserve_range(priv->mdev->dev, priv->tx_ring_num, 256, &priv->base_tx_qpn);
87a5c389
YP		 1650 if (err) {
1651 en_err(priv, "failed reserving range for TX rings\n");
1652 return err;
1653 }
c27a02cd
YP		 1654
1655 /* Create tx Rings */
1656 for (i = 0; i < priv->tx_ring_num; i++) {
1657 if (mlx4_en_create_cq(priv, &priv->tx_cq[i],
1658 prof->tx_ring_size, i, TX))
1659 goto err;
1660
044ca2a5 1661 if (mlx4_en_create_tx_ring(priv, &priv->tx_ring[i], priv->base_tx_qpn + i,
c27a02cd
YP		 1662 prof->tx_ring_size, TXBB_SIZE))
1663 goto err;
1664 }
1665
1666 /* Create rx Rings */
1667 for (i = 0; i < priv->rx_ring_num; i++) {
1668 if (mlx4_en_create_cq(priv, &priv->rx_cq[i],
1669 prof->rx_ring_size, i, RX))
1670 goto err;
1671
1672 if (mlx4_en_create_rx_ring(priv, &priv->rx_ring[i],
1673 prof->rx_ring_size, priv->stride))
1674 goto err;
1675 }
1676
1eb8c695
AV		 1677#ifdef CONFIG_RFS_ACCEL
1678 priv->dev->rx_cpu_rmap = alloc_irq_cpu_rmap(priv->rx_ring_num);
1679 if (!priv->dev->rx_cpu_rmap)
1680 goto err;
1eb8c695
AV		 1681#endif
1682
c27a02cd
YP		 1683 return 0;
1684
1685err:
453a6082 1686 en_err(priv, "Failed to allocate NIC resources\n");
c27a02cd
YP		 1687 return -ENOMEM;
1688}
1689
1690
1691void mlx4_en_destroy_netdev(struct net_device *dev)
1692{
1693 struct mlx4_en_priv *priv = netdev_priv(dev);
1694 struct mlx4_en_dev *mdev = priv->mdev;
1695
453a6082 1696 en_dbg(DRV, priv, "Destroying netdev on port:%d\n", priv->port);
c27a02cd
YP		 1697
1698 /* Unregister device - this will close the port if it was up */
1699 if (priv->registered)
1700 unregister_netdev(dev);
1701
1702 if (priv->allocated)
1703 mlx4_free_hwq_res(mdev->dev, &priv->res, MLX4_EN_PAGE_SIZE);
1704
1705 cancel_delayed_work(&priv->stats_task);
c27a02cd
YP		 1706 /* flush any pending task for this netdev */
1707 flush_workqueue(mdev->workqueue);
1708
1709 /* Detach the netdev so tasks would not attempt to access it */
1710 mutex_lock(&mdev->state_lock);
1711 mdev->pndev[priv->port] = NULL;
1712 mutex_unlock(&mdev->state_lock);
1713
fe0af03c 1714 mlx4_en_free_resources(priv);
564c274c 1715
bc6a4744
AV		 1716 kfree(priv->tx_ring);
1717 kfree(priv->tx_cq);
1718
c27a02cd
YP		 1719 free_netdev(dev);
1720}
1721
1722static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu)
1723{
1724 struct mlx4_en_priv *priv = netdev_priv(dev);
1725 struct mlx4_en_dev *mdev = priv->mdev;
1726 int err = 0;
1727
453a6082 1728 en_dbg(DRV, priv, "Change MTU called - current:%d new:%d\n",
c27a02cd
YP		 1729 dev->mtu, new_mtu);
1730
1731 if ((new_mtu < MLX4_EN_MIN_MTU) || (new_mtu > priv->max_mtu)) {
453a6082 1732 en_err(priv, "Bad MTU size:%d.\n", new_mtu);
c27a02cd
YP		 1733 return -EPERM;
1734 }
1735 dev->mtu = new_mtu;
1736
1737 if (netif_running(dev)) {
1738 mutex_lock(&mdev->state_lock);
1739 if (!mdev->device_up) {
1740 /* NIC is probably restarting - let watchdog task reset
1741 * the port */
453a6082 1742 en_dbg(DRV, priv, "Change MTU called with card down!?\n");
c27a02cd 1743 } else {
3484aac1 1744 mlx4_en_stop_port(dev, 1);
c27a02cd
YP		 1745 err = mlx4_en_start_port(dev);
1746 if (err) {
453a6082 1747 en_err(priv, "Failed restarting port:%d\n",
c27a02cd
YP		 1748 priv->port);
1749 queue_work(mdev->workqueue, &priv->watchdog_task);
1750 }
1751 }
1752 mutex_unlock(&mdev->state_lock);
1753 }
1754 return 0;
1755}
1756
60d6fe99
AV		 1757static int mlx4_en_set_features(struct net_device *netdev,
1758 netdev_features_t features)
1759{
1760 struct mlx4_en_priv *priv = netdev_priv(netdev);
1761
1762 if (features & NETIF_F_LOOPBACK)
1763 priv->ctrl_flags |= cpu_to_be32(MLX4_WQE_CTRL_FORCE_LOOPBACK);
1764 else
1765 priv->ctrl_flags &=
1766 cpu_to_be32(~MLX4_WQE_CTRL_FORCE_LOOPBACK);
1767
79aeaccd
YB		 1768 mlx4_en_update_loopback_state(netdev, features);
1769
60d6fe99
AV		 1770 return 0;
1771
1772}
1773
3addc568
SH		 1774static const struct net_device_ops mlx4_netdev_ops = {
1775 .ndo_open = mlx4_en_open,
1776 .ndo_stop = mlx4_en_close,
1777 .ndo_start_xmit = mlx4_en_xmit,
f813cad8 1778 .ndo_select_queue = mlx4_en_select_queue,
3addc568 1779 .ndo_get_stats = mlx4_en_get_stats,
afc4b13d 1780 .ndo_set_rx_mode = mlx4_en_set_multicast,
3addc568 1781 .ndo_set_mac_address = mlx4_en_set_mac,
52255bbe 1782 .ndo_validate_addr = eth_validate_addr,
3addc568
SH		 1783 .ndo_change_mtu = mlx4_en_change_mtu,
1784 .ndo_tx_timeout = mlx4_en_tx_timeout,
3addc568
SH		 1785 .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
1786 .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
1787#ifdef CONFIG_NET_POLL_CONTROLLER
1788 .ndo_poll_controller = mlx4_en_netpoll,
1789#endif
60d6fe99 1790 .ndo_set_features = mlx4_en_set_features,
897d7846 1791 .ndo_setup_tc = mlx4_en_setup_tc,
1eb8c695
AV		 1792#ifdef CONFIG_RFS_ACCEL
1793 .ndo_rx_flow_steer = mlx4_en_filter_rfs,
1794#endif
3addc568
SH		 1795};
1796
c27a02cd
YP		 1797int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
1798 struct mlx4_en_port_profile *prof)
1799{
1800 struct net_device *dev;
1801 struct mlx4_en_priv *priv;
c27a02cd
YP		 1802 int err;
1803
f1593d22 1804 dev = alloc_etherdev_mqs(sizeof(struct mlx4_en_priv),
d317966b 1805 MAX_TX_RINGS, MAX_RX_RINGS);
41de8d4c 1806 if (dev == NULL)
c27a02cd 1807 return -ENOMEM;
c27a02cd 1808
d317966b
AV		 1809 netif_set_real_num_tx_queues(dev, prof->tx_ring_num);
1810 netif_set_real_num_rx_queues(dev, prof->rx_ring_num);
1811
c27a02cd 1812 SET_NETDEV_DEV(dev, &mdev->dev->pdev->dev);
741a00be 1813 dev->dev_id = port - 1;
c27a02cd
YP		 1814
1815 /*
1816 * Initialize driver private data
1817 */
1818
1819 priv = netdev_priv(dev);
1820 memset(priv, 0, sizeof(struct mlx4_en_priv));
1821 priv->dev = dev;
1822 priv->mdev = mdev;
ebf8c9aa 1823 priv->ddev = &mdev->pdev->dev;
c27a02cd
YP		 1824 priv->prof = prof;
1825 priv->port = port;
1826 priv->port_up = false;
c27a02cd 1827 priv->flags = prof->flags;
60d6fe99
AV		 1828 priv->ctrl_flags = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE |
1829 MLX4_WQE_CTRL_SOLICITED);
d317966b 1830 priv->num_tx_rings_p_up = mdev->profile.num_tx_rings_p_up;
c27a02cd 1831 priv->tx_ring_num = prof->tx_ring_num;
d317966b
AV		 1832
1833 priv->tx_ring = kzalloc(sizeof(struct mlx4_en_tx_ring) * MAX_TX_RINGS,
1834 GFP_KERNEL);
bc6a4744
AV		 1835 if (!priv->tx_ring) {
1836 err = -ENOMEM;
1837 goto out;
1838 }
d317966b
AV		 1839 priv->tx_cq = kzalloc(sizeof(struct mlx4_en_cq) * MAX_RX_RINGS,
1840 GFP_KERNEL);
bc6a4744
AV		 1841 if (!priv->tx_cq) {
1842 err = -ENOMEM;
1843 goto out;
1844 }
c27a02cd 1845 priv->rx_ring_num = prof->rx_ring_num;
08ff3235 1846 priv->cqe_factor = (mdev->dev->caps.cqe_size == 64) ? 1 : 0;
c27a02cd
YP		 1847 priv->mac_index = -1;
1848 priv->msg_enable = MLX4_EN_MSG_LEVEL;
1849 spin_lock_init(&priv->stats_lock);
1850 INIT_WORK(&priv->mcast_task, mlx4_en_do_set_multicast);
1851 INIT_WORK(&priv->mac_task, mlx4_en_do_set_mac);
c27a02cd
YP		 1852 INIT_WORK(&priv->watchdog_task, mlx4_en_restart);
1853 INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate);
1854 INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats);
564c274c
AV		 1855#ifdef CONFIG_MLX4_EN_DCB
1856 if (!mlx4_is_slave(priv->mdev->dev))
1857 dev->dcbnl_ops = &mlx4_en_dcbnl_ops;
1858#endif
c27a02cd 1859
16a10ffd
YB		 1860 INIT_RADIX_TREE(&priv->mac_tree, GFP_KERNEL);
1861
c27a02cd
YP		 1862 /* Query for default mac and max mtu */
1863 priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port];
6bbb6d99
YB		 1864
1865 /* Set default MAC */
1866 dev->addr_len = ETH_ALEN;
1867 mlx4_en_u64_to_mac(dev->dev_addr, mdev->dev->caps.def_mac[priv->port]);
1868 if (!is_valid_ether_addr(dev->dev_addr)) {
1869 en_err(priv, "Port: %d, invalid mac burned: %pM, quiting\n",
1870 priv->port, dev->dev_addr);
c27a02cd
YP		 1871 err = -EINVAL;
1872 goto out;
1873 }
1874
6bbb6d99
YB		 1875 memcpy(priv->prev_mac, dev->dev_addr, sizeof(priv->prev_mac));
1876
c27a02cd
YP		 1877 priv->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
1878 DS_SIZE * MLX4_EN_MAX_RX_FRAGS);
1879 err = mlx4_en_alloc_resources(priv);
1880 if (err)
1881 goto out;
1882
78fb2de7
AV		 1883#ifdef CONFIG_RFS_ACCEL
1884 INIT_LIST_HEAD(&priv->filters);
1885 spin_lock_init(&priv->filters_lock);
1886#endif
1887
c27a02cd
YP		 1888 /* Allocate page for receive rings */
1889 err = mlx4_alloc_hwq_res(mdev->dev, &priv->res,
1890 MLX4_EN_PAGE_SIZE, MLX4_EN_PAGE_SIZE);
1891 if (err) {
453a6082 1892 en_err(priv, "Failed to allocate page for rx qps\n");
c27a02cd
YP		 1893 goto out;
1894 }
1895 priv->allocated = 1;
1896
c27a02cd
YP		 1897 /*
1898 * Initialize netdev entry points
1899 */
3addc568 1900 dev->netdev_ops = &mlx4_netdev_ops;
c27a02cd 1901 dev->watchdog_timeo = MLX4_EN_WATCHDOG_TIMEOUT;
1eb63a28
BH		 1902 netif_set_real_num_tx_queues(dev, priv->tx_ring_num);
1903 netif_set_real_num_rx_queues(dev, priv->rx_ring_num);
3addc568 1904
c27a02cd
YP		 1905 SET_ETHTOOL_OPS(dev, &mlx4_en_ethtool_ops);
1906
c27a02cd
YP		 1907 /*
1908 * Set driver features
1909 */
c8c64cff
MM		 1910 dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
1911 if (mdev->LSO_support)
1912 dev->hw_features |= NETIF_F_TSO | NETIF_F_TSO6;
1913
1914 dev->vlan_features = dev->hw_features;
1915
ad86107f 1916 dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_RXHASH;
c8c64cff
MM		 1917 dev->features = dev->hw_features | NETIF_F_HIGHDMA |
1918 NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX |
1919 NETIF_F_HW_VLAN_FILTER;
60d6fe99 1920 dev->hw_features |= NETIF_F_LOOPBACK;
c27a02cd 1921
1eb8c695
AV		 1922 if (mdev->dev->caps.steering_mode ==
1923 MLX4_STEERING_MODE_DEVICE_MANAGED)
1924 dev->hw_features |= NETIF_F_NTUPLE;
1925
c27a02cd
YP		 1926 mdev->pndev[port] = dev;
1927
1928 netif_carrier_off(dev);
1929 err = register_netdev(dev);
1930 if (err) {
453a6082 1931 en_err(priv, "Netdev registration failed for port %d\n", port);
c27a02cd
YP		 1932 goto out;
1933 }
4234144f 1934 priv->registered = 1;
453a6082
YP		 1935
1936 en_warn(priv, "Using %d TX rings\n", prof->tx_ring_num);
1937 en_warn(priv, "Using %d RX rings\n", prof->rx_ring_num);
1938
79aeaccd
YB		 1939 mlx4_en_update_loopback_state(priv->dev, priv->dev->features);
1940
90822265 1941 /* Configure port */
5c8e9046 1942 mlx4_en_calc_rx_buf(dev);
90822265 1943 err = mlx4_SET_PORT_general(mdev->dev, priv->port,
5c8e9046
YP		 1944 priv->rx_skb_size + ETH_FCS_LEN,
1945 prof->tx_pause, prof->tx_ppp,
1946 prof->rx_pause, prof->rx_ppp);
90822265
YP		 1947 if (err) {
1948 en_err(priv, "Failed setting port general configurations "
1949 "for port %d, with error %d\n", priv->port, err);
1950 goto out;
1951 }
1952
1953 /* Init port */
1954 en_warn(priv, "Initializing port\n");
1955 err = mlx4_INIT_PORT(mdev->dev, priv->port);
1956 if (err) {
1957 en_err(priv, "Failed Initializing port\n");
1958 goto out;
1959 }
39f17b44 1960 mlx4_en_set_default_moderation(priv);
c27a02cd
YP		 1961 queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
1962 return 0;
1963
1964out:
1965 mlx4_en_destroy_netdev(dev);
1966 return err;
1967}
1968
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