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c27a02cd YP |
1 | /* |
2 | * Copyright (c) 2007 Mellanox Technologies. All rights reserved. | |
3 | * | |
4 | * This software is available to you under a choice of one of two | |
5 | * licenses. You may choose to be licensed under the terms of the GNU | |
6 | * General Public License (GPL) Version 2, available from the file | |
7 | * COPYING in the main directory of this source tree, or the | |
8 | * OpenIB.org BSD license below: | |
9 | * | |
10 | * Redistribution and use in source and binary forms, with or | |
11 | * without modification, are permitted provided that the following | |
12 | * conditions are met: | |
13 | * | |
14 | * - Redistributions of source code must retain the above | |
15 | * copyright notice, this list of conditions and the following | |
16 | * disclaimer. | |
17 | * | |
18 | * - Redistributions in binary form must reproduce the above | |
19 | * copyright notice, this list of conditions and the following | |
20 | * disclaimer in the documentation and/or other materials | |
21 | * provided with the distribution. | |
22 | * | |
23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
25 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
26 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
27 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
30 | * SOFTWARE. | |
31 | * | |
32 | */ | |
33 | ||
34 | #include <linux/etherdevice.h> | |
35 | #include <linux/tcp.h> | |
36 | #include <linux/if_vlan.h> | |
37 | #include <linux/delay.h> | |
5a0e3ad6 | 38 | #include <linux/slab.h> |
1eb8c695 AV |
39 | #include <linux/hash.h> |
40 | #include <net/ip.h> | |
c27a02cd YP |
41 | |
42 | #include <linux/mlx4/driver.h> | |
43 | #include <linux/mlx4/device.h> | |
44 | #include <linux/mlx4/cmd.h> | |
45 | #include <linux/mlx4/cq.h> | |
46 | ||
47 | #include "mlx4_en.h" | |
48 | #include "en_port.h" | |
49 | ||
d317966b | 50 | int mlx4_en_setup_tc(struct net_device *dev, u8 up) |
897d7846 | 51 | { |
bc6a4744 AV |
52 | struct mlx4_en_priv *priv = netdev_priv(dev); |
53 | int i; | |
d317966b | 54 | unsigned int offset = 0; |
bc6a4744 AV |
55 | |
56 | if (up && up != MLX4_EN_NUM_UP) | |
897d7846 AV |
57 | return -EINVAL; |
58 | ||
bc6a4744 AV |
59 | netdev_set_num_tc(dev, up); |
60 | ||
61 | /* Partition Tx queues evenly amongst UP's */ | |
bc6a4744 | 62 | for (i = 0; i < up; i++) { |
d317966b AV |
63 | netdev_set_tc_queue(dev, i, priv->num_tx_rings_p_up, offset); |
64 | offset += priv->num_tx_rings_p_up; | |
bc6a4744 AV |
65 | } |
66 | ||
897d7846 AV |
67 | return 0; |
68 | } | |
69 | ||
1eb8c695 AV |
70 | #ifdef CONFIG_RFS_ACCEL |
71 | ||
72 | struct mlx4_en_filter { | |
73 | struct list_head next; | |
74 | struct work_struct work; | |
75 | ||
76 | __be32 src_ip; | |
77 | __be32 dst_ip; | |
78 | __be16 src_port; | |
79 | __be16 dst_port; | |
80 | ||
81 | int rxq_index; | |
82 | struct mlx4_en_priv *priv; | |
83 | u32 flow_id; /* RFS infrastructure id */ | |
84 | int id; /* mlx4_en driver id */ | |
85 | u64 reg_id; /* Flow steering API id */ | |
86 | u8 activated; /* Used to prevent expiry before filter | |
87 | * is attached | |
88 | */ | |
89 | struct hlist_node filter_chain; | |
90 | }; | |
91 | ||
92 | static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv); | |
93 | ||
94 | static void mlx4_en_filter_work(struct work_struct *work) | |
95 | { | |
96 | struct mlx4_en_filter *filter = container_of(work, | |
97 | struct mlx4_en_filter, | |
98 | work); | |
99 | struct mlx4_en_priv *priv = filter->priv; | |
100 | struct mlx4_spec_list spec_tcp = { | |
101 | .id = MLX4_NET_TRANS_RULE_ID_TCP, | |
102 | { | |
103 | .tcp_udp = { | |
104 | .dst_port = filter->dst_port, | |
105 | .dst_port_msk = (__force __be16)-1, | |
106 | .src_port = filter->src_port, | |
107 | .src_port_msk = (__force __be16)-1, | |
108 | }, | |
109 | }, | |
110 | }; | |
111 | struct mlx4_spec_list spec_ip = { | |
112 | .id = MLX4_NET_TRANS_RULE_ID_IPV4, | |
113 | { | |
114 | .ipv4 = { | |
115 | .dst_ip = filter->dst_ip, | |
116 | .dst_ip_msk = (__force __be32)-1, | |
117 | .src_ip = filter->src_ip, | |
118 | .src_ip_msk = (__force __be32)-1, | |
119 | }, | |
120 | }, | |
121 | }; | |
122 | struct mlx4_spec_list spec_eth = { | |
123 | .id = MLX4_NET_TRANS_RULE_ID_ETH, | |
124 | }; | |
125 | struct mlx4_net_trans_rule rule = { | |
126 | .list = LIST_HEAD_INIT(rule.list), | |
127 | .queue_mode = MLX4_NET_TRANS_Q_LIFO, | |
128 | .exclusive = 1, | |
129 | .allow_loopback = 1, | |
130 | .promisc_mode = MLX4_FS_PROMISC_NONE, | |
131 | .port = priv->port, | |
132 | .priority = MLX4_DOMAIN_RFS, | |
133 | }; | |
134 | int rc; | |
1eb8c695 AV |
135 | __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16); |
136 | ||
137 | list_add_tail(&spec_eth.list, &rule.list); | |
138 | list_add_tail(&spec_ip.list, &rule.list); | |
139 | list_add_tail(&spec_tcp.list, &rule.list); | |
140 | ||
1eb8c695 | 141 | rule.qpn = priv->rss_map.qps[filter->rxq_index].qpn; |
6bbb6d99 | 142 | memcpy(spec_eth.eth.dst_mac, priv->dev->dev_addr, ETH_ALEN); |
1eb8c695 AV |
143 | memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN); |
144 | ||
145 | filter->activated = 0; | |
146 | ||
147 | if (filter->reg_id) { | |
148 | rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id); | |
149 | if (rc && rc != -ENOENT) | |
150 | en_err(priv, "Error detaching flow. rc = %d\n", rc); | |
151 | } | |
152 | ||
153 | rc = mlx4_flow_attach(priv->mdev->dev, &rule, &filter->reg_id); | |
154 | if (rc) | |
155 | en_err(priv, "Error attaching flow. err = %d\n", rc); | |
156 | ||
157 | mlx4_en_filter_rfs_expire(priv); | |
158 | ||
159 | filter->activated = 1; | |
160 | } | |
161 | ||
162 | static inline struct hlist_head * | |
163 | filter_hash_bucket(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip, | |
164 | __be16 src_port, __be16 dst_port) | |
165 | { | |
166 | unsigned long l; | |
167 | int bucket_idx; | |
168 | ||
169 | l = (__force unsigned long)src_port | | |
170 | ((__force unsigned long)dst_port << 2); | |
171 | l ^= (__force unsigned long)(src_ip ^ dst_ip); | |
172 | ||
173 | bucket_idx = hash_long(l, MLX4_EN_FILTER_HASH_SHIFT); | |
174 | ||
175 | return &priv->filter_hash[bucket_idx]; | |
176 | } | |
177 | ||
178 | static struct mlx4_en_filter * | |
179 | mlx4_en_filter_alloc(struct mlx4_en_priv *priv, int rxq_index, __be32 src_ip, | |
180 | __be32 dst_ip, __be16 src_port, __be16 dst_port, | |
181 | u32 flow_id) | |
182 | { | |
183 | struct mlx4_en_filter *filter = NULL; | |
184 | ||
185 | filter = kzalloc(sizeof(struct mlx4_en_filter), GFP_ATOMIC); | |
186 | if (!filter) | |
187 | return NULL; | |
188 | ||
189 | filter->priv = priv; | |
190 | filter->rxq_index = rxq_index; | |
191 | INIT_WORK(&filter->work, mlx4_en_filter_work); | |
192 | ||
193 | filter->src_ip = src_ip; | |
194 | filter->dst_ip = dst_ip; | |
195 | filter->src_port = src_port; | |
196 | filter->dst_port = dst_port; | |
197 | ||
198 | filter->flow_id = flow_id; | |
199 | ||
ee64c0ee | 200 | filter->id = priv->last_filter_id++ % RPS_NO_FILTER; |
1eb8c695 AV |
201 | |
202 | list_add_tail(&filter->next, &priv->filters); | |
203 | hlist_add_head(&filter->filter_chain, | |
204 | filter_hash_bucket(priv, src_ip, dst_ip, src_port, | |
205 | dst_port)); | |
206 | ||
207 | return filter; | |
208 | } | |
209 | ||
210 | static void mlx4_en_filter_free(struct mlx4_en_filter *filter) | |
211 | { | |
212 | struct mlx4_en_priv *priv = filter->priv; | |
213 | int rc; | |
214 | ||
215 | list_del(&filter->next); | |
216 | ||
217 | rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id); | |
218 | if (rc && rc != -ENOENT) | |
219 | en_err(priv, "Error detaching flow. rc = %d\n", rc); | |
220 | ||
221 | kfree(filter); | |
222 | } | |
223 | ||
224 | static inline struct mlx4_en_filter * | |
225 | mlx4_en_filter_find(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip, | |
226 | __be16 src_port, __be16 dst_port) | |
227 | { | |
228 | struct hlist_node *elem; | |
229 | struct mlx4_en_filter *filter; | |
230 | struct mlx4_en_filter *ret = NULL; | |
231 | ||
232 | hlist_for_each_entry(filter, elem, | |
233 | filter_hash_bucket(priv, src_ip, dst_ip, | |
234 | src_port, dst_port), | |
235 | filter_chain) { | |
236 | if (filter->src_ip == src_ip && | |
237 | filter->dst_ip == dst_ip && | |
238 | filter->src_port == src_port && | |
239 | filter->dst_port == dst_port) { | |
240 | ret = filter; | |
241 | break; | |
242 | } | |
243 | } | |
244 | ||
245 | return ret; | |
246 | } | |
247 | ||
248 | static int | |
249 | mlx4_en_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb, | |
250 | u16 rxq_index, u32 flow_id) | |
251 | { | |
252 | struct mlx4_en_priv *priv = netdev_priv(net_dev); | |
253 | struct mlx4_en_filter *filter; | |
254 | const struct iphdr *ip; | |
255 | const __be16 *ports; | |
256 | __be32 src_ip; | |
257 | __be32 dst_ip; | |
258 | __be16 src_port; | |
259 | __be16 dst_port; | |
260 | int nhoff = skb_network_offset(skb); | |
261 | int ret = 0; | |
262 | ||
263 | if (skb->protocol != htons(ETH_P_IP)) | |
264 | return -EPROTONOSUPPORT; | |
265 | ||
266 | ip = (const struct iphdr *)(skb->data + nhoff); | |
267 | if (ip_is_fragment(ip)) | |
268 | return -EPROTONOSUPPORT; | |
269 | ||
270 | ports = (const __be16 *)(skb->data + nhoff + 4 * ip->ihl); | |
271 | ||
272 | src_ip = ip->saddr; | |
273 | dst_ip = ip->daddr; | |
274 | src_port = ports[0]; | |
275 | dst_port = ports[1]; | |
276 | ||
277 | if (ip->protocol != IPPROTO_TCP) | |
278 | return -EPROTONOSUPPORT; | |
279 | ||
280 | spin_lock_bh(&priv->filters_lock); | |
281 | filter = mlx4_en_filter_find(priv, src_ip, dst_ip, src_port, dst_port); | |
282 | if (filter) { | |
283 | if (filter->rxq_index == rxq_index) | |
284 | goto out; | |
285 | ||
286 | filter->rxq_index = rxq_index; | |
287 | } else { | |
288 | filter = mlx4_en_filter_alloc(priv, rxq_index, | |
289 | src_ip, dst_ip, | |
290 | src_port, dst_port, flow_id); | |
291 | if (!filter) { | |
292 | ret = -ENOMEM; | |
293 | goto err; | |
294 | } | |
295 | } | |
296 | ||
297 | queue_work(priv->mdev->workqueue, &filter->work); | |
298 | ||
299 | out: | |
300 | ret = filter->id; | |
301 | err: | |
302 | spin_unlock_bh(&priv->filters_lock); | |
303 | ||
304 | return ret; | |
305 | } | |
306 | ||
307 | void mlx4_en_cleanup_filters(struct mlx4_en_priv *priv, | |
308 | struct mlx4_en_rx_ring *rx_ring) | |
309 | { | |
310 | struct mlx4_en_filter *filter, *tmp; | |
311 | LIST_HEAD(del_list); | |
312 | ||
313 | spin_lock_bh(&priv->filters_lock); | |
314 | list_for_each_entry_safe(filter, tmp, &priv->filters, next) { | |
315 | list_move(&filter->next, &del_list); | |
316 | hlist_del(&filter->filter_chain); | |
317 | } | |
318 | spin_unlock_bh(&priv->filters_lock); | |
319 | ||
320 | list_for_each_entry_safe(filter, tmp, &del_list, next) { | |
321 | cancel_work_sync(&filter->work); | |
322 | mlx4_en_filter_free(filter); | |
323 | } | |
324 | } | |
325 | ||
326 | static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv) | |
327 | { | |
328 | struct mlx4_en_filter *filter = NULL, *tmp, *last_filter = NULL; | |
329 | LIST_HEAD(del_list); | |
330 | int i = 0; | |
331 | ||
332 | spin_lock_bh(&priv->filters_lock); | |
333 | list_for_each_entry_safe(filter, tmp, &priv->filters, next) { | |
334 | if (i > MLX4_EN_FILTER_EXPIRY_QUOTA) | |
335 | break; | |
336 | ||
337 | if (filter->activated && | |
338 | !work_pending(&filter->work) && | |
339 | rps_may_expire_flow(priv->dev, | |
340 | filter->rxq_index, filter->flow_id, | |
341 | filter->id)) { | |
342 | list_move(&filter->next, &del_list); | |
343 | hlist_del(&filter->filter_chain); | |
344 | } else | |
345 | last_filter = filter; | |
346 | ||
347 | i++; | |
348 | } | |
349 | ||
350 | if (last_filter && (&last_filter->next != priv->filters.next)) | |
351 | list_move(&priv->filters, &last_filter->next); | |
352 | ||
353 | spin_unlock_bh(&priv->filters_lock); | |
354 | ||
355 | list_for_each_entry_safe(filter, tmp, &del_list, next) | |
356 | mlx4_en_filter_free(filter); | |
357 | } | |
358 | #endif | |
359 | ||
8e586137 | 360 | static int mlx4_en_vlan_rx_add_vid(struct net_device *dev, unsigned short vid) |
c27a02cd YP |
361 | { |
362 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
363 | struct mlx4_en_dev *mdev = priv->mdev; | |
364 | int err; | |
4c3eb3ca | 365 | int idx; |
c27a02cd | 366 | |
f1b553fb | 367 | en_dbg(HW, priv, "adding VLAN:%d\n", vid); |
c27a02cd | 368 | |
f1b553fb | 369 | set_bit(vid, priv->active_vlans); |
c27a02cd YP |
370 | |
371 | /* Add VID to port VLAN filter */ | |
372 | mutex_lock(&mdev->state_lock); | |
373 | if (mdev->device_up && priv->port_up) { | |
f1b553fb | 374 | err = mlx4_SET_VLAN_FLTR(mdev->dev, priv); |
c27a02cd | 375 | if (err) |
453a6082 | 376 | en_err(priv, "Failed configuring VLAN filter\n"); |
c27a02cd | 377 | } |
4c3eb3ca EC |
378 | if (mlx4_register_vlan(mdev->dev, priv->port, vid, &idx)) |
379 | en_err(priv, "failed adding vlan %d\n", vid); | |
c27a02cd | 380 | mutex_unlock(&mdev->state_lock); |
4c3eb3ca | 381 | |
8e586137 | 382 | return 0; |
c27a02cd YP |
383 | } |
384 | ||
8e586137 | 385 | static int mlx4_en_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid) |
c27a02cd YP |
386 | { |
387 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
388 | struct mlx4_en_dev *mdev = priv->mdev; | |
389 | int err; | |
4c3eb3ca | 390 | int idx; |
c27a02cd | 391 | |
f1b553fb | 392 | en_dbg(HW, priv, "Killing VID:%d\n", vid); |
c27a02cd | 393 | |
f1b553fb | 394 | clear_bit(vid, priv->active_vlans); |
c27a02cd YP |
395 | |
396 | /* Remove VID from port VLAN filter */ | |
397 | mutex_lock(&mdev->state_lock); | |
4c3eb3ca EC |
398 | if (!mlx4_find_cached_vlan(mdev->dev, priv->port, vid, &idx)) |
399 | mlx4_unregister_vlan(mdev->dev, priv->port, idx); | |
400 | else | |
401 | en_err(priv, "could not find vid %d in cache\n", vid); | |
402 | ||
c27a02cd | 403 | if (mdev->device_up && priv->port_up) { |
f1b553fb | 404 | err = mlx4_SET_VLAN_FLTR(mdev->dev, priv); |
c27a02cd | 405 | if (err) |
453a6082 | 406 | en_err(priv, "Failed configuring VLAN filter\n"); |
c27a02cd YP |
407 | } |
408 | mutex_unlock(&mdev->state_lock); | |
8e586137 JP |
409 | |
410 | return 0; | |
c27a02cd YP |
411 | } |
412 | ||
6bbb6d99 YB |
413 | static void mlx4_en_u64_to_mac(unsigned char dst_mac[ETH_ALEN + 2], u64 src_mac) |
414 | { | |
415 | unsigned int i; | |
416 | for (i = ETH_ALEN - 1; i; --i) { | |
417 | dst_mac[i] = src_mac & 0xff; | |
418 | src_mac >>= 8; | |
419 | } | |
420 | memset(&dst_mac[ETH_ALEN], 0, 2); | |
421 | } | |
422 | ||
16a10ffd YB |
423 | static int mlx4_en_uc_steer_add(struct mlx4_en_priv *priv, |
424 | unsigned char *mac, int *qpn, u64 *reg_id) | |
425 | { | |
426 | struct mlx4_en_dev *mdev = priv->mdev; | |
427 | struct mlx4_dev *dev = mdev->dev; | |
428 | int err; | |
429 | ||
430 | switch (dev->caps.steering_mode) { | |
431 | case MLX4_STEERING_MODE_B0: { | |
432 | struct mlx4_qp qp; | |
433 | u8 gid[16] = {0}; | |
434 | ||
435 | qp.qpn = *qpn; | |
436 | memcpy(&gid[10], mac, ETH_ALEN); | |
437 | gid[5] = priv->port; | |
438 | ||
439 | err = mlx4_unicast_attach(dev, &qp, gid, 0, MLX4_PROT_ETH); | |
440 | break; | |
441 | } | |
442 | case MLX4_STEERING_MODE_DEVICE_MANAGED: { | |
443 | struct mlx4_spec_list spec_eth = { {NULL} }; | |
444 | __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16); | |
445 | ||
446 | struct mlx4_net_trans_rule rule = { | |
447 | .queue_mode = MLX4_NET_TRANS_Q_FIFO, | |
448 | .exclusive = 0, | |
449 | .allow_loopback = 1, | |
450 | .promisc_mode = MLX4_FS_PROMISC_NONE, | |
451 | .priority = MLX4_DOMAIN_NIC, | |
452 | }; | |
453 | ||
454 | rule.port = priv->port; | |
455 | rule.qpn = *qpn; | |
456 | INIT_LIST_HEAD(&rule.list); | |
457 | ||
458 | spec_eth.id = MLX4_NET_TRANS_RULE_ID_ETH; | |
459 | memcpy(spec_eth.eth.dst_mac, mac, ETH_ALEN); | |
460 | memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN); | |
461 | list_add_tail(&spec_eth.list, &rule.list); | |
462 | ||
463 | err = mlx4_flow_attach(dev, &rule, reg_id); | |
464 | break; | |
465 | } | |
466 | default: | |
467 | return -EINVAL; | |
468 | } | |
469 | if (err) | |
470 | en_warn(priv, "Failed Attaching Unicast\n"); | |
471 | ||
472 | return err; | |
473 | } | |
474 | ||
475 | static void mlx4_en_uc_steer_release(struct mlx4_en_priv *priv, | |
476 | unsigned char *mac, int qpn, u64 reg_id) | |
477 | { | |
478 | struct mlx4_en_dev *mdev = priv->mdev; | |
479 | struct mlx4_dev *dev = mdev->dev; | |
480 | ||
481 | switch (dev->caps.steering_mode) { | |
482 | case MLX4_STEERING_MODE_B0: { | |
483 | struct mlx4_qp qp; | |
484 | u8 gid[16] = {0}; | |
485 | ||
486 | qp.qpn = qpn; | |
487 | memcpy(&gid[10], mac, ETH_ALEN); | |
488 | gid[5] = priv->port; | |
489 | ||
490 | mlx4_unicast_detach(dev, &qp, gid, MLX4_PROT_ETH); | |
491 | break; | |
492 | } | |
493 | case MLX4_STEERING_MODE_DEVICE_MANAGED: { | |
494 | mlx4_flow_detach(dev, reg_id); | |
495 | break; | |
496 | } | |
497 | default: | |
498 | en_err(priv, "Invalid steering mode.\n"); | |
499 | } | |
500 | } | |
501 | ||
502 | static int mlx4_en_get_qp(struct mlx4_en_priv *priv) | |
503 | { | |
504 | struct mlx4_en_dev *mdev = priv->mdev; | |
505 | struct mlx4_dev *dev = mdev->dev; | |
506 | struct mlx4_mac_entry *entry; | |
507 | int index = 0; | |
508 | int err = 0; | |
509 | u64 reg_id; | |
510 | int *qpn = &priv->base_qpn; | |
511 | u64 mac = mlx4_en_mac_to_u64(priv->dev->dev_addr); | |
512 | ||
513 | en_dbg(DRV, priv, "Registering MAC: %pM for adding\n", | |
514 | priv->dev->dev_addr); | |
515 | index = mlx4_register_mac(dev, priv->port, mac); | |
516 | if (index < 0) { | |
517 | err = index; | |
518 | en_err(priv, "Failed adding MAC: %pM\n", | |
519 | priv->dev->dev_addr); | |
520 | return err; | |
521 | } | |
522 | ||
523 | if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) { | |
524 | int base_qpn = mlx4_get_base_qpn(dev, priv->port); | |
525 | *qpn = base_qpn + index; | |
526 | return 0; | |
527 | } | |
528 | ||
529 | err = mlx4_qp_reserve_range(dev, 1, 1, qpn); | |
530 | en_dbg(DRV, priv, "Reserved qp %d\n", *qpn); | |
531 | if (err) { | |
532 | en_err(priv, "Failed to reserve qp for mac registration\n"); | |
533 | goto qp_err; | |
534 | } | |
535 | ||
536 | err = mlx4_en_uc_steer_add(priv, priv->dev->dev_addr, qpn, ®_id); | |
537 | if (err) | |
538 | goto steer_err; | |
539 | ||
540 | entry = kmalloc(sizeof(*entry), GFP_KERNEL); | |
541 | if (!entry) { | |
542 | err = -ENOMEM; | |
543 | goto alloc_err; | |
544 | } | |
545 | memcpy(entry->mac, priv->dev->dev_addr, sizeof(entry->mac)); | |
546 | entry->reg_id = reg_id; | |
547 | ||
c07cb4b0 YB |
548 | hlist_add_head_rcu(&entry->hlist, |
549 | &priv->mac_hash[entry->mac[MLX4_EN_MAC_HASH_IDX]]); | |
16a10ffd | 550 | |
c07cb4b0 | 551 | return 0; |
16a10ffd YB |
552 | |
553 | alloc_err: | |
554 | mlx4_en_uc_steer_release(priv, priv->dev->dev_addr, *qpn, reg_id); | |
555 | ||
556 | steer_err: | |
557 | mlx4_qp_release_range(dev, *qpn, 1); | |
558 | ||
559 | qp_err: | |
560 | mlx4_unregister_mac(dev, priv->port, mac); | |
561 | return err; | |
562 | } | |
563 | ||
564 | static void mlx4_en_put_qp(struct mlx4_en_priv *priv) | |
565 | { | |
566 | struct mlx4_en_dev *mdev = priv->mdev; | |
567 | struct mlx4_dev *dev = mdev->dev; | |
16a10ffd YB |
568 | int qpn = priv->base_qpn; |
569 | u64 mac = mlx4_en_mac_to_u64(priv->dev->dev_addr); | |
570 | ||
571 | en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n", | |
572 | priv->dev->dev_addr); | |
573 | mlx4_unregister_mac(dev, priv->port, mac); | |
574 | ||
575 | if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) { | |
c07cb4b0 YB |
576 | struct mlx4_mac_entry *entry; |
577 | struct hlist_node *n, *tmp; | |
578 | struct hlist_head *bucket; | |
579 | unsigned int mac_hash; | |
580 | ||
581 | mac_hash = priv->dev->dev_addr[MLX4_EN_MAC_HASH_IDX]; | |
582 | bucket = &priv->mac_hash[mac_hash]; | |
583 | hlist_for_each_entry_safe(entry, n, tmp, bucket, hlist) { | |
584 | if (ether_addr_equal_64bits(entry->mac, | |
585 | priv->dev->dev_addr)) { | |
586 | en_dbg(DRV, priv, "Releasing qp: port %d, MAC %pM, qpn %d\n", | |
587 | priv->port, priv->dev->dev_addr, qpn); | |
588 | mlx4_en_uc_steer_release(priv, entry->mac, | |
589 | qpn, entry->reg_id); | |
590 | mlx4_qp_release_range(dev, qpn, 1); | |
591 | ||
592 | hlist_del_rcu(&entry->hlist); | |
593 | kfree_rcu(entry, rcu); | |
594 | break; | |
595 | } | |
16a10ffd YB |
596 | } |
597 | } | |
598 | } | |
599 | ||
600 | static int mlx4_en_replace_mac(struct mlx4_en_priv *priv, int qpn, | |
90bbb74a | 601 | unsigned char *new_mac, unsigned char *prev_mac) |
16a10ffd YB |
602 | { |
603 | struct mlx4_en_dev *mdev = priv->mdev; | |
604 | struct mlx4_dev *dev = mdev->dev; | |
16a10ffd YB |
605 | int err = 0; |
606 | u64 new_mac_u64 = mlx4_en_mac_to_u64(new_mac); | |
607 | ||
608 | if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) { | |
c07cb4b0 YB |
609 | struct hlist_head *bucket; |
610 | unsigned int mac_hash; | |
611 | struct mlx4_mac_entry *entry; | |
612 | struct hlist_node *n, *tmp; | |
613 | u64 prev_mac_u64 = mlx4_en_mac_to_u64(prev_mac); | |
614 | ||
615 | bucket = &priv->mac_hash[prev_mac[MLX4_EN_MAC_HASH_IDX]]; | |
616 | hlist_for_each_entry_safe(entry, n, tmp, bucket, hlist) { | |
617 | if (ether_addr_equal_64bits(entry->mac, prev_mac)) { | |
618 | mlx4_en_uc_steer_release(priv, entry->mac, | |
619 | qpn, entry->reg_id); | |
620 | mlx4_unregister_mac(dev, priv->port, | |
621 | prev_mac_u64); | |
622 | hlist_del_rcu(&entry->hlist); | |
623 | synchronize_rcu(); | |
624 | memcpy(entry->mac, new_mac, ETH_ALEN); | |
625 | entry->reg_id = 0; | |
626 | mac_hash = new_mac[MLX4_EN_MAC_HASH_IDX]; | |
627 | hlist_add_head_rcu(&entry->hlist, | |
628 | &priv->mac_hash[mac_hash]); | |
629 | mlx4_register_mac(dev, priv->port, new_mac_u64); | |
630 | err = mlx4_en_uc_steer_add(priv, new_mac, | |
631 | &qpn, | |
632 | &entry->reg_id); | |
633 | return err; | |
634 | } | |
635 | } | |
636 | return -EINVAL; | |
16a10ffd YB |
637 | } |
638 | ||
639 | return __mlx4_replace_mac(dev, priv->port, qpn, new_mac_u64); | |
640 | } | |
641 | ||
e7c1c2c4 | 642 | u64 mlx4_en_mac_to_u64(u8 *addr) |
c27a02cd YP |
643 | { |
644 | u64 mac = 0; | |
645 | int i; | |
646 | ||
647 | for (i = 0; i < ETH_ALEN; i++) { | |
648 | mac <<= 8; | |
649 | mac |= addr[i]; | |
650 | } | |
651 | return mac; | |
652 | } | |
653 | ||
654 | static int mlx4_en_set_mac(struct net_device *dev, void *addr) | |
655 | { | |
656 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
657 | struct mlx4_en_dev *mdev = priv->mdev; | |
658 | struct sockaddr *saddr = addr; | |
659 | ||
660 | if (!is_valid_ether_addr(saddr->sa_data)) | |
661 | return -EADDRNOTAVAIL; | |
662 | ||
663 | memcpy(dev->dev_addr, saddr->sa_data, ETH_ALEN); | |
c27a02cd YP |
664 | queue_work(mdev->workqueue, &priv->mac_task); |
665 | return 0; | |
666 | } | |
667 | ||
668 | static void mlx4_en_do_set_mac(struct work_struct *work) | |
669 | { | |
670 | struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, | |
671 | mac_task); | |
672 | struct mlx4_en_dev *mdev = priv->mdev; | |
673 | int err = 0; | |
674 | ||
675 | mutex_lock(&mdev->state_lock); | |
676 | if (priv->port_up) { | |
677 | /* Remove old MAC and insert the new one */ | |
16a10ffd | 678 | err = mlx4_en_replace_mac(priv, priv->base_qpn, |
90bbb74a | 679 | priv->dev->dev_addr, priv->prev_mac); |
c27a02cd | 680 | if (err) |
453a6082 | 681 | en_err(priv, "Failed changing HW MAC address\n"); |
6bbb6d99 YB |
682 | memcpy(priv->prev_mac, priv->dev->dev_addr, |
683 | sizeof(priv->prev_mac)); | |
c27a02cd | 684 | } else |
48e551ff | 685 | en_dbg(HW, priv, "Port is down while registering mac, exiting...\n"); |
c27a02cd YP |
686 | |
687 | mutex_unlock(&mdev->state_lock); | |
688 | } | |
689 | ||
690 | static void mlx4_en_clear_list(struct net_device *dev) | |
691 | { | |
692 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
6d199937 | 693 | struct mlx4_en_mc_list *tmp, *mc_to_del; |
c27a02cd | 694 | |
6d199937 YP |
695 | list_for_each_entry_safe(mc_to_del, tmp, &priv->mc_list, list) { |
696 | list_del(&mc_to_del->list); | |
697 | kfree(mc_to_del); | |
698 | } | |
c27a02cd YP |
699 | } |
700 | ||
701 | static void mlx4_en_cache_mclist(struct net_device *dev) | |
702 | { | |
703 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
22bedad3 | 704 | struct netdev_hw_addr *ha; |
6d199937 | 705 | struct mlx4_en_mc_list *tmp; |
ff6e2163 | 706 | |
0e03567a | 707 | mlx4_en_clear_list(dev); |
6d199937 YP |
708 | netdev_for_each_mc_addr(ha, dev) { |
709 | tmp = kzalloc(sizeof(struct mlx4_en_mc_list), GFP_ATOMIC); | |
710 | if (!tmp) { | |
711 | en_err(priv, "failed to allocate multicast list\n"); | |
712 | mlx4_en_clear_list(dev); | |
713 | return; | |
714 | } | |
715 | memcpy(tmp->addr, ha->addr, ETH_ALEN); | |
716 | list_add_tail(&tmp->list, &priv->mc_list); | |
717 | } | |
c27a02cd YP |
718 | } |
719 | ||
6d199937 YP |
720 | static void update_mclist_flags(struct mlx4_en_priv *priv, |
721 | struct list_head *dst, | |
722 | struct list_head *src) | |
723 | { | |
724 | struct mlx4_en_mc_list *dst_tmp, *src_tmp, *new_mc; | |
725 | bool found; | |
726 | ||
727 | /* Find all the entries that should be removed from dst, | |
728 | * These are the entries that are not found in src | |
729 | */ | |
730 | list_for_each_entry(dst_tmp, dst, list) { | |
731 | found = false; | |
732 | list_for_each_entry(src_tmp, src, list) { | |
733 | if (!memcmp(dst_tmp->addr, src_tmp->addr, ETH_ALEN)) { | |
734 | found = true; | |
735 | break; | |
736 | } | |
737 | } | |
738 | if (!found) | |
739 | dst_tmp->action = MCLIST_REM; | |
740 | } | |
741 | ||
742 | /* Add entries that exist in src but not in dst | |
743 | * mark them as need to add | |
744 | */ | |
745 | list_for_each_entry(src_tmp, src, list) { | |
746 | found = false; | |
747 | list_for_each_entry(dst_tmp, dst, list) { | |
748 | if (!memcmp(dst_tmp->addr, src_tmp->addr, ETH_ALEN)) { | |
749 | dst_tmp->action = MCLIST_NONE; | |
750 | found = true; | |
751 | break; | |
752 | } | |
753 | } | |
754 | if (!found) { | |
755 | new_mc = kmalloc(sizeof(struct mlx4_en_mc_list), | |
756 | GFP_KERNEL); | |
757 | if (!new_mc) { | |
758 | en_err(priv, "Failed to allocate current multicast list\n"); | |
759 | return; | |
760 | } | |
761 | memcpy(new_mc, src_tmp, | |
762 | sizeof(struct mlx4_en_mc_list)); | |
763 | new_mc->action = MCLIST_ADD; | |
764 | list_add_tail(&new_mc->list, dst); | |
765 | } | |
766 | } | |
767 | } | |
c27a02cd | 768 | |
0eb74fdd | 769 | static void mlx4_en_set_rx_mode(struct net_device *dev) |
c27a02cd YP |
770 | { |
771 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
772 | ||
773 | if (!priv->port_up) | |
774 | return; | |
775 | ||
0eb74fdd | 776 | queue_work(priv->mdev->workqueue, &priv->rx_mode_task); |
c27a02cd YP |
777 | } |
778 | ||
0eb74fdd YB |
779 | static void mlx4_en_set_promisc_mode(struct mlx4_en_priv *priv, |
780 | struct mlx4_en_dev *mdev) | |
c27a02cd | 781 | { |
c96d97f4 | 782 | int err = 0; |
c27a02cd | 783 | |
0eb74fdd | 784 | if (!(priv->flags & MLX4_EN_FLAG_PROMISC)) { |
c27a02cd | 785 | if (netif_msg_rx_status(priv)) |
0eb74fdd YB |
786 | en_warn(priv, "Entering promiscuous mode\n"); |
787 | priv->flags |= MLX4_EN_FLAG_PROMISC; | |
c27a02cd | 788 | |
0eb74fdd | 789 | /* Enable promiscouos mode */ |
c96d97f4 | 790 | switch (mdev->dev->caps.steering_mode) { |
592e49dd | 791 | case MLX4_STEERING_MODE_DEVICE_MANAGED: |
0eb74fdd YB |
792 | err = mlx4_flow_steer_promisc_add(mdev->dev, |
793 | priv->port, | |
794 | priv->base_qpn, | |
795 | MLX4_FS_PROMISC_UPLINK); | |
592e49dd | 796 | if (err) |
0eb74fdd YB |
797 | en_err(priv, "Failed enabling promiscuous mode\n"); |
798 | priv->flags |= MLX4_EN_FLAG_MC_PROMISC; | |
592e49dd HHZ |
799 | break; |
800 | ||
c96d97f4 | 801 | case MLX4_STEERING_MODE_B0: |
0eb74fdd YB |
802 | err = mlx4_unicast_promisc_add(mdev->dev, |
803 | priv->base_qpn, | |
804 | priv->port); | |
c96d97f4 | 805 | if (err) |
0eb74fdd YB |
806 | en_err(priv, "Failed enabling unicast promiscuous mode\n"); |
807 | ||
808 | /* Add the default qp number as multicast | |
809 | * promisc | |
810 | */ | |
811 | if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) { | |
812 | err = mlx4_multicast_promisc_add(mdev->dev, | |
813 | priv->base_qpn, | |
814 | priv->port); | |
c96d97f4 | 815 | if (err) |
0eb74fdd YB |
816 | en_err(priv, "Failed enabling multicast promiscuous mode\n"); |
817 | priv->flags |= MLX4_EN_FLAG_MC_PROMISC; | |
c96d97f4 HHZ |
818 | } |
819 | break; | |
c27a02cd | 820 | |
c96d97f4 HHZ |
821 | case MLX4_STEERING_MODE_A0: |
822 | err = mlx4_SET_PORT_qpn_calc(mdev->dev, | |
823 | priv->port, | |
0eb74fdd YB |
824 | priv->base_qpn, |
825 | 1); | |
1679200f | 826 | if (err) |
0eb74fdd | 827 | en_err(priv, "Failed enabling promiscuous mode\n"); |
c96d97f4 | 828 | break; |
1679200f YP |
829 | } |
830 | ||
0eb74fdd YB |
831 | /* Disable port multicast filter (unconditionally) */ |
832 | err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, | |
833 | 0, MLX4_MCAST_DISABLE); | |
834 | if (err) | |
835 | en_err(priv, "Failed disabling multicast filter\n"); | |
836 | ||
837 | /* Disable port VLAN filter */ | |
f1b553fb | 838 | err = mlx4_SET_VLAN_FLTR(mdev->dev, priv); |
c27a02cd | 839 | if (err) |
0eb74fdd YB |
840 | en_err(priv, "Failed disabling VLAN filter\n"); |
841 | } | |
842 | } | |
843 | ||
844 | static void mlx4_en_clear_promisc_mode(struct mlx4_en_priv *priv, | |
845 | struct mlx4_en_dev *mdev) | |
846 | { | |
847 | int err = 0; | |
848 | ||
849 | if (netif_msg_rx_status(priv)) | |
850 | en_warn(priv, "Leaving promiscuous mode\n"); | |
851 | priv->flags &= ~MLX4_EN_FLAG_PROMISC; | |
852 | ||
853 | /* Disable promiscouos mode */ | |
854 | switch (mdev->dev->caps.steering_mode) { | |
855 | case MLX4_STEERING_MODE_DEVICE_MANAGED: | |
856 | err = mlx4_flow_steer_promisc_remove(mdev->dev, | |
857 | priv->port, | |
858 | MLX4_FS_PROMISC_UPLINK); | |
859 | if (err) | |
860 | en_err(priv, "Failed disabling promiscuous mode\n"); | |
861 | priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC; | |
862 | break; | |
863 | ||
864 | case MLX4_STEERING_MODE_B0: | |
865 | err = mlx4_unicast_promisc_remove(mdev->dev, | |
866 | priv->base_qpn, | |
867 | priv->port); | |
868 | if (err) | |
869 | en_err(priv, "Failed disabling unicast promiscuous mode\n"); | |
870 | /* Disable Multicast promisc */ | |
871 | if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) { | |
872 | err = mlx4_multicast_promisc_remove(mdev->dev, | |
873 | priv->base_qpn, | |
874 | priv->port); | |
875 | if (err) | |
876 | en_err(priv, "Failed disabling multicast promiscuous mode\n"); | |
877 | priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC; | |
878 | } | |
879 | break; | |
880 | ||
881 | case MLX4_STEERING_MODE_A0: | |
882 | err = mlx4_SET_PORT_qpn_calc(mdev->dev, | |
883 | priv->port, | |
884 | priv->base_qpn, 0); | |
885 | if (err) | |
886 | en_err(priv, "Failed disabling promiscuous mode\n"); | |
887 | break; | |
c27a02cd YP |
888 | } |
889 | ||
0eb74fdd YB |
890 | /* Enable port VLAN filter */ |
891 | err = mlx4_SET_VLAN_FLTR(mdev->dev, priv); | |
892 | if (err) | |
893 | en_err(priv, "Failed enabling VLAN filter\n"); | |
894 | } | |
895 | ||
896 | static void mlx4_en_do_multicast(struct mlx4_en_priv *priv, | |
897 | struct net_device *dev, | |
898 | struct mlx4_en_dev *mdev) | |
899 | { | |
900 | struct mlx4_en_mc_list *mclist, *tmp; | |
901 | u64 mcast_addr = 0; | |
902 | u8 mc_list[16] = {0}; | |
903 | int err = 0; | |
904 | ||
c27a02cd YP |
905 | /* Enable/disable the multicast filter according to IFF_ALLMULTI */ |
906 | if (dev->flags & IFF_ALLMULTI) { | |
907 | err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, | |
908 | 0, MLX4_MCAST_DISABLE); | |
909 | if (err) | |
453a6082 | 910 | en_err(priv, "Failed disabling multicast filter\n"); |
1679200f YP |
911 | |
912 | /* Add the default qp number as multicast promisc */ | |
913 | if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) { | |
c96d97f4 | 914 | switch (mdev->dev->caps.steering_mode) { |
592e49dd HHZ |
915 | case MLX4_STEERING_MODE_DEVICE_MANAGED: |
916 | err = mlx4_flow_steer_promisc_add(mdev->dev, | |
917 | priv->port, | |
918 | priv->base_qpn, | |
919 | MLX4_FS_PROMISC_ALL_MULTI); | |
920 | break; | |
921 | ||
c96d97f4 HHZ |
922 | case MLX4_STEERING_MODE_B0: |
923 | err = mlx4_multicast_promisc_add(mdev->dev, | |
924 | priv->base_qpn, | |
925 | priv->port); | |
926 | break; | |
927 | ||
928 | case MLX4_STEERING_MODE_A0: | |
929 | break; | |
930 | } | |
1679200f YP |
931 | if (err) |
932 | en_err(priv, "Failed entering multicast promisc mode\n"); | |
933 | priv->flags |= MLX4_EN_FLAG_MC_PROMISC; | |
934 | } | |
c27a02cd | 935 | } else { |
1679200f YP |
936 | /* Disable Multicast promisc */ |
937 | if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) { | |
c96d97f4 | 938 | switch (mdev->dev->caps.steering_mode) { |
592e49dd HHZ |
939 | case MLX4_STEERING_MODE_DEVICE_MANAGED: |
940 | err = mlx4_flow_steer_promisc_remove(mdev->dev, | |
941 | priv->port, | |
942 | MLX4_FS_PROMISC_ALL_MULTI); | |
943 | break; | |
944 | ||
c96d97f4 HHZ |
945 | case MLX4_STEERING_MODE_B0: |
946 | err = mlx4_multicast_promisc_remove(mdev->dev, | |
947 | priv->base_qpn, | |
948 | priv->port); | |
949 | break; | |
950 | ||
951 | case MLX4_STEERING_MODE_A0: | |
952 | break; | |
953 | } | |
1679200f | 954 | if (err) |
25985edc | 955 | en_err(priv, "Failed disabling multicast promiscuous mode\n"); |
1679200f YP |
956 | priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC; |
957 | } | |
ff6e2163 | 958 | |
c27a02cd YP |
959 | err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, |
960 | 0, MLX4_MCAST_DISABLE); | |
961 | if (err) | |
453a6082 | 962 | en_err(priv, "Failed disabling multicast filter\n"); |
c27a02cd YP |
963 | |
964 | /* Flush mcast filter and init it with broadcast address */ | |
965 | mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, ETH_BCAST, | |
966 | 1, MLX4_MCAST_CONFIG); | |
967 | ||
968 | /* Update multicast list - we cache all addresses so they won't | |
969 | * change while HW is updated holding the command semaphor */ | |
dbd501a8 | 970 | netif_addr_lock_bh(dev); |
c27a02cd | 971 | mlx4_en_cache_mclist(dev); |
dbd501a8 | 972 | netif_addr_unlock_bh(dev); |
6d199937 YP |
973 | list_for_each_entry(mclist, &priv->mc_list, list) { |
974 | mcast_addr = mlx4_en_mac_to_u64(mclist->addr); | |
c27a02cd YP |
975 | mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, |
976 | mcast_addr, 0, MLX4_MCAST_CONFIG); | |
977 | } | |
978 | err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, | |
979 | 0, MLX4_MCAST_ENABLE); | |
980 | if (err) | |
453a6082 | 981 | en_err(priv, "Failed enabling multicast filter\n"); |
6d199937 YP |
982 | |
983 | update_mclist_flags(priv, &priv->curr_list, &priv->mc_list); | |
984 | list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) { | |
985 | if (mclist->action == MCLIST_REM) { | |
986 | /* detach this address and delete from list */ | |
987 | memcpy(&mc_list[10], mclist->addr, ETH_ALEN); | |
988 | mc_list[5] = priv->port; | |
989 | err = mlx4_multicast_detach(mdev->dev, | |
990 | &priv->rss_map.indir_qp, | |
991 | mc_list, | |
0ff1fb65 HHZ |
992 | MLX4_PROT_ETH, |
993 | mclist->reg_id); | |
6d199937 YP |
994 | if (err) |
995 | en_err(priv, "Fail to detach multicast address\n"); | |
996 | ||
997 | /* remove from list */ | |
998 | list_del(&mclist->list); | |
999 | kfree(mclist); | |
9c64508a | 1000 | } else if (mclist->action == MCLIST_ADD) { |
6d199937 YP |
1001 | /* attach the address */ |
1002 | memcpy(&mc_list[10], mclist->addr, ETH_ALEN); | |
0ff1fb65 | 1003 | /* needed for B0 steering support */ |
6d199937 YP |
1004 | mc_list[5] = priv->port; |
1005 | err = mlx4_multicast_attach(mdev->dev, | |
1006 | &priv->rss_map.indir_qp, | |
0ff1fb65 HHZ |
1007 | mc_list, |
1008 | priv->port, 0, | |
1009 | MLX4_PROT_ETH, | |
1010 | &mclist->reg_id); | |
6d199937 YP |
1011 | if (err) |
1012 | en_err(priv, "Fail to attach multicast address\n"); | |
1013 | ||
1014 | } | |
1015 | } | |
c27a02cd | 1016 | } |
0eb74fdd YB |
1017 | } |
1018 | ||
1019 | static void mlx4_en_do_set_rx_mode(struct work_struct *work) | |
1020 | { | |
1021 | struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, | |
1022 | rx_mode_task); | |
1023 | struct mlx4_en_dev *mdev = priv->mdev; | |
1024 | struct net_device *dev = priv->dev; | |
1025 | ||
1026 | mutex_lock(&mdev->state_lock); | |
1027 | if (!mdev->device_up) { | |
1028 | en_dbg(HW, priv, "Card is not up, ignoring rx mode change.\n"); | |
1029 | goto out; | |
1030 | } | |
1031 | if (!priv->port_up) { | |
1032 | en_dbg(HW, priv, "Port is down, ignoring rx mode change.\n"); | |
1033 | goto out; | |
1034 | } | |
1035 | ||
1036 | if (!netif_carrier_ok(dev)) { | |
1037 | if (!mlx4_en_QUERY_PORT(mdev, priv->port)) { | |
1038 | if (priv->port_state.link_state) { | |
1039 | priv->last_link_state = MLX4_DEV_EVENT_PORT_UP; | |
1040 | netif_carrier_on(dev); | |
1041 | en_dbg(LINK, priv, "Link Up\n"); | |
1042 | } | |
1043 | } | |
1044 | } | |
1045 | ||
1046 | /* Promsicuous mode: disable all filters */ | |
1047 | if (dev->flags & IFF_PROMISC) { | |
1048 | mlx4_en_set_promisc_mode(priv, mdev); | |
1049 | goto out; | |
1050 | } | |
1051 | ||
1052 | /* Not in promiscuous mode */ | |
1053 | if (priv->flags & MLX4_EN_FLAG_PROMISC) | |
1054 | mlx4_en_clear_promisc_mode(priv, mdev); | |
1055 | ||
1056 | mlx4_en_do_multicast(priv, dev, mdev); | |
c27a02cd YP |
1057 | out: |
1058 | mutex_unlock(&mdev->state_lock); | |
1059 | } | |
1060 | ||
1061 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
1062 | static void mlx4_en_netpoll(struct net_device *dev) | |
1063 | { | |
1064 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
1065 | struct mlx4_en_cq *cq; | |
1066 | unsigned long flags; | |
1067 | int i; | |
1068 | ||
1069 | for (i = 0; i < priv->rx_ring_num; i++) { | |
1070 | cq = &priv->rx_cq[i]; | |
1071 | spin_lock_irqsave(&cq->lock, flags); | |
1072 | napi_synchronize(&cq->napi); | |
1073 | mlx4_en_process_rx_cq(dev, cq, 0); | |
1074 | spin_unlock_irqrestore(&cq->lock, flags); | |
1075 | } | |
1076 | } | |
1077 | #endif | |
1078 | ||
1079 | static void mlx4_en_tx_timeout(struct net_device *dev) | |
1080 | { | |
1081 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
1082 | struct mlx4_en_dev *mdev = priv->mdev; | |
1083 | ||
1084 | if (netif_msg_timer(priv)) | |
453a6082 | 1085 | en_warn(priv, "Tx timeout called on port:%d\n", priv->port); |
c27a02cd | 1086 | |
1e338db5 | 1087 | priv->port_stats.tx_timeout++; |
453a6082 | 1088 | en_dbg(DRV, priv, "Scheduling watchdog\n"); |
1e338db5 | 1089 | queue_work(mdev->workqueue, &priv->watchdog_task); |
c27a02cd YP |
1090 | } |
1091 | ||
1092 | ||
1093 | static struct net_device_stats *mlx4_en_get_stats(struct net_device *dev) | |
1094 | { | |
1095 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
1096 | ||
1097 | spin_lock_bh(&priv->stats_lock); | |
1098 | memcpy(&priv->ret_stats, &priv->stats, sizeof(priv->stats)); | |
1099 | spin_unlock_bh(&priv->stats_lock); | |
1100 | ||
1101 | return &priv->ret_stats; | |
1102 | } | |
1103 | ||
1104 | static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv) | |
1105 | { | |
c27a02cd YP |
1106 | struct mlx4_en_cq *cq; |
1107 | int i; | |
1108 | ||
1109 | /* If we haven't received a specific coalescing setting | |
98a1708d | 1110 | * (module param), we set the moderation parameters as follows: |
c27a02cd | 1111 | * - moder_cnt is set to the number of mtu sized packets to |
ecfd2ce1 | 1112 | * satisfy our coalescing target. |
c27a02cd YP |
1113 | * - moder_time is set to a fixed value. |
1114 | */ | |
3db36fb2 | 1115 | priv->rx_frames = MLX4_EN_RX_COAL_TARGET; |
60b9f9e5 | 1116 | priv->rx_usecs = MLX4_EN_RX_COAL_TIME; |
a19a848a YP |
1117 | priv->tx_frames = MLX4_EN_TX_COAL_PKTS; |
1118 | priv->tx_usecs = MLX4_EN_TX_COAL_TIME; | |
48e551ff YB |
1119 | en_dbg(INTR, priv, "Default coalesing params for mtu:%d - rx_frames:%d rx_usecs:%d\n", |
1120 | priv->dev->mtu, priv->rx_frames, priv->rx_usecs); | |
c27a02cd YP |
1121 | |
1122 | /* Setup cq moderation params */ | |
1123 | for (i = 0; i < priv->rx_ring_num; i++) { | |
1124 | cq = &priv->rx_cq[i]; | |
1125 | cq->moder_cnt = priv->rx_frames; | |
1126 | cq->moder_time = priv->rx_usecs; | |
6b4d8d9f AG |
1127 | priv->last_moder_time[i] = MLX4_EN_AUTO_CONF; |
1128 | priv->last_moder_packets[i] = 0; | |
1129 | priv->last_moder_bytes[i] = 0; | |
c27a02cd YP |
1130 | } |
1131 | ||
1132 | for (i = 0; i < priv->tx_ring_num; i++) { | |
1133 | cq = &priv->tx_cq[i]; | |
a19a848a YP |
1134 | cq->moder_cnt = priv->tx_frames; |
1135 | cq->moder_time = priv->tx_usecs; | |
c27a02cd YP |
1136 | } |
1137 | ||
1138 | /* Reset auto-moderation params */ | |
1139 | priv->pkt_rate_low = MLX4_EN_RX_RATE_LOW; | |
1140 | priv->rx_usecs_low = MLX4_EN_RX_COAL_TIME_LOW; | |
1141 | priv->pkt_rate_high = MLX4_EN_RX_RATE_HIGH; | |
1142 | priv->rx_usecs_high = MLX4_EN_RX_COAL_TIME_HIGH; | |
1143 | priv->sample_interval = MLX4_EN_SAMPLE_INTERVAL; | |
60b9f9e5 | 1144 | priv->adaptive_rx_coal = 1; |
c27a02cd | 1145 | priv->last_moder_jiffies = 0; |
c27a02cd | 1146 | priv->last_moder_tx_packets = 0; |
c27a02cd YP |
1147 | } |
1148 | ||
1149 | static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv) | |
1150 | { | |
1151 | unsigned long period = (unsigned long) (jiffies - priv->last_moder_jiffies); | |
c27a02cd YP |
1152 | struct mlx4_en_cq *cq; |
1153 | unsigned long packets; | |
1154 | unsigned long rate; | |
1155 | unsigned long avg_pkt_size; | |
1156 | unsigned long rx_packets; | |
1157 | unsigned long rx_bytes; | |
c27a02cd YP |
1158 | unsigned long rx_pkt_diff; |
1159 | int moder_time; | |
6b4d8d9f | 1160 | int ring, err; |
c27a02cd YP |
1161 | |
1162 | if (!priv->adaptive_rx_coal || period < priv->sample_interval * HZ) | |
1163 | return; | |
1164 | ||
6b4d8d9f AG |
1165 | for (ring = 0; ring < priv->rx_ring_num; ring++) { |
1166 | spin_lock_bh(&priv->stats_lock); | |
1167 | rx_packets = priv->rx_ring[ring].packets; | |
1168 | rx_bytes = priv->rx_ring[ring].bytes; | |
1169 | spin_unlock_bh(&priv->stats_lock); | |
1170 | ||
1171 | rx_pkt_diff = ((unsigned long) (rx_packets - | |
1172 | priv->last_moder_packets[ring])); | |
1173 | packets = rx_pkt_diff; | |
1174 | rate = packets * HZ / period; | |
1175 | avg_pkt_size = packets ? ((unsigned long) (rx_bytes - | |
1176 | priv->last_moder_bytes[ring])) / packets : 0; | |
1177 | ||
1178 | /* Apply auto-moderation only when packet rate | |
1179 | * exceeds a rate that it matters */ | |
1180 | if (rate > (MLX4_EN_RX_RATE_THRESH / priv->rx_ring_num) && | |
1181 | avg_pkt_size > MLX4_EN_AVG_PKT_SMALL) { | |
c27a02cd YP |
1182 | if (rate < priv->pkt_rate_low) |
1183 | moder_time = priv->rx_usecs_low; | |
1184 | else if (rate > priv->pkt_rate_high) | |
1185 | moder_time = priv->rx_usecs_high; | |
1186 | else | |
1187 | moder_time = (rate - priv->pkt_rate_low) * | |
1188 | (priv->rx_usecs_high - priv->rx_usecs_low) / | |
1189 | (priv->pkt_rate_high - priv->pkt_rate_low) + | |
1190 | priv->rx_usecs_low; | |
6b4d8d9f AG |
1191 | } else { |
1192 | moder_time = priv->rx_usecs_low; | |
c27a02cd | 1193 | } |
c27a02cd | 1194 | |
6b4d8d9f AG |
1195 | if (moder_time != priv->last_moder_time[ring]) { |
1196 | priv->last_moder_time[ring] = moder_time; | |
1197 | cq = &priv->rx_cq[ring]; | |
c27a02cd YP |
1198 | cq->moder_time = moder_time; |
1199 | err = mlx4_en_set_cq_moder(priv, cq); | |
6b4d8d9f | 1200 | if (err) |
48e551ff YB |
1201 | en_err(priv, "Failed modifying moderation for cq:%d\n", |
1202 | ring); | |
c27a02cd | 1203 | } |
6b4d8d9f AG |
1204 | priv->last_moder_packets[ring] = rx_packets; |
1205 | priv->last_moder_bytes[ring] = rx_bytes; | |
c27a02cd YP |
1206 | } |
1207 | ||
c27a02cd YP |
1208 | priv->last_moder_jiffies = jiffies; |
1209 | } | |
1210 | ||
1211 | static void mlx4_en_do_get_stats(struct work_struct *work) | |
1212 | { | |
bf6aede7 | 1213 | struct delayed_work *delay = to_delayed_work(work); |
c27a02cd YP |
1214 | struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv, |
1215 | stats_task); | |
1216 | struct mlx4_en_dev *mdev = priv->mdev; | |
1217 | int err; | |
1218 | ||
c27a02cd YP |
1219 | mutex_lock(&mdev->state_lock); |
1220 | if (mdev->device_up) { | |
2d51837f EE |
1221 | err = mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 0); |
1222 | if (err) | |
1223 | en_dbg(HW, priv, "Could not update stats\n"); | |
1224 | ||
c27a02cd YP |
1225 | if (priv->port_up) |
1226 | mlx4_en_auto_moderation(priv); | |
1227 | ||
1228 | queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY); | |
1229 | } | |
d7e1a487 YP |
1230 | if (mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port]) { |
1231 | queue_work(mdev->workqueue, &priv->mac_task); | |
1232 | mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port] = 0; | |
1233 | } | |
c27a02cd YP |
1234 | mutex_unlock(&mdev->state_lock); |
1235 | } | |
1236 | ||
1237 | static void mlx4_en_linkstate(struct work_struct *work) | |
1238 | { | |
1239 | struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, | |
1240 | linkstate_task); | |
1241 | struct mlx4_en_dev *mdev = priv->mdev; | |
1242 | int linkstate = priv->link_state; | |
1243 | ||
1244 | mutex_lock(&mdev->state_lock); | |
1245 | /* If observable port state changed set carrier state and | |
1246 | * report to system log */ | |
1247 | if (priv->last_link_state != linkstate) { | |
1248 | if (linkstate == MLX4_DEV_EVENT_PORT_DOWN) { | |
e5cc44b2 | 1249 | en_info(priv, "Link Down\n"); |
c27a02cd YP |
1250 | netif_carrier_off(priv->dev); |
1251 | } else { | |
e5cc44b2 | 1252 | en_info(priv, "Link Up\n"); |
c27a02cd YP |
1253 | netif_carrier_on(priv->dev); |
1254 | } | |
1255 | } | |
1256 | priv->last_link_state = linkstate; | |
1257 | mutex_unlock(&mdev->state_lock); | |
1258 | } | |
1259 | ||
1260 | ||
18cc42a3 | 1261 | int mlx4_en_start_port(struct net_device *dev) |
c27a02cd YP |
1262 | { |
1263 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
1264 | struct mlx4_en_dev *mdev = priv->mdev; | |
1265 | struct mlx4_en_cq *cq; | |
1266 | struct mlx4_en_tx_ring *tx_ring; | |
c27a02cd YP |
1267 | int rx_index = 0; |
1268 | int tx_index = 0; | |
c27a02cd YP |
1269 | int err = 0; |
1270 | int i; | |
1271 | int j; | |
1679200f | 1272 | u8 mc_list[16] = {0}; |
c27a02cd YP |
1273 | |
1274 | if (priv->port_up) { | |
453a6082 | 1275 | en_dbg(DRV, priv, "start port called while port already up\n"); |
c27a02cd YP |
1276 | return 0; |
1277 | } | |
1278 | ||
6d199937 YP |
1279 | INIT_LIST_HEAD(&priv->mc_list); |
1280 | INIT_LIST_HEAD(&priv->curr_list); | |
0d256c0e HHZ |
1281 | INIT_LIST_HEAD(&priv->ethtool_list); |
1282 | memset(&priv->ethtool_rules[0], 0, | |
1283 | sizeof(struct ethtool_flow_id) * MAX_NUM_OF_FS_RULES); | |
6d199937 | 1284 | |
c27a02cd YP |
1285 | /* Calculate Rx buf size */ |
1286 | dev->mtu = min(dev->mtu, priv->max_mtu); | |
1287 | mlx4_en_calc_rx_buf(dev); | |
453a6082 | 1288 | en_dbg(DRV, priv, "Rx buf size:%d\n", priv->rx_skb_size); |
38aab07c | 1289 | |
c27a02cd | 1290 | /* Configure rx cq's and rings */ |
38aab07c YP |
1291 | err = mlx4_en_activate_rx_rings(priv); |
1292 | if (err) { | |
453a6082 | 1293 | en_err(priv, "Failed to activate RX rings\n"); |
38aab07c YP |
1294 | return err; |
1295 | } | |
c27a02cd YP |
1296 | for (i = 0; i < priv->rx_ring_num; i++) { |
1297 | cq = &priv->rx_cq[i]; | |
c27a02cd | 1298 | |
76532d0c | 1299 | err = mlx4_en_activate_cq(priv, cq, i); |
c27a02cd | 1300 | if (err) { |
453a6082 | 1301 | en_err(priv, "Failed activating Rx CQ\n"); |
a4233304 | 1302 | goto cq_err; |
c27a02cd YP |
1303 | } |
1304 | for (j = 0; j < cq->size; j++) | |
1305 | cq->buf[j].owner_sr_opcode = MLX4_CQE_OWNER_MASK; | |
1306 | err = mlx4_en_set_cq_moder(priv, cq); | |
1307 | if (err) { | |
453a6082 | 1308 | en_err(priv, "Failed setting cq moderation parameters"); |
c27a02cd YP |
1309 | mlx4_en_deactivate_cq(priv, cq); |
1310 | goto cq_err; | |
1311 | } | |
1312 | mlx4_en_arm_cq(priv, cq); | |
38aab07c | 1313 | priv->rx_ring[i].cqn = cq->mcq.cqn; |
c27a02cd YP |
1314 | ++rx_index; |
1315 | } | |
1316 | ||
ffe455ad EE |
1317 | /* Set qp number */ |
1318 | en_dbg(DRV, priv, "Getting qp number for port %d\n", priv->port); | |
16a10ffd | 1319 | err = mlx4_en_get_qp(priv); |
1679200f | 1320 | if (err) { |
ffe455ad | 1321 | en_err(priv, "Failed getting eth qp\n"); |
1679200f YP |
1322 | goto cq_err; |
1323 | } | |
1324 | mdev->mac_removed[priv->port] = 0; | |
1325 | ||
c27a02cd YP |
1326 | err = mlx4_en_config_rss_steer(priv); |
1327 | if (err) { | |
453a6082 | 1328 | en_err(priv, "Failed configuring rss steering\n"); |
1679200f | 1329 | goto mac_err; |
c27a02cd YP |
1330 | } |
1331 | ||
cabdc8ee HHZ |
1332 | err = mlx4_en_create_drop_qp(priv); |
1333 | if (err) | |
1334 | goto rss_err; | |
1335 | ||
c27a02cd YP |
1336 | /* Configure tx cq's and rings */ |
1337 | for (i = 0; i < priv->tx_ring_num; i++) { | |
1338 | /* Configure cq */ | |
1339 | cq = &priv->tx_cq[i]; | |
76532d0c | 1340 | err = mlx4_en_activate_cq(priv, cq, i); |
c27a02cd | 1341 | if (err) { |
453a6082 | 1342 | en_err(priv, "Failed allocating Tx CQ\n"); |
c27a02cd YP |
1343 | goto tx_err; |
1344 | } | |
1345 | err = mlx4_en_set_cq_moder(priv, cq); | |
1346 | if (err) { | |
453a6082 | 1347 | en_err(priv, "Failed setting cq moderation parameters"); |
c27a02cd YP |
1348 | mlx4_en_deactivate_cq(priv, cq); |
1349 | goto tx_err; | |
1350 | } | |
453a6082 | 1351 | en_dbg(DRV, priv, "Resetting index of collapsed CQ:%d to -1\n", i); |
c27a02cd YP |
1352 | cq->buf->wqe_index = cpu_to_be16(0xffff); |
1353 | ||
1354 | /* Configure ring */ | |
1355 | tx_ring = &priv->tx_ring[i]; | |
0e98b523 | 1356 | err = mlx4_en_activate_tx_ring(priv, tx_ring, cq->mcq.cqn, |
d317966b | 1357 | i / priv->num_tx_rings_p_up); |
c27a02cd | 1358 | if (err) { |
453a6082 | 1359 | en_err(priv, "Failed allocating Tx ring\n"); |
c27a02cd YP |
1360 | mlx4_en_deactivate_cq(priv, cq); |
1361 | goto tx_err; | |
1362 | } | |
5b263f53 | 1363 | tx_ring->tx_queue = netdev_get_tx_queue(dev, i); |
e22979d9 YP |
1364 | |
1365 | /* Arm CQ for TX completions */ | |
1366 | mlx4_en_arm_cq(priv, cq); | |
1367 | ||
c27a02cd YP |
1368 | /* Set initial ownership of all Tx TXBBs to SW (1) */ |
1369 | for (j = 0; j < tx_ring->buf_size; j += STAMP_STRIDE) | |
1370 | *((u32 *) (tx_ring->buf + j)) = 0xffffffff; | |
1371 | ++tx_index; | |
1372 | } | |
1373 | ||
1374 | /* Configure port */ | |
1375 | err = mlx4_SET_PORT_general(mdev->dev, priv->port, | |
1376 | priv->rx_skb_size + ETH_FCS_LEN, | |
d53b93f2 YP |
1377 | priv->prof->tx_pause, |
1378 | priv->prof->tx_ppp, | |
1379 | priv->prof->rx_pause, | |
1380 | priv->prof->rx_ppp); | |
c27a02cd | 1381 | if (err) { |
48e551ff YB |
1382 | en_err(priv, "Failed setting port general configurations for port %d, with error %d\n", |
1383 | priv->port, err); | |
c27a02cd YP |
1384 | goto tx_err; |
1385 | } | |
1386 | /* Set default qp number */ | |
1387 | err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, priv->base_qpn, 0); | |
1388 | if (err) { | |
453a6082 | 1389 | en_err(priv, "Failed setting default qp numbers\n"); |
c27a02cd YP |
1390 | goto tx_err; |
1391 | } | |
c27a02cd YP |
1392 | |
1393 | /* Init port */ | |
453a6082 | 1394 | en_dbg(HW, priv, "Initializing port\n"); |
c27a02cd YP |
1395 | err = mlx4_INIT_PORT(mdev->dev, priv->port); |
1396 | if (err) { | |
453a6082 | 1397 | en_err(priv, "Failed Initializing port\n"); |
1679200f | 1398 | goto tx_err; |
c27a02cd YP |
1399 | } |
1400 | ||
1679200f YP |
1401 | /* Attach rx QP to bradcast address */ |
1402 | memset(&mc_list[10], 0xff, ETH_ALEN); | |
0ff1fb65 | 1403 | mc_list[5] = priv->port; /* needed for B0 steering support */ |
1679200f | 1404 | if (mlx4_multicast_attach(mdev->dev, &priv->rss_map.indir_qp, mc_list, |
0ff1fb65 HHZ |
1405 | priv->port, 0, MLX4_PROT_ETH, |
1406 | &priv->broadcast_id)) | |
1679200f YP |
1407 | mlx4_warn(mdev, "Failed Attaching Broadcast\n"); |
1408 | ||
b5845f98 HX |
1409 | /* Must redo promiscuous mode setup. */ |
1410 | priv->flags &= ~(MLX4_EN_FLAG_PROMISC | MLX4_EN_FLAG_MC_PROMISC); | |
1411 | ||
c27a02cd | 1412 | /* Schedule multicast task to populate multicast list */ |
0eb74fdd | 1413 | queue_work(mdev->workqueue, &priv->rx_mode_task); |
c27a02cd | 1414 | |
93ece0c1 EE |
1415 | mlx4_set_stats_bitmap(mdev->dev, &priv->stats_bitmap); |
1416 | ||
c27a02cd | 1417 | priv->port_up = true; |
a11faac7 | 1418 | netif_tx_start_all_queues(dev); |
3484aac1 AV |
1419 | netif_device_attach(dev); |
1420 | ||
c27a02cd YP |
1421 | return 0; |
1422 | ||
c27a02cd YP |
1423 | tx_err: |
1424 | while (tx_index--) { | |
1425 | mlx4_en_deactivate_tx_ring(priv, &priv->tx_ring[tx_index]); | |
1426 | mlx4_en_deactivate_cq(priv, &priv->tx_cq[tx_index]); | |
1427 | } | |
cabdc8ee HHZ |
1428 | mlx4_en_destroy_drop_qp(priv); |
1429 | rss_err: | |
c27a02cd | 1430 | mlx4_en_release_rss_steer(priv); |
1679200f | 1431 | mac_err: |
16a10ffd | 1432 | mlx4_en_put_qp(priv); |
c27a02cd YP |
1433 | cq_err: |
1434 | while (rx_index--) | |
1435 | mlx4_en_deactivate_cq(priv, &priv->rx_cq[rx_index]); | |
38aab07c YP |
1436 | for (i = 0; i < priv->rx_ring_num; i++) |
1437 | mlx4_en_deactivate_rx_ring(priv, &priv->rx_ring[i]); | |
c27a02cd YP |
1438 | |
1439 | return err; /* need to close devices */ | |
1440 | } | |
1441 | ||
1442 | ||
3484aac1 | 1443 | void mlx4_en_stop_port(struct net_device *dev, int detach) |
c27a02cd YP |
1444 | { |
1445 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
1446 | struct mlx4_en_dev *mdev = priv->mdev; | |
6d199937 | 1447 | struct mlx4_en_mc_list *mclist, *tmp; |
0d256c0e | 1448 | struct ethtool_flow_id *flow, *tmp_flow; |
c27a02cd | 1449 | int i; |
1679200f | 1450 | u8 mc_list[16] = {0}; |
c27a02cd YP |
1451 | |
1452 | if (!priv->port_up) { | |
453a6082 | 1453 | en_dbg(DRV, priv, "stop port called while port already down\n"); |
c27a02cd YP |
1454 | return; |
1455 | } | |
c27a02cd YP |
1456 | |
1457 | /* Synchronize with tx routine */ | |
1458 | netif_tx_lock_bh(dev); | |
3484aac1 AV |
1459 | if (detach) |
1460 | netif_device_detach(dev); | |
3c05f5ef | 1461 | netif_tx_stop_all_queues(dev); |
c27a02cd YP |
1462 | netif_tx_unlock_bh(dev); |
1463 | ||
3484aac1 AV |
1464 | netif_tx_disable(dev); |
1465 | ||
7c287380 | 1466 | /* Set port as not active */ |
3c05f5ef | 1467 | priv->port_up = false; |
c27a02cd | 1468 | |
db0e7cba AY |
1469 | /* Promsicuous mode */ |
1470 | if (mdev->dev->caps.steering_mode == | |
1471 | MLX4_STEERING_MODE_DEVICE_MANAGED) { | |
1472 | priv->flags &= ~(MLX4_EN_FLAG_PROMISC | | |
1473 | MLX4_EN_FLAG_MC_PROMISC); | |
1474 | mlx4_flow_steer_promisc_remove(mdev->dev, | |
1475 | priv->port, | |
1476 | MLX4_FS_PROMISC_UPLINK); | |
1477 | mlx4_flow_steer_promisc_remove(mdev->dev, | |
1478 | priv->port, | |
1479 | MLX4_FS_PROMISC_ALL_MULTI); | |
1480 | } else if (priv->flags & MLX4_EN_FLAG_PROMISC) { | |
1481 | priv->flags &= ~MLX4_EN_FLAG_PROMISC; | |
1482 | ||
1483 | /* Disable promiscouos mode */ | |
1484 | mlx4_unicast_promisc_remove(mdev->dev, priv->base_qpn, | |
1485 | priv->port); | |
1486 | ||
1487 | /* Disable Multicast promisc */ | |
1488 | if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) { | |
1489 | mlx4_multicast_promisc_remove(mdev->dev, priv->base_qpn, | |
1490 | priv->port); | |
1491 | priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC; | |
1492 | } | |
1493 | } | |
1494 | ||
1679200f YP |
1495 | /* Detach All multicasts */ |
1496 | memset(&mc_list[10], 0xff, ETH_ALEN); | |
0ff1fb65 | 1497 | mc_list[5] = priv->port; /* needed for B0 steering support */ |
1679200f | 1498 | mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp, mc_list, |
0ff1fb65 | 1499 | MLX4_PROT_ETH, priv->broadcast_id); |
6d199937 YP |
1500 | list_for_each_entry(mclist, &priv->curr_list, list) { |
1501 | memcpy(&mc_list[10], mclist->addr, ETH_ALEN); | |
1679200f YP |
1502 | mc_list[5] = priv->port; |
1503 | mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp, | |
0ff1fb65 | 1504 | mc_list, MLX4_PROT_ETH, mclist->reg_id); |
1679200f YP |
1505 | } |
1506 | mlx4_en_clear_list(dev); | |
6d199937 YP |
1507 | list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) { |
1508 | list_del(&mclist->list); | |
1509 | kfree(mclist); | |
1510 | } | |
1511 | ||
1679200f YP |
1512 | /* Flush multicast filter */ |
1513 | mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1, MLX4_MCAST_CONFIG); | |
1514 | ||
cabdc8ee HHZ |
1515 | mlx4_en_destroy_drop_qp(priv); |
1516 | ||
c27a02cd YP |
1517 | /* Free TX Rings */ |
1518 | for (i = 0; i < priv->tx_ring_num; i++) { | |
1519 | mlx4_en_deactivate_tx_ring(priv, &priv->tx_ring[i]); | |
1520 | mlx4_en_deactivate_cq(priv, &priv->tx_cq[i]); | |
1521 | } | |
1522 | msleep(10); | |
1523 | ||
1524 | for (i = 0; i < priv->tx_ring_num; i++) | |
1525 | mlx4_en_free_tx_buf(dev, &priv->tx_ring[i]); | |
1526 | ||
1527 | /* Free RSS qps */ | |
1528 | mlx4_en_release_rss_steer(priv); | |
1529 | ||
ffe455ad | 1530 | /* Unregister Mac address for the port */ |
16a10ffd | 1531 | mlx4_en_put_qp(priv); |
955154fa MB |
1532 | if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAGS2_REASSIGN_MAC_EN)) |
1533 | mdev->mac_removed[priv->port] = 1; | |
ffe455ad | 1534 | |
0d256c0e HHZ |
1535 | /* Remove flow steering rules for the port*/ |
1536 | if (mdev->dev->caps.steering_mode == | |
1537 | MLX4_STEERING_MODE_DEVICE_MANAGED) { | |
1538 | ASSERT_RTNL(); | |
1539 | list_for_each_entry_safe(flow, tmp_flow, | |
1540 | &priv->ethtool_list, list) { | |
1541 | mlx4_flow_detach(mdev->dev, flow->id); | |
1542 | list_del(&flow->list); | |
1543 | } | |
1544 | } | |
1545 | ||
c27a02cd YP |
1546 | /* Free RX Rings */ |
1547 | for (i = 0; i < priv->rx_ring_num; i++) { | |
1548 | mlx4_en_deactivate_rx_ring(priv, &priv->rx_ring[i]); | |
1549 | while (test_bit(NAPI_STATE_SCHED, &priv->rx_cq[i].napi.state)) | |
1550 | msleep(1); | |
1551 | mlx4_en_deactivate_cq(priv, &priv->rx_cq[i]); | |
1552 | } | |
7c287380 YP |
1553 | |
1554 | /* close port*/ | |
1555 | mlx4_CLOSE_PORT(mdev->dev, priv->port); | |
c27a02cd YP |
1556 | } |
1557 | ||
1558 | static void mlx4_en_restart(struct work_struct *work) | |
1559 | { | |
1560 | struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, | |
1561 | watchdog_task); | |
1562 | struct mlx4_en_dev *mdev = priv->mdev; | |
1563 | struct net_device *dev = priv->dev; | |
5b263f53 | 1564 | int i; |
c27a02cd | 1565 | |
453a6082 | 1566 | en_dbg(DRV, priv, "Watchdog task called for port %d\n", priv->port); |
1e338db5 YP |
1567 | |
1568 | mutex_lock(&mdev->state_lock); | |
1569 | if (priv->port_up) { | |
3484aac1 | 1570 | mlx4_en_stop_port(dev, 1); |
5b263f53 YP |
1571 | for (i = 0; i < priv->tx_ring_num; i++) |
1572 | netdev_tx_reset_queue(priv->tx_ring[i].tx_queue); | |
1e338db5 | 1573 | if (mlx4_en_start_port(dev)) |
453a6082 | 1574 | en_err(priv, "Failed restarting port %d\n", priv->port); |
1e338db5 YP |
1575 | } |
1576 | mutex_unlock(&mdev->state_lock); | |
c27a02cd YP |
1577 | } |
1578 | ||
b477ba62 | 1579 | static void mlx4_en_clear_stats(struct net_device *dev) |
c27a02cd YP |
1580 | { |
1581 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
1582 | struct mlx4_en_dev *mdev = priv->mdev; | |
1583 | int i; | |
c27a02cd | 1584 | |
c27a02cd | 1585 | if (mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 1)) |
453a6082 | 1586 | en_dbg(HW, priv, "Failed dumping statistics\n"); |
c27a02cd YP |
1587 | |
1588 | memset(&priv->stats, 0, sizeof(priv->stats)); | |
1589 | memset(&priv->pstats, 0, sizeof(priv->pstats)); | |
b477ba62 EE |
1590 | memset(&priv->pkstats, 0, sizeof(priv->pkstats)); |
1591 | memset(&priv->port_stats, 0, sizeof(priv->port_stats)); | |
c27a02cd YP |
1592 | |
1593 | for (i = 0; i < priv->tx_ring_num; i++) { | |
1594 | priv->tx_ring[i].bytes = 0; | |
1595 | priv->tx_ring[i].packets = 0; | |
b477ba62 | 1596 | priv->tx_ring[i].tx_csum = 0; |
c27a02cd YP |
1597 | } |
1598 | for (i = 0; i < priv->rx_ring_num; i++) { | |
1599 | priv->rx_ring[i].bytes = 0; | |
1600 | priv->rx_ring[i].packets = 0; | |
b477ba62 EE |
1601 | priv->rx_ring[i].csum_ok = 0; |
1602 | priv->rx_ring[i].csum_none = 0; | |
c27a02cd | 1603 | } |
b477ba62 EE |
1604 | } |
1605 | ||
1606 | static int mlx4_en_open(struct net_device *dev) | |
1607 | { | |
1608 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
1609 | struct mlx4_en_dev *mdev = priv->mdev; | |
1610 | int err = 0; | |
1611 | ||
1612 | mutex_lock(&mdev->state_lock); | |
1613 | ||
1614 | if (!mdev->device_up) { | |
1615 | en_err(priv, "Cannot open - device down/disabled\n"); | |
1616 | err = -EBUSY; | |
1617 | goto out; | |
1618 | } | |
1619 | ||
1620 | /* Reset HW statistics and SW counters */ | |
1621 | mlx4_en_clear_stats(dev); | |
c27a02cd | 1622 | |
c27a02cd YP |
1623 | err = mlx4_en_start_port(dev); |
1624 | if (err) | |
453a6082 | 1625 | en_err(priv, "Failed starting port:%d\n", priv->port); |
c27a02cd YP |
1626 | |
1627 | out: | |
1628 | mutex_unlock(&mdev->state_lock); | |
1629 | return err; | |
1630 | } | |
1631 | ||
1632 | ||
1633 | static int mlx4_en_close(struct net_device *dev) | |
1634 | { | |
1635 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
1636 | struct mlx4_en_dev *mdev = priv->mdev; | |
1637 | ||
453a6082 | 1638 | en_dbg(IFDOWN, priv, "Close port called\n"); |
c27a02cd YP |
1639 | |
1640 | mutex_lock(&mdev->state_lock); | |
1641 | ||
3484aac1 | 1642 | mlx4_en_stop_port(dev, 0); |
c27a02cd YP |
1643 | netif_carrier_off(dev); |
1644 | ||
1645 | mutex_unlock(&mdev->state_lock); | |
1646 | return 0; | |
1647 | } | |
1648 | ||
fe0af03c | 1649 | void mlx4_en_free_resources(struct mlx4_en_priv *priv) |
c27a02cd YP |
1650 | { |
1651 | int i; | |
1652 | ||
1eb8c695 AV |
1653 | #ifdef CONFIG_RFS_ACCEL |
1654 | free_irq_cpu_rmap(priv->dev->rx_cpu_rmap); | |
1655 | priv->dev->rx_cpu_rmap = NULL; | |
1656 | #endif | |
1657 | ||
c27a02cd YP |
1658 | for (i = 0; i < priv->tx_ring_num; i++) { |
1659 | if (priv->tx_ring[i].tx_info) | |
1660 | mlx4_en_destroy_tx_ring(priv, &priv->tx_ring[i]); | |
1661 | if (priv->tx_cq[i].buf) | |
fe0af03c | 1662 | mlx4_en_destroy_cq(priv, &priv->tx_cq[i]); |
c27a02cd YP |
1663 | } |
1664 | ||
1665 | for (i = 0; i < priv->rx_ring_num; i++) { | |
1666 | if (priv->rx_ring[i].rx_info) | |
68355f71 TLSC |
1667 | mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i], |
1668 | priv->prof->rx_ring_size, priv->stride); | |
c27a02cd | 1669 | if (priv->rx_cq[i].buf) |
fe0af03c | 1670 | mlx4_en_destroy_cq(priv, &priv->rx_cq[i]); |
c27a02cd | 1671 | } |
044ca2a5 YP |
1672 | |
1673 | if (priv->base_tx_qpn) { | |
1674 | mlx4_qp_release_range(priv->mdev->dev, priv->base_tx_qpn, priv->tx_ring_num); | |
1675 | priv->base_tx_qpn = 0; | |
1676 | } | |
c27a02cd YP |
1677 | } |
1678 | ||
18cc42a3 | 1679 | int mlx4_en_alloc_resources(struct mlx4_en_priv *priv) |
c27a02cd | 1680 | { |
c27a02cd YP |
1681 | struct mlx4_en_port_profile *prof = priv->prof; |
1682 | int i; | |
044ca2a5 | 1683 | int err; |
87a5c389 | 1684 | |
044ca2a5 | 1685 | err = mlx4_qp_reserve_range(priv->mdev->dev, priv->tx_ring_num, 256, &priv->base_tx_qpn); |
87a5c389 YP |
1686 | if (err) { |
1687 | en_err(priv, "failed reserving range for TX rings\n"); | |
1688 | return err; | |
1689 | } | |
c27a02cd YP |
1690 | |
1691 | /* Create tx Rings */ | |
1692 | for (i = 0; i < priv->tx_ring_num; i++) { | |
1693 | if (mlx4_en_create_cq(priv, &priv->tx_cq[i], | |
1694 | prof->tx_ring_size, i, TX)) | |
1695 | goto err; | |
1696 | ||
044ca2a5 | 1697 | if (mlx4_en_create_tx_ring(priv, &priv->tx_ring[i], priv->base_tx_qpn + i, |
c27a02cd YP |
1698 | prof->tx_ring_size, TXBB_SIZE)) |
1699 | goto err; | |
1700 | } | |
1701 | ||
1702 | /* Create rx Rings */ | |
1703 | for (i = 0; i < priv->rx_ring_num; i++) { | |
1704 | if (mlx4_en_create_cq(priv, &priv->rx_cq[i], | |
1705 | prof->rx_ring_size, i, RX)) | |
1706 | goto err; | |
1707 | ||
1708 | if (mlx4_en_create_rx_ring(priv, &priv->rx_ring[i], | |
1709 | prof->rx_ring_size, priv->stride)) | |
1710 | goto err; | |
1711 | } | |
1712 | ||
1eb8c695 AV |
1713 | #ifdef CONFIG_RFS_ACCEL |
1714 | priv->dev->rx_cpu_rmap = alloc_irq_cpu_rmap(priv->rx_ring_num); | |
1715 | if (!priv->dev->rx_cpu_rmap) | |
1716 | goto err; | |
1eb8c695 AV |
1717 | #endif |
1718 | ||
c27a02cd YP |
1719 | return 0; |
1720 | ||
1721 | err: | |
453a6082 | 1722 | en_err(priv, "Failed to allocate NIC resources\n"); |
c27a02cd YP |
1723 | return -ENOMEM; |
1724 | } | |
1725 | ||
1726 | ||
1727 | void mlx4_en_destroy_netdev(struct net_device *dev) | |
1728 | { | |
1729 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
1730 | struct mlx4_en_dev *mdev = priv->mdev; | |
1731 | ||
453a6082 | 1732 | en_dbg(DRV, priv, "Destroying netdev on port:%d\n", priv->port); |
c27a02cd YP |
1733 | |
1734 | /* Unregister device - this will close the port if it was up */ | |
1735 | if (priv->registered) | |
1736 | unregister_netdev(dev); | |
1737 | ||
1738 | if (priv->allocated) | |
1739 | mlx4_free_hwq_res(mdev->dev, &priv->res, MLX4_EN_PAGE_SIZE); | |
1740 | ||
1741 | cancel_delayed_work(&priv->stats_task); | |
c27a02cd YP |
1742 | /* flush any pending task for this netdev */ |
1743 | flush_workqueue(mdev->workqueue); | |
1744 | ||
1745 | /* Detach the netdev so tasks would not attempt to access it */ | |
1746 | mutex_lock(&mdev->state_lock); | |
1747 | mdev->pndev[priv->port] = NULL; | |
1748 | mutex_unlock(&mdev->state_lock); | |
1749 | ||
fe0af03c | 1750 | mlx4_en_free_resources(priv); |
564c274c | 1751 | |
bc6a4744 AV |
1752 | kfree(priv->tx_ring); |
1753 | kfree(priv->tx_cq); | |
1754 | ||
c27a02cd YP |
1755 | free_netdev(dev); |
1756 | } | |
1757 | ||
1758 | static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu) | |
1759 | { | |
1760 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
1761 | struct mlx4_en_dev *mdev = priv->mdev; | |
1762 | int err = 0; | |
1763 | ||
453a6082 | 1764 | en_dbg(DRV, priv, "Change MTU called - current:%d new:%d\n", |
c27a02cd YP |
1765 | dev->mtu, new_mtu); |
1766 | ||
1767 | if ((new_mtu < MLX4_EN_MIN_MTU) || (new_mtu > priv->max_mtu)) { | |
453a6082 | 1768 | en_err(priv, "Bad MTU size:%d.\n", new_mtu); |
c27a02cd YP |
1769 | return -EPERM; |
1770 | } | |
1771 | dev->mtu = new_mtu; | |
1772 | ||
1773 | if (netif_running(dev)) { | |
1774 | mutex_lock(&mdev->state_lock); | |
1775 | if (!mdev->device_up) { | |
1776 | /* NIC is probably restarting - let watchdog task reset | |
1777 | * the port */ | |
453a6082 | 1778 | en_dbg(DRV, priv, "Change MTU called with card down!?\n"); |
c27a02cd | 1779 | } else { |
3484aac1 | 1780 | mlx4_en_stop_port(dev, 1); |
c27a02cd YP |
1781 | err = mlx4_en_start_port(dev); |
1782 | if (err) { | |
453a6082 | 1783 | en_err(priv, "Failed restarting port:%d\n", |
c27a02cd YP |
1784 | priv->port); |
1785 | queue_work(mdev->workqueue, &priv->watchdog_task); | |
1786 | } | |
1787 | } | |
1788 | mutex_unlock(&mdev->state_lock); | |
1789 | } | |
1790 | return 0; | |
1791 | } | |
1792 | ||
60d6fe99 AV |
1793 | static int mlx4_en_set_features(struct net_device *netdev, |
1794 | netdev_features_t features) | |
1795 | { | |
1796 | struct mlx4_en_priv *priv = netdev_priv(netdev); | |
1797 | ||
1798 | if (features & NETIF_F_LOOPBACK) | |
1799 | priv->ctrl_flags |= cpu_to_be32(MLX4_WQE_CTRL_FORCE_LOOPBACK); | |
1800 | else | |
1801 | priv->ctrl_flags &= | |
1802 | cpu_to_be32(~MLX4_WQE_CTRL_FORCE_LOOPBACK); | |
1803 | ||
79aeaccd YB |
1804 | mlx4_en_update_loopback_state(netdev, features); |
1805 | ||
60d6fe99 AV |
1806 | return 0; |
1807 | ||
1808 | } | |
1809 | ||
3addc568 SH |
1810 | static const struct net_device_ops mlx4_netdev_ops = { |
1811 | .ndo_open = mlx4_en_open, | |
1812 | .ndo_stop = mlx4_en_close, | |
1813 | .ndo_start_xmit = mlx4_en_xmit, | |
f813cad8 | 1814 | .ndo_select_queue = mlx4_en_select_queue, |
3addc568 | 1815 | .ndo_get_stats = mlx4_en_get_stats, |
0eb74fdd | 1816 | .ndo_set_rx_mode = mlx4_en_set_rx_mode, |
3addc568 | 1817 | .ndo_set_mac_address = mlx4_en_set_mac, |
52255bbe | 1818 | .ndo_validate_addr = eth_validate_addr, |
3addc568 SH |
1819 | .ndo_change_mtu = mlx4_en_change_mtu, |
1820 | .ndo_tx_timeout = mlx4_en_tx_timeout, | |
3addc568 SH |
1821 | .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid, |
1822 | .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid, | |
1823 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
1824 | .ndo_poll_controller = mlx4_en_netpoll, | |
1825 | #endif | |
60d6fe99 | 1826 | .ndo_set_features = mlx4_en_set_features, |
897d7846 | 1827 | .ndo_setup_tc = mlx4_en_setup_tc, |
1eb8c695 AV |
1828 | #ifdef CONFIG_RFS_ACCEL |
1829 | .ndo_rx_flow_steer = mlx4_en_filter_rfs, | |
1830 | #endif | |
3addc568 SH |
1831 | }; |
1832 | ||
c27a02cd YP |
1833 | int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port, |
1834 | struct mlx4_en_port_profile *prof) | |
1835 | { | |
1836 | struct net_device *dev; | |
1837 | struct mlx4_en_priv *priv; | |
c07cb4b0 | 1838 | int i; |
c27a02cd YP |
1839 | int err; |
1840 | ||
f1593d22 | 1841 | dev = alloc_etherdev_mqs(sizeof(struct mlx4_en_priv), |
d317966b | 1842 | MAX_TX_RINGS, MAX_RX_RINGS); |
41de8d4c | 1843 | if (dev == NULL) |
c27a02cd | 1844 | return -ENOMEM; |
c27a02cd | 1845 | |
d317966b AV |
1846 | netif_set_real_num_tx_queues(dev, prof->tx_ring_num); |
1847 | netif_set_real_num_rx_queues(dev, prof->rx_ring_num); | |
1848 | ||
c27a02cd | 1849 | SET_NETDEV_DEV(dev, &mdev->dev->pdev->dev); |
741a00be | 1850 | dev->dev_id = port - 1; |
c27a02cd YP |
1851 | |
1852 | /* | |
1853 | * Initialize driver private data | |
1854 | */ | |
1855 | ||
1856 | priv = netdev_priv(dev); | |
1857 | memset(priv, 0, sizeof(struct mlx4_en_priv)); | |
1858 | priv->dev = dev; | |
1859 | priv->mdev = mdev; | |
ebf8c9aa | 1860 | priv->ddev = &mdev->pdev->dev; |
c27a02cd YP |
1861 | priv->prof = prof; |
1862 | priv->port = port; | |
1863 | priv->port_up = false; | |
c27a02cd | 1864 | priv->flags = prof->flags; |
60d6fe99 AV |
1865 | priv->ctrl_flags = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE | |
1866 | MLX4_WQE_CTRL_SOLICITED); | |
d317966b | 1867 | priv->num_tx_rings_p_up = mdev->profile.num_tx_rings_p_up; |
c27a02cd | 1868 | priv->tx_ring_num = prof->tx_ring_num; |
d317966b AV |
1869 | |
1870 | priv->tx_ring = kzalloc(sizeof(struct mlx4_en_tx_ring) * MAX_TX_RINGS, | |
1871 | GFP_KERNEL); | |
bc6a4744 AV |
1872 | if (!priv->tx_ring) { |
1873 | err = -ENOMEM; | |
1874 | goto out; | |
1875 | } | |
d317966b AV |
1876 | priv->tx_cq = kzalloc(sizeof(struct mlx4_en_cq) * MAX_RX_RINGS, |
1877 | GFP_KERNEL); | |
bc6a4744 AV |
1878 | if (!priv->tx_cq) { |
1879 | err = -ENOMEM; | |
1880 | goto out; | |
1881 | } | |
c27a02cd | 1882 | priv->rx_ring_num = prof->rx_ring_num; |
08ff3235 | 1883 | priv->cqe_factor = (mdev->dev->caps.cqe_size == 64) ? 1 : 0; |
c27a02cd YP |
1884 | priv->mac_index = -1; |
1885 | priv->msg_enable = MLX4_EN_MSG_LEVEL; | |
1886 | spin_lock_init(&priv->stats_lock); | |
0eb74fdd | 1887 | INIT_WORK(&priv->rx_mode_task, mlx4_en_do_set_rx_mode); |
c27a02cd | 1888 | INIT_WORK(&priv->mac_task, mlx4_en_do_set_mac); |
c27a02cd YP |
1889 | INIT_WORK(&priv->watchdog_task, mlx4_en_restart); |
1890 | INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate); | |
1891 | INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats); | |
564c274c AV |
1892 | #ifdef CONFIG_MLX4_EN_DCB |
1893 | if (!mlx4_is_slave(priv->mdev->dev)) | |
1894 | dev->dcbnl_ops = &mlx4_en_dcbnl_ops; | |
1895 | #endif | |
c27a02cd | 1896 | |
c07cb4b0 YB |
1897 | for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) |
1898 | INIT_HLIST_HEAD(&priv->mac_hash[i]); | |
16a10ffd | 1899 | |
c27a02cd YP |
1900 | /* Query for default mac and max mtu */ |
1901 | priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port]; | |
6bbb6d99 YB |
1902 | |
1903 | /* Set default MAC */ | |
1904 | dev->addr_len = ETH_ALEN; | |
1905 | mlx4_en_u64_to_mac(dev->dev_addr, mdev->dev->caps.def_mac[priv->port]); | |
1906 | if (!is_valid_ether_addr(dev->dev_addr)) { | |
1907 | en_err(priv, "Port: %d, invalid mac burned: %pM, quiting\n", | |
1908 | priv->port, dev->dev_addr); | |
c27a02cd YP |
1909 | err = -EINVAL; |
1910 | goto out; | |
1911 | } | |
1912 | ||
6bbb6d99 YB |
1913 | memcpy(priv->prev_mac, dev->dev_addr, sizeof(priv->prev_mac)); |
1914 | ||
c27a02cd YP |
1915 | priv->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) + |
1916 | DS_SIZE * MLX4_EN_MAX_RX_FRAGS); | |
1917 | err = mlx4_en_alloc_resources(priv); | |
1918 | if (err) | |
1919 | goto out; | |
1920 | ||
78fb2de7 AV |
1921 | #ifdef CONFIG_RFS_ACCEL |
1922 | INIT_LIST_HEAD(&priv->filters); | |
1923 | spin_lock_init(&priv->filters_lock); | |
1924 | #endif | |
1925 | ||
c27a02cd YP |
1926 | /* Allocate page for receive rings */ |
1927 | err = mlx4_alloc_hwq_res(mdev->dev, &priv->res, | |
1928 | MLX4_EN_PAGE_SIZE, MLX4_EN_PAGE_SIZE); | |
1929 | if (err) { | |
453a6082 | 1930 | en_err(priv, "Failed to allocate page for rx qps\n"); |
c27a02cd YP |
1931 | goto out; |
1932 | } | |
1933 | priv->allocated = 1; | |
1934 | ||
c27a02cd YP |
1935 | /* |
1936 | * Initialize netdev entry points | |
1937 | */ | |
3addc568 | 1938 | dev->netdev_ops = &mlx4_netdev_ops; |
c27a02cd | 1939 | dev->watchdog_timeo = MLX4_EN_WATCHDOG_TIMEOUT; |
1eb63a28 BH |
1940 | netif_set_real_num_tx_queues(dev, priv->tx_ring_num); |
1941 | netif_set_real_num_rx_queues(dev, priv->rx_ring_num); | |
3addc568 | 1942 | |
c27a02cd YP |
1943 | SET_ETHTOOL_OPS(dev, &mlx4_en_ethtool_ops); |
1944 | ||
c27a02cd YP |
1945 | /* |
1946 | * Set driver features | |
1947 | */ | |
c8c64cff MM |
1948 | dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; |
1949 | if (mdev->LSO_support) | |
1950 | dev->hw_features |= NETIF_F_TSO | NETIF_F_TSO6; | |
1951 | ||
1952 | dev->vlan_features = dev->hw_features; | |
1953 | ||
ad86107f | 1954 | dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_RXHASH; |
c8c64cff MM |
1955 | dev->features = dev->hw_features | NETIF_F_HIGHDMA | |
1956 | NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX | | |
1957 | NETIF_F_HW_VLAN_FILTER; | |
60d6fe99 | 1958 | dev->hw_features |= NETIF_F_LOOPBACK; |
c27a02cd | 1959 | |
1eb8c695 AV |
1960 | if (mdev->dev->caps.steering_mode == |
1961 | MLX4_STEERING_MODE_DEVICE_MANAGED) | |
1962 | dev->hw_features |= NETIF_F_NTUPLE; | |
1963 | ||
c27a02cd YP |
1964 | mdev->pndev[port] = dev; |
1965 | ||
1966 | netif_carrier_off(dev); | |
1967 | err = register_netdev(dev); | |
1968 | if (err) { | |
453a6082 | 1969 | en_err(priv, "Netdev registration failed for port %d\n", port); |
c27a02cd YP |
1970 | goto out; |
1971 | } | |
4234144f | 1972 | priv->registered = 1; |
453a6082 YP |
1973 | |
1974 | en_warn(priv, "Using %d TX rings\n", prof->tx_ring_num); | |
1975 | en_warn(priv, "Using %d RX rings\n", prof->rx_ring_num); | |
1976 | ||
79aeaccd YB |
1977 | mlx4_en_update_loopback_state(priv->dev, priv->dev->features); |
1978 | ||
90822265 | 1979 | /* Configure port */ |
5c8e9046 | 1980 | mlx4_en_calc_rx_buf(dev); |
90822265 | 1981 | err = mlx4_SET_PORT_general(mdev->dev, priv->port, |
5c8e9046 YP |
1982 | priv->rx_skb_size + ETH_FCS_LEN, |
1983 | prof->tx_pause, prof->tx_ppp, | |
1984 | prof->rx_pause, prof->rx_ppp); | |
90822265 YP |
1985 | if (err) { |
1986 | en_err(priv, "Failed setting port general configurations " | |
1987 | "for port %d, with error %d\n", priv->port, err); | |
1988 | goto out; | |
1989 | } | |
1990 | ||
1991 | /* Init port */ | |
1992 | en_warn(priv, "Initializing port\n"); | |
1993 | err = mlx4_INIT_PORT(mdev->dev, priv->port); | |
1994 | if (err) { | |
1995 | en_err(priv, "Failed Initializing port\n"); | |
1996 | goto out; | |
1997 | } | |
39f17b44 | 1998 | mlx4_en_set_default_moderation(priv); |
c27a02cd YP |
1999 | queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY); |
2000 | return 0; | |
2001 | ||
2002 | out: | |
2003 | mlx4_en_destroy_netdev(dev); | |
2004 | return err; | |
2005 | } | |
2006 |