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c27a02cd YP |
1 | /* |
2 | * Copyright (c) 2007 Mellanox Technologies. All rights reserved. | |
3 | * | |
4 | * This software is available to you under a choice of one of two | |
5 | * licenses. You may choose to be licensed under the terms of the GNU | |
6 | * General Public License (GPL) Version 2, available from the file | |
7 | * COPYING in the main directory of this source tree, or the | |
8 | * OpenIB.org BSD license below: | |
9 | * | |
10 | * Redistribution and use in source and binary forms, with or | |
11 | * without modification, are permitted provided that the following | |
12 | * conditions are met: | |
13 | * | |
14 | * - Redistributions of source code must retain the above | |
15 | * copyright notice, this list of conditions and the following | |
16 | * disclaimer. | |
17 | * | |
18 | * - Redistributions in binary form must reproduce the above | |
19 | * copyright notice, this list of conditions and the following | |
20 | * disclaimer in the documentation and/or other materials | |
21 | * provided with the distribution. | |
22 | * | |
23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
25 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
26 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
27 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
30 | * SOFTWARE. | |
31 | * | |
32 | */ | |
33 | ||
5a0e3ad6 | 34 | #include <linux/slab.h> |
c27a02cd YP |
35 | #include <linux/vmalloc.h> |
36 | #include <linux/mlx4/qp.h> | |
37 | ||
38 | #include "mlx4_en.h" | |
39 | ||
40 | void mlx4_en_fill_qp_context(struct mlx4_en_priv *priv, int size, int stride, | |
9f519f68 | 41 | int is_tx, int rss, int qpn, int cqn, |
0e98b523 | 42 | int user_prio, struct mlx4_qp_context *context) |
c27a02cd YP |
43 | { |
44 | struct mlx4_en_dev *mdev = priv->mdev; | |
ec693d47 | 45 | struct net_device *dev = priv->dev; |
c27a02cd YP |
46 | |
47 | memset(context, 0, sizeof *context); | |
876f6e67 | 48 | context->flags = cpu_to_be32(7 << 16 | rss << MLX4_RSS_QPC_FLAG_OFFSET); |
c27a02cd YP |
49 | context->pd = cpu_to_be32(mdev->priv_pdn); |
50 | context->mtu_msgmax = 0xff; | |
9f519f68 YP |
51 | if (!is_tx && !rss) |
52 | context->rq_size_stride = ilog2(size) << 3 | (ilog2(stride) - 4); | |
53f33ae2 | 53 | if (is_tx) { |
c27a02cd | 54 | context->sq_size_stride = ilog2(size) << 3 | (ilog2(stride) - 4); |
53f33ae2 MS |
55 | if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_PORT_REMAP) |
56 | context->params2 |= MLX4_QP_BIT_FPP; | |
57 | ||
58 | } else { | |
9f519f68 | 59 | context->sq_size_stride = ilog2(TXBB_SIZE) - 4; |
53f33ae2 | 60 | } |
85743f1e HN |
61 | context->usr_page = cpu_to_be32(mlx4_to_hw_uar_index(mdev->dev, |
62 | mdev->priv_uar.index)); | |
c27a02cd YP |
63 | context->local_qpn = cpu_to_be32(qpn); |
64 | context->pri_path.ackto = 1 & 0x07; | |
65 | context->pri_path.sched_queue = 0x83 | (priv->port - 1) << 6; | |
0e98b523 AV |
66 | if (user_prio >= 0) { |
67 | context->pri_path.sched_queue |= user_prio << 3; | |
7677fc96 | 68 | context->pri_path.feup = MLX4_FEUP_FORCE_ETH_UP; |
0e98b523 | 69 | } |
6de5f7f6 | 70 | context->pri_path.counter_index = priv->counter_index; |
c27a02cd YP |
71 | context->cqn_send = cpu_to_be32(cqn); |
72 | context->cqn_recv = cpu_to_be32(cqn); | |
74194fb9 MG |
73 | if (!rss && |
74 | (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_LB_SRC_CHK) && | |
75 | context->pri_path.counter_index != | |
76 | MLX4_SINK_COUNTER_INDEX(mdev->dev)) { | |
77 | /* disable multicast loopback to qp with same counter */ | |
78 | if (!(dev->features & NETIF_F_LOOPBACK)) | |
79 | context->pri_path.fl |= MLX4_FL_ETH_SRC_CHECK_MC_LB; | |
80 | context->pri_path.control |= MLX4_CTRL_ETH_SRC_CHECK_IF_COUNTER; | |
81 | } | |
c27a02cd | 82 | context->db_rec_addr = cpu_to_be64(priv->res.db.dma << 2); |
ec693d47 AV |
83 | if (!(dev->features & NETIF_F_HW_VLAN_CTAG_RX)) |
84 | context->param3 |= cpu_to_be32(1 << 30); | |
837052d0 OG |
85 | |
86 | if (!is_tx && !rss && | |
87 | (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)) { | |
88 | en_dbg(HW, priv, "Setting RX qp %x tunnel mode to RX tunneled & non-tunneled\n", qpn); | |
89 | context->srqn = cpu_to_be32(7 << 28); /* this fills bits 30:28 */ | |
90 | } | |
c27a02cd YP |
91 | } |
92 | ||
74194fb9 MG |
93 | int mlx4_en_change_mcast_lb(struct mlx4_en_priv *priv, struct mlx4_qp *qp, |
94 | int loopback) | |
95 | { | |
96 | int ret; | |
97 | struct mlx4_update_qp_params qp_params; | |
98 | ||
99 | memset(&qp_params, 0, sizeof(qp_params)); | |
100 | if (!loopback) | |
101 | qp_params.flags = MLX4_UPDATE_QP_PARAMS_FLAGS_ETH_CHECK_MC_LB; | |
102 | ||
103 | ret = mlx4_update_qp(priv->mdev->dev, qp->qpn, | |
104 | MLX4_UPDATE_QP_ETH_SRC_CHECK_MC_LB, | |
105 | &qp_params); | |
106 | ||
107 | return ret; | |
108 | } | |
c27a02cd YP |
109 | |
110 | int mlx4_en_map_buffer(struct mlx4_buf *buf) | |
111 | { | |
112 | struct page **pages; | |
113 | int i; | |
114 | ||
115 | if (BITS_PER_LONG == 64 || buf->nbufs == 1) | |
116 | return 0; | |
117 | ||
118 | pages = kmalloc(sizeof *pages * buf->nbufs, GFP_KERNEL); | |
119 | if (!pages) | |
120 | return -ENOMEM; | |
121 | ||
122 | for (i = 0; i < buf->nbufs; ++i) | |
123 | pages[i] = virt_to_page(buf->page_list[i].buf); | |
124 | ||
125 | buf->direct.buf = vmap(pages, buf->nbufs, VM_MAP, PAGE_KERNEL); | |
126 | kfree(pages); | |
127 | if (!buf->direct.buf) | |
128 | return -ENOMEM; | |
129 | ||
130 | return 0; | |
131 | } | |
132 | ||
133 | void mlx4_en_unmap_buffer(struct mlx4_buf *buf) | |
134 | { | |
135 | if (BITS_PER_LONG == 64 || buf->nbufs == 1) | |
136 | return; | |
137 | ||
138 | vunmap(buf->direct.buf); | |
139 | } | |
966508f7 YP |
140 | |
141 | void mlx4_en_sqp_event(struct mlx4_qp *qp, enum mlx4_event event) | |
142 | { | |
143 | return; | |
144 | } | |
145 |